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mbed 2
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TARGET_EFM32ZG_STK3200/TARGET_Silicon_Labs/TARGET_EFM32/common/objects.h@128:9bcdf88f62b0, 2016-10-27 (annotated)
- Committer:
- <>
- Date:
- Thu Oct 27 16:45:56 2016 +0100
- Revision:
- 128:9bcdf88f62b0
- Child:
- 141:794e51388b66
Release 128 of the mbed library
Ports for Upcoming Targets
Fixes and Changes
2966: Add kw24 support https://github.com/ARMmbed/mbed-os/pull/2966
3068: MultiTech mDot - clean up PeripheralPins.c and add new pin names https://github.com/ARMmbed/mbed-os/pull/3068
3089: Kinetis HAL: Remove clock initialization code from serial and ticker https://github.com/ARMmbed/mbed-os/pull/3089
2943: [NRF5] NVIC_SetVector functionality https://github.com/ARMmbed/mbed-os/pull/2943
2938: InterruptIn changes in NCS36510 HAL. https://github.com/ARMmbed/mbed-os/pull/2938
3108: Fix sleep function for NRF52. https://github.com/ARMmbed/mbed-os/pull/3108
3076: STM32F1: Correct timer master value reading https://github.com/ARMmbed/mbed-os/pull/3076
3085: Add LOWPOWERTIMER capability for NUCLEO_F303ZE https://github.com/ARMmbed/mbed-os/pull/3085
3046: [BEETLE] Update BLE stack on Beetle board https://github.com/ARMmbed/mbed-os/pull/3046
3122: [Silicon Labs] Update of Silicon Labs HAL https://github.com/ARMmbed/mbed-os/pull/3122
3022: OnSemi RAM usage fix https://github.com/ARMmbed/mbed-os/pull/3022
3121: STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH https://github.com/ARMmbed/mbed-os/pull/3121
3142: Targets- NUMAKER_PFM_NUC47216 remove mbed 2 https://github.com/ARMmbed/mbed-os/pull/3142
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 128:9bcdf88f62b0 | 1 | /***************************************************************************//** |
<> | 128:9bcdf88f62b0 | 2 | * @file objects.h |
<> | 128:9bcdf88f62b0 | 3 | ******************************************************************************* |
<> | 128:9bcdf88f62b0 | 4 | * @section License |
<> | 128:9bcdf88f62b0 | 5 | * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b> |
<> | 128:9bcdf88f62b0 | 6 | ******************************************************************************* |
<> | 128:9bcdf88f62b0 | 7 | * |
<> | 128:9bcdf88f62b0 | 8 | * SPDX-License-Identifier: Apache-2.0 |
<> | 128:9bcdf88f62b0 | 9 | * |
<> | 128:9bcdf88f62b0 | 10 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
<> | 128:9bcdf88f62b0 | 11 | * not use this file except in compliance with the License. |
<> | 128:9bcdf88f62b0 | 12 | * You may obtain a copy of the License at |
<> | 128:9bcdf88f62b0 | 13 | * |
<> | 128:9bcdf88f62b0 | 14 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 128:9bcdf88f62b0 | 15 | * |
<> | 128:9bcdf88f62b0 | 16 | * Unless required by applicable law or agreed to in writing, software |
<> | 128:9bcdf88f62b0 | 17 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
<> | 128:9bcdf88f62b0 | 18 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 128:9bcdf88f62b0 | 19 | * See the License for the specific language governing permissions and |
<> | 128:9bcdf88f62b0 | 20 | * limitations under the License. |
<> | 128:9bcdf88f62b0 | 21 | * |
<> | 128:9bcdf88f62b0 | 22 | ******************************************************************************/ |
<> | 128:9bcdf88f62b0 | 23 | |
<> | 128:9bcdf88f62b0 | 24 | #ifndef MBED_OBJECTS_H |
<> | 128:9bcdf88f62b0 | 25 | #define MBED_OBJECTS_H |
<> | 128:9bcdf88f62b0 | 26 | |
<> | 128:9bcdf88f62b0 | 27 | #include "PinNames.h" |
<> | 128:9bcdf88f62b0 | 28 | #include "PeripheralNames.h" |
<> | 128:9bcdf88f62b0 | 29 | #include "PortNames.h" |
<> | 128:9bcdf88f62b0 | 30 | #include "em_i2c.h" |
<> | 128:9bcdf88f62b0 | 31 | #include "em_dma.h" |
<> | 128:9bcdf88f62b0 | 32 | #include "em_cmu.h" |
<> | 128:9bcdf88f62b0 | 33 | #include "dma_api_HAL.h" |
<> | 128:9bcdf88f62b0 | 34 | |
<> | 128:9bcdf88f62b0 | 35 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 36 | extern "C" { |
<> | 128:9bcdf88f62b0 | 37 | #endif |
<> | 128:9bcdf88f62b0 | 38 | |
<> | 128:9bcdf88f62b0 | 39 | typedef struct { |
<> | 128:9bcdf88f62b0 | 40 | PinName pin:8; |
<> | 128:9bcdf88f62b0 | 41 | PinMode mode:6; |
<> | 128:9bcdf88f62b0 | 42 | PinDirection dir:2; |
<> | 128:9bcdf88f62b0 | 43 | } gpio_t; |
<> | 128:9bcdf88f62b0 | 44 | |
<> | 128:9bcdf88f62b0 | 45 | #if DEVICE_ANALOGIN |
<> | 128:9bcdf88f62b0 | 46 | struct analogin_s { |
<> | 128:9bcdf88f62b0 | 47 | ADC_TypeDef *adc; |
<> | 128:9bcdf88f62b0 | 48 | uint32_t channel; |
<> | 128:9bcdf88f62b0 | 49 | }; |
<> | 128:9bcdf88f62b0 | 50 | #endif |
<> | 128:9bcdf88f62b0 | 51 | |
<> | 128:9bcdf88f62b0 | 52 | #if DEVICE_ANALOGOUT |
<> | 128:9bcdf88f62b0 | 53 | struct dac_s { |
<> | 128:9bcdf88f62b0 | 54 | DAC_TypeDef *dac; |
<> | 128:9bcdf88f62b0 | 55 | uint32_t channel; |
<> | 128:9bcdf88f62b0 | 56 | }; |
<> | 128:9bcdf88f62b0 | 57 | #endif |
<> | 128:9bcdf88f62b0 | 58 | |
<> | 128:9bcdf88f62b0 | 59 | #if DEVICE_I2C |
<> | 128:9bcdf88f62b0 | 60 | struct i2c_s { |
<> | 128:9bcdf88f62b0 | 61 | I2C_TypeDef *i2c; |
<> | 128:9bcdf88f62b0 | 62 | #if DEVICE_I2C_ASYNCH |
<> | 128:9bcdf88f62b0 | 63 | uint32_t events; |
<> | 128:9bcdf88f62b0 | 64 | I2C_TransferSeq_TypeDef xfer; |
<> | 128:9bcdf88f62b0 | 65 | #endif |
<> | 128:9bcdf88f62b0 | 66 | }; |
<> | 128:9bcdf88f62b0 | 67 | #endif |
<> | 128:9bcdf88f62b0 | 68 | |
<> | 128:9bcdf88f62b0 | 69 | #if DEVICE_PORTOUT |
<> | 128:9bcdf88f62b0 | 70 | struct port_s { |
<> | 128:9bcdf88f62b0 | 71 | PortName port; |
<> | 128:9bcdf88f62b0 | 72 | uint32_t mask; |
<> | 128:9bcdf88f62b0 | 73 | PinDirection dir; |
<> | 128:9bcdf88f62b0 | 74 | }; |
<> | 128:9bcdf88f62b0 | 75 | #endif |
<> | 128:9bcdf88f62b0 | 76 | |
<> | 128:9bcdf88f62b0 | 77 | #if DEVICE_PWMOUT |
<> | 128:9bcdf88f62b0 | 78 | struct pwmout_s { |
<> | 128:9bcdf88f62b0 | 79 | //Channel on TIMER |
<> | 128:9bcdf88f62b0 | 80 | uint32_t channel; |
<> | 128:9bcdf88f62b0 | 81 | PinName pin; |
<> | 128:9bcdf88f62b0 | 82 | }; |
<> | 128:9bcdf88f62b0 | 83 | #endif |
<> | 128:9bcdf88f62b0 | 84 | |
<> | 128:9bcdf88f62b0 | 85 | #if DEVICE_INTERRUPTIN |
<> | 128:9bcdf88f62b0 | 86 | struct gpio_irq_s { |
<> | 128:9bcdf88f62b0 | 87 | PinName pin:8; // Pin number 4 least significant bits, port number 4 most significant bits |
<> | 128:9bcdf88f62b0 | 88 | uint32_t risingEdge:1; |
<> | 128:9bcdf88f62b0 | 89 | uint32_t fallingEdge:1; |
<> | 128:9bcdf88f62b0 | 90 | }; |
<> | 128:9bcdf88f62b0 | 91 | #endif |
<> | 128:9bcdf88f62b0 | 92 | |
<> | 128:9bcdf88f62b0 | 93 | #if DEVICE_SERIAL |
<> | 128:9bcdf88f62b0 | 94 | struct serial_s { |
<> | 128:9bcdf88f62b0 | 95 | union { |
<> | 128:9bcdf88f62b0 | 96 | USART_TypeDef *uart; |
<> | 128:9bcdf88f62b0 | 97 | LEUART_TypeDef *leuart; |
<> | 128:9bcdf88f62b0 | 98 | } periph; |
<> | 128:9bcdf88f62b0 | 99 | #ifndef _SILICON_LABS_32B_PLATFORM_2 |
<> | 128:9bcdf88f62b0 | 100 | uint32_t location; |
<> | 128:9bcdf88f62b0 | 101 | #else |
<> | 128:9bcdf88f62b0 | 102 | uint32_t location_tx; |
<> | 128:9bcdf88f62b0 | 103 | uint32_t location_rx; |
<> | 128:9bcdf88f62b0 | 104 | #endif |
<> | 128:9bcdf88f62b0 | 105 | PinName rx_pin; |
<> | 128:9bcdf88f62b0 | 106 | PinName tx_pin; |
<> | 128:9bcdf88f62b0 | 107 | #if DEVICE_SERIAL_ASYNCH |
<> | 128:9bcdf88f62b0 | 108 | uint32_t events; |
<> | 128:9bcdf88f62b0 | 109 | DMA_OPTIONS_t dmaOptionsTX; |
<> | 128:9bcdf88f62b0 | 110 | DMA_OPTIONS_t dmaOptionsRX; |
<> | 128:9bcdf88f62b0 | 111 | #endif |
<> | 128:9bcdf88f62b0 | 112 | uint32_t sleep_blocked; |
<> | 128:9bcdf88f62b0 | 113 | }; |
<> | 128:9bcdf88f62b0 | 114 | #endif |
<> | 128:9bcdf88f62b0 | 115 | |
<> | 128:9bcdf88f62b0 | 116 | #if DEVICE_SPI |
<> | 128:9bcdf88f62b0 | 117 | struct spi_s { |
<> | 128:9bcdf88f62b0 | 118 | USART_TypeDef *spi; |
<> | 128:9bcdf88f62b0 | 119 | int location; |
<> | 128:9bcdf88f62b0 | 120 | uint8_t bits; |
<> | 128:9bcdf88f62b0 | 121 | uint8_t master; |
<> | 128:9bcdf88f62b0 | 122 | #if DEVICE_SPI_ASYNCH |
<> | 128:9bcdf88f62b0 | 123 | uint32_t event; |
<> | 128:9bcdf88f62b0 | 124 | DMA_OPTIONS_t dmaOptionsTX; |
<> | 128:9bcdf88f62b0 | 125 | DMA_OPTIONS_t dmaOptionsRX; |
<> | 128:9bcdf88f62b0 | 126 | #endif |
<> | 128:9bcdf88f62b0 | 127 | }; |
<> | 128:9bcdf88f62b0 | 128 | #endif |
<> | 128:9bcdf88f62b0 | 129 | |
<> | 128:9bcdf88f62b0 | 130 | #if DEVICE_RTC |
<> | 128:9bcdf88f62b0 | 131 | struct lp_timer_s { |
<> | 128:9bcdf88f62b0 | 132 | uint32_t start; |
<> | 128:9bcdf88f62b0 | 133 | uint32_t stop; |
<> | 128:9bcdf88f62b0 | 134 | }; |
<> | 128:9bcdf88f62b0 | 135 | #endif |
<> | 128:9bcdf88f62b0 | 136 | |
<> | 128:9bcdf88f62b0 | 137 | #if DEVICE_SLEEP |
<> | 128:9bcdf88f62b0 | 138 | #define NUM_SLEEP_MODES 5 |
<> | 128:9bcdf88f62b0 | 139 | typedef enum { |
<> | 128:9bcdf88f62b0 | 140 | EM0 = 0, |
<> | 128:9bcdf88f62b0 | 141 | EM1 = 1, |
<> | 128:9bcdf88f62b0 | 142 | EM2 = 2, |
<> | 128:9bcdf88f62b0 | 143 | EM3 = 3, |
<> | 128:9bcdf88f62b0 | 144 | EM4 = 4 |
<> | 128:9bcdf88f62b0 | 145 | } sleepstate_enum; |
<> | 128:9bcdf88f62b0 | 146 | #endif |
<> | 128:9bcdf88f62b0 | 147 | |
<> | 128:9bcdf88f62b0 | 148 | |
<> | 128:9bcdf88f62b0 | 149 | #ifdef __cplusplus |
<> | 128:9bcdf88f62b0 | 150 | } |
<> | 128:9bcdf88f62b0 | 151 | #endif |
<> | 128:9bcdf88f62b0 | 152 | |
<> | 128:9bcdf88f62b0 | 153 | #endif |