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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_SDT32620B/TOOLCHAIN_IAR/ioman.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:84c0a372a020 1 /*******************************************************************************
AnnaBridge 167:84c0a372a020 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 167:84c0a372a020 3 *
AnnaBridge 167:84c0a372a020 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 167:84c0a372a020 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 167:84c0a372a020 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 167:84c0a372a020 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 167:84c0a372a020 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 167:84c0a372a020 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 167:84c0a372a020 10 *
AnnaBridge 167:84c0a372a020 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 167:84c0a372a020 12 * in all copies or substantial portions of the Software.
AnnaBridge 167:84c0a372a020 13 *
AnnaBridge 167:84c0a372a020 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 167:84c0a372a020 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 167:84c0a372a020 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 167:84c0a372a020 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 167:84c0a372a020 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 167:84c0a372a020 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 167:84c0a372a020 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 167:84c0a372a020 21 *
AnnaBridge 167:84c0a372a020 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 167:84c0a372a020 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 167:84c0a372a020 24 * Products, Inc. Branding Policy.
AnnaBridge 167:84c0a372a020 25 *
AnnaBridge 167:84c0a372a020 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 167:84c0a372a020 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 167:84c0a372a020 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 167:84c0a372a020 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 167:84c0a372a020 30 * ownership rights.
AnnaBridge 167:84c0a372a020 31 *
AnnaBridge 167:84c0a372a020 32 * $Date: 2016-06-03 16:02:37 -0500 (Fri, 03 Jun 2016) $
AnnaBridge 167:84c0a372a020 33 * $Revision: 23203 $
AnnaBridge 167:84c0a372a020 34 *
AnnaBridge 167:84c0a372a020 35 ******************************************************************************/
AnnaBridge 167:84c0a372a020 36
AnnaBridge 167:84c0a372a020 37 /**
AnnaBridge 167:84c0a372a020 38 * @file ioman.h
AnnaBridge 167:84c0a372a020 39 * @brief IOMAN provides IO Management to the device. The functions in this
AnnaBridge 167:84c0a372a020 40 * API enable requesting port pin assignment and release for all peripherals
AnnaBridge 167:84c0a372a020 41 * with external I/O. Port pin mapping support is included for peripherals
AnnaBridge 167:84c0a372a020 42 * that can support more than one pin mapping in a package.
AnnaBridge 167:84c0a372a020 43 */
AnnaBridge 167:84c0a372a020 44
AnnaBridge 167:84c0a372a020 45 #ifndef _IOMAN_H_
AnnaBridge 167:84c0a372a020 46 #define _IOMAN_H_
AnnaBridge 167:84c0a372a020 47
AnnaBridge 167:84c0a372a020 48 #include "mxc_config.h"
AnnaBridge 167:84c0a372a020 49 #include "ioman_regs.h"
AnnaBridge 167:84c0a372a020 50
AnnaBridge 167:84c0a372a020 51 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 52 extern "C" {
AnnaBridge 167:84c0a372a020 53 #endif
AnnaBridge 167:84c0a372a020 54
AnnaBridge 167:84c0a372a020 55 /***** Definitions *****/
AnnaBridge 167:84c0a372a020 56
AnnaBridge 167:84c0a372a020 57 /** @brief Aliases for IOMAN package mapping field values. Refer to the
AnnaBridge 167:84c0a372a020 58 * User's Guide for pinouts for each mapping.
AnnaBridge 167:84c0a372a020 59 */
AnnaBridge 167:84c0a372a020 60 typedef enum {
AnnaBridge 167:84c0a372a020 61 IOMAN_MAP_UNUSED = 0, /**< Pin is not used */
AnnaBridge 167:84c0a372a020 62 IOMAN_MAP_A = 0, /**< Pin Mapping A */
AnnaBridge 167:84c0a372a020 63 IOMAN_MAP_B = 1, /**< Pin Mapping B */
AnnaBridge 167:84c0a372a020 64 IOMAN_MAP_C = 2, /**< Pin Mapping C */
AnnaBridge 167:84c0a372a020 65 IOMAN_MAP_D = 3, /**< Pin Mapping D */
AnnaBridge 167:84c0a372a020 66 IOMAN_MAP_E = 4, /**< Pin Mapping E */
AnnaBridge 167:84c0a372a020 67 IOMAN_MAP_F = 5, /**< Pin Mapping F */
AnnaBridge 167:84c0a372a020 68 IOMAN_MAP_G = 6 /**< Pin Mapping G */
AnnaBridge 167:84c0a372a020 69 }
AnnaBridge 167:84c0a372a020 70 ioman_map_t;
AnnaBridge 167:84c0a372a020 71
AnnaBridge 167:84c0a372a020 72 /** @brief Typing of IOMAN Req and Ack register fields */
AnnaBridge 167:84c0a372a020 73 typedef union {
AnnaBridge 167:84c0a372a020 74 uint32_t value;
AnnaBridge 167:84c0a372a020 75 mxc_ioman_spix_req_t spix; /**< SPIX IOMAN configuration struct */
AnnaBridge 167:84c0a372a020 76 mxc_ioman_uart0_req_t uart; /**< UART IOMAN configuration struct, see mxc_ioman_uart0_req_t */
AnnaBridge 167:84c0a372a020 77 mxc_ioman_i2cm0_req_t i2cm0; /**< I2C Master 0 IOMAN configuration struct, see mxc_ioman_i2cm0_req_t */
AnnaBridge 167:84c0a372a020 78 mxc_ioman_i2cm1_req_t i2cm1; /**< I2C Master 1 IOMAN configuration struct, see mxc_ioman_i2cm1_req_t */
AnnaBridge 167:84c0a372a020 79 mxc_ioman_i2cm2_req_t i2cm2; /**< I2C Master 2 IOMAN configuration struct, see mxc_ioman_i2cm2_req_t */
AnnaBridge 167:84c0a372a020 80 mxc_ioman_i2cs_req_t i2cs; /**< I2C Slave IOMAN configuration struct, see mxc_ioman_i2cs_req_t */
AnnaBridge 167:84c0a372a020 81 mxc_ioman_spim0_req_t spim0; /**< SPI Master 0 IOMAN configuration struct, see mxc_ioman_spim0_req_t */
AnnaBridge 167:84c0a372a020 82 mxc_ioman_spim1_req_t spim1; /**< SPI Master 1 IOMAN configuration struct, see mxc_ioman_spim1_req_t */
AnnaBridge 167:84c0a372a020 83 mxc_ioman_spim2_req_t spim2; /**< SPI Master 2 IOMAN configuration struct, see mxc_ioman_spim1_req_t */
AnnaBridge 167:84c0a372a020 84 mxc_ioman_spis_req_t spis; /**< SPI Slave IOMAN configuration struct, see mxc_ioman_spis_req_t */
AnnaBridge 167:84c0a372a020 85 mxc_ioman_owm_req_t owm; /**< 1-Wire Master IOMAN configuration struct, see mxc_ioman_owm_req_t */
AnnaBridge 167:84c0a372a020 86 } ioman_req_t;
AnnaBridge 167:84c0a372a020 87
AnnaBridge 167:84c0a372a020 88 /** @brief IOMAN configuration object */
AnnaBridge 167:84c0a372a020 89 typedef struct {
AnnaBridge 167:84c0a372a020 90 volatile uint32_t *req_reg; /** Pointer to an IOMAN request register */
AnnaBridge 167:84c0a372a020 91 volatile uint32_t *ack_reg; /** Pointer to an IOMAN acknowledge register */
AnnaBridge 167:84c0a372a020 92 ioman_req_t req_val; /** IOMAN request register value, see ioman_req_t */
AnnaBridge 167:84c0a372a020 93 } ioman_cfg_t;
AnnaBridge 167:84c0a372a020 94
AnnaBridge 167:84c0a372a020 95
AnnaBridge 167:84c0a372a020 96 /***** Function Prototypes *****/
AnnaBridge 167:84c0a372a020 97
AnnaBridge 167:84c0a372a020 98 /**
AnnaBridge 167:84c0a372a020 99 * @brief Configure the IO Manager using the specified configuration object.
AnnaBridge 167:84c0a372a020 100 * @param cfg IOMAN configuration object
AnnaBridge 167:84c0a372a020 101 * @returns E_NO_ERROR Configuration successful
AnnaBridge 167:84c0a372a020 102 */
AnnaBridge 167:84c0a372a020 103 int IOMAN_Config(const ioman_cfg_t *cfg);
AnnaBridge 167:84c0a372a020 104
AnnaBridge 167:84c0a372a020 105 /**
AnnaBridge 167:84c0a372a020 106 * @brief Create an IOMAN configuration object for the SPI XIP module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 107 * @param core Request (1) or release (0) SPIX core external pins
AnnaBridge 167:84c0a372a020 108 * @param ss0 Request (1) or release (0) slave select 0 active out
AnnaBridge 167:84c0a372a020 109 * @param ss1 Request (1) or release (0) slave select 1 active out
AnnaBridge 167:84c0a372a020 110 * @param ss2 Request (1) or release (0) slave select 2 active out
AnnaBridge 167:84c0a372a020 111 * @param quad Request (1) or release (0) quad IO
AnnaBridge 167:84c0a372a020 112 * @param fast Request (1) or release (0) fast mode
AnnaBridge 167:84c0a372a020 113 * @returns io_man_cfg_t IOMAN configuration object for the SPI XIP module.
AnnaBridge 167:84c0a372a020 114 */
AnnaBridge 167:84c0a372a020 115 ioman_cfg_t IOMAN_SPIX(int core, int ss0, int ss1, int ss2, int quad, int fast);
AnnaBridge 167:84c0a372a020 116
AnnaBridge 167:84c0a372a020 117 /**
AnnaBridge 167:84c0a372a020 118 * @brief Create an IOMAN configuration object for a UART module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 119 * @param idx Index of the UART module
AnnaBridge 167:84c0a372a020 120 * @param io_map Set the pin mapping for RX/TX pins, see ioman_map_t
AnnaBridge 167:84c0a372a020 121 * @param cts_map Set the pin mapping for CTS pin, see ioman_map_t
AnnaBridge 167:84c0a372a020 122 * @param rts_map Set the pin mapping for RTS pin, see ioman_map_t
AnnaBridge 167:84c0a372a020 123 * @param io_en Request (1) or release (0) RX and TX pins
AnnaBridge 167:84c0a372a020 124 * @param cts_en Request (1) or release (0) CTS pin
AnnaBridge 167:84c0a372a020 125 * @param rts_en Request (1) or release (0) RTS pin
AnnaBridge 167:84c0a372a020 126 * @returns ioman_cfg_t IOMAN configuration object for the UART module
AnnaBridge 167:84c0a372a020 127 */
AnnaBridge 167:84c0a372a020 128 ioman_cfg_t IOMAN_UART(int idx, ioman_map_t io_map, ioman_map_t cts_map, ioman_map_t rts_map, int io_en, int cts_en, int rts_en);
AnnaBridge 167:84c0a372a020 129
AnnaBridge 167:84c0a372a020 130 /**
AnnaBridge 167:84c0a372a020 131 * @brief Create an IOMAN configuration object for the I2CM0 module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 132 * @param core Request (1) or release (0) I2CM0 core external pins
AnnaBridge 167:84c0a372a020 133 * @param push_pull (1) Use push/pull driver (0) us open drain driver for the I2CM0 module
AnnaBridge 167:84c0a372a020 134 * @returns ioman_cfg_t IOMAN configuration object for the I2CM0 module.
AnnaBridge 167:84c0a372a020 135 */
AnnaBridge 167:84c0a372a020 136 ioman_cfg_t IOMAN_I2CM0(int core, int push_pull);
AnnaBridge 167:84c0a372a020 137
AnnaBridge 167:84c0a372a020 138 /**
AnnaBridge 167:84c0a372a020 139 * @brief Create an IOMAN configuration object for the I2CM1 module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 140 * @param core Request (1) or release (0) I2CM1 core external pins
AnnaBridge 167:84c0a372a020 141 * @param push_pull (1) Use push/pull driver (0) us open drain driver for the I2CM1 module
AnnaBridge 167:84c0a372a020 142 * @returns ioman_cfg_t IOMAN configuration object for the I2CM1 module.
AnnaBridge 167:84c0a372a020 143 */
AnnaBridge 167:84c0a372a020 144 ioman_cfg_t IOMAN_I2CM1(int core, int push_pull);
AnnaBridge 167:84c0a372a020 145
AnnaBridge 167:84c0a372a020 146 /**
AnnaBridge 167:84c0a372a020 147 * @brief Create an IOMAN configuration object for the I2CM2 module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 148 * @param core Request (1) or release (0) I2CM2 core external pins
AnnaBridge 167:84c0a372a020 149 * @param push_pull (1) Use push/pull driver (0) us open drain driver for the I2CM2 module
AnnaBridge 167:84c0a372a020 150 * @returns ioman_cfg_t IOMAN configuration object for the I2CM2 module.
AnnaBridge 167:84c0a372a020 151 */
AnnaBridge 167:84c0a372a020 152 ioman_cfg_t IOMAN_I2CM2(int core, int push_pull);
AnnaBridge 167:84c0a372a020 153
AnnaBridge 167:84c0a372a020 154 /**
AnnaBridge 167:84c0a372a020 155 * @brief Create an IOMAN configuration object for an I2C slave module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 156 * @param map Select the pin mapping for all configured pins, see ioman_map_t
AnnaBridge 167:84c0a372a020 157 * @param io_en Request (1) or release (0) the I/O for this module
AnnaBridge 167:84c0a372a020 158 * @returns ioman_cfg_t IOMAN configuration object for the I2CS module
AnnaBridge 167:84c0a372a020 159 */
AnnaBridge 167:84c0a372a020 160 ioman_cfg_t IOMAN_I2CS(ioman_map_t map, int io_en);
AnnaBridge 167:84c0a372a020 161
AnnaBridge 167:84c0a372a020 162 /**
AnnaBridge 167:84c0a372a020 163 * @brief Create an IOMAN configuration object for a SPI Master (SPIM) module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 164 * @param io_en Request (1) or release (0) the core IO for the module
AnnaBridge 167:84c0a372a020 165 * @param ss0 Request (1) or release (0) slave select 0
AnnaBridge 167:84c0a372a020 166 * @param ss1 Request (1) or release (0) slave select 1
AnnaBridge 167:84c0a372a020 167 * @param ss2 Request (1) or release (0) slave select 2
AnnaBridge 167:84c0a372a020 168 * @param ss3 Request (1) or release (0) slave select 3
AnnaBridge 167:84c0a372a020 169 * @param ss4 Request (1) or release (0) slave select 4
AnnaBridge 167:84c0a372a020 170 * @param quad Request (1) or release (0) quad IO
AnnaBridge 167:84c0a372a020 171 * @param fast Request (1) or release (0) fast mode
AnnaBridge 167:84c0a372a020 172 * @returns ioman_cfg_t IOMAN configuration object for an SPIM0 module
AnnaBridge 167:84c0a372a020 173 */
AnnaBridge 167:84c0a372a020 174 ioman_cfg_t IOMAN_SPIM0(int io_en, int ss0, int ss1, int ss2, int ss3, int ss4, int quad, int fast);
AnnaBridge 167:84c0a372a020 175
AnnaBridge 167:84c0a372a020 176 /**
AnnaBridge 167:84c0a372a020 177 * @brief Create an IOMAN configuration object for a SPIM module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 178 * @param io_en Request (1) or release (0) the core IO for the module
AnnaBridge 167:84c0a372a020 179 * @param ss0 Request (1) or release (0) slave select 0
AnnaBridge 167:84c0a372a020 180 * @param ss1 Request (1) or release (0) slave select 1
AnnaBridge 167:84c0a372a020 181 * @param ss2 Request (1) or release (0) slave select 2
AnnaBridge 167:84c0a372a020 182 * @param quad Request (1) or release (0) quad IO
AnnaBridge 167:84c0a372a020 183 * @param fast Request (1) or release (0) fast mode
AnnaBridge 167:84c0a372a020 184 * @returns ioman_cfg_t IOMAN configuration object for the SPIM1 module.
AnnaBridge 167:84c0a372a020 185 */
AnnaBridge 167:84c0a372a020 186 ioman_cfg_t IOMAN_SPIM1(int io_en, int ss0, int ss1, int ss2, int quad, int fast);
AnnaBridge 167:84c0a372a020 187
AnnaBridge 167:84c0a372a020 188 /**
AnnaBridge 167:84c0a372a020 189 * @brief Create an IOMAN configuration object for a SPI module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 190 * @param map Select the pin mapping, see ioman_map_t
AnnaBridge 167:84c0a372a020 191 * @param io_en Request (1) or release (0) the core IO for the module
AnnaBridge 167:84c0a372a020 192 * @param ss0 Request (1) or release (0) slave select 0
AnnaBridge 167:84c0a372a020 193 * @param ss1 Request (1) or release (0) slave select 1
AnnaBridge 167:84c0a372a020 194 * @param ss2 Request (1) or release (0) slave select 2
AnnaBridge 167:84c0a372a020 195 * @param sr0 Request (1) or release (0) slave ready 0
AnnaBridge 167:84c0a372a020 196 * @param sr1 Request (1) or release (0) slave ready 1
AnnaBridge 167:84c0a372a020 197 * @param quad Request (1) or release (0) quad IO
AnnaBridge 167:84c0a372a020 198 * @param fast Request (1) or release (0) fast mode
AnnaBridge 167:84c0a372a020 199 * @returns ioman_cfg_t IOMAN configuration object for the SPIM2 module
AnnaBridge 167:84c0a372a020 200 */
AnnaBridge 167:84c0a372a020 201 ioman_cfg_t IOMAN_SPIM2(ioman_map_t map, int io_en, int ss0, int ss1, int ss2, int sr0, int sr1, int quad, int fast);
AnnaBridge 167:84c0a372a020 202
AnnaBridge 167:84c0a372a020 203 /**
AnnaBridge 167:84c0a372a020 204 * @brief Create an IOMAN configuration object for a SPI module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 205 * @param io_en Request (1) or release (0) the core IO for the module
AnnaBridge 167:84c0a372a020 206 * @param quad Request (1) or release (0) quad IO
AnnaBridge 167:84c0a372a020 207 * @param fast Request (1) or release (0) fast mode
AnnaBridge 167:84c0a372a020 208 * @returns ioman_cfg_t IOMAN configuration object for the SPIM2 module
AnnaBridge 167:84c0a372a020 209 */
AnnaBridge 167:84c0a372a020 210 ioman_cfg_t IOMAN_SPIS(int io_en, int quad, int fast);
AnnaBridge 167:84c0a372a020 211
AnnaBridge 167:84c0a372a020 212 /**
AnnaBridge 167:84c0a372a020 213 * @brief Create an IOMAN configuration object for the 1-Wire Master module. Call IOMAN_Config with this object.
AnnaBridge 167:84c0a372a020 214 * @param io_en Request (1) or release (0) the core IO for the module
AnnaBridge 167:84c0a372a020 215 * @param epu Request (1) or release (0) external pullup
AnnaBridge 167:84c0a372a020 216 * @returns ioman_cfg_t IOMAN configuration object for the OWM module
AnnaBridge 167:84c0a372a020 217 */
AnnaBridge 167:84c0a372a020 218 ioman_cfg_t IOMAN_OWM(int io_en, int epu);
AnnaBridge 167:84c0a372a020 219
AnnaBridge 167:84c0a372a020 220 /**
AnnaBridge 167:84c0a372a020 221 * @}
AnnaBridge 167:84c0a372a020 222 */
AnnaBridge 167:84c0a372a020 223
AnnaBridge 167:84c0a372a020 224 /******************************************************************************/
AnnaBridge 167:84c0a372a020 225 /* All the function prototypes above are implemented as macros below. The
AnnaBridge 167:84c0a372a020 226 * above prototypes are for simplicity in doxygen.
AnnaBridge 167:84c0a372a020 227 */
AnnaBridge 167:84c0a372a020 228 #define IOMAN_SPIX(c, ss0, ss1, ss2, q, f) { \
AnnaBridge 167:84c0a372a020 229 .req_reg = &MXC_IOMAN->spix_req, \
AnnaBridge 167:84c0a372a020 230 .ack_reg = &MXC_IOMAN->spix_ack, \
AnnaBridge 167:84c0a372a020 231 .req_val.spix = { .core_io_req = c, \
AnnaBridge 167:84c0a372a020 232 .ss0_io_req = ss0, \
AnnaBridge 167:84c0a372a020 233 .ss1_io_req = ss1, \
AnnaBridge 167:84c0a372a020 234 .ss2_io_req = ss2, \
AnnaBridge 167:84c0a372a020 235 .quad_io_req = q, \
AnnaBridge 167:84c0a372a020 236 .fast_mode = f } }
AnnaBridge 167:84c0a372a020 237
AnnaBridge 167:84c0a372a020 238 #define IOMAN_UART(i, im, cm, rm, ien, cen, ren) { \
AnnaBridge 167:84c0a372a020 239 .req_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->uart0_req) + (i * 2*sizeof(uint32_t))), \
AnnaBridge 167:84c0a372a020 240 .ack_reg = (uint32_t*)((unsigned int)(&MXC_IOMAN->uart0_ack) + (i * 2*sizeof(uint32_t))), \
AnnaBridge 167:84c0a372a020 241 .req_val.uart = { .io_map = im, \
AnnaBridge 167:84c0a372a020 242 .cts_map = cm, \
AnnaBridge 167:84c0a372a020 243 .rts_map = rm, \
AnnaBridge 167:84c0a372a020 244 .io_req = ien, \
AnnaBridge 167:84c0a372a020 245 .cts_io_req = cen, \
AnnaBridge 167:84c0a372a020 246 .rts_io_req = ren } }
AnnaBridge 167:84c0a372a020 247
AnnaBridge 167:84c0a372a020 248 #define IOMAN_I2CM0(c, p) { \
AnnaBridge 167:84c0a372a020 249 .req_reg = &MXC_IOMAN->i2cm0_req, \
AnnaBridge 167:84c0a372a020 250 .ack_reg = &MXC_IOMAN->i2cm0_ack, \
AnnaBridge 167:84c0a372a020 251 .req_val.i2cm0 = { .core_io_req = c, \
AnnaBridge 167:84c0a372a020 252 .push_pull = p } }
AnnaBridge 167:84c0a372a020 253
AnnaBridge 167:84c0a372a020 254 #define IOMAN_I2CM1(c, p) { \
AnnaBridge 167:84c0a372a020 255 .req_reg = &MXC_IOMAN->i2cm1_req, \
AnnaBridge 167:84c0a372a020 256 .ack_reg = &MXC_IOMAN->i2cm1_ack, \
AnnaBridge 167:84c0a372a020 257 .req_val.i2cm1 = { .core_io_req = c, \
AnnaBridge 167:84c0a372a020 258 .push_pull = p } }
AnnaBridge 167:84c0a372a020 259
AnnaBridge 167:84c0a372a020 260 #define IOMAN_I2CM2(c, p) { \
AnnaBridge 167:84c0a372a020 261 .req_reg = &MXC_IOMAN->i2cm2_req, \
AnnaBridge 167:84c0a372a020 262 .ack_reg = &MXC_IOMAN->i2cm2_ack, \
AnnaBridge 167:84c0a372a020 263 .req_val.i2cm2 = { .core_io_req = c, \
AnnaBridge 167:84c0a372a020 264 .push_pull = p } }
AnnaBridge 167:84c0a372a020 265
AnnaBridge 167:84c0a372a020 266 #define IOMAN_I2CS(m, ien) { \
AnnaBridge 167:84c0a372a020 267 .req_reg = &MXC_IOMAN->i2cs_req, \
AnnaBridge 167:84c0a372a020 268 .ack_reg = &MXC_IOMAN->i2cs_ack, \
AnnaBridge 167:84c0a372a020 269 .req_val.i2cs = { .mapping_req = m, \
AnnaBridge 167:84c0a372a020 270 .core_io_req = ien} }
AnnaBridge 167:84c0a372a020 271
AnnaBridge 167:84c0a372a020 272 #define IOMAN_SPIM0(io, ss0, ss1, ss2, ss3, ss4, q, f) { \
AnnaBridge 167:84c0a372a020 273 .req_reg = &MXC_IOMAN->spim0_req, \
AnnaBridge 167:84c0a372a020 274 .ack_reg = &MXC_IOMAN->spim0_ack, \
AnnaBridge 167:84c0a372a020 275 .req_val.spim0 = { .core_io_req = io, \
AnnaBridge 167:84c0a372a020 276 .ss0_io_req = ss0, \
AnnaBridge 167:84c0a372a020 277 .ss1_io_req = ss1, \
AnnaBridge 167:84c0a372a020 278 .ss2_io_req = ss2, \
AnnaBridge 167:84c0a372a020 279 .ss3_io_req = ss3, \
AnnaBridge 167:84c0a372a020 280 .ss4_io_req = ss4, \
AnnaBridge 167:84c0a372a020 281 .quad_io_req = q, \
AnnaBridge 167:84c0a372a020 282 .fast_mode = f } }
AnnaBridge 167:84c0a372a020 283
AnnaBridge 167:84c0a372a020 284 #define IOMAN_SPIM1(io, ss0, ss1, ss2, q, f) { \
AnnaBridge 167:84c0a372a020 285 .req_reg = &MXC_IOMAN->spim1_req, \
AnnaBridge 167:84c0a372a020 286 .ack_reg = &MXC_IOMAN->spim1_ack, \
AnnaBridge 167:84c0a372a020 287 .req_val.spim1 = { .core_io_req = io, \
AnnaBridge 167:84c0a372a020 288 .ss0_io_req = ss0, \
AnnaBridge 167:84c0a372a020 289 .ss1_io_req = ss1, \
AnnaBridge 167:84c0a372a020 290 .ss2_io_req = ss2, \
AnnaBridge 167:84c0a372a020 291 .quad_io_req = q, \
AnnaBridge 167:84c0a372a020 292 .fast_mode = f } }
AnnaBridge 167:84c0a372a020 293
AnnaBridge 167:84c0a372a020 294 #define IOMAN_SPIM2(m, io, ss0, ss1, ss2, sr0, sr1, q, f) { \
AnnaBridge 167:84c0a372a020 295 .req_reg = &MXC_IOMAN->spim2_req, \
AnnaBridge 167:84c0a372a020 296 .ack_reg = &MXC_IOMAN->spim2_ack, \
AnnaBridge 167:84c0a372a020 297 .req_val.spim2 = { .mapping_req = m, \
AnnaBridge 167:84c0a372a020 298 .core_io_req = io, \
AnnaBridge 167:84c0a372a020 299 .ss0_io_req = ss0, \
AnnaBridge 167:84c0a372a020 300 .ss1_io_req = ss1, \
AnnaBridge 167:84c0a372a020 301 .ss2_io_req = ss2, \
AnnaBridge 167:84c0a372a020 302 .sr0_io_req = sr0, \
AnnaBridge 167:84c0a372a020 303 .sr1_io_req = sr1, \
AnnaBridge 167:84c0a372a020 304 .quad_io_req = q, \
AnnaBridge 167:84c0a372a020 305 .fast_mode = f } }
AnnaBridge 167:84c0a372a020 306
AnnaBridge 167:84c0a372a020 307 #define IOMAN_SPIS(io, q, f) { \
AnnaBridge 167:84c0a372a020 308 .req_reg = &MXC_IOMAN->spis_req, \
AnnaBridge 167:84c0a372a020 309 .ack_reg = &MXC_IOMAN->spis_ack, \
AnnaBridge 167:84c0a372a020 310 .req_val.spis = { .core_io_req = io, \
AnnaBridge 167:84c0a372a020 311 .quad_io_req = q, \
AnnaBridge 167:84c0a372a020 312 .fast_mode = f } }
AnnaBridge 167:84c0a372a020 313
AnnaBridge 167:84c0a372a020 314 #define IOMAN_OWM(io, p) { \
AnnaBridge 167:84c0a372a020 315 .req_reg = &MXC_IOMAN->owm_req, \
AnnaBridge 167:84c0a372a020 316 .ack_reg = &MXC_IOMAN->owm_ack, \
AnnaBridge 167:84c0a372a020 317 .req_val.owm = { .mapping_req = io, \
AnnaBridge 167:84c0a372a020 318 .epu_io_req = p } }
AnnaBridge 167:84c0a372a020 319
AnnaBridge 167:84c0a372a020 320 #ifdef __cplusplus
AnnaBridge 167:84c0a372a020 321 }
AnnaBridge 167:84c0a372a020 322 #endif
AnnaBridge 167:84c0a372a020 323
AnnaBridge 167:84c0a372a020 324 #endif /* _IOMAN_H_ */