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TARGET_NUCLEO_L432KC/TOOLCHAIN_ARM_STD/stm32l4xx_ll_lpuart.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 165:d1b4690b3f8b | 1 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2 | ****************************************************************************** |
AnnaBridge | 165:d1b4690b3f8b | 3 | * @file stm32l4xx_ll_lpuart.h |
AnnaBridge | 165:d1b4690b3f8b | 4 | * @author MCD Application Team |
AnnaBridge | 165:d1b4690b3f8b | 5 | * @brief Header file of LPUART LL module. |
AnnaBridge | 165:d1b4690b3f8b | 6 | ****************************************************************************** |
AnnaBridge | 165:d1b4690b3f8b | 7 | * @attention |
AnnaBridge | 165:d1b4690b3f8b | 8 | * |
AnnaBridge | 165:d1b4690b3f8b | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 165:d1b4690b3f8b | 10 | * |
AnnaBridge | 165:d1b4690b3f8b | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 165:d1b4690b3f8b | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 165:d1b4690b3f8b | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 165:d1b4690b3f8b | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 165:d1b4690b3f8b | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 165:d1b4690b3f8b | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 165:d1b4690b3f8b | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 165:d1b4690b3f8b | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 165:d1b4690b3f8b | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 165:d1b4690b3f8b | 20 | * without specific prior written permission. |
AnnaBridge | 165:d1b4690b3f8b | 21 | * |
AnnaBridge | 165:d1b4690b3f8b | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 165:d1b4690b3f8b | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 165:d1b4690b3f8b | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 165:d1b4690b3f8b | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 165:d1b4690b3f8b | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 165:d1b4690b3f8b | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 165:d1b4690b3f8b | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 165:d1b4690b3f8b | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 165:d1b4690b3f8b | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 165:d1b4690b3f8b | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 165:d1b4690b3f8b | 32 | * |
AnnaBridge | 165:d1b4690b3f8b | 33 | ****************************************************************************** |
AnnaBridge | 165:d1b4690b3f8b | 34 | */ |
AnnaBridge | 165:d1b4690b3f8b | 35 | |
AnnaBridge | 165:d1b4690b3f8b | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 37 | #ifndef __STM32L4xx_LL_LPUART_H |
AnnaBridge | 165:d1b4690b3f8b | 38 | #define __STM32L4xx_LL_LPUART_H |
AnnaBridge | 165:d1b4690b3f8b | 39 | |
AnnaBridge | 165:d1b4690b3f8b | 40 | #ifdef __cplusplus |
AnnaBridge | 165:d1b4690b3f8b | 41 | extern "C" { |
AnnaBridge | 165:d1b4690b3f8b | 42 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 43 | |
AnnaBridge | 165:d1b4690b3f8b | 44 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 45 | #include "stm32l4xx.h" |
AnnaBridge | 165:d1b4690b3f8b | 46 | |
AnnaBridge | 165:d1b4690b3f8b | 47 | /** @addtogroup STM32L4xx_LL_Driver |
AnnaBridge | 165:d1b4690b3f8b | 48 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 49 | */ |
AnnaBridge | 165:d1b4690b3f8b | 50 | |
AnnaBridge | 165:d1b4690b3f8b | 51 | #if defined (LPUART1) |
AnnaBridge | 165:d1b4690b3f8b | 52 | |
AnnaBridge | 165:d1b4690b3f8b | 53 | /** @defgroup LPUART_LL LPUART |
AnnaBridge | 165:d1b4690b3f8b | 54 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 55 | */ |
AnnaBridge | 165:d1b4690b3f8b | 56 | |
AnnaBridge | 165:d1b4690b3f8b | 57 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 58 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 59 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 60 | /** @defgroup LPUART_LL_Private_Variables LPUART Private Variables |
AnnaBridge | 165:d1b4690b3f8b | 61 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 62 | */ |
AnnaBridge | 165:d1b4690b3f8b | 63 | /* Array used to get the LPUART prescaler division decimal values versus @ref LPUART_LL_EC_PRESCALER values */ |
AnnaBridge | 165:d1b4690b3f8b | 64 | static const uint16_t LPUART_PRESCALER_TAB[] = |
AnnaBridge | 165:d1b4690b3f8b | 65 | { |
AnnaBridge | 165:d1b4690b3f8b | 66 | (uint16_t)1, |
AnnaBridge | 165:d1b4690b3f8b | 67 | (uint16_t)2, |
AnnaBridge | 165:d1b4690b3f8b | 68 | (uint16_t)4, |
AnnaBridge | 165:d1b4690b3f8b | 69 | (uint16_t)6, |
AnnaBridge | 165:d1b4690b3f8b | 70 | (uint16_t)8, |
AnnaBridge | 165:d1b4690b3f8b | 71 | (uint16_t)10, |
AnnaBridge | 165:d1b4690b3f8b | 72 | (uint16_t)12, |
AnnaBridge | 165:d1b4690b3f8b | 73 | (uint16_t)16, |
AnnaBridge | 165:d1b4690b3f8b | 74 | (uint16_t)32, |
AnnaBridge | 165:d1b4690b3f8b | 75 | (uint16_t)64, |
AnnaBridge | 165:d1b4690b3f8b | 76 | (uint16_t)128, |
AnnaBridge | 165:d1b4690b3f8b | 77 | (uint16_t)256 |
AnnaBridge | 165:d1b4690b3f8b | 78 | }; |
AnnaBridge | 165:d1b4690b3f8b | 79 | /** |
AnnaBridge | 165:d1b4690b3f8b | 80 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 81 | */ |
AnnaBridge | 165:d1b4690b3f8b | 82 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 83 | |
AnnaBridge | 165:d1b4690b3f8b | 84 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 85 | /** @defgroup LPUART_LL_Private_Constants LPUART Private Constants |
AnnaBridge | 165:d1b4690b3f8b | 86 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 87 | */ |
AnnaBridge | 165:d1b4690b3f8b | 88 | /* Defines used in Baud Rate related macros and corresponding register setting computation */ |
AnnaBridge | 165:d1b4690b3f8b | 89 | #define LPUART_LPUARTDIV_FREQ_MUL 256U |
AnnaBridge | 165:d1b4690b3f8b | 90 | #define LPUART_BRR_MASK 0x000FFFFFU |
AnnaBridge | 165:d1b4690b3f8b | 91 | #define LPUART_BRR_MIN_VALUE 0x00000300U |
AnnaBridge | 165:d1b4690b3f8b | 92 | /** |
AnnaBridge | 165:d1b4690b3f8b | 93 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 94 | */ |
AnnaBridge | 165:d1b4690b3f8b | 95 | |
AnnaBridge | 165:d1b4690b3f8b | 96 | |
AnnaBridge | 165:d1b4690b3f8b | 97 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 98 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 165:d1b4690b3f8b | 99 | /** @defgroup LPUART_LL_Private_Macros LPUART Private Macros |
AnnaBridge | 165:d1b4690b3f8b | 100 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 101 | */ |
AnnaBridge | 165:d1b4690b3f8b | 102 | /** |
AnnaBridge | 165:d1b4690b3f8b | 103 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 104 | */ |
AnnaBridge | 165:d1b4690b3f8b | 105 | #endif /*USE_FULL_LL_DRIVER*/ |
AnnaBridge | 165:d1b4690b3f8b | 106 | |
AnnaBridge | 165:d1b4690b3f8b | 107 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 108 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 165:d1b4690b3f8b | 109 | /** @defgroup LPUART_LL_ES_INIT LPUART Exported Init structures |
AnnaBridge | 165:d1b4690b3f8b | 110 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 111 | */ |
AnnaBridge | 165:d1b4690b3f8b | 112 | |
AnnaBridge | 165:d1b4690b3f8b | 113 | /** |
AnnaBridge | 165:d1b4690b3f8b | 114 | * @brief LL LPUART Init Structure definition |
AnnaBridge | 165:d1b4690b3f8b | 115 | */ |
AnnaBridge | 165:d1b4690b3f8b | 116 | typedef struct |
AnnaBridge | 165:d1b4690b3f8b | 117 | { |
AnnaBridge | 165:d1b4690b3f8b | 118 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 119 | uint32_t PrescalerValue; /*!< Specifies the Prescaler to compute the communication baud rate. |
AnnaBridge | 165:d1b4690b3f8b | 120 | This parameter can be a value of @ref LPUART_LL_EC_PRESCALER. |
AnnaBridge | 165:d1b4690b3f8b | 121 | |
AnnaBridge | 165:d1b4690b3f8b | 122 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetPrescaler().*/ |
AnnaBridge | 165:d1b4690b3f8b | 123 | |
AnnaBridge | 165:d1b4690b3f8b | 124 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 125 | uint32_t BaudRate; /*!< This field defines expected LPUART communication baud rate. |
AnnaBridge | 165:d1b4690b3f8b | 126 | |
AnnaBridge | 165:d1b4690b3f8b | 127 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetBaudRate().*/ |
AnnaBridge | 165:d1b4690b3f8b | 128 | |
AnnaBridge | 165:d1b4690b3f8b | 129 | uint32_t DataWidth; /*!< Specifies the number of data bits transmitted or received in a frame. |
AnnaBridge | 165:d1b4690b3f8b | 130 | This parameter can be a value of @ref LPUART_LL_EC_DATAWIDTH. |
AnnaBridge | 165:d1b4690b3f8b | 131 | |
AnnaBridge | 165:d1b4690b3f8b | 132 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetDataWidth().*/ |
AnnaBridge | 165:d1b4690b3f8b | 133 | |
AnnaBridge | 165:d1b4690b3f8b | 134 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
AnnaBridge | 165:d1b4690b3f8b | 135 | This parameter can be a value of @ref LPUART_LL_EC_STOPBITS. |
AnnaBridge | 165:d1b4690b3f8b | 136 | |
AnnaBridge | 165:d1b4690b3f8b | 137 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetStopBitsLength().*/ |
AnnaBridge | 165:d1b4690b3f8b | 138 | |
AnnaBridge | 165:d1b4690b3f8b | 139 | uint32_t Parity; /*!< Specifies the parity mode. |
AnnaBridge | 165:d1b4690b3f8b | 140 | This parameter can be a value of @ref LPUART_LL_EC_PARITY. |
AnnaBridge | 165:d1b4690b3f8b | 141 | |
AnnaBridge | 165:d1b4690b3f8b | 142 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetParity().*/ |
AnnaBridge | 165:d1b4690b3f8b | 143 | |
AnnaBridge | 165:d1b4690b3f8b | 144 | uint32_t TransferDirection; /*!< Specifies whether the Receive and/or Transmit mode is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 145 | This parameter can be a value of @ref LPUART_LL_EC_DIRECTION. |
AnnaBridge | 165:d1b4690b3f8b | 146 | |
AnnaBridge | 165:d1b4690b3f8b | 147 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetTransferDirection().*/ |
AnnaBridge | 165:d1b4690b3f8b | 148 | |
AnnaBridge | 165:d1b4690b3f8b | 149 | uint32_t HardwareFlowControl; /*!< Specifies whether the hardware flow control mode is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 150 | This parameter can be a value of @ref LPUART_LL_EC_HWCONTROL. |
AnnaBridge | 165:d1b4690b3f8b | 151 | |
AnnaBridge | 165:d1b4690b3f8b | 152 | This feature can be modified afterwards using unitary function @ref LL_LPUART_SetHWFlowCtrl().*/ |
AnnaBridge | 165:d1b4690b3f8b | 153 | |
AnnaBridge | 165:d1b4690b3f8b | 154 | } LL_LPUART_InitTypeDef; |
AnnaBridge | 165:d1b4690b3f8b | 155 | |
AnnaBridge | 165:d1b4690b3f8b | 156 | /** |
AnnaBridge | 165:d1b4690b3f8b | 157 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 158 | */ |
AnnaBridge | 165:d1b4690b3f8b | 159 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 165:d1b4690b3f8b | 160 | |
AnnaBridge | 165:d1b4690b3f8b | 161 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 162 | /** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants |
AnnaBridge | 165:d1b4690b3f8b | 163 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 164 | */ |
AnnaBridge | 165:d1b4690b3f8b | 165 | |
AnnaBridge | 165:d1b4690b3f8b | 166 | /** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines |
AnnaBridge | 165:d1b4690b3f8b | 167 | * @brief Flags defines which can be used with LL_LPUART_WriteReg function |
AnnaBridge | 165:d1b4690b3f8b | 168 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 169 | */ |
AnnaBridge | 165:d1b4690b3f8b | 170 | #define LL_LPUART_ICR_PECF USART_ICR_PECF /*!< Parity error flag */ |
AnnaBridge | 165:d1b4690b3f8b | 171 | #define LL_LPUART_ICR_FECF USART_ICR_FECF /*!< Framing error flag */ |
AnnaBridge | 165:d1b4690b3f8b | 172 | #define LL_LPUART_ICR_NCF USART_ICR_NCF /*!< Noise detected flag */ |
AnnaBridge | 165:d1b4690b3f8b | 173 | #define LL_LPUART_ICR_ORECF USART_ICR_ORECF /*!< Overrun error flag */ |
AnnaBridge | 165:d1b4690b3f8b | 174 | #define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF /*!< Idle line detected flag */ |
AnnaBridge | 165:d1b4690b3f8b | 175 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 176 | #define LL_LPUART_ICR_TXFECF USART_ICR_TXFECF /*!< TX FIFO Empty Clear flag */ |
AnnaBridge | 165:d1b4690b3f8b | 177 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 178 | #define LL_LPUART_ICR_TCCF USART_ICR_TCCF /*!< Transmission complete flag */ |
AnnaBridge | 165:d1b4690b3f8b | 179 | #define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF /*!< CTS flag */ |
AnnaBridge | 165:d1b4690b3f8b | 180 | #define LL_LPUART_ICR_CMCF USART_ICR_CMCF /*!< Character match flag */ |
AnnaBridge | 165:d1b4690b3f8b | 181 | #define LL_LPUART_ICR_WUCF USART_ICR_WUCF /*!< Wakeup from Stop mode flag */ |
AnnaBridge | 165:d1b4690b3f8b | 182 | /** |
AnnaBridge | 165:d1b4690b3f8b | 183 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 184 | */ |
AnnaBridge | 165:d1b4690b3f8b | 185 | |
AnnaBridge | 165:d1b4690b3f8b | 186 | /** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines |
AnnaBridge | 165:d1b4690b3f8b | 187 | * @brief Flags defines which can be used with LL_LPUART_ReadReg function |
AnnaBridge | 165:d1b4690b3f8b | 188 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 189 | */ |
AnnaBridge | 165:d1b4690b3f8b | 190 | #define LL_LPUART_ISR_PE USART_ISR_PE /*!< Parity error flag */ |
AnnaBridge | 165:d1b4690b3f8b | 191 | #define LL_LPUART_ISR_FE USART_ISR_FE /*!< Framing error flag */ |
AnnaBridge | 165:d1b4690b3f8b | 192 | #define LL_LPUART_ISR_NE USART_ISR_NE /*!< Noise detected flag */ |
AnnaBridge | 165:d1b4690b3f8b | 193 | #define LL_LPUART_ISR_ORE USART_ISR_ORE /*!< Overrun error flag */ |
AnnaBridge | 165:d1b4690b3f8b | 194 | #define LL_LPUART_ISR_IDLE USART_ISR_IDLE /*!< Idle line detected flag */ |
AnnaBridge | 165:d1b4690b3f8b | 195 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 196 | #define LL_LPUART_ISR_RXNE_RXFNE USART_ISR_RXNE_RXFNE /*!< Read data register or RX FIFO not empty flag */ |
AnnaBridge | 165:d1b4690b3f8b | 197 | #else |
AnnaBridge | 165:d1b4690b3f8b | 198 | #define LL_LPUART_ISR_RXNE USART_ISR_RXNE /*!< Read data register not empty flag */ |
AnnaBridge | 165:d1b4690b3f8b | 199 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 200 | #define LL_LPUART_ISR_TC USART_ISR_TC /*!< Transmission complete flag */ |
AnnaBridge | 165:d1b4690b3f8b | 201 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 202 | #define LL_LPUART_ISR_TXE_TXFNF USART_ISR_TXE_TXFNF /*!< Transmit data register empty or TX FIFO Not Full flag*/ |
AnnaBridge | 165:d1b4690b3f8b | 203 | #else |
AnnaBridge | 165:d1b4690b3f8b | 204 | #define LL_LPUART_ISR_TXE USART_ISR_TXE /*!< Transmit data register empty flag */ |
AnnaBridge | 165:d1b4690b3f8b | 205 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 206 | #define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF /*!< CTS interrupt flag */ |
AnnaBridge | 165:d1b4690b3f8b | 207 | #define LL_LPUART_ISR_CTS USART_ISR_CTS /*!< CTS flag */ |
AnnaBridge | 165:d1b4690b3f8b | 208 | #define LL_LPUART_ISR_BUSY USART_ISR_BUSY /*!< Busy flag */ |
AnnaBridge | 165:d1b4690b3f8b | 209 | #define LL_LPUART_ISR_CMF USART_ISR_CMF /*!< Character match flag */ |
AnnaBridge | 165:d1b4690b3f8b | 210 | #define LL_LPUART_ISR_SBKF USART_ISR_SBKF /*!< Send break flag */ |
AnnaBridge | 165:d1b4690b3f8b | 211 | #define LL_LPUART_ISR_RWU USART_ISR_RWU /*!< Receiver wakeup from Mute mode flag */ |
AnnaBridge | 165:d1b4690b3f8b | 212 | #define LL_LPUART_ISR_WUF USART_ISR_WUF /*!< Wakeup from Stop mode flag */ |
AnnaBridge | 165:d1b4690b3f8b | 213 | #define LL_LPUART_ISR_TEACK USART_ISR_TEACK /*!< Transmit enable acknowledge flag */ |
AnnaBridge | 165:d1b4690b3f8b | 214 | #define LL_LPUART_ISR_REACK USART_ISR_REACK /*!< Receive enable acknowledge flag */ |
AnnaBridge | 165:d1b4690b3f8b | 215 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 216 | #define LL_LPUART_ISR_TXFE USART_ISR_TXFE /*!< TX FIFO empty flag */ |
AnnaBridge | 165:d1b4690b3f8b | 217 | #define LL_LPUART_ISR_RXFF USART_ISR_RXFF /*!< RX FIFO full flag */ |
AnnaBridge | 165:d1b4690b3f8b | 218 | #define LL_LPUART_ISR_RXFT USART_ISR_RXFT /*!< RX FIFO threshold flag */ |
AnnaBridge | 165:d1b4690b3f8b | 219 | #define LL_LPUART_ISR_TXFT USART_ISR_TXFT /*!< TX FIFO threshold flag */ |
AnnaBridge | 165:d1b4690b3f8b | 220 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 221 | /** |
AnnaBridge | 165:d1b4690b3f8b | 222 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 223 | */ |
AnnaBridge | 165:d1b4690b3f8b | 224 | |
AnnaBridge | 165:d1b4690b3f8b | 225 | /** @defgroup LPUART_LL_EC_IT IT Defines |
AnnaBridge | 165:d1b4690b3f8b | 226 | * @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions |
AnnaBridge | 165:d1b4690b3f8b | 227 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 228 | */ |
AnnaBridge | 165:d1b4690b3f8b | 229 | #define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE /*!< IDLE interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 230 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 231 | #define LL_LPUART_CR1_RXNEIE_RXFNEIE USART_CR1_RXNEIE_RXFNEIE /*!< Read data register and RXFIFO not empty interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 232 | #else |
AnnaBridge | 165:d1b4690b3f8b | 233 | #define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE /*!< Read data register not empty interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 234 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 235 | #define LL_LPUART_CR1_TCIE USART_CR1_TCIE /*!< Transmission complete interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 236 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 237 | #define LL_LPUART_CR1_TXEIE_TXFNFIE USART_CR1_TXEIE_TXFNFIE /*!< Transmit data register empty and TX FIFO not full interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 238 | #else |
AnnaBridge | 165:d1b4690b3f8b | 239 | #define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE /*!< Transmit data register empty interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 240 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 241 | #define LL_LPUART_CR1_PEIE USART_CR1_PEIE /*!< Parity error */ |
AnnaBridge | 165:d1b4690b3f8b | 242 | #define LL_LPUART_CR1_CMIE USART_CR1_CMIE /*!< Character match interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 243 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 244 | #define LL_LPUART_CR1_TXFEIE USART_CR1_TXFEIE /*!< TX FIFO empty interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 245 | #define LL_LPUART_CR1_RXFFIE USART_CR1_RXFFIE /*!< RX FIFO full interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 246 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 247 | #define LL_LPUART_CR3_EIE USART_CR3_EIE /*!< Error interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 248 | #define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE /*!< CTS interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 249 | #define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE /*!< Wakeup from Stop mode interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 250 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 251 | #define LL_LPUART_CR3_TXFTIE USART_CR3_TXFTIE /*!< TX FIFO threshold interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 252 | #define LL_LPUART_CR3_RXFTIE USART_CR3_RXFTIE /*!< RX FIFO threshold interrupt enable */ |
AnnaBridge | 165:d1b4690b3f8b | 253 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 254 | /** |
AnnaBridge | 165:d1b4690b3f8b | 255 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 256 | */ |
AnnaBridge | 165:d1b4690b3f8b | 257 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 258 | |
AnnaBridge | 165:d1b4690b3f8b | 259 | /** @defgroup LPUART_LL_EC_FIFOTHRESHOLD FIFO Threshold |
AnnaBridge | 165:d1b4690b3f8b | 260 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 261 | */ |
AnnaBridge | 165:d1b4690b3f8b | 262 | #define LL_LPUART_FIFOTHRESHOLD_1_8 0x00000000U /*!< FIFO reaches 1/8 of its depth */ |
AnnaBridge | 165:d1b4690b3f8b | 263 | #define LL_LPUART_FIFOTHRESHOLD_1_4 0x00000001U /*!< FIFO reaches 1/4 of its depth */ |
AnnaBridge | 165:d1b4690b3f8b | 264 | #define LL_LPUART_FIFOTHRESHOLD_1_2 0x00000002U /*!< FIFO reaches 1/2 of its depth */ |
AnnaBridge | 165:d1b4690b3f8b | 265 | #define LL_LPUART_FIFOTHRESHOLD_3_4 0x00000003U /*!< FIFO reaches 3/4 of its depth */ |
AnnaBridge | 165:d1b4690b3f8b | 266 | #define LL_LPUART_FIFOTHRESHOLD_7_8 0x00000004U /*!< FIFO reaches 7/8 of its depth */ |
AnnaBridge | 165:d1b4690b3f8b | 267 | #define LL_LPUART_FIFOTHRESHOLD_8_8 0x00000005U /*!< FIFO becomes empty for TX and full for RX */ |
AnnaBridge | 165:d1b4690b3f8b | 268 | /** |
AnnaBridge | 165:d1b4690b3f8b | 269 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 270 | */ |
AnnaBridge | 165:d1b4690b3f8b | 271 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 272 | |
AnnaBridge | 165:d1b4690b3f8b | 273 | /** @defgroup LPUART_LL_EC_DIRECTION Direction |
AnnaBridge | 165:d1b4690b3f8b | 274 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 275 | */ |
AnnaBridge | 165:d1b4690b3f8b | 276 | #define LL_LPUART_DIRECTION_NONE 0x00000000U /*!< Transmitter and Receiver are disabled */ |
AnnaBridge | 165:d1b4690b3f8b | 277 | #define LL_LPUART_DIRECTION_RX USART_CR1_RE /*!< Transmitter is disabled and Receiver is enabled */ |
AnnaBridge | 165:d1b4690b3f8b | 278 | #define LL_LPUART_DIRECTION_TX USART_CR1_TE /*!< Transmitter is enabled and Receiver is disabled */ |
AnnaBridge | 165:d1b4690b3f8b | 279 | #define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< Transmitter and Receiver are enabled */ |
AnnaBridge | 165:d1b4690b3f8b | 280 | /** |
AnnaBridge | 165:d1b4690b3f8b | 281 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 282 | */ |
AnnaBridge | 165:d1b4690b3f8b | 283 | |
AnnaBridge | 165:d1b4690b3f8b | 284 | /** @defgroup LPUART_LL_EC_PARITY Parity Control |
AnnaBridge | 165:d1b4690b3f8b | 285 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 286 | */ |
AnnaBridge | 165:d1b4690b3f8b | 287 | #define LL_LPUART_PARITY_NONE 0x00000000U /*!< Parity control disabled */ |
AnnaBridge | 165:d1b4690b3f8b | 288 | #define LL_LPUART_PARITY_EVEN USART_CR1_PCE /*!< Parity control enabled and Even Parity is selected */ |
AnnaBridge | 165:d1b4690b3f8b | 289 | #define LL_LPUART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Parity control enabled and Odd Parity is selected */ |
AnnaBridge | 165:d1b4690b3f8b | 290 | /** |
AnnaBridge | 165:d1b4690b3f8b | 291 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 292 | */ |
AnnaBridge | 165:d1b4690b3f8b | 293 | |
AnnaBridge | 165:d1b4690b3f8b | 294 | /** @defgroup LPUART_LL_EC_WAKEUP Wakeup |
AnnaBridge | 165:d1b4690b3f8b | 295 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 296 | */ |
AnnaBridge | 165:d1b4690b3f8b | 297 | #define LL_LPUART_WAKEUP_IDLELINE 0x00000000U /*!< LPUART wake up from Mute mode on Idle Line */ |
AnnaBridge | 165:d1b4690b3f8b | 298 | #define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /*!< LPUART wake up from Mute mode on Address Mark */ |
AnnaBridge | 165:d1b4690b3f8b | 299 | /** |
AnnaBridge | 165:d1b4690b3f8b | 300 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 301 | */ |
AnnaBridge | 165:d1b4690b3f8b | 302 | |
AnnaBridge | 165:d1b4690b3f8b | 303 | /** @defgroup LPUART_LL_EC_DATAWIDTH Datawidth |
AnnaBridge | 165:d1b4690b3f8b | 304 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 305 | */ |
AnnaBridge | 165:d1b4690b3f8b | 306 | #define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /*!< 7 bits word length : Start bit, 7 data bits, n stop bits */ |
AnnaBridge | 165:d1b4690b3f8b | 307 | #define LL_LPUART_DATAWIDTH_8B 0x00000000U /*!< 8 bits word length : Start bit, 8 data bits, n stop bits */ |
AnnaBridge | 165:d1b4690b3f8b | 308 | #define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /*!< 9 bits word length : Start bit, 9 data bits, n stop bits */ |
AnnaBridge | 165:d1b4690b3f8b | 309 | /** |
AnnaBridge | 165:d1b4690b3f8b | 310 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 311 | */ |
AnnaBridge | 165:d1b4690b3f8b | 312 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 313 | |
AnnaBridge | 165:d1b4690b3f8b | 314 | /** @defgroup LPUART_LL_EC_PRESCALER Clock Source Prescaler |
AnnaBridge | 165:d1b4690b3f8b | 315 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 316 | */ |
AnnaBridge | 165:d1b4690b3f8b | 317 | #define LL_LPUART_PRESCALER_DIV1 0x00000000U /*!< Input clock not devided */ |
AnnaBridge | 165:d1b4690b3f8b | 318 | #define LL_LPUART_PRESCALER_DIV2 (USART_PRESC_PRESCALER_0) /*!< Input clock devided by 2 */ |
AnnaBridge | 165:d1b4690b3f8b | 319 | #define LL_LPUART_PRESCALER_DIV4 (USART_PRESC_PRESCALER_1) /*!< Input clock devided by 4 */ |
AnnaBridge | 165:d1b4690b3f8b | 320 | #define LL_LPUART_PRESCALER_DIV6 (USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 6 */ |
AnnaBridge | 165:d1b4690b3f8b | 321 | #define LL_LPUART_PRESCALER_DIV8 (USART_PRESC_PRESCALER_2) /*!< Input clock devided by 8 */ |
AnnaBridge | 165:d1b4690b3f8b | 322 | #define LL_LPUART_PRESCALER_DIV10 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 10 */ |
AnnaBridge | 165:d1b4690b3f8b | 323 | #define LL_LPUART_PRESCALER_DIV12 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1) /*!< Input clock devided by 12 */ |
AnnaBridge | 165:d1b4690b3f8b | 324 | #define LL_LPUART_PRESCALER_DIV16 (USART_PRESC_PRESCALER_2 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 16 */ |
AnnaBridge | 165:d1b4690b3f8b | 325 | #define LL_LPUART_PRESCALER_DIV32 (USART_PRESC_PRESCALER_3) /*!< Input clock devided by 32 */ |
AnnaBridge | 165:d1b4690b3f8b | 326 | #define LL_LPUART_PRESCALER_DIV64 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 64 */ |
AnnaBridge | 165:d1b4690b3f8b | 327 | #define LL_LPUART_PRESCALER_DIV128 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1) /*!< Input clock devided by 128 */ |
AnnaBridge | 165:d1b4690b3f8b | 328 | #define LL_LPUART_PRESCALER_DIV256 (USART_PRESC_PRESCALER_3 | USART_PRESC_PRESCALER_1 | USART_PRESC_PRESCALER_0) /*!< Input clock devided by 256 */ |
AnnaBridge | 165:d1b4690b3f8b | 329 | /** |
AnnaBridge | 165:d1b4690b3f8b | 330 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 331 | */ |
AnnaBridge | 165:d1b4690b3f8b | 332 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 333 | |
AnnaBridge | 165:d1b4690b3f8b | 334 | /** @defgroup LPUART_LL_EC_STOPBITS Stop Bits |
AnnaBridge | 165:d1b4690b3f8b | 335 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 336 | */ |
AnnaBridge | 165:d1b4690b3f8b | 337 | #define LL_LPUART_STOPBITS_1 0x00000000U /*!< 1 stop bit */ |
AnnaBridge | 165:d1b4690b3f8b | 338 | #define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /*!< 2 stop bits */ |
AnnaBridge | 165:d1b4690b3f8b | 339 | /** |
AnnaBridge | 165:d1b4690b3f8b | 340 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 341 | */ |
AnnaBridge | 165:d1b4690b3f8b | 342 | |
AnnaBridge | 165:d1b4690b3f8b | 343 | /** @defgroup LPUART_LL_EC_TXRX TX RX Pins Swap |
AnnaBridge | 165:d1b4690b3f8b | 344 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 345 | */ |
AnnaBridge | 165:d1b4690b3f8b | 346 | #define LL_LPUART_TXRX_STANDARD 0x00000000U /*!< TX/RX pins are used as defined in standard pinout */ |
AnnaBridge | 165:d1b4690b3f8b | 347 | #define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /*!< TX and RX pins functions are swapped. */ |
AnnaBridge | 165:d1b4690b3f8b | 348 | /** |
AnnaBridge | 165:d1b4690b3f8b | 349 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 350 | */ |
AnnaBridge | 165:d1b4690b3f8b | 351 | |
AnnaBridge | 165:d1b4690b3f8b | 352 | /** @defgroup LPUART_LL_EC_RXPIN_LEVEL RX Pin Active Level Inversion |
AnnaBridge | 165:d1b4690b3f8b | 353 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 354 | */ |
AnnaBridge | 165:d1b4690b3f8b | 355 | #define LL_LPUART_RXPIN_LEVEL_STANDARD 0x00000000U /*!< RX pin signal works using the standard logic levels */ |
AnnaBridge | 165:d1b4690b3f8b | 356 | #define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /*!< RX pin signal values are inverted. */ |
AnnaBridge | 165:d1b4690b3f8b | 357 | /** |
AnnaBridge | 165:d1b4690b3f8b | 358 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 359 | */ |
AnnaBridge | 165:d1b4690b3f8b | 360 | |
AnnaBridge | 165:d1b4690b3f8b | 361 | /** @defgroup LPUART_LL_EC_TXPIN_LEVEL TX Pin Active Level Inversion |
AnnaBridge | 165:d1b4690b3f8b | 362 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 363 | */ |
AnnaBridge | 165:d1b4690b3f8b | 364 | #define LL_LPUART_TXPIN_LEVEL_STANDARD 0x00000000U /*!< TX pin signal works using the standard logic levels */ |
AnnaBridge | 165:d1b4690b3f8b | 365 | #define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /*!< TX pin signal values are inverted. */ |
AnnaBridge | 165:d1b4690b3f8b | 366 | /** |
AnnaBridge | 165:d1b4690b3f8b | 367 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 368 | */ |
AnnaBridge | 165:d1b4690b3f8b | 369 | |
AnnaBridge | 165:d1b4690b3f8b | 370 | /** @defgroup LPUART_LL_EC_BINARY_LOGIC Binary Data Inversion |
AnnaBridge | 165:d1b4690b3f8b | 371 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 372 | */ |
AnnaBridge | 165:d1b4690b3f8b | 373 | #define LL_LPUART_BINARY_LOGIC_POSITIVE 0x00000000U /*!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) */ |
AnnaBridge | 165:d1b4690b3f8b | 374 | #define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /*!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. */ |
AnnaBridge | 165:d1b4690b3f8b | 375 | /** |
AnnaBridge | 165:d1b4690b3f8b | 376 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 377 | */ |
AnnaBridge | 165:d1b4690b3f8b | 378 | |
AnnaBridge | 165:d1b4690b3f8b | 379 | /** @defgroup LPUART_LL_EC_BITORDER Bit Order |
AnnaBridge | 165:d1b4690b3f8b | 380 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 381 | */ |
AnnaBridge | 165:d1b4690b3f8b | 382 | #define LL_LPUART_BITORDER_LSBFIRST 0x00000000U /*!< data is transmitted/received with data bit 0 first, following the start bit */ |
AnnaBridge | 165:d1b4690b3f8b | 383 | #define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /*!< data is transmitted/received with the MSB first, following the start bit */ |
AnnaBridge | 165:d1b4690b3f8b | 384 | /** |
AnnaBridge | 165:d1b4690b3f8b | 385 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 386 | */ |
AnnaBridge | 165:d1b4690b3f8b | 387 | |
AnnaBridge | 165:d1b4690b3f8b | 388 | /** @defgroup LPUART_LL_EC_ADDRESS_DETECT Address Length Detection |
AnnaBridge | 165:d1b4690b3f8b | 389 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 390 | */ |
AnnaBridge | 165:d1b4690b3f8b | 391 | #define LL_LPUART_ADDRESS_DETECT_4B 0x00000000U /*!< 4-bit address detection method selected */ |
AnnaBridge | 165:d1b4690b3f8b | 392 | #define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /*!< 7-bit address detection (in 8-bit data mode) method selected */ |
AnnaBridge | 165:d1b4690b3f8b | 393 | /** |
AnnaBridge | 165:d1b4690b3f8b | 394 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 395 | */ |
AnnaBridge | 165:d1b4690b3f8b | 396 | |
AnnaBridge | 165:d1b4690b3f8b | 397 | /** @defgroup LPUART_LL_EC_HWCONTROL Hardware Control |
AnnaBridge | 165:d1b4690b3f8b | 398 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 399 | */ |
AnnaBridge | 165:d1b4690b3f8b | 400 | #define LL_LPUART_HWCONTROL_NONE 0x00000000U /*!< CTS and RTS hardware flow control disabled */ |
AnnaBridge | 165:d1b4690b3f8b | 401 | #define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /*!< RTS output enabled, data is only requested when there is space in the receive buffer */ |
AnnaBridge | 165:d1b4690b3f8b | 402 | #define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /*!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) */ |
AnnaBridge | 165:d1b4690b3f8b | 403 | #define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< CTS and RTS hardware flow control enabled */ |
AnnaBridge | 165:d1b4690b3f8b | 404 | /** |
AnnaBridge | 165:d1b4690b3f8b | 405 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 406 | */ |
AnnaBridge | 165:d1b4690b3f8b | 407 | |
AnnaBridge | 165:d1b4690b3f8b | 408 | /** @defgroup LPUART_LL_EC_WAKEUP_ON Wakeup Activation |
AnnaBridge | 165:d1b4690b3f8b | 409 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 410 | */ |
AnnaBridge | 165:d1b4690b3f8b | 411 | #define LL_LPUART_WAKEUP_ON_ADDRESS 0x00000000U /*!< Wake up active on address match */ |
AnnaBridge | 165:d1b4690b3f8b | 412 | #define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< Wake up active on Start bit detection */ |
AnnaBridge | 165:d1b4690b3f8b | 413 | #define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 | USART_CR3_WUS_1) /*!< Wake up active on RXNE */ |
AnnaBridge | 165:d1b4690b3f8b | 414 | /** |
AnnaBridge | 165:d1b4690b3f8b | 415 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 416 | */ |
AnnaBridge | 165:d1b4690b3f8b | 417 | |
AnnaBridge | 165:d1b4690b3f8b | 418 | /** @defgroup LPUART_LL_EC_DE_POLARITY Driver Enable Polarity |
AnnaBridge | 165:d1b4690b3f8b | 419 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 420 | */ |
AnnaBridge | 165:d1b4690b3f8b | 421 | #define LL_LPUART_DE_POLARITY_HIGH 0x00000000U /*!< DE signal is active high */ |
AnnaBridge | 165:d1b4690b3f8b | 422 | #define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /*!< DE signal is active low */ |
AnnaBridge | 165:d1b4690b3f8b | 423 | /** |
AnnaBridge | 165:d1b4690b3f8b | 424 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 425 | */ |
AnnaBridge | 165:d1b4690b3f8b | 426 | |
AnnaBridge | 165:d1b4690b3f8b | 427 | /** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA Register Data |
AnnaBridge | 165:d1b4690b3f8b | 428 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 429 | */ |
AnnaBridge | 165:d1b4690b3f8b | 430 | #define LL_LPUART_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ |
AnnaBridge | 165:d1b4690b3f8b | 431 | #define LL_LPUART_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ |
AnnaBridge | 165:d1b4690b3f8b | 432 | /** |
AnnaBridge | 165:d1b4690b3f8b | 433 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 434 | */ |
AnnaBridge | 165:d1b4690b3f8b | 435 | |
AnnaBridge | 165:d1b4690b3f8b | 436 | /** |
AnnaBridge | 165:d1b4690b3f8b | 437 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 438 | */ |
AnnaBridge | 165:d1b4690b3f8b | 439 | |
AnnaBridge | 165:d1b4690b3f8b | 440 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 441 | /** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros |
AnnaBridge | 165:d1b4690b3f8b | 442 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 443 | */ |
AnnaBridge | 165:d1b4690b3f8b | 444 | |
AnnaBridge | 165:d1b4690b3f8b | 445 | /** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros |
AnnaBridge | 165:d1b4690b3f8b | 446 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 447 | */ |
AnnaBridge | 165:d1b4690b3f8b | 448 | |
AnnaBridge | 165:d1b4690b3f8b | 449 | /** |
AnnaBridge | 165:d1b4690b3f8b | 450 | * @brief Write a value in LPUART register |
AnnaBridge | 165:d1b4690b3f8b | 451 | * @param __INSTANCE__ LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 452 | * @param __REG__ Register to be written |
AnnaBridge | 165:d1b4690b3f8b | 453 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 165:d1b4690b3f8b | 454 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 455 | */ |
AnnaBridge | 165:d1b4690b3f8b | 456 | #define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
AnnaBridge | 165:d1b4690b3f8b | 457 | |
AnnaBridge | 165:d1b4690b3f8b | 458 | /** |
AnnaBridge | 165:d1b4690b3f8b | 459 | * @brief Read a value in LPUART register |
AnnaBridge | 165:d1b4690b3f8b | 460 | * @param __INSTANCE__ LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 461 | * @param __REG__ Register to be read |
AnnaBridge | 165:d1b4690b3f8b | 462 | * @retval Register value |
AnnaBridge | 165:d1b4690b3f8b | 463 | */ |
AnnaBridge | 165:d1b4690b3f8b | 464 | #define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
AnnaBridge | 165:d1b4690b3f8b | 465 | /** |
AnnaBridge | 165:d1b4690b3f8b | 466 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 467 | */ |
AnnaBridge | 165:d1b4690b3f8b | 468 | |
AnnaBridge | 165:d1b4690b3f8b | 469 | /** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros |
AnnaBridge | 165:d1b4690b3f8b | 470 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 471 | */ |
AnnaBridge | 165:d1b4690b3f8b | 472 | |
AnnaBridge | 165:d1b4690b3f8b | 473 | /** |
AnnaBridge | 165:d1b4690b3f8b | 474 | * @brief Compute LPUARTDIV value according to Peripheral Clock and |
AnnaBridge | 165:d1b4690b3f8b | 475 | * expected Baud Rate (20-bit value of LPUARTDIV is returned) |
AnnaBridge | 165:d1b4690b3f8b | 476 | * @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 477 | @if USART_PRESC_PRESCALER |
AnnaBridge | 165:d1b4690b3f8b | 478 | * @param __PRESCALER__ This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 479 | * @arg @ref LL_LPUART_PRESCALER_DIV1 |
AnnaBridge | 165:d1b4690b3f8b | 480 | * @arg @ref LL_LPUART_PRESCALER_DIV2 |
AnnaBridge | 165:d1b4690b3f8b | 481 | * @arg @ref LL_LPUART_PRESCALER_DIV4 |
AnnaBridge | 165:d1b4690b3f8b | 482 | * @arg @ref LL_LPUART_PRESCALER_DIV6 |
AnnaBridge | 165:d1b4690b3f8b | 483 | * @arg @ref LL_LPUART_PRESCALER_DIV8 |
AnnaBridge | 165:d1b4690b3f8b | 484 | * @arg @ref LL_LPUART_PRESCALER_DIV10 |
AnnaBridge | 165:d1b4690b3f8b | 485 | * @arg @ref LL_LPUART_PRESCALER_DIV12 |
AnnaBridge | 165:d1b4690b3f8b | 486 | * @arg @ref LL_LPUART_PRESCALER_DIV16 |
AnnaBridge | 165:d1b4690b3f8b | 487 | * @arg @ref LL_LPUART_PRESCALER_DIV32 |
AnnaBridge | 165:d1b4690b3f8b | 488 | * @arg @ref LL_LPUART_PRESCALER_DIV64 |
AnnaBridge | 165:d1b4690b3f8b | 489 | * @arg @ref LL_LPUART_PRESCALER_DIV128 |
AnnaBridge | 165:d1b4690b3f8b | 490 | * @arg @ref LL_LPUART_PRESCALER_DIV256 |
AnnaBridge | 165:d1b4690b3f8b | 491 | * @param __PRESCALER__ Prescaler value |
AnnaBridge | 165:d1b4690b3f8b | 492 | @endif |
AnnaBridge | 165:d1b4690b3f8b | 493 | * @param __BAUDRATE__ Baud Rate value to achieve |
AnnaBridge | 165:d1b4690b3f8b | 494 | * @retval LPUARTDIV value to be used for BRR register filling |
AnnaBridge | 165:d1b4690b3f8b | 495 | */ |
AnnaBridge | 165:d1b4690b3f8b | 496 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 497 | #define __LL_LPUART_DIV(__PERIPHCLK__, __PRESCALER__, __BAUDRATE__) ((((((uint64_t)(__PERIPHCLK__)/(uint64_t)(LPUART_PRESCALER_TAB[(__PRESCALER__)]))*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK) |
AnnaBridge | 165:d1b4690b3f8b | 498 | #else |
AnnaBridge | 165:d1b4690b3f8b | 499 | #define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) (((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL) + ((__BAUDRATE__)/2))/(__BAUDRATE__)) & LPUART_BRR_MASK) |
AnnaBridge | 165:d1b4690b3f8b | 500 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 501 | |
AnnaBridge | 165:d1b4690b3f8b | 502 | /** |
AnnaBridge | 165:d1b4690b3f8b | 503 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 504 | */ |
AnnaBridge | 165:d1b4690b3f8b | 505 | |
AnnaBridge | 165:d1b4690b3f8b | 506 | /** |
AnnaBridge | 165:d1b4690b3f8b | 507 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 508 | */ |
AnnaBridge | 165:d1b4690b3f8b | 509 | |
AnnaBridge | 165:d1b4690b3f8b | 510 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 165:d1b4690b3f8b | 511 | /** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions |
AnnaBridge | 165:d1b4690b3f8b | 512 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 513 | */ |
AnnaBridge | 165:d1b4690b3f8b | 514 | |
AnnaBridge | 165:d1b4690b3f8b | 515 | /** @defgroup LPUART_LL_EF_Configuration Configuration functions |
AnnaBridge | 165:d1b4690b3f8b | 516 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 517 | */ |
AnnaBridge | 165:d1b4690b3f8b | 518 | |
AnnaBridge | 165:d1b4690b3f8b | 519 | /** |
AnnaBridge | 165:d1b4690b3f8b | 520 | * @brief LPUART Enable |
AnnaBridge | 165:d1b4690b3f8b | 521 | * @rmtoll CR1 UE LL_LPUART_Enable |
AnnaBridge | 165:d1b4690b3f8b | 522 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 523 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 524 | */ |
AnnaBridge | 165:d1b4690b3f8b | 525 | __STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 526 | { |
AnnaBridge | 165:d1b4690b3f8b | 527 | SET_BIT(LPUARTx->CR1, USART_CR1_UE); |
AnnaBridge | 165:d1b4690b3f8b | 528 | } |
AnnaBridge | 165:d1b4690b3f8b | 529 | |
AnnaBridge | 165:d1b4690b3f8b | 530 | /** |
AnnaBridge | 165:d1b4690b3f8b | 531 | * @brief LPUART Disable |
AnnaBridge | 165:d1b4690b3f8b | 532 | * @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately, |
AnnaBridge | 165:d1b4690b3f8b | 533 | * and current operations are discarded. The configuration of the LPUART is kept, but all the status |
AnnaBridge | 165:d1b4690b3f8b | 534 | * flags, in the LPUARTx_ISR are set to their default values. |
AnnaBridge | 165:d1b4690b3f8b | 535 | * @note In order to go into low-power mode without generating errors on the line, |
AnnaBridge | 165:d1b4690b3f8b | 536 | * the TE bit must be reset before and the software must wait |
AnnaBridge | 165:d1b4690b3f8b | 537 | * for the TC bit in the LPUART_ISR to be set before resetting the UE bit. |
AnnaBridge | 165:d1b4690b3f8b | 538 | * The DMA requests are also reset when UE = 0 so the DMA channel must |
AnnaBridge | 165:d1b4690b3f8b | 539 | * be disabled before resetting the UE bit. |
AnnaBridge | 165:d1b4690b3f8b | 540 | * @rmtoll CR1 UE LL_LPUART_Disable |
AnnaBridge | 165:d1b4690b3f8b | 541 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 542 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 543 | */ |
AnnaBridge | 165:d1b4690b3f8b | 544 | __STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 545 | { |
AnnaBridge | 165:d1b4690b3f8b | 546 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE); |
AnnaBridge | 165:d1b4690b3f8b | 547 | } |
AnnaBridge | 165:d1b4690b3f8b | 548 | |
AnnaBridge | 165:d1b4690b3f8b | 549 | /** |
AnnaBridge | 165:d1b4690b3f8b | 550 | * @brief Indicate if LPUART is enabled |
AnnaBridge | 165:d1b4690b3f8b | 551 | * @rmtoll CR1 UE LL_LPUART_IsEnabled |
AnnaBridge | 165:d1b4690b3f8b | 552 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 553 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 554 | */ |
AnnaBridge | 165:d1b4690b3f8b | 555 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 556 | { |
AnnaBridge | 165:d1b4690b3f8b | 557 | return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE)); |
AnnaBridge | 165:d1b4690b3f8b | 558 | } |
AnnaBridge | 165:d1b4690b3f8b | 559 | |
AnnaBridge | 165:d1b4690b3f8b | 560 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 561 | /** |
AnnaBridge | 165:d1b4690b3f8b | 562 | * @brief FIFO Mode Enable |
AnnaBridge | 165:d1b4690b3f8b | 563 | * @rmtoll CR1 FIFOEN LL_LPUART_EnableFIFO |
AnnaBridge | 165:d1b4690b3f8b | 564 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 565 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 566 | */ |
AnnaBridge | 165:d1b4690b3f8b | 567 | __STATIC_INLINE void LL_LPUART_EnableFIFO(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 568 | { |
AnnaBridge | 165:d1b4690b3f8b | 569 | SET_BIT(LPUARTx->CR1, USART_CR1_FIFOEN); |
AnnaBridge | 165:d1b4690b3f8b | 570 | } |
AnnaBridge | 165:d1b4690b3f8b | 571 | |
AnnaBridge | 165:d1b4690b3f8b | 572 | /** |
AnnaBridge | 165:d1b4690b3f8b | 573 | * @brief FIFO Mode Disable |
AnnaBridge | 165:d1b4690b3f8b | 574 | * @rmtoll CR1 FIFOEN LL_LPUART_DisableFIFO |
AnnaBridge | 165:d1b4690b3f8b | 575 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 576 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 577 | */ |
AnnaBridge | 165:d1b4690b3f8b | 578 | __STATIC_INLINE void LL_LPUART_DisableFIFO(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 579 | { |
AnnaBridge | 165:d1b4690b3f8b | 580 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_FIFOEN); |
AnnaBridge | 165:d1b4690b3f8b | 581 | } |
AnnaBridge | 165:d1b4690b3f8b | 582 | |
AnnaBridge | 165:d1b4690b3f8b | 583 | /** |
AnnaBridge | 165:d1b4690b3f8b | 584 | * @brief Indicate if FIFO Mode is enabled |
AnnaBridge | 165:d1b4690b3f8b | 585 | * @rmtoll CR1 FIFOEN LL_LPUART_IsEnabledFIFO |
AnnaBridge | 165:d1b4690b3f8b | 586 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 587 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 588 | */ |
AnnaBridge | 165:d1b4690b3f8b | 589 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledFIFO(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 590 | { |
AnnaBridge | 165:d1b4690b3f8b | 591 | return (READ_BIT(LPUARTx->CR1, USART_CR1_FIFOEN) == (USART_CR1_FIFOEN)); |
AnnaBridge | 165:d1b4690b3f8b | 592 | } |
AnnaBridge | 165:d1b4690b3f8b | 593 | |
AnnaBridge | 165:d1b4690b3f8b | 594 | /** |
AnnaBridge | 165:d1b4690b3f8b | 595 | * @brief Configure TX FIFO Threshold |
AnnaBridge | 165:d1b4690b3f8b | 596 | * @rmtoll CR3 TXFTCFG LL_LPUART_SetTXFIFOThreshold |
AnnaBridge | 165:d1b4690b3f8b | 597 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 598 | * @param Threshold This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 599 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 |
AnnaBridge | 165:d1b4690b3f8b | 600 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 |
AnnaBridge | 165:d1b4690b3f8b | 601 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 |
AnnaBridge | 165:d1b4690b3f8b | 602 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 |
AnnaBridge | 165:d1b4690b3f8b | 603 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 |
AnnaBridge | 165:d1b4690b3f8b | 604 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 |
AnnaBridge | 165:d1b4690b3f8b | 605 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 606 | */ |
AnnaBridge | 165:d1b4690b3f8b | 607 | __STATIC_INLINE void LL_LPUART_SetTXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) |
AnnaBridge | 165:d1b4690b3f8b | 608 | { |
AnnaBridge | 165:d1b4690b3f8b | 609 | MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG, Threshold << USART_CR3_TXFTCFG_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 610 | } |
AnnaBridge | 165:d1b4690b3f8b | 611 | |
AnnaBridge | 165:d1b4690b3f8b | 612 | /** |
AnnaBridge | 165:d1b4690b3f8b | 613 | * @brief Return TX FIFO Threshold Configuration |
AnnaBridge | 165:d1b4690b3f8b | 614 | * @rmtoll CR3 TXFTCFG LL_LPUART_GetTXFIFOThreshold |
AnnaBridge | 165:d1b4690b3f8b | 615 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 616 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 617 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 |
AnnaBridge | 165:d1b4690b3f8b | 618 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 |
AnnaBridge | 165:d1b4690b3f8b | 619 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 |
AnnaBridge | 165:d1b4690b3f8b | 620 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 |
AnnaBridge | 165:d1b4690b3f8b | 621 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 |
AnnaBridge | 165:d1b4690b3f8b | 622 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 |
AnnaBridge | 165:d1b4690b3f8b | 623 | */ |
AnnaBridge | 165:d1b4690b3f8b | 624 | __STATIC_INLINE uint32_t LL_LPUART_GetTXFIFOThreshold(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 625 | { |
AnnaBridge | 165:d1b4690b3f8b | 626 | return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_TXFTCFG) >> USART_CR3_TXFTCFG_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 627 | } |
AnnaBridge | 165:d1b4690b3f8b | 628 | |
AnnaBridge | 165:d1b4690b3f8b | 629 | /** |
AnnaBridge | 165:d1b4690b3f8b | 630 | * @brief Configure RX FIFO Threshold |
AnnaBridge | 165:d1b4690b3f8b | 631 | * @rmtoll CR3 RXFTCFG LL_LPUART_SetRXFIFOThreshold |
AnnaBridge | 165:d1b4690b3f8b | 632 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 633 | * @param Threshold This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 634 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 |
AnnaBridge | 165:d1b4690b3f8b | 635 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 |
AnnaBridge | 165:d1b4690b3f8b | 636 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 |
AnnaBridge | 165:d1b4690b3f8b | 637 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 |
AnnaBridge | 165:d1b4690b3f8b | 638 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 |
AnnaBridge | 165:d1b4690b3f8b | 639 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 |
AnnaBridge | 165:d1b4690b3f8b | 640 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 641 | */ |
AnnaBridge | 165:d1b4690b3f8b | 642 | __STATIC_INLINE void LL_LPUART_SetRXFIFOThreshold(USART_TypeDef *LPUARTx, uint32_t Threshold) |
AnnaBridge | 165:d1b4690b3f8b | 643 | { |
AnnaBridge | 165:d1b4690b3f8b | 644 | MODIFY_REG(LPUARTx->CR3, USART_CR3_RXFTCFG, Threshold << USART_CR3_RXFTCFG_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 645 | } |
AnnaBridge | 165:d1b4690b3f8b | 646 | |
AnnaBridge | 165:d1b4690b3f8b | 647 | /** |
AnnaBridge | 165:d1b4690b3f8b | 648 | * @brief Return RX FIFO Threshold Configuration |
AnnaBridge | 165:d1b4690b3f8b | 649 | * @rmtoll CR3 RXFTCFG LL_LPUART_GetRXFIFOThreshold |
AnnaBridge | 165:d1b4690b3f8b | 650 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 651 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 652 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 |
AnnaBridge | 165:d1b4690b3f8b | 653 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 |
AnnaBridge | 165:d1b4690b3f8b | 654 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 |
AnnaBridge | 165:d1b4690b3f8b | 655 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 |
AnnaBridge | 165:d1b4690b3f8b | 656 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 |
AnnaBridge | 165:d1b4690b3f8b | 657 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 |
AnnaBridge | 165:d1b4690b3f8b | 658 | */ |
AnnaBridge | 165:d1b4690b3f8b | 659 | __STATIC_INLINE uint32_t LL_LPUART_GetRXFIFOThreshold(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 660 | { |
AnnaBridge | 165:d1b4690b3f8b | 661 | return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RXFTCFG) >> USART_CR3_RXFTCFG_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 662 | } |
AnnaBridge | 165:d1b4690b3f8b | 663 | |
AnnaBridge | 165:d1b4690b3f8b | 664 | /** |
AnnaBridge | 165:d1b4690b3f8b | 665 | * @brief Configure TX and RX FIFOs Threshold |
AnnaBridge | 165:d1b4690b3f8b | 666 | * @rmtoll CR3 TXFTCFG LL_LPUART_ConfigFIFOsThreshold\n |
AnnaBridge | 165:d1b4690b3f8b | 667 | * CR3 RXFTCFG LL_LPUART_ConfigFIFOsThreshold |
AnnaBridge | 165:d1b4690b3f8b | 668 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 669 | * @param TXThreshold This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 670 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 |
AnnaBridge | 165:d1b4690b3f8b | 671 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 |
AnnaBridge | 165:d1b4690b3f8b | 672 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 |
AnnaBridge | 165:d1b4690b3f8b | 673 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 |
AnnaBridge | 165:d1b4690b3f8b | 674 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 |
AnnaBridge | 165:d1b4690b3f8b | 675 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 |
AnnaBridge | 165:d1b4690b3f8b | 676 | * @param RXThreshold This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 677 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_8 |
AnnaBridge | 165:d1b4690b3f8b | 678 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_4 |
AnnaBridge | 165:d1b4690b3f8b | 679 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_1_2 |
AnnaBridge | 165:d1b4690b3f8b | 680 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_3_4 |
AnnaBridge | 165:d1b4690b3f8b | 681 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_7_8 |
AnnaBridge | 165:d1b4690b3f8b | 682 | * @arg @ref LL_LPUART_FIFOTHRESHOLD_8_8 |
AnnaBridge | 165:d1b4690b3f8b | 683 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 684 | */ |
AnnaBridge | 165:d1b4690b3f8b | 685 | __STATIC_INLINE void LL_LPUART_ConfigFIFOsThreshold(USART_TypeDef *LPUARTx, uint32_t TXThreshold, uint32_t RXThreshold) |
AnnaBridge | 165:d1b4690b3f8b | 686 | { |
AnnaBridge | 165:d1b4690b3f8b | 687 | MODIFY_REG(LPUARTx->CR3, USART_CR3_TXFTCFG | USART_CR3_RXFTCFG, TXThreshold << USART_CR3_TXFTCFG_Pos | RXThreshold << USART_CR3_RXFTCFG_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 688 | } |
AnnaBridge | 165:d1b4690b3f8b | 689 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 690 | |
AnnaBridge | 165:d1b4690b3f8b | 691 | /** |
AnnaBridge | 165:d1b4690b3f8b | 692 | * @brief LPUART enabled in STOP Mode |
AnnaBridge | 165:d1b4690b3f8b | 693 | * @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that |
AnnaBridge | 165:d1b4690b3f8b | 694 | * LPUART clock selection is HSI or LSE in RCC. |
AnnaBridge | 165:d1b4690b3f8b | 695 | * @rmtoll CR1 UESM LL_LPUART_EnableInStopMode |
AnnaBridge | 165:d1b4690b3f8b | 696 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 697 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 698 | */ |
AnnaBridge | 165:d1b4690b3f8b | 699 | __STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 700 | { |
AnnaBridge | 165:d1b4690b3f8b | 701 | SET_BIT(LPUARTx->CR1, USART_CR1_UESM); |
AnnaBridge | 165:d1b4690b3f8b | 702 | } |
AnnaBridge | 165:d1b4690b3f8b | 703 | |
AnnaBridge | 165:d1b4690b3f8b | 704 | /** |
AnnaBridge | 165:d1b4690b3f8b | 705 | * @brief LPUART disabled in STOP Mode |
AnnaBridge | 165:d1b4690b3f8b | 706 | * @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode |
AnnaBridge | 165:d1b4690b3f8b | 707 | * @rmtoll CR1 UESM LL_LPUART_DisableInStopMode |
AnnaBridge | 165:d1b4690b3f8b | 708 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 709 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 710 | */ |
AnnaBridge | 165:d1b4690b3f8b | 711 | __STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 712 | { |
AnnaBridge | 165:d1b4690b3f8b | 713 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM); |
AnnaBridge | 165:d1b4690b3f8b | 714 | } |
AnnaBridge | 165:d1b4690b3f8b | 715 | |
AnnaBridge | 165:d1b4690b3f8b | 716 | /** |
AnnaBridge | 165:d1b4690b3f8b | 717 | * @brief Indicate if LPUART is enabled in STOP Mode |
AnnaBridge | 165:d1b4690b3f8b | 718 | * (able to wake up MCU from Stop mode or not) |
AnnaBridge | 165:d1b4690b3f8b | 719 | * @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode |
AnnaBridge | 165:d1b4690b3f8b | 720 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 721 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 722 | */ |
AnnaBridge | 165:d1b4690b3f8b | 723 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 724 | { |
AnnaBridge | 165:d1b4690b3f8b | 725 | return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM)); |
AnnaBridge | 165:d1b4690b3f8b | 726 | } |
AnnaBridge | 165:d1b4690b3f8b | 727 | |
AnnaBridge | 165:d1b4690b3f8b | 728 | /** |
AnnaBridge | 165:d1b4690b3f8b | 729 | * @brief Receiver Enable (Receiver is enabled and begins searching for a start bit) |
AnnaBridge | 165:d1b4690b3f8b | 730 | * @rmtoll CR1 RE LL_LPUART_EnableDirectionRx |
AnnaBridge | 165:d1b4690b3f8b | 731 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 732 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 733 | */ |
AnnaBridge | 165:d1b4690b3f8b | 734 | __STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 735 | { |
AnnaBridge | 165:d1b4690b3f8b | 736 | SET_BIT(LPUARTx->CR1, USART_CR1_RE); |
AnnaBridge | 165:d1b4690b3f8b | 737 | } |
AnnaBridge | 165:d1b4690b3f8b | 738 | |
AnnaBridge | 165:d1b4690b3f8b | 739 | /** |
AnnaBridge | 165:d1b4690b3f8b | 740 | * @brief Receiver Disable |
AnnaBridge | 165:d1b4690b3f8b | 741 | * @rmtoll CR1 RE LL_LPUART_DisableDirectionRx |
AnnaBridge | 165:d1b4690b3f8b | 742 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 743 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 744 | */ |
AnnaBridge | 165:d1b4690b3f8b | 745 | __STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 746 | { |
AnnaBridge | 165:d1b4690b3f8b | 747 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE); |
AnnaBridge | 165:d1b4690b3f8b | 748 | } |
AnnaBridge | 165:d1b4690b3f8b | 749 | |
AnnaBridge | 165:d1b4690b3f8b | 750 | /** |
AnnaBridge | 165:d1b4690b3f8b | 751 | * @brief Transmitter Enable |
AnnaBridge | 165:d1b4690b3f8b | 752 | * @rmtoll CR1 TE LL_LPUART_EnableDirectionTx |
AnnaBridge | 165:d1b4690b3f8b | 753 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 754 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 755 | */ |
AnnaBridge | 165:d1b4690b3f8b | 756 | __STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 757 | { |
AnnaBridge | 165:d1b4690b3f8b | 758 | SET_BIT(LPUARTx->CR1, USART_CR1_TE); |
AnnaBridge | 165:d1b4690b3f8b | 759 | } |
AnnaBridge | 165:d1b4690b3f8b | 760 | |
AnnaBridge | 165:d1b4690b3f8b | 761 | /** |
AnnaBridge | 165:d1b4690b3f8b | 762 | * @brief Transmitter Disable |
AnnaBridge | 165:d1b4690b3f8b | 763 | * @rmtoll CR1 TE LL_LPUART_DisableDirectionTx |
AnnaBridge | 165:d1b4690b3f8b | 764 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 765 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 766 | */ |
AnnaBridge | 165:d1b4690b3f8b | 767 | __STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 768 | { |
AnnaBridge | 165:d1b4690b3f8b | 769 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE); |
AnnaBridge | 165:d1b4690b3f8b | 770 | } |
AnnaBridge | 165:d1b4690b3f8b | 771 | |
AnnaBridge | 165:d1b4690b3f8b | 772 | /** |
AnnaBridge | 165:d1b4690b3f8b | 773 | * @brief Configure simultaneously enabled/disabled states |
AnnaBridge | 165:d1b4690b3f8b | 774 | * of Transmitter and Receiver |
AnnaBridge | 165:d1b4690b3f8b | 775 | * @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n |
AnnaBridge | 165:d1b4690b3f8b | 776 | * CR1 TE LL_LPUART_SetTransferDirection |
AnnaBridge | 165:d1b4690b3f8b | 777 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 778 | * @param TransferDirection This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 779 | * @arg @ref LL_LPUART_DIRECTION_NONE |
AnnaBridge | 165:d1b4690b3f8b | 780 | * @arg @ref LL_LPUART_DIRECTION_RX |
AnnaBridge | 165:d1b4690b3f8b | 781 | * @arg @ref LL_LPUART_DIRECTION_TX |
AnnaBridge | 165:d1b4690b3f8b | 782 | * @arg @ref LL_LPUART_DIRECTION_TX_RX |
AnnaBridge | 165:d1b4690b3f8b | 783 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 784 | */ |
AnnaBridge | 165:d1b4690b3f8b | 785 | __STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t TransferDirection) |
AnnaBridge | 165:d1b4690b3f8b | 786 | { |
AnnaBridge | 165:d1b4690b3f8b | 787 | MODIFY_REG(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE, TransferDirection); |
AnnaBridge | 165:d1b4690b3f8b | 788 | } |
AnnaBridge | 165:d1b4690b3f8b | 789 | |
AnnaBridge | 165:d1b4690b3f8b | 790 | /** |
AnnaBridge | 165:d1b4690b3f8b | 791 | * @brief Return enabled/disabled states of Transmitter and Receiver |
AnnaBridge | 165:d1b4690b3f8b | 792 | * @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n |
AnnaBridge | 165:d1b4690b3f8b | 793 | * CR1 TE LL_LPUART_GetTransferDirection |
AnnaBridge | 165:d1b4690b3f8b | 794 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 795 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 796 | * @arg @ref LL_LPUART_DIRECTION_NONE |
AnnaBridge | 165:d1b4690b3f8b | 797 | * @arg @ref LL_LPUART_DIRECTION_RX |
AnnaBridge | 165:d1b4690b3f8b | 798 | * @arg @ref LL_LPUART_DIRECTION_TX |
AnnaBridge | 165:d1b4690b3f8b | 799 | * @arg @ref LL_LPUART_DIRECTION_TX_RX |
AnnaBridge | 165:d1b4690b3f8b | 800 | */ |
AnnaBridge | 165:d1b4690b3f8b | 801 | __STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 802 | { |
AnnaBridge | 165:d1b4690b3f8b | 803 | return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE | USART_CR1_TE)); |
AnnaBridge | 165:d1b4690b3f8b | 804 | } |
AnnaBridge | 165:d1b4690b3f8b | 805 | |
AnnaBridge | 165:d1b4690b3f8b | 806 | /** |
AnnaBridge | 165:d1b4690b3f8b | 807 | * @brief Configure Parity (enabled/disabled and parity mode if enabled) |
AnnaBridge | 165:d1b4690b3f8b | 808 | * @note This function selects if hardware parity control (generation and detection) is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 809 | * When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position |
AnnaBridge | 165:d1b4690b3f8b | 810 | * (depending on data width) and parity is checked on the received data. |
AnnaBridge | 165:d1b4690b3f8b | 811 | * @rmtoll CR1 PS LL_LPUART_SetParity\n |
AnnaBridge | 165:d1b4690b3f8b | 812 | * CR1 PCE LL_LPUART_SetParity |
AnnaBridge | 165:d1b4690b3f8b | 813 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 814 | * @param Parity This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 815 | * @arg @ref LL_LPUART_PARITY_NONE |
AnnaBridge | 165:d1b4690b3f8b | 816 | * @arg @ref LL_LPUART_PARITY_EVEN |
AnnaBridge | 165:d1b4690b3f8b | 817 | * @arg @ref LL_LPUART_PARITY_ODD |
AnnaBridge | 165:d1b4690b3f8b | 818 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 819 | */ |
AnnaBridge | 165:d1b4690b3f8b | 820 | __STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t Parity) |
AnnaBridge | 165:d1b4690b3f8b | 821 | { |
AnnaBridge | 165:d1b4690b3f8b | 822 | MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE, Parity); |
AnnaBridge | 165:d1b4690b3f8b | 823 | } |
AnnaBridge | 165:d1b4690b3f8b | 824 | |
AnnaBridge | 165:d1b4690b3f8b | 825 | /** |
AnnaBridge | 165:d1b4690b3f8b | 826 | * @brief Return Parity configuration (enabled/disabled and parity mode if enabled) |
AnnaBridge | 165:d1b4690b3f8b | 827 | * @rmtoll CR1 PS LL_LPUART_GetParity\n |
AnnaBridge | 165:d1b4690b3f8b | 828 | * CR1 PCE LL_LPUART_GetParity |
AnnaBridge | 165:d1b4690b3f8b | 829 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 830 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 831 | * @arg @ref LL_LPUART_PARITY_NONE |
AnnaBridge | 165:d1b4690b3f8b | 832 | * @arg @ref LL_LPUART_PARITY_EVEN |
AnnaBridge | 165:d1b4690b3f8b | 833 | * @arg @ref LL_LPUART_PARITY_ODD |
AnnaBridge | 165:d1b4690b3f8b | 834 | */ |
AnnaBridge | 165:d1b4690b3f8b | 835 | __STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 836 | { |
AnnaBridge | 165:d1b4690b3f8b | 837 | return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE)); |
AnnaBridge | 165:d1b4690b3f8b | 838 | } |
AnnaBridge | 165:d1b4690b3f8b | 839 | |
AnnaBridge | 165:d1b4690b3f8b | 840 | /** |
AnnaBridge | 165:d1b4690b3f8b | 841 | * @brief Set Receiver Wake Up method from Mute mode. |
AnnaBridge | 165:d1b4690b3f8b | 842 | * @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod |
AnnaBridge | 165:d1b4690b3f8b | 843 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 844 | * @param Method This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 845 | * @arg @ref LL_LPUART_WAKEUP_IDLELINE |
AnnaBridge | 165:d1b4690b3f8b | 846 | * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK |
AnnaBridge | 165:d1b4690b3f8b | 847 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 848 | */ |
AnnaBridge | 165:d1b4690b3f8b | 849 | __STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method) |
AnnaBridge | 165:d1b4690b3f8b | 850 | { |
AnnaBridge | 165:d1b4690b3f8b | 851 | MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method); |
AnnaBridge | 165:d1b4690b3f8b | 852 | } |
AnnaBridge | 165:d1b4690b3f8b | 853 | |
AnnaBridge | 165:d1b4690b3f8b | 854 | /** |
AnnaBridge | 165:d1b4690b3f8b | 855 | * @brief Return Receiver Wake Up method from Mute mode |
AnnaBridge | 165:d1b4690b3f8b | 856 | * @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod |
AnnaBridge | 165:d1b4690b3f8b | 857 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 858 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 859 | * @arg @ref LL_LPUART_WAKEUP_IDLELINE |
AnnaBridge | 165:d1b4690b3f8b | 860 | * @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK |
AnnaBridge | 165:d1b4690b3f8b | 861 | */ |
AnnaBridge | 165:d1b4690b3f8b | 862 | __STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 863 | { |
AnnaBridge | 165:d1b4690b3f8b | 864 | return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE)); |
AnnaBridge | 165:d1b4690b3f8b | 865 | } |
AnnaBridge | 165:d1b4690b3f8b | 866 | |
AnnaBridge | 165:d1b4690b3f8b | 867 | /** |
AnnaBridge | 165:d1b4690b3f8b | 868 | * @brief Set Word length (nb of data bits, excluding start and stop bits) |
AnnaBridge | 165:d1b4690b3f8b | 869 | * @rmtoll CR1 M LL_LPUART_SetDataWidth |
AnnaBridge | 165:d1b4690b3f8b | 870 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 871 | * @param DataWidth This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 872 | * @arg @ref LL_LPUART_DATAWIDTH_7B |
AnnaBridge | 165:d1b4690b3f8b | 873 | * @arg @ref LL_LPUART_DATAWIDTH_8B |
AnnaBridge | 165:d1b4690b3f8b | 874 | * @arg @ref LL_LPUART_DATAWIDTH_9B |
AnnaBridge | 165:d1b4690b3f8b | 875 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 876 | */ |
AnnaBridge | 165:d1b4690b3f8b | 877 | __STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth) |
AnnaBridge | 165:d1b4690b3f8b | 878 | { |
AnnaBridge | 165:d1b4690b3f8b | 879 | MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth); |
AnnaBridge | 165:d1b4690b3f8b | 880 | } |
AnnaBridge | 165:d1b4690b3f8b | 881 | |
AnnaBridge | 165:d1b4690b3f8b | 882 | /** |
AnnaBridge | 165:d1b4690b3f8b | 883 | * @brief Return Word length (i.e. nb of data bits, excluding start and stop bits) |
AnnaBridge | 165:d1b4690b3f8b | 884 | * @rmtoll CR1 M LL_LPUART_GetDataWidth |
AnnaBridge | 165:d1b4690b3f8b | 885 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 886 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 887 | * @arg @ref LL_LPUART_DATAWIDTH_7B |
AnnaBridge | 165:d1b4690b3f8b | 888 | * @arg @ref LL_LPUART_DATAWIDTH_8B |
AnnaBridge | 165:d1b4690b3f8b | 889 | * @arg @ref LL_LPUART_DATAWIDTH_9B |
AnnaBridge | 165:d1b4690b3f8b | 890 | */ |
AnnaBridge | 165:d1b4690b3f8b | 891 | __STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 892 | { |
AnnaBridge | 165:d1b4690b3f8b | 893 | return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M)); |
AnnaBridge | 165:d1b4690b3f8b | 894 | } |
AnnaBridge | 165:d1b4690b3f8b | 895 | |
AnnaBridge | 165:d1b4690b3f8b | 896 | /** |
AnnaBridge | 165:d1b4690b3f8b | 897 | * @brief Allow switch between Mute Mode and Active mode |
AnnaBridge | 165:d1b4690b3f8b | 898 | * @rmtoll CR1 MME LL_LPUART_EnableMuteMode |
AnnaBridge | 165:d1b4690b3f8b | 899 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 900 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 901 | */ |
AnnaBridge | 165:d1b4690b3f8b | 902 | __STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 903 | { |
AnnaBridge | 165:d1b4690b3f8b | 904 | SET_BIT(LPUARTx->CR1, USART_CR1_MME); |
AnnaBridge | 165:d1b4690b3f8b | 905 | } |
AnnaBridge | 165:d1b4690b3f8b | 906 | |
AnnaBridge | 165:d1b4690b3f8b | 907 | /** |
AnnaBridge | 165:d1b4690b3f8b | 908 | * @brief Prevent Mute Mode use. Set Receiver in active mode permanently. |
AnnaBridge | 165:d1b4690b3f8b | 909 | * @rmtoll CR1 MME LL_LPUART_DisableMuteMode |
AnnaBridge | 165:d1b4690b3f8b | 910 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 911 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 912 | */ |
AnnaBridge | 165:d1b4690b3f8b | 913 | __STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 914 | { |
AnnaBridge | 165:d1b4690b3f8b | 915 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME); |
AnnaBridge | 165:d1b4690b3f8b | 916 | } |
AnnaBridge | 165:d1b4690b3f8b | 917 | |
AnnaBridge | 165:d1b4690b3f8b | 918 | /** |
AnnaBridge | 165:d1b4690b3f8b | 919 | * @brief Indicate if switch between Mute Mode and Active mode is allowed |
AnnaBridge | 165:d1b4690b3f8b | 920 | * @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode |
AnnaBridge | 165:d1b4690b3f8b | 921 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 922 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 923 | */ |
AnnaBridge | 165:d1b4690b3f8b | 924 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 925 | { |
AnnaBridge | 165:d1b4690b3f8b | 926 | return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME)); |
AnnaBridge | 165:d1b4690b3f8b | 927 | } |
AnnaBridge | 165:d1b4690b3f8b | 928 | |
AnnaBridge | 165:d1b4690b3f8b | 929 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 930 | /** |
AnnaBridge | 165:d1b4690b3f8b | 931 | * @brief Configure Clock source prescaler for baudrate generator and oversampling |
AnnaBridge | 165:d1b4690b3f8b | 932 | * @rmtoll PRESC PRESCALER LL_LPUART_SetPrescaler |
AnnaBridge | 165:d1b4690b3f8b | 933 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 934 | * @param PrescalerValue This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 935 | * @arg @ref LL_LPUART_PRESCALER_DIV1 |
AnnaBridge | 165:d1b4690b3f8b | 936 | * @arg @ref LL_LPUART_PRESCALER_DIV2 |
AnnaBridge | 165:d1b4690b3f8b | 937 | * @arg @ref LL_LPUART_PRESCALER_DIV4 |
AnnaBridge | 165:d1b4690b3f8b | 938 | * @arg @ref LL_LPUART_PRESCALER_DIV6 |
AnnaBridge | 165:d1b4690b3f8b | 939 | * @arg @ref LL_LPUART_PRESCALER_DIV8 |
AnnaBridge | 165:d1b4690b3f8b | 940 | * @arg @ref LL_LPUART_PRESCALER_DIV10 |
AnnaBridge | 165:d1b4690b3f8b | 941 | * @arg @ref LL_LPUART_PRESCALER_DIV12 |
AnnaBridge | 165:d1b4690b3f8b | 942 | * @arg @ref LL_LPUART_PRESCALER_DIV16 |
AnnaBridge | 165:d1b4690b3f8b | 943 | * @arg @ref LL_LPUART_PRESCALER_DIV32 |
AnnaBridge | 165:d1b4690b3f8b | 944 | * @arg @ref LL_LPUART_PRESCALER_DIV64 |
AnnaBridge | 165:d1b4690b3f8b | 945 | * @arg @ref LL_LPUART_PRESCALER_DIV128 |
AnnaBridge | 165:d1b4690b3f8b | 946 | * @arg @ref LL_LPUART_PRESCALER_DIV256 |
AnnaBridge | 165:d1b4690b3f8b | 947 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 948 | */ |
AnnaBridge | 165:d1b4690b3f8b | 949 | __STATIC_INLINE void LL_LPUART_SetPrescaler(USART_TypeDef *LPUARTx, uint32_t PrescalerValue) |
AnnaBridge | 165:d1b4690b3f8b | 950 | { |
AnnaBridge | 165:d1b4690b3f8b | 951 | MODIFY_REG(LPUARTx->PRESC, USART_PRESC_PRESCALER, PrescalerValue); |
AnnaBridge | 165:d1b4690b3f8b | 952 | } |
AnnaBridge | 165:d1b4690b3f8b | 953 | |
AnnaBridge | 165:d1b4690b3f8b | 954 | /** |
AnnaBridge | 165:d1b4690b3f8b | 955 | * @brief Retrieve the Clock source prescaler for baudrate generator and oversampling |
AnnaBridge | 165:d1b4690b3f8b | 956 | * @rmtoll PRESC PRESCALER LL_LPUART_GetPrescaler |
AnnaBridge | 165:d1b4690b3f8b | 957 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 958 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 959 | * @arg @ref LL_LPUART_PRESCALER_DIV1 |
AnnaBridge | 165:d1b4690b3f8b | 960 | * @arg @ref LL_LPUART_PRESCALER_DIV2 |
AnnaBridge | 165:d1b4690b3f8b | 961 | * @arg @ref LL_LPUART_PRESCALER_DIV4 |
AnnaBridge | 165:d1b4690b3f8b | 962 | * @arg @ref LL_LPUART_PRESCALER_DIV6 |
AnnaBridge | 165:d1b4690b3f8b | 963 | * @arg @ref LL_LPUART_PRESCALER_DIV8 |
AnnaBridge | 165:d1b4690b3f8b | 964 | * @arg @ref LL_LPUART_PRESCALER_DIV10 |
AnnaBridge | 165:d1b4690b3f8b | 965 | * @arg @ref LL_LPUART_PRESCALER_DIV12 |
AnnaBridge | 165:d1b4690b3f8b | 966 | * @arg @ref LL_LPUART_PRESCALER_DIV16 |
AnnaBridge | 165:d1b4690b3f8b | 967 | * @arg @ref LL_LPUART_PRESCALER_DIV32 |
AnnaBridge | 165:d1b4690b3f8b | 968 | * @arg @ref LL_LPUART_PRESCALER_DIV64 |
AnnaBridge | 165:d1b4690b3f8b | 969 | * @arg @ref LL_LPUART_PRESCALER_DIV128 |
AnnaBridge | 165:d1b4690b3f8b | 970 | * @arg @ref LL_LPUART_PRESCALER_DIV256 |
AnnaBridge | 165:d1b4690b3f8b | 971 | */ |
AnnaBridge | 165:d1b4690b3f8b | 972 | __STATIC_INLINE uint32_t LL_LPUART_GetPrescaler(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 973 | { |
AnnaBridge | 165:d1b4690b3f8b | 974 | return (uint32_t)(READ_BIT(LPUARTx->PRESC, USART_PRESC_PRESCALER)); |
AnnaBridge | 165:d1b4690b3f8b | 975 | } |
AnnaBridge | 165:d1b4690b3f8b | 976 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 977 | |
AnnaBridge | 165:d1b4690b3f8b | 978 | /** |
AnnaBridge | 165:d1b4690b3f8b | 979 | * @brief Set the length of the stop bits |
AnnaBridge | 165:d1b4690b3f8b | 980 | * @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength |
AnnaBridge | 165:d1b4690b3f8b | 981 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 982 | * @param StopBits This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 983 | * @arg @ref LL_LPUART_STOPBITS_1 |
AnnaBridge | 165:d1b4690b3f8b | 984 | * @arg @ref LL_LPUART_STOPBITS_2 |
AnnaBridge | 165:d1b4690b3f8b | 985 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 986 | */ |
AnnaBridge | 165:d1b4690b3f8b | 987 | __STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits) |
AnnaBridge | 165:d1b4690b3f8b | 988 | { |
AnnaBridge | 165:d1b4690b3f8b | 989 | MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); |
AnnaBridge | 165:d1b4690b3f8b | 990 | } |
AnnaBridge | 165:d1b4690b3f8b | 991 | |
AnnaBridge | 165:d1b4690b3f8b | 992 | /** |
AnnaBridge | 165:d1b4690b3f8b | 993 | * @brief Retrieve the length of the stop bits |
AnnaBridge | 165:d1b4690b3f8b | 994 | * @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength |
AnnaBridge | 165:d1b4690b3f8b | 995 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 996 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 997 | * @arg @ref LL_LPUART_STOPBITS_1 |
AnnaBridge | 165:d1b4690b3f8b | 998 | * @arg @ref LL_LPUART_STOPBITS_2 |
AnnaBridge | 165:d1b4690b3f8b | 999 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1000 | __STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1001 | { |
AnnaBridge | 165:d1b4690b3f8b | 1002 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP)); |
AnnaBridge | 165:d1b4690b3f8b | 1003 | } |
AnnaBridge | 165:d1b4690b3f8b | 1004 | |
AnnaBridge | 165:d1b4690b3f8b | 1005 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1006 | * @brief Configure Character frame format (Datawidth, Parity control, Stop Bits) |
AnnaBridge | 165:d1b4690b3f8b | 1007 | * @note Call of this function is equivalent to following function call sequence : |
AnnaBridge | 165:d1b4690b3f8b | 1008 | * - Data Width configuration using @ref LL_LPUART_SetDataWidth() function |
AnnaBridge | 165:d1b4690b3f8b | 1009 | * - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function |
AnnaBridge | 165:d1b4690b3f8b | 1010 | * - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function |
AnnaBridge | 165:d1b4690b3f8b | 1011 | * @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n |
AnnaBridge | 165:d1b4690b3f8b | 1012 | * CR1 PCE LL_LPUART_ConfigCharacter\n |
AnnaBridge | 165:d1b4690b3f8b | 1013 | * CR1 M LL_LPUART_ConfigCharacter\n |
AnnaBridge | 165:d1b4690b3f8b | 1014 | * CR2 STOP LL_LPUART_ConfigCharacter |
AnnaBridge | 165:d1b4690b3f8b | 1015 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1016 | * @param DataWidth This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1017 | * @arg @ref LL_LPUART_DATAWIDTH_7B |
AnnaBridge | 165:d1b4690b3f8b | 1018 | * @arg @ref LL_LPUART_DATAWIDTH_8B |
AnnaBridge | 165:d1b4690b3f8b | 1019 | * @arg @ref LL_LPUART_DATAWIDTH_9B |
AnnaBridge | 165:d1b4690b3f8b | 1020 | * @param Parity This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1021 | * @arg @ref LL_LPUART_PARITY_NONE |
AnnaBridge | 165:d1b4690b3f8b | 1022 | * @arg @ref LL_LPUART_PARITY_EVEN |
AnnaBridge | 165:d1b4690b3f8b | 1023 | * @arg @ref LL_LPUART_PARITY_ODD |
AnnaBridge | 165:d1b4690b3f8b | 1024 | * @param StopBits This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1025 | * @arg @ref LL_LPUART_STOPBITS_1 |
AnnaBridge | 165:d1b4690b3f8b | 1026 | * @arg @ref LL_LPUART_STOPBITS_2 |
AnnaBridge | 165:d1b4690b3f8b | 1027 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1028 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1029 | __STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t Parity, |
AnnaBridge | 165:d1b4690b3f8b | 1030 | uint32_t StopBits) |
AnnaBridge | 165:d1b4690b3f8b | 1031 | { |
AnnaBridge | 165:d1b4690b3f8b | 1032 | MODIFY_REG(LPUARTx->CR1, USART_CR1_PS | USART_CR1_PCE | USART_CR1_M, Parity | DataWidth); |
AnnaBridge | 165:d1b4690b3f8b | 1033 | MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits); |
AnnaBridge | 165:d1b4690b3f8b | 1034 | } |
AnnaBridge | 165:d1b4690b3f8b | 1035 | |
AnnaBridge | 165:d1b4690b3f8b | 1036 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1037 | * @brief Configure TX/RX pins swapping setting. |
AnnaBridge | 165:d1b4690b3f8b | 1038 | * @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap |
AnnaBridge | 165:d1b4690b3f8b | 1039 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1040 | * @param SwapConfig This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1041 | * @arg @ref LL_LPUART_TXRX_STANDARD |
AnnaBridge | 165:d1b4690b3f8b | 1042 | * @arg @ref LL_LPUART_TXRX_SWAPPED |
AnnaBridge | 165:d1b4690b3f8b | 1043 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1044 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1045 | __STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig) |
AnnaBridge | 165:d1b4690b3f8b | 1046 | { |
AnnaBridge | 165:d1b4690b3f8b | 1047 | MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig); |
AnnaBridge | 165:d1b4690b3f8b | 1048 | } |
AnnaBridge | 165:d1b4690b3f8b | 1049 | |
AnnaBridge | 165:d1b4690b3f8b | 1050 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1051 | * @brief Retrieve TX/RX pins swapping configuration. |
AnnaBridge | 165:d1b4690b3f8b | 1052 | * @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap |
AnnaBridge | 165:d1b4690b3f8b | 1053 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1054 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1055 | * @arg @ref LL_LPUART_TXRX_STANDARD |
AnnaBridge | 165:d1b4690b3f8b | 1056 | * @arg @ref LL_LPUART_TXRX_SWAPPED |
AnnaBridge | 165:d1b4690b3f8b | 1057 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1058 | __STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1059 | { |
AnnaBridge | 165:d1b4690b3f8b | 1060 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP)); |
AnnaBridge | 165:d1b4690b3f8b | 1061 | } |
AnnaBridge | 165:d1b4690b3f8b | 1062 | |
AnnaBridge | 165:d1b4690b3f8b | 1063 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1064 | * @brief Configure RX pin active level logic |
AnnaBridge | 165:d1b4690b3f8b | 1065 | * @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel |
AnnaBridge | 165:d1b4690b3f8b | 1066 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1067 | * @param PinInvMethod This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1068 | * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD |
AnnaBridge | 165:d1b4690b3f8b | 1069 | * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED |
AnnaBridge | 165:d1b4690b3f8b | 1070 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1071 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1072 | __STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod) |
AnnaBridge | 165:d1b4690b3f8b | 1073 | { |
AnnaBridge | 165:d1b4690b3f8b | 1074 | MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod); |
AnnaBridge | 165:d1b4690b3f8b | 1075 | } |
AnnaBridge | 165:d1b4690b3f8b | 1076 | |
AnnaBridge | 165:d1b4690b3f8b | 1077 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1078 | * @brief Retrieve RX pin active level logic configuration |
AnnaBridge | 165:d1b4690b3f8b | 1079 | * @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel |
AnnaBridge | 165:d1b4690b3f8b | 1080 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1081 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1082 | * @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD |
AnnaBridge | 165:d1b4690b3f8b | 1083 | * @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED |
AnnaBridge | 165:d1b4690b3f8b | 1084 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1085 | __STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1086 | { |
AnnaBridge | 165:d1b4690b3f8b | 1087 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV)); |
AnnaBridge | 165:d1b4690b3f8b | 1088 | } |
AnnaBridge | 165:d1b4690b3f8b | 1089 | |
AnnaBridge | 165:d1b4690b3f8b | 1090 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1091 | * @brief Configure TX pin active level logic |
AnnaBridge | 165:d1b4690b3f8b | 1092 | * @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel |
AnnaBridge | 165:d1b4690b3f8b | 1093 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1094 | * @param PinInvMethod This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1095 | * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD |
AnnaBridge | 165:d1b4690b3f8b | 1096 | * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED |
AnnaBridge | 165:d1b4690b3f8b | 1097 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1098 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1099 | __STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod) |
AnnaBridge | 165:d1b4690b3f8b | 1100 | { |
AnnaBridge | 165:d1b4690b3f8b | 1101 | MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod); |
AnnaBridge | 165:d1b4690b3f8b | 1102 | } |
AnnaBridge | 165:d1b4690b3f8b | 1103 | |
AnnaBridge | 165:d1b4690b3f8b | 1104 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1105 | * @brief Retrieve TX pin active level logic configuration |
AnnaBridge | 165:d1b4690b3f8b | 1106 | * @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel |
AnnaBridge | 165:d1b4690b3f8b | 1107 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1108 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1109 | * @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD |
AnnaBridge | 165:d1b4690b3f8b | 1110 | * @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED |
AnnaBridge | 165:d1b4690b3f8b | 1111 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1112 | __STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1113 | { |
AnnaBridge | 165:d1b4690b3f8b | 1114 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV)); |
AnnaBridge | 165:d1b4690b3f8b | 1115 | } |
AnnaBridge | 165:d1b4690b3f8b | 1116 | |
AnnaBridge | 165:d1b4690b3f8b | 1117 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1118 | * @brief Configure Binary data logic. |
AnnaBridge | 165:d1b4690b3f8b | 1119 | * |
AnnaBridge | 165:d1b4690b3f8b | 1120 | * @note Allow to define how Logical data from the data register are send/received : |
AnnaBridge | 165:d1b4690b3f8b | 1121 | * either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H) |
AnnaBridge | 165:d1b4690b3f8b | 1122 | * @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic |
AnnaBridge | 165:d1b4690b3f8b | 1123 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1124 | * @param DataLogic This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1125 | * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE |
AnnaBridge | 165:d1b4690b3f8b | 1126 | * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE |
AnnaBridge | 165:d1b4690b3f8b | 1127 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1128 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1129 | __STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic) |
AnnaBridge | 165:d1b4690b3f8b | 1130 | { |
AnnaBridge | 165:d1b4690b3f8b | 1131 | MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic); |
AnnaBridge | 165:d1b4690b3f8b | 1132 | } |
AnnaBridge | 165:d1b4690b3f8b | 1133 | |
AnnaBridge | 165:d1b4690b3f8b | 1134 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1135 | * @brief Retrieve Binary data configuration |
AnnaBridge | 165:d1b4690b3f8b | 1136 | * @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic |
AnnaBridge | 165:d1b4690b3f8b | 1137 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1138 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1139 | * @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE |
AnnaBridge | 165:d1b4690b3f8b | 1140 | * @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE |
AnnaBridge | 165:d1b4690b3f8b | 1141 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1142 | __STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1143 | { |
AnnaBridge | 165:d1b4690b3f8b | 1144 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV)); |
AnnaBridge | 165:d1b4690b3f8b | 1145 | } |
AnnaBridge | 165:d1b4690b3f8b | 1146 | |
AnnaBridge | 165:d1b4690b3f8b | 1147 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1148 | * @brief Configure transfer bit order (either Less or Most Significant Bit First) |
AnnaBridge | 165:d1b4690b3f8b | 1149 | * @note MSB First means data is transmitted/received with the MSB first, following the start bit. |
AnnaBridge | 165:d1b4690b3f8b | 1150 | * LSB First means data is transmitted/received with data bit 0 first, following the start bit. |
AnnaBridge | 165:d1b4690b3f8b | 1151 | * @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder |
AnnaBridge | 165:d1b4690b3f8b | 1152 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1153 | * @param BitOrder This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1154 | * @arg @ref LL_LPUART_BITORDER_LSBFIRST |
AnnaBridge | 165:d1b4690b3f8b | 1155 | * @arg @ref LL_LPUART_BITORDER_MSBFIRST |
AnnaBridge | 165:d1b4690b3f8b | 1156 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1157 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1158 | __STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder) |
AnnaBridge | 165:d1b4690b3f8b | 1159 | { |
AnnaBridge | 165:d1b4690b3f8b | 1160 | MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder); |
AnnaBridge | 165:d1b4690b3f8b | 1161 | } |
AnnaBridge | 165:d1b4690b3f8b | 1162 | |
AnnaBridge | 165:d1b4690b3f8b | 1163 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1164 | * @brief Return transfer bit order (either Less or Most Significant Bit First) |
AnnaBridge | 165:d1b4690b3f8b | 1165 | * @note MSB First means data is transmitted/received with the MSB first, following the start bit. |
AnnaBridge | 165:d1b4690b3f8b | 1166 | * LSB First means data is transmitted/received with data bit 0 first, following the start bit. |
AnnaBridge | 165:d1b4690b3f8b | 1167 | * @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder |
AnnaBridge | 165:d1b4690b3f8b | 1168 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1169 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1170 | * @arg @ref LL_LPUART_BITORDER_LSBFIRST |
AnnaBridge | 165:d1b4690b3f8b | 1171 | * @arg @ref LL_LPUART_BITORDER_MSBFIRST |
AnnaBridge | 165:d1b4690b3f8b | 1172 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1173 | __STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1174 | { |
AnnaBridge | 165:d1b4690b3f8b | 1175 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST)); |
AnnaBridge | 165:d1b4690b3f8b | 1176 | } |
AnnaBridge | 165:d1b4690b3f8b | 1177 | |
AnnaBridge | 165:d1b4690b3f8b | 1178 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1179 | * @brief Set Address of the LPUART node. |
AnnaBridge | 165:d1b4690b3f8b | 1180 | * @note This is used in multiprocessor communication during Mute mode or Stop mode, |
AnnaBridge | 165:d1b4690b3f8b | 1181 | * for wake up with address mark detection. |
AnnaBridge | 165:d1b4690b3f8b | 1182 | * @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7. |
AnnaBridge | 165:d1b4690b3f8b | 1183 | * (b7-b4 should be set to 0) |
AnnaBridge | 165:d1b4690b3f8b | 1184 | * 8bits address node is used when 7-bit Address Detection is selected in ADDM7. |
AnnaBridge | 165:d1b4690b3f8b | 1185 | * (This is used in multiprocessor communication during Mute mode or Stop mode, |
AnnaBridge | 165:d1b4690b3f8b | 1186 | * for wake up with 7-bit address mark detection. |
AnnaBridge | 165:d1b4690b3f8b | 1187 | * The MSB of the character sent by the transmitter should be equal to 1. |
AnnaBridge | 165:d1b4690b3f8b | 1188 | * It may also be used for character detection during normal reception, |
AnnaBridge | 165:d1b4690b3f8b | 1189 | * Mute mode inactive (for example, end of block detection in ModBus protocol). |
AnnaBridge | 165:d1b4690b3f8b | 1190 | * In this case, the whole received character (8-bit) is compared to the ADD[7:0] |
AnnaBridge | 165:d1b4690b3f8b | 1191 | * value and CMF flag is set on match) |
AnnaBridge | 165:d1b4690b3f8b | 1192 | * @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n |
AnnaBridge | 165:d1b4690b3f8b | 1193 | * CR2 ADDM7 LL_LPUART_ConfigNodeAddress |
AnnaBridge | 165:d1b4690b3f8b | 1194 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1195 | * @param AddressLen This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1196 | * @arg @ref LL_LPUART_ADDRESS_DETECT_4B |
AnnaBridge | 165:d1b4690b3f8b | 1197 | * @arg @ref LL_LPUART_ADDRESS_DETECT_7B |
AnnaBridge | 165:d1b4690b3f8b | 1198 | * @param NodeAddress 4 or 7 bit Address of the LPUART node. |
AnnaBridge | 165:d1b4690b3f8b | 1199 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1200 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1201 | __STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress) |
AnnaBridge | 165:d1b4690b3f8b | 1202 | { |
AnnaBridge | 165:d1b4690b3f8b | 1203 | MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD | USART_CR2_ADDM7, |
AnnaBridge | 165:d1b4690b3f8b | 1204 | (uint32_t)(AddressLen | (NodeAddress << USART_CR2_ADD_Pos))); |
AnnaBridge | 165:d1b4690b3f8b | 1205 | } |
AnnaBridge | 165:d1b4690b3f8b | 1206 | |
AnnaBridge | 165:d1b4690b3f8b | 1207 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1208 | * @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2. |
AnnaBridge | 165:d1b4690b3f8b | 1209 | * @note If 4-bit Address Detection is selected in ADDM7, |
AnnaBridge | 165:d1b4690b3f8b | 1210 | * only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant) |
AnnaBridge | 165:d1b4690b3f8b | 1211 | * If 7-bit Address Detection is selected in ADDM7, |
AnnaBridge | 165:d1b4690b3f8b | 1212 | * only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant) |
AnnaBridge | 165:d1b4690b3f8b | 1213 | * @rmtoll CR2 ADD LL_LPUART_GetNodeAddress |
AnnaBridge | 165:d1b4690b3f8b | 1214 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1215 | * @retval Address of the LPUART node (Value between Min_Data=0 and Max_Data=255) |
AnnaBridge | 165:d1b4690b3f8b | 1216 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1217 | __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1218 | { |
AnnaBridge | 165:d1b4690b3f8b | 1219 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> USART_CR2_ADD_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 1220 | } |
AnnaBridge | 165:d1b4690b3f8b | 1221 | |
AnnaBridge | 165:d1b4690b3f8b | 1222 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1223 | * @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit) |
AnnaBridge | 165:d1b4690b3f8b | 1224 | * @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen |
AnnaBridge | 165:d1b4690b3f8b | 1225 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1226 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1227 | * @arg @ref LL_LPUART_ADDRESS_DETECT_4B |
AnnaBridge | 165:d1b4690b3f8b | 1228 | * @arg @ref LL_LPUART_ADDRESS_DETECT_7B |
AnnaBridge | 165:d1b4690b3f8b | 1229 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1230 | __STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1231 | { |
AnnaBridge | 165:d1b4690b3f8b | 1232 | return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7)); |
AnnaBridge | 165:d1b4690b3f8b | 1233 | } |
AnnaBridge | 165:d1b4690b3f8b | 1234 | |
AnnaBridge | 165:d1b4690b3f8b | 1235 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1236 | * @brief Enable RTS HW Flow Control |
AnnaBridge | 165:d1b4690b3f8b | 1237 | * @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl |
AnnaBridge | 165:d1b4690b3f8b | 1238 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1239 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1240 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1241 | __STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1242 | { |
AnnaBridge | 165:d1b4690b3f8b | 1243 | SET_BIT(LPUARTx->CR3, USART_CR3_RTSE); |
AnnaBridge | 165:d1b4690b3f8b | 1244 | } |
AnnaBridge | 165:d1b4690b3f8b | 1245 | |
AnnaBridge | 165:d1b4690b3f8b | 1246 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1247 | * @brief Disable RTS HW Flow Control |
AnnaBridge | 165:d1b4690b3f8b | 1248 | * @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl |
AnnaBridge | 165:d1b4690b3f8b | 1249 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1250 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1251 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1252 | __STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1253 | { |
AnnaBridge | 165:d1b4690b3f8b | 1254 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE); |
AnnaBridge | 165:d1b4690b3f8b | 1255 | } |
AnnaBridge | 165:d1b4690b3f8b | 1256 | |
AnnaBridge | 165:d1b4690b3f8b | 1257 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1258 | * @brief Enable CTS HW Flow Control |
AnnaBridge | 165:d1b4690b3f8b | 1259 | * @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl |
AnnaBridge | 165:d1b4690b3f8b | 1260 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1261 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1262 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1263 | __STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1264 | { |
AnnaBridge | 165:d1b4690b3f8b | 1265 | SET_BIT(LPUARTx->CR3, USART_CR3_CTSE); |
AnnaBridge | 165:d1b4690b3f8b | 1266 | } |
AnnaBridge | 165:d1b4690b3f8b | 1267 | |
AnnaBridge | 165:d1b4690b3f8b | 1268 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1269 | * @brief Disable CTS HW Flow Control |
AnnaBridge | 165:d1b4690b3f8b | 1270 | * @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl |
AnnaBridge | 165:d1b4690b3f8b | 1271 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1272 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1273 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1274 | __STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1275 | { |
AnnaBridge | 165:d1b4690b3f8b | 1276 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE); |
AnnaBridge | 165:d1b4690b3f8b | 1277 | } |
AnnaBridge | 165:d1b4690b3f8b | 1278 | |
AnnaBridge | 165:d1b4690b3f8b | 1279 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1280 | * @brief Configure HW Flow Control mode (both CTS and RTS) |
AnnaBridge | 165:d1b4690b3f8b | 1281 | * @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n |
AnnaBridge | 165:d1b4690b3f8b | 1282 | * CR3 CTSE LL_LPUART_SetHWFlowCtrl |
AnnaBridge | 165:d1b4690b3f8b | 1283 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1284 | * @param HardwareFlowControl This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1285 | * @arg @ref LL_LPUART_HWCONTROL_NONE |
AnnaBridge | 165:d1b4690b3f8b | 1286 | * @arg @ref LL_LPUART_HWCONTROL_RTS |
AnnaBridge | 165:d1b4690b3f8b | 1287 | * @arg @ref LL_LPUART_HWCONTROL_CTS |
AnnaBridge | 165:d1b4690b3f8b | 1288 | * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS |
AnnaBridge | 165:d1b4690b3f8b | 1289 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1290 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1291 | __STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HardwareFlowControl) |
AnnaBridge | 165:d1b4690b3f8b | 1292 | { |
AnnaBridge | 165:d1b4690b3f8b | 1293 | MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE, HardwareFlowControl); |
AnnaBridge | 165:d1b4690b3f8b | 1294 | } |
AnnaBridge | 165:d1b4690b3f8b | 1295 | |
AnnaBridge | 165:d1b4690b3f8b | 1296 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1297 | * @brief Return HW Flow Control configuration (both CTS and RTS) |
AnnaBridge | 165:d1b4690b3f8b | 1298 | * @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n |
AnnaBridge | 165:d1b4690b3f8b | 1299 | * CR3 CTSE LL_LPUART_GetHWFlowCtrl |
AnnaBridge | 165:d1b4690b3f8b | 1300 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1301 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1302 | * @arg @ref LL_LPUART_HWCONTROL_NONE |
AnnaBridge | 165:d1b4690b3f8b | 1303 | * @arg @ref LL_LPUART_HWCONTROL_RTS |
AnnaBridge | 165:d1b4690b3f8b | 1304 | * @arg @ref LL_LPUART_HWCONTROL_CTS |
AnnaBridge | 165:d1b4690b3f8b | 1305 | * @arg @ref LL_LPUART_HWCONTROL_RTS_CTS |
AnnaBridge | 165:d1b4690b3f8b | 1306 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1307 | __STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1308 | { |
AnnaBridge | 165:d1b4690b3f8b | 1309 | return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE | USART_CR3_CTSE)); |
AnnaBridge | 165:d1b4690b3f8b | 1310 | } |
AnnaBridge | 165:d1b4690b3f8b | 1311 | |
AnnaBridge | 165:d1b4690b3f8b | 1312 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1313 | * @brief Enable Overrun detection |
AnnaBridge | 165:d1b4690b3f8b | 1314 | * @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect |
AnnaBridge | 165:d1b4690b3f8b | 1315 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1316 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1317 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1318 | __STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1319 | { |
AnnaBridge | 165:d1b4690b3f8b | 1320 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS); |
AnnaBridge | 165:d1b4690b3f8b | 1321 | } |
AnnaBridge | 165:d1b4690b3f8b | 1322 | |
AnnaBridge | 165:d1b4690b3f8b | 1323 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1324 | * @brief Disable Overrun detection |
AnnaBridge | 165:d1b4690b3f8b | 1325 | * @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect |
AnnaBridge | 165:d1b4690b3f8b | 1326 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1327 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1328 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1329 | __STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1330 | { |
AnnaBridge | 165:d1b4690b3f8b | 1331 | SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS); |
AnnaBridge | 165:d1b4690b3f8b | 1332 | } |
AnnaBridge | 165:d1b4690b3f8b | 1333 | |
AnnaBridge | 165:d1b4690b3f8b | 1334 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1335 | * @brief Indicate if Overrun detection is enabled |
AnnaBridge | 165:d1b4690b3f8b | 1336 | * @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect |
AnnaBridge | 165:d1b4690b3f8b | 1337 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1338 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1339 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1340 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1341 | { |
AnnaBridge | 165:d1b4690b3f8b | 1342 | return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS); |
AnnaBridge | 165:d1b4690b3f8b | 1343 | } |
AnnaBridge | 165:d1b4690b3f8b | 1344 | |
AnnaBridge | 165:d1b4690b3f8b | 1345 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1346 | * @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits) |
AnnaBridge | 165:d1b4690b3f8b | 1347 | * @rmtoll CR3 WUS LL_LPUART_SetWKUPType |
AnnaBridge | 165:d1b4690b3f8b | 1348 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1349 | * @param Type This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1350 | * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS |
AnnaBridge | 165:d1b4690b3f8b | 1351 | * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT |
AnnaBridge | 165:d1b4690b3f8b | 1352 | * @arg @ref LL_LPUART_WAKEUP_ON_RXNE |
AnnaBridge | 165:d1b4690b3f8b | 1353 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1354 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1355 | __STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type) |
AnnaBridge | 165:d1b4690b3f8b | 1356 | { |
AnnaBridge | 165:d1b4690b3f8b | 1357 | MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type); |
AnnaBridge | 165:d1b4690b3f8b | 1358 | } |
AnnaBridge | 165:d1b4690b3f8b | 1359 | |
AnnaBridge | 165:d1b4690b3f8b | 1360 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1361 | * @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits) |
AnnaBridge | 165:d1b4690b3f8b | 1362 | * @rmtoll CR3 WUS LL_LPUART_GetWKUPType |
AnnaBridge | 165:d1b4690b3f8b | 1363 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1364 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1365 | * @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS |
AnnaBridge | 165:d1b4690b3f8b | 1366 | * @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT |
AnnaBridge | 165:d1b4690b3f8b | 1367 | * @arg @ref LL_LPUART_WAKEUP_ON_RXNE |
AnnaBridge | 165:d1b4690b3f8b | 1368 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1369 | __STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1370 | { |
AnnaBridge | 165:d1b4690b3f8b | 1371 | return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS)); |
AnnaBridge | 165:d1b4690b3f8b | 1372 | } |
AnnaBridge | 165:d1b4690b3f8b | 1373 | |
AnnaBridge | 165:d1b4690b3f8b | 1374 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1375 | * @brief Configure LPUART BRR register for achieving expected Baud Rate value. |
AnnaBridge | 165:d1b4690b3f8b | 1376 | * |
AnnaBridge | 165:d1b4690b3f8b | 1377 | * @note Compute and set LPUARTDIV value in BRR Register (full BRR content) |
AnnaBridge | 165:d1b4690b3f8b | 1378 | * according to used Peripheral Clock and expected Baud Rate values |
AnnaBridge | 165:d1b4690b3f8b | 1379 | * @note Peripheral clock and Baud Rate values provided as function parameters should be valid |
AnnaBridge | 165:d1b4690b3f8b | 1380 | * (Baud rate value != 0). |
AnnaBridge | 165:d1b4690b3f8b | 1381 | * @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit, |
AnnaBridge | 165:d1b4690b3f8b | 1382 | * a care should be taken when generating high baud rates using high PeriphClk |
AnnaBridge | 165:d1b4690b3f8b | 1383 | * values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate]. |
AnnaBridge | 165:d1b4690b3f8b | 1384 | * @rmtoll BRR BRR LL_LPUART_SetBaudRate |
AnnaBridge | 165:d1b4690b3f8b | 1385 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1386 | * @param PeriphClk Peripheral Clock |
AnnaBridge | 165:d1b4690b3f8b | 1387 | @if USART_PRESC_PRESCALER |
AnnaBridge | 165:d1b4690b3f8b | 1388 | * @param PrescalerValue This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1389 | * @arg @ref LL_LPUART_PRESCALER_DIV1 |
AnnaBridge | 165:d1b4690b3f8b | 1390 | * @arg @ref LL_LPUART_PRESCALER_DIV2 |
AnnaBridge | 165:d1b4690b3f8b | 1391 | * @arg @ref LL_LPUART_PRESCALER_DIV4 |
AnnaBridge | 165:d1b4690b3f8b | 1392 | * @arg @ref LL_LPUART_PRESCALER_DIV6 |
AnnaBridge | 165:d1b4690b3f8b | 1393 | * @arg @ref LL_LPUART_PRESCALER_DIV8 |
AnnaBridge | 165:d1b4690b3f8b | 1394 | * @arg @ref LL_LPUART_PRESCALER_DIV10 |
AnnaBridge | 165:d1b4690b3f8b | 1395 | * @arg @ref LL_LPUART_PRESCALER_DIV12 |
AnnaBridge | 165:d1b4690b3f8b | 1396 | * @arg @ref LL_LPUART_PRESCALER_DIV16 |
AnnaBridge | 165:d1b4690b3f8b | 1397 | * @arg @ref LL_LPUART_PRESCALER_DIV32 |
AnnaBridge | 165:d1b4690b3f8b | 1398 | * @arg @ref LL_LPUART_PRESCALER_DIV64 |
AnnaBridge | 165:d1b4690b3f8b | 1399 | * @arg @ref LL_LPUART_PRESCALER_DIV128 |
AnnaBridge | 165:d1b4690b3f8b | 1400 | * @arg @ref LL_LPUART_PRESCALER_DIV256 |
AnnaBridge | 165:d1b4690b3f8b | 1401 | @endif |
AnnaBridge | 165:d1b4690b3f8b | 1402 | * @param BaudRate Baud Rate |
AnnaBridge | 165:d1b4690b3f8b | 1403 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1404 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1405 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 1406 | __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue, uint32_t BaudRate) |
AnnaBridge | 165:d1b4690b3f8b | 1407 | #else |
AnnaBridge | 165:d1b4690b3f8b | 1408 | __STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate) |
AnnaBridge | 165:d1b4690b3f8b | 1409 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1410 | { |
AnnaBridge | 165:d1b4690b3f8b | 1411 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 1412 | LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, PrescalerValue, BaudRate); |
AnnaBridge | 165:d1b4690b3f8b | 1413 | #else |
AnnaBridge | 165:d1b4690b3f8b | 1414 | LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate); |
AnnaBridge | 165:d1b4690b3f8b | 1415 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1416 | } |
AnnaBridge | 165:d1b4690b3f8b | 1417 | |
AnnaBridge | 165:d1b4690b3f8b | 1418 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1419 | * @brief Return current Baud Rate value, according to LPUARTDIV present in BRR register |
AnnaBridge | 165:d1b4690b3f8b | 1420 | * (full BRR content), and to used Peripheral Clock values |
AnnaBridge | 165:d1b4690b3f8b | 1421 | * @note In case of non-initialized or invalid value stored in BRR register, value 0 will be returned. |
AnnaBridge | 165:d1b4690b3f8b | 1422 | * @rmtoll BRR BRR LL_LPUART_GetBaudRate |
AnnaBridge | 165:d1b4690b3f8b | 1423 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1424 | * @param PeriphClk Peripheral Clock |
AnnaBridge | 165:d1b4690b3f8b | 1425 | @if USART_PRESC_PRESCALER |
AnnaBridge | 165:d1b4690b3f8b | 1426 | * @param PrescalerValue This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1427 | * @arg @ref LL_LPUART_PRESCALER_DIV1 |
AnnaBridge | 165:d1b4690b3f8b | 1428 | * @arg @ref LL_LPUART_PRESCALER_DIV2 |
AnnaBridge | 165:d1b4690b3f8b | 1429 | * @arg @ref LL_LPUART_PRESCALER_DIV4 |
AnnaBridge | 165:d1b4690b3f8b | 1430 | * @arg @ref LL_LPUART_PRESCALER_DIV6 |
AnnaBridge | 165:d1b4690b3f8b | 1431 | * @arg @ref LL_LPUART_PRESCALER_DIV8 |
AnnaBridge | 165:d1b4690b3f8b | 1432 | * @arg @ref LL_LPUART_PRESCALER_DIV10 |
AnnaBridge | 165:d1b4690b3f8b | 1433 | * @arg @ref LL_LPUART_PRESCALER_DIV12 |
AnnaBridge | 165:d1b4690b3f8b | 1434 | * @arg @ref LL_LPUART_PRESCALER_DIV16 |
AnnaBridge | 165:d1b4690b3f8b | 1435 | * @arg @ref LL_LPUART_PRESCALER_DIV32 |
AnnaBridge | 165:d1b4690b3f8b | 1436 | * @arg @ref LL_LPUART_PRESCALER_DIV64 |
AnnaBridge | 165:d1b4690b3f8b | 1437 | * @arg @ref LL_LPUART_PRESCALER_DIV128 |
AnnaBridge | 165:d1b4690b3f8b | 1438 | * @arg @ref LL_LPUART_PRESCALER_DIV256 |
AnnaBridge | 165:d1b4690b3f8b | 1439 | @endif |
AnnaBridge | 165:d1b4690b3f8b | 1440 | * @retval Baud Rate |
AnnaBridge | 165:d1b4690b3f8b | 1441 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1442 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 1443 | __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t PrescalerValue) |
AnnaBridge | 165:d1b4690b3f8b | 1444 | #else |
AnnaBridge | 165:d1b4690b3f8b | 1445 | __STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk) |
AnnaBridge | 165:d1b4690b3f8b | 1446 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1447 | { |
AnnaBridge | 165:d1b4690b3f8b | 1448 | register uint32_t lpuartdiv = 0x0U; |
AnnaBridge | 165:d1b4690b3f8b | 1449 | register uint32_t brrresult = 0x0U; |
AnnaBridge | 165:d1b4690b3f8b | 1450 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 1451 | register uint32_t periphclkpresc = (uint32_t)(PeriphClk / (LPUART_PRESCALER_TAB[PrescalerValue])); |
AnnaBridge | 165:d1b4690b3f8b | 1452 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1453 | |
AnnaBridge | 165:d1b4690b3f8b | 1454 | lpuartdiv = LPUARTx->BRR & LPUART_BRR_MASK; |
AnnaBridge | 165:d1b4690b3f8b | 1455 | |
AnnaBridge | 165:d1b4690b3f8b | 1456 | if (lpuartdiv >= LPUART_BRR_MIN_VALUE) |
AnnaBridge | 165:d1b4690b3f8b | 1457 | { |
AnnaBridge | 165:d1b4690b3f8b | 1458 | #if defined(USART_PRESC_PRESCALER) |
AnnaBridge | 165:d1b4690b3f8b | 1459 | brrresult = (uint32_t)(((uint64_t)(periphclkpresc) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv); |
AnnaBridge | 165:d1b4690b3f8b | 1460 | #else |
AnnaBridge | 165:d1b4690b3f8b | 1461 | brrresult = (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / lpuartdiv); |
AnnaBridge | 165:d1b4690b3f8b | 1462 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1463 | } |
AnnaBridge | 165:d1b4690b3f8b | 1464 | |
AnnaBridge | 165:d1b4690b3f8b | 1465 | return (brrresult); |
AnnaBridge | 165:d1b4690b3f8b | 1466 | } |
AnnaBridge | 165:d1b4690b3f8b | 1467 | |
AnnaBridge | 165:d1b4690b3f8b | 1468 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1469 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 1470 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1471 | |
AnnaBridge | 165:d1b4690b3f8b | 1472 | /** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature |
AnnaBridge | 165:d1b4690b3f8b | 1473 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 1474 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1475 | |
AnnaBridge | 165:d1b4690b3f8b | 1476 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1477 | * @brief Enable Single Wire Half-Duplex mode |
AnnaBridge | 165:d1b4690b3f8b | 1478 | * @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex |
AnnaBridge | 165:d1b4690b3f8b | 1479 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1480 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1481 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1482 | __STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1483 | { |
AnnaBridge | 165:d1b4690b3f8b | 1484 | SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL); |
AnnaBridge | 165:d1b4690b3f8b | 1485 | } |
AnnaBridge | 165:d1b4690b3f8b | 1486 | |
AnnaBridge | 165:d1b4690b3f8b | 1487 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1488 | * @brief Disable Single Wire Half-Duplex mode |
AnnaBridge | 165:d1b4690b3f8b | 1489 | * @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex |
AnnaBridge | 165:d1b4690b3f8b | 1490 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1491 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1492 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1493 | __STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1494 | { |
AnnaBridge | 165:d1b4690b3f8b | 1495 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL); |
AnnaBridge | 165:d1b4690b3f8b | 1496 | } |
AnnaBridge | 165:d1b4690b3f8b | 1497 | |
AnnaBridge | 165:d1b4690b3f8b | 1498 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1499 | * @brief Indicate if Single Wire Half-Duplex mode is enabled |
AnnaBridge | 165:d1b4690b3f8b | 1500 | * @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex |
AnnaBridge | 165:d1b4690b3f8b | 1501 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1502 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1503 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1504 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1505 | { |
AnnaBridge | 165:d1b4690b3f8b | 1506 | return (READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL)); |
AnnaBridge | 165:d1b4690b3f8b | 1507 | } |
AnnaBridge | 165:d1b4690b3f8b | 1508 | |
AnnaBridge | 165:d1b4690b3f8b | 1509 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1510 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 1511 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1512 | |
AnnaBridge | 165:d1b4690b3f8b | 1513 | /** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature |
AnnaBridge | 165:d1b4690b3f8b | 1514 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 1515 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1516 | |
AnnaBridge | 165:d1b4690b3f8b | 1517 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1518 | * @brief Set DEDT (Driver Enable De-Assertion Time), Time value expressed on 5 bits ([4:0] bits). |
AnnaBridge | 165:d1b4690b3f8b | 1519 | * @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime |
AnnaBridge | 165:d1b4690b3f8b | 1520 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1521 | * @param Time Value between Min_Data=0 and Max_Data=31 |
AnnaBridge | 165:d1b4690b3f8b | 1522 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1523 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1524 | __STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time) |
AnnaBridge | 165:d1b4690b3f8b | 1525 | { |
AnnaBridge | 165:d1b4690b3f8b | 1526 | MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << USART_CR1_DEDT_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 1527 | } |
AnnaBridge | 165:d1b4690b3f8b | 1528 | |
AnnaBridge | 165:d1b4690b3f8b | 1529 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1530 | * @brief Return DEDT (Driver Enable De-Assertion Time) |
AnnaBridge | 165:d1b4690b3f8b | 1531 | * @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime |
AnnaBridge | 165:d1b4690b3f8b | 1532 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1533 | * @retval Time value expressed on 5 bits ([4:0] bits) : c |
AnnaBridge | 165:d1b4690b3f8b | 1534 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1535 | __STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1536 | { |
AnnaBridge | 165:d1b4690b3f8b | 1537 | return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> USART_CR1_DEDT_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 1538 | } |
AnnaBridge | 165:d1b4690b3f8b | 1539 | |
AnnaBridge | 165:d1b4690b3f8b | 1540 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1541 | * @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits). |
AnnaBridge | 165:d1b4690b3f8b | 1542 | * @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime |
AnnaBridge | 165:d1b4690b3f8b | 1543 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1544 | * @param Time Value between Min_Data=0 and Max_Data=31 |
AnnaBridge | 165:d1b4690b3f8b | 1545 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1546 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1547 | __STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time) |
AnnaBridge | 165:d1b4690b3f8b | 1548 | { |
AnnaBridge | 165:d1b4690b3f8b | 1549 | MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << USART_CR1_DEAT_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 1550 | } |
AnnaBridge | 165:d1b4690b3f8b | 1551 | |
AnnaBridge | 165:d1b4690b3f8b | 1552 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1553 | * @brief Return DEAT (Driver Enable Assertion Time) |
AnnaBridge | 165:d1b4690b3f8b | 1554 | * @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime |
AnnaBridge | 165:d1b4690b3f8b | 1555 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1556 | * @retval Time value expressed on 5 bits ([4:0] bits) : Time Value between Min_Data=0 and Max_Data=31 |
AnnaBridge | 165:d1b4690b3f8b | 1557 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1558 | __STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1559 | { |
AnnaBridge | 165:d1b4690b3f8b | 1560 | return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> USART_CR1_DEAT_Pos); |
AnnaBridge | 165:d1b4690b3f8b | 1561 | } |
AnnaBridge | 165:d1b4690b3f8b | 1562 | |
AnnaBridge | 165:d1b4690b3f8b | 1563 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1564 | * @brief Enable Driver Enable (DE) Mode |
AnnaBridge | 165:d1b4690b3f8b | 1565 | * @rmtoll CR3 DEM LL_LPUART_EnableDEMode |
AnnaBridge | 165:d1b4690b3f8b | 1566 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1567 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1568 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1569 | __STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1570 | { |
AnnaBridge | 165:d1b4690b3f8b | 1571 | SET_BIT(LPUARTx->CR3, USART_CR3_DEM); |
AnnaBridge | 165:d1b4690b3f8b | 1572 | } |
AnnaBridge | 165:d1b4690b3f8b | 1573 | |
AnnaBridge | 165:d1b4690b3f8b | 1574 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1575 | * @brief Disable Driver Enable (DE) Mode |
AnnaBridge | 165:d1b4690b3f8b | 1576 | * @rmtoll CR3 DEM LL_LPUART_DisableDEMode |
AnnaBridge | 165:d1b4690b3f8b | 1577 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1578 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1579 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1580 | __STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1581 | { |
AnnaBridge | 165:d1b4690b3f8b | 1582 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM); |
AnnaBridge | 165:d1b4690b3f8b | 1583 | } |
AnnaBridge | 165:d1b4690b3f8b | 1584 | |
AnnaBridge | 165:d1b4690b3f8b | 1585 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1586 | * @brief Indicate if Driver Enable (DE) Mode is enabled |
AnnaBridge | 165:d1b4690b3f8b | 1587 | * @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode |
AnnaBridge | 165:d1b4690b3f8b | 1588 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1589 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1590 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1591 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1592 | { |
AnnaBridge | 165:d1b4690b3f8b | 1593 | return (READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM)); |
AnnaBridge | 165:d1b4690b3f8b | 1594 | } |
AnnaBridge | 165:d1b4690b3f8b | 1595 | |
AnnaBridge | 165:d1b4690b3f8b | 1596 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1597 | * @brief Select Driver Enable Polarity |
AnnaBridge | 165:d1b4690b3f8b | 1598 | * @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity |
AnnaBridge | 165:d1b4690b3f8b | 1599 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1600 | * @param Polarity This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1601 | * @arg @ref LL_LPUART_DE_POLARITY_HIGH |
AnnaBridge | 165:d1b4690b3f8b | 1602 | * @arg @ref LL_LPUART_DE_POLARITY_LOW |
AnnaBridge | 165:d1b4690b3f8b | 1603 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1604 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1605 | __STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity) |
AnnaBridge | 165:d1b4690b3f8b | 1606 | { |
AnnaBridge | 165:d1b4690b3f8b | 1607 | MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity); |
AnnaBridge | 165:d1b4690b3f8b | 1608 | } |
AnnaBridge | 165:d1b4690b3f8b | 1609 | |
AnnaBridge | 165:d1b4690b3f8b | 1610 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1611 | * @brief Return Driver Enable Polarity |
AnnaBridge | 165:d1b4690b3f8b | 1612 | * @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity |
AnnaBridge | 165:d1b4690b3f8b | 1613 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1614 | * @retval Returned value can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 1615 | * @arg @ref LL_LPUART_DE_POLARITY_HIGH |
AnnaBridge | 165:d1b4690b3f8b | 1616 | * @arg @ref LL_LPUART_DE_POLARITY_LOW |
AnnaBridge | 165:d1b4690b3f8b | 1617 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1618 | __STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1619 | { |
AnnaBridge | 165:d1b4690b3f8b | 1620 | return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP)); |
AnnaBridge | 165:d1b4690b3f8b | 1621 | } |
AnnaBridge | 165:d1b4690b3f8b | 1622 | |
AnnaBridge | 165:d1b4690b3f8b | 1623 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1624 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 1625 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1626 | |
AnnaBridge | 165:d1b4690b3f8b | 1627 | /** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management |
AnnaBridge | 165:d1b4690b3f8b | 1628 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 1629 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1630 | |
AnnaBridge | 165:d1b4690b3f8b | 1631 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1632 | * @brief Check if the LPUART Parity Error Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1633 | * @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE |
AnnaBridge | 165:d1b4690b3f8b | 1634 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1635 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1636 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1637 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1638 | { |
AnnaBridge | 165:d1b4690b3f8b | 1639 | return (READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE)); |
AnnaBridge | 165:d1b4690b3f8b | 1640 | } |
AnnaBridge | 165:d1b4690b3f8b | 1641 | |
AnnaBridge | 165:d1b4690b3f8b | 1642 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1643 | * @brief Check if the LPUART Framing Error Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1644 | * @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE |
AnnaBridge | 165:d1b4690b3f8b | 1645 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1646 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1647 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1648 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1649 | { |
AnnaBridge | 165:d1b4690b3f8b | 1650 | return (READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE)); |
AnnaBridge | 165:d1b4690b3f8b | 1651 | } |
AnnaBridge | 165:d1b4690b3f8b | 1652 | |
AnnaBridge | 165:d1b4690b3f8b | 1653 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1654 | * @brief Check if the LPUART Noise error detected Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1655 | * @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE |
AnnaBridge | 165:d1b4690b3f8b | 1656 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1657 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1658 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1659 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1660 | { |
AnnaBridge | 165:d1b4690b3f8b | 1661 | return (READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE)); |
AnnaBridge | 165:d1b4690b3f8b | 1662 | } |
AnnaBridge | 165:d1b4690b3f8b | 1663 | |
AnnaBridge | 165:d1b4690b3f8b | 1664 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1665 | * @brief Check if the LPUART OverRun Error Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1666 | * @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE |
AnnaBridge | 165:d1b4690b3f8b | 1667 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1668 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1669 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1670 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1671 | { |
AnnaBridge | 165:d1b4690b3f8b | 1672 | return (READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE)); |
AnnaBridge | 165:d1b4690b3f8b | 1673 | } |
AnnaBridge | 165:d1b4690b3f8b | 1674 | |
AnnaBridge | 165:d1b4690b3f8b | 1675 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1676 | * @brief Check if the LPUART IDLE line detected Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1677 | * @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE |
AnnaBridge | 165:d1b4690b3f8b | 1678 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1679 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1680 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1681 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1682 | { |
AnnaBridge | 165:d1b4690b3f8b | 1683 | return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE)); |
AnnaBridge | 165:d1b4690b3f8b | 1684 | } |
AnnaBridge | 165:d1b4690b3f8b | 1685 | |
AnnaBridge | 165:d1b4690b3f8b | 1686 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 1687 | |
AnnaBridge | 165:d1b4690b3f8b | 1688 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 1689 | #define LL_LPUART_IsActiveFlag_RXNE LL_LPUART_IsActiveFlag_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 1690 | |
AnnaBridge | 165:d1b4690b3f8b | 1691 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1692 | * @brief Check if the LPUART Read Data Register or LPUART RX FIFO Not Empty Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1693 | * @rmtoll ISR RXNE_RXFNE LL_LPUART_IsActiveFlag_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 1694 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1695 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1696 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1697 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE_RXFNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1698 | { |
AnnaBridge | 165:d1b4690b3f8b | 1699 | return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE_RXFNE) == (USART_ISR_RXNE_RXFNE)); |
AnnaBridge | 165:d1b4690b3f8b | 1700 | } |
AnnaBridge | 165:d1b4690b3f8b | 1701 | #else |
AnnaBridge | 165:d1b4690b3f8b | 1702 | |
AnnaBridge | 165:d1b4690b3f8b | 1703 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1704 | * @brief Check if the LPUART Read Data Register Not Empty Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1705 | * @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE |
AnnaBridge | 165:d1b4690b3f8b | 1706 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1707 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1708 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1709 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1710 | { |
AnnaBridge | 165:d1b4690b3f8b | 1711 | return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE)); |
AnnaBridge | 165:d1b4690b3f8b | 1712 | } |
AnnaBridge | 165:d1b4690b3f8b | 1713 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1714 | |
AnnaBridge | 165:d1b4690b3f8b | 1715 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1716 | * @brief Check if the LPUART Transmission Complete Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1717 | * @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC |
AnnaBridge | 165:d1b4690b3f8b | 1718 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1719 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1720 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1721 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1722 | { |
AnnaBridge | 165:d1b4690b3f8b | 1723 | return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC)); |
AnnaBridge | 165:d1b4690b3f8b | 1724 | } |
AnnaBridge | 165:d1b4690b3f8b | 1725 | |
AnnaBridge | 165:d1b4690b3f8b | 1726 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 1727 | |
AnnaBridge | 165:d1b4690b3f8b | 1728 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 1729 | #define LL_LPUART_IsActiveFlag_TXE LL_LPUART_IsActiveFlag_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 1730 | |
AnnaBridge | 165:d1b4690b3f8b | 1731 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1732 | * @brief Check if the LPUART Transmit Data Register Empty or LPUART TX FIFO Not Full Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1733 | * @rmtoll ISR TXE_TXFNF LL_LPUART_IsActiveFlag_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 1734 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1735 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1736 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1737 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE_TXFNF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1738 | { |
AnnaBridge | 165:d1b4690b3f8b | 1739 | return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE_TXFNF) == (USART_ISR_TXE_TXFNF)); |
AnnaBridge | 165:d1b4690b3f8b | 1740 | } |
AnnaBridge | 165:d1b4690b3f8b | 1741 | #else |
AnnaBridge | 165:d1b4690b3f8b | 1742 | |
AnnaBridge | 165:d1b4690b3f8b | 1743 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1744 | * @brief Check if the LPUART Transmit Data Register Empty Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1745 | * @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE |
AnnaBridge | 165:d1b4690b3f8b | 1746 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1747 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1748 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1749 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1750 | { |
AnnaBridge | 165:d1b4690b3f8b | 1751 | return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE)); |
AnnaBridge | 165:d1b4690b3f8b | 1752 | } |
AnnaBridge | 165:d1b4690b3f8b | 1753 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1754 | |
AnnaBridge | 165:d1b4690b3f8b | 1755 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1756 | * @brief Check if the LPUART CTS interrupt Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1757 | * @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS |
AnnaBridge | 165:d1b4690b3f8b | 1758 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1759 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1760 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1761 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1762 | { |
AnnaBridge | 165:d1b4690b3f8b | 1763 | return (READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF)); |
AnnaBridge | 165:d1b4690b3f8b | 1764 | } |
AnnaBridge | 165:d1b4690b3f8b | 1765 | |
AnnaBridge | 165:d1b4690b3f8b | 1766 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1767 | * @brief Check if the LPUART CTS Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1768 | * @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS |
AnnaBridge | 165:d1b4690b3f8b | 1769 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1770 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1771 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1772 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1773 | { |
AnnaBridge | 165:d1b4690b3f8b | 1774 | return (READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS)); |
AnnaBridge | 165:d1b4690b3f8b | 1775 | } |
AnnaBridge | 165:d1b4690b3f8b | 1776 | |
AnnaBridge | 165:d1b4690b3f8b | 1777 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1778 | * @brief Check if the LPUART Busy Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1779 | * @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY |
AnnaBridge | 165:d1b4690b3f8b | 1780 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1781 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1782 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1783 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1784 | { |
AnnaBridge | 165:d1b4690b3f8b | 1785 | return (READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY)); |
AnnaBridge | 165:d1b4690b3f8b | 1786 | } |
AnnaBridge | 165:d1b4690b3f8b | 1787 | |
AnnaBridge | 165:d1b4690b3f8b | 1788 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1789 | * @brief Check if the LPUART Character Match Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1790 | * @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM |
AnnaBridge | 165:d1b4690b3f8b | 1791 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1792 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1793 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1794 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1795 | { |
AnnaBridge | 165:d1b4690b3f8b | 1796 | return (READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF)); |
AnnaBridge | 165:d1b4690b3f8b | 1797 | } |
AnnaBridge | 165:d1b4690b3f8b | 1798 | |
AnnaBridge | 165:d1b4690b3f8b | 1799 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1800 | * @brief Check if the LPUART Send Break Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1801 | * @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK |
AnnaBridge | 165:d1b4690b3f8b | 1802 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1803 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1804 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1805 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1806 | { |
AnnaBridge | 165:d1b4690b3f8b | 1807 | return (READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF)); |
AnnaBridge | 165:d1b4690b3f8b | 1808 | } |
AnnaBridge | 165:d1b4690b3f8b | 1809 | |
AnnaBridge | 165:d1b4690b3f8b | 1810 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1811 | * @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1812 | * @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU |
AnnaBridge | 165:d1b4690b3f8b | 1813 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1814 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1815 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1816 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1817 | { |
AnnaBridge | 165:d1b4690b3f8b | 1818 | return (READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU)); |
AnnaBridge | 165:d1b4690b3f8b | 1819 | } |
AnnaBridge | 165:d1b4690b3f8b | 1820 | |
AnnaBridge | 165:d1b4690b3f8b | 1821 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1822 | * @brief Check if the LPUART Wake Up from stop mode Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1823 | * @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP |
AnnaBridge | 165:d1b4690b3f8b | 1824 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1825 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1826 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1827 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1828 | { |
AnnaBridge | 165:d1b4690b3f8b | 1829 | return (READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF)); |
AnnaBridge | 165:d1b4690b3f8b | 1830 | } |
AnnaBridge | 165:d1b4690b3f8b | 1831 | |
AnnaBridge | 165:d1b4690b3f8b | 1832 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1833 | * @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1834 | * @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK |
AnnaBridge | 165:d1b4690b3f8b | 1835 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1836 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1837 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1838 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1839 | { |
AnnaBridge | 165:d1b4690b3f8b | 1840 | return (READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK)); |
AnnaBridge | 165:d1b4690b3f8b | 1841 | } |
AnnaBridge | 165:d1b4690b3f8b | 1842 | |
AnnaBridge | 165:d1b4690b3f8b | 1843 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1844 | * @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1845 | * @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK |
AnnaBridge | 165:d1b4690b3f8b | 1846 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1847 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1848 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1849 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1850 | { |
AnnaBridge | 165:d1b4690b3f8b | 1851 | return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK)); |
AnnaBridge | 165:d1b4690b3f8b | 1852 | } |
AnnaBridge | 165:d1b4690b3f8b | 1853 | |
AnnaBridge | 165:d1b4690b3f8b | 1854 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 1855 | |
AnnaBridge | 165:d1b4690b3f8b | 1856 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1857 | * @brief Check if the LPUART TX FIFO Empty Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1858 | * @rmtoll ISR TXFE LL_LPUART_IsActiveFlag_TXFE |
AnnaBridge | 165:d1b4690b3f8b | 1859 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1860 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1861 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1862 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1863 | { |
AnnaBridge | 165:d1b4690b3f8b | 1864 | return (READ_BIT(LPUARTx->ISR, USART_ISR_TXFE) == (USART_ISR_TXFE)); |
AnnaBridge | 165:d1b4690b3f8b | 1865 | } |
AnnaBridge | 165:d1b4690b3f8b | 1866 | |
AnnaBridge | 165:d1b4690b3f8b | 1867 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1868 | * @brief Check if the LPUART RX FIFO Full Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1869 | * @rmtoll ISR RXFF LL_LPUART_IsActiveFlag_RXFF |
AnnaBridge | 165:d1b4690b3f8b | 1870 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1871 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1872 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1873 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1874 | { |
AnnaBridge | 165:d1b4690b3f8b | 1875 | return (READ_BIT(LPUARTx->ISR, USART_ISR_RXFF) == (USART_ISR_RXFF)); |
AnnaBridge | 165:d1b4690b3f8b | 1876 | } |
AnnaBridge | 165:d1b4690b3f8b | 1877 | |
AnnaBridge | 165:d1b4690b3f8b | 1878 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1879 | * @brief Check if the LPUART TX FIFO Threshold Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1880 | * @rmtoll ISR TXFT LL_LPUART_IsActiveFlag_TXFT |
AnnaBridge | 165:d1b4690b3f8b | 1881 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1882 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1883 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1884 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1885 | { |
AnnaBridge | 165:d1b4690b3f8b | 1886 | return (READ_BIT(LPUARTx->ISR, USART_ISR_TXFT) == (USART_ISR_TXFT)); |
AnnaBridge | 165:d1b4690b3f8b | 1887 | } |
AnnaBridge | 165:d1b4690b3f8b | 1888 | |
AnnaBridge | 165:d1b4690b3f8b | 1889 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1890 | * @brief Check if the LPUART RX FIFO Threshold Flag is set or not |
AnnaBridge | 165:d1b4690b3f8b | 1891 | * @rmtoll ISR RXFT LL_LPUART_IsActiveFlag_RXFT |
AnnaBridge | 165:d1b4690b3f8b | 1892 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1893 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 1894 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1895 | __STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1896 | { |
AnnaBridge | 165:d1b4690b3f8b | 1897 | return (READ_BIT(LPUARTx->ISR, USART_ISR_RXFT) == (USART_ISR_RXFT)); |
AnnaBridge | 165:d1b4690b3f8b | 1898 | } |
AnnaBridge | 165:d1b4690b3f8b | 1899 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1900 | |
AnnaBridge | 165:d1b4690b3f8b | 1901 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1902 | * @brief Clear Parity Error Flag |
AnnaBridge | 165:d1b4690b3f8b | 1903 | * @rmtoll ICR PECF LL_LPUART_ClearFlag_PE |
AnnaBridge | 165:d1b4690b3f8b | 1904 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1905 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1906 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1907 | __STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1908 | { |
AnnaBridge | 165:d1b4690b3f8b | 1909 | WRITE_REG(LPUARTx->ICR, USART_ICR_PECF); |
AnnaBridge | 165:d1b4690b3f8b | 1910 | } |
AnnaBridge | 165:d1b4690b3f8b | 1911 | |
AnnaBridge | 165:d1b4690b3f8b | 1912 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1913 | * @brief Clear Framing Error Flag |
AnnaBridge | 165:d1b4690b3f8b | 1914 | * @rmtoll ICR FECF LL_LPUART_ClearFlag_FE |
AnnaBridge | 165:d1b4690b3f8b | 1915 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1916 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1917 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1918 | __STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1919 | { |
AnnaBridge | 165:d1b4690b3f8b | 1920 | WRITE_REG(LPUARTx->ICR, USART_ICR_FECF); |
AnnaBridge | 165:d1b4690b3f8b | 1921 | } |
AnnaBridge | 165:d1b4690b3f8b | 1922 | |
AnnaBridge | 165:d1b4690b3f8b | 1923 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1924 | * @brief Clear Noise detected Flag |
AnnaBridge | 165:d1b4690b3f8b | 1925 | * @rmtoll ICR NCF LL_LPUART_ClearFlag_NE |
AnnaBridge | 165:d1b4690b3f8b | 1926 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1927 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1928 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1929 | __STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1930 | { |
AnnaBridge | 165:d1b4690b3f8b | 1931 | WRITE_REG(LPUARTx->ICR, USART_ICR_NCF); |
AnnaBridge | 165:d1b4690b3f8b | 1932 | } |
AnnaBridge | 165:d1b4690b3f8b | 1933 | |
AnnaBridge | 165:d1b4690b3f8b | 1934 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1935 | * @brief Clear OverRun Error Flag |
AnnaBridge | 165:d1b4690b3f8b | 1936 | * @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE |
AnnaBridge | 165:d1b4690b3f8b | 1937 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1938 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1939 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1940 | __STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1941 | { |
AnnaBridge | 165:d1b4690b3f8b | 1942 | WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF); |
AnnaBridge | 165:d1b4690b3f8b | 1943 | } |
AnnaBridge | 165:d1b4690b3f8b | 1944 | |
AnnaBridge | 165:d1b4690b3f8b | 1945 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1946 | * @brief Clear IDLE line detected Flag |
AnnaBridge | 165:d1b4690b3f8b | 1947 | * @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE |
AnnaBridge | 165:d1b4690b3f8b | 1948 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1949 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1950 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1951 | __STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1952 | { |
AnnaBridge | 165:d1b4690b3f8b | 1953 | WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF); |
AnnaBridge | 165:d1b4690b3f8b | 1954 | } |
AnnaBridge | 165:d1b4690b3f8b | 1955 | |
AnnaBridge | 165:d1b4690b3f8b | 1956 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 1957 | |
AnnaBridge | 165:d1b4690b3f8b | 1958 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1959 | * @brief Clear TX FIFO Empty Flag |
AnnaBridge | 165:d1b4690b3f8b | 1960 | * @rmtoll ICR TXFECF LL_LPUART_ClearFlag_TXFE |
AnnaBridge | 165:d1b4690b3f8b | 1961 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1962 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1963 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1964 | __STATIC_INLINE void LL_LPUART_ClearFlag_TXFE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1965 | { |
AnnaBridge | 165:d1b4690b3f8b | 1966 | WRITE_REG(LPUARTx->ICR, USART_ICR_TXFECF); |
AnnaBridge | 165:d1b4690b3f8b | 1967 | } |
AnnaBridge | 165:d1b4690b3f8b | 1968 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 1969 | |
AnnaBridge | 165:d1b4690b3f8b | 1970 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1971 | * @brief Clear Transmission Complete Flag |
AnnaBridge | 165:d1b4690b3f8b | 1972 | * @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC |
AnnaBridge | 165:d1b4690b3f8b | 1973 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1974 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1975 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1976 | __STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1977 | { |
AnnaBridge | 165:d1b4690b3f8b | 1978 | WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF); |
AnnaBridge | 165:d1b4690b3f8b | 1979 | } |
AnnaBridge | 165:d1b4690b3f8b | 1980 | |
AnnaBridge | 165:d1b4690b3f8b | 1981 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1982 | * @brief Clear CTS Interrupt Flag |
AnnaBridge | 165:d1b4690b3f8b | 1983 | * @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS |
AnnaBridge | 165:d1b4690b3f8b | 1984 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1985 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1986 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1987 | __STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1988 | { |
AnnaBridge | 165:d1b4690b3f8b | 1989 | WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF); |
AnnaBridge | 165:d1b4690b3f8b | 1990 | } |
AnnaBridge | 165:d1b4690b3f8b | 1991 | |
AnnaBridge | 165:d1b4690b3f8b | 1992 | /** |
AnnaBridge | 165:d1b4690b3f8b | 1993 | * @brief Clear Character Match Flag |
AnnaBridge | 165:d1b4690b3f8b | 1994 | * @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM |
AnnaBridge | 165:d1b4690b3f8b | 1995 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 1996 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 1997 | */ |
AnnaBridge | 165:d1b4690b3f8b | 1998 | __STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 1999 | { |
AnnaBridge | 165:d1b4690b3f8b | 2000 | WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF); |
AnnaBridge | 165:d1b4690b3f8b | 2001 | } |
AnnaBridge | 165:d1b4690b3f8b | 2002 | |
AnnaBridge | 165:d1b4690b3f8b | 2003 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2004 | * @brief Clear Wake Up from stop mode Flag |
AnnaBridge | 165:d1b4690b3f8b | 2005 | * @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP |
AnnaBridge | 165:d1b4690b3f8b | 2006 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2007 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2008 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2009 | __STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2010 | { |
AnnaBridge | 165:d1b4690b3f8b | 2011 | WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF); |
AnnaBridge | 165:d1b4690b3f8b | 2012 | } |
AnnaBridge | 165:d1b4690b3f8b | 2013 | |
AnnaBridge | 165:d1b4690b3f8b | 2014 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2015 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2016 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2017 | |
AnnaBridge | 165:d1b4690b3f8b | 2018 | /** @defgroup LPUART_LL_EF_IT_Management IT_Management |
AnnaBridge | 165:d1b4690b3f8b | 2019 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 2020 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2021 | |
AnnaBridge | 165:d1b4690b3f8b | 2022 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2023 | * @brief Enable IDLE Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2024 | * @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE |
AnnaBridge | 165:d1b4690b3f8b | 2025 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2026 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2027 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2028 | __STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2029 | { |
AnnaBridge | 165:d1b4690b3f8b | 2030 | SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2031 | } |
AnnaBridge | 165:d1b4690b3f8b | 2032 | |
AnnaBridge | 165:d1b4690b3f8b | 2033 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2034 | |
AnnaBridge | 165:d1b4690b3f8b | 2035 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 2036 | #define LL_LPUART_EnableIT_RXNE LL_LPUART_EnableIT_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 2037 | |
AnnaBridge | 165:d1b4690b3f8b | 2038 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2039 | * @brief Enable RX Not Empty and RX FIFO Not Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2040 | * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_EnableIT_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 2041 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2042 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2043 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2044 | __STATIC_INLINE void LL_LPUART_EnableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2045 | { |
AnnaBridge | 165:d1b4690b3f8b | 2046 | SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2047 | } |
AnnaBridge | 165:d1b4690b3f8b | 2048 | #else |
AnnaBridge | 165:d1b4690b3f8b | 2049 | |
AnnaBridge | 165:d1b4690b3f8b | 2050 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2051 | * @brief Enable RX Not Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2052 | * @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE |
AnnaBridge | 165:d1b4690b3f8b | 2053 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2054 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2055 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2056 | __STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2057 | { |
AnnaBridge | 165:d1b4690b3f8b | 2058 | SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2059 | } |
AnnaBridge | 165:d1b4690b3f8b | 2060 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2061 | |
AnnaBridge | 165:d1b4690b3f8b | 2062 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2063 | * @brief Enable Transmission Complete Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2064 | * @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC |
AnnaBridge | 165:d1b4690b3f8b | 2065 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2066 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2067 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2068 | __STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2069 | { |
AnnaBridge | 165:d1b4690b3f8b | 2070 | SET_BIT(LPUARTx->CR1, USART_CR1_TCIE); |
AnnaBridge | 165:d1b4690b3f8b | 2071 | } |
AnnaBridge | 165:d1b4690b3f8b | 2072 | |
AnnaBridge | 165:d1b4690b3f8b | 2073 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2074 | |
AnnaBridge | 165:d1b4690b3f8b | 2075 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 2076 | #define LL_LPUART_EnableIT_TXE LL_LPUART_EnableIT_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 2077 | |
AnnaBridge | 165:d1b4690b3f8b | 2078 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2079 | * @brief Enable TX Empty and TX FIFO Not Full Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2080 | * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_EnableIT_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 2081 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2082 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2083 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2084 | __STATIC_INLINE void LL_LPUART_EnableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2085 | { |
AnnaBridge | 165:d1b4690b3f8b | 2086 | SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); |
AnnaBridge | 165:d1b4690b3f8b | 2087 | } |
AnnaBridge | 165:d1b4690b3f8b | 2088 | #else |
AnnaBridge | 165:d1b4690b3f8b | 2089 | |
AnnaBridge | 165:d1b4690b3f8b | 2090 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2091 | * @brief Enable TX Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2092 | * @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE |
AnnaBridge | 165:d1b4690b3f8b | 2093 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2094 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2095 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2096 | __STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2097 | { |
AnnaBridge | 165:d1b4690b3f8b | 2098 | SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2099 | } |
AnnaBridge | 165:d1b4690b3f8b | 2100 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2101 | |
AnnaBridge | 165:d1b4690b3f8b | 2102 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2103 | * @brief Enable Parity Error Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2104 | * @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE |
AnnaBridge | 165:d1b4690b3f8b | 2105 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2106 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2107 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2108 | __STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2109 | { |
AnnaBridge | 165:d1b4690b3f8b | 2110 | SET_BIT(LPUARTx->CR1, USART_CR1_PEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2111 | } |
AnnaBridge | 165:d1b4690b3f8b | 2112 | |
AnnaBridge | 165:d1b4690b3f8b | 2113 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2114 | * @brief Enable Character Match Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2115 | * @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM |
AnnaBridge | 165:d1b4690b3f8b | 2116 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2117 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2118 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2119 | __STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2120 | { |
AnnaBridge | 165:d1b4690b3f8b | 2121 | SET_BIT(LPUARTx->CR1, USART_CR1_CMIE); |
AnnaBridge | 165:d1b4690b3f8b | 2122 | } |
AnnaBridge | 165:d1b4690b3f8b | 2123 | |
AnnaBridge | 165:d1b4690b3f8b | 2124 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2125 | |
AnnaBridge | 165:d1b4690b3f8b | 2126 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2127 | * @brief Enable TX FIFO Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2128 | * @rmtoll CR1 TXFEIE LL_LPUART_EnableIT_TXFE |
AnnaBridge | 165:d1b4690b3f8b | 2129 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2130 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2131 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2132 | __STATIC_INLINE void LL_LPUART_EnableIT_TXFE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2133 | { |
AnnaBridge | 165:d1b4690b3f8b | 2134 | SET_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2135 | } |
AnnaBridge | 165:d1b4690b3f8b | 2136 | |
AnnaBridge | 165:d1b4690b3f8b | 2137 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2138 | * @brief Enable RX FIFO Full Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2139 | * @rmtoll CR1 RXFFIE LL_LPUART_EnableIT_RXFF |
AnnaBridge | 165:d1b4690b3f8b | 2140 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2141 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2142 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2143 | __STATIC_INLINE void LL_LPUART_EnableIT_RXFF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2144 | { |
AnnaBridge | 165:d1b4690b3f8b | 2145 | SET_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); |
AnnaBridge | 165:d1b4690b3f8b | 2146 | } |
AnnaBridge | 165:d1b4690b3f8b | 2147 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2148 | |
AnnaBridge | 165:d1b4690b3f8b | 2149 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2150 | * @brief Enable Error Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2151 | * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing |
AnnaBridge | 165:d1b4690b3f8b | 2152 | * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register). |
AnnaBridge | 165:d1b4690b3f8b | 2153 | * - 0: Interrupt is inhibited |
AnnaBridge | 165:d1b4690b3f8b | 2154 | * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register. |
AnnaBridge | 165:d1b4690b3f8b | 2155 | * @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR |
AnnaBridge | 165:d1b4690b3f8b | 2156 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2157 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2158 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2159 | __STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2160 | { |
AnnaBridge | 165:d1b4690b3f8b | 2161 | SET_BIT(LPUARTx->CR3, USART_CR3_EIE); |
AnnaBridge | 165:d1b4690b3f8b | 2162 | } |
AnnaBridge | 165:d1b4690b3f8b | 2163 | |
AnnaBridge | 165:d1b4690b3f8b | 2164 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2165 | * @brief Enable CTS Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2166 | * @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS |
AnnaBridge | 165:d1b4690b3f8b | 2167 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2168 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2169 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2170 | __STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2171 | { |
AnnaBridge | 165:d1b4690b3f8b | 2172 | SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE); |
AnnaBridge | 165:d1b4690b3f8b | 2173 | } |
AnnaBridge | 165:d1b4690b3f8b | 2174 | |
AnnaBridge | 165:d1b4690b3f8b | 2175 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2176 | * @brief Enable Wake Up from Stop Mode Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2177 | * @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP |
AnnaBridge | 165:d1b4690b3f8b | 2178 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2179 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2180 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2181 | __STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2182 | { |
AnnaBridge | 165:d1b4690b3f8b | 2183 | SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE); |
AnnaBridge | 165:d1b4690b3f8b | 2184 | } |
AnnaBridge | 165:d1b4690b3f8b | 2185 | |
AnnaBridge | 165:d1b4690b3f8b | 2186 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2187 | |
AnnaBridge | 165:d1b4690b3f8b | 2188 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2189 | * @brief Enable TX FIFO Threshold Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2190 | * @rmtoll CR3 TXFTIE LL_LPUART_EnableIT_TXFT |
AnnaBridge | 165:d1b4690b3f8b | 2191 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2192 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2193 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2194 | __STATIC_INLINE void LL_LPUART_EnableIT_TXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2195 | { |
AnnaBridge | 165:d1b4690b3f8b | 2196 | SET_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); |
AnnaBridge | 165:d1b4690b3f8b | 2197 | } |
AnnaBridge | 165:d1b4690b3f8b | 2198 | |
AnnaBridge | 165:d1b4690b3f8b | 2199 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2200 | * @brief Enable RX FIFO Threshold Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2201 | * @rmtoll CR3 RXFTIE LL_LPUART_EnableIT_RXFT |
AnnaBridge | 165:d1b4690b3f8b | 2202 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2203 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2204 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2205 | __STATIC_INLINE void LL_LPUART_EnableIT_RXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2206 | { |
AnnaBridge | 165:d1b4690b3f8b | 2207 | SET_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); |
AnnaBridge | 165:d1b4690b3f8b | 2208 | } |
AnnaBridge | 165:d1b4690b3f8b | 2209 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2210 | |
AnnaBridge | 165:d1b4690b3f8b | 2211 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2212 | * @brief Disable IDLE Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2213 | * @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE |
AnnaBridge | 165:d1b4690b3f8b | 2214 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2215 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2216 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2217 | __STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2218 | { |
AnnaBridge | 165:d1b4690b3f8b | 2219 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2220 | } |
AnnaBridge | 165:d1b4690b3f8b | 2221 | |
AnnaBridge | 165:d1b4690b3f8b | 2222 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2223 | |
AnnaBridge | 165:d1b4690b3f8b | 2224 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 2225 | #define LL_LPUART_DisableIT_RXNE LL_LPUART_DisableIT_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 2226 | |
AnnaBridge | 165:d1b4690b3f8b | 2227 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2228 | * @brief Disable RX Not Empty and RX FIFO Not Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2229 | * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_DisableIT_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 2230 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2231 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2232 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2233 | __STATIC_INLINE void LL_LPUART_DisableIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2234 | { |
AnnaBridge | 165:d1b4690b3f8b | 2235 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2236 | } |
AnnaBridge | 165:d1b4690b3f8b | 2237 | #else |
AnnaBridge | 165:d1b4690b3f8b | 2238 | |
AnnaBridge | 165:d1b4690b3f8b | 2239 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2240 | * @brief Disable RX Not Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2241 | * @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE |
AnnaBridge | 165:d1b4690b3f8b | 2242 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2243 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2244 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2245 | __STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2246 | { |
AnnaBridge | 165:d1b4690b3f8b | 2247 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2248 | } |
AnnaBridge | 165:d1b4690b3f8b | 2249 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2250 | |
AnnaBridge | 165:d1b4690b3f8b | 2251 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2252 | * @brief Disable Transmission Complete Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2253 | * @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC |
AnnaBridge | 165:d1b4690b3f8b | 2254 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2255 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2256 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2257 | __STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2258 | { |
AnnaBridge | 165:d1b4690b3f8b | 2259 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE); |
AnnaBridge | 165:d1b4690b3f8b | 2260 | } |
AnnaBridge | 165:d1b4690b3f8b | 2261 | |
AnnaBridge | 165:d1b4690b3f8b | 2262 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2263 | |
AnnaBridge | 165:d1b4690b3f8b | 2264 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 2265 | #define LL_LPUART_DisableIT_TXE LL_LPUART_DisableIT_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 2266 | |
AnnaBridge | 165:d1b4690b3f8b | 2267 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2268 | * @brief Disable TX Empty and TX FIFO Not Full Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2269 | * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_DisableIT_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 2270 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2271 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2272 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2273 | __STATIC_INLINE void LL_LPUART_DisableIT_TXE_TXFNF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2274 | { |
AnnaBridge | 165:d1b4690b3f8b | 2275 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE); |
AnnaBridge | 165:d1b4690b3f8b | 2276 | } |
AnnaBridge | 165:d1b4690b3f8b | 2277 | #else |
AnnaBridge | 165:d1b4690b3f8b | 2278 | |
AnnaBridge | 165:d1b4690b3f8b | 2279 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2280 | * @brief Disable TX Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2281 | * @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE |
AnnaBridge | 165:d1b4690b3f8b | 2282 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2283 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2284 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2285 | __STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2286 | { |
AnnaBridge | 165:d1b4690b3f8b | 2287 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2288 | } |
AnnaBridge | 165:d1b4690b3f8b | 2289 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2290 | |
AnnaBridge | 165:d1b4690b3f8b | 2291 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2292 | * @brief Disable Parity Error Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2293 | * @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE |
AnnaBridge | 165:d1b4690b3f8b | 2294 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2295 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2296 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2297 | __STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2298 | { |
AnnaBridge | 165:d1b4690b3f8b | 2299 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2300 | } |
AnnaBridge | 165:d1b4690b3f8b | 2301 | |
AnnaBridge | 165:d1b4690b3f8b | 2302 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2303 | * @brief Disable Character Match Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2304 | * @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM |
AnnaBridge | 165:d1b4690b3f8b | 2305 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2306 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2307 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2308 | __STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2309 | { |
AnnaBridge | 165:d1b4690b3f8b | 2310 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE); |
AnnaBridge | 165:d1b4690b3f8b | 2311 | } |
AnnaBridge | 165:d1b4690b3f8b | 2312 | |
AnnaBridge | 165:d1b4690b3f8b | 2313 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2314 | |
AnnaBridge | 165:d1b4690b3f8b | 2315 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2316 | * @brief Disable TX FIFO Empty Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2317 | * @rmtoll CR1 TXFEIE LL_LPUART_DisableIT_TXFE |
AnnaBridge | 165:d1b4690b3f8b | 2318 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2319 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2320 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2321 | __STATIC_INLINE void LL_LPUART_DisableIT_TXFE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2322 | { |
AnnaBridge | 165:d1b4690b3f8b | 2323 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXFEIE); |
AnnaBridge | 165:d1b4690b3f8b | 2324 | } |
AnnaBridge | 165:d1b4690b3f8b | 2325 | |
AnnaBridge | 165:d1b4690b3f8b | 2326 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2327 | * @brief Disable RX FIFO Full Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2328 | * @rmtoll CR1 RXFFIE LL_LPUART_DisableIT_RXFF |
AnnaBridge | 165:d1b4690b3f8b | 2329 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2330 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2331 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2332 | __STATIC_INLINE void LL_LPUART_DisableIT_RXFF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2333 | { |
AnnaBridge | 165:d1b4690b3f8b | 2334 | CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXFFIE); |
AnnaBridge | 165:d1b4690b3f8b | 2335 | } |
AnnaBridge | 165:d1b4690b3f8b | 2336 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2337 | |
AnnaBridge | 165:d1b4690b3f8b | 2338 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2339 | * @brief Disable Error Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2340 | * @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing |
AnnaBridge | 165:d1b4690b3f8b | 2341 | * error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register). |
AnnaBridge | 165:d1b4690b3f8b | 2342 | * - 0: Interrupt is inhibited |
AnnaBridge | 165:d1b4690b3f8b | 2343 | * - 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register. |
AnnaBridge | 165:d1b4690b3f8b | 2344 | * @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR |
AnnaBridge | 165:d1b4690b3f8b | 2345 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2346 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2347 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2348 | __STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2349 | { |
AnnaBridge | 165:d1b4690b3f8b | 2350 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE); |
AnnaBridge | 165:d1b4690b3f8b | 2351 | } |
AnnaBridge | 165:d1b4690b3f8b | 2352 | |
AnnaBridge | 165:d1b4690b3f8b | 2353 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2354 | * @brief Disable CTS Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2355 | * @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS |
AnnaBridge | 165:d1b4690b3f8b | 2356 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2357 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2358 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2359 | __STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2360 | { |
AnnaBridge | 165:d1b4690b3f8b | 2361 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE); |
AnnaBridge | 165:d1b4690b3f8b | 2362 | } |
AnnaBridge | 165:d1b4690b3f8b | 2363 | |
AnnaBridge | 165:d1b4690b3f8b | 2364 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2365 | * @brief Disable Wake Up from Stop Mode Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2366 | * @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP |
AnnaBridge | 165:d1b4690b3f8b | 2367 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2368 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2369 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2370 | __STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2371 | { |
AnnaBridge | 165:d1b4690b3f8b | 2372 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE); |
AnnaBridge | 165:d1b4690b3f8b | 2373 | } |
AnnaBridge | 165:d1b4690b3f8b | 2374 | |
AnnaBridge | 165:d1b4690b3f8b | 2375 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2376 | |
AnnaBridge | 165:d1b4690b3f8b | 2377 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2378 | * @brief Disable TX FIFO Threshold Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2379 | * @rmtoll CR3 TXFTIE LL_LPUART_DisableIT_TXFT |
AnnaBridge | 165:d1b4690b3f8b | 2380 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2381 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2382 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2383 | __STATIC_INLINE void LL_LPUART_DisableIT_TXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2384 | { |
AnnaBridge | 165:d1b4690b3f8b | 2385 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_TXFTIE); |
AnnaBridge | 165:d1b4690b3f8b | 2386 | } |
AnnaBridge | 165:d1b4690b3f8b | 2387 | |
AnnaBridge | 165:d1b4690b3f8b | 2388 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2389 | * @brief Disable RX FIFO Threshold Interrupt |
AnnaBridge | 165:d1b4690b3f8b | 2390 | * @rmtoll CR3 RXFTIE LL_LPUART_DisableIT_RXFT |
AnnaBridge | 165:d1b4690b3f8b | 2391 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2392 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2393 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2394 | __STATIC_INLINE void LL_LPUART_DisableIT_RXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2395 | { |
AnnaBridge | 165:d1b4690b3f8b | 2396 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_RXFTIE); |
AnnaBridge | 165:d1b4690b3f8b | 2397 | } |
AnnaBridge | 165:d1b4690b3f8b | 2398 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2399 | |
AnnaBridge | 165:d1b4690b3f8b | 2400 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2401 | * @brief Check if the LPUART IDLE Interrupt source is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2402 | * @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE |
AnnaBridge | 165:d1b4690b3f8b | 2403 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2404 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2405 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2406 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2407 | { |
AnnaBridge | 165:d1b4690b3f8b | 2408 | return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2409 | } |
AnnaBridge | 165:d1b4690b3f8b | 2410 | |
AnnaBridge | 165:d1b4690b3f8b | 2411 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2412 | |
AnnaBridge | 165:d1b4690b3f8b | 2413 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 2414 | #define LL_LPUART_IsEnabledIT_RXNE LL_LPUART_IsEnabledIT_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 2415 | |
AnnaBridge | 165:d1b4690b3f8b | 2416 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2417 | * @brief Check if the LPUART RX Not Empty and LPUART RX FIFO Not Empty Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2418 | * @rmtoll CR1 RXNEIE_RXFNEIE LL_LPUART_IsEnabledIT_RXNE_RXFNE |
AnnaBridge | 165:d1b4690b3f8b | 2419 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2420 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2421 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2422 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE_RXFNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2423 | { |
AnnaBridge | 165:d1b4690b3f8b | 2424 | return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE_RXFNEIE) == (USART_CR1_RXNEIE_RXFNEIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2425 | } |
AnnaBridge | 165:d1b4690b3f8b | 2426 | #else |
AnnaBridge | 165:d1b4690b3f8b | 2427 | |
AnnaBridge | 165:d1b4690b3f8b | 2428 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2429 | * @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2430 | * @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE |
AnnaBridge | 165:d1b4690b3f8b | 2431 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2432 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2433 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2434 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2435 | { |
AnnaBridge | 165:d1b4690b3f8b | 2436 | return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2437 | } |
AnnaBridge | 165:d1b4690b3f8b | 2438 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2439 | |
AnnaBridge | 165:d1b4690b3f8b | 2440 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2441 | * @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2442 | * @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC |
AnnaBridge | 165:d1b4690b3f8b | 2443 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2444 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2445 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2446 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2447 | { |
AnnaBridge | 165:d1b4690b3f8b | 2448 | return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2449 | } |
AnnaBridge | 165:d1b4690b3f8b | 2450 | |
AnnaBridge | 165:d1b4690b3f8b | 2451 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2452 | |
AnnaBridge | 165:d1b4690b3f8b | 2453 | /* Legacy define */ |
AnnaBridge | 165:d1b4690b3f8b | 2454 | #define LL_LPUART_IsEnabledIT_TXE LL_LPUART_IsEnabledIT_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 2455 | |
AnnaBridge | 165:d1b4690b3f8b | 2456 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2457 | * @brief Check if the LPUART TX Empty and LPUART TX FIFO Not Full Interrupt is enabled or disabled |
AnnaBridge | 165:d1b4690b3f8b | 2458 | * @rmtoll CR1 TXEIE_TXFNFIE LL_LPUART_IsEnabledIT_TXE_TXFNF |
AnnaBridge | 165:d1b4690b3f8b | 2459 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2460 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2461 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2462 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE_TXFNF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2463 | { |
AnnaBridge | 165:d1b4690b3f8b | 2464 | return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE_TXFNFIE) == (USART_CR1_TXEIE_TXFNFIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2465 | } |
AnnaBridge | 165:d1b4690b3f8b | 2466 | #else |
AnnaBridge | 165:d1b4690b3f8b | 2467 | |
AnnaBridge | 165:d1b4690b3f8b | 2468 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2469 | * @brief Check if the LPUART TX Empty Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2470 | * @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE |
AnnaBridge | 165:d1b4690b3f8b | 2471 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2472 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2473 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2474 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2475 | { |
AnnaBridge | 165:d1b4690b3f8b | 2476 | return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2477 | } |
AnnaBridge | 165:d1b4690b3f8b | 2478 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2479 | |
AnnaBridge | 165:d1b4690b3f8b | 2480 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2481 | * @brief Check if the LPUART Parity Error Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2482 | * @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE |
AnnaBridge | 165:d1b4690b3f8b | 2483 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2484 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2485 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2486 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2487 | { |
AnnaBridge | 165:d1b4690b3f8b | 2488 | return (READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2489 | } |
AnnaBridge | 165:d1b4690b3f8b | 2490 | |
AnnaBridge | 165:d1b4690b3f8b | 2491 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2492 | * @brief Check if the LPUART Character Match Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2493 | * @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM |
AnnaBridge | 165:d1b4690b3f8b | 2494 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2495 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2496 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2497 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2498 | { |
AnnaBridge | 165:d1b4690b3f8b | 2499 | return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2500 | } |
AnnaBridge | 165:d1b4690b3f8b | 2501 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2502 | |
AnnaBridge | 165:d1b4690b3f8b | 2503 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2504 | * @brief Check if the LPUART TX FIFO Empty Interrupt is enabled or disabled |
AnnaBridge | 165:d1b4690b3f8b | 2505 | * @rmtoll CR1 TXFEIE LL_LPUART_IsEnabledIT_TXFE |
AnnaBridge | 165:d1b4690b3f8b | 2506 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2507 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2508 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2509 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFE(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2510 | { |
AnnaBridge | 165:d1b4690b3f8b | 2511 | return (READ_BIT(LPUARTx->CR1, USART_CR1_TXFEIE) == (USART_CR1_TXFEIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2512 | } |
AnnaBridge | 165:d1b4690b3f8b | 2513 | |
AnnaBridge | 165:d1b4690b3f8b | 2514 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2515 | * @brief Check if the LPUART RX FIFO Full Interrupt is enabled or disabled |
AnnaBridge | 165:d1b4690b3f8b | 2516 | * @rmtoll CR1 RXFFIE LL_LPUART_IsEnabledIT_RXFF |
AnnaBridge | 165:d1b4690b3f8b | 2517 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2518 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2519 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2520 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFF(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2521 | { |
AnnaBridge | 165:d1b4690b3f8b | 2522 | return (READ_BIT(LPUARTx->CR1, USART_CR1_RXFFIE) == (USART_CR1_RXFFIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2523 | } |
AnnaBridge | 165:d1b4690b3f8b | 2524 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2525 | |
AnnaBridge | 165:d1b4690b3f8b | 2526 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2527 | * @brief Check if the LPUART Error Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2528 | * @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR |
AnnaBridge | 165:d1b4690b3f8b | 2529 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2530 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2531 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2532 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2533 | { |
AnnaBridge | 165:d1b4690b3f8b | 2534 | return (READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2535 | } |
AnnaBridge | 165:d1b4690b3f8b | 2536 | |
AnnaBridge | 165:d1b4690b3f8b | 2537 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2538 | * @brief Check if the LPUART CTS Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2539 | * @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS |
AnnaBridge | 165:d1b4690b3f8b | 2540 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2541 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2542 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2543 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2544 | { |
AnnaBridge | 165:d1b4690b3f8b | 2545 | return (READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2546 | } |
AnnaBridge | 165:d1b4690b3f8b | 2547 | |
AnnaBridge | 165:d1b4690b3f8b | 2548 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2549 | * @brief Check if the LPUART Wake Up from Stop Mode Interrupt is enabled or disabled. |
AnnaBridge | 165:d1b4690b3f8b | 2550 | * @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP |
AnnaBridge | 165:d1b4690b3f8b | 2551 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2552 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2553 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2554 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2555 | { |
AnnaBridge | 165:d1b4690b3f8b | 2556 | return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2557 | } |
AnnaBridge | 165:d1b4690b3f8b | 2558 | |
AnnaBridge | 165:d1b4690b3f8b | 2559 | #if defined(USART_CR1_FIFOEN) |
AnnaBridge | 165:d1b4690b3f8b | 2560 | |
AnnaBridge | 165:d1b4690b3f8b | 2561 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2562 | * @brief Check if LPUART TX FIFO Threshold Interrupt is enabled or disabled |
AnnaBridge | 165:d1b4690b3f8b | 2563 | * @rmtoll CR3 TXFTIE LL_LPUART_IsEnabledIT_TXFT |
AnnaBridge | 165:d1b4690b3f8b | 2564 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2565 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2566 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2567 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2568 | { |
AnnaBridge | 165:d1b4690b3f8b | 2569 | return (READ_BIT(LPUARTx->CR3, USART_CR3_TXFTIE) == (USART_CR3_TXFTIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2570 | } |
AnnaBridge | 165:d1b4690b3f8b | 2571 | |
AnnaBridge | 165:d1b4690b3f8b | 2572 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2573 | * @brief Check if LPUART RX FIFO Threshold Interrupt is enabled or disabled |
AnnaBridge | 165:d1b4690b3f8b | 2574 | * @rmtoll CR3 RXFTIE LL_LPUART_IsEnabledIT_RXFT |
AnnaBridge | 165:d1b4690b3f8b | 2575 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2576 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2577 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2578 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXFT(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2579 | { |
AnnaBridge | 165:d1b4690b3f8b | 2580 | return (READ_BIT(LPUARTx->CR3, USART_CR3_RXFTIE) == (USART_CR3_RXFTIE)); |
AnnaBridge | 165:d1b4690b3f8b | 2581 | } |
AnnaBridge | 165:d1b4690b3f8b | 2582 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2583 | |
AnnaBridge | 165:d1b4690b3f8b | 2584 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2585 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2586 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2587 | |
AnnaBridge | 165:d1b4690b3f8b | 2588 | /** @defgroup LPUART_LL_EF_DMA_Management DMA_Management |
AnnaBridge | 165:d1b4690b3f8b | 2589 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 2590 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2591 | |
AnnaBridge | 165:d1b4690b3f8b | 2592 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2593 | * @brief Enable DMA Mode for reception |
AnnaBridge | 165:d1b4690b3f8b | 2594 | * @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX |
AnnaBridge | 165:d1b4690b3f8b | 2595 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2596 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2597 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2598 | __STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2599 | { |
AnnaBridge | 165:d1b4690b3f8b | 2600 | SET_BIT(LPUARTx->CR3, USART_CR3_DMAR); |
AnnaBridge | 165:d1b4690b3f8b | 2601 | } |
AnnaBridge | 165:d1b4690b3f8b | 2602 | |
AnnaBridge | 165:d1b4690b3f8b | 2603 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2604 | * @brief Disable DMA Mode for reception |
AnnaBridge | 165:d1b4690b3f8b | 2605 | * @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX |
AnnaBridge | 165:d1b4690b3f8b | 2606 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2607 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2608 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2609 | __STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2610 | { |
AnnaBridge | 165:d1b4690b3f8b | 2611 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR); |
AnnaBridge | 165:d1b4690b3f8b | 2612 | } |
AnnaBridge | 165:d1b4690b3f8b | 2613 | |
AnnaBridge | 165:d1b4690b3f8b | 2614 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2615 | * @brief Check if DMA Mode is enabled for reception |
AnnaBridge | 165:d1b4690b3f8b | 2616 | * @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX |
AnnaBridge | 165:d1b4690b3f8b | 2617 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2618 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2619 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2620 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2621 | { |
AnnaBridge | 165:d1b4690b3f8b | 2622 | return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR)); |
AnnaBridge | 165:d1b4690b3f8b | 2623 | } |
AnnaBridge | 165:d1b4690b3f8b | 2624 | |
AnnaBridge | 165:d1b4690b3f8b | 2625 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2626 | * @brief Enable DMA Mode for transmission |
AnnaBridge | 165:d1b4690b3f8b | 2627 | * @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX |
AnnaBridge | 165:d1b4690b3f8b | 2628 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2629 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2630 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2631 | __STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2632 | { |
AnnaBridge | 165:d1b4690b3f8b | 2633 | SET_BIT(LPUARTx->CR3, USART_CR3_DMAT); |
AnnaBridge | 165:d1b4690b3f8b | 2634 | } |
AnnaBridge | 165:d1b4690b3f8b | 2635 | |
AnnaBridge | 165:d1b4690b3f8b | 2636 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2637 | * @brief Disable DMA Mode for transmission |
AnnaBridge | 165:d1b4690b3f8b | 2638 | * @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX |
AnnaBridge | 165:d1b4690b3f8b | 2639 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2640 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2641 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2642 | __STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2643 | { |
AnnaBridge | 165:d1b4690b3f8b | 2644 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT); |
AnnaBridge | 165:d1b4690b3f8b | 2645 | } |
AnnaBridge | 165:d1b4690b3f8b | 2646 | |
AnnaBridge | 165:d1b4690b3f8b | 2647 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2648 | * @brief Check if DMA Mode is enabled for transmission |
AnnaBridge | 165:d1b4690b3f8b | 2649 | * @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX |
AnnaBridge | 165:d1b4690b3f8b | 2650 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2651 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2652 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2653 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2654 | { |
AnnaBridge | 165:d1b4690b3f8b | 2655 | return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT)); |
AnnaBridge | 165:d1b4690b3f8b | 2656 | } |
AnnaBridge | 165:d1b4690b3f8b | 2657 | |
AnnaBridge | 165:d1b4690b3f8b | 2658 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2659 | * @brief Enable DMA Disabling on Reception Error |
AnnaBridge | 165:d1b4690b3f8b | 2660 | * @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr |
AnnaBridge | 165:d1b4690b3f8b | 2661 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2662 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2663 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2664 | __STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2665 | { |
AnnaBridge | 165:d1b4690b3f8b | 2666 | SET_BIT(LPUARTx->CR3, USART_CR3_DDRE); |
AnnaBridge | 165:d1b4690b3f8b | 2667 | } |
AnnaBridge | 165:d1b4690b3f8b | 2668 | |
AnnaBridge | 165:d1b4690b3f8b | 2669 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2670 | * @brief Disable DMA Disabling on Reception Error |
AnnaBridge | 165:d1b4690b3f8b | 2671 | * @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr |
AnnaBridge | 165:d1b4690b3f8b | 2672 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2673 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2674 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2675 | __STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2676 | { |
AnnaBridge | 165:d1b4690b3f8b | 2677 | CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE); |
AnnaBridge | 165:d1b4690b3f8b | 2678 | } |
AnnaBridge | 165:d1b4690b3f8b | 2679 | |
AnnaBridge | 165:d1b4690b3f8b | 2680 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2681 | * @brief Indicate if DMA Disabling on Reception Error is disabled |
AnnaBridge | 165:d1b4690b3f8b | 2682 | * @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr |
AnnaBridge | 165:d1b4690b3f8b | 2683 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2684 | * @retval State of bit (1 or 0). |
AnnaBridge | 165:d1b4690b3f8b | 2685 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2686 | __STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2687 | { |
AnnaBridge | 165:d1b4690b3f8b | 2688 | return (READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE)); |
AnnaBridge | 165:d1b4690b3f8b | 2689 | } |
AnnaBridge | 165:d1b4690b3f8b | 2690 | |
AnnaBridge | 165:d1b4690b3f8b | 2691 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2692 | * @brief Get the LPUART data register address used for DMA transfer |
AnnaBridge | 165:d1b4690b3f8b | 2693 | * @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n |
AnnaBridge | 165:d1b4690b3f8b | 2694 | * @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr |
AnnaBridge | 165:d1b4690b3f8b | 2695 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2696 | * @param Direction This parameter can be one of the following values: |
AnnaBridge | 165:d1b4690b3f8b | 2697 | * @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT |
AnnaBridge | 165:d1b4690b3f8b | 2698 | * @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE |
AnnaBridge | 165:d1b4690b3f8b | 2699 | * @retval Address of data register |
AnnaBridge | 165:d1b4690b3f8b | 2700 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2701 | __STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction) |
AnnaBridge | 165:d1b4690b3f8b | 2702 | { |
AnnaBridge | 165:d1b4690b3f8b | 2703 | register uint32_t data_reg_addr = 0U; |
AnnaBridge | 165:d1b4690b3f8b | 2704 | |
AnnaBridge | 165:d1b4690b3f8b | 2705 | if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT) |
AnnaBridge | 165:d1b4690b3f8b | 2706 | { |
AnnaBridge | 165:d1b4690b3f8b | 2707 | /* return address of TDR register */ |
AnnaBridge | 165:d1b4690b3f8b | 2708 | data_reg_addr = (uint32_t) &(LPUARTx->TDR); |
AnnaBridge | 165:d1b4690b3f8b | 2709 | } |
AnnaBridge | 165:d1b4690b3f8b | 2710 | else |
AnnaBridge | 165:d1b4690b3f8b | 2711 | { |
AnnaBridge | 165:d1b4690b3f8b | 2712 | /* return address of RDR register */ |
AnnaBridge | 165:d1b4690b3f8b | 2713 | data_reg_addr = (uint32_t) &(LPUARTx->RDR); |
AnnaBridge | 165:d1b4690b3f8b | 2714 | } |
AnnaBridge | 165:d1b4690b3f8b | 2715 | |
AnnaBridge | 165:d1b4690b3f8b | 2716 | return data_reg_addr; |
AnnaBridge | 165:d1b4690b3f8b | 2717 | } |
AnnaBridge | 165:d1b4690b3f8b | 2718 | |
AnnaBridge | 165:d1b4690b3f8b | 2719 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2720 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2721 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2722 | |
AnnaBridge | 165:d1b4690b3f8b | 2723 | /** @defgroup LPUART_LL_EF_Data_Management Data_Management |
AnnaBridge | 165:d1b4690b3f8b | 2724 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 2725 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2726 | |
AnnaBridge | 165:d1b4690b3f8b | 2727 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2728 | * @brief Read Receiver Data register (Receive Data value, 8 bits) |
AnnaBridge | 165:d1b4690b3f8b | 2729 | * @rmtoll RDR RDR LL_LPUART_ReceiveData8 |
AnnaBridge | 165:d1b4690b3f8b | 2730 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2731 | * @retval Time Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 165:d1b4690b3f8b | 2732 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2733 | __STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2734 | { |
AnnaBridge | 165:d1b4690b3f8b | 2735 | return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR)); |
AnnaBridge | 165:d1b4690b3f8b | 2736 | } |
AnnaBridge | 165:d1b4690b3f8b | 2737 | |
AnnaBridge | 165:d1b4690b3f8b | 2738 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2739 | * @brief Read Receiver Data register (Receive Data value, 9 bits) |
AnnaBridge | 165:d1b4690b3f8b | 2740 | * @rmtoll RDR RDR LL_LPUART_ReceiveData9 |
AnnaBridge | 165:d1b4690b3f8b | 2741 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2742 | * @retval Time Value between Min_Data=0x00 and Max_Data=0x1FF |
AnnaBridge | 165:d1b4690b3f8b | 2743 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2744 | __STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2745 | { |
AnnaBridge | 165:d1b4690b3f8b | 2746 | return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR)); |
AnnaBridge | 165:d1b4690b3f8b | 2747 | } |
AnnaBridge | 165:d1b4690b3f8b | 2748 | |
AnnaBridge | 165:d1b4690b3f8b | 2749 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2750 | * @brief Write in Transmitter Data Register (Transmit Data value, 8 bits) |
AnnaBridge | 165:d1b4690b3f8b | 2751 | * @rmtoll TDR TDR LL_LPUART_TransmitData8 |
AnnaBridge | 165:d1b4690b3f8b | 2752 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2753 | * @param Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 165:d1b4690b3f8b | 2754 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2755 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2756 | __STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value) |
AnnaBridge | 165:d1b4690b3f8b | 2757 | { |
AnnaBridge | 165:d1b4690b3f8b | 2758 | LPUARTx->TDR = Value; |
AnnaBridge | 165:d1b4690b3f8b | 2759 | } |
AnnaBridge | 165:d1b4690b3f8b | 2760 | |
AnnaBridge | 165:d1b4690b3f8b | 2761 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2762 | * @brief Write in Transmitter Data Register (Transmit Data value, 9 bits) |
AnnaBridge | 165:d1b4690b3f8b | 2763 | * @rmtoll TDR TDR LL_LPUART_TransmitData9 |
AnnaBridge | 165:d1b4690b3f8b | 2764 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2765 | * @param Value between Min_Data=0x00 and Max_Data=0x1FF |
AnnaBridge | 165:d1b4690b3f8b | 2766 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2767 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2768 | __STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value) |
AnnaBridge | 165:d1b4690b3f8b | 2769 | { |
AnnaBridge | 165:d1b4690b3f8b | 2770 | LPUARTx->TDR = Value & 0x1FFU; |
AnnaBridge | 165:d1b4690b3f8b | 2771 | } |
AnnaBridge | 165:d1b4690b3f8b | 2772 | |
AnnaBridge | 165:d1b4690b3f8b | 2773 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2774 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2775 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2776 | |
AnnaBridge | 165:d1b4690b3f8b | 2777 | /** @defgroup LPUART_LL_EF_Execution Execution |
AnnaBridge | 165:d1b4690b3f8b | 2778 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 2779 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2780 | |
AnnaBridge | 165:d1b4690b3f8b | 2781 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2782 | * @brief Request Break sending |
AnnaBridge | 165:d1b4690b3f8b | 2783 | * @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending |
AnnaBridge | 165:d1b4690b3f8b | 2784 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2785 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2786 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2787 | __STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2788 | { |
AnnaBridge | 165:d1b4690b3f8b | 2789 | SET_BIT(LPUARTx->RQR, USART_RQR_SBKRQ); |
AnnaBridge | 165:d1b4690b3f8b | 2790 | } |
AnnaBridge | 165:d1b4690b3f8b | 2791 | |
AnnaBridge | 165:d1b4690b3f8b | 2792 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2793 | * @brief Put LPUART in mute mode and set the RWU flag |
AnnaBridge | 165:d1b4690b3f8b | 2794 | * @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode |
AnnaBridge | 165:d1b4690b3f8b | 2795 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2796 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2797 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2798 | __STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2799 | { |
AnnaBridge | 165:d1b4690b3f8b | 2800 | SET_BIT(LPUARTx->RQR, USART_RQR_MMRQ); |
AnnaBridge | 165:d1b4690b3f8b | 2801 | } |
AnnaBridge | 165:d1b4690b3f8b | 2802 | |
AnnaBridge | 165:d1b4690b3f8b | 2803 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2804 | @if USART_CR1_FIFOEN |
AnnaBridge | 165:d1b4690b3f8b | 2805 | * @brief Request a Receive Data and FIFO flush |
AnnaBridge | 165:d1b4690b3f8b | 2806 | * @note Allows to discard the received data without reading them, and avoid an overrun |
AnnaBridge | 165:d1b4690b3f8b | 2807 | * condition. |
AnnaBridge | 165:d1b4690b3f8b | 2808 | @else |
AnnaBridge | 165:d1b4690b3f8b | 2809 | * @brief Request a Receive Data flush |
AnnaBridge | 165:d1b4690b3f8b | 2810 | @endif |
AnnaBridge | 165:d1b4690b3f8b | 2811 | * @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush |
AnnaBridge | 165:d1b4690b3f8b | 2812 | * @param LPUARTx LPUART Instance |
AnnaBridge | 165:d1b4690b3f8b | 2813 | * @retval None |
AnnaBridge | 165:d1b4690b3f8b | 2814 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2815 | __STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx) |
AnnaBridge | 165:d1b4690b3f8b | 2816 | { |
AnnaBridge | 165:d1b4690b3f8b | 2817 | SET_BIT(LPUARTx->RQR, USART_RQR_RXFRQ); |
AnnaBridge | 165:d1b4690b3f8b | 2818 | } |
AnnaBridge | 165:d1b4690b3f8b | 2819 | |
AnnaBridge | 165:d1b4690b3f8b | 2820 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2821 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2822 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2823 | |
AnnaBridge | 165:d1b4690b3f8b | 2824 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 165:d1b4690b3f8b | 2825 | /** @defgroup LPUART_LL_EF_Init Initialization and de-initialization functions |
AnnaBridge | 165:d1b4690b3f8b | 2826 | * @{ |
AnnaBridge | 165:d1b4690b3f8b | 2827 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2828 | ErrorStatus LL_LPUART_DeInit(USART_TypeDef *LPUARTx); |
AnnaBridge | 165:d1b4690b3f8b | 2829 | ErrorStatus LL_LPUART_Init(USART_TypeDef *LPUARTx, LL_LPUART_InitTypeDef *LPUART_InitStruct); |
AnnaBridge | 165:d1b4690b3f8b | 2830 | void LL_LPUART_StructInit(LL_LPUART_InitTypeDef *LPUART_InitStruct); |
AnnaBridge | 165:d1b4690b3f8b | 2831 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2832 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2833 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2834 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 165:d1b4690b3f8b | 2835 | |
AnnaBridge | 165:d1b4690b3f8b | 2836 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2837 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2838 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2839 | |
AnnaBridge | 165:d1b4690b3f8b | 2840 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2841 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2842 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2843 | |
AnnaBridge | 165:d1b4690b3f8b | 2844 | #endif /* LPUART1 */ |
AnnaBridge | 165:d1b4690b3f8b | 2845 | |
AnnaBridge | 165:d1b4690b3f8b | 2846 | /** |
AnnaBridge | 165:d1b4690b3f8b | 2847 | * @} |
AnnaBridge | 165:d1b4690b3f8b | 2848 | */ |
AnnaBridge | 165:d1b4690b3f8b | 2849 | |
AnnaBridge | 165:d1b4690b3f8b | 2850 | #ifdef __cplusplus |
AnnaBridge | 165:d1b4690b3f8b | 2851 | } |
AnnaBridge | 165:d1b4690b3f8b | 2852 | #endif |
AnnaBridge | 165:d1b4690b3f8b | 2853 | |
AnnaBridge | 165:d1b4690b3f8b | 2854 | #endif /* __STM32L4xx_LL_LPUART_H */ |
AnnaBridge | 165:d1b4690b3f8b | 2855 | |
AnnaBridge | 165:d1b4690b3f8b | 2856 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |