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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_ll_i2c.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32h7xx_ll_i2c.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of I2C LL module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© Copyright (c) 2017 STMicroelectronics.
AnnaBridge	172:65be27845400	10	* All rights reserved.</center></h2>
AnnaBridge	172:65be27845400	11	*
AnnaBridge	172:65be27845400	12	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	172:65be27845400	13	* the "License"; You may not use this file except in compliance with the
AnnaBridge	172:65be27845400	14	* License. You may obtain a copy of the License at:
AnnaBridge	172:65be27845400	15	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	172:65be27845400	16	*
AnnaBridge	172:65be27845400	17	******************************************************************************
AnnaBridge	172:65be27845400	18	*/
AnnaBridge	172:65be27845400	19
AnnaBridge	172:65be27845400	20	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	21	#ifndef STM32H7xx_LL_I2C_H
AnnaBridge	172:65be27845400	22	#define STM32H7xx_LL_I2C_H
AnnaBridge	172:65be27845400	23
AnnaBridge	172:65be27845400	24	#ifdef __cplusplus
AnnaBridge	172:65be27845400	25	extern "C" {
AnnaBridge	172:65be27845400	26	#endif
AnnaBridge	172:65be27845400	27
AnnaBridge	172:65be27845400	28	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	29	#include "stm32h7xx.h"
AnnaBridge	172:65be27845400	30
AnnaBridge	172:65be27845400	31	/** @addtogroup STM32H7xx_LL_Driver
AnnaBridge	172:65be27845400	32	* @{
AnnaBridge	172:65be27845400	33	*/
AnnaBridge	172:65be27845400	34
AnnaBridge	172:65be27845400	35	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3) \|\| defined (I2C4)
AnnaBridge	172:65be27845400	36
AnnaBridge	172:65be27845400	37	/** @defgroup I2C_LL I2C
AnnaBridge	172:65be27845400	38	* @{
AnnaBridge	172:65be27845400	39	*/
AnnaBridge	172:65be27845400	40
AnnaBridge	172:65be27845400	41	/* Private types -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	42	/* Private variables ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	43
AnnaBridge	172:65be27845400	44	/* Private constants ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	45	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge	172:65be27845400	46	* @{
AnnaBridge	172:65be27845400	47	*/
AnnaBridge	172:65be27845400	48	/**
AnnaBridge	172:65be27845400	49	* @}
AnnaBridge	172:65be27845400	50	*/
AnnaBridge	172:65be27845400	51
AnnaBridge	172:65be27845400	52	/* Private macros ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	53	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	54	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge	172:65be27845400	55	* @{
AnnaBridge	172:65be27845400	56	*/
AnnaBridge	172:65be27845400	57	/**
AnnaBridge	172:65be27845400	58	* @}
AnnaBridge	172:65be27845400	59	*/
AnnaBridge	172:65be27845400	60	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	61
AnnaBridge	172:65be27845400	62	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	63	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	64	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge	172:65be27845400	65	* @{
AnnaBridge	172:65be27845400	66	*/
AnnaBridge	172:65be27845400	67	typedef struct
AnnaBridge	172:65be27845400	68	{
AnnaBridge	172:65be27845400	69	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge	172:65be27845400	70	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge	172:65be27845400	71
AnnaBridge	172:65be27845400	72	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge	172:65be27845400	73
AnnaBridge	172:65be27845400	74	uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge	172:65be27845400	75	This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge	172:65be27845400	76	the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge	172:65be27845400	77
AnnaBridge	172:65be27845400	78	This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge	172:65be27845400	79
AnnaBridge	172:65be27845400	80	uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge	172:65be27845400	81	This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge	172:65be27845400	82
AnnaBridge	172:65be27845400	83	This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge	172:65be27845400	84
AnnaBridge	172:65be27845400	85	uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge	172:65be27845400	86	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge	172:65be27845400	87
AnnaBridge	172:65be27845400	88	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge	172:65be27845400	89
AnnaBridge	172:65be27845400	90	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge	172:65be27845400	91	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge	172:65be27845400	92
AnnaBridge	172:65be27845400	93	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	172:65be27845400	94
AnnaBridge	172:65be27845400	95	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	172:65be27845400	96	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge	172:65be27845400	97
AnnaBridge	172:65be27845400	98	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge	172:65be27845400	99
AnnaBridge	172:65be27845400	100	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge	172:65be27845400	101	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge	172:65be27845400	102
AnnaBridge	172:65be27845400	103	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	172:65be27845400	104	} LL_I2C_InitTypeDef;
AnnaBridge	172:65be27845400	105	/**
AnnaBridge	172:65be27845400	106	* @}
AnnaBridge	172:65be27845400	107	*/
AnnaBridge	172:65be27845400	108	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	109
AnnaBridge	172:65be27845400	110	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	111	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge	172:65be27845400	112	* @{
AnnaBridge	172:65be27845400	113	*/
AnnaBridge	172:65be27845400	114
AnnaBridge	172:65be27845400	115	/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	172:65be27845400	116	* @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge	172:65be27845400	117	* @{
AnnaBridge	172:65be27845400	118	*/
AnnaBridge	172:65be27845400	119	#define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /!< Address Matched flag /
AnnaBridge	172:65be27845400	120	#define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /!< Not Acknowledge flag /
AnnaBridge	172:65be27845400	121	#define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /!< Stop detection flag /
AnnaBridge	172:65be27845400	122	#define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /!< Bus error flag /
AnnaBridge	172:65be27845400	123	#define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /!< Arbitration Lost flag /
AnnaBridge	172:65be27845400	124	#define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /!< Overrun/Underrun flag /
AnnaBridge	172:65be27845400	125	#define LL_I2C_ICR_PECCF I2C_ICR_PECCF /!< PEC error flag /
AnnaBridge	172:65be27845400	126	#define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /!< Timeout detection flag /
AnnaBridge	172:65be27845400	127	#define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /!< Alert flag /
AnnaBridge	172:65be27845400	128	/**
AnnaBridge	172:65be27845400	129	* @}
AnnaBridge	172:65be27845400	130	*/
AnnaBridge	172:65be27845400	131
AnnaBridge	172:65be27845400	132	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	172:65be27845400	133	* @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge	172:65be27845400	134	* @{
AnnaBridge	172:65be27845400	135	*/
AnnaBridge	172:65be27845400	136	#define LL_I2C_ISR_TXE I2C_ISR_TXE /!< Transmit data register empty /
AnnaBridge	172:65be27845400	137	#define LL_I2C_ISR_TXIS I2C_ISR_TXIS /!< Transmit interrupt status /
AnnaBridge	172:65be27845400	138	#define LL_I2C_ISR_RXNE I2C_ISR_RXNE /!< Receive data register not empty /
AnnaBridge	172:65be27845400	139	#define LL_I2C_ISR_ADDR I2C_ISR_ADDR /!< Address matched (slave mode) /
AnnaBridge	172:65be27845400	140	#define LL_I2C_ISR_NACKF I2C_ISR_NACKF /!< Not Acknowledge received flag /
AnnaBridge	172:65be27845400	141	#define LL_I2C_ISR_STOPF I2C_ISR_STOPF /!< Stop detection flag /
AnnaBridge	172:65be27845400	142	#define LL_I2C_ISR_TC I2C_ISR_TC /!< Transfer Complete (master mode) /
AnnaBridge	172:65be27845400	143	#define LL_I2C_ISR_TCR I2C_ISR_TCR /!< Transfer Complete Reload /
AnnaBridge	172:65be27845400	144	#define LL_I2C_ISR_BERR I2C_ISR_BERR /!< Bus error /
AnnaBridge	172:65be27845400	145	#define LL_I2C_ISR_ARLO I2C_ISR_ARLO /!< Arbitration lost /
AnnaBridge	172:65be27845400	146	#define LL_I2C_ISR_OVR I2C_ISR_OVR /!< Overrun/Underrun (slave mode) /
AnnaBridge	172:65be27845400	147	#define LL_I2C_ISR_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
AnnaBridge	172:65be27845400	148	#define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
AnnaBridge	172:65be27845400	149	#define LL_I2C_ISR_ALERT I2C_ISR_ALERT /!< SMBus alert (SMBus mode) /
AnnaBridge	172:65be27845400	150	#define LL_I2C_ISR_BUSY I2C_ISR_BUSY /!< Bus busy /
AnnaBridge	172:65be27845400	151	/**
AnnaBridge	172:65be27845400	152	* @}
AnnaBridge	172:65be27845400	153	*/
AnnaBridge	172:65be27845400	154
AnnaBridge	172:65be27845400	155	/** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge	172:65be27845400	156	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge	172:65be27845400	157	* @{
AnnaBridge	172:65be27845400	158	*/
AnnaBridge	172:65be27845400	159	#define LL_I2C_CR1_TXIE I2C_CR1_TXIE /!< TX Interrupt enable /
AnnaBridge	172:65be27845400	160	#define LL_I2C_CR1_RXIE I2C_CR1_RXIE /!< RX Interrupt enable /
AnnaBridge	172:65be27845400	161	#define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /!< Address match Interrupt enable (slave only) /
AnnaBridge	172:65be27845400	162	#define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /!< Not acknowledge received Interrupt enable /
AnnaBridge	172:65be27845400	163	#define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /!< STOP detection Interrupt enable /
AnnaBridge	172:65be27845400	164	#define LL_I2C_CR1_TCIE I2C_CR1_TCIE /!< Transfer Complete interrupt enable /
AnnaBridge	172:65be27845400	165	#define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /!< Error interrupts enable /
AnnaBridge	172:65be27845400	166	/**
AnnaBridge	172:65be27845400	167	* @}
AnnaBridge	172:65be27845400	168	*/
AnnaBridge	172:65be27845400	169
AnnaBridge	172:65be27845400	170	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge	172:65be27845400	171	* @{
AnnaBridge	172:65be27845400	172	*/
AnnaBridge	172:65be27845400	173	#define LL_I2C_MODE_I2C 0x00000000U /!< I2C Master or Slave mode /
AnnaBridge	172:65be27845400	174	#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /!< SMBus Host address acknowledge /
AnnaBridge	172:65be27845400	175	#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /!< SMBus Device default mode (Default address not acknowledge) /
AnnaBridge	172:65be27845400	176	#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /!< SMBus Device Default address acknowledge /
AnnaBridge	172:65be27845400	177	/**
AnnaBridge	172:65be27845400	178	* @}
AnnaBridge	172:65be27845400	179	*/
AnnaBridge	172:65be27845400	180
AnnaBridge	172:65be27845400	181	/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge	172:65be27845400	182	* @{
AnnaBridge	172:65be27845400	183	*/
AnnaBridge	172:65be27845400	184	#define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /!< Analog filter is enabled. /
AnnaBridge	172:65be27845400	185	#define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /!< Analog filter is disabled. /
AnnaBridge	172:65be27845400	186	/**
AnnaBridge	172:65be27845400	187	* @}
AnnaBridge	172:65be27845400	188	*/
AnnaBridge	172:65be27845400	189
AnnaBridge	172:65be27845400	190	/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge	172:65be27845400	191	* @{
AnnaBridge	172:65be27845400	192	*/
AnnaBridge	172:65be27845400	193	#define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /!< Master operates in 7-bit addressing mode. /
AnnaBridge	172:65be27845400	194	#define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /!< Master operates in 10-bit addressing mode./
AnnaBridge	172:65be27845400	195	/**
AnnaBridge	172:65be27845400	196	* @}
AnnaBridge	172:65be27845400	197	*/
AnnaBridge	172:65be27845400	198
AnnaBridge	172:65be27845400	199	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge	172:65be27845400	200	* @{
AnnaBridge	172:65be27845400	201	*/
AnnaBridge	172:65be27845400	202	#define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /!< Own address 1 is a 7-bit address. /
AnnaBridge	172:65be27845400	203	#define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /!< Own address 1 is a 10-bit address./
AnnaBridge	172:65be27845400	204	/**
AnnaBridge	172:65be27845400	205	* @}
AnnaBridge	172:65be27845400	206	*/
AnnaBridge	172:65be27845400	207
AnnaBridge	172:65be27845400	208	/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge	172:65be27845400	209	* @{
AnnaBridge	172:65be27845400	210	*/
AnnaBridge	172:65be27845400	211	#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /!< Own Address2 No mask. /
AnnaBridge	172:65be27845400	212	#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /!< Only Address2 bits[7:2] are compared. /
AnnaBridge	172:65be27845400	213	#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /!< Only Address2 bits[7:3] are compared. /
AnnaBridge	172:65be27845400	214	#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /!< Only Address2 bits[7:4] are compared. /
AnnaBridge	172:65be27845400	215	#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /!< Only Address2 bits[7:5] are compared. /
AnnaBridge	172:65be27845400	216	#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /!< Only Address2 bits[7:6] are compared. /
AnnaBridge	172:65be27845400	217	#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /!< Only Address2 bits[7] are compared. /
AnnaBridge	172:65be27845400	218	#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /!< No comparison is done. All Address2 are acknowledged./
AnnaBridge	172:65be27845400	219	/**
AnnaBridge	172:65be27845400	220	* @}
AnnaBridge	172:65be27845400	221	*/
AnnaBridge	172:65be27845400	222
AnnaBridge	172:65be27845400	223	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge	172:65be27845400	224	* @{
AnnaBridge	172:65be27845400	225	*/
AnnaBridge	172:65be27845400	226	#define LL_I2C_ACK 0x00000000U /!< ACK is sent after current received byte. /
AnnaBridge	172:65be27845400	227	#define LL_I2C_NACK I2C_CR2_NACK /!< NACK is sent after current received byte./
AnnaBridge	172:65be27845400	228	/**
AnnaBridge	172:65be27845400	229	* @}
AnnaBridge	172:65be27845400	230	*/
AnnaBridge	172:65be27845400	231
AnnaBridge	172:65be27845400	232	/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge	172:65be27845400	233	* @{
AnnaBridge	172:65be27845400	234	*/
AnnaBridge	172:65be27845400	235	#define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /!< Slave Address in 7-bit. /
AnnaBridge	172:65be27845400	236	#define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /!< Slave Address in 10-bit./
AnnaBridge	172:65be27845400	237	/**
AnnaBridge	172:65be27845400	238	* @}
AnnaBridge	172:65be27845400	239	*/
AnnaBridge	172:65be27845400	240
AnnaBridge	172:65be27845400	241	/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge	172:65be27845400	242	* @{
AnnaBridge	172:65be27845400	243	*/
AnnaBridge	172:65be27845400	244	#define LL_I2C_REQUEST_WRITE 0x00000000U /!< Master request a write transfer. /
AnnaBridge	172:65be27845400	245	#define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /!< Master request a read transfer. /
AnnaBridge	172:65be27845400	246	/**
AnnaBridge	172:65be27845400	247	* @}
AnnaBridge	172:65be27845400	248	*/
AnnaBridge	172:65be27845400	249
AnnaBridge	172:65be27845400	250	/** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge	172:65be27845400	251	* @{
AnnaBridge	172:65be27845400	252	*/
AnnaBridge	172:65be27845400	253	#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /!< Enable I2C Reload mode. /
AnnaBridge	172:65be27845400	254	#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /!< Enable I2C Automatic end mode with no HW PEC comparison. /
AnnaBridge	172:65be27845400	255	#define LL_I2C_MODE_SOFTEND 0x00000000U /!< Enable I2C Software end mode with no HW PEC comparison. /
AnnaBridge	172:65be27845400	256	#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	257	#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	258	#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	259	#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	260	#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	172:65be27845400	261	/**
AnnaBridge	172:65be27845400	262	* @}
AnnaBridge	172:65be27845400	263	*/
AnnaBridge	172:65be27845400	264
AnnaBridge	172:65be27845400	265	/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge	172:65be27845400	266	* @{
AnnaBridge	172:65be27845400	267	*/
AnnaBridge	172:65be27845400	268	#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /!< Don't Generate Stop and Start condition. /
AnnaBridge	172:65be27845400	269	#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U \| I2C_CR2_STOP) /!< Generate Stop condition (Size should be set to 0). /
AnnaBridge	172:65be27845400	270	#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Start for read request. /
AnnaBridge	172:65be27845400	271	#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Start for write request. /
AnnaBridge	172:65be27845400	272	#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Restart for read request, slave 7Bit address. /
AnnaBridge	172:65be27845400	273	#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 7Bit address. /
AnnaBridge	172:65be27845400	274	#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN \| I2C_CR2_HEAD10R) /!< Generate Restart for read request, slave 10Bit address. /
AnnaBridge	172:65be27845400	275	#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 10Bit address./
AnnaBridge	172:65be27845400	276	/**
AnnaBridge	172:65be27845400	277	* @}
AnnaBridge	172:65be27845400	278	*/
AnnaBridge	172:65be27845400	279
AnnaBridge	172:65be27845400	280	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge	172:65be27845400	281	* @{
AnnaBridge	172:65be27845400	282	*/
AnnaBridge	172:65be27845400	283	#define LL_I2C_DIRECTION_WRITE 0x00000000U /!< Write transfer request by master, slave enters receiver mode. /
AnnaBridge	172:65be27845400	284	#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /!< Read transfer request by master, slave enters transmitter mode./
AnnaBridge	172:65be27845400	285	/**
AnnaBridge	172:65be27845400	286	* @}
AnnaBridge	172:65be27845400	287	*/
AnnaBridge	172:65be27845400	288
AnnaBridge	172:65be27845400	289	/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge	172:65be27845400	290	* @{
AnnaBridge	172:65be27845400	291	*/
AnnaBridge	172:65be27845400	292	#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /!< Get address of data register used for transmission /
AnnaBridge	172:65be27845400	293	#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /!< Get address of data register used for reception /
AnnaBridge	172:65be27845400	294	/**
AnnaBridge	172:65be27845400	295	* @}
AnnaBridge	172:65be27845400	296	*/
AnnaBridge	172:65be27845400	297
AnnaBridge	172:65be27845400	298	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge	172:65be27845400	299	* @{
AnnaBridge	172:65be27845400	300	*/
AnnaBridge	172:65be27845400	301	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /!< TimeoutA is used to detect SCL low level timeout. /
AnnaBridge	172:65be27845400	302	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /!< TimeoutA is used to detect both SCL and SDA high level timeout./
AnnaBridge	172:65be27845400	303	/**
AnnaBridge	172:65be27845400	304	* @}
AnnaBridge	172:65be27845400	305	*/
AnnaBridge	172:65be27845400	306
AnnaBridge	172:65be27845400	307	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge	172:65be27845400	308	* @{
AnnaBridge	172:65be27845400	309	*/
AnnaBridge	172:65be27845400	310	#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /!< TimeoutA enable bit /
AnnaBridge	172:65be27845400	311	#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /!< TimeoutB (extended clock) enable bit /
AnnaBridge	172:65be27845400	312	#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN) /!< TimeoutA and TimeoutB (extended clock) enable bits /
AnnaBridge	172:65be27845400	313	/**
AnnaBridge	172:65be27845400	314	* @}
AnnaBridge	172:65be27845400	315	*/
AnnaBridge	172:65be27845400	316
AnnaBridge	172:65be27845400	317	/**
AnnaBridge	172:65be27845400	318	* @}
AnnaBridge	172:65be27845400	319	*/
AnnaBridge	172:65be27845400	320
AnnaBridge	172:65be27845400	321	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	322	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge	172:65be27845400	323	* @{
AnnaBridge	172:65be27845400	324	*/
AnnaBridge	172:65be27845400	325
AnnaBridge	172:65be27845400	326	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	172:65be27845400	327	* @{
AnnaBridge	172:65be27845400	328	*/
AnnaBridge	172:65be27845400	329
AnnaBridge	172:65be27845400	330	/**
AnnaBridge	172:65be27845400	331	* @brief Write a value in I2C register
AnnaBridge	172:65be27845400	332	* @param __INSTANCE__ I2C Instance
AnnaBridge	172:65be27845400	333	* @param __REG__ Register to be written
AnnaBridge	172:65be27845400	334	* @param __VALUE__ Value to be written in the register
AnnaBridge	172:65be27845400	335	* @retval None
AnnaBridge	172:65be27845400	336	*/
AnnaBridge	172:65be27845400	337	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	172:65be27845400	338
AnnaBridge	172:65be27845400	339	/**
AnnaBridge	172:65be27845400	340	* @brief Read a value in I2C register
AnnaBridge	172:65be27845400	341	* @param __INSTANCE__ I2C Instance
AnnaBridge	172:65be27845400	342	* @param __REG__ Register to be read
AnnaBridge	172:65be27845400	343	* @retval Register value
AnnaBridge	172:65be27845400	344	*/
AnnaBridge	172:65be27845400	345	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	172:65be27845400	346	/**
AnnaBridge	172:65be27845400	347	* @}
AnnaBridge	172:65be27845400	348	*/
AnnaBridge	172:65be27845400	349
AnnaBridge	172:65be27845400	350	/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge	172:65be27845400	351	* @{
AnnaBridge	172:65be27845400	352	*/
AnnaBridge	172:65be27845400	353	/**
AnnaBridge	172:65be27845400	354	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	172:65be27845400	355	* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge	172:65be27845400	356	* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge	172:65be27845400	357	* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge	172:65be27845400	358	* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge	172:65be27845400	359	* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge	172:65be27845400	360	* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	361	*/
AnnaBridge	172:65be27845400	362	#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge	172:65be27845400	363	((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) \| \
AnnaBridge	172:65be27845400	364	(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) \| \
AnnaBridge	172:65be27845400	365	(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) \| \
AnnaBridge	172:65be27845400	366	(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) \| \
AnnaBridge	172:65be27845400	367	(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge	172:65be27845400	368	/**
AnnaBridge	172:65be27845400	369	* @}
AnnaBridge	172:65be27845400	370	*/
AnnaBridge	172:65be27845400	371
AnnaBridge	172:65be27845400	372	/**
AnnaBridge	172:65be27845400	373	* @}
AnnaBridge	172:65be27845400	374	*/
AnnaBridge	172:65be27845400	375
AnnaBridge	172:65be27845400	376	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	377	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge	172:65be27845400	378	* @{
AnnaBridge	172:65be27845400	379	*/
AnnaBridge	172:65be27845400	380
AnnaBridge	172:65be27845400	381	/** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge	172:65be27845400	382	* @{
AnnaBridge	172:65be27845400	383	*/
AnnaBridge	172:65be27845400	384
AnnaBridge	172:65be27845400	385	/**
AnnaBridge	172:65be27845400	386	* @brief Enable I2C peripheral (PE = 1).
AnnaBridge	172:65be27845400	387	* @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge	172:65be27845400	388	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	389	* @retval None
AnnaBridge	172:65be27845400	390	*/
AnnaBridge	172:65be27845400	391	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	392	{
AnnaBridge	172:65be27845400	393	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	172:65be27845400	394	}
AnnaBridge	172:65be27845400	395
AnnaBridge	172:65be27845400	396	/**
AnnaBridge	172:65be27845400	397	* @brief Disable I2C peripheral (PE = 0).
AnnaBridge	172:65be27845400	398	* @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge	172:65be27845400	399	* Internal state machines and status bits are put back to their reset value.
AnnaBridge	172:65be27845400	400	* When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge	172:65be27845400	401	* @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge	172:65be27845400	402	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	403	* @retval None
AnnaBridge	172:65be27845400	404	*/
AnnaBridge	172:65be27845400	405	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	406	{
AnnaBridge	172:65be27845400	407	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	172:65be27845400	408	}
AnnaBridge	172:65be27845400	409
AnnaBridge	172:65be27845400	410	/**
AnnaBridge	172:65be27845400	411	* @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge	172:65be27845400	412	* @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge	172:65be27845400	413	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	414	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	415	*/
AnnaBridge	172:65be27845400	416	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	417	{
AnnaBridge	172:65be27845400	418	return ((READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	419	}
AnnaBridge	172:65be27845400	420
AnnaBridge	172:65be27845400	421	/**
AnnaBridge	172:65be27845400	422	* @brief Configure Noise Filters (Analog and Digital).
AnnaBridge	172:65be27845400	423	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	172:65be27845400	424	* The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	425	* @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge	172:65be27845400	426	* CR1 DNF LL_I2C_ConfigFilters
AnnaBridge	172:65be27845400	427	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	428	* @param AnalogFilter This parameter can be one of the following values:
AnnaBridge	172:65be27845400	429	* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge	172:65be27845400	430	* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge	172:65be27845400	431	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	172:65be27845400	432	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	172:65be27845400	433	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	172:65be27845400	434	* @retval None
AnnaBridge	172:65be27845400	435	*/
AnnaBridge	172:65be27845400	436	__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge	172:65be27845400	437	{
AnnaBridge	172:65be27845400	438	MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF \| I2C_CR1_DNF, AnalogFilter \| (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge	172:65be27845400	439	}
AnnaBridge	172:65be27845400	440
AnnaBridge	172:65be27845400	441	/**
AnnaBridge	172:65be27845400	442	* @brief Configure Digital Noise Filter.
AnnaBridge	172:65be27845400	443	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	172:65be27845400	444	* This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	445	* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge	172:65be27845400	446	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	447	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	172:65be27845400	448	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	172:65be27845400	449	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	172:65be27845400	450	* @retval None
AnnaBridge	172:65be27845400	451	*/
AnnaBridge	172:65be27845400	452	__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge	172:65be27845400	453	{
AnnaBridge	172:65be27845400	454	MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge	172:65be27845400	455	}
AnnaBridge	172:65be27845400	456
AnnaBridge	172:65be27845400	457	/**
AnnaBridge	172:65be27845400	458	* @brief Get the current Digital Noise Filter configuration.
AnnaBridge	172:65be27845400	459	* @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge	172:65be27845400	460	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	461	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	462	*/
AnnaBridge	172:65be27845400	463	__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	464	{
AnnaBridge	172:65be27845400	465	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge	172:65be27845400	466	}
AnnaBridge	172:65be27845400	467
AnnaBridge	172:65be27845400	468	/**
AnnaBridge	172:65be27845400	469	* @brief Enable Analog Noise Filter.
AnnaBridge	172:65be27845400	470	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	471	* @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge	172:65be27845400	472	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	473	* @retval None
AnnaBridge	172:65be27845400	474	*/
AnnaBridge	172:65be27845400	475	__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	476	{
AnnaBridge	172:65be27845400	477	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	172:65be27845400	478	}
AnnaBridge	172:65be27845400	479
AnnaBridge	172:65be27845400	480	/**
AnnaBridge	172:65be27845400	481	* @brief Disable Analog Noise Filter.
AnnaBridge	172:65be27845400	482	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	483	* @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge	172:65be27845400	484	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	485	* @retval None
AnnaBridge	172:65be27845400	486	*/
AnnaBridge	172:65be27845400	487	__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	488	{
AnnaBridge	172:65be27845400	489	SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	172:65be27845400	490	}
AnnaBridge	172:65be27845400	491
AnnaBridge	172:65be27845400	492	/**
AnnaBridge	172:65be27845400	493	* @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge	172:65be27845400	494	* @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge	172:65be27845400	495	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	496	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	497	*/
AnnaBridge	172:65be27845400	498	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	499	{
AnnaBridge	172:65be27845400	500	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	501	}
AnnaBridge	172:65be27845400	502
AnnaBridge	172:65be27845400	503	/**
AnnaBridge	172:65be27845400	504	* @brief Enable DMA transmission requests.
AnnaBridge	172:65be27845400	505	* @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge	172:65be27845400	506	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	507	* @retval None
AnnaBridge	172:65be27845400	508	*/
AnnaBridge	172:65be27845400	509	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	510	{
AnnaBridge	172:65be27845400	511	SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	172:65be27845400	512	}
AnnaBridge	172:65be27845400	513
AnnaBridge	172:65be27845400	514	/**
AnnaBridge	172:65be27845400	515	* @brief Disable DMA transmission requests.
AnnaBridge	172:65be27845400	516	* @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge	172:65be27845400	517	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	518	* @retval None
AnnaBridge	172:65be27845400	519	*/
AnnaBridge	172:65be27845400	520	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	521	{
AnnaBridge	172:65be27845400	522	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	172:65be27845400	523	}
AnnaBridge	172:65be27845400	524
AnnaBridge	172:65be27845400	525	/**
AnnaBridge	172:65be27845400	526	* @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge	172:65be27845400	527	* @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge	172:65be27845400	528	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	529	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	530	*/
AnnaBridge	172:65be27845400	531	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	532	{
AnnaBridge	172:65be27845400	533	return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	534	}
AnnaBridge	172:65be27845400	535
AnnaBridge	172:65be27845400	536	/**
AnnaBridge	172:65be27845400	537	* @brief Enable DMA reception requests.
AnnaBridge	172:65be27845400	538	* @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge	172:65be27845400	539	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	540	* @retval None
AnnaBridge	172:65be27845400	541	*/
AnnaBridge	172:65be27845400	542	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	543	{
AnnaBridge	172:65be27845400	544	SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	172:65be27845400	545	}
AnnaBridge	172:65be27845400	546
AnnaBridge	172:65be27845400	547	/**
AnnaBridge	172:65be27845400	548	* @brief Disable DMA reception requests.
AnnaBridge	172:65be27845400	549	* @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge	172:65be27845400	550	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	551	* @retval None
AnnaBridge	172:65be27845400	552	*/
AnnaBridge	172:65be27845400	553	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	554	{
AnnaBridge	172:65be27845400	555	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	172:65be27845400	556	}
AnnaBridge	172:65be27845400	557
AnnaBridge	172:65be27845400	558	/**
AnnaBridge	172:65be27845400	559	* @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge	172:65be27845400	560	* @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge	172:65be27845400	561	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	562	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	563	*/
AnnaBridge	172:65be27845400	564	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	565	{
AnnaBridge	172:65be27845400	566	return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	567	}
AnnaBridge	172:65be27845400	568
AnnaBridge	172:65be27845400	569	/**
AnnaBridge	172:65be27845400	570	* @brief Get the data register address used for DMA transfer
AnnaBridge	172:65be27845400	571	* @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge	172:65be27845400	572	* RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge	172:65be27845400	573	* @param I2Cx I2C Instance
AnnaBridge	172:65be27845400	574	* @param Direction This parameter can be one of the following values:
AnnaBridge	172:65be27845400	575	* @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge	172:65be27845400	576	* @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge	172:65be27845400	577	* @retval Address of data register
AnnaBridge	172:65be27845400	578	*/
AnnaBridge	172:65be27845400	579	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge	172:65be27845400	580	{
AnnaBridge	172:65be27845400	581	register uint32_t data_reg_addr;
AnnaBridge	172:65be27845400	582
AnnaBridge	172:65be27845400	583	if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge	172:65be27845400	584	{
AnnaBridge	172:65be27845400	585	/* return address of TXDR register */
AnnaBridge	172:65be27845400	586	data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge	172:65be27845400	587	}
AnnaBridge	172:65be27845400	588	else
AnnaBridge	172:65be27845400	589	{
AnnaBridge	172:65be27845400	590	/* return address of RXDR register */
AnnaBridge	172:65be27845400	591	data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge	172:65be27845400	592	}
AnnaBridge	172:65be27845400	593
AnnaBridge	172:65be27845400	594	return data_reg_addr;
AnnaBridge	172:65be27845400	595	}
AnnaBridge	172:65be27845400	596
AnnaBridge	172:65be27845400	597	/**
AnnaBridge	172:65be27845400	598	* @brief Enable Clock stretching.
AnnaBridge	172:65be27845400	599	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	600	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge	172:65be27845400	601	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	602	* @retval None
AnnaBridge	172:65be27845400	603	*/
AnnaBridge	172:65be27845400	604	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	605	{
AnnaBridge	172:65be27845400	606	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	172:65be27845400	607	}
AnnaBridge	172:65be27845400	608
AnnaBridge	172:65be27845400	609	/**
AnnaBridge	172:65be27845400	610	* @brief Disable Clock stretching.
AnnaBridge	172:65be27845400	611	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	612	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge	172:65be27845400	613	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	614	* @retval None
AnnaBridge	172:65be27845400	615	*/
AnnaBridge	172:65be27845400	616	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	617	{
AnnaBridge	172:65be27845400	618	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	172:65be27845400	619	}
AnnaBridge	172:65be27845400	620
AnnaBridge	172:65be27845400	621	/**
AnnaBridge	172:65be27845400	622	* @brief Check if Clock stretching is enabled or disabled.
AnnaBridge	172:65be27845400	623	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge	172:65be27845400	624	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	625	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	626	*/
AnnaBridge	172:65be27845400	627	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	628	{
AnnaBridge	172:65be27845400	629	return ((READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	630	}
AnnaBridge	172:65be27845400	631
AnnaBridge	172:65be27845400	632	/**
AnnaBridge	172:65be27845400	633	* @brief Enable hardware byte control in slave mode.
AnnaBridge	172:65be27845400	634	* @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge	172:65be27845400	635	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	636	* @retval None
AnnaBridge	172:65be27845400	637	*/
AnnaBridge	172:65be27845400	638	__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	639	{
AnnaBridge	172:65be27845400	640	SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	172:65be27845400	641	}
AnnaBridge	172:65be27845400	642
AnnaBridge	172:65be27845400	643	/**
AnnaBridge	172:65be27845400	644	* @brief Disable hardware byte control in slave mode.
AnnaBridge	172:65be27845400	645	* @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge	172:65be27845400	646	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	647	* @retval None
AnnaBridge	172:65be27845400	648	*/
AnnaBridge	172:65be27845400	649	__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	650	{
AnnaBridge	172:65be27845400	651	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	172:65be27845400	652	}
AnnaBridge	172:65be27845400	653
AnnaBridge	172:65be27845400	654	/**
AnnaBridge	172:65be27845400	655	* @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge	172:65be27845400	656	* @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge	172:65be27845400	657	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	658	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	659	*/
AnnaBridge	172:65be27845400	660	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	661	{
AnnaBridge	172:65be27845400	662	return ((READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	663	}
AnnaBridge	172:65be27845400	664
AnnaBridge	172:65be27845400	665	/**
AnnaBridge	172:65be27845400	666	* @brief Enable Wakeup from STOP.
AnnaBridge	172:65be27845400	667	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	668	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	669	* @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge	172:65be27845400	670	* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge	172:65be27845400	671	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	672	* @retval None
AnnaBridge	172:65be27845400	673	*/
AnnaBridge	172:65be27845400	674	__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	675	{
AnnaBridge	172:65be27845400	676	SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	172:65be27845400	677	}
AnnaBridge	172:65be27845400	678
AnnaBridge	172:65be27845400	679	/**
AnnaBridge	172:65be27845400	680	* @brief Disable Wakeup from STOP.
AnnaBridge	172:65be27845400	681	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	682	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	683	* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge	172:65be27845400	684	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	685	* @retval None
AnnaBridge	172:65be27845400	686	*/
AnnaBridge	172:65be27845400	687	__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	688	{
AnnaBridge	172:65be27845400	689	CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	172:65be27845400	690	}
AnnaBridge	172:65be27845400	691
AnnaBridge	172:65be27845400	692	/**
AnnaBridge	172:65be27845400	693	* @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge	172:65be27845400	694	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	695	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	696	* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge	172:65be27845400	697	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	698	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	699	*/
AnnaBridge	172:65be27845400	700	__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	701	{
AnnaBridge	172:65be27845400	702	return ((READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	703	}
AnnaBridge	172:65be27845400	704
AnnaBridge	172:65be27845400	705	/**
AnnaBridge	172:65be27845400	706	* @brief Enable General Call.
AnnaBridge	172:65be27845400	707	* @note When enabled the Address 0x00 is ACKed.
AnnaBridge	172:65be27845400	708	* @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge	172:65be27845400	709	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	710	* @retval None
AnnaBridge	172:65be27845400	711	*/
AnnaBridge	172:65be27845400	712	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	713	{
AnnaBridge	172:65be27845400	714	SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	172:65be27845400	715	}
AnnaBridge	172:65be27845400	716
AnnaBridge	172:65be27845400	717	/**
AnnaBridge	172:65be27845400	718	* @brief Disable General Call.
AnnaBridge	172:65be27845400	719	* @note When disabled the Address 0x00 is NACKed.
AnnaBridge	172:65be27845400	720	* @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge	172:65be27845400	721	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	722	* @retval None
AnnaBridge	172:65be27845400	723	*/
AnnaBridge	172:65be27845400	724	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	725	{
AnnaBridge	172:65be27845400	726	CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	172:65be27845400	727	}
AnnaBridge	172:65be27845400	728
AnnaBridge	172:65be27845400	729	/**
AnnaBridge	172:65be27845400	730	* @brief Check if General Call is enabled or disabled.
AnnaBridge	172:65be27845400	731	* @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge	172:65be27845400	732	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	733	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	734	*/
AnnaBridge	172:65be27845400	735	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	736	{
AnnaBridge	172:65be27845400	737	return ((READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	738	}
AnnaBridge	172:65be27845400	739
AnnaBridge	172:65be27845400	740	/**
AnnaBridge	172:65be27845400	741	* @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge	172:65be27845400	742	* @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge	172:65be27845400	743	* @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge	172:65be27845400	744	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	745	* @param AddressingMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	746	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	172:65be27845400	747	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	172:65be27845400	748	* @retval None
AnnaBridge	172:65be27845400	749	*/
AnnaBridge	172:65be27845400	750	__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge	172:65be27845400	751	{
AnnaBridge	172:65be27845400	752	MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge	172:65be27845400	753	}
AnnaBridge	172:65be27845400	754
AnnaBridge	172:65be27845400	755	/**
AnnaBridge	172:65be27845400	756	* @brief Get the Master addressing mode.
AnnaBridge	172:65be27845400	757	* @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge	172:65be27845400	758	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	759	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	760	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	172:65be27845400	761	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	172:65be27845400	762	*/
AnnaBridge	172:65be27845400	763	__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	764	{
AnnaBridge	172:65be27845400	765	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge	172:65be27845400	766	}
AnnaBridge	172:65be27845400	767
AnnaBridge	172:65be27845400	768	/**
AnnaBridge	172:65be27845400	769	* @brief Set the Own Address1.
AnnaBridge	172:65be27845400	770	* @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge	172:65be27845400	771	* OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge	172:65be27845400	772	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	773	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge	172:65be27845400	774	* @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge	172:65be27845400	775	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge	172:65be27845400	776	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge	172:65be27845400	777	* @retval None
AnnaBridge	172:65be27845400	778	*/
AnnaBridge	172:65be27845400	779	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge	172:65be27845400	780	{
AnnaBridge	172:65be27845400	781	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 \| I2C_OAR1_OA1MODE, OwnAddress1 \| OwnAddrSize);
AnnaBridge	172:65be27845400	782	}
AnnaBridge	172:65be27845400	783
AnnaBridge	172:65be27845400	784	/**
AnnaBridge	172:65be27845400	785	* @brief Enable acknowledge on Own Address1 match address.
AnnaBridge	172:65be27845400	786	* @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge	172:65be27845400	787	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	788	* @retval None
AnnaBridge	172:65be27845400	789	*/
AnnaBridge	172:65be27845400	790	__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	791	{
AnnaBridge	172:65be27845400	792	SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	172:65be27845400	793	}
AnnaBridge	172:65be27845400	794
AnnaBridge	172:65be27845400	795	/**
AnnaBridge	172:65be27845400	796	* @brief Disable acknowledge on Own Address1 match address.
AnnaBridge	172:65be27845400	797	* @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge	172:65be27845400	798	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	799	* @retval None
AnnaBridge	172:65be27845400	800	*/
AnnaBridge	172:65be27845400	801	__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	802	{
AnnaBridge	172:65be27845400	803	CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	172:65be27845400	804	}
AnnaBridge	172:65be27845400	805
AnnaBridge	172:65be27845400	806	/**
AnnaBridge	172:65be27845400	807	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	172:65be27845400	808	* @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge	172:65be27845400	809	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	810	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	811	*/
AnnaBridge	172:65be27845400	812	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	813	{
AnnaBridge	172:65be27845400	814	return ((READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	815	}
AnnaBridge	172:65be27845400	816
AnnaBridge	172:65be27845400	817	/**
AnnaBridge	172:65be27845400	818	* @brief Set the 7bits Own Address2.
AnnaBridge	172:65be27845400	819	* @note This action has no effect if own address2 is enabled.
AnnaBridge	172:65be27845400	820	* @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge	172:65be27845400	821	* OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge	172:65be27845400	822	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	823	* @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge	172:65be27845400	824	* @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge	172:65be27845400	825	* @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge	172:65be27845400	826	* @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge	172:65be27845400	827	* @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge	172:65be27845400	828	* @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge	172:65be27845400	829	* @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge	172:65be27845400	830	* @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge	172:65be27845400	831	* @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge	172:65be27845400	832	* @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge	172:65be27845400	833	* @retval None
AnnaBridge	172:65be27845400	834	*/
AnnaBridge	172:65be27845400	835	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge	172:65be27845400	836	{
AnnaBridge	172:65be27845400	837	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 \| I2C_OAR2_OA2MSK, OwnAddress2 \| OwnAddrMask);
AnnaBridge	172:65be27845400	838	}
AnnaBridge	172:65be27845400	839
AnnaBridge	172:65be27845400	840	/**
AnnaBridge	172:65be27845400	841	* @brief Enable acknowledge on Own Address2 match address.
AnnaBridge	172:65be27845400	842	* @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge	172:65be27845400	843	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	844	* @retval None
AnnaBridge	172:65be27845400	845	*/
AnnaBridge	172:65be27845400	846	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	847	{
AnnaBridge	172:65be27845400	848	SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	172:65be27845400	849	}
AnnaBridge	172:65be27845400	850
AnnaBridge	172:65be27845400	851	/**
AnnaBridge	172:65be27845400	852	* @brief Disable acknowledge on Own Address2 match address.
AnnaBridge	172:65be27845400	853	* @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge	172:65be27845400	854	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	855	* @retval None
AnnaBridge	172:65be27845400	856	*/
AnnaBridge	172:65be27845400	857	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	858	{
AnnaBridge	172:65be27845400	859	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	172:65be27845400	860	}
AnnaBridge	172:65be27845400	861
AnnaBridge	172:65be27845400	862	/**
AnnaBridge	172:65be27845400	863	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	172:65be27845400	864	* @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge	172:65be27845400	865	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	866	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	867	*/
AnnaBridge	172:65be27845400	868	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	869	{
AnnaBridge	172:65be27845400	870	return ((READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	871	}
AnnaBridge	172:65be27845400	872
AnnaBridge	172:65be27845400	873	/**
AnnaBridge	172:65be27845400	874	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	172:65be27845400	875	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	172:65be27845400	876	* @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge	172:65be27845400	877	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	878	* @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge	172:65be27845400	879	* @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge	172:65be27845400	880	* @retval None
AnnaBridge	172:65be27845400	881	*/
AnnaBridge	172:65be27845400	882	__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge	172:65be27845400	883	{
AnnaBridge	172:65be27845400	884	WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge	172:65be27845400	885	}
AnnaBridge	172:65be27845400	886
AnnaBridge	172:65be27845400	887	/**
AnnaBridge	172:65be27845400	888	* @brief Get the Timing Prescaler setting.
AnnaBridge	172:65be27845400	889	* @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge	172:65be27845400	890	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	891	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	892	*/
AnnaBridge	172:65be27845400	893	__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	894	{
AnnaBridge	172:65be27845400	895	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge	172:65be27845400	896	}
AnnaBridge	172:65be27845400	897
AnnaBridge	172:65be27845400	898	/**
AnnaBridge	172:65be27845400	899	* @brief Get the SCL low period setting.
AnnaBridge	172:65be27845400	900	* @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge	172:65be27845400	901	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	902	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	903	*/
AnnaBridge	172:65be27845400	904	__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	905	{
AnnaBridge	172:65be27845400	906	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge	172:65be27845400	907	}
AnnaBridge	172:65be27845400	908
AnnaBridge	172:65be27845400	909	/**
AnnaBridge	172:65be27845400	910	* @brief Get the SCL high period setting.
AnnaBridge	172:65be27845400	911	* @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge	172:65be27845400	912	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	913	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	914	*/
AnnaBridge	172:65be27845400	915	__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	916	{
AnnaBridge	172:65be27845400	917	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge	172:65be27845400	918	}
AnnaBridge	172:65be27845400	919
AnnaBridge	172:65be27845400	920	/**
AnnaBridge	172:65be27845400	921	* @brief Get the SDA hold time.
AnnaBridge	172:65be27845400	922	* @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge	172:65be27845400	923	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	924	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	925	*/
AnnaBridge	172:65be27845400	926	__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	927	{
AnnaBridge	172:65be27845400	928	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge	172:65be27845400	929	}
AnnaBridge	172:65be27845400	930
AnnaBridge	172:65be27845400	931	/**
AnnaBridge	172:65be27845400	932	* @brief Get the SDA setup time.
AnnaBridge	172:65be27845400	933	* @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge	172:65be27845400	934	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	935	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	172:65be27845400	936	*/
AnnaBridge	172:65be27845400	937	__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	938	{
AnnaBridge	172:65be27845400	939	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge	172:65be27845400	940	}
AnnaBridge	172:65be27845400	941
AnnaBridge	172:65be27845400	942	/**
AnnaBridge	172:65be27845400	943	* @brief Configure peripheral mode.
AnnaBridge	172:65be27845400	944	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	945	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	946	* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge	172:65be27845400	947	* CR1 SMBDEN LL_I2C_SetMode
AnnaBridge	172:65be27845400	948	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	949	* @param PeripheralMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	950	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	172:65be27845400	951	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	172:65be27845400	952	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	172:65be27845400	953	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	172:65be27845400	954	* @retval None
AnnaBridge	172:65be27845400	955	*/
AnnaBridge	172:65be27845400	956	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge	172:65be27845400	957	{
AnnaBridge	172:65be27845400	958	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge	172:65be27845400	959	}
AnnaBridge	172:65be27845400	960
AnnaBridge	172:65be27845400	961	/**
AnnaBridge	172:65be27845400	962	* @brief Get peripheral mode.
AnnaBridge	172:65be27845400	963	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	964	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	965	* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge	172:65be27845400	966	* CR1 SMBDEN LL_I2C_GetMode
AnnaBridge	172:65be27845400	967	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	968	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	969	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	172:65be27845400	970	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	172:65be27845400	971	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	172:65be27845400	972	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	172:65be27845400	973	*/
AnnaBridge	172:65be27845400	974	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	975	{
AnnaBridge	172:65be27845400	976	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN));
AnnaBridge	172:65be27845400	977	}
AnnaBridge	172:65be27845400	978
AnnaBridge	172:65be27845400	979	/**
AnnaBridge	172:65be27845400	980	* @brief Enable SMBus alert (Host or Device mode)
AnnaBridge	172:65be27845400	981	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	982	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	983	* @note SMBus Device mode:
AnnaBridge	172:65be27845400	984	* - SMBus Alert pin is drived low and
AnnaBridge	172:65be27845400	985	* Alert Response Address Header acknowledge is enabled.
AnnaBridge	172:65be27845400	986	* SMBus Host mode:
AnnaBridge	172:65be27845400	987	* - SMBus Alert pin management is supported.
AnnaBridge	172:65be27845400	988	* @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge	172:65be27845400	989	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	990	* @retval None
AnnaBridge	172:65be27845400	991	*/
AnnaBridge	172:65be27845400	992	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	993	{
AnnaBridge	172:65be27845400	994	SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	172:65be27845400	995	}
AnnaBridge	172:65be27845400	996
AnnaBridge	172:65be27845400	997	/**
AnnaBridge	172:65be27845400	998	* @brief Disable SMBus alert (Host or Device mode)
AnnaBridge	172:65be27845400	999	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1000	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1001	* @note SMBus Device mode:
AnnaBridge	172:65be27845400	1002	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge	172:65be27845400	1003	* Alert Response Address Header acknowledge is disabled.
AnnaBridge	172:65be27845400	1004	* SMBus Host mode:
AnnaBridge	172:65be27845400	1005	* - SMBus Alert pin management is not supported.
AnnaBridge	172:65be27845400	1006	* @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge	172:65be27845400	1007	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1008	* @retval None
AnnaBridge	172:65be27845400	1009	*/
AnnaBridge	172:65be27845400	1010	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1011	{
AnnaBridge	172:65be27845400	1012	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	172:65be27845400	1013	}
AnnaBridge	172:65be27845400	1014
AnnaBridge	172:65be27845400	1015	/**
AnnaBridge	172:65be27845400	1016	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge	172:65be27845400	1017	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1018	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1019	* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge	172:65be27845400	1020	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1021	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1022	*/
AnnaBridge	172:65be27845400	1023	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1024	{
AnnaBridge	172:65be27845400	1025	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1026	}
AnnaBridge	172:65be27845400	1027
AnnaBridge	172:65be27845400	1028	/**
AnnaBridge	172:65be27845400	1029	* @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge	172:65be27845400	1030	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1031	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1032	* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge	172:65be27845400	1033	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1034	* @retval None
AnnaBridge	172:65be27845400	1035	*/
AnnaBridge	172:65be27845400	1036	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1037	{
AnnaBridge	172:65be27845400	1038	SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	172:65be27845400	1039	}
AnnaBridge	172:65be27845400	1040
AnnaBridge	172:65be27845400	1041	/**
AnnaBridge	172:65be27845400	1042	* @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge	172:65be27845400	1043	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1044	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1045	* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge	172:65be27845400	1046	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1047	* @retval None
AnnaBridge	172:65be27845400	1048	*/
AnnaBridge	172:65be27845400	1049	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1050	{
AnnaBridge	172:65be27845400	1051	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	172:65be27845400	1052	}
AnnaBridge	172:65be27845400	1053
AnnaBridge	172:65be27845400	1054	/**
AnnaBridge	172:65be27845400	1055	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge	172:65be27845400	1056	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1057	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1058	* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge	172:65be27845400	1059	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1060	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1061	*/
AnnaBridge	172:65be27845400	1062	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1063	{
AnnaBridge	172:65be27845400	1064	return ((READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1065	}
AnnaBridge	172:65be27845400	1066
AnnaBridge	172:65be27845400	1067	/**
AnnaBridge	172:65be27845400	1068	* @brief Configure the SMBus Clock Timeout.
AnnaBridge	172:65be27845400	1069	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1070	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1071	* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge	172:65be27845400	1072	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	172:65be27845400	1073	* TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	172:65be27845400	1074	* TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge	172:65be27845400	1075	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1076	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	172:65be27845400	1077	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1078	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	172:65be27845400	1079	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	172:65be27845400	1080	* @param TimeoutB
AnnaBridge	172:65be27845400	1081	* @retval None
AnnaBridge	172:65be27845400	1082	*/
AnnaBridge	172:65be27845400	1083	__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge	172:65be27845400	1084	uint32_t TimeoutB)
AnnaBridge	172:65be27845400	1085	{
AnnaBridge	172:65be27845400	1086	MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA \| I2C_TIMEOUTR_TIDLE \| I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge	172:65be27845400	1087	TimeoutA \| TimeoutAMode \| (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge	172:65be27845400	1088	}
AnnaBridge	172:65be27845400	1089
AnnaBridge	172:65be27845400	1090	/**
AnnaBridge	172:65be27845400	1091	* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge	172:65be27845400	1092	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1093	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1094	* @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge	172:65be27845400	1095	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge	172:65be27845400	1096	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1097	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	172:65be27845400	1098	* @retval None
AnnaBridge	172:65be27845400	1099	*/
AnnaBridge	172:65be27845400	1100	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge	172:65be27845400	1101	{
AnnaBridge	172:65be27845400	1102	WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge	172:65be27845400	1103	}
AnnaBridge	172:65be27845400	1104
AnnaBridge	172:65be27845400	1105	/**
AnnaBridge	172:65be27845400	1106	* @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge	172:65be27845400	1107	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1108	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1109	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge	172:65be27845400	1110	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1111	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	172:65be27845400	1112	*/
AnnaBridge	172:65be27845400	1113	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1114	{
AnnaBridge	172:65be27845400	1115	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge	172:65be27845400	1116	}
AnnaBridge	172:65be27845400	1117
AnnaBridge	172:65be27845400	1118	/**
AnnaBridge	172:65be27845400	1119	* @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge	172:65be27845400	1120	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1121	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1122	* @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge	172:65be27845400	1123	* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge	172:65be27845400	1124	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1125	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1126	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	172:65be27845400	1127	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	172:65be27845400	1128	* @retval None
AnnaBridge	172:65be27845400	1129	*/
AnnaBridge	172:65be27845400	1130	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge	172:65be27845400	1131	{
AnnaBridge	172:65be27845400	1132	WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge	172:65be27845400	1133	}
AnnaBridge	172:65be27845400	1134
AnnaBridge	172:65be27845400	1135	/**
AnnaBridge	172:65be27845400	1136	* @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge	172:65be27845400	1137	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1138	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1139	* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge	172:65be27845400	1140	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1141	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1142	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	172:65be27845400	1143	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	172:65be27845400	1144	*/
AnnaBridge	172:65be27845400	1145	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1146	{
AnnaBridge	172:65be27845400	1147	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge	172:65be27845400	1148	}
AnnaBridge	172:65be27845400	1149
AnnaBridge	172:65be27845400	1150	/**
AnnaBridge	172:65be27845400	1151	* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge	172:65be27845400	1152	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1153	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1154	* @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge	172:65be27845400	1155	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge	172:65be27845400	1156	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1157	* @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	172:65be27845400	1158	* @retval None
AnnaBridge	172:65be27845400	1159	*/
AnnaBridge	172:65be27845400	1160	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge	172:65be27845400	1161	{
AnnaBridge	172:65be27845400	1162	WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	172:65be27845400	1163	}
AnnaBridge	172:65be27845400	1164
AnnaBridge	172:65be27845400	1165	/**
AnnaBridge	172:65be27845400	1166	* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge	172:65be27845400	1167	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1168	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1169	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge	172:65be27845400	1170	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1171	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	172:65be27845400	1172	*/
AnnaBridge	172:65be27845400	1173	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1174	{
AnnaBridge	172:65be27845400	1175	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	172:65be27845400	1176	}
AnnaBridge	172:65be27845400	1177
AnnaBridge	172:65be27845400	1178	/**
AnnaBridge	172:65be27845400	1179	* @brief Enable the SMBus Clock Timeout.
AnnaBridge	172:65be27845400	1180	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1181	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1182	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge	172:65be27845400	1183	* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge	172:65be27845400	1184	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1185	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1186	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	172:65be27845400	1187	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	172:65be27845400	1188	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	172:65be27845400	1189	* @retval None
AnnaBridge	172:65be27845400	1190	*/
AnnaBridge	172:65be27845400	1191	__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	172:65be27845400	1192	{
AnnaBridge	172:65be27845400	1193	SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	172:65be27845400	1194	}
AnnaBridge	172:65be27845400	1195
AnnaBridge	172:65be27845400	1196	/**
AnnaBridge	172:65be27845400	1197	* @brief Disable the SMBus Clock Timeout.
AnnaBridge	172:65be27845400	1198	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1199	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1200	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge	172:65be27845400	1201	* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge	172:65be27845400	1202	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1203	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1204	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	172:65be27845400	1205	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	172:65be27845400	1206	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	172:65be27845400	1207	* @retval None
AnnaBridge	172:65be27845400	1208	*/
AnnaBridge	172:65be27845400	1209	__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	172:65be27845400	1210	{
AnnaBridge	172:65be27845400	1211	CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	172:65be27845400	1212	}
AnnaBridge	172:65be27845400	1213
AnnaBridge	172:65be27845400	1214	/**
AnnaBridge	172:65be27845400	1215	* @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge	172:65be27845400	1216	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1217	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1218	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge	172:65be27845400	1219	* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge	172:65be27845400	1220	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1221	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1222	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	172:65be27845400	1223	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	172:65be27845400	1224	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	172:65be27845400	1225	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1226	*/
AnnaBridge	172:65be27845400	1227	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	172:65be27845400	1228	{
AnnaBridge	172:65be27845400	1229	return ((READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1230	}
AnnaBridge	172:65be27845400	1231
AnnaBridge	172:65be27845400	1232	/**
AnnaBridge	172:65be27845400	1233	* @}
AnnaBridge	172:65be27845400	1234	*/
AnnaBridge	172:65be27845400	1235
AnnaBridge	172:65be27845400	1236	/** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge	172:65be27845400	1237	* @{
AnnaBridge	172:65be27845400	1238	*/
AnnaBridge	172:65be27845400	1239
AnnaBridge	172:65be27845400	1240	/**
AnnaBridge	172:65be27845400	1241	* @brief Enable TXIS interrupt.
AnnaBridge	172:65be27845400	1242	* @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge	172:65be27845400	1243	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1244	* @retval None
AnnaBridge	172:65be27845400	1245	*/
AnnaBridge	172:65be27845400	1246	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1247	{
AnnaBridge	172:65be27845400	1248	SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	172:65be27845400	1249	}
AnnaBridge	172:65be27845400	1250
AnnaBridge	172:65be27845400	1251	/**
AnnaBridge	172:65be27845400	1252	* @brief Disable TXIS interrupt.
AnnaBridge	172:65be27845400	1253	* @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge	172:65be27845400	1254	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1255	* @retval None
AnnaBridge	172:65be27845400	1256	*/
AnnaBridge	172:65be27845400	1257	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1258	{
AnnaBridge	172:65be27845400	1259	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	172:65be27845400	1260	}
AnnaBridge	172:65be27845400	1261
AnnaBridge	172:65be27845400	1262	/**
AnnaBridge	172:65be27845400	1263	* @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1264	* @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge	172:65be27845400	1265	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1266	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1267	*/
AnnaBridge	172:65be27845400	1268	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1269	{
AnnaBridge	172:65be27845400	1270	return ((READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1271	}
AnnaBridge	172:65be27845400	1272
AnnaBridge	172:65be27845400	1273	/**
AnnaBridge	172:65be27845400	1274	* @brief Enable RXNE interrupt.
AnnaBridge	172:65be27845400	1275	* @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge	172:65be27845400	1276	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1277	* @retval None
AnnaBridge	172:65be27845400	1278	*/
AnnaBridge	172:65be27845400	1279	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1280	{
AnnaBridge	172:65be27845400	1281	SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	172:65be27845400	1282	}
AnnaBridge	172:65be27845400	1283
AnnaBridge	172:65be27845400	1284	/**
AnnaBridge	172:65be27845400	1285	* @brief Disable RXNE interrupt.
AnnaBridge	172:65be27845400	1286	* @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge	172:65be27845400	1287	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1288	* @retval None
AnnaBridge	172:65be27845400	1289	*/
AnnaBridge	172:65be27845400	1290	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1291	{
AnnaBridge	172:65be27845400	1292	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	172:65be27845400	1293	}
AnnaBridge	172:65be27845400	1294
AnnaBridge	172:65be27845400	1295	/**
AnnaBridge	172:65be27845400	1296	* @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1297	* @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge	172:65be27845400	1298	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1299	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1300	*/
AnnaBridge	172:65be27845400	1301	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1302	{
AnnaBridge	172:65be27845400	1303	return ((READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1304	}
AnnaBridge	172:65be27845400	1305
AnnaBridge	172:65be27845400	1306	/**
AnnaBridge	172:65be27845400	1307	* @brief Enable Address match interrupt (slave mode only).
AnnaBridge	172:65be27845400	1308	* @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge	172:65be27845400	1309	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1310	* @retval None
AnnaBridge	172:65be27845400	1311	*/
AnnaBridge	172:65be27845400	1312	__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1313	{
AnnaBridge	172:65be27845400	1314	SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	172:65be27845400	1315	}
AnnaBridge	172:65be27845400	1316
AnnaBridge	172:65be27845400	1317	/**
AnnaBridge	172:65be27845400	1318	* @brief Disable Address match interrupt (slave mode only).
AnnaBridge	172:65be27845400	1319	* @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge	172:65be27845400	1320	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1321	* @retval None
AnnaBridge	172:65be27845400	1322	*/
AnnaBridge	172:65be27845400	1323	__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1324	{
AnnaBridge	172:65be27845400	1325	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	172:65be27845400	1326	}
AnnaBridge	172:65be27845400	1327
AnnaBridge	172:65be27845400	1328	/**
AnnaBridge	172:65be27845400	1329	* @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1330	* @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge	172:65be27845400	1331	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1332	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1333	*/
AnnaBridge	172:65be27845400	1334	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1335	{
AnnaBridge	172:65be27845400	1336	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1337	}
AnnaBridge	172:65be27845400	1338
AnnaBridge	172:65be27845400	1339	/**
AnnaBridge	172:65be27845400	1340	* @brief Enable Not acknowledge received interrupt.
AnnaBridge	172:65be27845400	1341	* @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge	172:65be27845400	1342	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1343	* @retval None
AnnaBridge	172:65be27845400	1344	*/
AnnaBridge	172:65be27845400	1345	__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1346	{
AnnaBridge	172:65be27845400	1347	SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	172:65be27845400	1348	}
AnnaBridge	172:65be27845400	1349
AnnaBridge	172:65be27845400	1350	/**
AnnaBridge	172:65be27845400	1351	* @brief Disable Not acknowledge received interrupt.
AnnaBridge	172:65be27845400	1352	* @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge	172:65be27845400	1353	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1354	* @retval None
AnnaBridge	172:65be27845400	1355	*/
AnnaBridge	172:65be27845400	1356	__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1357	{
AnnaBridge	172:65be27845400	1358	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	172:65be27845400	1359	}
AnnaBridge	172:65be27845400	1360
AnnaBridge	172:65be27845400	1361	/**
AnnaBridge	172:65be27845400	1362	* @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1363	* @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge	172:65be27845400	1364	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1365	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1366	*/
AnnaBridge	172:65be27845400	1367	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1368	{
AnnaBridge	172:65be27845400	1369	return ((READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1370	}
AnnaBridge	172:65be27845400	1371
AnnaBridge	172:65be27845400	1372	/**
AnnaBridge	172:65be27845400	1373	* @brief Enable STOP detection interrupt.
AnnaBridge	172:65be27845400	1374	* @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge	172:65be27845400	1375	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1376	* @retval None
AnnaBridge	172:65be27845400	1377	*/
AnnaBridge	172:65be27845400	1378	__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1379	{
AnnaBridge	172:65be27845400	1380	SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	172:65be27845400	1381	}
AnnaBridge	172:65be27845400	1382
AnnaBridge	172:65be27845400	1383	/**
AnnaBridge	172:65be27845400	1384	* @brief Disable STOP detection interrupt.
AnnaBridge	172:65be27845400	1385	* @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge	172:65be27845400	1386	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1387	* @retval None
AnnaBridge	172:65be27845400	1388	*/
AnnaBridge	172:65be27845400	1389	__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1390	{
AnnaBridge	172:65be27845400	1391	CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	172:65be27845400	1392	}
AnnaBridge	172:65be27845400	1393
AnnaBridge	172:65be27845400	1394	/**
AnnaBridge	172:65be27845400	1395	* @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1396	* @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge	172:65be27845400	1397	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1398	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1399	*/
AnnaBridge	172:65be27845400	1400	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1401	{
AnnaBridge	172:65be27845400	1402	return ((READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1403	}
AnnaBridge	172:65be27845400	1404
AnnaBridge	172:65be27845400	1405	/**
AnnaBridge	172:65be27845400	1406	* @brief Enable Transfer Complete interrupt.
AnnaBridge	172:65be27845400	1407	* @note Any of these events will generate interrupt :
AnnaBridge	172:65be27845400	1408	* Transfer Complete (TC)
AnnaBridge	172:65be27845400	1409	* Transfer Complete Reload (TCR)
AnnaBridge	172:65be27845400	1410	* @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge	172:65be27845400	1411	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1412	* @retval None
AnnaBridge	172:65be27845400	1413	*/
AnnaBridge	172:65be27845400	1414	__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1415	{
AnnaBridge	172:65be27845400	1416	SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	172:65be27845400	1417	}
AnnaBridge	172:65be27845400	1418
AnnaBridge	172:65be27845400	1419	/**
AnnaBridge	172:65be27845400	1420	* @brief Disable Transfer Complete interrupt.
AnnaBridge	172:65be27845400	1421	* @note Any of these events will generate interrupt :
AnnaBridge	172:65be27845400	1422	* Transfer Complete (TC)
AnnaBridge	172:65be27845400	1423	* Transfer Complete Reload (TCR)
AnnaBridge	172:65be27845400	1424	* @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge	172:65be27845400	1425	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1426	* @retval None
AnnaBridge	172:65be27845400	1427	*/
AnnaBridge	172:65be27845400	1428	__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1429	{
AnnaBridge	172:65be27845400	1430	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	172:65be27845400	1431	}
AnnaBridge	172:65be27845400	1432
AnnaBridge	172:65be27845400	1433	/**
AnnaBridge	172:65be27845400	1434	* @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge	172:65be27845400	1435	* @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge	172:65be27845400	1436	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1437	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1438	*/
AnnaBridge	172:65be27845400	1439	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1440	{
AnnaBridge	172:65be27845400	1441	return ((READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1442	}
AnnaBridge	172:65be27845400	1443
AnnaBridge	172:65be27845400	1444	/**
AnnaBridge	172:65be27845400	1445	* @brief Enable Error interrupts.
AnnaBridge	172:65be27845400	1446	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1447	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1448	* @note Any of these errors will generate interrupt :
AnnaBridge	172:65be27845400	1449	* Arbitration Loss (ARLO)
AnnaBridge	172:65be27845400	1450	* Bus Error detection (BERR)
AnnaBridge	172:65be27845400	1451	* Overrun/Underrun (OVR)
AnnaBridge	172:65be27845400	1452	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	172:65be27845400	1453	* SMBus PEC error detection (PECERR)
AnnaBridge	172:65be27845400	1454	* SMBus Alert pin event detection (ALERT)
AnnaBridge	172:65be27845400	1455	* @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge	172:65be27845400	1456	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1457	* @retval None
AnnaBridge	172:65be27845400	1458	*/
AnnaBridge	172:65be27845400	1459	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1460	{
AnnaBridge	172:65be27845400	1461	SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	172:65be27845400	1462	}
AnnaBridge	172:65be27845400	1463
AnnaBridge	172:65be27845400	1464	/**
AnnaBridge	172:65be27845400	1465	* @brief Disable Error interrupts.
AnnaBridge	172:65be27845400	1466	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1467	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1468	* @note Any of these errors will generate interrupt :
AnnaBridge	172:65be27845400	1469	* Arbitration Loss (ARLO)
AnnaBridge	172:65be27845400	1470	* Bus Error detection (BERR)
AnnaBridge	172:65be27845400	1471	* Overrun/Underrun (OVR)
AnnaBridge	172:65be27845400	1472	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	172:65be27845400	1473	* SMBus PEC error detection (PECERR)
AnnaBridge	172:65be27845400	1474	* SMBus Alert pin event detection (ALERT)
AnnaBridge	172:65be27845400	1475	* @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge	172:65be27845400	1476	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1477	* @retval None
AnnaBridge	172:65be27845400	1478	*/
AnnaBridge	172:65be27845400	1479	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1480	{
AnnaBridge	172:65be27845400	1481	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	172:65be27845400	1482	}
AnnaBridge	172:65be27845400	1483
AnnaBridge	172:65be27845400	1484	/**
AnnaBridge	172:65be27845400	1485	* @brief Check if Error interrupts are enabled or disabled.
AnnaBridge	172:65be27845400	1486	* @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge	172:65be27845400	1487	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1488	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1489	*/
AnnaBridge	172:65be27845400	1490	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1491	{
AnnaBridge	172:65be27845400	1492	return ((READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1493	}
AnnaBridge	172:65be27845400	1494
AnnaBridge	172:65be27845400	1495	/**
AnnaBridge	172:65be27845400	1496	* @}
AnnaBridge	172:65be27845400	1497	*/
AnnaBridge	172:65be27845400	1498
AnnaBridge	172:65be27845400	1499	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge	172:65be27845400	1500	* @{
AnnaBridge	172:65be27845400	1501	*/
AnnaBridge	172:65be27845400	1502
AnnaBridge	172:65be27845400	1503	/**
AnnaBridge	172:65be27845400	1504	* @brief Indicate the status of Transmit data register empty flag.
AnnaBridge	172:65be27845400	1505	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	172:65be27845400	1506	* SET: When Transmit data register is empty.
AnnaBridge	172:65be27845400	1507	* @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge	172:65be27845400	1508	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1509	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1510	*/
AnnaBridge	172:65be27845400	1511	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1512	{
AnnaBridge	172:65be27845400	1513	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1514	}
AnnaBridge	172:65be27845400	1515
AnnaBridge	172:65be27845400	1516	/**
AnnaBridge	172:65be27845400	1517	* @brief Indicate the status of Transmit interrupt flag.
AnnaBridge	172:65be27845400	1518	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	172:65be27845400	1519	* SET: When Transmit data register is empty.
AnnaBridge	172:65be27845400	1520	* @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge	172:65be27845400	1521	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1522	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1523	*/
AnnaBridge	172:65be27845400	1524	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1525	{
AnnaBridge	172:65be27845400	1526	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1527	}
AnnaBridge	172:65be27845400	1528
AnnaBridge	172:65be27845400	1529	/**
AnnaBridge	172:65be27845400	1530	* @brief Indicate the status of Receive data register not empty flag.
AnnaBridge	172:65be27845400	1531	* @note RESET: When Receive data register is read.
AnnaBridge	172:65be27845400	1532	* SET: When the received data is copied in Receive data register.
AnnaBridge	172:65be27845400	1533	* @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge	172:65be27845400	1534	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1535	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1536	*/
AnnaBridge	172:65be27845400	1537	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1538	{
AnnaBridge	172:65be27845400	1539	return ((READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1540	}
AnnaBridge	172:65be27845400	1541
AnnaBridge	172:65be27845400	1542	/**
AnnaBridge	172:65be27845400	1543	* @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge	172:65be27845400	1544	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1545	* SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge	172:65be27845400	1546	* @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge	172:65be27845400	1547	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1548	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1549	*/
AnnaBridge	172:65be27845400	1550	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1551	{
AnnaBridge	172:65be27845400	1552	return ((READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1553	}
AnnaBridge	172:65be27845400	1554
AnnaBridge	172:65be27845400	1555	/**
AnnaBridge	172:65be27845400	1556	* @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge	172:65be27845400	1557	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1558	* SET: When a NACK is received after a byte transmission.
AnnaBridge	172:65be27845400	1559	* @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge	172:65be27845400	1560	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1561	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1562	*/
AnnaBridge	172:65be27845400	1563	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1564	{
AnnaBridge	172:65be27845400	1565	return ((READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1566	}
AnnaBridge	172:65be27845400	1567
AnnaBridge	172:65be27845400	1568	/**
AnnaBridge	172:65be27845400	1569	* @brief Indicate the status of Stop detection flag.
AnnaBridge	172:65be27845400	1570	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1571	* SET: When a Stop condition is detected.
AnnaBridge	172:65be27845400	1572	* @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge	172:65be27845400	1573	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1574	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1575	*/
AnnaBridge	172:65be27845400	1576	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1577	{
AnnaBridge	172:65be27845400	1578	return ((READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1579	}
AnnaBridge	172:65be27845400	1580
AnnaBridge	172:65be27845400	1581	/**
AnnaBridge	172:65be27845400	1582	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	172:65be27845400	1583	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1584	* SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge	172:65be27845400	1585	* @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge	172:65be27845400	1586	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1587	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1588	*/
AnnaBridge	172:65be27845400	1589	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1590	{
AnnaBridge	172:65be27845400	1591	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1592	}
AnnaBridge	172:65be27845400	1593
AnnaBridge	172:65be27845400	1594	/**
AnnaBridge	172:65be27845400	1595	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	172:65be27845400	1596	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1597	* SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge	172:65be27845400	1598	* @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge	172:65be27845400	1599	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1600	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1601	*/
AnnaBridge	172:65be27845400	1602	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1603	{
AnnaBridge	172:65be27845400	1604	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1605	}
AnnaBridge	172:65be27845400	1606
AnnaBridge	172:65be27845400	1607	/**
AnnaBridge	172:65be27845400	1608	* @brief Indicate the status of Bus error flag.
AnnaBridge	172:65be27845400	1609	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1610	* SET: When a misplaced Start or Stop condition is detected.
AnnaBridge	172:65be27845400	1611	* @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge	172:65be27845400	1612	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1613	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1614	*/
AnnaBridge	172:65be27845400	1615	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1616	{
AnnaBridge	172:65be27845400	1617	return ((READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1618	}
AnnaBridge	172:65be27845400	1619
AnnaBridge	172:65be27845400	1620	/**
AnnaBridge	172:65be27845400	1621	* @brief Indicate the status of Arbitration lost flag.
AnnaBridge	172:65be27845400	1622	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1623	* SET: When arbitration lost.
AnnaBridge	172:65be27845400	1624	* @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge	172:65be27845400	1625	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1626	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1627	*/
AnnaBridge	172:65be27845400	1628	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1629	{
AnnaBridge	172:65be27845400	1630	return ((READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1631	}
AnnaBridge	172:65be27845400	1632
AnnaBridge	172:65be27845400	1633	/**
AnnaBridge	172:65be27845400	1634	* @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge	172:65be27845400	1635	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1636	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge	172:65be27845400	1637	* @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge	172:65be27845400	1638	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1639	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1640	*/
AnnaBridge	172:65be27845400	1641	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1642	{
AnnaBridge	172:65be27845400	1643	return ((READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1644	}
AnnaBridge	172:65be27845400	1645
AnnaBridge	172:65be27845400	1646	/**
AnnaBridge	172:65be27845400	1647	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	172:65be27845400	1648	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1649	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1650	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1651	* SET: When the received PEC does not match with the PEC register content.
AnnaBridge	172:65be27845400	1652	* @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	172:65be27845400	1653	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1654	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1655	*/
AnnaBridge	172:65be27845400	1656	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1657	{
AnnaBridge	172:65be27845400	1658	return ((READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1659	}
AnnaBridge	172:65be27845400	1660
AnnaBridge	172:65be27845400	1661	/**
AnnaBridge	172:65be27845400	1662	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	172:65be27845400	1663	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1664	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1665	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1666	* SET: When a timeout or extended clock timeout occurs.
AnnaBridge	172:65be27845400	1667	* @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	172:65be27845400	1668	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1669	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1670	*/
AnnaBridge	172:65be27845400	1671	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1672	{
AnnaBridge	172:65be27845400	1673	return ((READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1674	}
AnnaBridge	172:65be27845400	1675
AnnaBridge	172:65be27845400	1676	/**
AnnaBridge	172:65be27845400	1677	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	172:65be27845400	1678	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1679	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1680	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1681	* SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge	172:65be27845400	1682	* a falling edge event occurs on SMBA pin.
AnnaBridge	172:65be27845400	1683	* @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	172:65be27845400	1684	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1685	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1686	*/
AnnaBridge	172:65be27845400	1687	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1688	{
AnnaBridge	172:65be27845400	1689	return ((READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1690	}
AnnaBridge	172:65be27845400	1691
AnnaBridge	172:65be27845400	1692	/**
AnnaBridge	172:65be27845400	1693	* @brief Indicate the status of Bus Busy flag.
AnnaBridge	172:65be27845400	1694	* @note RESET: Clear default value.
AnnaBridge	172:65be27845400	1695	* SET: When a Start condition is detected.
AnnaBridge	172:65be27845400	1696	* @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge	172:65be27845400	1697	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1698	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1699	*/
AnnaBridge	172:65be27845400	1700	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1701	{
AnnaBridge	172:65be27845400	1702	return ((READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1703	}
AnnaBridge	172:65be27845400	1704
AnnaBridge	172:65be27845400	1705	/**
AnnaBridge	172:65be27845400	1706	* @brief Clear Address Matched flag.
AnnaBridge	172:65be27845400	1707	* @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge	172:65be27845400	1708	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1709	* @retval None
AnnaBridge	172:65be27845400	1710	*/
AnnaBridge	172:65be27845400	1711	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1712	{
AnnaBridge	172:65be27845400	1713	SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge	172:65be27845400	1714	}
AnnaBridge	172:65be27845400	1715
AnnaBridge	172:65be27845400	1716	/**
AnnaBridge	172:65be27845400	1717	* @brief Clear Not Acknowledge flag.
AnnaBridge	172:65be27845400	1718	* @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge	172:65be27845400	1719	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1720	* @retval None
AnnaBridge	172:65be27845400	1721	*/
AnnaBridge	172:65be27845400	1722	__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1723	{
AnnaBridge	172:65be27845400	1724	SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge	172:65be27845400	1725	}
AnnaBridge	172:65be27845400	1726
AnnaBridge	172:65be27845400	1727	/**
AnnaBridge	172:65be27845400	1728	* @brief Clear Stop detection flag.
AnnaBridge	172:65be27845400	1729	* @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge	172:65be27845400	1730	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1731	* @retval None
AnnaBridge	172:65be27845400	1732	*/
AnnaBridge	172:65be27845400	1733	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1734	{
AnnaBridge	172:65be27845400	1735	SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge	172:65be27845400	1736	}
AnnaBridge	172:65be27845400	1737
AnnaBridge	172:65be27845400	1738	/**
AnnaBridge	172:65be27845400	1739	* @brief Clear Transmit data register empty flag (TXE).
AnnaBridge	172:65be27845400	1740	* @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge	172:65be27845400	1741	* @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge	172:65be27845400	1742	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1743	* @retval None
AnnaBridge	172:65be27845400	1744	*/
AnnaBridge	172:65be27845400	1745	__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1746	{
AnnaBridge	172:65be27845400	1747	WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge	172:65be27845400	1748	}
AnnaBridge	172:65be27845400	1749
AnnaBridge	172:65be27845400	1750	/**
AnnaBridge	172:65be27845400	1751	* @brief Clear Bus error flag.
AnnaBridge	172:65be27845400	1752	* @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge	172:65be27845400	1753	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1754	* @retval None
AnnaBridge	172:65be27845400	1755	*/
AnnaBridge	172:65be27845400	1756	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1757	{
AnnaBridge	172:65be27845400	1758	SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge	172:65be27845400	1759	}
AnnaBridge	172:65be27845400	1760
AnnaBridge	172:65be27845400	1761	/**
AnnaBridge	172:65be27845400	1762	* @brief Clear Arbitration lost flag.
AnnaBridge	172:65be27845400	1763	* @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge	172:65be27845400	1764	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1765	* @retval None
AnnaBridge	172:65be27845400	1766	*/
AnnaBridge	172:65be27845400	1767	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1768	{
AnnaBridge	172:65be27845400	1769	SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge	172:65be27845400	1770	}
AnnaBridge	172:65be27845400	1771
AnnaBridge	172:65be27845400	1772	/**
AnnaBridge	172:65be27845400	1773	* @brief Clear Overrun/Underrun flag.
AnnaBridge	172:65be27845400	1774	* @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge	172:65be27845400	1775	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1776	* @retval None
AnnaBridge	172:65be27845400	1777	*/
AnnaBridge	172:65be27845400	1778	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1779	{
AnnaBridge	172:65be27845400	1780	SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge	172:65be27845400	1781	}
AnnaBridge	172:65be27845400	1782
AnnaBridge	172:65be27845400	1783	/**
AnnaBridge	172:65be27845400	1784	* @brief Clear SMBus PEC error flag.
AnnaBridge	172:65be27845400	1785	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1786	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1787	* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge	172:65be27845400	1788	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1789	* @retval None
AnnaBridge	172:65be27845400	1790	*/
AnnaBridge	172:65be27845400	1791	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1792	{
AnnaBridge	172:65be27845400	1793	SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge	172:65be27845400	1794	}
AnnaBridge	172:65be27845400	1795
AnnaBridge	172:65be27845400	1796	/**
AnnaBridge	172:65be27845400	1797	* @brief Clear SMBus Timeout detection flag.
AnnaBridge	172:65be27845400	1798	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1799	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1800	* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge	172:65be27845400	1801	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1802	* @retval None
AnnaBridge	172:65be27845400	1803	*/
AnnaBridge	172:65be27845400	1804	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1805	{
AnnaBridge	172:65be27845400	1806	SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge	172:65be27845400	1807	}
AnnaBridge	172:65be27845400	1808
AnnaBridge	172:65be27845400	1809	/**
AnnaBridge	172:65be27845400	1810	* @brief Clear SMBus Alert flag.
AnnaBridge	172:65be27845400	1811	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	1812	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	1813	* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge	172:65be27845400	1814	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1815	* @retval None
AnnaBridge	172:65be27845400	1816	*/
AnnaBridge	172:65be27845400	1817	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1818	{
AnnaBridge	172:65be27845400	1819	SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge	172:65be27845400	1820	}
AnnaBridge	172:65be27845400	1821
AnnaBridge	172:65be27845400	1822	/**
AnnaBridge	172:65be27845400	1823	* @}
AnnaBridge	172:65be27845400	1824	*/
AnnaBridge	172:65be27845400	1825
AnnaBridge	172:65be27845400	1826	/** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge	172:65be27845400	1827	* @{
AnnaBridge	172:65be27845400	1828	*/
AnnaBridge	172:65be27845400	1829
AnnaBridge	172:65be27845400	1830	/**
AnnaBridge	172:65be27845400	1831	* @brief Enable automatic STOP condition generation (master mode).
AnnaBridge	172:65be27845400	1832	* @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge	172:65be27845400	1833	* This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge	172:65be27845400	1834	* @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge	172:65be27845400	1835	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1836	* @retval None
AnnaBridge	172:65be27845400	1837	*/
AnnaBridge	172:65be27845400	1838	__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1839	{
AnnaBridge	172:65be27845400	1840	SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	172:65be27845400	1841	}
AnnaBridge	172:65be27845400	1842
AnnaBridge	172:65be27845400	1843	/**
AnnaBridge	172:65be27845400	1844	* @brief Disable automatic STOP condition generation (master mode).
AnnaBridge	172:65be27845400	1845	* @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge	172:65be27845400	1846	* @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge	172:65be27845400	1847	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1848	* @retval None
AnnaBridge	172:65be27845400	1849	*/
AnnaBridge	172:65be27845400	1850	__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1851	{
AnnaBridge	172:65be27845400	1852	CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	172:65be27845400	1853	}
AnnaBridge	172:65be27845400	1854
AnnaBridge	172:65be27845400	1855	/**
AnnaBridge	172:65be27845400	1856	* @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge	172:65be27845400	1857	* @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge	172:65be27845400	1858	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1859	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1860	*/
AnnaBridge	172:65be27845400	1861	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1862	{
AnnaBridge	172:65be27845400	1863	return ((READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1864	}
AnnaBridge	172:65be27845400	1865
AnnaBridge	172:65be27845400	1866	/**
AnnaBridge	172:65be27845400	1867	* @brief Enable reload mode (master mode).
AnnaBridge	172:65be27845400	1868	* @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge	172:65be27845400	1869	* @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge	172:65be27845400	1870	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1871	* @retval None
AnnaBridge	172:65be27845400	1872	*/
AnnaBridge	172:65be27845400	1873	__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1874	{
AnnaBridge	172:65be27845400	1875	SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	172:65be27845400	1876	}
AnnaBridge	172:65be27845400	1877
AnnaBridge	172:65be27845400	1878	/**
AnnaBridge	172:65be27845400	1879	* @brief Disable reload mode (master mode).
AnnaBridge	172:65be27845400	1880	* @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge	172:65be27845400	1881	* @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge	172:65be27845400	1882	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1883	* @retval None
AnnaBridge	172:65be27845400	1884	*/
AnnaBridge	172:65be27845400	1885	__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1886	{
AnnaBridge	172:65be27845400	1887	CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	172:65be27845400	1888	}
AnnaBridge	172:65be27845400	1889
AnnaBridge	172:65be27845400	1890	/**
AnnaBridge	172:65be27845400	1891	* @brief Check if reload mode is enabled or disabled.
AnnaBridge	172:65be27845400	1892	* @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge	172:65be27845400	1893	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1894	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1895	*/
AnnaBridge	172:65be27845400	1896	__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1897	{
AnnaBridge	172:65be27845400	1898	return ((READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1899	}
AnnaBridge	172:65be27845400	1900
AnnaBridge	172:65be27845400	1901	/**
AnnaBridge	172:65be27845400	1902	* @brief Configure the number of bytes for transfer.
AnnaBridge	172:65be27845400	1903	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	172:65be27845400	1904	* @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge	172:65be27845400	1905	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1906	* @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge	172:65be27845400	1907	* @retval None
AnnaBridge	172:65be27845400	1908	*/
AnnaBridge	172:65be27845400	1909	__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge	172:65be27845400	1910	{
AnnaBridge	172:65be27845400	1911	MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge	172:65be27845400	1912	}
AnnaBridge	172:65be27845400	1913
AnnaBridge	172:65be27845400	1914	/**
AnnaBridge	172:65be27845400	1915	* @brief Get the number of bytes configured for transfer.
AnnaBridge	172:65be27845400	1916	* @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge	172:65be27845400	1917	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1918	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1919	*/
AnnaBridge	172:65be27845400	1920	__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1921	{
AnnaBridge	172:65be27845400	1922	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge	172:65be27845400	1923	}
AnnaBridge	172:65be27845400	1924
AnnaBridge	172:65be27845400	1925	/**
AnnaBridge	172:65be27845400	1926	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	172:65be27845400	1927	* @note Usage in Slave mode only.
AnnaBridge	172:65be27845400	1928	* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge	172:65be27845400	1929	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1930	* @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1931	* @arg @ref LL_I2C_ACK
AnnaBridge	172:65be27845400	1932	* @arg @ref LL_I2C_NACK
AnnaBridge	172:65be27845400	1933	* @retval None
AnnaBridge	172:65be27845400	1934	*/
AnnaBridge	172:65be27845400	1935	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge	172:65be27845400	1936	{
AnnaBridge	172:65be27845400	1937	MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge	172:65be27845400	1938	}
AnnaBridge	172:65be27845400	1939
AnnaBridge	172:65be27845400	1940	/**
AnnaBridge	172:65be27845400	1941	* @brief Generate a START or RESTART condition
AnnaBridge	172:65be27845400	1942	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge	172:65be27845400	1943	* This action has no effect when RELOAD is set.
AnnaBridge	172:65be27845400	1944	* @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge	172:65be27845400	1945	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1946	* @retval None
AnnaBridge	172:65be27845400	1947	*/
AnnaBridge	172:65be27845400	1948	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1949	{
AnnaBridge	172:65be27845400	1950	SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge	172:65be27845400	1951	}
AnnaBridge	172:65be27845400	1952
AnnaBridge	172:65be27845400	1953	/**
AnnaBridge	172:65be27845400	1954	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	172:65be27845400	1955	* @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge	172:65be27845400	1956	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1957	* @retval None
AnnaBridge	172:65be27845400	1958	*/
AnnaBridge	172:65be27845400	1959	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1960	{
AnnaBridge	172:65be27845400	1961	SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge	172:65be27845400	1962	}
AnnaBridge	172:65be27845400	1963
AnnaBridge	172:65be27845400	1964	/**
AnnaBridge	172:65be27845400	1965	* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	172:65be27845400	1966	* @note The master sends the complete 10bit slave address read sequence :
AnnaBridge	172:65be27845400	1967	* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge	172:65be27845400	1968	* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge	172:65be27845400	1969	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1970	* @retval None
AnnaBridge	172:65be27845400	1971	*/
AnnaBridge	172:65be27845400	1972	__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1973	{
AnnaBridge	172:65be27845400	1974	CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	172:65be27845400	1975	}
AnnaBridge	172:65be27845400	1976
AnnaBridge	172:65be27845400	1977	/**
AnnaBridge	172:65be27845400	1978	* @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	172:65be27845400	1979	* @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge	172:65be27845400	1980	* @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge	172:65be27845400	1981	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1982	* @retval None
AnnaBridge	172:65be27845400	1983	*/
AnnaBridge	172:65be27845400	1984	__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1985	{
AnnaBridge	172:65be27845400	1986	SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	172:65be27845400	1987	}
AnnaBridge	172:65be27845400	1988
AnnaBridge	172:65be27845400	1989	/**
AnnaBridge	172:65be27845400	1990	* @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge	172:65be27845400	1991	* @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge	172:65be27845400	1992	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	1993	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1994	*/
AnnaBridge	172:65be27845400	1995	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	1996	{
AnnaBridge	172:65be27845400	1997	return ((READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1998	}
AnnaBridge	172:65be27845400	1999
AnnaBridge	172:65be27845400	2000	/**
AnnaBridge	172:65be27845400	2001	* @brief Configure the transfer direction (master mode).
AnnaBridge	172:65be27845400	2002	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	172:65be27845400	2003	* @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge	172:65be27845400	2004	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2005	* @param TransferRequest This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2006	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	172:65be27845400	2007	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	172:65be27845400	2008	* @retval None
AnnaBridge	172:65be27845400	2009	*/
AnnaBridge	172:65be27845400	2010	__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge	172:65be27845400	2011	{
AnnaBridge	172:65be27845400	2012	MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge	172:65be27845400	2013	}
AnnaBridge	172:65be27845400	2014
AnnaBridge	172:65be27845400	2015	/**
AnnaBridge	172:65be27845400	2016	* @brief Get the transfer direction requested (master mode).
AnnaBridge	172:65be27845400	2017	* @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge	172:65be27845400	2018	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2019	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	2020	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	172:65be27845400	2021	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	172:65be27845400	2022	*/
AnnaBridge	172:65be27845400	2023	__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2024	{
AnnaBridge	172:65be27845400	2025	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge	172:65be27845400	2026	}
AnnaBridge	172:65be27845400	2027
AnnaBridge	172:65be27845400	2028	/**
AnnaBridge	172:65be27845400	2029	* @brief Configure the slave address for transfer (master mode).
AnnaBridge	172:65be27845400	2030	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	172:65be27845400	2031	* @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge	172:65be27845400	2032	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2033	* @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge	172:65be27845400	2034	* @retval None
AnnaBridge	172:65be27845400	2035	*/
AnnaBridge	172:65be27845400	2036	__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge	172:65be27845400	2037	{
AnnaBridge	172:65be27845400	2038	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge	172:65be27845400	2039	}
AnnaBridge	172:65be27845400	2040
AnnaBridge	172:65be27845400	2041	/**
AnnaBridge	172:65be27845400	2042	* @brief Get the slave address programmed for transfer.
AnnaBridge	172:65be27845400	2043	* @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge	172:65be27845400	2044	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2045	* @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge	172:65be27845400	2046	*/
AnnaBridge	172:65be27845400	2047	__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2048	{
AnnaBridge	172:65be27845400	2049	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge	172:65be27845400	2050	}
AnnaBridge	172:65be27845400	2051
AnnaBridge	172:65be27845400	2052	/**
AnnaBridge	172:65be27845400	2053	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge	172:65be27845400	2054	* @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2055	* CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2056	* CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2057	* CR2 START LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2058	* CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2059	* CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2060	* CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2061	* CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge	172:65be27845400	2062	* CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge	172:65be27845400	2063	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2064	* @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge	172:65be27845400	2065	* @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2066	* @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge	172:65be27845400	2067	* @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge	172:65be27845400	2068	* @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge	172:65be27845400	2069	* This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge	172:65be27845400	2070	* @param EndMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2071	* @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge	172:65be27845400	2072	* @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge	172:65be27845400	2073	* @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge	172:65be27845400	2074	* @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge	172:65be27845400	2075	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge	172:65be27845400	2076	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge	172:65be27845400	2077	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge	172:65be27845400	2078	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge	172:65be27845400	2079	* @param Request This parameter can be one of the following values:
AnnaBridge	172:65be27845400	2080	* @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge	172:65be27845400	2081	* @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge	172:65be27845400	2082	* @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge	172:65be27845400	2083	* @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge	172:65be27845400	2084	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge	172:65be27845400	2085	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge	172:65be27845400	2086	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge	172:65be27845400	2087	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge	172:65be27845400	2088	* @retval None
AnnaBridge	172:65be27845400	2089	*/
AnnaBridge	172:65be27845400	2090	__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge	172:65be27845400	2091	uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge	172:65be27845400	2092	{
AnnaBridge	172:65be27845400	2093	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD \| I2C_CR2_ADD10 \| (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) \| I2C_CR2_START \| I2C_CR2_STOP \| I2C_CR2_RELOAD \|
AnnaBridge	172:65be27845400	2094	I2C_CR2_NBYTES \| I2C_CR2_AUTOEND \| I2C_CR2_HEAD10R,
AnnaBridge	172:65be27845400	2095	SlaveAddr \| SlaveAddrSize \| (TransferSize << I2C_CR2_NBYTES_Pos) \| EndMode \| Request);
AnnaBridge	172:65be27845400	2096	}
AnnaBridge	172:65be27845400	2097
AnnaBridge	172:65be27845400	2098	/**
AnnaBridge	172:65be27845400	2099	* @brief Indicate the value of transfer direction (slave mode).
AnnaBridge	172:65be27845400	2100	* @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge	172:65be27845400	2101	* SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge	172:65be27845400	2102	* @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge	172:65be27845400	2103	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2104	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	2105	* @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge	172:65be27845400	2106	* @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge	172:65be27845400	2107	*/
AnnaBridge	172:65be27845400	2108	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2109	{
AnnaBridge	172:65be27845400	2110	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge	172:65be27845400	2111	}
AnnaBridge	172:65be27845400	2112
AnnaBridge	172:65be27845400	2113	/**
AnnaBridge	172:65be27845400	2114	* @brief Return the slave matched address.
AnnaBridge	172:65be27845400	2115	* @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge	172:65be27845400	2116	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2117	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	172:65be27845400	2118	*/
AnnaBridge	172:65be27845400	2119	__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2120	{
AnnaBridge	172:65be27845400	2121	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge	172:65be27845400	2122	}
AnnaBridge	172:65be27845400	2123
AnnaBridge	172:65be27845400	2124	/**
AnnaBridge	172:65be27845400	2125	* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	172:65be27845400	2126	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	2127	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	2128	* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge	172:65be27845400	2129	* This bit has no effect when RELOAD bit is set.
AnnaBridge	172:65be27845400	2130	* This bit has no effect in device mode when SBC bit is not set.
AnnaBridge	172:65be27845400	2131	* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge	172:65be27845400	2132	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2133	* @retval None
AnnaBridge	172:65be27845400	2134	*/
AnnaBridge	172:65be27845400	2135	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2136	{
AnnaBridge	172:65be27845400	2137	SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge	172:65be27845400	2138	}
AnnaBridge	172:65be27845400	2139
AnnaBridge	172:65be27845400	2140	/**
AnnaBridge	172:65be27845400	2141	* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge	172:65be27845400	2142	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	2143	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	2144	* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge	172:65be27845400	2145	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2146	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2147	*/
AnnaBridge	172:65be27845400	2148	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2149	{
AnnaBridge	172:65be27845400	2150	return ((READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2151	}
AnnaBridge	172:65be27845400	2152
AnnaBridge	172:65be27845400	2153	/**
AnnaBridge	172:65be27845400	2154	* @brief Get the SMBus Packet Error byte calculated.
AnnaBridge	172:65be27845400	2155	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	172:65be27845400	2156	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	172:65be27845400	2157	* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge	172:65be27845400	2158	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2159	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2160	*/
AnnaBridge	172:65be27845400	2161	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2162	{
AnnaBridge	172:65be27845400	2163	return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge	172:65be27845400	2164	}
AnnaBridge	172:65be27845400	2165
AnnaBridge	172:65be27845400	2166	/**
AnnaBridge	172:65be27845400	2167	* @brief Read Receive Data register.
AnnaBridge	172:65be27845400	2168	* @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge	172:65be27845400	2169	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2170	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2171	*/
AnnaBridge	172:65be27845400	2172	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge	172:65be27845400	2173	{
AnnaBridge	172:65be27845400	2174	return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge	172:65be27845400	2175	}
AnnaBridge	172:65be27845400	2176
AnnaBridge	172:65be27845400	2177	/**
AnnaBridge	172:65be27845400	2178	* @brief Write in Transmit Data Register .
AnnaBridge	172:65be27845400	2179	* @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge	172:65be27845400	2180	* @param I2Cx I2C Instance.
AnnaBridge	172:65be27845400	2181	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	172:65be27845400	2182	* @retval None
AnnaBridge	172:65be27845400	2183	*/
AnnaBridge	172:65be27845400	2184	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge	172:65be27845400	2185	{
AnnaBridge	172:65be27845400	2186	WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge	172:65be27845400	2187	}
AnnaBridge	172:65be27845400	2188
AnnaBridge	172:65be27845400	2189	/**
AnnaBridge	172:65be27845400	2190	* @}
AnnaBridge	172:65be27845400	2191	*/
AnnaBridge	172:65be27845400	2192
AnnaBridge	172:65be27845400	2193	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	2194	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	172:65be27845400	2195	* @{
AnnaBridge	172:65be27845400	2196	*/
AnnaBridge	172:65be27845400	2197
AnnaBridge	172:65be27845400	2198	ErrorStatus LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
AnnaBridge	172:65be27845400	2199	ErrorStatus LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge	172:65be27845400	2200	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge	172:65be27845400	2201
AnnaBridge	172:65be27845400	2202
AnnaBridge	172:65be27845400	2203	/**
AnnaBridge	172:65be27845400	2204	* @}
AnnaBridge	172:65be27845400	2205	*/
AnnaBridge	172:65be27845400	2206	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	2207
AnnaBridge	172:65be27845400	2208	/**
AnnaBridge	172:65be27845400	2209	* @}
AnnaBridge	172:65be27845400	2210	*/
AnnaBridge	172:65be27845400	2211
AnnaBridge	172:65be27845400	2212	/**
AnnaBridge	172:65be27845400	2213	* @}
AnnaBridge	172:65be27845400	2214	*/
AnnaBridge	172:65be27845400	2215
AnnaBridge	172:65be27845400	2216	#endif /* I2C1 \|\| I2C2 \|\| I2C3 \|\| I2C4 */
AnnaBridge	172:65be27845400	2217
AnnaBridge	172:65be27845400	2218	/**
AnnaBridge	172:65be27845400	2219	* @}
AnnaBridge	172:65be27845400	2220	*/
AnnaBridge	172:65be27845400	2221
AnnaBridge	172:65be27845400	2222	#ifdef __cplusplus
AnnaBridge	172:65be27845400	2223	}
AnnaBridge	172:65be27845400	2224	#endif
AnnaBridge	172:65be27845400	2225
AnnaBridge	172:65be27845400	2226	#endif /* STM32H7xx_LL_I2C_H */
AnnaBridge	172:65be27845400	2227
AnnaBridge	172:65be27845400	2228	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/