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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_sdram.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_sdram.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of SDRAM HAL module. |
AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 7 | * @attention |
AnnaBridge | 172:65be27845400 | 8 | * |
AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 172:65be27845400 | 10 | * |
AnnaBridge | 172:65be27845400 | 11 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 12 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 13 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 14 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 15 | * |
AnnaBridge | 172:65be27845400 | 16 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 17 | */ |
AnnaBridge | 172:65be27845400 | 18 | |
AnnaBridge | 172:65be27845400 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 20 | #ifndef STM32H7xx_HAL_SDRAM_H |
AnnaBridge | 172:65be27845400 | 21 | #define STM32H7xx_HAL_SDRAM_H |
AnnaBridge | 172:65be27845400 | 22 | |
AnnaBridge | 172:65be27845400 | 23 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 24 | extern "C" { |
AnnaBridge | 172:65be27845400 | 25 | #endif |
AnnaBridge | 172:65be27845400 | 26 | |
AnnaBridge | 172:65be27845400 | 27 | |
AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_ll_fmc.h" |
AnnaBridge | 172:65be27845400 | 30 | |
AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
AnnaBridge | 172:65be27845400 | 32 | * @{ |
AnnaBridge | 172:65be27845400 | 33 | */ |
AnnaBridge | 172:65be27845400 | 34 | |
AnnaBridge | 172:65be27845400 | 35 | /** @addtogroup SDRAM |
AnnaBridge | 172:65be27845400 | 36 | * @{ |
AnnaBridge | 172:65be27845400 | 37 | */ |
AnnaBridge | 172:65be27845400 | 38 | |
AnnaBridge | 172:65be27845400 | 39 | /* Exported typedef ----------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 40 | |
AnnaBridge | 172:65be27845400 | 41 | /** @defgroup SDRAM_Exported_Types SDRAM Exported Types |
AnnaBridge | 172:65be27845400 | 42 | * @{ |
AnnaBridge | 172:65be27845400 | 43 | */ |
AnnaBridge | 172:65be27845400 | 44 | |
AnnaBridge | 172:65be27845400 | 45 | /** |
AnnaBridge | 172:65be27845400 | 46 | * @brief HAL SDRAM State structure definition |
AnnaBridge | 172:65be27845400 | 47 | */ |
AnnaBridge | 172:65be27845400 | 48 | typedef enum |
AnnaBridge | 172:65be27845400 | 49 | { |
AnnaBridge | 172:65be27845400 | 50 | HAL_SDRAM_STATE_RESET = 0x00U, /*!< SDRAM not yet initialized or disabled */ |
AnnaBridge | 172:65be27845400 | 51 | HAL_SDRAM_STATE_READY = 0x01U, /*!< SDRAM initialized and ready for use */ |
AnnaBridge | 172:65be27845400 | 52 | HAL_SDRAM_STATE_BUSY = 0x02U, /*!< SDRAM internal process is ongoing */ |
AnnaBridge | 172:65be27845400 | 53 | HAL_SDRAM_STATE_ERROR = 0x03U, /*!< SDRAM error state */ |
AnnaBridge | 172:65be27845400 | 54 | HAL_SDRAM_STATE_WRITE_PROTECTED = 0x04U, /*!< SDRAM device write protected */ |
AnnaBridge | 172:65be27845400 | 55 | HAL_SDRAM_STATE_PRECHARGED = 0x05U /*!< SDRAM device precharged */ |
AnnaBridge | 172:65be27845400 | 56 | |
AnnaBridge | 172:65be27845400 | 57 | } HAL_SDRAM_StateTypeDef; |
AnnaBridge | 172:65be27845400 | 58 | |
AnnaBridge | 172:65be27845400 | 59 | /** |
AnnaBridge | 172:65be27845400 | 60 | * @brief SDRAM handle Structure definition |
AnnaBridge | 172:65be27845400 | 61 | */ |
AnnaBridge | 172:65be27845400 | 62 | #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) |
AnnaBridge | 172:65be27845400 | 63 | typedef struct __SDRAM_HandleTypeDef |
AnnaBridge | 172:65be27845400 | 64 | #else |
AnnaBridge | 172:65be27845400 | 65 | typedef struct |
AnnaBridge | 172:65be27845400 | 66 | #endif /* USE_HAL_SDRAM_REGISTER_CALLBACKS */ |
AnnaBridge | 172:65be27845400 | 67 | { |
AnnaBridge | 172:65be27845400 | 68 | FMC_SDRAM_TypeDef *Instance; /*!< Register base address */ |
AnnaBridge | 172:65be27845400 | 69 | |
AnnaBridge | 172:65be27845400 | 70 | FMC_SDRAM_InitTypeDef Init; /*!< SDRAM device configuration parameters */ |
AnnaBridge | 172:65be27845400 | 71 | |
AnnaBridge | 172:65be27845400 | 72 | __IO HAL_SDRAM_StateTypeDef State; /*!< SDRAM access state */ |
AnnaBridge | 172:65be27845400 | 73 | |
AnnaBridge | 172:65be27845400 | 74 | HAL_LockTypeDef Lock; /*!< SDRAM locking object */ |
AnnaBridge | 172:65be27845400 | 75 | |
AnnaBridge | 172:65be27845400 | 76 | MDMA_HandleTypeDef *hmdma; /*!< Pointer DMA handler */ |
AnnaBridge | 172:65be27845400 | 77 | |
AnnaBridge | 172:65be27845400 | 78 | #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) |
AnnaBridge | 172:65be27845400 | 79 | void (* MspInitCallback) ( struct __SDRAM_HandleTypeDef * hsdram); /*!< SDRAM Msp Init callback */ |
AnnaBridge | 172:65be27845400 | 80 | void (* MspDeInitCallback) ( struct __SDRAM_HandleTypeDef * hsdram); /*!< SDRAM Msp DeInit callback */ |
AnnaBridge | 172:65be27845400 | 81 | void (* RefreshErrorCallback) ( struct __SDRAM_HandleTypeDef * hsdram); /*!< SDRAM Refresh Error callback */ |
AnnaBridge | 172:65be27845400 | 82 | void (* DmaXferCpltCallback) ( MDMA_HandleTypeDef * hmdma); /*!< SDRAM DMA Xfer Complete callback */ |
AnnaBridge | 172:65be27845400 | 83 | void (* DmaXferErrorCallback) ( MDMA_HandleTypeDef * hmdma); /*!< SDRAM DMA Xfer Error callback */ |
AnnaBridge | 172:65be27845400 | 84 | #endif |
AnnaBridge | 172:65be27845400 | 85 | } SDRAM_HandleTypeDef; |
AnnaBridge | 172:65be27845400 | 86 | |
AnnaBridge | 172:65be27845400 | 87 | #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) |
AnnaBridge | 172:65be27845400 | 88 | /** |
AnnaBridge | 172:65be27845400 | 89 | * @brief HAL SDRAM Callback ID enumeration definition |
AnnaBridge | 172:65be27845400 | 90 | */ |
AnnaBridge | 172:65be27845400 | 91 | typedef enum |
AnnaBridge | 172:65be27845400 | 92 | { |
AnnaBridge | 172:65be27845400 | 93 | HAL_SDRAM_MSP_INIT_CB_ID = 0x00U, /*!< SDRAM MspInit Callback ID */ |
AnnaBridge | 172:65be27845400 | 94 | HAL_SDRAM_MSP_DEINIT_CB_ID = 0x01U, /*!< SDRAM MspDeInit Callback ID */ |
AnnaBridge | 172:65be27845400 | 95 | HAL_SDRAM_REFRESH_ERR_CB_ID = 0x02U, /*!< SDRAM Refresh Error Callback ID */ |
AnnaBridge | 172:65be27845400 | 96 | HAL_SDRAM_DMA_XFER_CPLT_CB_ID = 0x03U, /*!< SDRAM DMA Xfer Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 97 | HAL_SDRAM_DMA_XFER_ERR_CB_ID = 0x04U /*!< SDRAM DMA Xfer Error Callback ID */ |
AnnaBridge | 172:65be27845400 | 98 | }HAL_SDRAM_CallbackIDTypeDef; |
AnnaBridge | 172:65be27845400 | 99 | |
AnnaBridge | 172:65be27845400 | 100 | /** |
AnnaBridge | 172:65be27845400 | 101 | * @brief HAL SDRAM Callback pointer definition |
AnnaBridge | 172:65be27845400 | 102 | */ |
AnnaBridge | 172:65be27845400 | 103 | typedef void (*pSDRAM_CallbackTypeDef)(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 104 | typedef void (*pSDRAM_DmaCallbackTypeDef)(MDMA_HandleTypeDef *hmdma); |
AnnaBridge | 172:65be27845400 | 105 | #endif |
AnnaBridge | 172:65be27845400 | 106 | /** |
AnnaBridge | 172:65be27845400 | 107 | * @} |
AnnaBridge | 172:65be27845400 | 108 | */ |
AnnaBridge | 172:65be27845400 | 109 | |
AnnaBridge | 172:65be27845400 | 110 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 111 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 112 | |
AnnaBridge | 172:65be27845400 | 113 | /** @defgroup SDRAM_Exported_Macros SDRAM Exported Macros |
AnnaBridge | 172:65be27845400 | 114 | * @{ |
AnnaBridge | 172:65be27845400 | 115 | */ |
AnnaBridge | 172:65be27845400 | 116 | |
AnnaBridge | 172:65be27845400 | 117 | /** @brief Reset SDRAM handle state |
AnnaBridge | 172:65be27845400 | 118 | * @param __HANDLE__ specifies the SDRAM handle. |
AnnaBridge | 172:65be27845400 | 119 | * @retval None |
AnnaBridge | 172:65be27845400 | 120 | */ |
AnnaBridge | 172:65be27845400 | 121 | #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) |
AnnaBridge | 172:65be27845400 | 122 | #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) do { \ |
AnnaBridge | 172:65be27845400 | 123 | (__HANDLE__)->State = HAL_SDRAM_STATE_RESET; \ |
AnnaBridge | 172:65be27845400 | 124 | (__HANDLE__)->MspInitCallback = NULL; \ |
AnnaBridge | 172:65be27845400 | 125 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
AnnaBridge | 172:65be27845400 | 126 | } while(0) |
AnnaBridge | 172:65be27845400 | 127 | #else |
AnnaBridge | 172:65be27845400 | 128 | #define __HAL_SDRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SDRAM_STATE_RESET) |
AnnaBridge | 172:65be27845400 | 129 | #endif |
AnnaBridge | 172:65be27845400 | 130 | /** |
AnnaBridge | 172:65be27845400 | 131 | * @} |
AnnaBridge | 172:65be27845400 | 132 | */ |
AnnaBridge | 172:65be27845400 | 133 | |
AnnaBridge | 172:65be27845400 | 134 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 135 | |
AnnaBridge | 172:65be27845400 | 136 | /** @addtogroup SDRAM_Exported_Functions SDRAM Exported Functions |
AnnaBridge | 172:65be27845400 | 137 | * @{ |
AnnaBridge | 172:65be27845400 | 138 | */ |
AnnaBridge | 172:65be27845400 | 139 | |
AnnaBridge | 172:65be27845400 | 140 | /** @addtogroup SDRAM_Exported_Functions_Group1 |
AnnaBridge | 172:65be27845400 | 141 | * @{ |
AnnaBridge | 172:65be27845400 | 142 | */ |
AnnaBridge | 172:65be27845400 | 143 | |
AnnaBridge | 172:65be27845400 | 144 | /* Initialization/de-initialization functions *********************************/ |
AnnaBridge | 172:65be27845400 | 145 | HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing); |
AnnaBridge | 172:65be27845400 | 146 | HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 147 | void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 148 | void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 149 | |
AnnaBridge | 172:65be27845400 | 150 | void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 151 | void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 152 | void HAL_SDRAM_DMA_XferCpltCallback(MDMA_HandleTypeDef *hmdma); |
AnnaBridge | 172:65be27845400 | 153 | void HAL_SDRAM_DMA_XferErrorCallback(MDMA_HandleTypeDef *hmdma); |
AnnaBridge | 172:65be27845400 | 154 | |
AnnaBridge | 172:65be27845400 | 155 | /** |
AnnaBridge | 172:65be27845400 | 156 | * @} |
AnnaBridge | 172:65be27845400 | 157 | */ |
AnnaBridge | 172:65be27845400 | 158 | |
AnnaBridge | 172:65be27845400 | 159 | /** @addtogroup SDRAM_Exported_Functions_Group2 |
AnnaBridge | 172:65be27845400 | 160 | * @{ |
AnnaBridge | 172:65be27845400 | 161 | */ |
AnnaBridge | 172:65be27845400 | 162 | /* I/O operation functions ****************************************************/ |
AnnaBridge | 172:65be27845400 | 163 | HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 164 | HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 165 | HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 166 | HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 167 | HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 168 | HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 169 | |
AnnaBridge | 172:65be27845400 | 170 | HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 171 | HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); |
AnnaBridge | 172:65be27845400 | 172 | |
AnnaBridge | 172:65be27845400 | 173 | #if (USE_HAL_SDRAM_REGISTER_CALLBACKS == 1) |
AnnaBridge | 172:65be27845400 | 174 | /* SDRAM callback registering/unregistering */ |
AnnaBridge | 172:65be27845400 | 175 | HAL_StatusTypeDef HAL_SDRAM_RegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_CallbackTypeDef pCallback); |
AnnaBridge | 172:65be27845400 | 176 | HAL_StatusTypeDef HAL_SDRAM_UnRegisterCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId); |
AnnaBridge | 172:65be27845400 | 177 | HAL_StatusTypeDef HAL_SDRAM_RegisterDmaCallback(SDRAM_HandleTypeDef *hsdram, HAL_SDRAM_CallbackIDTypeDef CallbackId, pSDRAM_DmaCallbackTypeDef pCallback); |
AnnaBridge | 172:65be27845400 | 178 | #endif |
AnnaBridge | 172:65be27845400 | 179 | |
AnnaBridge | 172:65be27845400 | 180 | /** |
AnnaBridge | 172:65be27845400 | 181 | * @} |
AnnaBridge | 172:65be27845400 | 182 | */ |
AnnaBridge | 172:65be27845400 | 183 | |
AnnaBridge | 172:65be27845400 | 184 | /** @addtogroup SDRAM_Exported_Functions_Group3 |
AnnaBridge | 172:65be27845400 | 185 | * @{ |
AnnaBridge | 172:65be27845400 | 186 | */ |
AnnaBridge | 172:65be27845400 | 187 | /* SDRAM Control functions *****************************************************/ |
AnnaBridge | 172:65be27845400 | 188 | HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 189 | HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 190 | HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout); |
AnnaBridge | 172:65be27845400 | 191 | HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate); |
AnnaBridge | 172:65be27845400 | 192 | HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber); |
AnnaBridge | 172:65be27845400 | 193 | uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 194 | |
AnnaBridge | 172:65be27845400 | 195 | /** |
AnnaBridge | 172:65be27845400 | 196 | * @} |
AnnaBridge | 172:65be27845400 | 197 | */ |
AnnaBridge | 172:65be27845400 | 198 | |
AnnaBridge | 172:65be27845400 | 199 | /** @addtogroup SDRAM_Exported_Functions_Group4 |
AnnaBridge | 172:65be27845400 | 200 | * @{ |
AnnaBridge | 172:65be27845400 | 201 | */ |
AnnaBridge | 172:65be27845400 | 202 | /* SDRAM State functions ********************************************************/ |
AnnaBridge | 172:65be27845400 | 203 | HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram); |
AnnaBridge | 172:65be27845400 | 204 | /** |
AnnaBridge | 172:65be27845400 | 205 | * @} |
AnnaBridge | 172:65be27845400 | 206 | */ |
AnnaBridge | 172:65be27845400 | 207 | |
AnnaBridge | 172:65be27845400 | 208 | /** |
AnnaBridge | 172:65be27845400 | 209 | * @} |
AnnaBridge | 172:65be27845400 | 210 | */ |
AnnaBridge | 172:65be27845400 | 211 | |
AnnaBridge | 172:65be27845400 | 212 | /** |
AnnaBridge | 172:65be27845400 | 213 | * @} |
AnnaBridge | 172:65be27845400 | 214 | */ |
AnnaBridge | 172:65be27845400 | 215 | |
AnnaBridge | 172:65be27845400 | 216 | /** |
AnnaBridge | 172:65be27845400 | 217 | * @} |
AnnaBridge | 172:65be27845400 | 218 | */ |
AnnaBridge | 172:65be27845400 | 219 | |
AnnaBridge | 172:65be27845400 | 220 | |
AnnaBridge | 172:65be27845400 | 221 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 222 | } |
AnnaBridge | 172:65be27845400 | 223 | #endif |
AnnaBridge | 172:65be27845400 | 224 | |
AnnaBridge | 172:65be27845400 | 225 | #endif /* STM32H7xx_HAL_SDRAM_H */ |
AnnaBridge | 172:65be27845400 | 226 | |
AnnaBridge | 172:65be27845400 | 227 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |