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TARGET_NUCLEO_F767ZI/TOOLCHAIN_IAR/stm32f7xx_ll_i2c.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /** |
AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f7xx_ll_i2c.h |
AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of I2C LL module. |
AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
AnnaBridge | 171:3a7713b1edbc | 8 | * |
AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 32 | * |
AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 34 | */ |
AnnaBridge | 171:3a7713b1edbc | 35 | |
AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F7xx_LL_I2C_H |
AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F7xx_LL_I2C_H |
AnnaBridge | 171:3a7713b1edbc | 39 | |
AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f7xx.h" |
AnnaBridge | 171:3a7713b1edbc | 46 | |
AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F7xx_LL_Driver |
AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 49 | */ |
AnnaBridge | 171:3a7713b1edbc | 50 | |
AnnaBridge | 171:3a7713b1edbc | 51 | #if defined (I2C1) || defined (I2C2) || defined (I2C3) || defined (I2C4) |
AnnaBridge | 171:3a7713b1edbc | 52 | |
AnnaBridge | 171:3a7713b1edbc | 53 | /** @defgroup I2C_LL I2C |
AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 55 | */ |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 58 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 59 | |
AnnaBridge | 171:3a7713b1edbc | 60 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 61 | /** @defgroup I2C_LL_Private_Constants I2C Private Constants |
AnnaBridge | 171:3a7713b1edbc | 62 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 63 | */ |
AnnaBridge | 171:3a7713b1edbc | 64 | /** |
AnnaBridge | 171:3a7713b1edbc | 65 | * @} |
AnnaBridge | 171:3a7713b1edbc | 66 | */ |
AnnaBridge | 171:3a7713b1edbc | 67 | |
AnnaBridge | 171:3a7713b1edbc | 68 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 69 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 171:3a7713b1edbc | 70 | /** @defgroup I2C_LL_Private_Macros I2C Private Macros |
AnnaBridge | 171:3a7713b1edbc | 71 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 72 | */ |
AnnaBridge | 171:3a7713b1edbc | 73 | /** |
AnnaBridge | 171:3a7713b1edbc | 74 | * @} |
AnnaBridge | 171:3a7713b1edbc | 75 | */ |
AnnaBridge | 171:3a7713b1edbc | 76 | #endif /*USE_FULL_LL_DRIVER*/ |
AnnaBridge | 171:3a7713b1edbc | 77 | |
AnnaBridge | 171:3a7713b1edbc | 78 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 79 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 171:3a7713b1edbc | 80 | /** @defgroup I2C_LL_ES_INIT I2C Exported Init structure |
AnnaBridge | 171:3a7713b1edbc | 81 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 82 | */ |
AnnaBridge | 171:3a7713b1edbc | 83 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 84 | { |
AnnaBridge | 171:3a7713b1edbc | 85 | uint32_t PeripheralMode; /*!< Specifies the peripheral mode. |
AnnaBridge | 171:3a7713b1edbc | 86 | This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE |
AnnaBridge | 171:3a7713b1edbc | 87 | |
AnnaBridge | 171:3a7713b1edbc | 88 | This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */ |
AnnaBridge | 171:3a7713b1edbc | 89 | |
AnnaBridge | 171:3a7713b1edbc | 90 | uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values. |
AnnaBridge | 171:3a7713b1edbc | 91 | This parameter must be set by referring to the STM32CubeMX Tool and |
AnnaBridge | 171:3a7713b1edbc | 92 | the helper macro @ref __LL_I2C_CONVERT_TIMINGS() |
AnnaBridge | 171:3a7713b1edbc | 93 | |
AnnaBridge | 171:3a7713b1edbc | 94 | This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */ |
AnnaBridge | 171:3a7713b1edbc | 95 | |
AnnaBridge | 171:3a7713b1edbc | 96 | uint32_t AnalogFilter; /*!< Enables or disables analog noise filter. |
AnnaBridge | 171:3a7713b1edbc | 97 | This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION |
AnnaBridge | 171:3a7713b1edbc | 98 | |
AnnaBridge | 171:3a7713b1edbc | 99 | This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */ |
AnnaBridge | 171:3a7713b1edbc | 100 | |
AnnaBridge | 171:3a7713b1edbc | 101 | uint32_t DigitalFilter; /*!< Configures the digital noise filter. |
AnnaBridge | 171:3a7713b1edbc | 102 | This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F |
AnnaBridge | 171:3a7713b1edbc | 103 | |
AnnaBridge | 171:3a7713b1edbc | 104 | This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */ |
AnnaBridge | 171:3a7713b1edbc | 105 | |
AnnaBridge | 171:3a7713b1edbc | 106 | uint32_t OwnAddress1; /*!< Specifies the device own address 1. |
AnnaBridge | 171:3a7713b1edbc | 107 | This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF |
AnnaBridge | 171:3a7713b1edbc | 108 | |
AnnaBridge | 171:3a7713b1edbc | 109 | This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */ |
AnnaBridge | 171:3a7713b1edbc | 110 | |
AnnaBridge | 171:3a7713b1edbc | 111 | uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte. |
AnnaBridge | 171:3a7713b1edbc | 112 | This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE |
AnnaBridge | 171:3a7713b1edbc | 113 | |
AnnaBridge | 171:3a7713b1edbc | 114 | This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */ |
AnnaBridge | 171:3a7713b1edbc | 115 | |
AnnaBridge | 171:3a7713b1edbc | 116 | uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit). |
AnnaBridge | 171:3a7713b1edbc | 117 | This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1 |
AnnaBridge | 171:3a7713b1edbc | 118 | |
AnnaBridge | 171:3a7713b1edbc | 119 | This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */ |
AnnaBridge | 171:3a7713b1edbc | 120 | } LL_I2C_InitTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 121 | /** |
AnnaBridge | 171:3a7713b1edbc | 122 | * @} |
AnnaBridge | 171:3a7713b1edbc | 123 | */ |
AnnaBridge | 171:3a7713b1edbc | 124 | #endif /*USE_FULL_LL_DRIVER*/ |
AnnaBridge | 171:3a7713b1edbc | 125 | |
AnnaBridge | 171:3a7713b1edbc | 126 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 127 | /** @defgroup I2C_LL_Exported_Constants I2C Exported Constants |
AnnaBridge | 171:3a7713b1edbc | 128 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 129 | */ |
AnnaBridge | 171:3a7713b1edbc | 130 | |
AnnaBridge | 171:3a7713b1edbc | 131 | /** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines |
AnnaBridge | 171:3a7713b1edbc | 132 | * @brief Flags defines which can be used with LL_I2C_WriteReg function |
AnnaBridge | 171:3a7713b1edbc | 133 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 134 | */ |
AnnaBridge | 171:3a7713b1edbc | 135 | #define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /*!< Address Matched flag */ |
AnnaBridge | 171:3a7713b1edbc | 136 | #define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /*!< Not Acknowledge flag */ |
AnnaBridge | 171:3a7713b1edbc | 137 | #define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /*!< Stop detection flag */ |
AnnaBridge | 171:3a7713b1edbc | 138 | #define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /*!< Bus error flag */ |
AnnaBridge | 171:3a7713b1edbc | 139 | #define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /*!< Arbitration Lost flag */ |
AnnaBridge | 171:3a7713b1edbc | 140 | #define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /*!< Overrun/Underrun flag */ |
AnnaBridge | 171:3a7713b1edbc | 141 | #define LL_I2C_ICR_PECCF I2C_ICR_PECCF /*!< PEC error flag */ |
AnnaBridge | 171:3a7713b1edbc | 142 | #define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /*!< Timeout detection flag */ |
AnnaBridge | 171:3a7713b1edbc | 143 | #define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /*!< Alert flag */ |
AnnaBridge | 171:3a7713b1edbc | 144 | /** |
AnnaBridge | 171:3a7713b1edbc | 145 | * @} |
AnnaBridge | 171:3a7713b1edbc | 146 | */ |
AnnaBridge | 171:3a7713b1edbc | 147 | |
AnnaBridge | 171:3a7713b1edbc | 148 | /** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines |
AnnaBridge | 171:3a7713b1edbc | 149 | * @brief Flags defines which can be used with LL_I2C_ReadReg function |
AnnaBridge | 171:3a7713b1edbc | 150 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 151 | */ |
AnnaBridge | 171:3a7713b1edbc | 152 | #define LL_I2C_ISR_TXE I2C_ISR_TXE /*!< Transmit data register empty */ |
AnnaBridge | 171:3a7713b1edbc | 153 | #define LL_I2C_ISR_TXIS I2C_ISR_TXIS /*!< Transmit interrupt status */ |
AnnaBridge | 171:3a7713b1edbc | 154 | #define LL_I2C_ISR_RXNE I2C_ISR_RXNE /*!< Receive data register not empty */ |
AnnaBridge | 171:3a7713b1edbc | 155 | #define LL_I2C_ISR_ADDR I2C_ISR_ADDR /*!< Address matched (slave mode) */ |
AnnaBridge | 171:3a7713b1edbc | 156 | #define LL_I2C_ISR_NACKF I2C_ISR_NACKF /*!< Not Acknowledge received flag */ |
AnnaBridge | 171:3a7713b1edbc | 157 | #define LL_I2C_ISR_STOPF I2C_ISR_STOPF /*!< Stop detection flag */ |
AnnaBridge | 171:3a7713b1edbc | 158 | #define LL_I2C_ISR_TC I2C_ISR_TC /*!< Transfer Complete (master mode) */ |
AnnaBridge | 171:3a7713b1edbc | 159 | #define LL_I2C_ISR_TCR I2C_ISR_TCR /*!< Transfer Complete Reload */ |
AnnaBridge | 171:3a7713b1edbc | 160 | #define LL_I2C_ISR_BERR I2C_ISR_BERR /*!< Bus error */ |
AnnaBridge | 171:3a7713b1edbc | 161 | #define LL_I2C_ISR_ARLO I2C_ISR_ARLO /*!< Arbitration lost */ |
AnnaBridge | 171:3a7713b1edbc | 162 | #define LL_I2C_ISR_OVR I2C_ISR_OVR /*!< Overrun/Underrun (slave mode) */ |
AnnaBridge | 171:3a7713b1edbc | 163 | #define LL_I2C_ISR_PECERR I2C_ISR_PECERR /*!< PEC Error in reception (SMBus mode) */ |
AnnaBridge | 171:3a7713b1edbc | 164 | #define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /*!< Timeout detection flag (SMBus mode) */ |
AnnaBridge | 171:3a7713b1edbc | 165 | #define LL_I2C_ISR_ALERT I2C_ISR_ALERT /*!< SMBus alert (SMBus mode) */ |
AnnaBridge | 171:3a7713b1edbc | 166 | #define LL_I2C_ISR_BUSY I2C_ISR_BUSY /*!< Bus busy */ |
AnnaBridge | 171:3a7713b1edbc | 167 | /** |
AnnaBridge | 171:3a7713b1edbc | 168 | * @} |
AnnaBridge | 171:3a7713b1edbc | 169 | */ |
AnnaBridge | 171:3a7713b1edbc | 170 | |
AnnaBridge | 171:3a7713b1edbc | 171 | /** @defgroup I2C_LL_EC_IT IT Defines |
AnnaBridge | 171:3a7713b1edbc | 172 | * @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions |
AnnaBridge | 171:3a7713b1edbc | 173 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 174 | */ |
AnnaBridge | 171:3a7713b1edbc | 175 | #define LL_I2C_CR1_TXIE I2C_CR1_TXIE /*!< TX Interrupt enable */ |
AnnaBridge | 171:3a7713b1edbc | 176 | #define LL_I2C_CR1_RXIE I2C_CR1_RXIE /*!< RX Interrupt enable */ |
AnnaBridge | 171:3a7713b1edbc | 177 | #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt enable (slave only) */ |
AnnaBridge | 171:3a7713b1edbc | 178 | #define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /*!< Not acknowledge received Interrupt enable */ |
AnnaBridge | 171:3a7713b1edbc | 179 | #define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /*!< STOP detection Interrupt enable */ |
AnnaBridge | 171:3a7713b1edbc | 180 | #define LL_I2C_CR1_TCIE I2C_CR1_TCIE /*!< Transfer Complete interrupt enable */ |
AnnaBridge | 171:3a7713b1edbc | 181 | #define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /*!< Error interrupts enable */ |
AnnaBridge | 171:3a7713b1edbc | 182 | /** |
AnnaBridge | 171:3a7713b1edbc | 183 | * @} |
AnnaBridge | 171:3a7713b1edbc | 184 | */ |
AnnaBridge | 171:3a7713b1edbc | 185 | |
AnnaBridge | 171:3a7713b1edbc | 186 | /** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode |
AnnaBridge | 171:3a7713b1edbc | 187 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 188 | */ |
AnnaBridge | 171:3a7713b1edbc | 189 | #define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */ |
AnnaBridge | 171:3a7713b1edbc | 190 | #define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */ |
AnnaBridge | 171:3a7713b1edbc | 191 | #define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode (Default address not acknowledge) */ |
AnnaBridge | 171:3a7713b1edbc | 192 | #define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */ |
AnnaBridge | 171:3a7713b1edbc | 193 | /** |
AnnaBridge | 171:3a7713b1edbc | 194 | * @} |
AnnaBridge | 171:3a7713b1edbc | 195 | */ |
AnnaBridge | 171:3a7713b1edbc | 196 | |
AnnaBridge | 171:3a7713b1edbc | 197 | /** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection |
AnnaBridge | 171:3a7713b1edbc | 198 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 199 | */ |
AnnaBridge | 171:3a7713b1edbc | 200 | #define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /*!< Analog filter is enabled. */ |
AnnaBridge | 171:3a7713b1edbc | 201 | #define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /*!< Analog filter is disabled. */ |
AnnaBridge | 171:3a7713b1edbc | 202 | /** |
AnnaBridge | 171:3a7713b1edbc | 203 | * @} |
AnnaBridge | 171:3a7713b1edbc | 204 | */ |
AnnaBridge | 171:3a7713b1edbc | 205 | |
AnnaBridge | 171:3a7713b1edbc | 206 | /** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode |
AnnaBridge | 171:3a7713b1edbc | 207 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 208 | */ |
AnnaBridge | 171:3a7713b1edbc | 209 | #define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /*!< Master operates in 7-bit addressing mode. */ |
AnnaBridge | 171:3a7713b1edbc | 210 | #define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /*!< Master operates in 10-bit addressing mode.*/ |
AnnaBridge | 171:3a7713b1edbc | 211 | /** |
AnnaBridge | 171:3a7713b1edbc | 212 | * @} |
AnnaBridge | 171:3a7713b1edbc | 213 | */ |
AnnaBridge | 171:3a7713b1edbc | 214 | |
AnnaBridge | 171:3a7713b1edbc | 215 | /** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length |
AnnaBridge | 171:3a7713b1edbc | 216 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 217 | */ |
AnnaBridge | 171:3a7713b1edbc | 218 | #define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /*!< Own address 1 is a 7-bit address. */ |
AnnaBridge | 171:3a7713b1edbc | 219 | #define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /*!< Own address 1 is a 10-bit address.*/ |
AnnaBridge | 171:3a7713b1edbc | 220 | /** |
AnnaBridge | 171:3a7713b1edbc | 221 | * @} |
AnnaBridge | 171:3a7713b1edbc | 222 | */ |
AnnaBridge | 171:3a7713b1edbc | 223 | |
AnnaBridge | 171:3a7713b1edbc | 224 | /** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks |
AnnaBridge | 171:3a7713b1edbc | 225 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 226 | */ |
AnnaBridge | 171:3a7713b1edbc | 227 | #define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */ |
AnnaBridge | 171:3a7713b1edbc | 228 | #define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */ |
AnnaBridge | 171:3a7713b1edbc | 229 | #define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */ |
AnnaBridge | 171:3a7713b1edbc | 230 | #define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */ |
AnnaBridge | 171:3a7713b1edbc | 231 | #define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */ |
AnnaBridge | 171:3a7713b1edbc | 232 | #define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */ |
AnnaBridge | 171:3a7713b1edbc | 233 | #define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */ |
AnnaBridge | 171:3a7713b1edbc | 234 | #define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. All Address2 are acknowledged.*/ |
AnnaBridge | 171:3a7713b1edbc | 235 | /** |
AnnaBridge | 171:3a7713b1edbc | 236 | * @} |
AnnaBridge | 171:3a7713b1edbc | 237 | */ |
AnnaBridge | 171:3a7713b1edbc | 238 | |
AnnaBridge | 171:3a7713b1edbc | 239 | /** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation |
AnnaBridge | 171:3a7713b1edbc | 240 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 241 | */ |
AnnaBridge | 171:3a7713b1edbc | 242 | #define LL_I2C_ACK 0x00000000U /*!< ACK is sent after current received byte. */ |
AnnaBridge | 171:3a7713b1edbc | 243 | #define LL_I2C_NACK I2C_CR2_NACK /*!< NACK is sent after current received byte.*/ |
AnnaBridge | 171:3a7713b1edbc | 244 | /** |
AnnaBridge | 171:3a7713b1edbc | 245 | * @} |
AnnaBridge | 171:3a7713b1edbc | 246 | */ |
AnnaBridge | 171:3a7713b1edbc | 247 | |
AnnaBridge | 171:3a7713b1edbc | 248 | /** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length |
AnnaBridge | 171:3a7713b1edbc | 249 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 250 | */ |
AnnaBridge | 171:3a7713b1edbc | 251 | #define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /*!< Slave Address in 7-bit. */ |
AnnaBridge | 171:3a7713b1edbc | 252 | #define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /*!< Slave Address in 10-bit.*/ |
AnnaBridge | 171:3a7713b1edbc | 253 | /** |
AnnaBridge | 171:3a7713b1edbc | 254 | * @} |
AnnaBridge | 171:3a7713b1edbc | 255 | */ |
AnnaBridge | 171:3a7713b1edbc | 256 | |
AnnaBridge | 171:3a7713b1edbc | 257 | /** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction |
AnnaBridge | 171:3a7713b1edbc | 258 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 259 | */ |
AnnaBridge | 171:3a7713b1edbc | 260 | #define LL_I2C_REQUEST_WRITE 0x00000000U /*!< Master request a write transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 261 | #define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /*!< Master request a read transfer. */ |
AnnaBridge | 171:3a7713b1edbc | 262 | /** |
AnnaBridge | 171:3a7713b1edbc | 263 | * @} |
AnnaBridge | 171:3a7713b1edbc | 264 | */ |
AnnaBridge | 171:3a7713b1edbc | 265 | |
AnnaBridge | 171:3a7713b1edbc | 266 | /** @defgroup I2C_LL_EC_MODE Transfer End Mode |
AnnaBridge | 171:3a7713b1edbc | 267 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 268 | */ |
AnnaBridge | 171:3a7713b1edbc | 269 | #define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */ |
AnnaBridge | 171:3a7713b1edbc | 270 | #define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode with no HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 271 | #define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode with no HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 272 | #define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 273 | #define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 274 | #define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode with HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 275 | #define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 276 | #define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Software end mode with HW PEC comparison. */ |
AnnaBridge | 171:3a7713b1edbc | 277 | /** |
AnnaBridge | 171:3a7713b1edbc | 278 | * @} |
AnnaBridge | 171:3a7713b1edbc | 279 | */ |
AnnaBridge | 171:3a7713b1edbc | 280 | |
AnnaBridge | 171:3a7713b1edbc | 281 | /** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation |
AnnaBridge | 171:3a7713b1edbc | 282 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 283 | */ |
AnnaBridge | 171:3a7713b1edbc | 284 | #define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /*!< Don't Generate Stop and Start condition. */ |
AnnaBridge | 171:3a7713b1edbc | 285 | #define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) /*!< Generate Stop condition (Size should be set to 0). */ |
AnnaBridge | 171:3a7713b1edbc | 286 | #define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Start for read request. */ |
AnnaBridge | 171:3a7713b1edbc | 287 | #define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Start for write request. */ |
AnnaBridge | 171:3a7713b1edbc | 288 | #define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Restart for read request, slave 7Bit address. */ |
AnnaBridge | 171:3a7713b1edbc | 289 | #define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 7Bit address. */ |
AnnaBridge | 171:3a7713b1edbc | 290 | #define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */ |
AnnaBridge | 171:3a7713b1edbc | 291 | #define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) /*!< Generate Restart for write request, slave 10Bit address.*/ |
AnnaBridge | 171:3a7713b1edbc | 292 | /** |
AnnaBridge | 171:3a7713b1edbc | 293 | * @} |
AnnaBridge | 171:3a7713b1edbc | 294 | */ |
AnnaBridge | 171:3a7713b1edbc | 295 | |
AnnaBridge | 171:3a7713b1edbc | 296 | /** @defgroup I2C_LL_EC_DIRECTION Read Write Direction |
AnnaBridge | 171:3a7713b1edbc | 297 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 298 | */ |
AnnaBridge | 171:3a7713b1edbc | 299 | #define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, slave enters receiver mode. */ |
AnnaBridge | 171:3a7713b1edbc | 300 | #define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, slave enters transmitter mode.*/ |
AnnaBridge | 171:3a7713b1edbc | 301 | /** |
AnnaBridge | 171:3a7713b1edbc | 302 | * @} |
AnnaBridge | 171:3a7713b1edbc | 303 | */ |
AnnaBridge | 171:3a7713b1edbc | 304 | |
AnnaBridge | 171:3a7713b1edbc | 305 | /** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data |
AnnaBridge | 171:3a7713b1edbc | 306 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 307 | */ |
AnnaBridge | 171:3a7713b1edbc | 308 | #define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */ |
AnnaBridge | 171:3a7713b1edbc | 309 | #define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */ |
AnnaBridge | 171:3a7713b1edbc | 310 | /** |
AnnaBridge | 171:3a7713b1edbc | 311 | * @} |
AnnaBridge | 171:3a7713b1edbc | 312 | */ |
AnnaBridge | 171:3a7713b1edbc | 313 | |
AnnaBridge | 171:3a7713b1edbc | 314 | /** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout |
AnnaBridge | 171:3a7713b1edbc | 315 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 316 | */ |
AnnaBridge | 171:3a7713b1edbc | 317 | #define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect SCL low level timeout. */ |
AnnaBridge | 171:3a7713b1edbc | 318 | #define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/ |
AnnaBridge | 171:3a7713b1edbc | 319 | /** |
AnnaBridge | 171:3a7713b1edbc | 320 | * @} |
AnnaBridge | 171:3a7713b1edbc | 321 | */ |
AnnaBridge | 171:3a7713b1edbc | 322 | |
AnnaBridge | 171:3a7713b1edbc | 323 | /** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection |
AnnaBridge | 171:3a7713b1edbc | 324 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 325 | */ |
AnnaBridge | 171:3a7713b1edbc | 326 | #define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */ |
AnnaBridge | 171:3a7713b1edbc | 327 | #define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) enable bit */ |
AnnaBridge | 171:3a7713b1edbc | 328 | #define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */ |
AnnaBridge | 171:3a7713b1edbc | 329 | /** |
AnnaBridge | 171:3a7713b1edbc | 330 | * @} |
AnnaBridge | 171:3a7713b1edbc | 331 | */ |
AnnaBridge | 171:3a7713b1edbc | 332 | |
AnnaBridge | 171:3a7713b1edbc | 333 | /** |
AnnaBridge | 171:3a7713b1edbc | 334 | * @} |
AnnaBridge | 171:3a7713b1edbc | 335 | */ |
AnnaBridge | 171:3a7713b1edbc | 336 | |
AnnaBridge | 171:3a7713b1edbc | 337 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 338 | /** @defgroup I2C_LL_Exported_Macros I2C Exported Macros |
AnnaBridge | 171:3a7713b1edbc | 339 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 340 | */ |
AnnaBridge | 171:3a7713b1edbc | 341 | |
AnnaBridge | 171:3a7713b1edbc | 342 | /** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros |
AnnaBridge | 171:3a7713b1edbc | 343 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 344 | */ |
AnnaBridge | 171:3a7713b1edbc | 345 | |
AnnaBridge | 171:3a7713b1edbc | 346 | /** |
AnnaBridge | 171:3a7713b1edbc | 347 | * @brief Write a value in I2C register |
AnnaBridge | 171:3a7713b1edbc | 348 | * @param __INSTANCE__ I2C Instance |
AnnaBridge | 171:3a7713b1edbc | 349 | * @param __REG__ Register to be written |
AnnaBridge | 171:3a7713b1edbc | 350 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 171:3a7713b1edbc | 351 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 352 | */ |
AnnaBridge | 171:3a7713b1edbc | 353 | #define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
AnnaBridge | 171:3a7713b1edbc | 354 | |
AnnaBridge | 171:3a7713b1edbc | 355 | /** |
AnnaBridge | 171:3a7713b1edbc | 356 | * @brief Read a value in I2C register |
AnnaBridge | 171:3a7713b1edbc | 357 | * @param __INSTANCE__ I2C Instance |
AnnaBridge | 171:3a7713b1edbc | 358 | * @param __REG__ Register to be read |
AnnaBridge | 171:3a7713b1edbc | 359 | * @retval Register value |
AnnaBridge | 171:3a7713b1edbc | 360 | */ |
AnnaBridge | 171:3a7713b1edbc | 361 | #define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
AnnaBridge | 171:3a7713b1edbc | 362 | /** |
AnnaBridge | 171:3a7713b1edbc | 363 | * @} |
AnnaBridge | 171:3a7713b1edbc | 364 | */ |
AnnaBridge | 171:3a7713b1edbc | 365 | |
AnnaBridge | 171:3a7713b1edbc | 366 | /** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings |
AnnaBridge | 171:3a7713b1edbc | 367 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 368 | */ |
AnnaBridge | 171:3a7713b1edbc | 369 | /** |
AnnaBridge | 171:3a7713b1edbc | 370 | * @brief Configure the SDA setup, hold time and the SCL high, low period. |
AnnaBridge | 171:3a7713b1edbc | 371 | * @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. |
AnnaBridge | 171:3a7713b1edbc | 372 | * @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc) |
AnnaBridge | 171:3a7713b1edbc | 373 | * @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc) |
AnnaBridge | 171:3a7713b1edbc | 374 | * @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc) |
AnnaBridge | 171:3a7713b1edbc | 375 | * @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc) |
AnnaBridge | 171:3a7713b1edbc | 376 | * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 377 | */ |
AnnaBridge | 171:3a7713b1edbc | 378 | #define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \ |
AnnaBridge | 171:3a7713b1edbc | 379 | ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \ |
AnnaBridge | 171:3a7713b1edbc | 380 | (((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \ |
AnnaBridge | 171:3a7713b1edbc | 381 | (((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \ |
AnnaBridge | 171:3a7713b1edbc | 382 | (((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \ |
AnnaBridge | 171:3a7713b1edbc | 383 | (((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL)) |
AnnaBridge | 171:3a7713b1edbc | 384 | /** |
AnnaBridge | 171:3a7713b1edbc | 385 | * @} |
AnnaBridge | 171:3a7713b1edbc | 386 | */ |
AnnaBridge | 171:3a7713b1edbc | 387 | |
AnnaBridge | 171:3a7713b1edbc | 388 | /** |
AnnaBridge | 171:3a7713b1edbc | 389 | * @} |
AnnaBridge | 171:3a7713b1edbc | 390 | */ |
AnnaBridge | 171:3a7713b1edbc | 391 | |
AnnaBridge | 171:3a7713b1edbc | 392 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 393 | /** @defgroup I2C_LL_Exported_Functions I2C Exported Functions |
AnnaBridge | 171:3a7713b1edbc | 394 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 395 | */ |
AnnaBridge | 171:3a7713b1edbc | 396 | |
AnnaBridge | 171:3a7713b1edbc | 397 | /** @defgroup I2C_LL_EF_Configuration Configuration |
AnnaBridge | 171:3a7713b1edbc | 398 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 399 | */ |
AnnaBridge | 171:3a7713b1edbc | 400 | |
AnnaBridge | 171:3a7713b1edbc | 401 | /** |
AnnaBridge | 171:3a7713b1edbc | 402 | * @brief Enable I2C peripheral (PE = 1). |
AnnaBridge | 171:3a7713b1edbc | 403 | * @rmtoll CR1 PE LL_I2C_Enable |
AnnaBridge | 171:3a7713b1edbc | 404 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 405 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 406 | */ |
AnnaBridge | 171:3a7713b1edbc | 407 | __STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 408 | { |
AnnaBridge | 171:3a7713b1edbc | 409 | SET_BIT(I2Cx->CR1, I2C_CR1_PE); |
AnnaBridge | 171:3a7713b1edbc | 410 | } |
AnnaBridge | 171:3a7713b1edbc | 411 | |
AnnaBridge | 171:3a7713b1edbc | 412 | /** |
AnnaBridge | 171:3a7713b1edbc | 413 | * @brief Disable I2C peripheral (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 414 | * @note When PE = 0, the I2C SCL and SDA lines are released. |
AnnaBridge | 171:3a7713b1edbc | 415 | * Internal state machines and status bits are put back to their reset value. |
AnnaBridge | 171:3a7713b1edbc | 416 | * When cleared, PE must be kept low for at least 3 APB clock cycles. |
AnnaBridge | 171:3a7713b1edbc | 417 | * @rmtoll CR1 PE LL_I2C_Disable |
AnnaBridge | 171:3a7713b1edbc | 418 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 419 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 420 | */ |
AnnaBridge | 171:3a7713b1edbc | 421 | __STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 422 | { |
AnnaBridge | 171:3a7713b1edbc | 423 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE); |
AnnaBridge | 171:3a7713b1edbc | 424 | } |
AnnaBridge | 171:3a7713b1edbc | 425 | |
AnnaBridge | 171:3a7713b1edbc | 426 | /** |
AnnaBridge | 171:3a7713b1edbc | 427 | * @brief Check if the I2C peripheral is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 428 | * @rmtoll CR1 PE LL_I2C_IsEnabled |
AnnaBridge | 171:3a7713b1edbc | 429 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 430 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 431 | */ |
AnnaBridge | 171:3a7713b1edbc | 432 | __STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 433 | { |
AnnaBridge | 171:3a7713b1edbc | 434 | return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE)); |
AnnaBridge | 171:3a7713b1edbc | 435 | } |
AnnaBridge | 171:3a7713b1edbc | 436 | |
AnnaBridge | 171:3a7713b1edbc | 437 | /** |
AnnaBridge | 171:3a7713b1edbc | 438 | * @brief Configure Noise Filters (Analog and Digital). |
AnnaBridge | 171:3a7713b1edbc | 439 | * @note If the analog filter is also enabled, the digital filter is added to analog filter. |
AnnaBridge | 171:3a7713b1edbc | 440 | * The filters can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 441 | * @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n |
AnnaBridge | 171:3a7713b1edbc | 442 | * CR1 DNF LL_I2C_ConfigFilters |
AnnaBridge | 171:3a7713b1edbc | 443 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 444 | * @param AnalogFilter This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 445 | * @arg @ref LL_I2C_ANALOGFILTER_ENABLE |
AnnaBridge | 171:3a7713b1edbc | 446 | * @arg @ref LL_I2C_ANALOGFILTER_DISABLE |
AnnaBridge | 171:3a7713b1edbc | 447 | * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk). |
AnnaBridge | 171:3a7713b1edbc | 448 | * This parameter is used to configure the digital noise filter on SDA and SCL input. |
AnnaBridge | 171:3a7713b1edbc | 449 | * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk. |
AnnaBridge | 171:3a7713b1edbc | 450 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 451 | */ |
AnnaBridge | 171:3a7713b1edbc | 452 | __STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter) |
AnnaBridge | 171:3a7713b1edbc | 453 | { |
AnnaBridge | 171:3a7713b1edbc | 454 | MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 455 | } |
AnnaBridge | 171:3a7713b1edbc | 456 | |
AnnaBridge | 171:3a7713b1edbc | 457 | /** |
AnnaBridge | 171:3a7713b1edbc | 458 | * @brief Configure Digital Noise Filter. |
AnnaBridge | 171:3a7713b1edbc | 459 | * @note If the analog filter is also enabled, the digital filter is added to analog filter. |
AnnaBridge | 171:3a7713b1edbc | 460 | * This filter can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 461 | * @rmtoll CR1 DNF LL_I2C_SetDigitalFilter |
AnnaBridge | 171:3a7713b1edbc | 462 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 463 | * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk). |
AnnaBridge | 171:3a7713b1edbc | 464 | * This parameter is used to configure the digital noise filter on SDA and SCL input. |
AnnaBridge | 171:3a7713b1edbc | 465 | * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk. |
AnnaBridge | 171:3a7713b1edbc | 466 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 467 | */ |
AnnaBridge | 171:3a7713b1edbc | 468 | __STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter) |
AnnaBridge | 171:3a7713b1edbc | 469 | { |
AnnaBridge | 171:3a7713b1edbc | 470 | MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos); |
AnnaBridge | 171:3a7713b1edbc | 471 | } |
AnnaBridge | 171:3a7713b1edbc | 472 | |
AnnaBridge | 171:3a7713b1edbc | 473 | /** |
AnnaBridge | 171:3a7713b1edbc | 474 | * @brief Get the current Digital Noise Filter configuration. |
AnnaBridge | 171:3a7713b1edbc | 475 | * @rmtoll CR1 DNF LL_I2C_GetDigitalFilter |
AnnaBridge | 171:3a7713b1edbc | 476 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 477 | * @retval Value between Min_Data=0x0 and Max_Data=0xF |
AnnaBridge | 171:3a7713b1edbc | 478 | */ |
AnnaBridge | 171:3a7713b1edbc | 479 | __STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 480 | { |
AnnaBridge | 171:3a7713b1edbc | 481 | return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos); |
AnnaBridge | 171:3a7713b1edbc | 482 | } |
AnnaBridge | 171:3a7713b1edbc | 483 | |
AnnaBridge | 171:3a7713b1edbc | 484 | /** |
AnnaBridge | 171:3a7713b1edbc | 485 | * @brief Enable Analog Noise Filter. |
AnnaBridge | 171:3a7713b1edbc | 486 | * @note This filter can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 487 | * @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter |
AnnaBridge | 171:3a7713b1edbc | 488 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 489 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 490 | */ |
AnnaBridge | 171:3a7713b1edbc | 491 | __STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 492 | { |
AnnaBridge | 171:3a7713b1edbc | 493 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF); |
AnnaBridge | 171:3a7713b1edbc | 494 | } |
AnnaBridge | 171:3a7713b1edbc | 495 | |
AnnaBridge | 171:3a7713b1edbc | 496 | /** |
AnnaBridge | 171:3a7713b1edbc | 497 | * @brief Disable Analog Noise Filter. |
AnnaBridge | 171:3a7713b1edbc | 498 | * @note This filter can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 499 | * @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter |
AnnaBridge | 171:3a7713b1edbc | 500 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 501 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 502 | */ |
AnnaBridge | 171:3a7713b1edbc | 503 | __STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 504 | { |
AnnaBridge | 171:3a7713b1edbc | 505 | SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF); |
AnnaBridge | 171:3a7713b1edbc | 506 | } |
AnnaBridge | 171:3a7713b1edbc | 507 | |
AnnaBridge | 171:3a7713b1edbc | 508 | /** |
AnnaBridge | 171:3a7713b1edbc | 509 | * @brief Check if Analog Noise Filter is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 510 | * @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter |
AnnaBridge | 171:3a7713b1edbc | 511 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 512 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 513 | */ |
AnnaBridge | 171:3a7713b1edbc | 514 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 515 | { |
AnnaBridge | 171:3a7713b1edbc | 516 | return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF)); |
AnnaBridge | 171:3a7713b1edbc | 517 | } |
AnnaBridge | 171:3a7713b1edbc | 518 | |
AnnaBridge | 171:3a7713b1edbc | 519 | /** |
AnnaBridge | 171:3a7713b1edbc | 520 | * @brief Enable DMA transmission requests. |
AnnaBridge | 171:3a7713b1edbc | 521 | * @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX |
AnnaBridge | 171:3a7713b1edbc | 522 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 523 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 524 | */ |
AnnaBridge | 171:3a7713b1edbc | 525 | __STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 526 | { |
AnnaBridge | 171:3a7713b1edbc | 527 | SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN); |
AnnaBridge | 171:3a7713b1edbc | 528 | } |
AnnaBridge | 171:3a7713b1edbc | 529 | |
AnnaBridge | 171:3a7713b1edbc | 530 | /** |
AnnaBridge | 171:3a7713b1edbc | 531 | * @brief Disable DMA transmission requests. |
AnnaBridge | 171:3a7713b1edbc | 532 | * @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX |
AnnaBridge | 171:3a7713b1edbc | 533 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 534 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 535 | */ |
AnnaBridge | 171:3a7713b1edbc | 536 | __STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 537 | { |
AnnaBridge | 171:3a7713b1edbc | 538 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN); |
AnnaBridge | 171:3a7713b1edbc | 539 | } |
AnnaBridge | 171:3a7713b1edbc | 540 | |
AnnaBridge | 171:3a7713b1edbc | 541 | /** |
AnnaBridge | 171:3a7713b1edbc | 542 | * @brief Check if DMA transmission requests are enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 543 | * @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX |
AnnaBridge | 171:3a7713b1edbc | 544 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 545 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 546 | */ |
AnnaBridge | 171:3a7713b1edbc | 547 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 548 | { |
AnnaBridge | 171:3a7713b1edbc | 549 | return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN)); |
AnnaBridge | 171:3a7713b1edbc | 550 | } |
AnnaBridge | 171:3a7713b1edbc | 551 | |
AnnaBridge | 171:3a7713b1edbc | 552 | /** |
AnnaBridge | 171:3a7713b1edbc | 553 | * @brief Enable DMA reception requests. |
AnnaBridge | 171:3a7713b1edbc | 554 | * @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX |
AnnaBridge | 171:3a7713b1edbc | 555 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 556 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 557 | */ |
AnnaBridge | 171:3a7713b1edbc | 558 | __STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 559 | { |
AnnaBridge | 171:3a7713b1edbc | 560 | SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN); |
AnnaBridge | 171:3a7713b1edbc | 561 | } |
AnnaBridge | 171:3a7713b1edbc | 562 | |
AnnaBridge | 171:3a7713b1edbc | 563 | /** |
AnnaBridge | 171:3a7713b1edbc | 564 | * @brief Disable DMA reception requests. |
AnnaBridge | 171:3a7713b1edbc | 565 | * @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX |
AnnaBridge | 171:3a7713b1edbc | 566 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 567 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 568 | */ |
AnnaBridge | 171:3a7713b1edbc | 569 | __STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 570 | { |
AnnaBridge | 171:3a7713b1edbc | 571 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN); |
AnnaBridge | 171:3a7713b1edbc | 572 | } |
AnnaBridge | 171:3a7713b1edbc | 573 | |
AnnaBridge | 171:3a7713b1edbc | 574 | /** |
AnnaBridge | 171:3a7713b1edbc | 575 | * @brief Check if DMA reception requests are enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 576 | * @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX |
AnnaBridge | 171:3a7713b1edbc | 577 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 578 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 579 | */ |
AnnaBridge | 171:3a7713b1edbc | 580 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 581 | { |
AnnaBridge | 171:3a7713b1edbc | 582 | return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN)); |
AnnaBridge | 171:3a7713b1edbc | 583 | } |
AnnaBridge | 171:3a7713b1edbc | 584 | |
AnnaBridge | 171:3a7713b1edbc | 585 | /** |
AnnaBridge | 171:3a7713b1edbc | 586 | * @brief Get the data register address used for DMA transfer |
AnnaBridge | 171:3a7713b1edbc | 587 | * @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n |
AnnaBridge | 171:3a7713b1edbc | 588 | * RXDR RXDATA LL_I2C_DMA_GetRegAddr |
AnnaBridge | 171:3a7713b1edbc | 589 | * @param I2Cx I2C Instance |
AnnaBridge | 171:3a7713b1edbc | 590 | * @param Direction This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 591 | * @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT |
AnnaBridge | 171:3a7713b1edbc | 592 | * @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE |
AnnaBridge | 171:3a7713b1edbc | 593 | * @retval Address of data register |
AnnaBridge | 171:3a7713b1edbc | 594 | */ |
AnnaBridge | 171:3a7713b1edbc | 595 | __STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction) |
AnnaBridge | 171:3a7713b1edbc | 596 | { |
AnnaBridge | 171:3a7713b1edbc | 597 | register uint32_t data_reg_addr = 0U; |
AnnaBridge | 171:3a7713b1edbc | 598 | |
AnnaBridge | 171:3a7713b1edbc | 599 | if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT) |
AnnaBridge | 171:3a7713b1edbc | 600 | { |
AnnaBridge | 171:3a7713b1edbc | 601 | /* return address of TXDR register */ |
AnnaBridge | 171:3a7713b1edbc | 602 | data_reg_addr = (uint32_t) & (I2Cx->TXDR); |
AnnaBridge | 171:3a7713b1edbc | 603 | } |
AnnaBridge | 171:3a7713b1edbc | 604 | else |
AnnaBridge | 171:3a7713b1edbc | 605 | { |
AnnaBridge | 171:3a7713b1edbc | 606 | /* return address of RXDR register */ |
AnnaBridge | 171:3a7713b1edbc | 607 | data_reg_addr = (uint32_t) & (I2Cx->RXDR); |
AnnaBridge | 171:3a7713b1edbc | 608 | } |
AnnaBridge | 171:3a7713b1edbc | 609 | |
AnnaBridge | 171:3a7713b1edbc | 610 | return data_reg_addr; |
AnnaBridge | 171:3a7713b1edbc | 611 | } |
AnnaBridge | 171:3a7713b1edbc | 612 | |
AnnaBridge | 171:3a7713b1edbc | 613 | /** |
AnnaBridge | 171:3a7713b1edbc | 614 | * @brief Enable Clock stretching. |
AnnaBridge | 171:3a7713b1edbc | 615 | * @note This bit can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 616 | * @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching |
AnnaBridge | 171:3a7713b1edbc | 617 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 618 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 619 | */ |
AnnaBridge | 171:3a7713b1edbc | 620 | __STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 621 | { |
AnnaBridge | 171:3a7713b1edbc | 622 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH); |
AnnaBridge | 171:3a7713b1edbc | 623 | } |
AnnaBridge | 171:3a7713b1edbc | 624 | |
AnnaBridge | 171:3a7713b1edbc | 625 | /** |
AnnaBridge | 171:3a7713b1edbc | 626 | * @brief Disable Clock stretching. |
AnnaBridge | 171:3a7713b1edbc | 627 | * @note This bit can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 628 | * @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching |
AnnaBridge | 171:3a7713b1edbc | 629 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 630 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 631 | */ |
AnnaBridge | 171:3a7713b1edbc | 632 | __STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 633 | { |
AnnaBridge | 171:3a7713b1edbc | 634 | SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH); |
AnnaBridge | 171:3a7713b1edbc | 635 | } |
AnnaBridge | 171:3a7713b1edbc | 636 | |
AnnaBridge | 171:3a7713b1edbc | 637 | /** |
AnnaBridge | 171:3a7713b1edbc | 638 | * @brief Check if Clock stretching is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 639 | * @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching |
AnnaBridge | 171:3a7713b1edbc | 640 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 641 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 642 | */ |
AnnaBridge | 171:3a7713b1edbc | 643 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 644 | { |
AnnaBridge | 171:3a7713b1edbc | 645 | return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH)); |
AnnaBridge | 171:3a7713b1edbc | 646 | } |
AnnaBridge | 171:3a7713b1edbc | 647 | |
AnnaBridge | 171:3a7713b1edbc | 648 | /** |
AnnaBridge | 171:3a7713b1edbc | 649 | * @brief Enable hardware byte control in slave mode. |
AnnaBridge | 171:3a7713b1edbc | 650 | * @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl |
AnnaBridge | 171:3a7713b1edbc | 651 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 652 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 653 | */ |
AnnaBridge | 171:3a7713b1edbc | 654 | __STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 655 | { |
AnnaBridge | 171:3a7713b1edbc | 656 | SET_BIT(I2Cx->CR1, I2C_CR1_SBC); |
AnnaBridge | 171:3a7713b1edbc | 657 | } |
AnnaBridge | 171:3a7713b1edbc | 658 | |
AnnaBridge | 171:3a7713b1edbc | 659 | /** |
AnnaBridge | 171:3a7713b1edbc | 660 | * @brief Disable hardware byte control in slave mode. |
AnnaBridge | 171:3a7713b1edbc | 661 | * @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl |
AnnaBridge | 171:3a7713b1edbc | 662 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 663 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 664 | */ |
AnnaBridge | 171:3a7713b1edbc | 665 | __STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 666 | { |
AnnaBridge | 171:3a7713b1edbc | 667 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC); |
AnnaBridge | 171:3a7713b1edbc | 668 | } |
AnnaBridge | 171:3a7713b1edbc | 669 | |
AnnaBridge | 171:3a7713b1edbc | 670 | /** |
AnnaBridge | 171:3a7713b1edbc | 671 | * @brief Check if hardware byte control in slave mode is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 672 | * @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl |
AnnaBridge | 171:3a7713b1edbc | 673 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 674 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 675 | */ |
AnnaBridge | 171:3a7713b1edbc | 676 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 677 | { |
AnnaBridge | 171:3a7713b1edbc | 678 | return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC)); |
AnnaBridge | 171:3a7713b1edbc | 679 | } |
AnnaBridge | 171:3a7713b1edbc | 680 | |
AnnaBridge | 171:3a7713b1edbc | 681 | |
AnnaBridge | 171:3a7713b1edbc | 682 | /** |
AnnaBridge | 171:3a7713b1edbc | 683 | * @brief Enable General Call. |
AnnaBridge | 171:3a7713b1edbc | 684 | * @note When enabled the Address 0x00 is ACKed. |
AnnaBridge | 171:3a7713b1edbc | 685 | * @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall |
AnnaBridge | 171:3a7713b1edbc | 686 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 687 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 688 | */ |
AnnaBridge | 171:3a7713b1edbc | 689 | __STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 690 | { |
AnnaBridge | 171:3a7713b1edbc | 691 | SET_BIT(I2Cx->CR1, I2C_CR1_GCEN); |
AnnaBridge | 171:3a7713b1edbc | 692 | } |
AnnaBridge | 171:3a7713b1edbc | 693 | |
AnnaBridge | 171:3a7713b1edbc | 694 | /** |
AnnaBridge | 171:3a7713b1edbc | 695 | * @brief Disable General Call. |
AnnaBridge | 171:3a7713b1edbc | 696 | * @note When disabled the Address 0x00 is NACKed. |
AnnaBridge | 171:3a7713b1edbc | 697 | * @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall |
AnnaBridge | 171:3a7713b1edbc | 698 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 699 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 700 | */ |
AnnaBridge | 171:3a7713b1edbc | 701 | __STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 702 | { |
AnnaBridge | 171:3a7713b1edbc | 703 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN); |
AnnaBridge | 171:3a7713b1edbc | 704 | } |
AnnaBridge | 171:3a7713b1edbc | 705 | |
AnnaBridge | 171:3a7713b1edbc | 706 | /** |
AnnaBridge | 171:3a7713b1edbc | 707 | * @brief Check if General Call is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 708 | * @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall |
AnnaBridge | 171:3a7713b1edbc | 709 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 710 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 711 | */ |
AnnaBridge | 171:3a7713b1edbc | 712 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 713 | { |
AnnaBridge | 171:3a7713b1edbc | 714 | return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN)); |
AnnaBridge | 171:3a7713b1edbc | 715 | } |
AnnaBridge | 171:3a7713b1edbc | 716 | |
AnnaBridge | 171:3a7713b1edbc | 717 | /** |
AnnaBridge | 171:3a7713b1edbc | 718 | * @brief Configure the Master to operate in 7-bit or 10-bit addressing mode. |
AnnaBridge | 171:3a7713b1edbc | 719 | * @note Changing this bit is not allowed, when the START bit is set. |
AnnaBridge | 171:3a7713b1edbc | 720 | * @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode |
AnnaBridge | 171:3a7713b1edbc | 721 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 722 | * @param AddressingMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 723 | * @arg @ref LL_I2C_ADDRESSING_MODE_7BIT |
AnnaBridge | 171:3a7713b1edbc | 724 | * @arg @ref LL_I2C_ADDRESSING_MODE_10BIT |
AnnaBridge | 171:3a7713b1edbc | 725 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 726 | */ |
AnnaBridge | 171:3a7713b1edbc | 727 | __STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode) |
AnnaBridge | 171:3a7713b1edbc | 728 | { |
AnnaBridge | 171:3a7713b1edbc | 729 | MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode); |
AnnaBridge | 171:3a7713b1edbc | 730 | } |
AnnaBridge | 171:3a7713b1edbc | 731 | |
AnnaBridge | 171:3a7713b1edbc | 732 | /** |
AnnaBridge | 171:3a7713b1edbc | 733 | * @brief Get the Master addressing mode. |
AnnaBridge | 171:3a7713b1edbc | 734 | * @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode |
AnnaBridge | 171:3a7713b1edbc | 735 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 736 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 737 | * @arg @ref LL_I2C_ADDRESSING_MODE_7BIT |
AnnaBridge | 171:3a7713b1edbc | 738 | * @arg @ref LL_I2C_ADDRESSING_MODE_10BIT |
AnnaBridge | 171:3a7713b1edbc | 739 | */ |
AnnaBridge | 171:3a7713b1edbc | 740 | __STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 741 | { |
AnnaBridge | 171:3a7713b1edbc | 742 | return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10)); |
AnnaBridge | 171:3a7713b1edbc | 743 | } |
AnnaBridge | 171:3a7713b1edbc | 744 | |
AnnaBridge | 171:3a7713b1edbc | 745 | /** |
AnnaBridge | 171:3a7713b1edbc | 746 | * @brief Set the Own Address1. |
AnnaBridge | 171:3a7713b1edbc | 747 | * @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n |
AnnaBridge | 171:3a7713b1edbc | 748 | * OAR1 OA1MODE LL_I2C_SetOwnAddress1 |
AnnaBridge | 171:3a7713b1edbc | 749 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 750 | * @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF. |
AnnaBridge | 171:3a7713b1edbc | 751 | * @param OwnAddrSize This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 752 | * @arg @ref LL_I2C_OWNADDRESS1_7BIT |
AnnaBridge | 171:3a7713b1edbc | 753 | * @arg @ref LL_I2C_OWNADDRESS1_10BIT |
AnnaBridge | 171:3a7713b1edbc | 754 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 755 | */ |
AnnaBridge | 171:3a7713b1edbc | 756 | __STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize) |
AnnaBridge | 171:3a7713b1edbc | 757 | { |
AnnaBridge | 171:3a7713b1edbc | 758 | MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize); |
AnnaBridge | 171:3a7713b1edbc | 759 | } |
AnnaBridge | 171:3a7713b1edbc | 760 | |
AnnaBridge | 171:3a7713b1edbc | 761 | /** |
AnnaBridge | 171:3a7713b1edbc | 762 | * @brief Enable acknowledge on Own Address1 match address. |
AnnaBridge | 171:3a7713b1edbc | 763 | * @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1 |
AnnaBridge | 171:3a7713b1edbc | 764 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 765 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 766 | */ |
AnnaBridge | 171:3a7713b1edbc | 767 | __STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 768 | { |
AnnaBridge | 171:3a7713b1edbc | 769 | SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN); |
AnnaBridge | 171:3a7713b1edbc | 770 | } |
AnnaBridge | 171:3a7713b1edbc | 771 | |
AnnaBridge | 171:3a7713b1edbc | 772 | /** |
AnnaBridge | 171:3a7713b1edbc | 773 | * @brief Disable acknowledge on Own Address1 match address. |
AnnaBridge | 171:3a7713b1edbc | 774 | * @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1 |
AnnaBridge | 171:3a7713b1edbc | 775 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 776 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 777 | */ |
AnnaBridge | 171:3a7713b1edbc | 778 | __STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 779 | { |
AnnaBridge | 171:3a7713b1edbc | 780 | CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN); |
AnnaBridge | 171:3a7713b1edbc | 781 | } |
AnnaBridge | 171:3a7713b1edbc | 782 | |
AnnaBridge | 171:3a7713b1edbc | 783 | /** |
AnnaBridge | 171:3a7713b1edbc | 784 | * @brief Check if Own Address1 acknowledge is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 785 | * @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1 |
AnnaBridge | 171:3a7713b1edbc | 786 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 787 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 788 | */ |
AnnaBridge | 171:3a7713b1edbc | 789 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 790 | { |
AnnaBridge | 171:3a7713b1edbc | 791 | return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN)); |
AnnaBridge | 171:3a7713b1edbc | 792 | } |
AnnaBridge | 171:3a7713b1edbc | 793 | |
AnnaBridge | 171:3a7713b1edbc | 794 | /** |
AnnaBridge | 171:3a7713b1edbc | 795 | * @brief Set the 7bits Own Address2. |
AnnaBridge | 171:3a7713b1edbc | 796 | * @note This action has no effect if own address2 is enabled. |
AnnaBridge | 171:3a7713b1edbc | 797 | * @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n |
AnnaBridge | 171:3a7713b1edbc | 798 | * OAR2 OA2MSK LL_I2C_SetOwnAddress2 |
AnnaBridge | 171:3a7713b1edbc | 799 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 800 | * @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F. |
AnnaBridge | 171:3a7713b1edbc | 801 | * @param OwnAddrMask This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 802 | * @arg @ref LL_I2C_OWNADDRESS2_NOMASK |
AnnaBridge | 171:3a7713b1edbc | 803 | * @arg @ref LL_I2C_OWNADDRESS2_MASK01 |
AnnaBridge | 171:3a7713b1edbc | 804 | * @arg @ref LL_I2C_OWNADDRESS2_MASK02 |
AnnaBridge | 171:3a7713b1edbc | 805 | * @arg @ref LL_I2C_OWNADDRESS2_MASK03 |
AnnaBridge | 171:3a7713b1edbc | 806 | * @arg @ref LL_I2C_OWNADDRESS2_MASK04 |
AnnaBridge | 171:3a7713b1edbc | 807 | * @arg @ref LL_I2C_OWNADDRESS2_MASK05 |
AnnaBridge | 171:3a7713b1edbc | 808 | * @arg @ref LL_I2C_OWNADDRESS2_MASK06 |
AnnaBridge | 171:3a7713b1edbc | 809 | * @arg @ref LL_I2C_OWNADDRESS2_MASK07 |
AnnaBridge | 171:3a7713b1edbc | 810 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 811 | */ |
AnnaBridge | 171:3a7713b1edbc | 812 | __STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask) |
AnnaBridge | 171:3a7713b1edbc | 813 | { |
AnnaBridge | 171:3a7713b1edbc | 814 | MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask); |
AnnaBridge | 171:3a7713b1edbc | 815 | } |
AnnaBridge | 171:3a7713b1edbc | 816 | |
AnnaBridge | 171:3a7713b1edbc | 817 | /** |
AnnaBridge | 171:3a7713b1edbc | 818 | * @brief Enable acknowledge on Own Address2 match address. |
AnnaBridge | 171:3a7713b1edbc | 819 | * @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2 |
AnnaBridge | 171:3a7713b1edbc | 820 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 821 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 822 | */ |
AnnaBridge | 171:3a7713b1edbc | 823 | __STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 824 | { |
AnnaBridge | 171:3a7713b1edbc | 825 | SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN); |
AnnaBridge | 171:3a7713b1edbc | 826 | } |
AnnaBridge | 171:3a7713b1edbc | 827 | |
AnnaBridge | 171:3a7713b1edbc | 828 | /** |
AnnaBridge | 171:3a7713b1edbc | 829 | * @brief Disable acknowledge on Own Address2 match address. |
AnnaBridge | 171:3a7713b1edbc | 830 | * @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2 |
AnnaBridge | 171:3a7713b1edbc | 831 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 832 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 833 | */ |
AnnaBridge | 171:3a7713b1edbc | 834 | __STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 835 | { |
AnnaBridge | 171:3a7713b1edbc | 836 | CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN); |
AnnaBridge | 171:3a7713b1edbc | 837 | } |
AnnaBridge | 171:3a7713b1edbc | 838 | |
AnnaBridge | 171:3a7713b1edbc | 839 | /** |
AnnaBridge | 171:3a7713b1edbc | 840 | * @brief Check if Own Address1 acknowledge is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 841 | * @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2 |
AnnaBridge | 171:3a7713b1edbc | 842 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 843 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 844 | */ |
AnnaBridge | 171:3a7713b1edbc | 845 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 846 | { |
AnnaBridge | 171:3a7713b1edbc | 847 | return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN)); |
AnnaBridge | 171:3a7713b1edbc | 848 | } |
AnnaBridge | 171:3a7713b1edbc | 849 | |
AnnaBridge | 171:3a7713b1edbc | 850 | /** |
AnnaBridge | 171:3a7713b1edbc | 851 | * @brief Configure the SDA setup, hold time and the SCL high, low period. |
AnnaBridge | 171:3a7713b1edbc | 852 | * @note This bit can only be programmed when the I2C is disabled (PE = 0). |
AnnaBridge | 171:3a7713b1edbc | 853 | * @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming |
AnnaBridge | 171:3a7713b1edbc | 854 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 855 | * @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF. |
AnnaBridge | 171:3a7713b1edbc | 856 | * @note This parameter is computed with the STM32CubeMX Tool. |
AnnaBridge | 171:3a7713b1edbc | 857 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 858 | */ |
AnnaBridge | 171:3a7713b1edbc | 859 | __STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing) |
AnnaBridge | 171:3a7713b1edbc | 860 | { |
AnnaBridge | 171:3a7713b1edbc | 861 | WRITE_REG(I2Cx->TIMINGR, Timing); |
AnnaBridge | 171:3a7713b1edbc | 862 | } |
AnnaBridge | 171:3a7713b1edbc | 863 | |
AnnaBridge | 171:3a7713b1edbc | 864 | /** |
AnnaBridge | 171:3a7713b1edbc | 865 | * @brief Get the Timing Prescaler setting. |
AnnaBridge | 171:3a7713b1edbc | 866 | * @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler |
AnnaBridge | 171:3a7713b1edbc | 867 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 868 | * @retval Value between Min_Data=0x0 and Max_Data=0xF |
AnnaBridge | 171:3a7713b1edbc | 869 | */ |
AnnaBridge | 171:3a7713b1edbc | 870 | __STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 871 | { |
AnnaBridge | 171:3a7713b1edbc | 872 | return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos); |
AnnaBridge | 171:3a7713b1edbc | 873 | } |
AnnaBridge | 171:3a7713b1edbc | 874 | |
AnnaBridge | 171:3a7713b1edbc | 875 | /** |
AnnaBridge | 171:3a7713b1edbc | 876 | * @brief Get the SCL low period setting. |
AnnaBridge | 171:3a7713b1edbc | 877 | * @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod |
AnnaBridge | 171:3a7713b1edbc | 878 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 879 | * @retval Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 880 | */ |
AnnaBridge | 171:3a7713b1edbc | 881 | __STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 882 | { |
AnnaBridge | 171:3a7713b1edbc | 883 | return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos); |
AnnaBridge | 171:3a7713b1edbc | 884 | } |
AnnaBridge | 171:3a7713b1edbc | 885 | |
AnnaBridge | 171:3a7713b1edbc | 886 | /** |
AnnaBridge | 171:3a7713b1edbc | 887 | * @brief Get the SCL high period setting. |
AnnaBridge | 171:3a7713b1edbc | 888 | * @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod |
AnnaBridge | 171:3a7713b1edbc | 889 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 890 | * @retval Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 891 | */ |
AnnaBridge | 171:3a7713b1edbc | 892 | __STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 893 | { |
AnnaBridge | 171:3a7713b1edbc | 894 | return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos); |
AnnaBridge | 171:3a7713b1edbc | 895 | } |
AnnaBridge | 171:3a7713b1edbc | 896 | |
AnnaBridge | 171:3a7713b1edbc | 897 | /** |
AnnaBridge | 171:3a7713b1edbc | 898 | * @brief Get the SDA hold time. |
AnnaBridge | 171:3a7713b1edbc | 899 | * @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime |
AnnaBridge | 171:3a7713b1edbc | 900 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 901 | * @retval Value between Min_Data=0x0 and Max_Data=0xF |
AnnaBridge | 171:3a7713b1edbc | 902 | */ |
AnnaBridge | 171:3a7713b1edbc | 903 | __STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 904 | { |
AnnaBridge | 171:3a7713b1edbc | 905 | return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos); |
AnnaBridge | 171:3a7713b1edbc | 906 | } |
AnnaBridge | 171:3a7713b1edbc | 907 | |
AnnaBridge | 171:3a7713b1edbc | 908 | /** |
AnnaBridge | 171:3a7713b1edbc | 909 | * @brief Get the SDA setup time. |
AnnaBridge | 171:3a7713b1edbc | 910 | * @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime |
AnnaBridge | 171:3a7713b1edbc | 911 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 912 | * @retval Value between Min_Data=0x0 and Max_Data=0xF |
AnnaBridge | 171:3a7713b1edbc | 913 | */ |
AnnaBridge | 171:3a7713b1edbc | 914 | __STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 915 | { |
AnnaBridge | 171:3a7713b1edbc | 916 | return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos); |
AnnaBridge | 171:3a7713b1edbc | 917 | } |
AnnaBridge | 171:3a7713b1edbc | 918 | |
AnnaBridge | 171:3a7713b1edbc | 919 | /** |
AnnaBridge | 171:3a7713b1edbc | 920 | * @brief Configure peripheral mode. |
AnnaBridge | 171:3a7713b1edbc | 921 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 922 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 923 | * @rmtoll CR1 SMBHEN LL_I2C_SetMode\n |
AnnaBridge | 171:3a7713b1edbc | 924 | * CR1 SMBDEN LL_I2C_SetMode |
AnnaBridge | 171:3a7713b1edbc | 925 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 926 | * @param PeripheralMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 927 | * @arg @ref LL_I2C_MODE_I2C |
AnnaBridge | 171:3a7713b1edbc | 928 | * @arg @ref LL_I2C_MODE_SMBUS_HOST |
AnnaBridge | 171:3a7713b1edbc | 929 | * @arg @ref LL_I2C_MODE_SMBUS_DEVICE |
AnnaBridge | 171:3a7713b1edbc | 930 | * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP |
AnnaBridge | 171:3a7713b1edbc | 931 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 932 | */ |
AnnaBridge | 171:3a7713b1edbc | 933 | __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode) |
AnnaBridge | 171:3a7713b1edbc | 934 | { |
AnnaBridge | 171:3a7713b1edbc | 935 | MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode); |
AnnaBridge | 171:3a7713b1edbc | 936 | } |
AnnaBridge | 171:3a7713b1edbc | 937 | |
AnnaBridge | 171:3a7713b1edbc | 938 | /** |
AnnaBridge | 171:3a7713b1edbc | 939 | * @brief Get peripheral mode. |
AnnaBridge | 171:3a7713b1edbc | 940 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 941 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 942 | * @rmtoll CR1 SMBHEN LL_I2C_GetMode\n |
AnnaBridge | 171:3a7713b1edbc | 943 | * CR1 SMBDEN LL_I2C_GetMode |
AnnaBridge | 171:3a7713b1edbc | 944 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 945 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 946 | * @arg @ref LL_I2C_MODE_I2C |
AnnaBridge | 171:3a7713b1edbc | 947 | * @arg @ref LL_I2C_MODE_SMBUS_HOST |
AnnaBridge | 171:3a7713b1edbc | 948 | * @arg @ref LL_I2C_MODE_SMBUS_DEVICE |
AnnaBridge | 171:3a7713b1edbc | 949 | * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP |
AnnaBridge | 171:3a7713b1edbc | 950 | */ |
AnnaBridge | 171:3a7713b1edbc | 951 | __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 952 | { |
AnnaBridge | 171:3a7713b1edbc | 953 | return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN)); |
AnnaBridge | 171:3a7713b1edbc | 954 | } |
AnnaBridge | 171:3a7713b1edbc | 955 | |
AnnaBridge | 171:3a7713b1edbc | 956 | /** |
AnnaBridge | 171:3a7713b1edbc | 957 | * @brief Enable SMBus alert (Host or Device mode) |
AnnaBridge | 171:3a7713b1edbc | 958 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 959 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 960 | * @note SMBus Device mode: |
AnnaBridge | 171:3a7713b1edbc | 961 | * - SMBus Alert pin is drived low and |
AnnaBridge | 171:3a7713b1edbc | 962 | * Alert Response Address Header acknowledge is enabled. |
AnnaBridge | 171:3a7713b1edbc | 963 | * SMBus Host mode: |
AnnaBridge | 171:3a7713b1edbc | 964 | * - SMBus Alert pin management is supported. |
AnnaBridge | 171:3a7713b1edbc | 965 | * @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert |
AnnaBridge | 171:3a7713b1edbc | 966 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 967 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 968 | */ |
AnnaBridge | 171:3a7713b1edbc | 969 | __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 970 | { |
AnnaBridge | 171:3a7713b1edbc | 971 | SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN); |
AnnaBridge | 171:3a7713b1edbc | 972 | } |
AnnaBridge | 171:3a7713b1edbc | 973 | |
AnnaBridge | 171:3a7713b1edbc | 974 | /** |
AnnaBridge | 171:3a7713b1edbc | 975 | * @brief Disable SMBus alert (Host or Device mode) |
AnnaBridge | 171:3a7713b1edbc | 976 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 977 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 978 | * @note SMBus Device mode: |
AnnaBridge | 171:3a7713b1edbc | 979 | * - SMBus Alert pin is not drived (can be used as a standard GPIO) and |
AnnaBridge | 171:3a7713b1edbc | 980 | * Alert Response Address Header acknowledge is disabled. |
AnnaBridge | 171:3a7713b1edbc | 981 | * SMBus Host mode: |
AnnaBridge | 171:3a7713b1edbc | 982 | * - SMBus Alert pin management is not supported. |
AnnaBridge | 171:3a7713b1edbc | 983 | * @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert |
AnnaBridge | 171:3a7713b1edbc | 984 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 985 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 986 | */ |
AnnaBridge | 171:3a7713b1edbc | 987 | __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 988 | { |
AnnaBridge | 171:3a7713b1edbc | 989 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN); |
AnnaBridge | 171:3a7713b1edbc | 990 | } |
AnnaBridge | 171:3a7713b1edbc | 991 | |
AnnaBridge | 171:3a7713b1edbc | 992 | /** |
AnnaBridge | 171:3a7713b1edbc | 993 | * @brief Check if SMBus alert (Host or Device mode) is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 994 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 995 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 996 | * @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert |
AnnaBridge | 171:3a7713b1edbc | 997 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 998 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 999 | */ |
AnnaBridge | 171:3a7713b1edbc | 1000 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1001 | { |
AnnaBridge | 171:3a7713b1edbc | 1002 | return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN)); |
AnnaBridge | 171:3a7713b1edbc | 1003 | } |
AnnaBridge | 171:3a7713b1edbc | 1004 | |
AnnaBridge | 171:3a7713b1edbc | 1005 | /** |
AnnaBridge | 171:3a7713b1edbc | 1006 | * @brief Enable SMBus Packet Error Calculation (PEC). |
AnnaBridge | 171:3a7713b1edbc | 1007 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1008 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1009 | * @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC |
AnnaBridge | 171:3a7713b1edbc | 1010 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1011 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1012 | */ |
AnnaBridge | 171:3a7713b1edbc | 1013 | __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1014 | { |
AnnaBridge | 171:3a7713b1edbc | 1015 | SET_BIT(I2Cx->CR1, I2C_CR1_PECEN); |
AnnaBridge | 171:3a7713b1edbc | 1016 | } |
AnnaBridge | 171:3a7713b1edbc | 1017 | |
AnnaBridge | 171:3a7713b1edbc | 1018 | /** |
AnnaBridge | 171:3a7713b1edbc | 1019 | * @brief Disable SMBus Packet Error Calculation (PEC). |
AnnaBridge | 171:3a7713b1edbc | 1020 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1021 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1022 | * @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC |
AnnaBridge | 171:3a7713b1edbc | 1023 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1024 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1025 | */ |
AnnaBridge | 171:3a7713b1edbc | 1026 | __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1027 | { |
AnnaBridge | 171:3a7713b1edbc | 1028 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN); |
AnnaBridge | 171:3a7713b1edbc | 1029 | } |
AnnaBridge | 171:3a7713b1edbc | 1030 | |
AnnaBridge | 171:3a7713b1edbc | 1031 | /** |
AnnaBridge | 171:3a7713b1edbc | 1032 | * @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1033 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1034 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1035 | * @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC |
AnnaBridge | 171:3a7713b1edbc | 1036 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1037 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1038 | */ |
AnnaBridge | 171:3a7713b1edbc | 1039 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1040 | { |
AnnaBridge | 171:3a7713b1edbc | 1041 | return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN)); |
AnnaBridge | 171:3a7713b1edbc | 1042 | } |
AnnaBridge | 171:3a7713b1edbc | 1043 | |
AnnaBridge | 171:3a7713b1edbc | 1044 | /** |
AnnaBridge | 171:3a7713b1edbc | 1045 | * @brief Configure the SMBus Clock Timeout. |
AnnaBridge | 171:3a7713b1edbc | 1046 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1047 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1048 | * @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB). |
AnnaBridge | 171:3a7713b1edbc | 1049 | * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n |
AnnaBridge | 171:3a7713b1edbc | 1050 | * TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n |
AnnaBridge | 171:3a7713b1edbc | 1051 | * TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout |
AnnaBridge | 171:3a7713b1edbc | 1052 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1053 | * @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF. |
AnnaBridge | 171:3a7713b1edbc | 1054 | * @param TimeoutAMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1055 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW |
AnnaBridge | 171:3a7713b1edbc | 1056 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH |
AnnaBridge | 171:3a7713b1edbc | 1057 | * @param TimeoutB |
AnnaBridge | 171:3a7713b1edbc | 1058 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1059 | */ |
AnnaBridge | 171:3a7713b1edbc | 1060 | __STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode, |
AnnaBridge | 171:3a7713b1edbc | 1061 | uint32_t TimeoutB) |
AnnaBridge | 171:3a7713b1edbc | 1062 | { |
AnnaBridge | 171:3a7713b1edbc | 1063 | MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA | I2C_TIMEOUTR_TIDLE | I2C_TIMEOUTR_TIMEOUTB, |
AnnaBridge | 171:3a7713b1edbc | 1064 | TimeoutA | TimeoutAMode | (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1065 | } |
AnnaBridge | 171:3a7713b1edbc | 1066 | |
AnnaBridge | 171:3a7713b1edbc | 1067 | /** |
AnnaBridge | 171:3a7713b1edbc | 1068 | * @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode). |
AnnaBridge | 171:3a7713b1edbc | 1069 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1070 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1071 | * @note These bits can only be programmed when TimeoutA is disabled. |
AnnaBridge | 171:3a7713b1edbc | 1072 | * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA |
AnnaBridge | 171:3a7713b1edbc | 1073 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1074 | * @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF. |
AnnaBridge | 171:3a7713b1edbc | 1075 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1076 | */ |
AnnaBridge | 171:3a7713b1edbc | 1077 | __STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA) |
AnnaBridge | 171:3a7713b1edbc | 1078 | { |
AnnaBridge | 171:3a7713b1edbc | 1079 | WRITE_REG(I2Cx->TIMEOUTR, TimeoutA); |
AnnaBridge | 171:3a7713b1edbc | 1080 | } |
AnnaBridge | 171:3a7713b1edbc | 1081 | |
AnnaBridge | 171:3a7713b1edbc | 1082 | /** |
AnnaBridge | 171:3a7713b1edbc | 1083 | * @brief Get the SMBus Clock TimeoutA setting. |
AnnaBridge | 171:3a7713b1edbc | 1084 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1085 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1086 | * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA |
AnnaBridge | 171:3a7713b1edbc | 1087 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1088 | * @retval Value between Min_Data=0 and Max_Data=0xFFF |
AnnaBridge | 171:3a7713b1edbc | 1089 | */ |
AnnaBridge | 171:3a7713b1edbc | 1090 | __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1091 | { |
AnnaBridge | 171:3a7713b1edbc | 1092 | return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA)); |
AnnaBridge | 171:3a7713b1edbc | 1093 | } |
AnnaBridge | 171:3a7713b1edbc | 1094 | |
AnnaBridge | 171:3a7713b1edbc | 1095 | /** |
AnnaBridge | 171:3a7713b1edbc | 1096 | * @brief Set the SMBus Clock TimeoutA mode. |
AnnaBridge | 171:3a7713b1edbc | 1097 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1098 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1099 | * @note This bit can only be programmed when TimeoutA is disabled. |
AnnaBridge | 171:3a7713b1edbc | 1100 | * @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode |
AnnaBridge | 171:3a7713b1edbc | 1101 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1102 | * @param TimeoutAMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1103 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW |
AnnaBridge | 171:3a7713b1edbc | 1104 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH |
AnnaBridge | 171:3a7713b1edbc | 1105 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1106 | */ |
AnnaBridge | 171:3a7713b1edbc | 1107 | __STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode) |
AnnaBridge | 171:3a7713b1edbc | 1108 | { |
AnnaBridge | 171:3a7713b1edbc | 1109 | WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode); |
AnnaBridge | 171:3a7713b1edbc | 1110 | } |
AnnaBridge | 171:3a7713b1edbc | 1111 | |
AnnaBridge | 171:3a7713b1edbc | 1112 | /** |
AnnaBridge | 171:3a7713b1edbc | 1113 | * @brief Get the SMBus Clock TimeoutA mode. |
AnnaBridge | 171:3a7713b1edbc | 1114 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1115 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1116 | * @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode |
AnnaBridge | 171:3a7713b1edbc | 1117 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1118 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1119 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW |
AnnaBridge | 171:3a7713b1edbc | 1120 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH |
AnnaBridge | 171:3a7713b1edbc | 1121 | */ |
AnnaBridge | 171:3a7713b1edbc | 1122 | __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1123 | { |
AnnaBridge | 171:3a7713b1edbc | 1124 | return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE)); |
AnnaBridge | 171:3a7713b1edbc | 1125 | } |
AnnaBridge | 171:3a7713b1edbc | 1126 | |
AnnaBridge | 171:3a7713b1edbc | 1127 | /** |
AnnaBridge | 171:3a7713b1edbc | 1128 | * @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode). |
AnnaBridge | 171:3a7713b1edbc | 1129 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1130 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1131 | * @note These bits can only be programmed when TimeoutB is disabled. |
AnnaBridge | 171:3a7713b1edbc | 1132 | * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB |
AnnaBridge | 171:3a7713b1edbc | 1133 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1134 | * @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF. |
AnnaBridge | 171:3a7713b1edbc | 1135 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1136 | */ |
AnnaBridge | 171:3a7713b1edbc | 1137 | __STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB) |
AnnaBridge | 171:3a7713b1edbc | 1138 | { |
AnnaBridge | 171:3a7713b1edbc | 1139 | WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1140 | } |
AnnaBridge | 171:3a7713b1edbc | 1141 | |
AnnaBridge | 171:3a7713b1edbc | 1142 | /** |
AnnaBridge | 171:3a7713b1edbc | 1143 | * @brief Get the SMBus Extented Cumulative Clock TimeoutB setting. |
AnnaBridge | 171:3a7713b1edbc | 1144 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1145 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1146 | * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB |
AnnaBridge | 171:3a7713b1edbc | 1147 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1148 | * @retval Value between Min_Data=0 and Max_Data=0xFFF |
AnnaBridge | 171:3a7713b1edbc | 1149 | */ |
AnnaBridge | 171:3a7713b1edbc | 1150 | __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1151 | { |
AnnaBridge | 171:3a7713b1edbc | 1152 | return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1153 | } |
AnnaBridge | 171:3a7713b1edbc | 1154 | |
AnnaBridge | 171:3a7713b1edbc | 1155 | /** |
AnnaBridge | 171:3a7713b1edbc | 1156 | * @brief Enable the SMBus Clock Timeout. |
AnnaBridge | 171:3a7713b1edbc | 1157 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1158 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1159 | * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n |
AnnaBridge | 171:3a7713b1edbc | 1160 | * TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout |
AnnaBridge | 171:3a7713b1edbc | 1161 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1162 | * @param ClockTimeout This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1163 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA |
AnnaBridge | 171:3a7713b1edbc | 1164 | * @arg @ref LL_I2C_SMBUS_TIMEOUTB |
AnnaBridge | 171:3a7713b1edbc | 1165 | * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT |
AnnaBridge | 171:3a7713b1edbc | 1166 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1167 | */ |
AnnaBridge | 171:3a7713b1edbc | 1168 | __STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout) |
AnnaBridge | 171:3a7713b1edbc | 1169 | { |
AnnaBridge | 171:3a7713b1edbc | 1170 | SET_BIT(I2Cx->TIMEOUTR, ClockTimeout); |
AnnaBridge | 171:3a7713b1edbc | 1171 | } |
AnnaBridge | 171:3a7713b1edbc | 1172 | |
AnnaBridge | 171:3a7713b1edbc | 1173 | /** |
AnnaBridge | 171:3a7713b1edbc | 1174 | * @brief Disable the SMBus Clock Timeout. |
AnnaBridge | 171:3a7713b1edbc | 1175 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1176 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1177 | * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n |
AnnaBridge | 171:3a7713b1edbc | 1178 | * TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout |
AnnaBridge | 171:3a7713b1edbc | 1179 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1180 | * @param ClockTimeout This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1181 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA |
AnnaBridge | 171:3a7713b1edbc | 1182 | * @arg @ref LL_I2C_SMBUS_TIMEOUTB |
AnnaBridge | 171:3a7713b1edbc | 1183 | * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT |
AnnaBridge | 171:3a7713b1edbc | 1184 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1185 | */ |
AnnaBridge | 171:3a7713b1edbc | 1186 | __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout) |
AnnaBridge | 171:3a7713b1edbc | 1187 | { |
AnnaBridge | 171:3a7713b1edbc | 1188 | CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout); |
AnnaBridge | 171:3a7713b1edbc | 1189 | } |
AnnaBridge | 171:3a7713b1edbc | 1190 | |
AnnaBridge | 171:3a7713b1edbc | 1191 | /** |
AnnaBridge | 171:3a7713b1edbc | 1192 | * @brief Check if the SMBus Clock Timeout is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1193 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1194 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1195 | * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n |
AnnaBridge | 171:3a7713b1edbc | 1196 | * TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout |
AnnaBridge | 171:3a7713b1edbc | 1197 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1198 | * @param ClockTimeout This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1199 | * @arg @ref LL_I2C_SMBUS_TIMEOUTA |
AnnaBridge | 171:3a7713b1edbc | 1200 | * @arg @ref LL_I2C_SMBUS_TIMEOUTB |
AnnaBridge | 171:3a7713b1edbc | 1201 | * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT |
AnnaBridge | 171:3a7713b1edbc | 1202 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1203 | */ |
AnnaBridge | 171:3a7713b1edbc | 1204 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout) |
AnnaBridge | 171:3a7713b1edbc | 1205 | { |
AnnaBridge | 171:3a7713b1edbc | 1206 | return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout)); |
AnnaBridge | 171:3a7713b1edbc | 1207 | } |
AnnaBridge | 171:3a7713b1edbc | 1208 | |
AnnaBridge | 171:3a7713b1edbc | 1209 | /** |
AnnaBridge | 171:3a7713b1edbc | 1210 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1211 | */ |
AnnaBridge | 171:3a7713b1edbc | 1212 | |
AnnaBridge | 171:3a7713b1edbc | 1213 | /** @defgroup I2C_LL_EF_IT_Management IT_Management |
AnnaBridge | 171:3a7713b1edbc | 1214 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 1215 | */ |
AnnaBridge | 171:3a7713b1edbc | 1216 | |
AnnaBridge | 171:3a7713b1edbc | 1217 | /** |
AnnaBridge | 171:3a7713b1edbc | 1218 | * @brief Enable TXIS interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1219 | * @rmtoll CR1 TXIE LL_I2C_EnableIT_TX |
AnnaBridge | 171:3a7713b1edbc | 1220 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1221 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1222 | */ |
AnnaBridge | 171:3a7713b1edbc | 1223 | __STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1224 | { |
AnnaBridge | 171:3a7713b1edbc | 1225 | SET_BIT(I2Cx->CR1, I2C_CR1_TXIE); |
AnnaBridge | 171:3a7713b1edbc | 1226 | } |
AnnaBridge | 171:3a7713b1edbc | 1227 | |
AnnaBridge | 171:3a7713b1edbc | 1228 | /** |
AnnaBridge | 171:3a7713b1edbc | 1229 | * @brief Disable TXIS interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1230 | * @rmtoll CR1 TXIE LL_I2C_DisableIT_TX |
AnnaBridge | 171:3a7713b1edbc | 1231 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1232 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1233 | */ |
AnnaBridge | 171:3a7713b1edbc | 1234 | __STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1235 | { |
AnnaBridge | 171:3a7713b1edbc | 1236 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE); |
AnnaBridge | 171:3a7713b1edbc | 1237 | } |
AnnaBridge | 171:3a7713b1edbc | 1238 | |
AnnaBridge | 171:3a7713b1edbc | 1239 | /** |
AnnaBridge | 171:3a7713b1edbc | 1240 | * @brief Check if the TXIS Interrupt is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1241 | * @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX |
AnnaBridge | 171:3a7713b1edbc | 1242 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1243 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1244 | */ |
AnnaBridge | 171:3a7713b1edbc | 1245 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1246 | { |
AnnaBridge | 171:3a7713b1edbc | 1247 | return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE)); |
AnnaBridge | 171:3a7713b1edbc | 1248 | } |
AnnaBridge | 171:3a7713b1edbc | 1249 | |
AnnaBridge | 171:3a7713b1edbc | 1250 | /** |
AnnaBridge | 171:3a7713b1edbc | 1251 | * @brief Enable RXNE interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1252 | * @rmtoll CR1 RXIE LL_I2C_EnableIT_RX |
AnnaBridge | 171:3a7713b1edbc | 1253 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1254 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1255 | */ |
AnnaBridge | 171:3a7713b1edbc | 1256 | __STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1257 | { |
AnnaBridge | 171:3a7713b1edbc | 1258 | SET_BIT(I2Cx->CR1, I2C_CR1_RXIE); |
AnnaBridge | 171:3a7713b1edbc | 1259 | } |
AnnaBridge | 171:3a7713b1edbc | 1260 | |
AnnaBridge | 171:3a7713b1edbc | 1261 | /** |
AnnaBridge | 171:3a7713b1edbc | 1262 | * @brief Disable RXNE interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1263 | * @rmtoll CR1 RXIE LL_I2C_DisableIT_RX |
AnnaBridge | 171:3a7713b1edbc | 1264 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1265 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1266 | */ |
AnnaBridge | 171:3a7713b1edbc | 1267 | __STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1268 | { |
AnnaBridge | 171:3a7713b1edbc | 1269 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE); |
AnnaBridge | 171:3a7713b1edbc | 1270 | } |
AnnaBridge | 171:3a7713b1edbc | 1271 | |
AnnaBridge | 171:3a7713b1edbc | 1272 | /** |
AnnaBridge | 171:3a7713b1edbc | 1273 | * @brief Check if the RXNE Interrupt is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1274 | * @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX |
AnnaBridge | 171:3a7713b1edbc | 1275 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1276 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1277 | */ |
AnnaBridge | 171:3a7713b1edbc | 1278 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1279 | { |
AnnaBridge | 171:3a7713b1edbc | 1280 | return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE)); |
AnnaBridge | 171:3a7713b1edbc | 1281 | } |
AnnaBridge | 171:3a7713b1edbc | 1282 | |
AnnaBridge | 171:3a7713b1edbc | 1283 | /** |
AnnaBridge | 171:3a7713b1edbc | 1284 | * @brief Enable Address match interrupt (slave mode only). |
AnnaBridge | 171:3a7713b1edbc | 1285 | * @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR |
AnnaBridge | 171:3a7713b1edbc | 1286 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1287 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1288 | */ |
AnnaBridge | 171:3a7713b1edbc | 1289 | __STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1290 | { |
AnnaBridge | 171:3a7713b1edbc | 1291 | SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); |
AnnaBridge | 171:3a7713b1edbc | 1292 | } |
AnnaBridge | 171:3a7713b1edbc | 1293 | |
AnnaBridge | 171:3a7713b1edbc | 1294 | /** |
AnnaBridge | 171:3a7713b1edbc | 1295 | * @brief Disable Address match interrupt (slave mode only). |
AnnaBridge | 171:3a7713b1edbc | 1296 | * @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR |
AnnaBridge | 171:3a7713b1edbc | 1297 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1298 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1299 | */ |
AnnaBridge | 171:3a7713b1edbc | 1300 | __STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1301 | { |
AnnaBridge | 171:3a7713b1edbc | 1302 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE); |
AnnaBridge | 171:3a7713b1edbc | 1303 | } |
AnnaBridge | 171:3a7713b1edbc | 1304 | |
AnnaBridge | 171:3a7713b1edbc | 1305 | /** |
AnnaBridge | 171:3a7713b1edbc | 1306 | * @brief Check if Address match interrupt is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1307 | * @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR |
AnnaBridge | 171:3a7713b1edbc | 1308 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1309 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1310 | */ |
AnnaBridge | 171:3a7713b1edbc | 1311 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1312 | { |
AnnaBridge | 171:3a7713b1edbc | 1313 | return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE)); |
AnnaBridge | 171:3a7713b1edbc | 1314 | } |
AnnaBridge | 171:3a7713b1edbc | 1315 | |
AnnaBridge | 171:3a7713b1edbc | 1316 | /** |
AnnaBridge | 171:3a7713b1edbc | 1317 | * @brief Enable Not acknowledge received interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1318 | * @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK |
AnnaBridge | 171:3a7713b1edbc | 1319 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1320 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1321 | */ |
AnnaBridge | 171:3a7713b1edbc | 1322 | __STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1323 | { |
AnnaBridge | 171:3a7713b1edbc | 1324 | SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE); |
AnnaBridge | 171:3a7713b1edbc | 1325 | } |
AnnaBridge | 171:3a7713b1edbc | 1326 | |
AnnaBridge | 171:3a7713b1edbc | 1327 | /** |
AnnaBridge | 171:3a7713b1edbc | 1328 | * @brief Disable Not acknowledge received interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1329 | * @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK |
AnnaBridge | 171:3a7713b1edbc | 1330 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1331 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1332 | */ |
AnnaBridge | 171:3a7713b1edbc | 1333 | __STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1334 | { |
AnnaBridge | 171:3a7713b1edbc | 1335 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE); |
AnnaBridge | 171:3a7713b1edbc | 1336 | } |
AnnaBridge | 171:3a7713b1edbc | 1337 | |
AnnaBridge | 171:3a7713b1edbc | 1338 | /** |
AnnaBridge | 171:3a7713b1edbc | 1339 | * @brief Check if Not acknowledge received interrupt is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1340 | * @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK |
AnnaBridge | 171:3a7713b1edbc | 1341 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1342 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1343 | */ |
AnnaBridge | 171:3a7713b1edbc | 1344 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1345 | { |
AnnaBridge | 171:3a7713b1edbc | 1346 | return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE)); |
AnnaBridge | 171:3a7713b1edbc | 1347 | } |
AnnaBridge | 171:3a7713b1edbc | 1348 | |
AnnaBridge | 171:3a7713b1edbc | 1349 | /** |
AnnaBridge | 171:3a7713b1edbc | 1350 | * @brief Enable STOP detection interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1351 | * @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP |
AnnaBridge | 171:3a7713b1edbc | 1352 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1353 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1354 | */ |
AnnaBridge | 171:3a7713b1edbc | 1355 | __STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1356 | { |
AnnaBridge | 171:3a7713b1edbc | 1357 | SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE); |
AnnaBridge | 171:3a7713b1edbc | 1358 | } |
AnnaBridge | 171:3a7713b1edbc | 1359 | |
AnnaBridge | 171:3a7713b1edbc | 1360 | /** |
AnnaBridge | 171:3a7713b1edbc | 1361 | * @brief Disable STOP detection interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1362 | * @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP |
AnnaBridge | 171:3a7713b1edbc | 1363 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1364 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1365 | */ |
AnnaBridge | 171:3a7713b1edbc | 1366 | __STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1367 | { |
AnnaBridge | 171:3a7713b1edbc | 1368 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE); |
AnnaBridge | 171:3a7713b1edbc | 1369 | } |
AnnaBridge | 171:3a7713b1edbc | 1370 | |
AnnaBridge | 171:3a7713b1edbc | 1371 | /** |
AnnaBridge | 171:3a7713b1edbc | 1372 | * @brief Check if STOP detection interrupt is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1373 | * @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP |
AnnaBridge | 171:3a7713b1edbc | 1374 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1375 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1376 | */ |
AnnaBridge | 171:3a7713b1edbc | 1377 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1378 | { |
AnnaBridge | 171:3a7713b1edbc | 1379 | return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE)); |
AnnaBridge | 171:3a7713b1edbc | 1380 | } |
AnnaBridge | 171:3a7713b1edbc | 1381 | |
AnnaBridge | 171:3a7713b1edbc | 1382 | /** |
AnnaBridge | 171:3a7713b1edbc | 1383 | * @brief Enable Transfer Complete interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1384 | * @note Any of these events will generate interrupt : |
AnnaBridge | 171:3a7713b1edbc | 1385 | * Transfer Complete (TC) |
AnnaBridge | 171:3a7713b1edbc | 1386 | * Transfer Complete Reload (TCR) |
AnnaBridge | 171:3a7713b1edbc | 1387 | * @rmtoll CR1 TCIE LL_I2C_EnableIT_TC |
AnnaBridge | 171:3a7713b1edbc | 1388 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1389 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1390 | */ |
AnnaBridge | 171:3a7713b1edbc | 1391 | __STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1392 | { |
AnnaBridge | 171:3a7713b1edbc | 1393 | SET_BIT(I2Cx->CR1, I2C_CR1_TCIE); |
AnnaBridge | 171:3a7713b1edbc | 1394 | } |
AnnaBridge | 171:3a7713b1edbc | 1395 | |
AnnaBridge | 171:3a7713b1edbc | 1396 | /** |
AnnaBridge | 171:3a7713b1edbc | 1397 | * @brief Disable Transfer Complete interrupt. |
AnnaBridge | 171:3a7713b1edbc | 1398 | * @note Any of these events will generate interrupt : |
AnnaBridge | 171:3a7713b1edbc | 1399 | * Transfer Complete (TC) |
AnnaBridge | 171:3a7713b1edbc | 1400 | * Transfer Complete Reload (TCR) |
AnnaBridge | 171:3a7713b1edbc | 1401 | * @rmtoll CR1 TCIE LL_I2C_DisableIT_TC |
AnnaBridge | 171:3a7713b1edbc | 1402 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1403 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1404 | */ |
AnnaBridge | 171:3a7713b1edbc | 1405 | __STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1406 | { |
AnnaBridge | 171:3a7713b1edbc | 1407 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE); |
AnnaBridge | 171:3a7713b1edbc | 1408 | } |
AnnaBridge | 171:3a7713b1edbc | 1409 | |
AnnaBridge | 171:3a7713b1edbc | 1410 | /** |
AnnaBridge | 171:3a7713b1edbc | 1411 | * @brief Check if Transfer Complete interrupt is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1412 | * @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC |
AnnaBridge | 171:3a7713b1edbc | 1413 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1414 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1415 | */ |
AnnaBridge | 171:3a7713b1edbc | 1416 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1417 | { |
AnnaBridge | 171:3a7713b1edbc | 1418 | return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE)); |
AnnaBridge | 171:3a7713b1edbc | 1419 | } |
AnnaBridge | 171:3a7713b1edbc | 1420 | |
AnnaBridge | 171:3a7713b1edbc | 1421 | /** |
AnnaBridge | 171:3a7713b1edbc | 1422 | * @brief Enable Error interrupts. |
AnnaBridge | 171:3a7713b1edbc | 1423 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1424 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1425 | * @note Any of these errors will generate interrupt : |
AnnaBridge | 171:3a7713b1edbc | 1426 | * Arbitration Loss (ARLO) |
AnnaBridge | 171:3a7713b1edbc | 1427 | * Bus Error detection (BERR) |
AnnaBridge | 171:3a7713b1edbc | 1428 | * Overrun/Underrun (OVR) |
AnnaBridge | 171:3a7713b1edbc | 1429 | * SMBus Timeout detection (TIMEOUT) |
AnnaBridge | 171:3a7713b1edbc | 1430 | * SMBus PEC error detection (PECERR) |
AnnaBridge | 171:3a7713b1edbc | 1431 | * SMBus Alert pin event detection (ALERT) |
AnnaBridge | 171:3a7713b1edbc | 1432 | * @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR |
AnnaBridge | 171:3a7713b1edbc | 1433 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1434 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1435 | */ |
AnnaBridge | 171:3a7713b1edbc | 1436 | __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1437 | { |
AnnaBridge | 171:3a7713b1edbc | 1438 | SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE); |
AnnaBridge | 171:3a7713b1edbc | 1439 | } |
AnnaBridge | 171:3a7713b1edbc | 1440 | |
AnnaBridge | 171:3a7713b1edbc | 1441 | /** |
AnnaBridge | 171:3a7713b1edbc | 1442 | * @brief Disable Error interrupts. |
AnnaBridge | 171:3a7713b1edbc | 1443 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1444 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1445 | * @note Any of these errors will generate interrupt : |
AnnaBridge | 171:3a7713b1edbc | 1446 | * Arbitration Loss (ARLO) |
AnnaBridge | 171:3a7713b1edbc | 1447 | * Bus Error detection (BERR) |
AnnaBridge | 171:3a7713b1edbc | 1448 | * Overrun/Underrun (OVR) |
AnnaBridge | 171:3a7713b1edbc | 1449 | * SMBus Timeout detection (TIMEOUT) |
AnnaBridge | 171:3a7713b1edbc | 1450 | * SMBus PEC error detection (PECERR) |
AnnaBridge | 171:3a7713b1edbc | 1451 | * SMBus Alert pin event detection (ALERT) |
AnnaBridge | 171:3a7713b1edbc | 1452 | * @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR |
AnnaBridge | 171:3a7713b1edbc | 1453 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1454 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1455 | */ |
AnnaBridge | 171:3a7713b1edbc | 1456 | __STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1457 | { |
AnnaBridge | 171:3a7713b1edbc | 1458 | CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE); |
AnnaBridge | 171:3a7713b1edbc | 1459 | } |
AnnaBridge | 171:3a7713b1edbc | 1460 | |
AnnaBridge | 171:3a7713b1edbc | 1461 | /** |
AnnaBridge | 171:3a7713b1edbc | 1462 | * @brief Check if Error interrupts are enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1463 | * @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR |
AnnaBridge | 171:3a7713b1edbc | 1464 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1465 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1466 | */ |
AnnaBridge | 171:3a7713b1edbc | 1467 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1468 | { |
AnnaBridge | 171:3a7713b1edbc | 1469 | return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE)); |
AnnaBridge | 171:3a7713b1edbc | 1470 | } |
AnnaBridge | 171:3a7713b1edbc | 1471 | |
AnnaBridge | 171:3a7713b1edbc | 1472 | /** |
AnnaBridge | 171:3a7713b1edbc | 1473 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1474 | */ |
AnnaBridge | 171:3a7713b1edbc | 1475 | |
AnnaBridge | 171:3a7713b1edbc | 1476 | /** @defgroup I2C_LL_EF_FLAG_management FLAG_management |
AnnaBridge | 171:3a7713b1edbc | 1477 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 1478 | */ |
AnnaBridge | 171:3a7713b1edbc | 1479 | |
AnnaBridge | 171:3a7713b1edbc | 1480 | /** |
AnnaBridge | 171:3a7713b1edbc | 1481 | * @brief Indicate the status of Transmit data register empty flag. |
AnnaBridge | 171:3a7713b1edbc | 1482 | * @note RESET: When next data is written in Transmit data register. |
AnnaBridge | 171:3a7713b1edbc | 1483 | * SET: When Transmit data register is empty. |
AnnaBridge | 171:3a7713b1edbc | 1484 | * @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE |
AnnaBridge | 171:3a7713b1edbc | 1485 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1486 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1487 | */ |
AnnaBridge | 171:3a7713b1edbc | 1488 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1489 | { |
AnnaBridge | 171:3a7713b1edbc | 1490 | return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE)); |
AnnaBridge | 171:3a7713b1edbc | 1491 | } |
AnnaBridge | 171:3a7713b1edbc | 1492 | |
AnnaBridge | 171:3a7713b1edbc | 1493 | /** |
AnnaBridge | 171:3a7713b1edbc | 1494 | * @brief Indicate the status of Transmit interrupt flag. |
AnnaBridge | 171:3a7713b1edbc | 1495 | * @note RESET: When next data is written in Transmit data register. |
AnnaBridge | 171:3a7713b1edbc | 1496 | * SET: When Transmit data register is empty. |
AnnaBridge | 171:3a7713b1edbc | 1497 | * @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS |
AnnaBridge | 171:3a7713b1edbc | 1498 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1499 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1500 | */ |
AnnaBridge | 171:3a7713b1edbc | 1501 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1502 | { |
AnnaBridge | 171:3a7713b1edbc | 1503 | return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS)); |
AnnaBridge | 171:3a7713b1edbc | 1504 | } |
AnnaBridge | 171:3a7713b1edbc | 1505 | |
AnnaBridge | 171:3a7713b1edbc | 1506 | /** |
AnnaBridge | 171:3a7713b1edbc | 1507 | * @brief Indicate the status of Receive data register not empty flag. |
AnnaBridge | 171:3a7713b1edbc | 1508 | * @note RESET: When Receive data register is read. |
AnnaBridge | 171:3a7713b1edbc | 1509 | * SET: When the received data is copied in Receive data register. |
AnnaBridge | 171:3a7713b1edbc | 1510 | * @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE |
AnnaBridge | 171:3a7713b1edbc | 1511 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1512 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1513 | */ |
AnnaBridge | 171:3a7713b1edbc | 1514 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1515 | { |
AnnaBridge | 171:3a7713b1edbc | 1516 | return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE)); |
AnnaBridge | 171:3a7713b1edbc | 1517 | } |
AnnaBridge | 171:3a7713b1edbc | 1518 | |
AnnaBridge | 171:3a7713b1edbc | 1519 | /** |
AnnaBridge | 171:3a7713b1edbc | 1520 | * @brief Indicate the status of Address matched flag (slave mode). |
AnnaBridge | 171:3a7713b1edbc | 1521 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1522 | * SET: When the received slave address matched with one of the enabled slave address. |
AnnaBridge | 171:3a7713b1edbc | 1523 | * @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR |
AnnaBridge | 171:3a7713b1edbc | 1524 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1525 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1526 | */ |
AnnaBridge | 171:3a7713b1edbc | 1527 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1528 | { |
AnnaBridge | 171:3a7713b1edbc | 1529 | return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR)); |
AnnaBridge | 171:3a7713b1edbc | 1530 | } |
AnnaBridge | 171:3a7713b1edbc | 1531 | |
AnnaBridge | 171:3a7713b1edbc | 1532 | /** |
AnnaBridge | 171:3a7713b1edbc | 1533 | * @brief Indicate the status of Not Acknowledge received flag. |
AnnaBridge | 171:3a7713b1edbc | 1534 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1535 | * SET: When a NACK is received after a byte transmission. |
AnnaBridge | 171:3a7713b1edbc | 1536 | * @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK |
AnnaBridge | 171:3a7713b1edbc | 1537 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1538 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1539 | */ |
AnnaBridge | 171:3a7713b1edbc | 1540 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1541 | { |
AnnaBridge | 171:3a7713b1edbc | 1542 | return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF)); |
AnnaBridge | 171:3a7713b1edbc | 1543 | } |
AnnaBridge | 171:3a7713b1edbc | 1544 | |
AnnaBridge | 171:3a7713b1edbc | 1545 | /** |
AnnaBridge | 171:3a7713b1edbc | 1546 | * @brief Indicate the status of Stop detection flag. |
AnnaBridge | 171:3a7713b1edbc | 1547 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1548 | * SET: When a Stop condition is detected. |
AnnaBridge | 171:3a7713b1edbc | 1549 | * @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP |
AnnaBridge | 171:3a7713b1edbc | 1550 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1551 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1552 | */ |
AnnaBridge | 171:3a7713b1edbc | 1553 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1554 | { |
AnnaBridge | 171:3a7713b1edbc | 1555 | return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF)); |
AnnaBridge | 171:3a7713b1edbc | 1556 | } |
AnnaBridge | 171:3a7713b1edbc | 1557 | |
AnnaBridge | 171:3a7713b1edbc | 1558 | /** |
AnnaBridge | 171:3a7713b1edbc | 1559 | * @brief Indicate the status of Transfer complete flag (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1560 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1561 | * SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred. |
AnnaBridge | 171:3a7713b1edbc | 1562 | * @rmtoll ISR TC LL_I2C_IsActiveFlag_TC |
AnnaBridge | 171:3a7713b1edbc | 1563 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1564 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1565 | */ |
AnnaBridge | 171:3a7713b1edbc | 1566 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1567 | { |
AnnaBridge | 171:3a7713b1edbc | 1568 | return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC)); |
AnnaBridge | 171:3a7713b1edbc | 1569 | } |
AnnaBridge | 171:3a7713b1edbc | 1570 | |
AnnaBridge | 171:3a7713b1edbc | 1571 | /** |
AnnaBridge | 171:3a7713b1edbc | 1572 | * @brief Indicate the status of Transfer complete flag (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1573 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1574 | * SET: When RELOAD=1 and NBYTES date have been transferred. |
AnnaBridge | 171:3a7713b1edbc | 1575 | * @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR |
AnnaBridge | 171:3a7713b1edbc | 1576 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1577 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1578 | */ |
AnnaBridge | 171:3a7713b1edbc | 1579 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1580 | { |
AnnaBridge | 171:3a7713b1edbc | 1581 | return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR)); |
AnnaBridge | 171:3a7713b1edbc | 1582 | } |
AnnaBridge | 171:3a7713b1edbc | 1583 | |
AnnaBridge | 171:3a7713b1edbc | 1584 | /** |
AnnaBridge | 171:3a7713b1edbc | 1585 | * @brief Indicate the status of Bus error flag. |
AnnaBridge | 171:3a7713b1edbc | 1586 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1587 | * SET: When a misplaced Start or Stop condition is detected. |
AnnaBridge | 171:3a7713b1edbc | 1588 | * @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR |
AnnaBridge | 171:3a7713b1edbc | 1589 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1590 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1591 | */ |
AnnaBridge | 171:3a7713b1edbc | 1592 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1593 | { |
AnnaBridge | 171:3a7713b1edbc | 1594 | return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR)); |
AnnaBridge | 171:3a7713b1edbc | 1595 | } |
AnnaBridge | 171:3a7713b1edbc | 1596 | |
AnnaBridge | 171:3a7713b1edbc | 1597 | /** |
AnnaBridge | 171:3a7713b1edbc | 1598 | * @brief Indicate the status of Arbitration lost flag. |
AnnaBridge | 171:3a7713b1edbc | 1599 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1600 | * SET: When arbitration lost. |
AnnaBridge | 171:3a7713b1edbc | 1601 | * @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO |
AnnaBridge | 171:3a7713b1edbc | 1602 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1603 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1604 | */ |
AnnaBridge | 171:3a7713b1edbc | 1605 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1606 | { |
AnnaBridge | 171:3a7713b1edbc | 1607 | return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO)); |
AnnaBridge | 171:3a7713b1edbc | 1608 | } |
AnnaBridge | 171:3a7713b1edbc | 1609 | |
AnnaBridge | 171:3a7713b1edbc | 1610 | /** |
AnnaBridge | 171:3a7713b1edbc | 1611 | * @brief Indicate the status of Overrun/Underrun flag (slave mode). |
AnnaBridge | 171:3a7713b1edbc | 1612 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1613 | * SET: When an overrun/underrun error occurs (Clock Stretching Disabled). |
AnnaBridge | 171:3a7713b1edbc | 1614 | * @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR |
AnnaBridge | 171:3a7713b1edbc | 1615 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1616 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1617 | */ |
AnnaBridge | 171:3a7713b1edbc | 1618 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1619 | { |
AnnaBridge | 171:3a7713b1edbc | 1620 | return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR)); |
AnnaBridge | 171:3a7713b1edbc | 1621 | } |
AnnaBridge | 171:3a7713b1edbc | 1622 | |
AnnaBridge | 171:3a7713b1edbc | 1623 | /** |
AnnaBridge | 171:3a7713b1edbc | 1624 | * @brief Indicate the status of SMBus PEC error flag in reception. |
AnnaBridge | 171:3a7713b1edbc | 1625 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1626 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1627 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1628 | * SET: When the received PEC does not match with the PEC register content. |
AnnaBridge | 171:3a7713b1edbc | 1629 | * @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR |
AnnaBridge | 171:3a7713b1edbc | 1630 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1631 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1632 | */ |
AnnaBridge | 171:3a7713b1edbc | 1633 | __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1634 | { |
AnnaBridge | 171:3a7713b1edbc | 1635 | return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR)); |
AnnaBridge | 171:3a7713b1edbc | 1636 | } |
AnnaBridge | 171:3a7713b1edbc | 1637 | |
AnnaBridge | 171:3a7713b1edbc | 1638 | /** |
AnnaBridge | 171:3a7713b1edbc | 1639 | * @brief Indicate the status of SMBus Timeout detection flag. |
AnnaBridge | 171:3a7713b1edbc | 1640 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1641 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1642 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1643 | * SET: When a timeout or extended clock timeout occurs. |
AnnaBridge | 171:3a7713b1edbc | 1644 | * @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT |
AnnaBridge | 171:3a7713b1edbc | 1645 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1646 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1647 | */ |
AnnaBridge | 171:3a7713b1edbc | 1648 | __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1649 | { |
AnnaBridge | 171:3a7713b1edbc | 1650 | return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT)); |
AnnaBridge | 171:3a7713b1edbc | 1651 | } |
AnnaBridge | 171:3a7713b1edbc | 1652 | |
AnnaBridge | 171:3a7713b1edbc | 1653 | /** |
AnnaBridge | 171:3a7713b1edbc | 1654 | * @brief Indicate the status of SMBus alert flag. |
AnnaBridge | 171:3a7713b1edbc | 1655 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1656 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1657 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1658 | * SET: When SMBus host configuration, SMBus alert enabled and |
AnnaBridge | 171:3a7713b1edbc | 1659 | * a falling edge event occurs on SMBA pin. |
AnnaBridge | 171:3a7713b1edbc | 1660 | * @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT |
AnnaBridge | 171:3a7713b1edbc | 1661 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1662 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1663 | */ |
AnnaBridge | 171:3a7713b1edbc | 1664 | __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1665 | { |
AnnaBridge | 171:3a7713b1edbc | 1666 | return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT)); |
AnnaBridge | 171:3a7713b1edbc | 1667 | } |
AnnaBridge | 171:3a7713b1edbc | 1668 | |
AnnaBridge | 171:3a7713b1edbc | 1669 | /** |
AnnaBridge | 171:3a7713b1edbc | 1670 | * @brief Indicate the status of Bus Busy flag. |
AnnaBridge | 171:3a7713b1edbc | 1671 | * @note RESET: Clear default value. |
AnnaBridge | 171:3a7713b1edbc | 1672 | * SET: When a Start condition is detected. |
AnnaBridge | 171:3a7713b1edbc | 1673 | * @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY |
AnnaBridge | 171:3a7713b1edbc | 1674 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1675 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1676 | */ |
AnnaBridge | 171:3a7713b1edbc | 1677 | __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1678 | { |
AnnaBridge | 171:3a7713b1edbc | 1679 | return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY)); |
AnnaBridge | 171:3a7713b1edbc | 1680 | } |
AnnaBridge | 171:3a7713b1edbc | 1681 | |
AnnaBridge | 171:3a7713b1edbc | 1682 | /** |
AnnaBridge | 171:3a7713b1edbc | 1683 | * @brief Clear Address Matched flag. |
AnnaBridge | 171:3a7713b1edbc | 1684 | * @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR |
AnnaBridge | 171:3a7713b1edbc | 1685 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1686 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1687 | */ |
AnnaBridge | 171:3a7713b1edbc | 1688 | __STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1689 | { |
AnnaBridge | 171:3a7713b1edbc | 1690 | SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF); |
AnnaBridge | 171:3a7713b1edbc | 1691 | } |
AnnaBridge | 171:3a7713b1edbc | 1692 | |
AnnaBridge | 171:3a7713b1edbc | 1693 | /** |
AnnaBridge | 171:3a7713b1edbc | 1694 | * @brief Clear Not Acknowledge flag. |
AnnaBridge | 171:3a7713b1edbc | 1695 | * @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK |
AnnaBridge | 171:3a7713b1edbc | 1696 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1697 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1698 | */ |
AnnaBridge | 171:3a7713b1edbc | 1699 | __STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1700 | { |
AnnaBridge | 171:3a7713b1edbc | 1701 | SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF); |
AnnaBridge | 171:3a7713b1edbc | 1702 | } |
AnnaBridge | 171:3a7713b1edbc | 1703 | |
AnnaBridge | 171:3a7713b1edbc | 1704 | /** |
AnnaBridge | 171:3a7713b1edbc | 1705 | * @brief Clear Stop detection flag. |
AnnaBridge | 171:3a7713b1edbc | 1706 | * @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP |
AnnaBridge | 171:3a7713b1edbc | 1707 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1708 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1709 | */ |
AnnaBridge | 171:3a7713b1edbc | 1710 | __STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1711 | { |
AnnaBridge | 171:3a7713b1edbc | 1712 | SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF); |
AnnaBridge | 171:3a7713b1edbc | 1713 | } |
AnnaBridge | 171:3a7713b1edbc | 1714 | |
AnnaBridge | 171:3a7713b1edbc | 1715 | /** |
AnnaBridge | 171:3a7713b1edbc | 1716 | * @brief Clear Transmit data register empty flag (TXE). |
AnnaBridge | 171:3a7713b1edbc | 1717 | * @note This bit can be clear by software in order to flush the transmit data register (TXDR). |
AnnaBridge | 171:3a7713b1edbc | 1718 | * @rmtoll ISR TXE LL_I2C_ClearFlag_TXE |
AnnaBridge | 171:3a7713b1edbc | 1719 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1720 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1721 | */ |
AnnaBridge | 171:3a7713b1edbc | 1722 | __STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1723 | { |
AnnaBridge | 171:3a7713b1edbc | 1724 | WRITE_REG(I2Cx->ISR, I2C_ISR_TXE); |
AnnaBridge | 171:3a7713b1edbc | 1725 | } |
AnnaBridge | 171:3a7713b1edbc | 1726 | |
AnnaBridge | 171:3a7713b1edbc | 1727 | /** |
AnnaBridge | 171:3a7713b1edbc | 1728 | * @brief Clear Bus error flag. |
AnnaBridge | 171:3a7713b1edbc | 1729 | * @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR |
AnnaBridge | 171:3a7713b1edbc | 1730 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1731 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1732 | */ |
AnnaBridge | 171:3a7713b1edbc | 1733 | __STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1734 | { |
AnnaBridge | 171:3a7713b1edbc | 1735 | SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF); |
AnnaBridge | 171:3a7713b1edbc | 1736 | } |
AnnaBridge | 171:3a7713b1edbc | 1737 | |
AnnaBridge | 171:3a7713b1edbc | 1738 | /** |
AnnaBridge | 171:3a7713b1edbc | 1739 | * @brief Clear Arbitration lost flag. |
AnnaBridge | 171:3a7713b1edbc | 1740 | * @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO |
AnnaBridge | 171:3a7713b1edbc | 1741 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1742 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1743 | */ |
AnnaBridge | 171:3a7713b1edbc | 1744 | __STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1745 | { |
AnnaBridge | 171:3a7713b1edbc | 1746 | SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF); |
AnnaBridge | 171:3a7713b1edbc | 1747 | } |
AnnaBridge | 171:3a7713b1edbc | 1748 | |
AnnaBridge | 171:3a7713b1edbc | 1749 | /** |
AnnaBridge | 171:3a7713b1edbc | 1750 | * @brief Clear Overrun/Underrun flag. |
AnnaBridge | 171:3a7713b1edbc | 1751 | * @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR |
AnnaBridge | 171:3a7713b1edbc | 1752 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1753 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1754 | */ |
AnnaBridge | 171:3a7713b1edbc | 1755 | __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1756 | { |
AnnaBridge | 171:3a7713b1edbc | 1757 | SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF); |
AnnaBridge | 171:3a7713b1edbc | 1758 | } |
AnnaBridge | 171:3a7713b1edbc | 1759 | |
AnnaBridge | 171:3a7713b1edbc | 1760 | /** |
AnnaBridge | 171:3a7713b1edbc | 1761 | * @brief Clear SMBus PEC error flag. |
AnnaBridge | 171:3a7713b1edbc | 1762 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1763 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1764 | * @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR |
AnnaBridge | 171:3a7713b1edbc | 1765 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1766 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1767 | */ |
AnnaBridge | 171:3a7713b1edbc | 1768 | __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1769 | { |
AnnaBridge | 171:3a7713b1edbc | 1770 | SET_BIT(I2Cx->ICR, I2C_ICR_PECCF); |
AnnaBridge | 171:3a7713b1edbc | 1771 | } |
AnnaBridge | 171:3a7713b1edbc | 1772 | |
AnnaBridge | 171:3a7713b1edbc | 1773 | /** |
AnnaBridge | 171:3a7713b1edbc | 1774 | * @brief Clear SMBus Timeout detection flag. |
AnnaBridge | 171:3a7713b1edbc | 1775 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1776 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1777 | * @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT |
AnnaBridge | 171:3a7713b1edbc | 1778 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1779 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1780 | */ |
AnnaBridge | 171:3a7713b1edbc | 1781 | __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1782 | { |
AnnaBridge | 171:3a7713b1edbc | 1783 | SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF); |
AnnaBridge | 171:3a7713b1edbc | 1784 | } |
AnnaBridge | 171:3a7713b1edbc | 1785 | |
AnnaBridge | 171:3a7713b1edbc | 1786 | /** |
AnnaBridge | 171:3a7713b1edbc | 1787 | * @brief Clear SMBus Alert flag. |
AnnaBridge | 171:3a7713b1edbc | 1788 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 1789 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 1790 | * @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT |
AnnaBridge | 171:3a7713b1edbc | 1791 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1792 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1793 | */ |
AnnaBridge | 171:3a7713b1edbc | 1794 | __STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1795 | { |
AnnaBridge | 171:3a7713b1edbc | 1796 | SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF); |
AnnaBridge | 171:3a7713b1edbc | 1797 | } |
AnnaBridge | 171:3a7713b1edbc | 1798 | |
AnnaBridge | 171:3a7713b1edbc | 1799 | /** |
AnnaBridge | 171:3a7713b1edbc | 1800 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1801 | */ |
AnnaBridge | 171:3a7713b1edbc | 1802 | |
AnnaBridge | 171:3a7713b1edbc | 1803 | /** @defgroup I2C_LL_EF_Data_Management Data_Management |
AnnaBridge | 171:3a7713b1edbc | 1804 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 1805 | */ |
AnnaBridge | 171:3a7713b1edbc | 1806 | |
AnnaBridge | 171:3a7713b1edbc | 1807 | /** |
AnnaBridge | 171:3a7713b1edbc | 1808 | * @brief Enable automatic STOP condition generation (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1809 | * @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred. |
AnnaBridge | 171:3a7713b1edbc | 1810 | * This bit has no effect in slave mode or when RELOAD bit is set. |
AnnaBridge | 171:3a7713b1edbc | 1811 | * @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode |
AnnaBridge | 171:3a7713b1edbc | 1812 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1813 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1814 | */ |
AnnaBridge | 171:3a7713b1edbc | 1815 | __STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1816 | { |
AnnaBridge | 171:3a7713b1edbc | 1817 | SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND); |
AnnaBridge | 171:3a7713b1edbc | 1818 | } |
AnnaBridge | 171:3a7713b1edbc | 1819 | |
AnnaBridge | 171:3a7713b1edbc | 1820 | /** |
AnnaBridge | 171:3a7713b1edbc | 1821 | * @brief Disable automatic STOP condition generation (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1822 | * @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low. |
AnnaBridge | 171:3a7713b1edbc | 1823 | * @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode |
AnnaBridge | 171:3a7713b1edbc | 1824 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1825 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1826 | */ |
AnnaBridge | 171:3a7713b1edbc | 1827 | __STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1828 | { |
AnnaBridge | 171:3a7713b1edbc | 1829 | CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND); |
AnnaBridge | 171:3a7713b1edbc | 1830 | } |
AnnaBridge | 171:3a7713b1edbc | 1831 | |
AnnaBridge | 171:3a7713b1edbc | 1832 | /** |
AnnaBridge | 171:3a7713b1edbc | 1833 | * @brief Check if automatic STOP condition is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1834 | * @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode |
AnnaBridge | 171:3a7713b1edbc | 1835 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1836 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1837 | */ |
AnnaBridge | 171:3a7713b1edbc | 1838 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1839 | { |
AnnaBridge | 171:3a7713b1edbc | 1840 | return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND)); |
AnnaBridge | 171:3a7713b1edbc | 1841 | } |
AnnaBridge | 171:3a7713b1edbc | 1842 | |
AnnaBridge | 171:3a7713b1edbc | 1843 | /** |
AnnaBridge | 171:3a7713b1edbc | 1844 | * @brief Enable reload mode (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1845 | * @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set. |
AnnaBridge | 171:3a7713b1edbc | 1846 | * @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode |
AnnaBridge | 171:3a7713b1edbc | 1847 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1848 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1849 | */ |
AnnaBridge | 171:3a7713b1edbc | 1850 | __STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1851 | { |
AnnaBridge | 171:3a7713b1edbc | 1852 | SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD); |
AnnaBridge | 171:3a7713b1edbc | 1853 | } |
AnnaBridge | 171:3a7713b1edbc | 1854 | |
AnnaBridge | 171:3a7713b1edbc | 1855 | /** |
AnnaBridge | 171:3a7713b1edbc | 1856 | * @brief Disable reload mode (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1857 | * @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow). |
AnnaBridge | 171:3a7713b1edbc | 1858 | * @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode |
AnnaBridge | 171:3a7713b1edbc | 1859 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1860 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1861 | */ |
AnnaBridge | 171:3a7713b1edbc | 1862 | __STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1863 | { |
AnnaBridge | 171:3a7713b1edbc | 1864 | CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD); |
AnnaBridge | 171:3a7713b1edbc | 1865 | } |
AnnaBridge | 171:3a7713b1edbc | 1866 | |
AnnaBridge | 171:3a7713b1edbc | 1867 | /** |
AnnaBridge | 171:3a7713b1edbc | 1868 | * @brief Check if reload mode is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1869 | * @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode |
AnnaBridge | 171:3a7713b1edbc | 1870 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1871 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1872 | */ |
AnnaBridge | 171:3a7713b1edbc | 1873 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1874 | { |
AnnaBridge | 171:3a7713b1edbc | 1875 | return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD)); |
AnnaBridge | 171:3a7713b1edbc | 1876 | } |
AnnaBridge | 171:3a7713b1edbc | 1877 | |
AnnaBridge | 171:3a7713b1edbc | 1878 | /** |
AnnaBridge | 171:3a7713b1edbc | 1879 | * @brief Configure the number of bytes for transfer. |
AnnaBridge | 171:3a7713b1edbc | 1880 | * @note Changing these bits when START bit is set is not allowed. |
AnnaBridge | 171:3a7713b1edbc | 1881 | * @rmtoll CR2 NBYTES LL_I2C_SetTransferSize |
AnnaBridge | 171:3a7713b1edbc | 1882 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1883 | * @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF. |
AnnaBridge | 171:3a7713b1edbc | 1884 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1885 | */ |
AnnaBridge | 171:3a7713b1edbc | 1886 | __STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize) |
AnnaBridge | 171:3a7713b1edbc | 1887 | { |
AnnaBridge | 171:3a7713b1edbc | 1888 | MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1889 | } |
AnnaBridge | 171:3a7713b1edbc | 1890 | |
AnnaBridge | 171:3a7713b1edbc | 1891 | /** |
AnnaBridge | 171:3a7713b1edbc | 1892 | * @brief Get the number of bytes configured for transfer. |
AnnaBridge | 171:3a7713b1edbc | 1893 | * @rmtoll CR2 NBYTES LL_I2C_GetTransferSize |
AnnaBridge | 171:3a7713b1edbc | 1894 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1895 | * @retval Value between Min_Data=0x0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1896 | */ |
AnnaBridge | 171:3a7713b1edbc | 1897 | __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1898 | { |
AnnaBridge | 171:3a7713b1edbc | 1899 | return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1900 | } |
AnnaBridge | 171:3a7713b1edbc | 1901 | |
AnnaBridge | 171:3a7713b1edbc | 1902 | /** |
AnnaBridge | 171:3a7713b1edbc | 1903 | * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte. |
AnnaBridge | 171:3a7713b1edbc | 1904 | * @note Usage in Slave mode only. |
AnnaBridge | 171:3a7713b1edbc | 1905 | * @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData |
AnnaBridge | 171:3a7713b1edbc | 1906 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1907 | * @param TypeAcknowledge This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1908 | * @arg @ref LL_I2C_ACK |
AnnaBridge | 171:3a7713b1edbc | 1909 | * @arg @ref LL_I2C_NACK |
AnnaBridge | 171:3a7713b1edbc | 1910 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1911 | */ |
AnnaBridge | 171:3a7713b1edbc | 1912 | __STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge) |
AnnaBridge | 171:3a7713b1edbc | 1913 | { |
AnnaBridge | 171:3a7713b1edbc | 1914 | MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge); |
AnnaBridge | 171:3a7713b1edbc | 1915 | } |
AnnaBridge | 171:3a7713b1edbc | 1916 | |
AnnaBridge | 171:3a7713b1edbc | 1917 | /** |
AnnaBridge | 171:3a7713b1edbc | 1918 | * @brief Generate a START or RESTART condition |
AnnaBridge | 171:3a7713b1edbc | 1919 | * @note The START bit can be set even if bus is BUSY or I2C is in slave mode. |
AnnaBridge | 171:3a7713b1edbc | 1920 | * This action has no effect when RELOAD is set. |
AnnaBridge | 171:3a7713b1edbc | 1921 | * @rmtoll CR2 START LL_I2C_GenerateStartCondition |
AnnaBridge | 171:3a7713b1edbc | 1922 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1923 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1924 | */ |
AnnaBridge | 171:3a7713b1edbc | 1925 | __STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1926 | { |
AnnaBridge | 171:3a7713b1edbc | 1927 | SET_BIT(I2Cx->CR2, I2C_CR2_START); |
AnnaBridge | 171:3a7713b1edbc | 1928 | } |
AnnaBridge | 171:3a7713b1edbc | 1929 | |
AnnaBridge | 171:3a7713b1edbc | 1930 | /** |
AnnaBridge | 171:3a7713b1edbc | 1931 | * @brief Generate a STOP condition after the current byte transfer (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1932 | * @rmtoll CR2 STOP LL_I2C_GenerateStopCondition |
AnnaBridge | 171:3a7713b1edbc | 1933 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1934 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1935 | */ |
AnnaBridge | 171:3a7713b1edbc | 1936 | __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1937 | { |
AnnaBridge | 171:3a7713b1edbc | 1938 | SET_BIT(I2Cx->CR2, I2C_CR2_STOP); |
AnnaBridge | 171:3a7713b1edbc | 1939 | } |
AnnaBridge | 171:3a7713b1edbc | 1940 | |
AnnaBridge | 171:3a7713b1edbc | 1941 | /** |
AnnaBridge | 171:3a7713b1edbc | 1942 | * @brief Enable automatic RESTART Read request condition for 10bit address header (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1943 | * @note The master sends the complete 10bit slave address read sequence : |
AnnaBridge | 171:3a7713b1edbc | 1944 | * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction. |
AnnaBridge | 171:3a7713b1edbc | 1945 | * @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead |
AnnaBridge | 171:3a7713b1edbc | 1946 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1947 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1948 | */ |
AnnaBridge | 171:3a7713b1edbc | 1949 | __STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1950 | { |
AnnaBridge | 171:3a7713b1edbc | 1951 | CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R); |
AnnaBridge | 171:3a7713b1edbc | 1952 | } |
AnnaBridge | 171:3a7713b1edbc | 1953 | |
AnnaBridge | 171:3a7713b1edbc | 1954 | /** |
AnnaBridge | 171:3a7713b1edbc | 1955 | * @brief Disable automatic RESTART Read request condition for 10bit address header (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1956 | * @note The master only sends the first 7 bits of 10bit address in Read direction. |
AnnaBridge | 171:3a7713b1edbc | 1957 | * @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead |
AnnaBridge | 171:3a7713b1edbc | 1958 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1959 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1960 | */ |
AnnaBridge | 171:3a7713b1edbc | 1961 | __STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1962 | { |
AnnaBridge | 171:3a7713b1edbc | 1963 | SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R); |
AnnaBridge | 171:3a7713b1edbc | 1964 | } |
AnnaBridge | 171:3a7713b1edbc | 1965 | |
AnnaBridge | 171:3a7713b1edbc | 1966 | /** |
AnnaBridge | 171:3a7713b1edbc | 1967 | * @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1968 | * @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead |
AnnaBridge | 171:3a7713b1edbc | 1969 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1970 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1971 | */ |
AnnaBridge | 171:3a7713b1edbc | 1972 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 1973 | { |
AnnaBridge | 171:3a7713b1edbc | 1974 | return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R)); |
AnnaBridge | 171:3a7713b1edbc | 1975 | } |
AnnaBridge | 171:3a7713b1edbc | 1976 | |
AnnaBridge | 171:3a7713b1edbc | 1977 | /** |
AnnaBridge | 171:3a7713b1edbc | 1978 | * @brief Configure the transfer direction (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1979 | * @note Changing these bits when START bit is set is not allowed. |
AnnaBridge | 171:3a7713b1edbc | 1980 | * @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest |
AnnaBridge | 171:3a7713b1edbc | 1981 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1982 | * @param TransferRequest This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1983 | * @arg @ref LL_I2C_REQUEST_WRITE |
AnnaBridge | 171:3a7713b1edbc | 1984 | * @arg @ref LL_I2C_REQUEST_READ |
AnnaBridge | 171:3a7713b1edbc | 1985 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1986 | */ |
AnnaBridge | 171:3a7713b1edbc | 1987 | __STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest) |
AnnaBridge | 171:3a7713b1edbc | 1988 | { |
AnnaBridge | 171:3a7713b1edbc | 1989 | MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest); |
AnnaBridge | 171:3a7713b1edbc | 1990 | } |
AnnaBridge | 171:3a7713b1edbc | 1991 | |
AnnaBridge | 171:3a7713b1edbc | 1992 | /** |
AnnaBridge | 171:3a7713b1edbc | 1993 | * @brief Get the transfer direction requested (master mode). |
AnnaBridge | 171:3a7713b1edbc | 1994 | * @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest |
AnnaBridge | 171:3a7713b1edbc | 1995 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 1996 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1997 | * @arg @ref LL_I2C_REQUEST_WRITE |
AnnaBridge | 171:3a7713b1edbc | 1998 | * @arg @ref LL_I2C_REQUEST_READ |
AnnaBridge | 171:3a7713b1edbc | 1999 | */ |
AnnaBridge | 171:3a7713b1edbc | 2000 | __STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2001 | { |
AnnaBridge | 171:3a7713b1edbc | 2002 | return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN)); |
AnnaBridge | 171:3a7713b1edbc | 2003 | } |
AnnaBridge | 171:3a7713b1edbc | 2004 | |
AnnaBridge | 171:3a7713b1edbc | 2005 | /** |
AnnaBridge | 171:3a7713b1edbc | 2006 | * @brief Configure the slave address for transfer (master mode). |
AnnaBridge | 171:3a7713b1edbc | 2007 | * @note Changing these bits when START bit is set is not allowed. |
AnnaBridge | 171:3a7713b1edbc | 2008 | * @rmtoll CR2 SADD LL_I2C_SetSlaveAddr |
AnnaBridge | 171:3a7713b1edbc | 2009 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2010 | * @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F. |
AnnaBridge | 171:3a7713b1edbc | 2011 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 2012 | */ |
AnnaBridge | 171:3a7713b1edbc | 2013 | __STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr) |
AnnaBridge | 171:3a7713b1edbc | 2014 | { |
AnnaBridge | 171:3a7713b1edbc | 2015 | MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr); |
AnnaBridge | 171:3a7713b1edbc | 2016 | } |
AnnaBridge | 171:3a7713b1edbc | 2017 | |
AnnaBridge | 171:3a7713b1edbc | 2018 | /** |
AnnaBridge | 171:3a7713b1edbc | 2019 | * @brief Get the slave address programmed for transfer. |
AnnaBridge | 171:3a7713b1edbc | 2020 | * @rmtoll CR2 SADD LL_I2C_GetSlaveAddr |
AnnaBridge | 171:3a7713b1edbc | 2021 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2022 | * @retval Value between Min_Data=0x0 and Max_Data=0x3F |
AnnaBridge | 171:3a7713b1edbc | 2023 | */ |
AnnaBridge | 171:3a7713b1edbc | 2024 | __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2025 | { |
AnnaBridge | 171:3a7713b1edbc | 2026 | return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD)); |
AnnaBridge | 171:3a7713b1edbc | 2027 | } |
AnnaBridge | 171:3a7713b1edbc | 2028 | |
AnnaBridge | 171:3a7713b1edbc | 2029 | /** |
AnnaBridge | 171:3a7713b1edbc | 2030 | * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set). |
AnnaBridge | 171:3a7713b1edbc | 2031 | * @rmtoll CR2 SADD LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2032 | * CR2 ADD10 LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2033 | * CR2 RD_WRN LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2034 | * CR2 START LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2035 | * CR2 STOP LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2036 | * CR2 RELOAD LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2037 | * CR2 NBYTES LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2038 | * CR2 AUTOEND LL_I2C_HandleTransfer\n |
AnnaBridge | 171:3a7713b1edbc | 2039 | * CR2 HEAD10R LL_I2C_HandleTransfer |
AnnaBridge | 171:3a7713b1edbc | 2040 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2041 | * @param SlaveAddr Specifies the slave address to be programmed. |
AnnaBridge | 171:3a7713b1edbc | 2042 | * @param SlaveAddrSize This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 2043 | * @arg @ref LL_I2C_ADDRSLAVE_7BIT |
AnnaBridge | 171:3a7713b1edbc | 2044 | * @arg @ref LL_I2C_ADDRSLAVE_10BIT |
AnnaBridge | 171:3a7713b1edbc | 2045 | * @param TransferSize Specifies the number of bytes to be programmed. |
AnnaBridge | 171:3a7713b1edbc | 2046 | * This parameter must be a value between Min_Data=0 and Max_Data=255. |
AnnaBridge | 171:3a7713b1edbc | 2047 | * @param EndMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 2048 | * @arg @ref LL_I2C_MODE_RELOAD |
AnnaBridge | 171:3a7713b1edbc | 2049 | * @arg @ref LL_I2C_MODE_AUTOEND |
AnnaBridge | 171:3a7713b1edbc | 2050 | * @arg @ref LL_I2C_MODE_SOFTEND |
AnnaBridge | 171:3a7713b1edbc | 2051 | * @arg @ref LL_I2C_MODE_SMBUS_RELOAD |
AnnaBridge | 171:3a7713b1edbc | 2052 | * @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC |
AnnaBridge | 171:3a7713b1edbc | 2053 | * @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC |
AnnaBridge | 171:3a7713b1edbc | 2054 | * @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC |
AnnaBridge | 171:3a7713b1edbc | 2055 | * @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC |
AnnaBridge | 171:3a7713b1edbc | 2056 | * @param Request This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 2057 | * @arg @ref LL_I2C_GENERATE_NOSTARTSTOP |
AnnaBridge | 171:3a7713b1edbc | 2058 | * @arg @ref LL_I2C_GENERATE_STOP |
AnnaBridge | 171:3a7713b1edbc | 2059 | * @arg @ref LL_I2C_GENERATE_START_READ |
AnnaBridge | 171:3a7713b1edbc | 2060 | * @arg @ref LL_I2C_GENERATE_START_WRITE |
AnnaBridge | 171:3a7713b1edbc | 2061 | * @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ |
AnnaBridge | 171:3a7713b1edbc | 2062 | * @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE |
AnnaBridge | 171:3a7713b1edbc | 2063 | * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ |
AnnaBridge | 171:3a7713b1edbc | 2064 | * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE |
AnnaBridge | 171:3a7713b1edbc | 2065 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 2066 | */ |
AnnaBridge | 171:3a7713b1edbc | 2067 | __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize, |
AnnaBridge | 171:3a7713b1edbc | 2068 | uint32_t TransferSize, uint32_t EndMode, uint32_t Request) |
AnnaBridge | 171:3a7713b1edbc | 2069 | { |
AnnaBridge | 171:3a7713b1edbc | 2070 | MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD | |
AnnaBridge | 171:3a7713b1edbc | 2071 | I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R, |
AnnaBridge | 171:3a7713b1edbc | 2072 | SlaveAddr | SlaveAddrSize | TransferSize << I2C_CR2_NBYTES_Pos | EndMode | Request); |
AnnaBridge | 171:3a7713b1edbc | 2073 | } |
AnnaBridge | 171:3a7713b1edbc | 2074 | |
AnnaBridge | 171:3a7713b1edbc | 2075 | /** |
AnnaBridge | 171:3a7713b1edbc | 2076 | * @brief Indicate the value of transfer direction (slave mode). |
AnnaBridge | 171:3a7713b1edbc | 2077 | * @note RESET: Write transfer, Slave enters in receiver mode. |
AnnaBridge | 171:3a7713b1edbc | 2078 | * SET: Read transfer, Slave enters in transmitter mode. |
AnnaBridge | 171:3a7713b1edbc | 2079 | * @rmtoll ISR DIR LL_I2C_GetTransferDirection |
AnnaBridge | 171:3a7713b1edbc | 2080 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2081 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 2082 | * @arg @ref LL_I2C_DIRECTION_WRITE |
AnnaBridge | 171:3a7713b1edbc | 2083 | * @arg @ref LL_I2C_DIRECTION_READ |
AnnaBridge | 171:3a7713b1edbc | 2084 | */ |
AnnaBridge | 171:3a7713b1edbc | 2085 | __STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2086 | { |
AnnaBridge | 171:3a7713b1edbc | 2087 | return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR)); |
AnnaBridge | 171:3a7713b1edbc | 2088 | } |
AnnaBridge | 171:3a7713b1edbc | 2089 | |
AnnaBridge | 171:3a7713b1edbc | 2090 | /** |
AnnaBridge | 171:3a7713b1edbc | 2091 | * @brief Return the slave matched address. |
AnnaBridge | 171:3a7713b1edbc | 2092 | * @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode |
AnnaBridge | 171:3a7713b1edbc | 2093 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2094 | * @retval Value between Min_Data=0x00 and Max_Data=0x3F |
AnnaBridge | 171:3a7713b1edbc | 2095 | */ |
AnnaBridge | 171:3a7713b1edbc | 2096 | __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2097 | { |
AnnaBridge | 171:3a7713b1edbc | 2098 | return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1); |
AnnaBridge | 171:3a7713b1edbc | 2099 | } |
AnnaBridge | 171:3a7713b1edbc | 2100 | |
AnnaBridge | 171:3a7713b1edbc | 2101 | /** |
AnnaBridge | 171:3a7713b1edbc | 2102 | * @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode). |
AnnaBridge | 171:3a7713b1edbc | 2103 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 2104 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 2105 | * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received. |
AnnaBridge | 171:3a7713b1edbc | 2106 | * This bit has no effect when RELOAD bit is set. |
AnnaBridge | 171:3a7713b1edbc | 2107 | * This bit has no effect in device mode when SBC bit is not set. |
AnnaBridge | 171:3a7713b1edbc | 2108 | * @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare |
AnnaBridge | 171:3a7713b1edbc | 2109 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2110 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 2111 | */ |
AnnaBridge | 171:3a7713b1edbc | 2112 | __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2113 | { |
AnnaBridge | 171:3a7713b1edbc | 2114 | SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE); |
AnnaBridge | 171:3a7713b1edbc | 2115 | } |
AnnaBridge | 171:3a7713b1edbc | 2116 | |
AnnaBridge | 171:3a7713b1edbc | 2117 | /** |
AnnaBridge | 171:3a7713b1edbc | 2118 | * @brief Check if the SMBus Packet Error byte internal comparison is requested or not. |
AnnaBridge | 171:3a7713b1edbc | 2119 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 2120 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 2121 | * @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare |
AnnaBridge | 171:3a7713b1edbc | 2122 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2123 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 2124 | */ |
AnnaBridge | 171:3a7713b1edbc | 2125 | __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2126 | { |
AnnaBridge | 171:3a7713b1edbc | 2127 | return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE)); |
AnnaBridge | 171:3a7713b1edbc | 2128 | } |
AnnaBridge | 171:3a7713b1edbc | 2129 | |
AnnaBridge | 171:3a7713b1edbc | 2130 | /** |
AnnaBridge | 171:3a7713b1edbc | 2131 | * @brief Get the SMBus Packet Error byte calculated. |
AnnaBridge | 171:3a7713b1edbc | 2132 | * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not |
AnnaBridge | 171:3a7713b1edbc | 2133 | * SMBus feature is supported by the I2Cx Instance. |
AnnaBridge | 171:3a7713b1edbc | 2134 | * @rmtoll PECR PEC LL_I2C_GetSMBusPEC |
AnnaBridge | 171:3a7713b1edbc | 2135 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2136 | * @retval Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 2137 | */ |
AnnaBridge | 171:3a7713b1edbc | 2138 | __STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2139 | { |
AnnaBridge | 171:3a7713b1edbc | 2140 | return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC)); |
AnnaBridge | 171:3a7713b1edbc | 2141 | } |
AnnaBridge | 171:3a7713b1edbc | 2142 | |
AnnaBridge | 171:3a7713b1edbc | 2143 | /** |
AnnaBridge | 171:3a7713b1edbc | 2144 | * @brief Read Receive Data register. |
AnnaBridge | 171:3a7713b1edbc | 2145 | * @rmtoll RXDR RXDATA LL_I2C_ReceiveData8 |
AnnaBridge | 171:3a7713b1edbc | 2146 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2147 | * @retval Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 2148 | */ |
AnnaBridge | 171:3a7713b1edbc | 2149 | __STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx) |
AnnaBridge | 171:3a7713b1edbc | 2150 | { |
AnnaBridge | 171:3a7713b1edbc | 2151 | return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA)); |
AnnaBridge | 171:3a7713b1edbc | 2152 | } |
AnnaBridge | 171:3a7713b1edbc | 2153 | |
AnnaBridge | 171:3a7713b1edbc | 2154 | /** |
AnnaBridge | 171:3a7713b1edbc | 2155 | * @brief Write in Transmit Data Register . |
AnnaBridge | 171:3a7713b1edbc | 2156 | * @rmtoll TXDR TXDATA LL_I2C_TransmitData8 |
AnnaBridge | 171:3a7713b1edbc | 2157 | * @param I2Cx I2C Instance. |
AnnaBridge | 171:3a7713b1edbc | 2158 | * @param Data Value between Min_Data=0x00 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 2159 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 2160 | */ |
AnnaBridge | 171:3a7713b1edbc | 2161 | __STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data) |
AnnaBridge | 171:3a7713b1edbc | 2162 | { |
AnnaBridge | 171:3a7713b1edbc | 2163 | WRITE_REG(I2Cx->TXDR, Data); |
AnnaBridge | 171:3a7713b1edbc | 2164 | } |
AnnaBridge | 171:3a7713b1edbc | 2165 | |
AnnaBridge | 171:3a7713b1edbc | 2166 | /** |
AnnaBridge | 171:3a7713b1edbc | 2167 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2168 | */ |
AnnaBridge | 171:3a7713b1edbc | 2169 | |
AnnaBridge | 171:3a7713b1edbc | 2170 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 171:3a7713b1edbc | 2171 | /** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions |
AnnaBridge | 171:3a7713b1edbc | 2172 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 2173 | */ |
AnnaBridge | 171:3a7713b1edbc | 2174 | |
AnnaBridge | 171:3a7713b1edbc | 2175 | uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct); |
AnnaBridge | 171:3a7713b1edbc | 2176 | uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx); |
AnnaBridge | 171:3a7713b1edbc | 2177 | void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct); |
AnnaBridge | 171:3a7713b1edbc | 2178 | |
AnnaBridge | 171:3a7713b1edbc | 2179 | |
AnnaBridge | 171:3a7713b1edbc | 2180 | /** |
AnnaBridge | 171:3a7713b1edbc | 2181 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2182 | */ |
AnnaBridge | 171:3a7713b1edbc | 2183 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 171:3a7713b1edbc | 2184 | |
AnnaBridge | 171:3a7713b1edbc | 2185 | /** |
AnnaBridge | 171:3a7713b1edbc | 2186 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2187 | */ |
AnnaBridge | 171:3a7713b1edbc | 2188 | |
AnnaBridge | 171:3a7713b1edbc | 2189 | /** |
AnnaBridge | 171:3a7713b1edbc | 2190 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2191 | */ |
AnnaBridge | 171:3a7713b1edbc | 2192 | |
AnnaBridge | 171:3a7713b1edbc | 2193 | #endif /* I2C1 || I2C2 || I2C3 || I2C4 */ |
AnnaBridge | 171:3a7713b1edbc | 2194 | |
AnnaBridge | 171:3a7713b1edbc | 2195 | /** |
AnnaBridge | 171:3a7713b1edbc | 2196 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2197 | */ |
AnnaBridge | 171:3a7713b1edbc | 2198 | |
AnnaBridge | 171:3a7713b1edbc | 2199 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 2200 | } |
AnnaBridge | 171:3a7713b1edbc | 2201 | #endif |
AnnaBridge | 171:3a7713b1edbc | 2202 | |
AnnaBridge | 171:3a7713b1edbc | 2203 | #endif /* __STM32F7xx_LL_I2C_H */ |
AnnaBridge | 171:3a7713b1edbc | 2204 | |
AnnaBridge | 171:3a7713b1edbc | 2205 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |