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TARGET_NCS36510/TOOLCHAIN_IAR/trim_map.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file trim_map.h
AnnaBridge 171:3a7713b1edbc 4 * @brief trim register map
AnnaBridge 171:3a7713b1edbc 5 * @internal
AnnaBridge 171:3a7713b1edbc 6 * @author ON Semiconductor
AnnaBridge 171:3a7713b1edbc 7 * $Rev: 3727 $
AnnaBridge 171:3a7713b1edbc 8 * $Date: 2015-09-14 14:38:34 +0530 (Mon, 14 Sep 2015) $
AnnaBridge 171:3a7713b1edbc 9 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
AnnaBridge 171:3a7713b1edbc 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
AnnaBridge 171:3a7713b1edbc 12 * under limited terms and conditions. The terms and conditions pertaining to the software
AnnaBridge 171:3a7713b1edbc 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
AnnaBridge 171:3a7713b1edbc 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
AnnaBridge 171:3a7713b1edbc 15 * if applicable the software license agreement. Do not use this software and/or
AnnaBridge 171:3a7713b1edbc 16 * documentation unless you have carefully read and you agree to the limited terms and
AnnaBridge 171:3a7713b1edbc 17 * conditions. By using this software and/or documentation, you agree to the limited
AnnaBridge 171:3a7713b1edbc 18 * terms and conditions.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
AnnaBridge 171:3a7713b1edbc 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
AnnaBridge 171:3a7713b1edbc 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
AnnaBridge 171:3a7713b1edbc 25 * @endinternal
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * @ingroup trim
AnnaBridge 171:3a7713b1edbc 28 *
AnnaBridge 171:3a7713b1edbc 29 * @details
AnnaBridge 171:3a7713b1edbc 30 * <p>
AnnaBridge 171:3a7713b1edbc 31 * Rf and Analog control hw module register map
AnnaBridge 171:3a7713b1edbc 32 * </p>
AnnaBridge 171:3a7713b1edbc 33 */
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #ifndef TRIM_MAP_H_
AnnaBridge 171:3a7713b1edbc 36 #define TRIM_MAP_H_
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 /*************************************************************************************************
AnnaBridge 171:3a7713b1edbc 39 * *
AnnaBridge 171:3a7713b1edbc 40 * Header files *
AnnaBridge 171:3a7713b1edbc 41 * *
AnnaBridge 171:3a7713b1edbc 42 *************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 #include "architecture.h"
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /**************************************************************************************************
AnnaBridge 171:3a7713b1edbc 47 * *
AnnaBridge 171:3a7713b1edbc 48 * Type definitions *
AnnaBridge 171:3a7713b1edbc 49 * *
AnnaBridge 171:3a7713b1edbc 50 **************************************************************************************************/
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /** trim register map */
AnnaBridge 171:3a7713b1edbc 53 typedef struct {
AnnaBridge 171:3a7713b1edbc 54 __I uint32_t PAD0; /**< 0x1FA0 */
AnnaBridge 171:3a7713b1edbc 55 __I uint32_t MAC_ADDR_LOW; /**< 0x1FA4 */
AnnaBridge 171:3a7713b1edbc 56 __I uint32_t MAC_ADDR_HIGH; /**< 0x1FA8 */
AnnaBridge 171:3a7713b1edbc 57 __I uint32_t TRIM_32K_EXT; /**< 0x1FAC */
AnnaBridge 171:3a7713b1edbc 58 __I uint32_t TRIM_32M_EXT; /**< 0x1FB0 */
AnnaBridge 171:3a7713b1edbc 59 __I uint32_t FVVDH_COMP_TH; /**< 0x1FB4 */
AnnaBridge 171:3a7713b1edbc 60 union {
AnnaBridge 171:3a7713b1edbc 61 struct {
AnnaBridge 171:3a7713b1edbc 62 __I uint32_t CHANNEL11:4;
AnnaBridge 171:3a7713b1edbc 63 __I uint32_t CHANNEL12:4;
AnnaBridge 171:3a7713b1edbc 64 __I uint32_t CHANNEL13:4;
AnnaBridge 171:3a7713b1edbc 65 __I uint32_t CHANNEL14:4;
AnnaBridge 171:3a7713b1edbc 66 __I uint32_t CHANNEL15:4;
AnnaBridge 171:3a7713b1edbc 67 __I uint32_t CHANNEL16:4;
AnnaBridge 171:3a7713b1edbc 68 __I uint32_t CHANNEL17:4;
AnnaBridge 171:3a7713b1edbc 69 __I uint32_t CHANNEL18:4;
AnnaBridge 171:3a7713b1edbc 70 } BITS;
AnnaBridge 171:3a7713b1edbc 71 __I uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 72 } TX_VCO_LUT1; /**< 0x1FB8 */
AnnaBridge 171:3a7713b1edbc 73 union {
AnnaBridge 171:3a7713b1edbc 74 struct {
AnnaBridge 171:3a7713b1edbc 75 __I uint32_t CHANNEL19:4;
AnnaBridge 171:3a7713b1edbc 76 __I uint32_t CHANNEL20:4;
AnnaBridge 171:3a7713b1edbc 77 __I uint32_t CHANNEL21:4;
AnnaBridge 171:3a7713b1edbc 78 __I uint32_t CHANNEL22:4;
AnnaBridge 171:3a7713b1edbc 79 __I uint32_t CHANNEL23:4;
AnnaBridge 171:3a7713b1edbc 80 __I uint32_t CHANNEL24:4;
AnnaBridge 171:3a7713b1edbc 81 __I uint32_t CHANNEL25:4;
AnnaBridge 171:3a7713b1edbc 82 __I uint32_t CHANNEL26:4;
AnnaBridge 171:3a7713b1edbc 83 } BITS;
AnnaBridge 171:3a7713b1edbc 84 __I uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 85 } TX_VCO_LUT2; /**< 0x1FBC */
AnnaBridge 171:3a7713b1edbc 86 union {
AnnaBridge 171:3a7713b1edbc 87 struct {
AnnaBridge 171:3a7713b1edbc 88 __I uint32_t CHANNEL11:4;
AnnaBridge 171:3a7713b1edbc 89 __I uint32_t CHANNEL12:4;
AnnaBridge 171:3a7713b1edbc 90 __I uint32_t CHANNEL13:4;
AnnaBridge 171:3a7713b1edbc 91 __I uint32_t CHANNEL14:4;
AnnaBridge 171:3a7713b1edbc 92 __I uint32_t CHANNEL15:4;
AnnaBridge 171:3a7713b1edbc 93 __I uint32_t CHANNEL16:4;
AnnaBridge 171:3a7713b1edbc 94 __I uint32_t CHANNEL17:4;
AnnaBridge 171:3a7713b1edbc 95 __I uint32_t CHANNEL18:4;
AnnaBridge 171:3a7713b1edbc 96 } BITS;
AnnaBridge 171:3a7713b1edbc 97 __I uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 98 } RX_VCO_LUT1; /**< 0x1FC0 */
AnnaBridge 171:3a7713b1edbc 99 union {
AnnaBridge 171:3a7713b1edbc 100 struct {
AnnaBridge 171:3a7713b1edbc 101 __I uint32_t CHANNEL19:4;
AnnaBridge 171:3a7713b1edbc 102 __I uint32_t CHANNEL20:4;
AnnaBridge 171:3a7713b1edbc 103 __I uint32_t CHANNEL21:4;
AnnaBridge 171:3a7713b1edbc 104 __I uint32_t CHANNEL22:4;
AnnaBridge 171:3a7713b1edbc 105 __I uint32_t CHANNEL23:4;
AnnaBridge 171:3a7713b1edbc 106 __I uint32_t CHANNEL24:4;
AnnaBridge 171:3a7713b1edbc 107 __I uint32_t CHANNEL25:4;
AnnaBridge 171:3a7713b1edbc 108 __I uint32_t CHANNEL26:4;
AnnaBridge 171:3a7713b1edbc 109 } BITS;
AnnaBridge 171:3a7713b1edbc 110 __I uint32_t WORD;
AnnaBridge 171:3a7713b1edbc 111 } RX_VCO_LUT2; /**< 0x1FC4 */
AnnaBridge 171:3a7713b1edbc 112 __I uint32_t ON_RESERVED0; /**< 0x1FC8 */
AnnaBridge 171:3a7713b1edbc 113 __I uint32_t ON_RESERVED1; /**< 0x1FCC */
AnnaBridge 171:3a7713b1edbc 114 __I uint32_t ADC_OFFSET_TRIM; /**< 0x1FD0 */
AnnaBridge 171:3a7713b1edbc 115 __I uint32_t TX_PRE_CHIPS; /**< 0x1FD4 */
AnnaBridge 171:3a7713b1edbc 116 __I uint32_t TX_TRIM; /**< 0x1FD8 */
AnnaBridge 171:3a7713b1edbc 117 __I uint32_t PLL_VCO_TAP_LOCATION; /**< 0x1FDC */
AnnaBridge 171:3a7713b1edbc 118 __I uint32_t PLL_TRIM; /**< 0x1FE0 */
AnnaBridge 171:3a7713b1edbc 119 __I uint32_t RSSI_OFFSET; /**< 0x1FE4 */
AnnaBridge 171:3a7713b1edbc 120 __I uint32_t RX_CHAIN_TRIM; /**< 0x1FE8 */
AnnaBridge 171:3a7713b1edbc 121 __I uint32_t PMU_TRIM; /**< 0x1FEC */
AnnaBridge 171:3a7713b1edbc 122 __I uint32_t WR_SEED_RD_RAND; /**< 0x1FF0 */
AnnaBridge 171:3a7713b1edbc 123 __I uint32_t WAFER_LOCATION; /**< 0x1FF4 */
AnnaBridge 171:3a7713b1edbc 124 __I uint32_t LOT_NUMBER; /**< 0x1FF8 */
AnnaBridge 171:3a7713b1edbc 125 __I uint32_t REVISION_CODE; /**< 0x1FFC */
AnnaBridge 171:3a7713b1edbc 126 } TrimReg_t, *TrimReg_pt;
AnnaBridge 171:3a7713b1edbc 127
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 /** User defined trim register map */
AnnaBridge 171:3a7713b1edbc 130 typedef struct {
AnnaBridge 171:3a7713b1edbc 131 __IO uint32_t MAC_ADDRESS_LOW; /**< 0x2800 */
AnnaBridge 171:3a7713b1edbc 132 __IO uint32_t MAC_ADDRESS_HIGH; /**< 0x2804 */
AnnaBridge 171:3a7713b1edbc 133 __IO uint32_t TRIM_32K_EXT; /**< 0x2808 */
AnnaBridge 171:3a7713b1edbc 134 __IO uint32_t TRIM_32M_EXT; /**< 0x280C */
AnnaBridge 171:3a7713b1edbc 135 __IO uint32_t RSSI_OFFSET; /**< 0x2810 */
AnnaBridge 171:3a7713b1edbc 136 __IO uint32_t TX_TRIM; /**< 0x2814 */
AnnaBridge 171:3a7713b1edbc 137 } UserTrimReg_t, *UserTrimReg_pt;
AnnaBridge 171:3a7713b1edbc 138 #endif /* TRIM_MAP_H_ */