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TARGET_MAX32600MBED/TOOLCHAIN_IAR/wdt_regs.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 171:3a7713b1edbc 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 171:3a7713b1edbc 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 171:3a7713b1edbc 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 171:3a7713b1edbc 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 171:3a7713b1edbc 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 171:3a7713b1edbc 12 * in all copies or substantial portions of the Software.
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 171:3a7713b1edbc 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 171:3a7713b1edbc 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 171:3a7713b1edbc 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 171:3a7713b1edbc 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 171:3a7713b1edbc 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 171:3a7713b1edbc 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 171:3a7713b1edbc 24 * Products, Inc. Branding Policy.
AnnaBridge 171:3a7713b1edbc 25 *
AnnaBridge 171:3a7713b1edbc 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 171:3a7713b1edbc 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 171:3a7713b1edbc 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 171:3a7713b1edbc 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 171:3a7713b1edbc 30 * ownership rights.
AnnaBridge 171:3a7713b1edbc 31 *******************************************************************************
AnnaBridge 171:3a7713b1edbc 32 */
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #ifndef _MXC_WDT_REGS_H_
AnnaBridge 171:3a7713b1edbc 35 #define _MXC_WDT_REGS_H_
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 38 extern "C" {
AnnaBridge 171:3a7713b1edbc 39 #endif
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #include <stdint.h>
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 /**
AnnaBridge 171:3a7713b1edbc 44 * @file wdt_regs.h
AnnaBridge 171:3a7713b1edbc 45 * @addtogroup wdt WDT
AnnaBridge 171:3a7713b1edbc 46 * @{
AnnaBridge 171:3a7713b1edbc 47 */
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /**
AnnaBridge 171:3a7713b1edbc 50 * @brief Defines watchdog timer periods
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52 typedef enum {
AnnaBridge 171:3a7713b1edbc 53 /** 2^31 cycle period */
AnnaBridge 171:3a7713b1edbc 54 MXC_E_WDT_PERIOD_2_31_CLKS = 0,
AnnaBridge 171:3a7713b1edbc 55 /** 2^30 cycle period */
AnnaBridge 171:3a7713b1edbc 56 MXC_E_WDT_PERIOD_2_30_CLKS,
AnnaBridge 171:3a7713b1edbc 57 /** 2^29 cycle period */
AnnaBridge 171:3a7713b1edbc 58 MXC_E_WDT_PERIOD_2_29_CLKS,
AnnaBridge 171:3a7713b1edbc 59 /** 2^28 cycle period */
AnnaBridge 171:3a7713b1edbc 60 MXC_E_WDT_PERIOD_2_28_CLKS,
AnnaBridge 171:3a7713b1edbc 61 /** 2^27 cycle period */
AnnaBridge 171:3a7713b1edbc 62 MXC_E_WDT_PERIOD_2_27_CLKS,
AnnaBridge 171:3a7713b1edbc 63 /** 2^26 cycle period */
AnnaBridge 171:3a7713b1edbc 64 MXC_E_WDT_PERIOD_2_26_CLKS,
AnnaBridge 171:3a7713b1edbc 65 /** 2^25 cycle period */
AnnaBridge 171:3a7713b1edbc 66 MXC_E_WDT_PERIOD_2_25_CLKS,
AnnaBridge 171:3a7713b1edbc 67 /** 2^24 cycle period */
AnnaBridge 171:3a7713b1edbc 68 MXC_E_WDT_PERIOD_2_24_CLKS,
AnnaBridge 171:3a7713b1edbc 69 /** 2^23 cycle period */
AnnaBridge 171:3a7713b1edbc 70 MXC_E_WDT_PERIOD_2_23_CLKS,
AnnaBridge 171:3a7713b1edbc 71 /** 2^22 cycle period */
AnnaBridge 171:3a7713b1edbc 72 MXC_E_WDT_PERIOD_2_22_CLKS,
AnnaBridge 171:3a7713b1edbc 73 /** 2^21 cycle period */
AnnaBridge 171:3a7713b1edbc 74 MXC_E_WDT_PERIOD_2_21_CLKS,
AnnaBridge 171:3a7713b1edbc 75 /** 2^20 cycle period */
AnnaBridge 171:3a7713b1edbc 76 MXC_E_WDT_PERIOD_2_20_CLKS,
AnnaBridge 171:3a7713b1edbc 77 /** 2^19 cycle period */
AnnaBridge 171:3a7713b1edbc 78 MXC_E_WDT_PERIOD_2_19_CLKS,
AnnaBridge 171:3a7713b1edbc 79 /** 2^18 cycle period */
AnnaBridge 171:3a7713b1edbc 80 MXC_E_WDT_PERIOD_2_18_CLKS,
AnnaBridge 171:3a7713b1edbc 81 /** 2^17 cycle period */
AnnaBridge 171:3a7713b1edbc 82 MXC_E_WDT_PERIOD_2_17_CLKS,
AnnaBridge 171:3a7713b1edbc 83 /** 2^16 cycle period */
AnnaBridge 171:3a7713b1edbc 84 MXC_E_WDT_PERIOD_2_16_CLKS,
AnnaBridge 171:3a7713b1edbc 85 } mxc_wdt_period_t;
AnnaBridge 171:3a7713b1edbc 86
AnnaBridge 171:3a7713b1edbc 87 /* Offset Register Description
AnnaBridge 171:3a7713b1edbc 88 ====== ================================================ */
AnnaBridge 171:3a7713b1edbc 89 typedef struct {
AnnaBridge 171:3a7713b1edbc 90 __IO uint32_t ctrl; /* 0x0000 Watchdog Timer Control Register */
AnnaBridge 171:3a7713b1edbc 91 __IO uint32_t clear; /* 0x0004 Watchdog Clear Register (Feed Dog) */
AnnaBridge 171:3a7713b1edbc 92 __IO uint32_t int_rst_fl; /* 0x0008 Watchdog Interrupt/Reset Flags */
AnnaBridge 171:3a7713b1edbc 93 __IO uint32_t int_rst_en; /* 0x000C Interrupt/Reset Enable/Disable Controls */
AnnaBridge 171:3a7713b1edbc 94 __I uint32_t rsv0010; /* 0x0010 */
AnnaBridge 171:3a7713b1edbc 95 __IO uint32_t lock_ctrl; /* 0x0014 Lock Register Setting for WDT CTRL */
AnnaBridge 171:3a7713b1edbc 96 } mxc_wdt_regs_t;
AnnaBridge 171:3a7713b1edbc 97
AnnaBridge 171:3a7713b1edbc 98 /*
AnnaBridge 171:3a7713b1edbc 99 Register offsets for module WDT.
AnnaBridge 171:3a7713b1edbc 100 */
AnnaBridge 171:3a7713b1edbc 101 #define MXC_R_WDT_OFFS_CTRL ((uint32_t)0x00000000UL)
AnnaBridge 171:3a7713b1edbc 102 #define MXC_R_WDT_OFFS_CLEAR ((uint32_t)0x00000004UL)
AnnaBridge 171:3a7713b1edbc 103 #define MXC_R_WDT_OFFS_INT_RST_FL ((uint32_t)0x00000008UL)
AnnaBridge 171:3a7713b1edbc 104 #define MXC_R_WDT_OFFS_INT_RST_EN ((uint32_t)0x0000000CUL)
AnnaBridge 171:3a7713b1edbc 105 #define MXC_R_WDT_OFFS_LOCK_CTRL ((uint32_t)0x00000014UL)
AnnaBridge 171:3a7713b1edbc 106
AnnaBridge 171:3a7713b1edbc 107 #define MXC_V_WDT_WDLOCK_LOCK_KEY ((uint8_t)0x24)
AnnaBridge 171:3a7713b1edbc 108 #define MXC_V_WDT_WDLOCK_UNLOCK_KEY ((uint8_t)0x42)
AnnaBridge 171:3a7713b1edbc 109
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 /*
AnnaBridge 171:3a7713b1edbc 112 Field positions and masks for module WDT.
AnnaBridge 171:3a7713b1edbc 113 */
AnnaBridge 171:3a7713b1edbc 114 #define MXC_F_WDT_CTRL_INT_PERIOD_POS 0
AnnaBridge 171:3a7713b1edbc 115 #define MXC_F_WDT_CTRL_INT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_INT_PERIOD_POS))
AnnaBridge 171:3a7713b1edbc 116 #define MXC_F_WDT_CTRL_RST_PERIOD_POS 4
AnnaBridge 171:3a7713b1edbc 117 #define MXC_F_WDT_CTRL_RST_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_RST_PERIOD_POS))
AnnaBridge 171:3a7713b1edbc 118 #define MXC_F_WDT_CTRL_EN_TIMER_POS 8
AnnaBridge 171:3a7713b1edbc 119 #define MXC_F_WDT_CTRL_EN_TIMER ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_TIMER_POS))
AnnaBridge 171:3a7713b1edbc 120 #define MXC_F_WDT_CTRL_EN_CLOCK_POS 9
AnnaBridge 171:3a7713b1edbc 121 #define MXC_F_WDT_CTRL_EN_CLOCK ((uint32_t)(0x00000001UL << MXC_F_WDT_CTRL_EN_CLOCK_POS))
AnnaBridge 171:3a7713b1edbc 122 #define MXC_F_WDT_CTRL_WAIT_PERIOD_POS 12
AnnaBridge 171:3a7713b1edbc 123 #define MXC_F_WDT_CTRL_WAIT_PERIOD ((uint32_t)(0x0000000FUL << MXC_F_WDT_CTRL_WAIT_PERIOD_POS))
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 #define MXC_F_WDT_FLAGS_TIMEOUT_POS 0
AnnaBridge 171:3a7713b1edbc 126 #define MXC_F_WDT_FLAGS_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_TIMEOUT_POS))
AnnaBridge 171:3a7713b1edbc 127 #define MXC_F_WDT_FLAGS_PRE_WIN_POS 1
AnnaBridge 171:3a7713b1edbc 128 #define MXC_F_WDT_FLAGS_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_PRE_WIN_POS))
AnnaBridge 171:3a7713b1edbc 129 #define MXC_F_WDT_FLAGS_RESET_OUT_POS 2
AnnaBridge 171:3a7713b1edbc 130 #define MXC_F_WDT_FLAGS_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_FLAGS_RESET_OUT_POS))
AnnaBridge 171:3a7713b1edbc 131
AnnaBridge 171:3a7713b1edbc 132 #define MXC_F_WDT_ENABLE_TIMEOUT_POS 0
AnnaBridge 171:3a7713b1edbc 133 #define MXC_F_WDT_ENABLE_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_TIMEOUT_POS))
AnnaBridge 171:3a7713b1edbc 134 #define MXC_F_WDT_ENABLE_PRE_WIN_POS 1
AnnaBridge 171:3a7713b1edbc 135 #define MXC_F_WDT_ENABLE_PRE_WIN ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_PRE_WIN_POS))
AnnaBridge 171:3a7713b1edbc 136 #define MXC_F_WDT_ENABLE_RESET_OUT_POS 2
AnnaBridge 171:3a7713b1edbc 137 #define MXC_F_WDT_ENABLE_RESET_OUT ((uint32_t)(0x00000001UL << MXC_F_WDT_ENABLE_RESET_OUT_POS))
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 #define MXC_F_WDT_LOCK_CTRL_WDLOCK_POS 0
AnnaBridge 171:3a7713b1edbc 140 #define MXC_F_WDT_LOCK_CTRL_WDLOCK ((uint32_t)(0x000000FFUL << MXC_F_WDT_LOCK_CTRL_WDLOCK_POS))
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 143 }
AnnaBridge 171:3a7713b1edbc 144 #endif
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 /**
AnnaBridge 171:3a7713b1edbc 147 * @}
AnnaBridge 171:3a7713b1edbc 148 */
AnnaBridge 171:3a7713b1edbc 149
AnnaBridge 171:3a7713b1edbc 150 #endif /* _MXC_WDT_REGS_H_ */