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TARGET_MAX32600MBED/TOOLCHAIN_IAR/pt_regs.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 2 | * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved. |
AnnaBridge | 171:3a7713b1edbc | 3 | * |
AnnaBridge | 171:3a7713b1edbc | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
AnnaBridge | 171:3a7713b1edbc | 5 | * copy of this software and associated documentation files (the "Software"), |
AnnaBridge | 171:3a7713b1edbc | 6 | * to deal in the Software without restriction, including without limitation |
AnnaBridge | 171:3a7713b1edbc | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
AnnaBridge | 171:3a7713b1edbc | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
AnnaBridge | 171:3a7713b1edbc | 9 | * Software is furnished to do so, subject to the following conditions: |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * The above copyright notice and this permission notice shall be included |
AnnaBridge | 171:3a7713b1edbc | 12 | * in all copies or substantial portions of the Software. |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
AnnaBridge | 171:3a7713b1edbc | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
AnnaBridge | 171:3a7713b1edbc | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
AnnaBridge | 171:3a7713b1edbc | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
AnnaBridge | 171:3a7713b1edbc | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
AnnaBridge | 171:3a7713b1edbc | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * Except as contained in this notice, the name of Maxim Integrated |
AnnaBridge | 171:3a7713b1edbc | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
AnnaBridge | 171:3a7713b1edbc | 24 | * Products, Inc. Branding Policy. |
AnnaBridge | 171:3a7713b1edbc | 25 | * |
AnnaBridge | 171:3a7713b1edbc | 26 | * The mere transfer of this software does not imply any licenses |
AnnaBridge | 171:3a7713b1edbc | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
AnnaBridge | 171:3a7713b1edbc | 28 | * trademarks, maskwork rights, or any other form of intellectual |
AnnaBridge | 171:3a7713b1edbc | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
AnnaBridge | 171:3a7713b1edbc | 30 | * ownership rights. |
AnnaBridge | 171:3a7713b1edbc | 31 | ******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 32 | */ |
AnnaBridge | 171:3a7713b1edbc | 33 | |
AnnaBridge | 171:3a7713b1edbc | 34 | #ifndef _MXC_PT_REGS_H_ |
AnnaBridge | 171:3a7713b1edbc | 35 | #define _MXC_PT_REGS_H_ |
AnnaBridge | 171:3a7713b1edbc | 36 | |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 38 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 39 | #endif |
AnnaBridge | 171:3a7713b1edbc | 40 | |
AnnaBridge | 171:3a7713b1edbc | 41 | #include <stdint.h> |
AnnaBridge | 171:3a7713b1edbc | 42 | |
AnnaBridge | 171:3a7713b1edbc | 43 | /** |
AnnaBridge | 171:3a7713b1edbc | 44 | * @file pt_regs.h |
AnnaBridge | 171:3a7713b1edbc | 45 | * @addtogroup pt PT |
AnnaBridge | 171:3a7713b1edbc | 46 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 47 | */ |
AnnaBridge | 171:3a7713b1edbc | 48 | |
AnnaBridge | 171:3a7713b1edbc | 49 | typedef struct { |
AnnaBridge | 171:3a7713b1edbc | 50 | __IO uint32_t ctrl; |
AnnaBridge | 171:3a7713b1edbc | 51 | __IO uint32_t resync; |
AnnaBridge | 171:3a7713b1edbc | 52 | } mxc_ptg_regs_t; |
AnnaBridge | 171:3a7713b1edbc | 53 | |
AnnaBridge | 171:3a7713b1edbc | 54 | /* Offset Register Description |
AnnaBridge | 171:3a7713b1edbc | 55 | ====== ================================================== */ |
AnnaBridge | 171:3a7713b1edbc | 56 | typedef struct { |
AnnaBridge | 171:3a7713b1edbc | 57 | __IO uint32_t rate_length; /* 0x0000 Pulse train Output length and rate */ |
AnnaBridge | 171:3a7713b1edbc | 58 | __IO uint32_t train; /* 0x0004 Pulse Train Output Pattern */ |
AnnaBridge | 171:3a7713b1edbc | 59 | } mxc_pt_regs_t; |
AnnaBridge | 171:3a7713b1edbc | 60 | |
AnnaBridge | 171:3a7713b1edbc | 61 | /* |
AnnaBridge | 171:3a7713b1edbc | 62 | Register offsets for module PT. |
AnnaBridge | 171:3a7713b1edbc | 63 | */ |
AnnaBridge | 171:3a7713b1edbc | 64 | #define MXC_R_PTG_OFFS_CTRL ((uint32_t)0x00000000UL) |
AnnaBridge | 171:3a7713b1edbc | 65 | #define MXC_R_PTG_OFFS_RESYNC ((uint32_t)0x00000004UL) |
AnnaBridge | 171:3a7713b1edbc | 66 | #define MXC_R_PT_OFFS_RATE_LENGTH ((uint32_t)0x00000000UL) |
AnnaBridge | 171:3a7713b1edbc | 67 | #define MXC_R_PT_OFFS_TRAIN ((uint32_t)0x00000004UL) |
AnnaBridge | 171:3a7713b1edbc | 68 | |
AnnaBridge | 171:3a7713b1edbc | 69 | |
AnnaBridge | 171:3a7713b1edbc | 70 | /* |
AnnaBridge | 171:3a7713b1edbc | 71 | Field positions and masks for module PT. |
AnnaBridge | 171:3a7713b1edbc | 72 | */ |
AnnaBridge | 171:3a7713b1edbc | 73 | #define MXC_F_PT_CTRL_ENABLE_ALL_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 74 | #define MXC_F_PT_CTRL_ENABLE_ALL ((uint32_t)(0x00000001UL << MXC_F_PT_CTRL_ENABLE_ALL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 75 | |
AnnaBridge | 171:3a7713b1edbc | 76 | #define MXC_F_PT_RESYNC_PT0_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 77 | #define MXC_F_PT_RESYNC_PT0 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT0_POS)) |
AnnaBridge | 171:3a7713b1edbc | 78 | #define MXC_F_PT_RESYNC_PT1_POS 1 |
AnnaBridge | 171:3a7713b1edbc | 79 | #define MXC_F_PT_RESYNC_PT1 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT1_POS)) |
AnnaBridge | 171:3a7713b1edbc | 80 | #define MXC_F_PT_RESYNC_PT2_POS 2 |
AnnaBridge | 171:3a7713b1edbc | 81 | #define MXC_F_PT_RESYNC_PT2 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT2_POS)) |
AnnaBridge | 171:3a7713b1edbc | 82 | #define MXC_F_PT_RESYNC_PT3_POS 3 |
AnnaBridge | 171:3a7713b1edbc | 83 | #define MXC_F_PT_RESYNC_PT3 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT3_POS)) |
AnnaBridge | 171:3a7713b1edbc | 84 | #define MXC_F_PT_RESYNC_PT4_POS 4 |
AnnaBridge | 171:3a7713b1edbc | 85 | #define MXC_F_PT_RESYNC_PT4 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT4_POS)) |
AnnaBridge | 171:3a7713b1edbc | 86 | #define MXC_F_PT_RESYNC_PT5_POS 5 |
AnnaBridge | 171:3a7713b1edbc | 87 | #define MXC_F_PT_RESYNC_PT5 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT5_POS)) |
AnnaBridge | 171:3a7713b1edbc | 88 | #define MXC_F_PT_RESYNC_PT6_POS 6 |
AnnaBridge | 171:3a7713b1edbc | 89 | #define MXC_F_PT_RESYNC_PT6 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT6_POS)) |
AnnaBridge | 171:3a7713b1edbc | 90 | #define MXC_F_PT_RESYNC_PT7_POS 7 |
AnnaBridge | 171:3a7713b1edbc | 91 | #define MXC_F_PT_RESYNC_PT7 ((uint32_t)(0x00000001UL << MXC_F_PT_RESYNC_PT7_POS)) |
AnnaBridge | 171:3a7713b1edbc | 92 | |
AnnaBridge | 171:3a7713b1edbc | 93 | #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS 0 |
AnnaBridge | 171:3a7713b1edbc | 94 | #define MXC_F_PT_RATE_LENGTH_RATE_CONTROL ((uint32_t)(0x07FFFFFFUL << MXC_F_PT_RATE_LENGTH_RATE_CONTROL_POS)) |
AnnaBridge | 171:3a7713b1edbc | 95 | #define MXC_F_PT_RATE_LENGTH_MODE_POS 27 |
AnnaBridge | 171:3a7713b1edbc | 96 | #define MXC_F_PT_RATE_LENGTH_MODE ((uint32_t)(0x0000001FUL << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 97 | |
AnnaBridge | 171:3a7713b1edbc | 98 | /* |
AnnaBridge | 171:3a7713b1edbc | 99 | Field values and shifted values for module PT. |
AnnaBridge | 171:3a7713b1edbc | 100 | */ |
AnnaBridge | 171:3a7713b1edbc | 101 | #define MXC_V_PT_RATE_LENGTH_MODE_32_BIT_PATTERN ((uint32_t)(0x0x00000000UL)) |
AnnaBridge | 171:3a7713b1edbc | 102 | #define MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(0x0x00000001UL)) |
AnnaBridge | 171:3a7713b1edbc | 103 | #define MXC_V_PT_RATE_LENGTH_MODE_2_BIT_PATTERN ((uint32_t)(0x0x00000002UL)) |
AnnaBridge | 171:3a7713b1edbc | 104 | #define MXC_V_PT_RATE_LENGTH_MODE_3_BIT_PATTERN ((uint32_t)(0x0x00000003UL)) |
AnnaBridge | 171:3a7713b1edbc | 105 | #define MXC_V_PT_RATE_LENGTH_MODE_4_BIT_PATTERN ((uint32_t)(0x0x00000004UL)) |
AnnaBridge | 171:3a7713b1edbc | 106 | #define MXC_V_PT_RATE_LENGTH_MODE_5_BIT_PATTERN ((uint32_t)(0x0x00000005UL)) |
AnnaBridge | 171:3a7713b1edbc | 107 | #define MXC_V_PT_RATE_LENGTH_MODE_6_BIT_PATTERN ((uint32_t)(0x0x00000006UL)) |
AnnaBridge | 171:3a7713b1edbc | 108 | #define MXC_V_PT_RATE_LENGTH_MODE_7_BIT_PATTERN ((uint32_t)(0x0x00000007UL)) |
AnnaBridge | 171:3a7713b1edbc | 109 | #define MXC_V_PT_RATE_LENGTH_MODE_8_BIT_PATTERN ((uint32_t)(0x0x00000008UL)) |
AnnaBridge | 171:3a7713b1edbc | 110 | #define MXC_V_PT_RATE_LENGTH_MODE_9_BIT_PATTERN ((uint32_t)(0x0x00000009UL)) |
AnnaBridge | 171:3a7713b1edbc | 111 | #define MXC_V_PT_RATE_LENGTH_MODE_10_BIT_PATTERN ((uint32_t)(0x0x00000010UL)) |
AnnaBridge | 171:3a7713b1edbc | 112 | #define MXC_V_PT_RATE_LENGTH_MODE_11_BIT_PATTERN ((uint32_t)(0x0x00000011UL)) |
AnnaBridge | 171:3a7713b1edbc | 113 | #define MXC_V_PT_RATE_LENGTH_MODE_12_BIT_PATTERN ((uint32_t)(0x0x00000012UL)) |
AnnaBridge | 171:3a7713b1edbc | 114 | #define MXC_V_PT_RATE_LENGTH_MODE_13_BIT_PATTERN ((uint32_t)(0x0x00000013UL)) |
AnnaBridge | 171:3a7713b1edbc | 115 | #define MXC_V_PT_RATE_LENGTH_MODE_14_BIT_PATTERN ((uint32_t)(0x0x00000014UL)) |
AnnaBridge | 171:3a7713b1edbc | 116 | #define MXC_V_PT_RATE_LENGTH_MODE_15_BIT_PATTERN ((uint32_t)(0x0x00000015UL)) |
AnnaBridge | 171:3a7713b1edbc | 117 | #define MXC_V_PT_RATE_LENGTH_MODE_16_BIT_PATTERN ((uint32_t)(0x0x00000016UL)) |
AnnaBridge | 171:3a7713b1edbc | 118 | #define MXC_V_PT_RATE_LENGTH_MODE_17_BIT_PATTERN ((uint32_t)(0x0x00000017UL)) |
AnnaBridge | 171:3a7713b1edbc | 119 | #define MXC_V_PT_RATE_LENGTH_MODE_18_BIT_PATTERN ((uint32_t)(0x0x00000018UL)) |
AnnaBridge | 171:3a7713b1edbc | 120 | #define MXC_V_PT_RATE_LENGTH_MODE_19_BIT_PATTERN ((uint32_t)(0x0x00000019UL)) |
AnnaBridge | 171:3a7713b1edbc | 121 | #define MXC_V_PT_RATE_LENGTH_MODE_20_BIT_PATTERN ((uint32_t)(0x0x00000020UL)) |
AnnaBridge | 171:3a7713b1edbc | 122 | #define MXC_V_PT_RATE_LENGTH_MODE_21_BIT_PATTERN ((uint32_t)(0x0x00000021UL)) |
AnnaBridge | 171:3a7713b1edbc | 123 | #define MXC_V_PT_RATE_LENGTH_MODE_22_BIT_PATTERN ((uint32_t)(0x0x00000022UL)) |
AnnaBridge | 171:3a7713b1edbc | 124 | #define MXC_V_PT_RATE_LENGTH_MODE_23_BIT_PATTERN ((uint32_t)(0x0x00000023UL)) |
AnnaBridge | 171:3a7713b1edbc | 125 | #define MXC_V_PT_RATE_LENGTH_MODE_24_BIT_PATTERN ((uint32_t)(0x0x00000024UL)) |
AnnaBridge | 171:3a7713b1edbc | 126 | #define MXC_V_PT_RATE_LENGTH_MODE_25_BIT_PATTERN ((uint32_t)(0x0x00000025UL)) |
AnnaBridge | 171:3a7713b1edbc | 127 | #define MXC_V_PT_RATE_LENGTH_MODE_26_BIT_PATTERN ((uint32_t)(0x0x00000026UL)) |
AnnaBridge | 171:3a7713b1edbc | 128 | #define MXC_V_PT_RATE_LENGTH_MODE_27_BIT_PATTERN ((uint32_t)(0x0x00000027UL)) |
AnnaBridge | 171:3a7713b1edbc | 129 | #define MXC_V_PT_RATE_LENGTH_MODE_28_BIT_PATTERN ((uint32_t)(0x0x00000028UL)) |
AnnaBridge | 171:3a7713b1edbc | 130 | #define MXC_V_PT_RATE_LENGTH_MODE_29_BIT_PATTERN ((uint32_t)(0x0x00000029UL)) |
AnnaBridge | 171:3a7713b1edbc | 131 | #define MXC_V_PT_RATE_LENGTH_MODE_30_BIT_PATTERN ((uint32_t)(0x0x00000030UL)) |
AnnaBridge | 171:3a7713b1edbc | 132 | #define MXC_V_PT_RATE_LENGTH_MODE_31_BIT_PATTERN ((uint32_t)(0x0x00000031UL)) |
AnnaBridge | 171:3a7713b1edbc | 133 | |
AnnaBridge | 171:3a7713b1edbc | 134 | #define MXC_S_PT_RATE_LENGTH_MODE_32_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_32_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 135 | #define MXC_S_PT_RATE_LENGTH_MODE_SQUARE_WAVE ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_SQUARE_WAVE << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 136 | #define MXC_S_PT_RATE_LENGTH_MODE_2_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_2_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 137 | #define MXC_S_PT_RATE_LENGTH_MODE_3_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_3_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 138 | #define MXC_S_PT_RATE_LENGTH_MODE_4_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_4_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 139 | #define MXC_S_PT_RATE_LENGTH_MODE_5_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_5_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 140 | #define MXC_S_PT_RATE_LENGTH_MODE_6_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_6_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 141 | #define MXC_S_PT_RATE_LENGTH_MODE_7_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_7_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 142 | #define MXC_S_PT_RATE_LENGTH_MODE_8_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_8_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 143 | #define MXC_S_PT_RATE_LENGTH_MODE_9_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_9_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 144 | #define MXC_S_PT_RATE_LENGTH_MODE_10_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_10_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 145 | #define MXC_S_PT_RATE_LENGTH_MODE_11_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_11_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 146 | #define MXC_S_PT_RATE_LENGTH_MODE_12_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_12_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 147 | #define MXC_S_PT_RATE_LENGTH_MODE_13_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_13_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 148 | #define MXC_S_PT_RATE_LENGTH_MODE_14_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_14_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 149 | #define MXC_S_PT_RATE_LENGTH_MODE_15_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_15_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 150 | #define MXC_S_PT_RATE_LENGTH_MODE_16_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_16_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 151 | #define MXC_S_PT_RATE_LENGTH_MODE_17_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_17_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 152 | #define MXC_S_PT_RATE_LENGTH_MODE_18_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_18_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 153 | #define MXC_S_PT_RATE_LENGTH_MODE_19_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_19_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 154 | #define MXC_S_PT_RATE_LENGTH_MODE_20_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_20_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 155 | #define MXC_S_PT_RATE_LENGTH_MODE_21_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_21_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 156 | #define MXC_S_PT_RATE_LENGTH_MODE_22_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_22_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 157 | #define MXC_S_PT_RATE_LENGTH_MODE_23_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_23_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 158 | #define MXC_S_PT_RATE_LENGTH_MODE_24_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_24_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 159 | #define MXC_S_PT_RATE_LENGTH_MODE_25_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_25_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 160 | #define MXC_S_PT_RATE_LENGTH_MODE_26_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_26_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 161 | #define MXC_S_PT_RATE_LENGTH_MODE_27_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_27_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 162 | #define MXC_S_PT_RATE_LENGTH_MODE_28_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_28_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 163 | #define MXC_S_PT_RATE_LENGTH_MODE_29_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_29_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 164 | #define MXC_S_PT_RATE_LENGTH_MODE_30_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_30_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 165 | #define MXC_S_PT_RATE_LENGTH_MODE_31_BIT_PATTERN ((uint32_t)(MXC_V_PT_RATE_LENGTH_MODE_31_BIT_PATTERN << MXC_F_PT_RATE_LENGTH_MODE_POS)) |
AnnaBridge | 171:3a7713b1edbc | 166 | |
AnnaBridge | 171:3a7713b1edbc | 167 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 168 | } |
AnnaBridge | 171:3a7713b1edbc | 169 | #endif |
AnnaBridge | 171:3a7713b1edbc | 170 | |
AnnaBridge | 171:3a7713b1edbc | 171 | /** |
AnnaBridge | 171:3a7713b1edbc | 172 | * @} |
AnnaBridge | 171:3a7713b1edbc | 173 | */ |
AnnaBridge | 171:3a7713b1edbc | 174 | |
AnnaBridge | 171:3a7713b1edbc | 175 | #endif /* _MXC_PT_REGS_H_ */ |