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TARGET_MAX32600MBED/TOOLCHAIN_IAR/aes_regs.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 171:3a7713b1edbc 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 171:3a7713b1edbc 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 171:3a7713b1edbc 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 171:3a7713b1edbc 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 171:3a7713b1edbc 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 171:3a7713b1edbc 12 * in all copies or substantial portions of the Software.
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 171:3a7713b1edbc 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 171:3a7713b1edbc 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 171:3a7713b1edbc 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 171:3a7713b1edbc 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 171:3a7713b1edbc 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 171:3a7713b1edbc 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 171:3a7713b1edbc 24 * Products, Inc. Branding Policy.
AnnaBridge 171:3a7713b1edbc 25 *
AnnaBridge 171:3a7713b1edbc 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 171:3a7713b1edbc 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 171:3a7713b1edbc 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 171:3a7713b1edbc 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 171:3a7713b1edbc 30 * ownership rights.
AnnaBridge 171:3a7713b1edbc 31 *******************************************************************************
AnnaBridge 171:3a7713b1edbc 32 */
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #ifndef _MXC_AES_REGS_H_
AnnaBridge 171:3a7713b1edbc 35 #define _MXC_AES_REGS_H_
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 38 extern "C" {
AnnaBridge 171:3a7713b1edbc 39 #endif
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #include <stdint.h>
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 /**
AnnaBridge 171:3a7713b1edbc 44 * @file aes_regs.h
AnnaBridge 171:3a7713b1edbc 45 * @addtogroup aes AES
AnnaBridge 171:3a7713b1edbc 46 * @{
AnnaBridge 171:3a7713b1edbc 47 */
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /**
AnnaBridge 171:3a7713b1edbc 50 * @brief Settings for AES_CTRL.CRYPT_MODE
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52 typedef enum {
AnnaBridge 171:3a7713b1edbc 53 MXC_E_AES_CTRL_ENCRYPT_MODE = 0,
AnnaBridge 171:3a7713b1edbc 54 MXC_E_AES_CTRL_DECRYPT_MODE = 1
AnnaBridge 171:3a7713b1edbc 55 } mxc_aes_ctrl_crypt_mode_t;
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /**
AnnaBridge 171:3a7713b1edbc 58 * @brief Settings for AES_CTRL.EXP_KEY_MODE
AnnaBridge 171:3a7713b1edbc 59 */
AnnaBridge 171:3a7713b1edbc 60 typedef enum {
AnnaBridge 171:3a7713b1edbc 61 MXC_E_AES_CTRL_CALC_NEW_EXP_KEY = 0,
AnnaBridge 171:3a7713b1edbc 62 MXC_E_AES_CTRL_USE_LAST_EXP_KEY = 1
AnnaBridge 171:3a7713b1edbc 63 } mxc_aes_ctrl_exp_key_mode_t;
AnnaBridge 171:3a7713b1edbc 64
AnnaBridge 171:3a7713b1edbc 65 /**
AnnaBridge 171:3a7713b1edbc 66 * @brief Settings for AES_CTRL.KEY_SIZE
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 typedef enum {
AnnaBridge 171:3a7713b1edbc 69 MXC_E_AES_CTRL_KEY_SIZE_128 = 0,
AnnaBridge 171:3a7713b1edbc 70 MXC_E_AES_CTRL_KEY_SIZE_192 = 1,
AnnaBridge 171:3a7713b1edbc 71 MXC_E_AES_CTRL_KEY_SIZE_256 = 2
AnnaBridge 171:3a7713b1edbc 72 } mxc_aes_ctrl_key_size_t;
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 /* Offset Register Description
AnnaBridge 171:3a7713b1edbc 75 ====== =========================================================== */
AnnaBridge 171:3a7713b1edbc 76 typedef struct {
AnnaBridge 171:3a7713b1edbc 77 __IO uint32_t ctrl; /* 0x0000 AES Control and Status */
AnnaBridge 171:3a7713b1edbc 78 __I uint32_t rsv004; /* 0x0004 */
AnnaBridge 171:3a7713b1edbc 79 __IO uint32_t erase_all; /* 0x0008 Write to Trigger AES Memory Erase */
AnnaBridge 171:3a7713b1edbc 80 } mxc_aes_regs_t;
AnnaBridge 171:3a7713b1edbc 81
AnnaBridge 171:3a7713b1edbc 82 /* Offset Register Description
AnnaBridge 171:3a7713b1edbc 83 ====== =========================================================== */
AnnaBridge 171:3a7713b1edbc 84 typedef struct {
AnnaBridge 171:3a7713b1edbc 85 __IO uint32_t inp[4]; /* 0x0000 AES Input 0..3 */
AnnaBridge 171:3a7713b1edbc 86 __IO uint32_t key[8]; /* 0x0010 AES Key 0..7 */
AnnaBridge 171:3a7713b1edbc 87 __IO uint32_t out[4]; /* 0x0030 AES Output 0..3 */
AnnaBridge 171:3a7713b1edbc 88 __IO uint32_t expkey[8]; /* 0x0040 AES Expanded Key Data 0..7 */
AnnaBridge 171:3a7713b1edbc 89 } mxc_aes_mem_regs_t;
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 /*
AnnaBridge 171:3a7713b1edbc 92 Register offsets for module AES.
AnnaBridge 171:3a7713b1edbc 93 */
AnnaBridge 171:3a7713b1edbc 94 #define MXC_R_AES_OFFS_CTRL ((uint32_t)0x00000000UL)
AnnaBridge 171:3a7713b1edbc 95 #define MXC_R_AES_OFFS_ERASE_ALL ((uint32_t)0x00000008UL)
AnnaBridge 171:3a7713b1edbc 96 #define MXC_R_AES_MEM_OFFS_INP0 ((uint32_t)0x00000000UL)
AnnaBridge 171:3a7713b1edbc 97 #define MXC_R_AES_MEM_OFFS_INP1 ((uint32_t)0x00000004UL)
AnnaBridge 171:3a7713b1edbc 98 #define MXC_R_AES_MEM_OFFS_INP2 ((uint32_t)0x00000008UL)
AnnaBridge 171:3a7713b1edbc 99 #define MXC_R_AES_MEM_OFFS_INP3 ((uint32_t)0x0000000CUL)
AnnaBridge 171:3a7713b1edbc 100 #define MXC_R_AES_MEM_OFFS_KEY0 ((uint32_t)0x00000010UL)
AnnaBridge 171:3a7713b1edbc 101 #define MXC_R_AES_MEM_OFFS_KEY1 ((uint32_t)0x00000014UL)
AnnaBridge 171:3a7713b1edbc 102 #define MXC_R_AES_MEM_OFFS_KEY2 ((uint32_t)0x00000018UL)
AnnaBridge 171:3a7713b1edbc 103 #define MXC_R_AES_MEM_OFFS_KEY3 ((uint32_t)0x0000001CUL)
AnnaBridge 171:3a7713b1edbc 104 #define MXC_R_AES_MEM_OFFS_KEY4 ((uint32_t)0x00000020UL)
AnnaBridge 171:3a7713b1edbc 105 #define MXC_R_AES_MEM_OFFS_KEY5 ((uint32_t)0x00000024UL)
AnnaBridge 171:3a7713b1edbc 106 #define MXC_R_AES_MEM_OFFS_KEY6 ((uint32_t)0x00000028UL)
AnnaBridge 171:3a7713b1edbc 107 #define MXC_R_AES_MEM_OFFS_KEY7 ((uint32_t)0x0000002CUL)
AnnaBridge 171:3a7713b1edbc 108 #define MXC_R_AES_MEM_OFFS_OUT0 ((uint32_t)0x00000030UL)
AnnaBridge 171:3a7713b1edbc 109 #define MXC_R_AES_MEM_OFFS_OUT1 ((uint32_t)0x00000034UL)
AnnaBridge 171:3a7713b1edbc 110 #define MXC_R_AES_MEM_OFFS_OUT2 ((uint32_t)0x00000038UL)
AnnaBridge 171:3a7713b1edbc 111 #define MXC_R_AES_MEM_OFFS_OUT3 ((uint32_t)0x0000003CUL)
AnnaBridge 171:3a7713b1edbc 112 #define MXC_R_AES_MEM_OFFS_EXPKEY0 ((uint32_t)0x00000040UL)
AnnaBridge 171:3a7713b1edbc 113 #define MXC_R_AES_MEM_OFFS_EXPKEY1 ((uint32_t)0x00000044UL)
AnnaBridge 171:3a7713b1edbc 114 #define MXC_R_AES_MEM_OFFS_EXPKEY2 ((uint32_t)0x00000048UL)
AnnaBridge 171:3a7713b1edbc 115 #define MXC_R_AES_MEM_OFFS_EXPKEY3 ((uint32_t)0x0000004CUL)
AnnaBridge 171:3a7713b1edbc 116 #define MXC_R_AES_MEM_OFFS_EXPKEY4 ((uint32_t)0x00000050UL)
AnnaBridge 171:3a7713b1edbc 117 #define MXC_R_AES_MEM_OFFS_EXPKEY5 ((uint32_t)0x00000054UL)
AnnaBridge 171:3a7713b1edbc 118 #define MXC_R_AES_MEM_OFFS_EXPKEY6 ((uint32_t)0x00000058UL)
AnnaBridge 171:3a7713b1edbc 119 #define MXC_R_AES_MEM_OFFS_EXPKEY7 ((uint32_t)0x0000005CUL)
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 #define MXC_F_AES_CTRL_START_POS 0
AnnaBridge 171:3a7713b1edbc 122 #define MXC_F_AES_CTRL_START ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_START_POS))
AnnaBridge 171:3a7713b1edbc 123 #define MXC_F_AES_CTRL_CRYPT_MODE_POS 1
AnnaBridge 171:3a7713b1edbc 124 #define MXC_F_AES_CTRL_CRYPT_MODE ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_CRYPT_MODE_POS))
AnnaBridge 171:3a7713b1edbc 125 #define MXC_F_AES_CTRL_EXP_KEY_MODE_POS 2
AnnaBridge 171:3a7713b1edbc 126 #define MXC_F_AES_CTRL_EXP_KEY_MODE ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
AnnaBridge 171:3a7713b1edbc 127 #define MXC_F_AES_CTRL_KEY_SIZE_POS 3
AnnaBridge 171:3a7713b1edbc 128 #define MXC_F_AES_CTRL_KEY_SIZE ((uint32_t)(0x00000003UL << MXC_F_AES_CTRL_KEY_SIZE_POS))
AnnaBridge 171:3a7713b1edbc 129 #define MXC_F_AES_CTRL_INTEN_POS 5
AnnaBridge 171:3a7713b1edbc 130 #define MXC_F_AES_CTRL_INTEN ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTEN_POS))
AnnaBridge 171:3a7713b1edbc 131 #define MXC_F_AES_CTRL_INTFL_POS 6
AnnaBridge 171:3a7713b1edbc 132 #define MXC_F_AES_CTRL_INTFL ((uint32_t)(0x00000001UL << MXC_F_AES_CTRL_INTFL_POS))
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 #define MXC_V_AES_CTRL_ENCRYPT_MODE 0
AnnaBridge 171:3a7713b1edbc 135 #define MXC_V_AES_CTRL_DECRYPT_MODE 1
AnnaBridge 171:3a7713b1edbc 136 #define MXC_S_AES_CTRL_ENCRYPT_MODE ((uint32_t)(MXC_V_AES_CTRL_ENCRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
AnnaBridge 171:3a7713b1edbc 137 #define MXC_S_AES_CTRL_DECRYPT_MODE ((uint32_t)(MXC_V_AES_CTRL_DECRYPT_MODE << MXC_F_AES_CTRL_CRYPT_MODE_POS))
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 #define MXC_V_AES_CTRL_CALC_NEW_EXP_KEY 0
AnnaBridge 171:3a7713b1edbc 140 #define MXC_V_AES_CTRL_USE_LAST_EXP_KEY 1
AnnaBridge 171:3a7713b1edbc 141 #define MXC_S_AES_CTRL_CALC_NEW_EXP_KEY ((uint32_t)(MXC_V_AES_CTRL_CALC_NEW_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
AnnaBridge 171:3a7713b1edbc 142 #define MXC_S_AES_CTRL_USE_LAST_EXP_KEY ((uint32_t)(MXC_V_AES_CTRL_USE_LAST_EXP_KEY << MXC_F_AES_CTRL_EXP_KEY_MODE_POS))
AnnaBridge 171:3a7713b1edbc 143
AnnaBridge 171:3a7713b1edbc 144 #define MXC_V_AES_CTRL_KEY_SIZE_128 0
AnnaBridge 171:3a7713b1edbc 145 #define MXC_V_AES_CTRL_KEY_SIZE_192 1
AnnaBridge 171:3a7713b1edbc 146 #define MXC_V_AES_CTRL_KEY_SIZE_256 2
AnnaBridge 171:3a7713b1edbc 147 #define MXC_S_AES_CTRL_KEY_SIZE_128 ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_128 << MXC_F_AES_CTRL_KEY_SIZE_POS))
AnnaBridge 171:3a7713b1edbc 148 #define MXC_S_AES_CTRL_KEY_SIZE_192 ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_192 << MXC_F_AES_CTRL_KEY_SIZE_POS))
AnnaBridge 171:3a7713b1edbc 149 #define MXC_S_AES_CTRL_KEY_SIZE_256 ((uint32_t)(MXC_V_AES_CTRL_KEY_SIZE_256 << MXC_F_AES_CTRL_KEY_SIZE_POS))
AnnaBridge 171:3a7713b1edbc 150
AnnaBridge 171:3a7713b1edbc 151 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 152 }
AnnaBridge 171:3a7713b1edbc 153 #endif
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 /**
AnnaBridge 171:3a7713b1edbc 156 * @}
AnnaBridge 171:3a7713b1edbc 157 */
AnnaBridge 171:3a7713b1edbc 158
AnnaBridge 171:3a7713b1edbc 159 #endif /* _MXC_AES_REGS_H_ */