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TARGET_KW24D/TOOLCHAIN_GCC_ARM/PeripheralNames.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /* mbed Microcontroller Library |
AnnaBridge | 171:3a7713b1edbc | 2 | * Copyright (c) 2006-2013 ARM Limited |
AnnaBridge | 171:3a7713b1edbc | 3 | * |
AnnaBridge | 171:3a7713b1edbc | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 171:3a7713b1edbc | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 171:3a7713b1edbc | 6 | * You may obtain a copy of the License at |
AnnaBridge | 171:3a7713b1edbc | 7 | * |
AnnaBridge | 171:3a7713b1edbc | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 171:3a7713b1edbc | 9 | * |
AnnaBridge | 171:3a7713b1edbc | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 171:3a7713b1edbc | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 171:3a7713b1edbc | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 171:3a7713b1edbc | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 171:3a7713b1edbc | 14 | * limitations under the License. |
AnnaBridge | 171:3a7713b1edbc | 15 | */ |
AnnaBridge | 171:3a7713b1edbc | 16 | #ifndef MBED_PERIPHERALNAMES_H |
AnnaBridge | 171:3a7713b1edbc | 17 | #define MBED_PERIPHERALNAMES_H |
AnnaBridge | 171:3a7713b1edbc | 18 | |
AnnaBridge | 171:3a7713b1edbc | 19 | #include "cmsis.h" |
AnnaBridge | 171:3a7713b1edbc | 20 | |
AnnaBridge | 171:3a7713b1edbc | 21 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 22 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 23 | #endif |
AnnaBridge | 171:3a7713b1edbc | 24 | |
AnnaBridge | 171:3a7713b1edbc | 25 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 26 | OSC32KCLK = 0, |
AnnaBridge | 171:3a7713b1edbc | 27 | } RTCName; |
AnnaBridge | 171:3a7713b1edbc | 28 | |
AnnaBridge | 171:3a7713b1edbc | 29 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 30 | UART_0 = 0, |
AnnaBridge | 171:3a7713b1edbc | 31 | UART_1 = 1, |
AnnaBridge | 171:3a7713b1edbc | 32 | UART_2 = 2, |
AnnaBridge | 171:3a7713b1edbc | 33 | } UARTName; |
AnnaBridge | 171:3a7713b1edbc | 34 | |
AnnaBridge | 171:3a7713b1edbc | 35 | #define STDIO_UART_TX USBTX |
AnnaBridge | 171:3a7713b1edbc | 36 | #define STDIO_UART_RX USBRX |
AnnaBridge | 171:3a7713b1edbc | 37 | #define STDIO_UART UART_1 |
AnnaBridge | 171:3a7713b1edbc | 38 | |
AnnaBridge | 171:3a7713b1edbc | 39 | /* SPI defines used to communicate with the MCR20 RF device */ |
AnnaBridge | 171:3a7713b1edbc | 40 | #define MCR20A_SPI_MOSI PTB16 |
AnnaBridge | 171:3a7713b1edbc | 41 | #define MCR20A_SPI_MISO PTB17 |
AnnaBridge | 171:3a7713b1edbc | 42 | #define MCR20A_SPI_SCLK PTB11 |
AnnaBridge | 171:3a7713b1edbc | 43 | #define MCR20A_SPI_CS PTB10 |
AnnaBridge | 171:3a7713b1edbc | 44 | #define MCR20A_SPI_RST PTB19 |
AnnaBridge | 171:3a7713b1edbc | 45 | #define MCR20A_SPI_IRQ PTB3 |
AnnaBridge | 171:3a7713b1edbc | 46 | |
AnnaBridge | 171:3a7713b1edbc | 47 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 48 | I2C_0 = 0, |
AnnaBridge | 171:3a7713b1edbc | 49 | I2C_1 = 1, |
AnnaBridge | 171:3a7713b1edbc | 50 | } I2CName; |
AnnaBridge | 171:3a7713b1edbc | 51 | |
AnnaBridge | 171:3a7713b1edbc | 52 | #define TPM_SHIFT 8 |
AnnaBridge | 171:3a7713b1edbc | 53 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 54 | PWM_0 = (0 << TPM_SHIFT) | (0), // FTM0 CH0 |
AnnaBridge | 171:3a7713b1edbc | 55 | PWM_1 = (0 << TPM_SHIFT) | (1), // FTM0 CH1 |
AnnaBridge | 171:3a7713b1edbc | 56 | PWM_2 = (0 << TPM_SHIFT) | (2), // FTM0 CH2 |
AnnaBridge | 171:3a7713b1edbc | 57 | PWM_3 = (0 << TPM_SHIFT) | (3), // FTM0 CH3 |
AnnaBridge | 171:3a7713b1edbc | 58 | PWM_4 = (0 << TPM_SHIFT) | (4), // FTM0 CH4 |
AnnaBridge | 171:3a7713b1edbc | 59 | PWM_5 = (0 << TPM_SHIFT) | (5), // FTM0 CH5 |
AnnaBridge | 171:3a7713b1edbc | 60 | PWM_6 = (0 << TPM_SHIFT) | (6), // FTM0 CH6 |
AnnaBridge | 171:3a7713b1edbc | 61 | PWM_7 = (0 << TPM_SHIFT) | (7), // FTM0 CH7 |
AnnaBridge | 171:3a7713b1edbc | 62 | PWM_8 = (1 << TPM_SHIFT) | (0), // FTM1 CH0 |
AnnaBridge | 171:3a7713b1edbc | 63 | PWM_9 = (1 << TPM_SHIFT) | (1), // FTM1 CH1 |
AnnaBridge | 171:3a7713b1edbc | 64 | PWM_10 = (2 << TPM_SHIFT) | (0), // FTM2 CH0 |
AnnaBridge | 171:3a7713b1edbc | 65 | PWM_11 = (2 << TPM_SHIFT) | (1), // FTM2 CH1 |
AnnaBridge | 171:3a7713b1edbc | 66 | } PWMName; |
AnnaBridge | 171:3a7713b1edbc | 67 | |
AnnaBridge | 171:3a7713b1edbc | 68 | #define ADC_INSTANCE_SHIFT 8 |
AnnaBridge | 171:3a7713b1edbc | 69 | #define ADC_B_CHANNEL_SHIFT 5 |
AnnaBridge | 171:3a7713b1edbc | 70 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 71 | ADC0_SE4a = (0 << ADC_INSTANCE_SHIFT) | 4, |
AnnaBridge | 171:3a7713b1edbc | 72 | ADC0_SE5a = (0 << ADC_INSTANCE_SHIFT) | 5, |
AnnaBridge | 171:3a7713b1edbc | 73 | ADC0_SE6a = (0 << ADC_INSTANCE_SHIFT) | 6, |
AnnaBridge | 171:3a7713b1edbc | 74 | ADC0_SE7a = (0 << ADC_INSTANCE_SHIFT) | 7, |
AnnaBridge | 171:3a7713b1edbc | 75 | ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4, |
AnnaBridge | 171:3a7713b1edbc | 76 | ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5, |
AnnaBridge | 171:3a7713b1edbc | 77 | ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6, |
AnnaBridge | 171:3a7713b1edbc | 78 | ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7, |
AnnaBridge | 171:3a7713b1edbc | 79 | ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8, |
AnnaBridge | 171:3a7713b1edbc | 80 | ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9, |
AnnaBridge | 171:3a7713b1edbc | 81 | ADC0_SE10 = (0 << ADC_INSTANCE_SHIFT) | 10, |
AnnaBridge | 171:3a7713b1edbc | 82 | ADC0_SE11 = (0 << ADC_INSTANCE_SHIFT) | 11, |
AnnaBridge | 171:3a7713b1edbc | 83 | ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12, |
AnnaBridge | 171:3a7713b1edbc | 84 | ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13, |
AnnaBridge | 171:3a7713b1edbc | 85 | ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14, |
AnnaBridge | 171:3a7713b1edbc | 86 | ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15, |
AnnaBridge | 171:3a7713b1edbc | 87 | ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21, |
AnnaBridge | 171:3a7713b1edbc | 88 | ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22, |
AnnaBridge | 171:3a7713b1edbc | 89 | ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23, |
AnnaBridge | 171:3a7713b1edbc | 90 | } ADCName; |
AnnaBridge | 171:3a7713b1edbc | 91 | |
AnnaBridge | 171:3a7713b1edbc | 92 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 93 | DAC_0 = 0 |
AnnaBridge | 171:3a7713b1edbc | 94 | } DACName; |
AnnaBridge | 171:3a7713b1edbc | 95 | |
AnnaBridge | 171:3a7713b1edbc | 96 | |
AnnaBridge | 171:3a7713b1edbc | 97 | typedef enum { |
AnnaBridge | 171:3a7713b1edbc | 98 | SPI_0 = 0, |
AnnaBridge | 171:3a7713b1edbc | 99 | SPI_1 = 1, |
AnnaBridge | 171:3a7713b1edbc | 100 | } SPIName; |
AnnaBridge | 171:3a7713b1edbc | 101 | |
AnnaBridge | 171:3a7713b1edbc | 102 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 103 | } |
AnnaBridge | 171:3a7713b1edbc | 104 | #endif |
AnnaBridge | 171:3a7713b1edbc | 105 | |
AnnaBridge | 171:3a7713b1edbc | 106 | #endif |