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TARGET_KL43Z/TOOLCHAIN_IAR/fsl_adc16.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30
AnnaBridge 171:3a7713b1edbc 31 #ifndef _FSL_ADC16_H_
AnnaBridge 171:3a7713b1edbc 32 #define _FSL_ADC16_H_
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /*!
AnnaBridge 171:3a7713b1edbc 37 * @addtogroup adc16
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 */
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*! @file */
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 44 * Definitions
AnnaBridge 171:3a7713b1edbc 45 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 48 /*@{*/
AnnaBridge 171:3a7713b1edbc 49 /*! @brief ADC16 driver version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 50 #define FSL_ADC16_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
AnnaBridge 171:3a7713b1edbc 51 /*@}*/
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /*!
AnnaBridge 171:3a7713b1edbc 54 * @brief Channel status flags.
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56 enum _adc16_channel_status_flags
AnnaBridge 171:3a7713b1edbc 57 {
AnnaBridge 171:3a7713b1edbc 58 kADC16_ChannelConversionDoneFlag = ADC_SC1_COCO_MASK, /*!< Conversion done. */
AnnaBridge 171:3a7713b1edbc 59 };
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61 /*!
AnnaBridge 171:3a7713b1edbc 62 * @brief Converter status flags.
AnnaBridge 171:3a7713b1edbc 63 */
AnnaBridge 171:3a7713b1edbc 64 enum _adc16_status_flags
AnnaBridge 171:3a7713b1edbc 65 {
AnnaBridge 171:3a7713b1edbc 66 kADC16_ActiveFlag = ADC_SC2_ADACT_MASK, /*!< Converter is active. */
AnnaBridge 171:3a7713b1edbc 67 #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
AnnaBridge 171:3a7713b1edbc 68 kADC16_CalibrationFailedFlag = ADC_SC3_CALF_MASK, /*!< Calibration is failed. */
AnnaBridge 171:3a7713b1edbc 69 #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */
AnnaBridge 171:3a7713b1edbc 70 };
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 #if defined(FSL_FEATURE_ADC16_HAS_MUX_SELECT) && FSL_FEATURE_ADC16_HAS_MUX_SELECT
AnnaBridge 171:3a7713b1edbc 73 /*!
AnnaBridge 171:3a7713b1edbc 74 * @brief Channel multiplexer mode for each channel.
AnnaBridge 171:3a7713b1edbc 75 *
AnnaBridge 171:3a7713b1edbc 76 * For some ADC16 channels, there are two pin selections in channel multiplexer. For example, ADC0_SE4a and ADC0_SE4b
AnnaBridge 171:3a7713b1edbc 77 * are the different channels but share the same channel number.
AnnaBridge 171:3a7713b1edbc 78 */
AnnaBridge 171:3a7713b1edbc 79 typedef enum _adc_channel_mux_mode
AnnaBridge 171:3a7713b1edbc 80 {
AnnaBridge 171:3a7713b1edbc 81 kADC16_ChannelMuxA = 0U, /*!< For channel with channel mux a. */
AnnaBridge 171:3a7713b1edbc 82 kADC16_ChannelMuxB = 1U, /*!< For channel with channel mux b. */
AnnaBridge 171:3a7713b1edbc 83 } adc16_channel_mux_mode_t;
AnnaBridge 171:3a7713b1edbc 84 #endif /* FSL_FEATURE_ADC16_HAS_MUX_SELECT */
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 /*!
AnnaBridge 171:3a7713b1edbc 87 * @brief Clock divider for the converter.
AnnaBridge 171:3a7713b1edbc 88 */
AnnaBridge 171:3a7713b1edbc 89 typedef enum _adc16_clock_divider
AnnaBridge 171:3a7713b1edbc 90 {
AnnaBridge 171:3a7713b1edbc 91 kADC16_ClockDivider1 = 0U, /*!< For divider 1 from the input clock to the module. */
AnnaBridge 171:3a7713b1edbc 92 kADC16_ClockDivider2 = 1U, /*!< For divider 2 from the input clock to the module. */
AnnaBridge 171:3a7713b1edbc 93 kADC16_ClockDivider4 = 2U, /*!< For divider 4 from the input clock to the module. */
AnnaBridge 171:3a7713b1edbc 94 kADC16_ClockDivider8 = 3U, /*!< For divider 8 from the input clock to the module. */
AnnaBridge 171:3a7713b1edbc 95 } adc16_clock_divider_t;
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /*!
AnnaBridge 171:3a7713b1edbc 98 *@brief Converter's resolution.
AnnaBridge 171:3a7713b1edbc 99 */
AnnaBridge 171:3a7713b1edbc 100 typedef enum _adc16_resolution
AnnaBridge 171:3a7713b1edbc 101 {
AnnaBridge 171:3a7713b1edbc 102 /* This group of enumeration is for internal use which is related to register setting. */
AnnaBridge 171:3a7713b1edbc 103 kADC16_Resolution8or9Bit = 0U, /*!< Single End 8-bit or Differential Sample 9-bit. */
AnnaBridge 171:3a7713b1edbc 104 kADC16_Resolution12or13Bit = 1U, /*!< Single End 12-bit or Differential Sample 13-bit. */
AnnaBridge 171:3a7713b1edbc 105 kADC16_Resolution10or11Bit = 2U, /*!< Single End 10-bit or Differential Sample 11-bit. */
AnnaBridge 171:3a7713b1edbc 106
AnnaBridge 171:3a7713b1edbc 107 /* This group of enumeration is for public user. */
AnnaBridge 171:3a7713b1edbc 108 kADC16_ResolutionSE8Bit = kADC16_Resolution8or9Bit, /*!< Single End 8-bit. */
AnnaBridge 171:3a7713b1edbc 109 kADC16_ResolutionSE12Bit = kADC16_Resolution12or13Bit, /*!< Single End 12-bit. */
AnnaBridge 171:3a7713b1edbc 110 kADC16_ResolutionSE10Bit = kADC16_Resolution10or11Bit, /*!< Single End 10-bit. */
AnnaBridge 171:3a7713b1edbc 111 #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
AnnaBridge 171:3a7713b1edbc 112 kADC16_ResolutionDF9Bit = kADC16_Resolution8or9Bit, /*!< Differential Sample 9-bit. */
AnnaBridge 171:3a7713b1edbc 113 kADC16_ResolutionDF13Bit = kADC16_Resolution12or13Bit, /*!< Differential Sample 13-bit. */
AnnaBridge 171:3a7713b1edbc 114 kADC16_ResolutionDF11Bit = kADC16_Resolution10or11Bit, /*!< Differential Sample 11-bit. */
AnnaBridge 171:3a7713b1edbc 115 #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */
AnnaBridge 171:3a7713b1edbc 116
AnnaBridge 171:3a7713b1edbc 117 #if defined(FSL_FEATURE_ADC16_MAX_RESOLUTION) && (FSL_FEATURE_ADC16_MAX_RESOLUTION >= 16U)
AnnaBridge 171:3a7713b1edbc 118 /* 16-bit is supported by default. */
AnnaBridge 171:3a7713b1edbc 119 kADC16_Resolution16Bit = 3U, /*!< Single End 16-bit or Differential Sample 16-bit. */
AnnaBridge 171:3a7713b1edbc 120 kADC16_ResolutionSE16Bit = kADC16_Resolution16Bit, /*!< Single End 16-bit. */
AnnaBridge 171:3a7713b1edbc 121 #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
AnnaBridge 171:3a7713b1edbc 122 kADC16_ResolutionDF16Bit = kADC16_Resolution16Bit, /*!< Differential Sample 16-bit. */
AnnaBridge 171:3a7713b1edbc 123 #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */
AnnaBridge 171:3a7713b1edbc 124 #endif /* FSL_FEATURE_ADC16_MAX_RESOLUTION >= 16U */
AnnaBridge 171:3a7713b1edbc 125 } adc16_resolution_t;
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /*!
AnnaBridge 171:3a7713b1edbc 128 * @brief Clock source.
AnnaBridge 171:3a7713b1edbc 129 */
AnnaBridge 171:3a7713b1edbc 130 typedef enum _adc16_clock_source
AnnaBridge 171:3a7713b1edbc 131 {
AnnaBridge 171:3a7713b1edbc 132 kADC16_ClockSourceAlt0 = 0U, /*!< Selection 0 of the clock source. */
AnnaBridge 171:3a7713b1edbc 133 kADC16_ClockSourceAlt1 = 1U, /*!< Selection 1 of the clock source. */
AnnaBridge 171:3a7713b1edbc 134 kADC16_ClockSourceAlt2 = 2U, /*!< Selection 2 of the clock source. */
AnnaBridge 171:3a7713b1edbc 135 kADC16_ClockSourceAlt3 = 3U, /*!< Selection 3 of the clock source. */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 /* Chip defined clock source */
AnnaBridge 171:3a7713b1edbc 138 kADC16_ClockSourceAsynchronousClock = kADC16_ClockSourceAlt3, /*!< Using internal asynchronous clock. */
AnnaBridge 171:3a7713b1edbc 139 } adc16_clock_source_t;
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 /*!
AnnaBridge 171:3a7713b1edbc 142 * @brief Long sample mode.
AnnaBridge 171:3a7713b1edbc 143 */
AnnaBridge 171:3a7713b1edbc 144 typedef enum _adc16_long_sample_mode
AnnaBridge 171:3a7713b1edbc 145 {
AnnaBridge 171:3a7713b1edbc 146 kADC16_LongSampleCycle24 = 0U, /*!< 20 extra ADCK cycles, 24 ADCK cycles total. */
AnnaBridge 171:3a7713b1edbc 147 kADC16_LongSampleCycle16 = 1U, /*!< 12 extra ADCK cycles, 16 ADCK cycles total. */
AnnaBridge 171:3a7713b1edbc 148 kADC16_LongSampleCycle10 = 2U, /*!< 6 extra ADCK cycles, 10 ADCK cycles total. */
AnnaBridge 171:3a7713b1edbc 149 kADC16_LongSampleCycle6 = 3U, /*!< 2 extra ADCK cycles, 6 ADCK cycles total. */
AnnaBridge 171:3a7713b1edbc 150 kADC16_LongSampleDisabled = 4U, /*!< Disable the long sample feature. */
AnnaBridge 171:3a7713b1edbc 151 } adc16_long_sample_mode_t;
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /*!
AnnaBridge 171:3a7713b1edbc 154 * @brief Reference voltage source.
AnnaBridge 171:3a7713b1edbc 155 */
AnnaBridge 171:3a7713b1edbc 156 typedef enum _adc16_reference_voltage_source
AnnaBridge 171:3a7713b1edbc 157 {
AnnaBridge 171:3a7713b1edbc 158 kADC16_ReferenceVoltageSourceVref = 0U, /*!< For external pins pair of VrefH and VrefL. */
AnnaBridge 171:3a7713b1edbc 159 kADC16_ReferenceVoltageSourceValt = 1U, /*!< For alternate reference pair of ValtH and ValtL. */
AnnaBridge 171:3a7713b1edbc 160 } adc16_reference_voltage_source_t;
AnnaBridge 171:3a7713b1edbc 161
AnnaBridge 171:3a7713b1edbc 162 #if defined(FSL_FEATURE_ADC16_HAS_HW_AVERAGE) && FSL_FEATURE_ADC16_HAS_HW_AVERAGE
AnnaBridge 171:3a7713b1edbc 163 /*!
AnnaBridge 171:3a7713b1edbc 164 * @brief Hardware average mode.
AnnaBridge 171:3a7713b1edbc 165 */
AnnaBridge 171:3a7713b1edbc 166 typedef enum _adc16_hardware_average_mode
AnnaBridge 171:3a7713b1edbc 167 {
AnnaBridge 171:3a7713b1edbc 168 kADC16_HardwareAverageCount4 = 0U, /*!< For hardware average with 4 samples. */
AnnaBridge 171:3a7713b1edbc 169 kADC16_HardwareAverageCount8 = 1U, /*!< For hardware average with 8 samples. */
AnnaBridge 171:3a7713b1edbc 170 kADC16_HardwareAverageCount16 = 2U, /*!< For hardware average with 16 samples. */
AnnaBridge 171:3a7713b1edbc 171 kADC16_HardwareAverageCount32 = 3U, /*!< For hardware average with 32 samples. */
AnnaBridge 171:3a7713b1edbc 172 kADC16_HardwareAverageDisabled = 4U, /*!< Disable the hardware average feature.*/
AnnaBridge 171:3a7713b1edbc 173 } adc16_hardware_average_mode_t;
AnnaBridge 171:3a7713b1edbc 174 #endif /* FSL_FEATURE_ADC16_HAS_HW_AVERAGE */
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 /*!
AnnaBridge 171:3a7713b1edbc 177 * @brief Hardware compare mode.
AnnaBridge 171:3a7713b1edbc 178 */
AnnaBridge 171:3a7713b1edbc 179 typedef enum _adc16_hardware_compare_mode
AnnaBridge 171:3a7713b1edbc 180 {
AnnaBridge 171:3a7713b1edbc 181 kADC16_HardwareCompareMode0 = 0U, /*!< x < value1. */
AnnaBridge 171:3a7713b1edbc 182 kADC16_HardwareCompareMode1 = 1U, /*!< x > value1. */
AnnaBridge 171:3a7713b1edbc 183 kADC16_HardwareCompareMode2 = 2U, /*!< if value1 <= value2, then x < value1 || x > value2;
AnnaBridge 171:3a7713b1edbc 184 else, value1 > x > value2. */
AnnaBridge 171:3a7713b1edbc 185 kADC16_HardwareCompareMode3 = 3U, /*!< if value1 <= value2, then value1 <= x <= value2;
AnnaBridge 171:3a7713b1edbc 186 else x >= value1 || x <= value2. */
AnnaBridge 171:3a7713b1edbc 187 } adc16_hardware_compare_mode_t;
AnnaBridge 171:3a7713b1edbc 188
AnnaBridge 171:3a7713b1edbc 189 #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA
AnnaBridge 171:3a7713b1edbc 190 /*!
AnnaBridge 171:3a7713b1edbc 191 * @brief PGA's Gain mode.
AnnaBridge 171:3a7713b1edbc 192 */
AnnaBridge 171:3a7713b1edbc 193 typedef enum _adc16_pga_gain
AnnaBridge 171:3a7713b1edbc 194 {
AnnaBridge 171:3a7713b1edbc 195 kADC16_PGAGainValueOf1 = 0U, /*!< For amplifier gain of 1. */
AnnaBridge 171:3a7713b1edbc 196 kADC16_PGAGainValueOf2 = 1U, /*!< For amplifier gain of 2. */
AnnaBridge 171:3a7713b1edbc 197 kADC16_PGAGainValueOf4 = 2U, /*!< For amplifier gain of 4. */
AnnaBridge 171:3a7713b1edbc 198 kADC16_PGAGainValueOf8 = 3U, /*!< For amplifier gain of 8. */
AnnaBridge 171:3a7713b1edbc 199 kADC16_PGAGainValueOf16 = 4U, /*!< For amplifier gain of 16. */
AnnaBridge 171:3a7713b1edbc 200 kADC16_PGAGainValueOf32 = 5U, /*!< For amplifier gain of 32. */
AnnaBridge 171:3a7713b1edbc 201 kADC16_PGAGainValueOf64 = 6U, /*!< For amplifier gain of 64. */
AnnaBridge 171:3a7713b1edbc 202 } adc16_pga_gain_t;
AnnaBridge 171:3a7713b1edbc 203 #endif /* FSL_FEATURE_ADC16_HAS_PGA */
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 /*!
AnnaBridge 171:3a7713b1edbc 206 * @brief ADC16 converter configuration .
AnnaBridge 171:3a7713b1edbc 207 */
AnnaBridge 171:3a7713b1edbc 208 typedef struct _adc16_config
AnnaBridge 171:3a7713b1edbc 209 {
AnnaBridge 171:3a7713b1edbc 210 adc16_reference_voltage_source_t referenceVoltageSource; /*!< Select the reference voltage source. */
AnnaBridge 171:3a7713b1edbc 211 adc16_clock_source_t clockSource; /*!< Select the input clock source to converter. */
AnnaBridge 171:3a7713b1edbc 212 bool enableAsynchronousClock; /*!< Enable the asynchronous clock output. */
AnnaBridge 171:3a7713b1edbc 213 adc16_clock_divider_t clockDivider; /*!< Select the divider of input clock source. */
AnnaBridge 171:3a7713b1edbc 214 adc16_resolution_t resolution; /*!< Select the sample resolution mode. */
AnnaBridge 171:3a7713b1edbc 215 adc16_long_sample_mode_t longSampleMode; /*!< Select the long sample mode. */
AnnaBridge 171:3a7713b1edbc 216 bool enableHighSpeed; /*!< Enable the high-speed mode. */
AnnaBridge 171:3a7713b1edbc 217 bool enableLowPower; /*!< Enable low power. */
AnnaBridge 171:3a7713b1edbc 218 bool enableContinuousConversion; /*!< Enable continuous conversion mode. */
AnnaBridge 171:3a7713b1edbc 219 } adc16_config_t;
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 /*!
AnnaBridge 171:3a7713b1edbc 222 * @brief ADC16 Hardware compare configuration.
AnnaBridge 171:3a7713b1edbc 223 */
AnnaBridge 171:3a7713b1edbc 224 typedef struct _adc16_hardware_compare_config
AnnaBridge 171:3a7713b1edbc 225 {
AnnaBridge 171:3a7713b1edbc 226 adc16_hardware_compare_mode_t hardwareCompareMode; /*!< Select the hardware compare mode.
AnnaBridge 171:3a7713b1edbc 227 See "adc16_hardware_compare_mode_t". */
AnnaBridge 171:3a7713b1edbc 228 int16_t value1; /*!< Setting value1 for hardware compare mode. */
AnnaBridge 171:3a7713b1edbc 229 int16_t value2; /*!< Setting value2 for hardware compare mode. */
AnnaBridge 171:3a7713b1edbc 230 } adc16_hardware_compare_config_t;
AnnaBridge 171:3a7713b1edbc 231
AnnaBridge 171:3a7713b1edbc 232 /*!
AnnaBridge 171:3a7713b1edbc 233 * @brief ADC16 channel conversion configuration.
AnnaBridge 171:3a7713b1edbc 234 */
AnnaBridge 171:3a7713b1edbc 235 typedef struct _adc16_channel_config
AnnaBridge 171:3a7713b1edbc 236 {
AnnaBridge 171:3a7713b1edbc 237 uint32_t channelNumber; /*!< Setting the conversion channel number. The available range is 0-31.
AnnaBridge 171:3a7713b1edbc 238 See channel connection information for each chip in Reference
AnnaBridge 171:3a7713b1edbc 239 Manual document. */
AnnaBridge 171:3a7713b1edbc 240 bool enableInterruptOnConversionCompleted; /*!< Generate a interrupt request once the conversion is completed. */
AnnaBridge 171:3a7713b1edbc 241 #if defined(FSL_FEATURE_ADC16_HAS_DIFF_MODE) && FSL_FEATURE_ADC16_HAS_DIFF_MODE
AnnaBridge 171:3a7713b1edbc 242 bool enableDifferentialConversion; /*!< Using Differential sample mode. */
AnnaBridge 171:3a7713b1edbc 243 #endif /* FSL_FEATURE_ADC16_HAS_DIFF_MODE */
AnnaBridge 171:3a7713b1edbc 244 } adc16_channel_config_t;
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA
AnnaBridge 171:3a7713b1edbc 247 /*!
AnnaBridge 171:3a7713b1edbc 248 * @brief ADC16 programmable gain amplifier configuration.
AnnaBridge 171:3a7713b1edbc 249 */
AnnaBridge 171:3a7713b1edbc 250 typedef struct _adc16_pga_config
AnnaBridge 171:3a7713b1edbc 251 {
AnnaBridge 171:3a7713b1edbc 252 adc16_pga_gain_t pgaGain; /*!< Setting PGA gain. */
AnnaBridge 171:3a7713b1edbc 253 bool enableRunInNormalMode; /*!< Enable PGA working in normal mode, or low power mode by default. */
AnnaBridge 171:3a7713b1edbc 254 #if defined(FSL_FEATURE_ADC16_HAS_PGA_CHOPPING) && FSL_FEATURE_ADC16_HAS_PGA_CHOPPING
AnnaBridge 171:3a7713b1edbc 255 bool disablePgaChopping; /*!< Disable the PGA chopping function.
AnnaBridge 171:3a7713b1edbc 256 The PGA employs chopping to remove/reduce offset and 1/f noise and offers
AnnaBridge 171:3a7713b1edbc 257 an offset measurement configuration that aids the offset calibration. */
AnnaBridge 171:3a7713b1edbc 258 #endif /* FSL_FEATURE_ADC16_HAS_PGA_CHOPPING */
AnnaBridge 171:3a7713b1edbc 259 #if defined(FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT) && FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT
AnnaBridge 171:3a7713b1edbc 260 bool enableRunInOffsetMeasurement; /*!< Enable the PGA working in offset measurement mode.
AnnaBridge 171:3a7713b1edbc 261 When this feature is enabled, the PGA disconnects itself from the external
AnnaBridge 171:3a7713b1edbc 262 inputs and auto-configures into offset measurement mode. With this field
AnnaBridge 171:3a7713b1edbc 263 set, run the ADC in the recommended settings and enable the maximum hardware
AnnaBridge 171:3a7713b1edbc 264 averaging to get the PGA offset number. The output is the
AnnaBridge 171:3a7713b1edbc 265 (PGA offset * (64+1)) for the given PGA setting. */
AnnaBridge 171:3a7713b1edbc 266 #endif /* FSL_FEATURE_ADC16_HAS_PGA_OFFSET_MEASUREMENT */
AnnaBridge 171:3a7713b1edbc 267 } adc16_pga_config_t;
AnnaBridge 171:3a7713b1edbc 268 #endif /* FSL_FEATURE_ADC16_HAS_PGA */
AnnaBridge 171:3a7713b1edbc 269
AnnaBridge 171:3a7713b1edbc 270 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 271 extern "C" {
AnnaBridge 171:3a7713b1edbc 272 #endif
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 275 * API
AnnaBridge 171:3a7713b1edbc 276 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 /*!
AnnaBridge 171:3a7713b1edbc 279 * @name Initialization
AnnaBridge 171:3a7713b1edbc 280 * @{
AnnaBridge 171:3a7713b1edbc 281 */
AnnaBridge 171:3a7713b1edbc 282
AnnaBridge 171:3a7713b1edbc 283 /*!
AnnaBridge 171:3a7713b1edbc 284 * @brief Initializes the ADC16 module.
AnnaBridge 171:3a7713b1edbc 285 *
AnnaBridge 171:3a7713b1edbc 286 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 287 * @param config Pointer to configuration structure. See "adc16_config_t".
AnnaBridge 171:3a7713b1edbc 288 */
AnnaBridge 171:3a7713b1edbc 289 void ADC16_Init(ADC_Type *base, const adc16_config_t *config);
AnnaBridge 171:3a7713b1edbc 290
AnnaBridge 171:3a7713b1edbc 291 /*!
AnnaBridge 171:3a7713b1edbc 292 * @brief De-initializes the ADC16 module.
AnnaBridge 171:3a7713b1edbc 293 *
AnnaBridge 171:3a7713b1edbc 294 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 295 */
AnnaBridge 171:3a7713b1edbc 296 void ADC16_Deinit(ADC_Type *base);
AnnaBridge 171:3a7713b1edbc 297
AnnaBridge 171:3a7713b1edbc 298 /*!
AnnaBridge 171:3a7713b1edbc 299 * @brief Gets an available pre-defined settings for converter's configuration.
AnnaBridge 171:3a7713b1edbc 300 *
AnnaBridge 171:3a7713b1edbc 301 * This function initializes the converter configuration structure with an available settings. The default values are:
AnnaBridge 171:3a7713b1edbc 302 * @code
AnnaBridge 171:3a7713b1edbc 303 * config->referenceVoltageSource = kADC16_ReferenceVoltageSourceVref;
AnnaBridge 171:3a7713b1edbc 304 * config->clockSource = kADC16_ClockSourceAsynchronousClock;
AnnaBridge 171:3a7713b1edbc 305 * config->enableAsynchronousClock = true;
AnnaBridge 171:3a7713b1edbc 306 * config->clockDivider = kADC16_ClockDivider8;
AnnaBridge 171:3a7713b1edbc 307 * config->resolution = kADC16_ResolutionSE12Bit;
AnnaBridge 171:3a7713b1edbc 308 * config->longSampleMode = kADC16_LongSampleDisabled;
AnnaBridge 171:3a7713b1edbc 309 * config->enableHighSpeed = false;
AnnaBridge 171:3a7713b1edbc 310 * config->enableLowPower = false;
AnnaBridge 171:3a7713b1edbc 311 * config->enableContinuousConversion = false;
AnnaBridge 171:3a7713b1edbc 312 * @endcode
AnnaBridge 171:3a7713b1edbc 313 * @param config Pointer to configuration structure.
AnnaBridge 171:3a7713b1edbc 314 */
AnnaBridge 171:3a7713b1edbc 315 void ADC16_GetDefaultConfig(adc16_config_t *config);
AnnaBridge 171:3a7713b1edbc 316
AnnaBridge 171:3a7713b1edbc 317 #if defined(FSL_FEATURE_ADC16_HAS_CALIBRATION) && FSL_FEATURE_ADC16_HAS_CALIBRATION
AnnaBridge 171:3a7713b1edbc 318 /*!
AnnaBridge 171:3a7713b1edbc 319 * @brief Automates the hardware calibration.
AnnaBridge 171:3a7713b1edbc 320 *
AnnaBridge 171:3a7713b1edbc 321 * This auto calibration helps to adjust the plus/minus side gain automatically on the converter's working situation.
AnnaBridge 171:3a7713b1edbc 322 * Execute the calibration before using the converter. Note that the hardware trigger should be used
AnnaBridge 171:3a7713b1edbc 323 * during calibration.
AnnaBridge 171:3a7713b1edbc 324 *
AnnaBridge 171:3a7713b1edbc 325 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 326 *
AnnaBridge 171:3a7713b1edbc 327 * @return Execution status.
AnnaBridge 171:3a7713b1edbc 328 * @retval kStatus_Success Calibration is done successfully.
AnnaBridge 171:3a7713b1edbc 329 * @retval kStatus_Fail Calibration is failed.
AnnaBridge 171:3a7713b1edbc 330 */
AnnaBridge 171:3a7713b1edbc 331 status_t ADC16_DoAutoCalibration(ADC_Type *base);
AnnaBridge 171:3a7713b1edbc 332 #endif /* FSL_FEATURE_ADC16_HAS_CALIBRATION */
AnnaBridge 171:3a7713b1edbc 333
AnnaBridge 171:3a7713b1edbc 334 #if defined(FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION) && FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION
AnnaBridge 171:3a7713b1edbc 335 /*!
AnnaBridge 171:3a7713b1edbc 336 * @brief Sets the offset value for the conversion result.
AnnaBridge 171:3a7713b1edbc 337 *
AnnaBridge 171:3a7713b1edbc 338 * This offset value takes effect on the conversion result. If the offset value is not zero, the reading result
AnnaBridge 171:3a7713b1edbc 339 * is subtracted by it. Note, the hardware calibration fills the offset value automatically.
AnnaBridge 171:3a7713b1edbc 340 *
AnnaBridge 171:3a7713b1edbc 341 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 342 * @param value Setting offset value.
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344 static inline void ADC16_SetOffsetValue(ADC_Type *base, int16_t value)
AnnaBridge 171:3a7713b1edbc 345 {
AnnaBridge 171:3a7713b1edbc 346 base->OFS = (uint32_t)(value);
AnnaBridge 171:3a7713b1edbc 347 }
AnnaBridge 171:3a7713b1edbc 348 #endif /* FSL_FEATURE_ADC16_HAS_OFFSET_CORRECTION */
AnnaBridge 171:3a7713b1edbc 349
AnnaBridge 171:3a7713b1edbc 350 /* @} */
AnnaBridge 171:3a7713b1edbc 351
AnnaBridge 171:3a7713b1edbc 352 /*!
AnnaBridge 171:3a7713b1edbc 353 * @name Advanced Feature
AnnaBridge 171:3a7713b1edbc 354 * @{
AnnaBridge 171:3a7713b1edbc 355 */
AnnaBridge 171:3a7713b1edbc 356
AnnaBridge 171:3a7713b1edbc 357 #if defined(FSL_FEATURE_ADC16_HAS_DMA) && FSL_FEATURE_ADC16_HAS_DMA
AnnaBridge 171:3a7713b1edbc 358 /*!
AnnaBridge 171:3a7713b1edbc 359 * @brief Enables generating the DMA trigger when conversion is completed.
AnnaBridge 171:3a7713b1edbc 360 *
AnnaBridge 171:3a7713b1edbc 361 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 362 * @param enable Switcher of DMA feature. "true" means to enable, "false" means not.
AnnaBridge 171:3a7713b1edbc 363 */
AnnaBridge 171:3a7713b1edbc 364 static inline void ADC16_EnableDMA(ADC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 365 {
AnnaBridge 171:3a7713b1edbc 366 if (enable)
AnnaBridge 171:3a7713b1edbc 367 {
AnnaBridge 171:3a7713b1edbc 368 base->SC2 |= ADC_SC2_DMAEN_MASK;
AnnaBridge 171:3a7713b1edbc 369 }
AnnaBridge 171:3a7713b1edbc 370 else
AnnaBridge 171:3a7713b1edbc 371 {
AnnaBridge 171:3a7713b1edbc 372 base->SC2 &= ~ADC_SC2_DMAEN_MASK;
AnnaBridge 171:3a7713b1edbc 373 }
AnnaBridge 171:3a7713b1edbc 374 }
AnnaBridge 171:3a7713b1edbc 375 #endif /* FSL_FEATURE_ADC16_HAS_DMA */
AnnaBridge 171:3a7713b1edbc 376
AnnaBridge 171:3a7713b1edbc 377 /*!
AnnaBridge 171:3a7713b1edbc 378 * @brief Enables the hardware trigger mode.
AnnaBridge 171:3a7713b1edbc 379 *
AnnaBridge 171:3a7713b1edbc 380 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 381 * @param enable Switcher of hardware trigger feature. "true" means to enable, "false" means not.
AnnaBridge 171:3a7713b1edbc 382 */
AnnaBridge 171:3a7713b1edbc 383 static inline void ADC16_EnableHardwareTrigger(ADC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 384 {
AnnaBridge 171:3a7713b1edbc 385 if (enable)
AnnaBridge 171:3a7713b1edbc 386 {
AnnaBridge 171:3a7713b1edbc 387 base->SC2 |= ADC_SC2_ADTRG_MASK;
AnnaBridge 171:3a7713b1edbc 388 }
AnnaBridge 171:3a7713b1edbc 389 else
AnnaBridge 171:3a7713b1edbc 390 {
AnnaBridge 171:3a7713b1edbc 391 base->SC2 &= ~ADC_SC2_ADTRG_MASK;
AnnaBridge 171:3a7713b1edbc 392 }
AnnaBridge 171:3a7713b1edbc 393 }
AnnaBridge 171:3a7713b1edbc 394
AnnaBridge 171:3a7713b1edbc 395 #if defined(FSL_FEATURE_ADC16_HAS_MUX_SELECT) && FSL_FEATURE_ADC16_HAS_MUX_SELECT
AnnaBridge 171:3a7713b1edbc 396 /*!
AnnaBridge 171:3a7713b1edbc 397 * @brief Sets the channel mux mode.
AnnaBridge 171:3a7713b1edbc 398 *
AnnaBridge 171:3a7713b1edbc 399 * Some sample pins share the same channel index. The channel mux mode decides which pin is used for an
AnnaBridge 171:3a7713b1edbc 400 * indicated channel.
AnnaBridge 171:3a7713b1edbc 401 *
AnnaBridge 171:3a7713b1edbc 402 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 403 * @param mode Setting channel mux mode. See "adc16_channel_mux_mode_t".
AnnaBridge 171:3a7713b1edbc 404 */
AnnaBridge 171:3a7713b1edbc 405 void ADC16_SetChannelMuxMode(ADC_Type *base, adc16_channel_mux_mode_t mode);
AnnaBridge 171:3a7713b1edbc 406 #endif /* FSL_FEATURE_ADC16_HAS_MUX_SELECT */
AnnaBridge 171:3a7713b1edbc 407
AnnaBridge 171:3a7713b1edbc 408 /*!
AnnaBridge 171:3a7713b1edbc 409 * @brief Configures the hardware compare mode.
AnnaBridge 171:3a7713b1edbc 410 *
AnnaBridge 171:3a7713b1edbc 411 * The hardware compare mode provides a way to process the conversion result automatically by hardware. Only the result
AnnaBridge 171:3a7713b1edbc 412 * in
AnnaBridge 171:3a7713b1edbc 413 * compare range is available. To compare the range, see "adc16_hardware_compare_mode_t", or the reference
AnnaBridge 171:3a7713b1edbc 414 * manual document for more detailed information.
AnnaBridge 171:3a7713b1edbc 415 *
AnnaBridge 171:3a7713b1edbc 416 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 417 * @param config Pointer to "adc16_hardware_compare_config_t" structure. Passing "NULL" is to disable the feature.
AnnaBridge 171:3a7713b1edbc 418 */
AnnaBridge 171:3a7713b1edbc 419 void ADC16_SetHardwareCompareConfig(ADC_Type *base, const adc16_hardware_compare_config_t *config);
AnnaBridge 171:3a7713b1edbc 420
AnnaBridge 171:3a7713b1edbc 421 #if defined(FSL_FEATURE_ADC16_HAS_HW_AVERAGE) && FSL_FEATURE_ADC16_HAS_HW_AVERAGE
AnnaBridge 171:3a7713b1edbc 422 /*!
AnnaBridge 171:3a7713b1edbc 423 * @brief Sets the hardware average mode.
AnnaBridge 171:3a7713b1edbc 424 *
AnnaBridge 171:3a7713b1edbc 425 * Hardware average mode provides a way to process the conversion result automatically by hardware. The multiple
AnnaBridge 171:3a7713b1edbc 426 * conversion results are accumulated and averaged internally. This aids reading results.
AnnaBridge 171:3a7713b1edbc 427 *
AnnaBridge 171:3a7713b1edbc 428 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 429 * @param mode Setting hardware average mode. See "adc16_hardware_average_mode_t".
AnnaBridge 171:3a7713b1edbc 430 */
AnnaBridge 171:3a7713b1edbc 431 void ADC16_SetHardwareAverage(ADC_Type *base, adc16_hardware_average_mode_t mode);
AnnaBridge 171:3a7713b1edbc 432 #endif /* FSL_FEATURE_ADC16_HAS_HW_AVERAGE */
AnnaBridge 171:3a7713b1edbc 433
AnnaBridge 171:3a7713b1edbc 434 #if defined(FSL_FEATURE_ADC16_HAS_PGA) && FSL_FEATURE_ADC16_HAS_PGA
AnnaBridge 171:3a7713b1edbc 435 /*!
AnnaBridge 171:3a7713b1edbc 436 * @brief Configures the PGA for converter's front end.
AnnaBridge 171:3a7713b1edbc 437 *
AnnaBridge 171:3a7713b1edbc 438 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 439 * @param config Pointer to "adc16_pga_config_t" structure. Passing "NULL" is to disable the feature.
AnnaBridge 171:3a7713b1edbc 440 */
AnnaBridge 171:3a7713b1edbc 441 void ADC16_SetPGAConfig(ADC_Type *base, const adc16_pga_config_t *config);
AnnaBridge 171:3a7713b1edbc 442 #endif /* FSL_FEATURE_ADC16_HAS_PGA */
AnnaBridge 171:3a7713b1edbc 443
AnnaBridge 171:3a7713b1edbc 444 /*!
AnnaBridge 171:3a7713b1edbc 445 * @brief Gets the status flags of the converter.
AnnaBridge 171:3a7713b1edbc 446 *
AnnaBridge 171:3a7713b1edbc 447 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 448 *
AnnaBridge 171:3a7713b1edbc 449 * @return Flags' mask if indicated flags are asserted. See "_adc16_status_flags".
AnnaBridge 171:3a7713b1edbc 450 */
AnnaBridge 171:3a7713b1edbc 451 uint32_t ADC16_GetStatusFlags(ADC_Type *base);
AnnaBridge 171:3a7713b1edbc 452
AnnaBridge 171:3a7713b1edbc 453 /*!
AnnaBridge 171:3a7713b1edbc 454 * @brief Clears the status flags of the converter.
AnnaBridge 171:3a7713b1edbc 455 *
AnnaBridge 171:3a7713b1edbc 456 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 457 * @param mask Mask value for the cleared flags. See "_adc16_status_flags".
AnnaBridge 171:3a7713b1edbc 458 */
AnnaBridge 171:3a7713b1edbc 459 void ADC16_ClearStatusFlags(ADC_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 460
AnnaBridge 171:3a7713b1edbc 461 /* @} */
AnnaBridge 171:3a7713b1edbc 462
AnnaBridge 171:3a7713b1edbc 463 /*!
AnnaBridge 171:3a7713b1edbc 464 * @name Conversion Channel
AnnaBridge 171:3a7713b1edbc 465 * @{
AnnaBridge 171:3a7713b1edbc 466 */
AnnaBridge 171:3a7713b1edbc 467
AnnaBridge 171:3a7713b1edbc 468 /*!
AnnaBridge 171:3a7713b1edbc 469 * @brief Configures the conversion channel.
AnnaBridge 171:3a7713b1edbc 470 *
AnnaBridge 171:3a7713b1edbc 471 * This operation triggers the conversion if in software trigger mode. When in hardware trigger mode, this API
AnnaBridge 171:3a7713b1edbc 472 * configures the channel while the external trigger source helps to trigger the conversion.
AnnaBridge 171:3a7713b1edbc 473 *
AnnaBridge 171:3a7713b1edbc 474 * Note that the "Channel Group" has a detailed description.
AnnaBridge 171:3a7713b1edbc 475 * To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC can have more than one
AnnaBridge 171:3a7713b1edbc 476 * group of status and control register, one for each conversion. The channel group parameter indicates which group of
AnnaBridge 171:3a7713b1edbc 477 * registers are used channel group 0 is for Group A registers and channel group 1 is for Group B registers. The
AnnaBridge 171:3a7713b1edbc 478 * channel groups are used in a "ping-pong" approach to control the ADC operation. At any point, only one of
AnnaBridge 171:3a7713b1edbc 479 * the channel groups is actively controlling ADC conversions. Channel group 0 is used for both software and hardware
AnnaBridge 171:3a7713b1edbc 480 * trigger modes of operation. Channel groups 1 and greater indicate potentially multiple channel group registers for
AnnaBridge 171:3a7713b1edbc 481 * use only in hardware trigger mode. See the chip configuration information in the MCU reference manual about the
AnnaBridge 171:3a7713b1edbc 482 * number of SC1n registers (channel groups) specific to this device. None of the channel groups 1 or greater are used
AnnaBridge 171:3a7713b1edbc 483 * for software trigger operation and therefore writes to these channel groups do not initiate a new conversion.
AnnaBridge 171:3a7713b1edbc 484 * Updating channel group 0 while a different channel group is actively controlling a conversion is allowed and
AnnaBridge 171:3a7713b1edbc 485 * vice versa. Writing any of the channel group registers while that specific channel group is actively controlling a
AnnaBridge 171:3a7713b1edbc 486 * conversion aborts the current conversion.
AnnaBridge 171:3a7713b1edbc 487 *
AnnaBridge 171:3a7713b1edbc 488 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 489 * @param channelGroup Channel group index.
AnnaBridge 171:3a7713b1edbc 490 * @param config Pointer to "adc16_channel_config_t" structure for conversion channel.
AnnaBridge 171:3a7713b1edbc 491 */
AnnaBridge 171:3a7713b1edbc 492 void ADC16_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc16_channel_config_t *config);
AnnaBridge 171:3a7713b1edbc 493
AnnaBridge 171:3a7713b1edbc 494 /*!
AnnaBridge 171:3a7713b1edbc 495 * @brief Gets the conversion value.
AnnaBridge 171:3a7713b1edbc 496 *
AnnaBridge 171:3a7713b1edbc 497 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 498 * @param channelGroup Channel group index.
AnnaBridge 171:3a7713b1edbc 499 *
AnnaBridge 171:3a7713b1edbc 500 * @return Conversion value.
AnnaBridge 171:3a7713b1edbc 501 */
AnnaBridge 171:3a7713b1edbc 502 static inline uint32_t ADC16_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)
AnnaBridge 171:3a7713b1edbc 503 {
AnnaBridge 171:3a7713b1edbc 504 assert(channelGroup < ADC_R_COUNT);
AnnaBridge 171:3a7713b1edbc 505
AnnaBridge 171:3a7713b1edbc 506 return base->R[channelGroup];
AnnaBridge 171:3a7713b1edbc 507 }
AnnaBridge 171:3a7713b1edbc 508
AnnaBridge 171:3a7713b1edbc 509 /*!
AnnaBridge 171:3a7713b1edbc 510 * @brief Gets the status flags of channel.
AnnaBridge 171:3a7713b1edbc 511 *
AnnaBridge 171:3a7713b1edbc 512 * @param base ADC16 peripheral base address.
AnnaBridge 171:3a7713b1edbc 513 * @param channelGroup Channel group index.
AnnaBridge 171:3a7713b1edbc 514 *
AnnaBridge 171:3a7713b1edbc 515 * @return Flags' mask if indicated flags are asserted. See "_adc16_channel_status_flags".
AnnaBridge 171:3a7713b1edbc 516 */
AnnaBridge 171:3a7713b1edbc 517 uint32_t ADC16_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup);
AnnaBridge 171:3a7713b1edbc 518
AnnaBridge 171:3a7713b1edbc 519 /* @} */
AnnaBridge 171:3a7713b1edbc 520
AnnaBridge 171:3a7713b1edbc 521 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 522 }
AnnaBridge 171:3a7713b1edbc 523 #endif
AnnaBridge 171:3a7713b1edbc 524 /*!
AnnaBridge 171:3a7713b1edbc 525 * @}
AnnaBridge 171:3a7713b1edbc 526 */
AnnaBridge 171:3a7713b1edbc 527 #endif /* _FSL_ADC16_H_ */