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TARGET_KL27Z/TOOLCHAIN_IAR/fsl_lpuart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_LPUART_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_LPUART_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup lpuart_driver
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*! @file*/
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 43 * Definitions
AnnaBridge 171:3a7713b1edbc 44 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 47 /*@{*/
AnnaBridge 171:3a7713b1edbc 48 /*! @brief LPUART driver version 2.1.0. */
AnnaBridge 171:3a7713b1edbc 49 #define FSL_LPUART_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
AnnaBridge 171:3a7713b1edbc 50 /*@}*/
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /*! @brief Error codes for the LPUART driver. */
AnnaBridge 171:3a7713b1edbc 53 enum _lpuart_status
AnnaBridge 171:3a7713b1edbc 54 {
AnnaBridge 171:3a7713b1edbc 55 kStatus_LPUART_TxBusy = MAKE_STATUS(kStatusGroup_LPUART, 0), /*!< TX busy */
AnnaBridge 171:3a7713b1edbc 56 kStatus_LPUART_RxBusy = MAKE_STATUS(kStatusGroup_LPUART, 1), /*!< RX busy */
AnnaBridge 171:3a7713b1edbc 57 kStatus_LPUART_TxIdle = MAKE_STATUS(kStatusGroup_LPUART, 2), /*!< LPUART transmitter is idle. */
AnnaBridge 171:3a7713b1edbc 58 kStatus_LPUART_RxIdle = MAKE_STATUS(kStatusGroup_LPUART, 3), /*!< LPUART receiver is idle. */
AnnaBridge 171:3a7713b1edbc 59 kStatus_LPUART_TxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 4), /*!< TX FIFO watermark too large */
AnnaBridge 171:3a7713b1edbc 60 kStatus_LPUART_RxWatermarkTooLarge = MAKE_STATUS(kStatusGroup_LPUART, 5), /*!< RX FIFO watermark too large */
AnnaBridge 171:3a7713b1edbc 61 kStatus_LPUART_FlagCannotClearManually =
AnnaBridge 171:3a7713b1edbc 62 MAKE_STATUS(kStatusGroup_LPUART, 6), /*!< Some flag can't manually clear */
AnnaBridge 171:3a7713b1edbc 63 kStatus_LPUART_Error = MAKE_STATUS(kStatusGroup_LPUART, 7), /*!< Error happens on LPUART. */
AnnaBridge 171:3a7713b1edbc 64 kStatus_LPUART_RxRingBufferOverrun =
AnnaBridge 171:3a7713b1edbc 65 MAKE_STATUS(kStatusGroup_LPUART, 8), /*!< LPUART RX software ring buffer overrun. */
AnnaBridge 171:3a7713b1edbc 66 kStatus_LPUART_RxHardwareOverrun = MAKE_STATUS(kStatusGroup_LPUART, 9), /*!< LPUART RX receiver overrun. */
AnnaBridge 171:3a7713b1edbc 67 kStatus_LPUART_NoiseError = MAKE_STATUS(kStatusGroup_LPUART, 10), /*!< LPUART noise error. */
AnnaBridge 171:3a7713b1edbc 68 kStatus_LPUART_FramingError = MAKE_STATUS(kStatusGroup_LPUART, 11), /*!< LPUART framing error. */
AnnaBridge 171:3a7713b1edbc 69 kStatus_LPUART_ParityError = MAKE_STATUS(kStatusGroup_LPUART, 12), /*!< LPUART parity error. */
AnnaBridge 171:3a7713b1edbc 70 };
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 /*! @brief LPUART parity mode. */
AnnaBridge 171:3a7713b1edbc 73 typedef enum _lpuart_parity_mode
AnnaBridge 171:3a7713b1edbc 74 {
AnnaBridge 171:3a7713b1edbc 75 kLPUART_ParityDisabled = 0x0U, /*!< Parity disabled */
AnnaBridge 171:3a7713b1edbc 76 kLPUART_ParityEven = 0x2U, /*!< Parity enabled, type even, bit setting: PE|PT = 10 */
AnnaBridge 171:3a7713b1edbc 77 kLPUART_ParityOdd = 0x3U, /*!< Parity enabled, type odd, bit setting: PE|PT = 11 */
AnnaBridge 171:3a7713b1edbc 78 } lpuart_parity_mode_t;
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /*! @brief LPUART stop bit count. */
AnnaBridge 171:3a7713b1edbc 81 typedef enum _lpuart_stop_bit_count
AnnaBridge 171:3a7713b1edbc 82 {
AnnaBridge 171:3a7713b1edbc 83 kLPUART_OneStopBit = 0U, /*!< One stop bit */
AnnaBridge 171:3a7713b1edbc 84 kLPUART_TwoStopBit = 1U, /*!< Two stop bits */
AnnaBridge 171:3a7713b1edbc 85 } lpuart_stop_bit_count_t;
AnnaBridge 171:3a7713b1edbc 86
AnnaBridge 171:3a7713b1edbc 87 /*!
AnnaBridge 171:3a7713b1edbc 88 * @brief LPUART interrupt configuration structure, default settings all disabled.
AnnaBridge 171:3a7713b1edbc 89 *
AnnaBridge 171:3a7713b1edbc 90 * This structure contains the settings for all LPUART interrupt configurations.
AnnaBridge 171:3a7713b1edbc 91 */
AnnaBridge 171:3a7713b1edbc 92 enum _lpuart_interrupt_enable
AnnaBridge 171:3a7713b1edbc 93 {
AnnaBridge 171:3a7713b1edbc 94 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
AnnaBridge 171:3a7713b1edbc 95 kLPUART_LinBreakInterruptEnable = (LPUART_BAUD_LBKDIE_MASK >> 8), /*!< LIN break detect. */
AnnaBridge 171:3a7713b1edbc 96 #endif
AnnaBridge 171:3a7713b1edbc 97 kLPUART_RxActiveEdgeInterruptEnable = (LPUART_BAUD_RXEDGIE_MASK >> 8), /*!< Receive Active Edge. */
AnnaBridge 171:3a7713b1edbc 98 kLPUART_TxDataRegEmptyInterruptEnable = (LPUART_CTRL_TIE_MASK), /*!< Transmit data register empty. */
AnnaBridge 171:3a7713b1edbc 99 kLPUART_TransmissionCompleteInterruptEnable = (LPUART_CTRL_TCIE_MASK), /*!< Transmission complete. */
AnnaBridge 171:3a7713b1edbc 100 kLPUART_RxDataRegFullInterruptEnable = (LPUART_CTRL_RIE_MASK), /*!< Receiver data register full. */
AnnaBridge 171:3a7713b1edbc 101 kLPUART_IdleLineInterruptEnable = (LPUART_CTRL_ILIE_MASK), /*!< Idle line. */
AnnaBridge 171:3a7713b1edbc 102 kLPUART_RxOverrunInterruptEnable = (LPUART_CTRL_ORIE_MASK), /*!< Receiver Overrun. */
AnnaBridge 171:3a7713b1edbc 103 kLPUART_NoiseErrorInterruptEnable = (LPUART_CTRL_NEIE_MASK), /*!< Noise error flag. */
AnnaBridge 171:3a7713b1edbc 104 kLPUART_FramingErrorInterruptEnable = (LPUART_CTRL_FEIE_MASK), /*!< Framing error flag. */
AnnaBridge 171:3a7713b1edbc 105 kLPUART_ParityErrorInterruptEnable = (LPUART_CTRL_PEIE_MASK), /*!< Parity error flag. */
AnnaBridge 171:3a7713b1edbc 106 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
AnnaBridge 171:3a7713b1edbc 107 kLPUART_TxFifoOverflowInterruptEnable = (LPUART_FIFO_TXOFE_MASK >> 8), /*!< Transmit FIFO Overflow. */
AnnaBridge 171:3a7713b1edbc 108 kLPUART_RxFifoUnderflowInterruptEnable = (LPUART_FIFO_RXUFE_MASK >> 8), /*!< Receive FIFO Underflow. */
AnnaBridge 171:3a7713b1edbc 109 #endif
AnnaBridge 171:3a7713b1edbc 110 };
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 /*!
AnnaBridge 171:3a7713b1edbc 113 * @brief LPUART status flags.
AnnaBridge 171:3a7713b1edbc 114 *
AnnaBridge 171:3a7713b1edbc 115 * This provides constants for the LPUART status flags for use in the LPUART functions.
AnnaBridge 171:3a7713b1edbc 116 */
AnnaBridge 171:3a7713b1edbc 117 enum _lpuart_flags
AnnaBridge 171:3a7713b1edbc 118 {
AnnaBridge 171:3a7713b1edbc 119 kLPUART_TxDataRegEmptyFlag =
AnnaBridge 171:3a7713b1edbc 120 (LPUART_STAT_TDRE_MASK), /*!< Transmit data register empty flag, sets when transmit buffer is empty */
AnnaBridge 171:3a7713b1edbc 121 kLPUART_TransmissionCompleteFlag =
AnnaBridge 171:3a7713b1edbc 122 (LPUART_STAT_TC_MASK), /*!< Transmission complete flag, sets when transmission activity complete */
AnnaBridge 171:3a7713b1edbc 123 kLPUART_RxDataRegFullFlag =
AnnaBridge 171:3a7713b1edbc 124 (LPUART_STAT_RDRF_MASK), /*!< Receive data register full flag, sets when the receive data buffer is full */
AnnaBridge 171:3a7713b1edbc 125 kLPUART_IdleLineFlag = (LPUART_STAT_IDLE_MASK), /*!< Idle line detect flag, sets when idle line detected */
AnnaBridge 171:3a7713b1edbc 126 kLPUART_RxOverrunFlag = (LPUART_STAT_OR_MASK), /*!< Receive Overrun, sets when new data is received before data is
AnnaBridge 171:3a7713b1edbc 127 read from receive register */
AnnaBridge 171:3a7713b1edbc 128 kLPUART_NoiseErrorFlag = (LPUART_STAT_NF_MASK), /*!< Receive takes 3 samples of each received bit. If any of these
AnnaBridge 171:3a7713b1edbc 129 samples differ, noise flag sets */
AnnaBridge 171:3a7713b1edbc 130 kLPUART_FramingErrorFlag =
AnnaBridge 171:3a7713b1edbc 131 (LPUART_STAT_FE_MASK), /*!< Frame error flag, sets if logic 0 was detected where stop bit expected */
AnnaBridge 171:3a7713b1edbc 132 kLPUART_ParityErrorFlag = (LPUART_STAT_PF_MASK), /*!< If parity enabled, sets upon parity error detection */
AnnaBridge 171:3a7713b1edbc 133 #if defined(FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT) && FSL_FEATURE_LPUART_HAS_LIN_BREAK_DETECT
AnnaBridge 171:3a7713b1edbc 134 kLPUART_LinBreakFlag = (LPUART_STAT_LBKDIF_MASK), /*!< LIN break detect interrupt flag, sets when LIN break char
AnnaBridge 171:3a7713b1edbc 135 detected and LIN circuit enabled */
AnnaBridge 171:3a7713b1edbc 136 #endif
AnnaBridge 171:3a7713b1edbc 137 kLPUART_RxActiveEdgeFlag =
AnnaBridge 171:3a7713b1edbc 138 (LPUART_STAT_RXEDGIF_MASK), /*!< Receive pin active edge interrupt flag, sets when active edge detected */
AnnaBridge 171:3a7713b1edbc 139 kLPUART_RxActiveFlag =
AnnaBridge 171:3a7713b1edbc 140 (LPUART_STAT_RAF_MASK), /*!< Receiver Active Flag (RAF), sets at beginning of valid start bit */
AnnaBridge 171:3a7713b1edbc 141 #if defined(FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING) && FSL_FEATURE_LPUART_HAS_ADDRESS_MATCHING
AnnaBridge 171:3a7713b1edbc 142 kLPUART_DataMatch1Flag = LPUART_STAT_MA1F_MASK, /*!< The next character to be read from LPUART_DATA matches MA1*/
AnnaBridge 171:3a7713b1edbc 143 kLPUART_DataMatch2Flag = LPUART_STAT_MA2F_MASK, /*!< The next character to be read from LPUART_DATA matches MA2*/
AnnaBridge 171:3a7713b1edbc 144 #endif
AnnaBridge 171:3a7713b1edbc 145 #if defined(FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS) && FSL_FEATURE_LPUART_HAS_EXTENDED_DATA_REGISTER_FLAGS
AnnaBridge 171:3a7713b1edbc 146 kLPUART_NoiseErrorInRxDataRegFlag =
AnnaBridge 171:3a7713b1edbc 147 (LPUART_DATA_NOISY_MASK >> 10), /*!< NOISY bit, sets if noise detected in current data word */
AnnaBridge 171:3a7713b1edbc 148 kLPUART_ParityErrorInRxDataRegFlag =
AnnaBridge 171:3a7713b1edbc 149 (LPUART_DATA_PARITYE_MASK >> 10), /*!< PARITYE bit, sets if noise detected in current data word */
AnnaBridge 171:3a7713b1edbc 150 #endif
AnnaBridge 171:3a7713b1edbc 151 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
AnnaBridge 171:3a7713b1edbc 152 kLPUART_TxFifoEmptyFlag = (LPUART_FIFO_TXEMPT_MASK >> 16), /*!< TXEMPT bit, sets if transmit buffer is empty */
AnnaBridge 171:3a7713b1edbc 153 kLPUART_RxFifoEmptyFlag = (LPUART_FIFO_RXEMPT_MASK >> 16), /*!< RXEMPT bit, sets if receive buffer is empty */
AnnaBridge 171:3a7713b1edbc 154 kLPUART_TxFifoOverflowFlag =
AnnaBridge 171:3a7713b1edbc 155 (LPUART_FIFO_TXOF_MASK >> 16), /*!< TXOF bit, sets if transmit buffer overflow occurred */
AnnaBridge 171:3a7713b1edbc 156 kLPUART_RxFifoUnderflowFlag =
AnnaBridge 171:3a7713b1edbc 157 (LPUART_FIFO_RXUF_MASK >> 16), /*!< RXUF bit, sets if receive buffer underflow occurred */
AnnaBridge 171:3a7713b1edbc 158 #endif
AnnaBridge 171:3a7713b1edbc 159 };
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /*! @brief LPUART configure structure. */
AnnaBridge 171:3a7713b1edbc 162 typedef struct _lpuart_config
AnnaBridge 171:3a7713b1edbc 163 {
AnnaBridge 171:3a7713b1edbc 164 uint32_t baudRate_Bps; /*!< LPUART baud rate */
AnnaBridge 171:3a7713b1edbc 165 lpuart_parity_mode_t parityMode; /*!< Parity mode, disabled (default), even, odd */
AnnaBridge 171:3a7713b1edbc 166 #if defined(FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT) && FSL_FEATURE_LPUART_HAS_STOP_BIT_CONFIG_SUPPORT
AnnaBridge 171:3a7713b1edbc 167 lpuart_stop_bit_count_t stopBitCount; /*!< Number of stop bits, 1 stop bit (default) or 2 stop bits */
AnnaBridge 171:3a7713b1edbc 168 #endif
AnnaBridge 171:3a7713b1edbc 169 #if defined(FSL_FEATURE_LPUART_HAS_FIFO) && FSL_FEATURE_LPUART_HAS_FIFO
AnnaBridge 171:3a7713b1edbc 170 uint8_t txFifoWatermark; /*!< TX FIFO watermark */
AnnaBridge 171:3a7713b1edbc 171 uint8_t rxFifoWatermark; /*!< RX FIFO watermark */
AnnaBridge 171:3a7713b1edbc 172 #endif
AnnaBridge 171:3a7713b1edbc 173 bool enableTx; /*!< Enable TX */
AnnaBridge 171:3a7713b1edbc 174 bool enableRx; /*!< Enable RX */
AnnaBridge 171:3a7713b1edbc 175 } lpuart_config_t;
AnnaBridge 171:3a7713b1edbc 176
AnnaBridge 171:3a7713b1edbc 177 /*! @brief LPUART transfer structure. */
AnnaBridge 171:3a7713b1edbc 178 typedef struct _lpuart_transfer
AnnaBridge 171:3a7713b1edbc 179 {
AnnaBridge 171:3a7713b1edbc 180 uint8_t *data; /*!< The buffer of data to be transfer.*/
AnnaBridge 171:3a7713b1edbc 181 size_t dataSize; /*!< The byte count to be transfer. */
AnnaBridge 171:3a7713b1edbc 182 } lpuart_transfer_t;
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 /* Forward declaration of the handle typedef. */
AnnaBridge 171:3a7713b1edbc 185 typedef struct _lpuart_handle lpuart_handle_t;
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 /*! @brief LPUART transfer callback function. */
AnnaBridge 171:3a7713b1edbc 188 typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData);
AnnaBridge 171:3a7713b1edbc 189
AnnaBridge 171:3a7713b1edbc 190 /*! @brief LPUART handle structure. */
AnnaBridge 171:3a7713b1edbc 191 struct _lpuart_handle
AnnaBridge 171:3a7713b1edbc 192 {
AnnaBridge 171:3a7713b1edbc 193 uint8_t *volatile txData; /*!< Address of remaining data to send. */
AnnaBridge 171:3a7713b1edbc 194 volatile size_t txDataSize; /*!< Size of the remaining data to send. */
AnnaBridge 171:3a7713b1edbc 195 size_t txDataSizeAll; /*!< Size of the data to send out. */
AnnaBridge 171:3a7713b1edbc 196 uint8_t *volatile rxData; /*!< Address of remaining data to receive. */
AnnaBridge 171:3a7713b1edbc 197 volatile size_t rxDataSize; /*!< Size of the remaining data to receive. */
AnnaBridge 171:3a7713b1edbc 198 size_t rxDataSizeAll; /*!< Size of the data to receive. */
AnnaBridge 171:3a7713b1edbc 199
AnnaBridge 171:3a7713b1edbc 200 uint8_t *rxRingBuffer; /*!< Start address of the receiver ring buffer. */
AnnaBridge 171:3a7713b1edbc 201 size_t rxRingBufferSize; /*!< Size of the ring buffer. */
AnnaBridge 171:3a7713b1edbc 202 volatile uint16_t rxRingBufferHead; /*!< Index for the driver to store received data into ring buffer. */
AnnaBridge 171:3a7713b1edbc 203 volatile uint16_t rxRingBufferTail; /*!< Index for the user to get data from the ring buffer. */
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 lpuart_transfer_callback_t callback; /*!< Callback function. */
AnnaBridge 171:3a7713b1edbc 206 void *userData; /*!< LPUART callback function parameter.*/
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 volatile uint8_t txState; /*!< TX transfer state. */
AnnaBridge 171:3a7713b1edbc 209 volatile uint8_t rxState; /*!< RX transfer state */
AnnaBridge 171:3a7713b1edbc 210 };
AnnaBridge 171:3a7713b1edbc 211
AnnaBridge 171:3a7713b1edbc 212 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 213 * API
AnnaBridge 171:3a7713b1edbc 214 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 217 extern "C" {
AnnaBridge 171:3a7713b1edbc 218 #endif /* _cplusplus */
AnnaBridge 171:3a7713b1edbc 219
AnnaBridge 171:3a7713b1edbc 220 /*!
AnnaBridge 171:3a7713b1edbc 221 * @name Initialization and deinitialization
AnnaBridge 171:3a7713b1edbc 222 * @{
AnnaBridge 171:3a7713b1edbc 223 */
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 /*!
AnnaBridge 171:3a7713b1edbc 226 * @brief Initializes an LPUART instance with the user configuration structure and the peripheral clock.
AnnaBridge 171:3a7713b1edbc 227 *
AnnaBridge 171:3a7713b1edbc 228 * This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function
AnnaBridge 171:3a7713b1edbc 229 * to configure the configuration structure and get the default configuration.
AnnaBridge 171:3a7713b1edbc 230 * The example below shows how to use this API to configure the LPUART.
AnnaBridge 171:3a7713b1edbc 231 * @code
AnnaBridge 171:3a7713b1edbc 232 * lpuart_config_t lpuartConfig;
AnnaBridge 171:3a7713b1edbc 233 * lpuartConfig.baudRate_Bps = 115200U;
AnnaBridge 171:3a7713b1edbc 234 * lpuartConfig.parityMode = kLPUART_ParityDisabled;
AnnaBridge 171:3a7713b1edbc 235 * lpuartConfig.stopBitCount = kLPUART_OneStopBit;
AnnaBridge 171:3a7713b1edbc 236 * lpuartConfig.txFifoWatermark = 0;
AnnaBridge 171:3a7713b1edbc 237 * lpuartConfig.rxFifoWatermark = 1;
AnnaBridge 171:3a7713b1edbc 238 * LPUART_Init(LPUART1, &lpuartConfig, 20000000U);
AnnaBridge 171:3a7713b1edbc 239 * @endcode
AnnaBridge 171:3a7713b1edbc 240 *
AnnaBridge 171:3a7713b1edbc 241 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 242 * @param config Pointer to a user-defined configuration structure.
AnnaBridge 171:3a7713b1edbc 243 * @param srcClock_Hz LPUART clock source frequency in HZ.
AnnaBridge 171:3a7713b1edbc 244 */
AnnaBridge 171:3a7713b1edbc 245 void LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 246
AnnaBridge 171:3a7713b1edbc 247 /*!
AnnaBridge 171:3a7713b1edbc 248 * @brief Deinitializes a LPUART instance.
AnnaBridge 171:3a7713b1edbc 249 *
AnnaBridge 171:3a7713b1edbc 250 * This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.
AnnaBridge 171:3a7713b1edbc 251 *
AnnaBridge 171:3a7713b1edbc 252 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 253 */
AnnaBridge 171:3a7713b1edbc 254 void LPUART_Deinit(LPUART_Type *base);
AnnaBridge 171:3a7713b1edbc 255
AnnaBridge 171:3a7713b1edbc 256 /*!
AnnaBridge 171:3a7713b1edbc 257 * @brief Gets the default configuration structure.
AnnaBridge 171:3a7713b1edbc 258 *
AnnaBridge 171:3a7713b1edbc 259 * This function initializes the LPUART configuration structure to a default value. The default
AnnaBridge 171:3a7713b1edbc 260 * values are:
AnnaBridge 171:3a7713b1edbc 261 * lpuartConfig->baudRate_Bps = 115200U;
AnnaBridge 171:3a7713b1edbc 262 * lpuartConfig->parityMode = kLPUART_ParityDisabled;
AnnaBridge 171:3a7713b1edbc 263 * lpuartConfig->stopBitCount = kLPUART_OneStopBit;
AnnaBridge 171:3a7713b1edbc 264 * lpuartConfig->txFifoWatermark = 0;
AnnaBridge 171:3a7713b1edbc 265 * lpuartConfig->rxFifoWatermark = 1;
AnnaBridge 171:3a7713b1edbc 266 * lpuartConfig->enableTx = false;
AnnaBridge 171:3a7713b1edbc 267 * lpuartConfig->enableRx = false;
AnnaBridge 171:3a7713b1edbc 268 *
AnnaBridge 171:3a7713b1edbc 269 * @param config Pointer to a configuration structure.
AnnaBridge 171:3a7713b1edbc 270 */
AnnaBridge 171:3a7713b1edbc 271 void LPUART_GetDefaultConfig(lpuart_config_t *config);
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 /*!
AnnaBridge 171:3a7713b1edbc 274 * @brief Sets the LPUART instance baudrate.
AnnaBridge 171:3a7713b1edbc 275 *
AnnaBridge 171:3a7713b1edbc 276 * This function configures the LPUART module baudrate. This function is used to update
AnnaBridge 171:3a7713b1edbc 277 * the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.
AnnaBridge 171:3a7713b1edbc 278 * @code
AnnaBridge 171:3a7713b1edbc 279 * LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);
AnnaBridge 171:3a7713b1edbc 280 * @endcode
AnnaBridge 171:3a7713b1edbc 281 *
AnnaBridge 171:3a7713b1edbc 282 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 283 * @param baudRate_Bps LPUART baudrate to be set.
AnnaBridge 171:3a7713b1edbc 284 * @param srcClock_Hz LPUART clock source frequency in HZ.
AnnaBridge 171:3a7713b1edbc 285 */
AnnaBridge 171:3a7713b1edbc 286 void LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 287
AnnaBridge 171:3a7713b1edbc 288 /* @} */
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 /*!
AnnaBridge 171:3a7713b1edbc 291 * @name Status
AnnaBridge 171:3a7713b1edbc 292 * @{
AnnaBridge 171:3a7713b1edbc 293 */
AnnaBridge 171:3a7713b1edbc 294
AnnaBridge 171:3a7713b1edbc 295 /*!
AnnaBridge 171:3a7713b1edbc 296 * @brief Gets LPUART status flags.
AnnaBridge 171:3a7713b1edbc 297 *
AnnaBridge 171:3a7713b1edbc 298 * This function gets all LPUART status flags. The flags are returned as the logical
AnnaBridge 171:3a7713b1edbc 299 * OR value of the enumerators @ref _lpuart_flags. To check for a specific status,
AnnaBridge 171:3a7713b1edbc 300 * compare the return value with enumerators in the @ref _lpuart_flags.
AnnaBridge 171:3a7713b1edbc 301 * For example, to check whether the TX is empty:
AnnaBridge 171:3a7713b1edbc 302 * @code
AnnaBridge 171:3a7713b1edbc 303 * if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
AnnaBridge 171:3a7713b1edbc 304 * {
AnnaBridge 171:3a7713b1edbc 305 * ...
AnnaBridge 171:3a7713b1edbc 306 * }
AnnaBridge 171:3a7713b1edbc 307 * @endcode
AnnaBridge 171:3a7713b1edbc 308 *
AnnaBridge 171:3a7713b1edbc 309 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 310 * @return LPUART status flags which are ORed by the enumerators in the _lpuart_flags.
AnnaBridge 171:3a7713b1edbc 311 */
AnnaBridge 171:3a7713b1edbc 312 uint32_t LPUART_GetStatusFlags(LPUART_Type *base);
AnnaBridge 171:3a7713b1edbc 313
AnnaBridge 171:3a7713b1edbc 314 /*!
AnnaBridge 171:3a7713b1edbc 315 * @brief Clears status flags with a provided mask.
AnnaBridge 171:3a7713b1edbc 316 *
AnnaBridge 171:3a7713b1edbc 317 * This function clears LPUART status flags with a provided mask. Automatically cleared flags
AnnaBridge 171:3a7713b1edbc 318 * can't be cleared by this function.
AnnaBridge 171:3a7713b1edbc 319 * Flags that can only cleared or set by hardware are:
AnnaBridge 171:3a7713b1edbc 320 * kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag,
AnnaBridge 171:3a7713b1edbc 321 * kLPUART_RxActiveFlag, kLPUART_NoiseErrorInRxDataRegFlag, kLPUART_ParityErrorInRxDataRegFlag,
AnnaBridge 171:3a7713b1edbc 322 * kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag
AnnaBridge 171:3a7713b1edbc 323 * Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.
AnnaBridge 171:3a7713b1edbc 324 *
AnnaBridge 171:3a7713b1edbc 325 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 326 * @param mask the status flags to be cleared. The user can use the enumerators in the
AnnaBridge 171:3a7713b1edbc 327 * _lpuart_status_flag_t to do the OR operation and get the mask.
AnnaBridge 171:3a7713b1edbc 328 * @return 0 succeed, others failed.
AnnaBridge 171:3a7713b1edbc 329 * @retval kStatus_LPUART_FlagCannotClearManually The flag can't be cleared by this function but
AnnaBridge 171:3a7713b1edbc 330 * it is cleared automatically by hardware.
AnnaBridge 171:3a7713b1edbc 331 * @retval kStatus_Success Status in the mask are cleared.
AnnaBridge 171:3a7713b1edbc 332 */
AnnaBridge 171:3a7713b1edbc 333 status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 334
AnnaBridge 171:3a7713b1edbc 335 /* @} */
AnnaBridge 171:3a7713b1edbc 336
AnnaBridge 171:3a7713b1edbc 337 /*!
AnnaBridge 171:3a7713b1edbc 338 * @name Interrupts
AnnaBridge 171:3a7713b1edbc 339 * @{
AnnaBridge 171:3a7713b1edbc 340 */
AnnaBridge 171:3a7713b1edbc 341
AnnaBridge 171:3a7713b1edbc 342 /*!
AnnaBridge 171:3a7713b1edbc 343 * @brief Enables LPUART interrupts according to a provided mask.
AnnaBridge 171:3a7713b1edbc 344 *
AnnaBridge 171:3a7713b1edbc 345 * This function enables the LPUART interrupts according to a provided mask. The mask
AnnaBridge 171:3a7713b1edbc 346 * is a logical OR of enumeration members. See the @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 347 * This examples shows how to enable TX empty interrupt and RX full interrupt:
AnnaBridge 171:3a7713b1edbc 348 * @code
AnnaBridge 171:3a7713b1edbc 349 * LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
AnnaBridge 171:3a7713b1edbc 350 * @endcode
AnnaBridge 171:3a7713b1edbc 351 *
AnnaBridge 171:3a7713b1edbc 352 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 353 * @param mask The interrupts to enable. Logical OR of @ref _uart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 354 */
AnnaBridge 171:3a7713b1edbc 355 void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 356
AnnaBridge 171:3a7713b1edbc 357 /*!
AnnaBridge 171:3a7713b1edbc 358 * @brief Disables LPUART interrupts according to a provided mask.
AnnaBridge 171:3a7713b1edbc 359 *
AnnaBridge 171:3a7713b1edbc 360 * This function disables the LPUART interrupts according to a provided mask. The mask
AnnaBridge 171:3a7713b1edbc 361 * is a logical OR of enumeration members. See @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 362 * This example shows how to disable the TX empty interrupt and RX full interrupt:
AnnaBridge 171:3a7713b1edbc 363 * @code
AnnaBridge 171:3a7713b1edbc 364 * LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);
AnnaBridge 171:3a7713b1edbc 365 * @endcode
AnnaBridge 171:3a7713b1edbc 366 *
AnnaBridge 171:3a7713b1edbc 367 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 368 * @param mask The interrupts to disable. Logical OR of @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 369 */
AnnaBridge 171:3a7713b1edbc 370 void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 371
AnnaBridge 171:3a7713b1edbc 372 /*!
AnnaBridge 171:3a7713b1edbc 373 * @brief Gets enabled LPUART interrupts.
AnnaBridge 171:3a7713b1edbc 374 *
AnnaBridge 171:3a7713b1edbc 375 * This function gets the enabled LPUART interrupts. The enabled interrupts are returned
AnnaBridge 171:3a7713b1edbc 376 * as the logical OR value of the enumerators @ref _lpuart_interrupt_enable. To check
AnnaBridge 171:3a7713b1edbc 377 * a specific interrupt enable status, compare the return value with enumerators
AnnaBridge 171:3a7713b1edbc 378 * in @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 379 * For example, to check whether the TX empty interrupt is enabled:
AnnaBridge 171:3a7713b1edbc 380 * @code
AnnaBridge 171:3a7713b1edbc 381 * uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);
AnnaBridge 171:3a7713b1edbc 382 *
AnnaBridge 171:3a7713b1edbc 383 * if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
AnnaBridge 171:3a7713b1edbc 384 * {
AnnaBridge 171:3a7713b1edbc 385 * ...
AnnaBridge 171:3a7713b1edbc 386 * }
AnnaBridge 171:3a7713b1edbc 387 * @endcode
AnnaBridge 171:3a7713b1edbc 388 *
AnnaBridge 171:3a7713b1edbc 389 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 390 * @return LPUART interrupt flags which are logical OR of the enumerators in @ref _lpuart_interrupt_enable.
AnnaBridge 171:3a7713b1edbc 391 */
AnnaBridge 171:3a7713b1edbc 392 uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base);
AnnaBridge 171:3a7713b1edbc 393
AnnaBridge 171:3a7713b1edbc 394 #if defined(FSL_FEATURE_LPUART_HAS_DMA_ENABLE) && FSL_FEATURE_LPUART_HAS_DMA_ENABLE
AnnaBridge 171:3a7713b1edbc 395 /*!
AnnaBridge 171:3a7713b1edbc 396 * @brief Gets the LPUART data register address.
AnnaBridge 171:3a7713b1edbc 397 *
AnnaBridge 171:3a7713b1edbc 398 * This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.
AnnaBridge 171:3a7713b1edbc 399 *
AnnaBridge 171:3a7713b1edbc 400 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 401 * @return LPUART data register addresses which are used both by the transmitter and receiver.
AnnaBridge 171:3a7713b1edbc 402 */
AnnaBridge 171:3a7713b1edbc 403 static inline uint32_t LPUART_GetDataRegisterAddress(LPUART_Type *base)
AnnaBridge 171:3a7713b1edbc 404 {
AnnaBridge 171:3a7713b1edbc 405 return (uint32_t) & (base->DATA);
AnnaBridge 171:3a7713b1edbc 406 }
AnnaBridge 171:3a7713b1edbc 407
AnnaBridge 171:3a7713b1edbc 408 /*!
AnnaBridge 171:3a7713b1edbc 409 * @brief Enables or disables the LPUART transmitter DMA request.
AnnaBridge 171:3a7713b1edbc 410 *
AnnaBridge 171:3a7713b1edbc 411 * This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.
AnnaBridge 171:3a7713b1edbc 412 *
AnnaBridge 171:3a7713b1edbc 413 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 414 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 415 */
AnnaBridge 171:3a7713b1edbc 416 static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 417 {
AnnaBridge 171:3a7713b1edbc 418 if (enable)
AnnaBridge 171:3a7713b1edbc 419 {
AnnaBridge 171:3a7713b1edbc 420 base->BAUD |= LPUART_BAUD_TDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 421 base->CTRL |= LPUART_CTRL_TIE_MASK;
AnnaBridge 171:3a7713b1edbc 422 }
AnnaBridge 171:3a7713b1edbc 423 else
AnnaBridge 171:3a7713b1edbc 424 {
AnnaBridge 171:3a7713b1edbc 425 base->BAUD &= ~LPUART_BAUD_TDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 426 base->CTRL &= ~LPUART_CTRL_TIE_MASK;
AnnaBridge 171:3a7713b1edbc 427 }
AnnaBridge 171:3a7713b1edbc 428 }
AnnaBridge 171:3a7713b1edbc 429
AnnaBridge 171:3a7713b1edbc 430 /*!
AnnaBridge 171:3a7713b1edbc 431 * @brief Enables or disables the LPUART receiver DMA.
AnnaBridge 171:3a7713b1edbc 432 *
AnnaBridge 171:3a7713b1edbc 433 * This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.
AnnaBridge 171:3a7713b1edbc 434 *
AnnaBridge 171:3a7713b1edbc 435 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 436 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 437 */
AnnaBridge 171:3a7713b1edbc 438 static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 439 {
AnnaBridge 171:3a7713b1edbc 440 if (enable)
AnnaBridge 171:3a7713b1edbc 441 {
AnnaBridge 171:3a7713b1edbc 442 base->BAUD |= LPUART_BAUD_RDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 443 base->CTRL |= LPUART_CTRL_RIE_MASK;
AnnaBridge 171:3a7713b1edbc 444 }
AnnaBridge 171:3a7713b1edbc 445 else
AnnaBridge 171:3a7713b1edbc 446 {
AnnaBridge 171:3a7713b1edbc 447 base->BAUD &= ~LPUART_BAUD_RDMAE_MASK;
AnnaBridge 171:3a7713b1edbc 448 base->CTRL &= ~LPUART_CTRL_RIE_MASK;
AnnaBridge 171:3a7713b1edbc 449 }
AnnaBridge 171:3a7713b1edbc 450 }
AnnaBridge 171:3a7713b1edbc 451
AnnaBridge 171:3a7713b1edbc 452 /* @} */
AnnaBridge 171:3a7713b1edbc 453 #endif /* FSL_FEATURE_LPUART_HAS_DMA_ENABLE */
AnnaBridge 171:3a7713b1edbc 454
AnnaBridge 171:3a7713b1edbc 455 /*!
AnnaBridge 171:3a7713b1edbc 456 * @name Bus Operations
AnnaBridge 171:3a7713b1edbc 457 * @{
AnnaBridge 171:3a7713b1edbc 458 */
AnnaBridge 171:3a7713b1edbc 459
AnnaBridge 171:3a7713b1edbc 460 /*!
AnnaBridge 171:3a7713b1edbc 461 * @brief Enables or disables the LPUART transmitter.
AnnaBridge 171:3a7713b1edbc 462 *
AnnaBridge 171:3a7713b1edbc 463 * This function enables or disables the LPUART transmitter.
AnnaBridge 171:3a7713b1edbc 464 *
AnnaBridge 171:3a7713b1edbc 465 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 466 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 467 */
AnnaBridge 171:3a7713b1edbc 468 static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 469 {
AnnaBridge 171:3a7713b1edbc 470 if (enable)
AnnaBridge 171:3a7713b1edbc 471 {
AnnaBridge 171:3a7713b1edbc 472 base->CTRL |= LPUART_CTRL_TE_MASK;
AnnaBridge 171:3a7713b1edbc 473 }
AnnaBridge 171:3a7713b1edbc 474 else
AnnaBridge 171:3a7713b1edbc 475 {
AnnaBridge 171:3a7713b1edbc 476 base->CTRL &= ~LPUART_CTRL_TE_MASK;
AnnaBridge 171:3a7713b1edbc 477 }
AnnaBridge 171:3a7713b1edbc 478 }
AnnaBridge 171:3a7713b1edbc 479
AnnaBridge 171:3a7713b1edbc 480 /*!
AnnaBridge 171:3a7713b1edbc 481 * @brief Enables or disables the LPUART receiver.
AnnaBridge 171:3a7713b1edbc 482 *
AnnaBridge 171:3a7713b1edbc 483 * This function enables or disables the LPUART receiver.
AnnaBridge 171:3a7713b1edbc 484 *
AnnaBridge 171:3a7713b1edbc 485 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 486 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 487 */
AnnaBridge 171:3a7713b1edbc 488 static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 489 {
AnnaBridge 171:3a7713b1edbc 490 if (enable)
AnnaBridge 171:3a7713b1edbc 491 {
AnnaBridge 171:3a7713b1edbc 492 base->CTRL |= LPUART_CTRL_RE_MASK;
AnnaBridge 171:3a7713b1edbc 493 }
AnnaBridge 171:3a7713b1edbc 494 else
AnnaBridge 171:3a7713b1edbc 495 {
AnnaBridge 171:3a7713b1edbc 496 base->CTRL &= ~LPUART_CTRL_RE_MASK;
AnnaBridge 171:3a7713b1edbc 497 }
AnnaBridge 171:3a7713b1edbc 498 }
AnnaBridge 171:3a7713b1edbc 499
AnnaBridge 171:3a7713b1edbc 500 /*!
AnnaBridge 171:3a7713b1edbc 501 * @brief Writes to the transmitter register.
AnnaBridge 171:3a7713b1edbc 502 *
AnnaBridge 171:3a7713b1edbc 503 * This function writes data to the transmitter register directly. The upper layer must
AnnaBridge 171:3a7713b1edbc 504 * ensure that the TX register is empty or that the TX FIFO has room before calling this function.
AnnaBridge 171:3a7713b1edbc 505 *
AnnaBridge 171:3a7713b1edbc 506 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 507 * @param data Data write to the TX register.
AnnaBridge 171:3a7713b1edbc 508 */
AnnaBridge 171:3a7713b1edbc 509 static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)
AnnaBridge 171:3a7713b1edbc 510 {
AnnaBridge 171:3a7713b1edbc 511 base->DATA = data;
AnnaBridge 171:3a7713b1edbc 512 }
AnnaBridge 171:3a7713b1edbc 513
AnnaBridge 171:3a7713b1edbc 514 /*!
AnnaBridge 171:3a7713b1edbc 515 * @brief Reads the RX register.
AnnaBridge 171:3a7713b1edbc 516 *
AnnaBridge 171:3a7713b1edbc 517 * This function reads data from the TX register directly. The upper layer must
AnnaBridge 171:3a7713b1edbc 518 * ensure that the RX register is full or that the TX FIFO has data before calling this function.
AnnaBridge 171:3a7713b1edbc 519 *
AnnaBridge 171:3a7713b1edbc 520 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 521 * @return Data read from data register.
AnnaBridge 171:3a7713b1edbc 522 */
AnnaBridge 171:3a7713b1edbc 523 static inline uint8_t LPUART_ReadByte(LPUART_Type *base)
AnnaBridge 171:3a7713b1edbc 524 {
AnnaBridge 171:3a7713b1edbc 525 return base->DATA;
AnnaBridge 171:3a7713b1edbc 526 }
AnnaBridge 171:3a7713b1edbc 527
AnnaBridge 171:3a7713b1edbc 528 /*!
AnnaBridge 171:3a7713b1edbc 529 * @brief Writes to transmitter register using a blocking method.
AnnaBridge 171:3a7713b1edbc 530 *
AnnaBridge 171:3a7713b1edbc 531 * This function polls the transmitter register, waits for the register to be empty or for TX FIFO to have
AnnaBridge 171:3a7713b1edbc 532 * room and then writes data to the transmitter buffer.
AnnaBridge 171:3a7713b1edbc 533 *
AnnaBridge 171:3a7713b1edbc 534 * @note This function does not check whether all data has been sent out to the bus.
AnnaBridge 171:3a7713b1edbc 535 * Before disabling the transmitter, check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is
AnnaBridge 171:3a7713b1edbc 536 * finished.
AnnaBridge 171:3a7713b1edbc 537 *
AnnaBridge 171:3a7713b1edbc 538 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 539 * @param data Start address of the data to write.
AnnaBridge 171:3a7713b1edbc 540 * @param length Size of the data to write.
AnnaBridge 171:3a7713b1edbc 541 */
AnnaBridge 171:3a7713b1edbc 542 void LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length);
AnnaBridge 171:3a7713b1edbc 543
AnnaBridge 171:3a7713b1edbc 544 /*!
AnnaBridge 171:3a7713b1edbc 545 * @brief Reads the RX data register using a blocking method.
AnnaBridge 171:3a7713b1edbc 546 *
AnnaBridge 171:3a7713b1edbc 547 * This function polls the RX register, waits for the RX register full or RX FIFO
AnnaBridge 171:3a7713b1edbc 548 * has data then reads data from the TX register.
AnnaBridge 171:3a7713b1edbc 549 *
AnnaBridge 171:3a7713b1edbc 550 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 551 * @param data Start address of the buffer to store the received data.
AnnaBridge 171:3a7713b1edbc 552 * @param length Size of the buffer.
AnnaBridge 171:3a7713b1edbc 553 * @retval kStatus_LPUART_RxHardwareOverrun Receiver overrun happened while receiving data.
AnnaBridge 171:3a7713b1edbc 554 * @retval kStatus_LPUART_NoiseError Noise error happened while receiving data.
AnnaBridge 171:3a7713b1edbc 555 * @retval kStatus_LPUART_FramingError Framing error happened while receiving data.
AnnaBridge 171:3a7713b1edbc 556 * @retval kStatus_LPUART_ParityError Parity error happened while receiving data.
AnnaBridge 171:3a7713b1edbc 557 * @retval kStatus_Success Successfully received all data.
AnnaBridge 171:3a7713b1edbc 558 */
AnnaBridge 171:3a7713b1edbc 559 status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length);
AnnaBridge 171:3a7713b1edbc 560
AnnaBridge 171:3a7713b1edbc 561 /* @} */
AnnaBridge 171:3a7713b1edbc 562
AnnaBridge 171:3a7713b1edbc 563 /*!
AnnaBridge 171:3a7713b1edbc 564 * @name Transactional
AnnaBridge 171:3a7713b1edbc 565 * @{
AnnaBridge 171:3a7713b1edbc 566 */
AnnaBridge 171:3a7713b1edbc 567
AnnaBridge 171:3a7713b1edbc 568 /*!
AnnaBridge 171:3a7713b1edbc 569 * @brief Initializes the LPUART handle.
AnnaBridge 171:3a7713b1edbc 570 *
AnnaBridge 171:3a7713b1edbc 571 * This function initializes the LPUART handle, which can be used for other LPUART
AnnaBridge 171:3a7713b1edbc 572 * transactional APIs. Usually, for a specified LPUART instance,
AnnaBridge 171:3a7713b1edbc 573 * call this API once to get the initialized handle.
AnnaBridge 171:3a7713b1edbc 574 *
AnnaBridge 171:3a7713b1edbc 575 * The LPUART driver supports the "background" receiving, which means that user can set up
AnnaBridge 171:3a7713b1edbc 576 * an RX ring buffer optionally. Data received is stored into the ring buffer even when the
AnnaBridge 171:3a7713b1edbc 577 * user doesn't call the LPUART_TransferReceiveNonBlocking() API. If there is already data received
AnnaBridge 171:3a7713b1edbc 578 * in the ring buffer, the user can get the received data from the ring buffer directly.
AnnaBridge 171:3a7713b1edbc 579 * The ring buffer is disabled if passing NULL as @p ringBuffer.
AnnaBridge 171:3a7713b1edbc 580 *
AnnaBridge 171:3a7713b1edbc 581 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 582 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 583 * @param callback Callback function.
AnnaBridge 171:3a7713b1edbc 584 * @param userData User data.
AnnaBridge 171:3a7713b1edbc 585 */
AnnaBridge 171:3a7713b1edbc 586 void LPUART_TransferCreateHandle(LPUART_Type *base,
AnnaBridge 171:3a7713b1edbc 587 lpuart_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 588 lpuart_transfer_callback_t callback,
AnnaBridge 171:3a7713b1edbc 589 void *userData);
AnnaBridge 171:3a7713b1edbc 590 /*!
AnnaBridge 171:3a7713b1edbc 591 * @brief Transmits a buffer of data using the interrupt method.
AnnaBridge 171:3a7713b1edbc 592 *
AnnaBridge 171:3a7713b1edbc 593 * This function send data using an interrupt method. This is a non-blocking function, which
AnnaBridge 171:3a7713b1edbc 594 * returns directly without waiting for all data written to the transmitter register. When
AnnaBridge 171:3a7713b1edbc 595 * all data is written to the TX register in the ISR, the LPUART driver calls the callback
AnnaBridge 171:3a7713b1edbc 596 * function and passes the @ref kStatus_LPUART_TxIdle as status parameter.
AnnaBridge 171:3a7713b1edbc 597 *
AnnaBridge 171:3a7713b1edbc 598 * @note The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written
AnnaBridge 171:3a7713b1edbc 599 * to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX,
AnnaBridge 171:3a7713b1edbc 600 * check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.
AnnaBridge 171:3a7713b1edbc 601 *
AnnaBridge 171:3a7713b1edbc 602 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 603 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 604 * @param xfer LPUART transfer structure, refer to #lpuart_transfer_t.
AnnaBridge 171:3a7713b1edbc 605 * @retval kStatus_Success Successfully start the data transmission.
AnnaBridge 171:3a7713b1edbc 606 * @retval kStatus_LPUART_TxBusy Previous transmission still not finished, data not all written to the TX register.
AnnaBridge 171:3a7713b1edbc 607 * @retval kStatus_InvalidArgument Invalid argument.
AnnaBridge 171:3a7713b1edbc 608 */
AnnaBridge 171:3a7713b1edbc 609 status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer);
AnnaBridge 171:3a7713b1edbc 610
AnnaBridge 171:3a7713b1edbc 611 /*!
AnnaBridge 171:3a7713b1edbc 612 * @brief Sets up the RX ring buffer.
AnnaBridge 171:3a7713b1edbc 613 *
AnnaBridge 171:3a7713b1edbc 614 * This function sets up the RX ring buffer to a specific UART handle.
AnnaBridge 171:3a7713b1edbc 615 *
AnnaBridge 171:3a7713b1edbc 616 * When the RX ring buffer is used, data received is stored into the ring buffer even when
AnnaBridge 171:3a7713b1edbc 617 * the user doesn't call the UART_TransferReceiveNonBlocking() API. If there is already data received
AnnaBridge 171:3a7713b1edbc 618 * in the ring buffer, the user can get the received data from the ring buffer directly.
AnnaBridge 171:3a7713b1edbc 619 *
AnnaBridge 171:3a7713b1edbc 620 * @note When using RX ring buffer, one byte is reserved for internal use. In other
AnnaBridge 171:3a7713b1edbc 621 * words, if @p ringBufferSize is 32, then only 31 bytes are used for saving data.
AnnaBridge 171:3a7713b1edbc 622 *
AnnaBridge 171:3a7713b1edbc 623 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 624 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 625 * @param ringBuffer Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
AnnaBridge 171:3a7713b1edbc 626 * @param ringBufferSize size of the ring buffer.
AnnaBridge 171:3a7713b1edbc 627 */
AnnaBridge 171:3a7713b1edbc 628 void LPUART_TransferStartRingBuffer(LPUART_Type *base,
AnnaBridge 171:3a7713b1edbc 629 lpuart_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 630 uint8_t *ringBuffer,
AnnaBridge 171:3a7713b1edbc 631 size_t ringBufferSize);
AnnaBridge 171:3a7713b1edbc 632
AnnaBridge 171:3a7713b1edbc 633 /*!
AnnaBridge 171:3a7713b1edbc 634 * @brief Abort the background transfer and uninstall the ring buffer.
AnnaBridge 171:3a7713b1edbc 635 *
AnnaBridge 171:3a7713b1edbc 636 * This function aborts the background transfer and uninstalls the ring buffer.
AnnaBridge 171:3a7713b1edbc 637 *
AnnaBridge 171:3a7713b1edbc 638 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 639 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 640 */
AnnaBridge 171:3a7713b1edbc 641 void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 642
AnnaBridge 171:3a7713b1edbc 643 /*!
AnnaBridge 171:3a7713b1edbc 644 * @brief Aborts the interrupt-driven data transmit.
AnnaBridge 171:3a7713b1edbc 645 *
AnnaBridge 171:3a7713b1edbc 646 * This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out
AnnaBridge 171:3a7713b1edbc 647 * how many bytes are still not sent out.
AnnaBridge 171:3a7713b1edbc 648 *
AnnaBridge 171:3a7713b1edbc 649 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 650 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 651 */
AnnaBridge 171:3a7713b1edbc 652 void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 653
AnnaBridge 171:3a7713b1edbc 654 /*!
AnnaBridge 171:3a7713b1edbc 655 * @brief Get the number of bytes that have been written to LPUART TX register.
AnnaBridge 171:3a7713b1edbc 656 *
AnnaBridge 171:3a7713b1edbc 657 * This function gets the number of bytes that have been written to LPUART TX
AnnaBridge 171:3a7713b1edbc 658 * register by interrupt method.
AnnaBridge 171:3a7713b1edbc 659 *
AnnaBridge 171:3a7713b1edbc 660 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 661 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 662 * @param count Send bytes count.
AnnaBridge 171:3a7713b1edbc 663 * @retval kStatus_NoTransferInProgress No send in progress.
AnnaBridge 171:3a7713b1edbc 664 * @retval kStatus_InvalidArgument Parameter is invalid.
AnnaBridge 171:3a7713b1edbc 665 * @retval kStatus_Success Get successfully through the parameter \p count;
AnnaBridge 171:3a7713b1edbc 666 */
AnnaBridge 171:3a7713b1edbc 667 status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
AnnaBridge 171:3a7713b1edbc 668
AnnaBridge 171:3a7713b1edbc 669 /*!
AnnaBridge 171:3a7713b1edbc 670 * @brief Receives a buffer of data using the interrupt method.
AnnaBridge 171:3a7713b1edbc 671 *
AnnaBridge 171:3a7713b1edbc 672 * This function receives data using an interrupt method. This is a non-blocking function
AnnaBridge 171:3a7713b1edbc 673 * which returns without waiting to ensure that all data are received.
AnnaBridge 171:3a7713b1edbc 674 * If the RX ring buffer is used and not empty, the data in the ring buffer is copied and
AnnaBridge 171:3a7713b1edbc 675 * the parameter @p receivedBytes shows how many bytes are copied from the ring buffer.
AnnaBridge 171:3a7713b1edbc 676 * After copying, if the data in the ring buffer is not enough for read, the receive
AnnaBridge 171:3a7713b1edbc 677 * request is saved by the LPUART driver. When the new data arrives, the receive request
AnnaBridge 171:3a7713b1edbc 678 * is serviced first. When all data is received, the LPUART driver notifies the upper layer
AnnaBridge 171:3a7713b1edbc 679 * through a callback function and passes a status parameter @ref kStatus_UART_RxIdle.
AnnaBridge 171:3a7713b1edbc 680 * For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer.
AnnaBridge 171:3a7713b1edbc 681 * The 5 bytes are copied to xfer->data, which returns with the
AnnaBridge 171:3a7713b1edbc 682 * parameter @p receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is
AnnaBridge 171:3a7713b1edbc 683 * saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer.
AnnaBridge 171:3a7713b1edbc 684 * If the RX ring buffer is not enabled, this function enables the RX and RX interrupt
AnnaBridge 171:3a7713b1edbc 685 * to receive data to xfer->data. When all data is received, the upper layer is notified.
AnnaBridge 171:3a7713b1edbc 686 *
AnnaBridge 171:3a7713b1edbc 687 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 688 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 689 * @param xfer LPUART transfer structure, refer to #uart_transfer_t.
AnnaBridge 171:3a7713b1edbc 690 * @param receivedBytes Bytes received from the ring buffer directly.
AnnaBridge 171:3a7713b1edbc 691 * @retval kStatus_Success Successfully queue the transfer into the transmit queue.
AnnaBridge 171:3a7713b1edbc 692 * @retval kStatus_LPUART_RxBusy Previous receive request is not finished.
AnnaBridge 171:3a7713b1edbc 693 * @retval kStatus_InvalidArgument Invalid argument.
AnnaBridge 171:3a7713b1edbc 694 */
AnnaBridge 171:3a7713b1edbc 695 status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base,
AnnaBridge 171:3a7713b1edbc 696 lpuart_handle_t *handle,
AnnaBridge 171:3a7713b1edbc 697 lpuart_transfer_t *xfer,
AnnaBridge 171:3a7713b1edbc 698 size_t *receivedBytes);
AnnaBridge 171:3a7713b1edbc 699
AnnaBridge 171:3a7713b1edbc 700 /*!
AnnaBridge 171:3a7713b1edbc 701 * @brief Aborts the interrupt-driven data receiving.
AnnaBridge 171:3a7713b1edbc 702 *
AnnaBridge 171:3a7713b1edbc 703 * This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out
AnnaBridge 171:3a7713b1edbc 704 * how many bytes not received yet.
AnnaBridge 171:3a7713b1edbc 705 *
AnnaBridge 171:3a7713b1edbc 706 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 707 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 708 */
AnnaBridge 171:3a7713b1edbc 709 void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 710
AnnaBridge 171:3a7713b1edbc 711 /*!
AnnaBridge 171:3a7713b1edbc 712 * @brief Get the number of bytes that have been received.
AnnaBridge 171:3a7713b1edbc 713 *
AnnaBridge 171:3a7713b1edbc 714 * This function gets the number of bytes that have been received.
AnnaBridge 171:3a7713b1edbc 715 *
AnnaBridge 171:3a7713b1edbc 716 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 717 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 718 * @param count Receive bytes count.
AnnaBridge 171:3a7713b1edbc 719 * @retval kStatus_NoTransferInProgress No receive in progress.
AnnaBridge 171:3a7713b1edbc 720 * @retval kStatus_InvalidArgument Parameter is invalid.
AnnaBridge 171:3a7713b1edbc 721 * @retval kStatus_Success Get successfully through the parameter \p count;
AnnaBridge 171:3a7713b1edbc 722 */
AnnaBridge 171:3a7713b1edbc 723 status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count);
AnnaBridge 171:3a7713b1edbc 724
AnnaBridge 171:3a7713b1edbc 725 /*!
AnnaBridge 171:3a7713b1edbc 726 * @brief LPUART IRQ handle function.
AnnaBridge 171:3a7713b1edbc 727 *
AnnaBridge 171:3a7713b1edbc 728 * This function handles the LPUART transmit and receive IRQ request.
AnnaBridge 171:3a7713b1edbc 729 *
AnnaBridge 171:3a7713b1edbc 730 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 731 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 732 */
AnnaBridge 171:3a7713b1edbc 733 void LPUART_TransferHandleIRQ(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 734
AnnaBridge 171:3a7713b1edbc 735 /*!
AnnaBridge 171:3a7713b1edbc 736 * @brief LPUART Error IRQ handle function.
AnnaBridge 171:3a7713b1edbc 737 *
AnnaBridge 171:3a7713b1edbc 738 * This function handles the LPUART error IRQ request.
AnnaBridge 171:3a7713b1edbc 739 *
AnnaBridge 171:3a7713b1edbc 740 * @param base LPUART peripheral base address.
AnnaBridge 171:3a7713b1edbc 741 * @param handle LPUART handle pointer.
AnnaBridge 171:3a7713b1edbc 742 */
AnnaBridge 171:3a7713b1edbc 743 void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, lpuart_handle_t *handle);
AnnaBridge 171:3a7713b1edbc 744
AnnaBridge 171:3a7713b1edbc 745 /* @} */
AnnaBridge 171:3a7713b1edbc 746
AnnaBridge 171:3a7713b1edbc 747 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 748 }
AnnaBridge 171:3a7713b1edbc 749 #endif
AnnaBridge 171:3a7713b1edbc 750
AnnaBridge 171:3a7713b1edbc 751 /*! @}*/
AnnaBridge 171:3a7713b1edbc 752
AnnaBridge 171:3a7713b1edbc 753 #endif /* _FSL_LPUART_H_ */