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This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_KL25Z/TOOLCHAIN_ARM_STD/PeripheralNames.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2006-2013 ARM Limited
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 171:3a7713b1edbc 5 * you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 6 * You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 13 * See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 14 * limitations under the License.
AnnaBridge 171:3a7713b1edbc 15 */
AnnaBridge 171:3a7713b1edbc 16 #ifndef MBED_PERIPHERALNAMES_H
AnnaBridge 171:3a7713b1edbc 17 #define MBED_PERIPHERALNAMES_H
AnnaBridge 171:3a7713b1edbc 18
AnnaBridge 171:3a7713b1edbc 19 #include "cmsis.h"
AnnaBridge 171:3a7713b1edbc 20
AnnaBridge 171:3a7713b1edbc 21 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 22 extern "C" {
AnnaBridge 171:3a7713b1edbc 23 #endif
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25 typedef enum {
AnnaBridge 171:3a7713b1edbc 26 OSC32KCLK = 0,
AnnaBridge 171:3a7713b1edbc 27 RTC_CLKIN = 2
AnnaBridge 171:3a7713b1edbc 28 } RTCName;
AnnaBridge 171:3a7713b1edbc 29
AnnaBridge 171:3a7713b1edbc 30 typedef enum {
AnnaBridge 171:3a7713b1edbc 31 UART_0 = (int)UART0_BASE,
AnnaBridge 171:3a7713b1edbc 32 UART_1 = (int)UART1_BASE,
AnnaBridge 171:3a7713b1edbc 33 UART_2 = (int)UART2_BASE
AnnaBridge 171:3a7713b1edbc 34 } UARTName;
AnnaBridge 171:3a7713b1edbc 35 #define STDIO_UART_TX USBTX
AnnaBridge 171:3a7713b1edbc 36 #define STDIO_UART_RX USBRX
AnnaBridge 171:3a7713b1edbc 37 #define STDIO_UART UART_0
AnnaBridge 171:3a7713b1edbc 38
AnnaBridge 171:3a7713b1edbc 39 typedef enum {
AnnaBridge 171:3a7713b1edbc 40 I2C_0 = (int)I2C0_BASE,
AnnaBridge 171:3a7713b1edbc 41 I2C_1 = (int)I2C1_BASE,
AnnaBridge 171:3a7713b1edbc 42 } I2CName;
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 #define TPM_SHIFT 8
AnnaBridge 171:3a7713b1edbc 45 typedef enum {
AnnaBridge 171:3a7713b1edbc 46 PWM_1 = (0 << TPM_SHIFT) | (0), // TPM0 CH0
AnnaBridge 171:3a7713b1edbc 47 PWM_2 = (0 << TPM_SHIFT) | (1), // TPM0 CH1
AnnaBridge 171:3a7713b1edbc 48 PWM_3 = (0 << TPM_SHIFT) | (2), // TPM0 CH2
AnnaBridge 171:3a7713b1edbc 49 PWM_4 = (0 << TPM_SHIFT) | (3), // TPM0 CH3
AnnaBridge 171:3a7713b1edbc 50 PWM_5 = (0 << TPM_SHIFT) | (4), // TPM0 CH4
AnnaBridge 171:3a7713b1edbc 51 PWM_6 = (0 << TPM_SHIFT) | (5), // TPM0 CH5
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 PWM_7 = (1 << TPM_SHIFT) | (0), // TPM1 CH0
AnnaBridge 171:3a7713b1edbc 54 PWM_8 = (1 << TPM_SHIFT) | (1), // TPM1 CH1
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 PWM_9 = (2 << TPM_SHIFT) | (0), // TPM2 CH0
AnnaBridge 171:3a7713b1edbc 57 PWM_10 = (2 << TPM_SHIFT) | (1) // TPM2 CH1
AnnaBridge 171:3a7713b1edbc 58 } PWMName;
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 #define CHANNELS_A_SHIFT 5
AnnaBridge 171:3a7713b1edbc 61 typedef enum {
AnnaBridge 171:3a7713b1edbc 62 ADC0_SE0 = 0,
AnnaBridge 171:3a7713b1edbc 63 ADC0_SE3 = 3,
AnnaBridge 171:3a7713b1edbc 64 ADC0_SE4a = (1 << CHANNELS_A_SHIFT) | (4),
AnnaBridge 171:3a7713b1edbc 65 ADC0_SE4b = 4,
AnnaBridge 171:3a7713b1edbc 66 ADC0_SE5b = 5,
AnnaBridge 171:3a7713b1edbc 67 ADC0_SE6b = 6,
AnnaBridge 171:3a7713b1edbc 68 ADC0_SE7a = (1 << CHANNELS_A_SHIFT) | (7),
AnnaBridge 171:3a7713b1edbc 69 ADC0_SE7b = 7,
AnnaBridge 171:3a7713b1edbc 70 ADC0_SE8 = 8,
AnnaBridge 171:3a7713b1edbc 71 ADC0_SE9 = 9,
AnnaBridge 171:3a7713b1edbc 72 ADC0_SE11 = 11,
AnnaBridge 171:3a7713b1edbc 73 ADC0_SE12 = 12,
AnnaBridge 171:3a7713b1edbc 74 ADC0_SE13 = 13,
AnnaBridge 171:3a7713b1edbc 75 ADC0_SE14 = 14,
AnnaBridge 171:3a7713b1edbc 76 ADC0_SE15 = 15,
AnnaBridge 171:3a7713b1edbc 77 ADC0_SE23 = 23
AnnaBridge 171:3a7713b1edbc 78 } ADCName;
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 typedef enum {
AnnaBridge 171:3a7713b1edbc 81 DAC_0 = 0
AnnaBridge 171:3a7713b1edbc 82 } DACName;
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 typedef enum {
AnnaBridge 171:3a7713b1edbc 86 SPI_0 = (int)SPI0_BASE,
AnnaBridge 171:3a7713b1edbc 87 SPI_1 = (int)SPI1_BASE,
AnnaBridge 171:3a7713b1edbc 88 } SPIName;
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 // Default peripherals
AnnaBridge 171:3a7713b1edbc 91 #define MBED_SPI0 PTD2, PTD3, PTD1, PTD0
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 #define MBED_UART0 PTC4, PTC3
AnnaBridge 171:3a7713b1edbc 94 #define MBED_UART1 PTD3, PTD2
AnnaBridge 171:3a7713b1edbc 95 #define MBED_UARTUSB PTA2, PTA1
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 #define MBED_I2C0 PTC9, PTC8
AnnaBridge 171:3a7713b1edbc 98 #define MBED_I2C1 PTE1, PTE0
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 #define MBED_ANALOGOUT0 PTE30
AnnaBridge 171:3a7713b1edbc 101
AnnaBridge 171:3a7713b1edbc 102 #define MBED_ANALOGIN0 PTC2
AnnaBridge 171:3a7713b1edbc 103 #define MBED_ANALOGIN1 PTB3
AnnaBridge 171:3a7713b1edbc 104 #define MBED_ANALOGIN2 PTB2
AnnaBridge 171:3a7713b1edbc 105 #define MBED_ANALOGIN3 PTB1
AnnaBridge 171:3a7713b1edbc 106 #define MBED_ANALOGIN4 PTB0
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108 #define MBED_PWMOUT0 PTD4
AnnaBridge 171:3a7713b1edbc 109 #define MBED_PWMOUT1 PTA12
AnnaBridge 171:3a7713b1edbc 110 #define MBED_PWMOUT2 PTA4
AnnaBridge 171:3a7713b1edbc 111 #define MBED_PWMOUT3 PTA5
AnnaBridge 171:3a7713b1edbc 112 #define MBED_PWMOUT4 PTC8
AnnaBridge 171:3a7713b1edbc 113 #define MBED_PWMOUT5 PTC9
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 116 }
AnnaBridge 171:3a7713b1edbc 117 #endif
AnnaBridge 171:3a7713b1edbc 118
AnnaBridge 171:3a7713b1edbc 119 #endif