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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_K66F/TOOLCHAIN_IAR/cmsis_iccarm.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file cmsis_iccarm.h
AnnaBridge 171:3a7713b1edbc 3 * @brief CMSIS compiler ICCARM (IAR Compiler for Arm) header file
AnnaBridge 171:3a7713b1edbc 4 * @version V5.0.7
AnnaBridge 171:3a7713b1edbc 5 * @date 19. June 2018
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 7
AnnaBridge 171:3a7713b1edbc 8 //------------------------------------------------------------------------------
AnnaBridge 171:3a7713b1edbc 9 //
AnnaBridge 171:3a7713b1edbc 10 // Copyright (c) 2017-2018 IAR Systems
AnnaBridge 171:3a7713b1edbc 11 //
AnnaBridge 171:3a7713b1edbc 12 // Licensed under the Apache License, Version 2.0 (the "License")
AnnaBridge 171:3a7713b1edbc 13 // you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 14 // You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 15 // http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 16 //
AnnaBridge 171:3a7713b1edbc 17 // Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 18 // distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 19 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 20 // See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 21 // limitations under the License.
AnnaBridge 171:3a7713b1edbc 22 //
AnnaBridge 171:3a7713b1edbc 23 //------------------------------------------------------------------------------
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25
AnnaBridge 171:3a7713b1edbc 26 #ifndef __CMSIS_ICCARM_H__
AnnaBridge 171:3a7713b1edbc 27 #define __CMSIS_ICCARM_H__
AnnaBridge 171:3a7713b1edbc 28
AnnaBridge 171:3a7713b1edbc 29 #ifndef __ICCARM__
AnnaBridge 171:3a7713b1edbc 30 #error This file should only be compiled by ICCARM
AnnaBridge 171:3a7713b1edbc 31 #endif
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #pragma system_include
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #define __IAR_FT _Pragma("inline=forced") __intrinsic
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #if (__VER__ >= 8000000)
AnnaBridge 171:3a7713b1edbc 38 #define __ICCARM_V8 1
AnnaBridge 171:3a7713b1edbc 39 #else
AnnaBridge 171:3a7713b1edbc 40 #define __ICCARM_V8 0
AnnaBridge 171:3a7713b1edbc 41 #endif
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 #ifndef __ALIGNED
AnnaBridge 171:3a7713b1edbc 44 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 45 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 171:3a7713b1edbc 46 #elif (__VER__ >= 7080000)
AnnaBridge 171:3a7713b1edbc 47 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 48 #define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge 171:3a7713b1edbc 49 #else
AnnaBridge 171:3a7713b1edbc 50 #warning No compiler specific solution for __ALIGNED.__ALIGNED is ignored.
AnnaBridge 171:3a7713b1edbc 51 #define __ALIGNED(x)
AnnaBridge 171:3a7713b1edbc 52 #endif
AnnaBridge 171:3a7713b1edbc 53 #endif
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /* Define compiler macros for CPU architecture, used in CMSIS 5.
AnnaBridge 171:3a7713b1edbc 57 */
AnnaBridge 171:3a7713b1edbc 58 #if __ARM_ARCH_6M__ || __ARM_ARCH_7M__ || __ARM_ARCH_7EM__ || __ARM_ARCH_8M_BASE__ || __ARM_ARCH_8M_MAIN__
AnnaBridge 171:3a7713b1edbc 59 /* Macros already defined */
AnnaBridge 171:3a7713b1edbc 60 #else
AnnaBridge 171:3a7713b1edbc 61 #if defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
AnnaBridge 171:3a7713b1edbc 62 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 171:3a7713b1edbc 63 #elif defined(__ARM8M_BASELINE__)
AnnaBridge 171:3a7713b1edbc 64 #define __ARM_ARCH_8M_BASE__ 1
AnnaBridge 171:3a7713b1edbc 65 #elif defined(__ARM_ARCH_PROFILE) && __ARM_ARCH_PROFILE == 'M'
AnnaBridge 171:3a7713b1edbc 66 #if __ARM_ARCH == 6
AnnaBridge 171:3a7713b1edbc 67 #define __ARM_ARCH_6M__ 1
AnnaBridge 171:3a7713b1edbc 68 #elif __ARM_ARCH == 7
AnnaBridge 171:3a7713b1edbc 69 #if __ARM_FEATURE_DSP
AnnaBridge 171:3a7713b1edbc 70 #define __ARM_ARCH_7EM__ 1
AnnaBridge 171:3a7713b1edbc 71 #else
AnnaBridge 171:3a7713b1edbc 72 #define __ARM_ARCH_7M__ 1
AnnaBridge 171:3a7713b1edbc 73 #endif
AnnaBridge 171:3a7713b1edbc 74 #endif /* __ARM_ARCH */
AnnaBridge 171:3a7713b1edbc 75 #endif /* __ARM_ARCH_PROFILE == 'M' */
AnnaBridge 171:3a7713b1edbc 76 #endif
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 /* Alternativ core deduction for older ICCARM's */
AnnaBridge 171:3a7713b1edbc 79 #if !defined(__ARM_ARCH_6M__) && !defined(__ARM_ARCH_7M__) && !defined(__ARM_ARCH_7EM__) && \
AnnaBridge 171:3a7713b1edbc 80 !defined(__ARM_ARCH_8M_BASE__) && !defined(__ARM_ARCH_8M_MAIN__)
AnnaBridge 171:3a7713b1edbc 81 #if defined(__ARM6M__) && (__CORE__ == __ARM6M__)
AnnaBridge 171:3a7713b1edbc 82 #define __ARM_ARCH_6M__ 1
AnnaBridge 171:3a7713b1edbc 83 #elif defined(__ARM7M__) && (__CORE__ == __ARM7M__)
AnnaBridge 171:3a7713b1edbc 84 #define __ARM_ARCH_7M__ 1
AnnaBridge 171:3a7713b1edbc 85 #elif defined(__ARM7EM__) && (__CORE__ == __ARM7EM__)
AnnaBridge 171:3a7713b1edbc 86 #define __ARM_ARCH_7EM__ 1
AnnaBridge 171:3a7713b1edbc 87 #elif defined(__ARM8M_BASELINE__) && (__CORE == __ARM8M_BASELINE__)
AnnaBridge 171:3a7713b1edbc 88 #define __ARM_ARCH_8M_BASE__ 1
AnnaBridge 171:3a7713b1edbc 89 #elif defined(__ARM8M_MAINLINE__) && (__CORE == __ARM8M_MAINLINE__)
AnnaBridge 171:3a7713b1edbc 90 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 171:3a7713b1edbc 91 #elif defined(__ARM8EM_MAINLINE__) && (__CORE == __ARM8EM_MAINLINE__)
AnnaBridge 171:3a7713b1edbc 92 #define __ARM_ARCH_8M_MAIN__ 1
AnnaBridge 171:3a7713b1edbc 93 #else
AnnaBridge 171:3a7713b1edbc 94 #error "Unknown target."
AnnaBridge 171:3a7713b1edbc 95 #endif
AnnaBridge 171:3a7713b1edbc 96 #endif
AnnaBridge 171:3a7713b1edbc 97
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 #if defined(__ARM_ARCH_6M__) && __ARM_ARCH_6M__==1
AnnaBridge 171:3a7713b1edbc 101 #define __IAR_M0_FAMILY 1
AnnaBridge 171:3a7713b1edbc 102 #elif defined(__ARM_ARCH_8M_BASE__) && __ARM_ARCH_8M_BASE__==1
AnnaBridge 171:3a7713b1edbc 103 #define __IAR_M0_FAMILY 1
AnnaBridge 171:3a7713b1edbc 104 #else
AnnaBridge 171:3a7713b1edbc 105 #define __IAR_M0_FAMILY 0
AnnaBridge 171:3a7713b1edbc 106 #endif
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108
AnnaBridge 171:3a7713b1edbc 109 #ifndef __ASM
AnnaBridge 171:3a7713b1edbc 110 #define __ASM __asm
AnnaBridge 171:3a7713b1edbc 111 #endif
AnnaBridge 171:3a7713b1edbc 112
AnnaBridge 171:3a7713b1edbc 113 #ifndef __INLINE
AnnaBridge 171:3a7713b1edbc 114 #define __INLINE inline
AnnaBridge 171:3a7713b1edbc 115 #endif
AnnaBridge 171:3a7713b1edbc 116
AnnaBridge 171:3a7713b1edbc 117 #ifndef __NO_RETURN
AnnaBridge 171:3a7713b1edbc 118 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 119 #define __NO_RETURN __attribute__((__noreturn__))
AnnaBridge 171:3a7713b1edbc 120 #else
AnnaBridge 171:3a7713b1edbc 121 #define __NO_RETURN _Pragma("object_attribute=__noreturn")
AnnaBridge 171:3a7713b1edbc 122 #endif
AnnaBridge 171:3a7713b1edbc 123 #endif
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 #ifndef __PACKED
AnnaBridge 171:3a7713b1edbc 126 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 127 #define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge 171:3a7713b1edbc 128 #else
AnnaBridge 171:3a7713b1edbc 129 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 130 #define __PACKED __packed
AnnaBridge 171:3a7713b1edbc 131 #endif
AnnaBridge 171:3a7713b1edbc 132 #endif
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 #ifndef __PACKED_STRUCT
AnnaBridge 171:3a7713b1edbc 135 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 136 #define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge 171:3a7713b1edbc 137 #else
AnnaBridge 171:3a7713b1edbc 138 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 139 #define __PACKED_STRUCT __packed struct
AnnaBridge 171:3a7713b1edbc 140 #endif
AnnaBridge 171:3a7713b1edbc 141 #endif
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 #ifndef __PACKED_UNION
AnnaBridge 171:3a7713b1edbc 144 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 145 #define __PACKED_UNION union __attribute__((packed, aligned(1)))
AnnaBridge 171:3a7713b1edbc 146 #else
AnnaBridge 171:3a7713b1edbc 147 /* Needs IAR language extensions */
AnnaBridge 171:3a7713b1edbc 148 #define __PACKED_UNION __packed union
AnnaBridge 171:3a7713b1edbc 149 #endif
AnnaBridge 171:3a7713b1edbc 150 #endif
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 #ifndef __RESTRICT
AnnaBridge 171:3a7713b1edbc 153 #define __RESTRICT restrict
AnnaBridge 171:3a7713b1edbc 154 #endif
AnnaBridge 171:3a7713b1edbc 155
AnnaBridge 171:3a7713b1edbc 156 #ifndef __STATIC_INLINE
AnnaBridge 171:3a7713b1edbc 157 #define __STATIC_INLINE static inline
AnnaBridge 171:3a7713b1edbc 158 #endif
AnnaBridge 171:3a7713b1edbc 159
AnnaBridge 171:3a7713b1edbc 160 #ifndef __FORCEINLINE
AnnaBridge 171:3a7713b1edbc 161 #define __FORCEINLINE _Pragma("inline=forced")
AnnaBridge 171:3a7713b1edbc 162 #endif
AnnaBridge 171:3a7713b1edbc 163
AnnaBridge 171:3a7713b1edbc 164 #ifndef __STATIC_FORCEINLINE
AnnaBridge 171:3a7713b1edbc 165 #define __STATIC_FORCEINLINE __FORCEINLINE __STATIC_INLINE
AnnaBridge 171:3a7713b1edbc 166 #endif
AnnaBridge 171:3a7713b1edbc 167
AnnaBridge 171:3a7713b1edbc 168 #ifndef __UNALIGNED_UINT16_READ
AnnaBridge 171:3a7713b1edbc 169 #pragma language=save
AnnaBridge 171:3a7713b1edbc 170 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 171 __IAR_FT uint16_t __iar_uint16_read(void const *ptr)
AnnaBridge 171:3a7713b1edbc 172 {
AnnaBridge 171:3a7713b1edbc 173 return *(__packed uint16_t*)(ptr);
AnnaBridge 171:3a7713b1edbc 174 }
AnnaBridge 171:3a7713b1edbc 175 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 176 #define __UNALIGNED_UINT16_READ(PTR) __iar_uint16_read(PTR)
AnnaBridge 171:3a7713b1edbc 177 #endif
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179
AnnaBridge 171:3a7713b1edbc 180 #ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge 171:3a7713b1edbc 181 #pragma language=save
AnnaBridge 171:3a7713b1edbc 182 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 183 __IAR_FT void __iar_uint16_write(void const *ptr, uint16_t val)
AnnaBridge 171:3a7713b1edbc 184 {
AnnaBridge 171:3a7713b1edbc 185 *(__packed uint16_t*)(ptr) = val;;
AnnaBridge 171:3a7713b1edbc 186 }
AnnaBridge 171:3a7713b1edbc 187 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 188 #define __UNALIGNED_UINT16_WRITE(PTR,VAL) __iar_uint16_write(PTR,VAL)
AnnaBridge 171:3a7713b1edbc 189 #endif
AnnaBridge 171:3a7713b1edbc 190
AnnaBridge 171:3a7713b1edbc 191 #ifndef __UNALIGNED_UINT32_READ
AnnaBridge 171:3a7713b1edbc 192 #pragma language=save
AnnaBridge 171:3a7713b1edbc 193 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 194 __IAR_FT uint32_t __iar_uint32_read(void const *ptr)
AnnaBridge 171:3a7713b1edbc 195 {
AnnaBridge 171:3a7713b1edbc 196 return *(__packed uint32_t*)(ptr);
AnnaBridge 171:3a7713b1edbc 197 }
AnnaBridge 171:3a7713b1edbc 198 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 199 #define __UNALIGNED_UINT32_READ(PTR) __iar_uint32_read(PTR)
AnnaBridge 171:3a7713b1edbc 200 #endif
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 #ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge 171:3a7713b1edbc 203 #pragma language=save
AnnaBridge 171:3a7713b1edbc 204 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 205 __IAR_FT void __iar_uint32_write(void const *ptr, uint32_t val)
AnnaBridge 171:3a7713b1edbc 206 {
AnnaBridge 171:3a7713b1edbc 207 *(__packed uint32_t*)(ptr) = val;;
AnnaBridge 171:3a7713b1edbc 208 }
AnnaBridge 171:3a7713b1edbc 209 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 210 #define __UNALIGNED_UINT32_WRITE(PTR,VAL) __iar_uint32_write(PTR,VAL)
AnnaBridge 171:3a7713b1edbc 211 #endif
AnnaBridge 171:3a7713b1edbc 212
AnnaBridge 171:3a7713b1edbc 213 #ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge 171:3a7713b1edbc 214 #pragma language=save
AnnaBridge 171:3a7713b1edbc 215 #pragma language=extended
AnnaBridge 171:3a7713b1edbc 216 __packed struct __iar_u32 { uint32_t v; };
AnnaBridge 171:3a7713b1edbc 217 #pragma language=restore
AnnaBridge 171:3a7713b1edbc 218 #define __UNALIGNED_UINT32(PTR) (((struct __iar_u32 *)(PTR))->v)
AnnaBridge 171:3a7713b1edbc 219 #endif
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 #ifndef __USED
AnnaBridge 171:3a7713b1edbc 222 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 223 #define __USED __attribute__((used))
AnnaBridge 171:3a7713b1edbc 224 #else
AnnaBridge 171:3a7713b1edbc 225 #define __USED _Pragma("__root")
AnnaBridge 171:3a7713b1edbc 226 #endif
AnnaBridge 171:3a7713b1edbc 227 #endif
AnnaBridge 171:3a7713b1edbc 228
AnnaBridge 171:3a7713b1edbc 229 #ifndef __WEAK
AnnaBridge 171:3a7713b1edbc 230 #if __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 231 #define __WEAK __attribute__((weak))
AnnaBridge 171:3a7713b1edbc 232 #else
AnnaBridge 171:3a7713b1edbc 233 #define __WEAK _Pragma("__weak")
AnnaBridge 171:3a7713b1edbc 234 #endif
AnnaBridge 171:3a7713b1edbc 235 #endif
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237
AnnaBridge 171:3a7713b1edbc 238 #ifndef __ICCARM_INTRINSICS_VERSION__
AnnaBridge 171:3a7713b1edbc 239 #define __ICCARM_INTRINSICS_VERSION__ 0
AnnaBridge 171:3a7713b1edbc 240 #endif
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242 #if __ICCARM_INTRINSICS_VERSION__ == 2
AnnaBridge 171:3a7713b1edbc 243
AnnaBridge 171:3a7713b1edbc 244 #if defined(__CLZ)
AnnaBridge 171:3a7713b1edbc 245 #undef __CLZ
AnnaBridge 171:3a7713b1edbc 246 #endif
AnnaBridge 171:3a7713b1edbc 247 #if defined(__REVSH)
AnnaBridge 171:3a7713b1edbc 248 #undef __REVSH
AnnaBridge 171:3a7713b1edbc 249 #endif
AnnaBridge 171:3a7713b1edbc 250 #if defined(__RBIT)
AnnaBridge 171:3a7713b1edbc 251 #undef __RBIT
AnnaBridge 171:3a7713b1edbc 252 #endif
AnnaBridge 171:3a7713b1edbc 253 #if defined(__SSAT)
AnnaBridge 171:3a7713b1edbc 254 #undef __SSAT
AnnaBridge 171:3a7713b1edbc 255 #endif
AnnaBridge 171:3a7713b1edbc 256 #if defined(__USAT)
AnnaBridge 171:3a7713b1edbc 257 #undef __USAT
AnnaBridge 171:3a7713b1edbc 258 #endif
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 #include "iccarm_builtin.h"
AnnaBridge 171:3a7713b1edbc 261
AnnaBridge 171:3a7713b1edbc 262 #define __disable_fault_irq __iar_builtin_disable_fiq
AnnaBridge 171:3a7713b1edbc 263 #define __disable_irq __iar_builtin_disable_interrupt
AnnaBridge 171:3a7713b1edbc 264 #define __enable_fault_irq __iar_builtin_enable_fiq
AnnaBridge 171:3a7713b1edbc 265 #define __enable_irq __iar_builtin_enable_interrupt
AnnaBridge 171:3a7713b1edbc 266 #define __arm_rsr __iar_builtin_rsr
AnnaBridge 171:3a7713b1edbc 267 #define __arm_wsr __iar_builtin_wsr
AnnaBridge 171:3a7713b1edbc 268
AnnaBridge 171:3a7713b1edbc 269
AnnaBridge 171:3a7713b1edbc 270 #define __get_APSR() (__arm_rsr("APSR"))
AnnaBridge 171:3a7713b1edbc 271 #define __get_BASEPRI() (__arm_rsr("BASEPRI"))
AnnaBridge 171:3a7713b1edbc 272 #define __get_CONTROL() (__arm_rsr("CONTROL"))
AnnaBridge 171:3a7713b1edbc 273 #define __get_FAULTMASK() (__arm_rsr("FAULTMASK"))
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 #if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 171:3a7713b1edbc 276 (defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge 171:3a7713b1edbc 277 #define __get_FPSCR() (__arm_rsr("FPSCR"))
AnnaBridge 171:3a7713b1edbc 278 #define __set_FPSCR(VALUE) (__arm_wsr("FPSCR", (VALUE)))
AnnaBridge 171:3a7713b1edbc 279 #else
AnnaBridge 171:3a7713b1edbc 280 #define __get_FPSCR() ( 0 )
AnnaBridge 171:3a7713b1edbc 281 #define __set_FPSCR(VALUE) ((void)VALUE)
AnnaBridge 171:3a7713b1edbc 282 #endif
AnnaBridge 171:3a7713b1edbc 283
AnnaBridge 171:3a7713b1edbc 284 #define __get_IPSR() (__arm_rsr("IPSR"))
AnnaBridge 171:3a7713b1edbc 285 #define __get_MSP() (__arm_rsr("MSP"))
AnnaBridge 171:3a7713b1edbc 286 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 287 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 288 // without main extensions, the non-secure MSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 289 #define __get_MSPLIM() (0U)
AnnaBridge 171:3a7713b1edbc 290 #else
AnnaBridge 171:3a7713b1edbc 291 #define __get_MSPLIM() (__arm_rsr("MSPLIM"))
AnnaBridge 171:3a7713b1edbc 292 #endif
AnnaBridge 171:3a7713b1edbc 293 #define __get_PRIMASK() (__arm_rsr("PRIMASK"))
AnnaBridge 171:3a7713b1edbc 294 #define __get_PSP() (__arm_rsr("PSP"))
AnnaBridge 171:3a7713b1edbc 295
AnnaBridge 171:3a7713b1edbc 296 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 297 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 298 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 299 #define __get_PSPLIM() (0U)
AnnaBridge 171:3a7713b1edbc 300 #else
AnnaBridge 171:3a7713b1edbc 301 #define __get_PSPLIM() (__arm_rsr("PSPLIM"))
AnnaBridge 171:3a7713b1edbc 302 #endif
AnnaBridge 171:3a7713b1edbc 303
AnnaBridge 171:3a7713b1edbc 304 #define __get_xPSR() (__arm_rsr("xPSR"))
AnnaBridge 171:3a7713b1edbc 305
AnnaBridge 171:3a7713b1edbc 306 #define __set_BASEPRI(VALUE) (__arm_wsr("BASEPRI", (VALUE)))
AnnaBridge 171:3a7713b1edbc 307 #define __set_BASEPRI_MAX(VALUE) (__arm_wsr("BASEPRI_MAX", (VALUE)))
AnnaBridge 171:3a7713b1edbc 308 #define __set_CONTROL(VALUE) (__arm_wsr("CONTROL", (VALUE)))
AnnaBridge 171:3a7713b1edbc 309 #define __set_FAULTMASK(VALUE) (__arm_wsr("FAULTMASK", (VALUE)))
AnnaBridge 171:3a7713b1edbc 310 #define __set_MSP(VALUE) (__arm_wsr("MSP", (VALUE)))
AnnaBridge 171:3a7713b1edbc 311
AnnaBridge 171:3a7713b1edbc 312 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 313 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 314 // without main extensions, the non-secure MSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 315 #define __set_MSPLIM(VALUE) ((void)(VALUE))
AnnaBridge 171:3a7713b1edbc 316 #else
AnnaBridge 171:3a7713b1edbc 317 #define __set_MSPLIM(VALUE) (__arm_wsr("MSPLIM", (VALUE)))
AnnaBridge 171:3a7713b1edbc 318 #endif
AnnaBridge 171:3a7713b1edbc 319 #define __set_PRIMASK(VALUE) (__arm_wsr("PRIMASK", (VALUE)))
AnnaBridge 171:3a7713b1edbc 320 #define __set_PSP(VALUE) (__arm_wsr("PSP", (VALUE)))
AnnaBridge 171:3a7713b1edbc 321 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 322 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 323 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 324 #define __set_PSPLIM(VALUE) ((void)(VALUE))
AnnaBridge 171:3a7713b1edbc 325 #else
AnnaBridge 171:3a7713b1edbc 326 #define __set_PSPLIM(VALUE) (__arm_wsr("PSPLIM", (VALUE)))
AnnaBridge 171:3a7713b1edbc 327 #endif
AnnaBridge 171:3a7713b1edbc 328
AnnaBridge 171:3a7713b1edbc 329 #define __TZ_get_CONTROL_NS() (__arm_rsr("CONTROL_NS"))
AnnaBridge 171:3a7713b1edbc 330 #define __TZ_set_CONTROL_NS(VALUE) (__arm_wsr("CONTROL_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 331 #define __TZ_get_PSP_NS() (__arm_rsr("PSP_NS"))
AnnaBridge 171:3a7713b1edbc 332 #define __TZ_set_PSP_NS(VALUE) (__arm_wsr("PSP_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 333 #define __TZ_get_MSP_NS() (__arm_rsr("MSP_NS"))
AnnaBridge 171:3a7713b1edbc 334 #define __TZ_set_MSP_NS(VALUE) (__arm_wsr("MSP_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 335 #define __TZ_get_SP_NS() (__arm_rsr("SP_NS"))
AnnaBridge 171:3a7713b1edbc 336 #define __TZ_set_SP_NS(VALUE) (__arm_wsr("SP_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 337 #define __TZ_get_PRIMASK_NS() (__arm_rsr("PRIMASK_NS"))
AnnaBridge 171:3a7713b1edbc 338 #define __TZ_set_PRIMASK_NS(VALUE) (__arm_wsr("PRIMASK_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 339 #define __TZ_get_BASEPRI_NS() (__arm_rsr("BASEPRI_NS"))
AnnaBridge 171:3a7713b1edbc 340 #define __TZ_set_BASEPRI_NS(VALUE) (__arm_wsr("BASEPRI_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 341 #define __TZ_get_FAULTMASK_NS() (__arm_rsr("FAULTMASK_NS"))
AnnaBridge 171:3a7713b1edbc 342 #define __TZ_set_FAULTMASK_NS(VALUE)(__arm_wsr("FAULTMASK_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 343
AnnaBridge 171:3a7713b1edbc 344 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 345 (!defined (__ARM_FEATURE_CMSE) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 346 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 347 #define __TZ_get_PSPLIM_NS() (0U)
AnnaBridge 171:3a7713b1edbc 348 #define __TZ_set_PSPLIM_NS(VALUE) ((void)(VALUE))
AnnaBridge 171:3a7713b1edbc 349 #else
AnnaBridge 171:3a7713b1edbc 350 #define __TZ_get_PSPLIM_NS() (__arm_rsr("PSPLIM_NS"))
AnnaBridge 171:3a7713b1edbc 351 #define __TZ_set_PSPLIM_NS(VALUE) (__arm_wsr("PSPLIM_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 352 #endif
AnnaBridge 171:3a7713b1edbc 353
AnnaBridge 171:3a7713b1edbc 354 #define __TZ_get_MSPLIM_NS() (__arm_rsr("MSPLIM_NS"))
AnnaBridge 171:3a7713b1edbc 355 #define __TZ_set_MSPLIM_NS(VALUE) (__arm_wsr("MSPLIM_NS", (VALUE)))
AnnaBridge 171:3a7713b1edbc 356
AnnaBridge 171:3a7713b1edbc 357 #define __NOP __iar_builtin_no_operation
AnnaBridge 171:3a7713b1edbc 358
AnnaBridge 171:3a7713b1edbc 359 #define __CLZ __iar_builtin_CLZ
AnnaBridge 171:3a7713b1edbc 360 #define __CLREX __iar_builtin_CLREX
AnnaBridge 171:3a7713b1edbc 361
AnnaBridge 171:3a7713b1edbc 362 #define __DMB __iar_builtin_DMB
AnnaBridge 171:3a7713b1edbc 363 #define __DSB __iar_builtin_DSB
AnnaBridge 171:3a7713b1edbc 364 #define __ISB __iar_builtin_ISB
AnnaBridge 171:3a7713b1edbc 365
AnnaBridge 171:3a7713b1edbc 366 #define __LDREXB __iar_builtin_LDREXB
AnnaBridge 171:3a7713b1edbc 367 #define __LDREXH __iar_builtin_LDREXH
AnnaBridge 171:3a7713b1edbc 368 #define __LDREXW __iar_builtin_LDREX
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 #define __RBIT __iar_builtin_RBIT
AnnaBridge 171:3a7713b1edbc 371 #define __REV __iar_builtin_REV
AnnaBridge 171:3a7713b1edbc 372 #define __REV16 __iar_builtin_REV16
AnnaBridge 171:3a7713b1edbc 373
AnnaBridge 171:3a7713b1edbc 374 __IAR_FT int16_t __REVSH(int16_t val)
AnnaBridge 171:3a7713b1edbc 375 {
AnnaBridge 171:3a7713b1edbc 376 return (int16_t) __iar_builtin_REVSH(val);
AnnaBridge 171:3a7713b1edbc 377 }
AnnaBridge 171:3a7713b1edbc 378
AnnaBridge 171:3a7713b1edbc 379 #define __ROR __iar_builtin_ROR
AnnaBridge 171:3a7713b1edbc 380 #define __RRX __iar_builtin_RRX
AnnaBridge 171:3a7713b1edbc 381
AnnaBridge 171:3a7713b1edbc 382 #define __SEV __iar_builtin_SEV
AnnaBridge 171:3a7713b1edbc 383
AnnaBridge 171:3a7713b1edbc 384 #if !__IAR_M0_FAMILY
AnnaBridge 171:3a7713b1edbc 385 #define __SSAT __iar_builtin_SSAT
AnnaBridge 171:3a7713b1edbc 386 #endif
AnnaBridge 171:3a7713b1edbc 387
AnnaBridge 171:3a7713b1edbc 388 #define __STREXB __iar_builtin_STREXB
AnnaBridge 171:3a7713b1edbc 389 #define __STREXH __iar_builtin_STREXH
AnnaBridge 171:3a7713b1edbc 390 #define __STREXW __iar_builtin_STREX
AnnaBridge 171:3a7713b1edbc 391
AnnaBridge 171:3a7713b1edbc 392 #if !__IAR_M0_FAMILY
AnnaBridge 171:3a7713b1edbc 393 #define __USAT __iar_builtin_USAT
AnnaBridge 171:3a7713b1edbc 394 #endif
AnnaBridge 171:3a7713b1edbc 395
AnnaBridge 171:3a7713b1edbc 396 #define __WFE __iar_builtin_WFE
AnnaBridge 171:3a7713b1edbc 397 #define __WFI __iar_builtin_WFI
AnnaBridge 171:3a7713b1edbc 398
AnnaBridge 171:3a7713b1edbc 399 #if __ARM_MEDIA__
AnnaBridge 171:3a7713b1edbc 400 #define __SADD8 __iar_builtin_SADD8
AnnaBridge 171:3a7713b1edbc 401 #define __QADD8 __iar_builtin_QADD8
AnnaBridge 171:3a7713b1edbc 402 #define __SHADD8 __iar_builtin_SHADD8
AnnaBridge 171:3a7713b1edbc 403 #define __UADD8 __iar_builtin_UADD8
AnnaBridge 171:3a7713b1edbc 404 #define __UQADD8 __iar_builtin_UQADD8
AnnaBridge 171:3a7713b1edbc 405 #define __UHADD8 __iar_builtin_UHADD8
AnnaBridge 171:3a7713b1edbc 406 #define __SSUB8 __iar_builtin_SSUB8
AnnaBridge 171:3a7713b1edbc 407 #define __QSUB8 __iar_builtin_QSUB8
AnnaBridge 171:3a7713b1edbc 408 #define __SHSUB8 __iar_builtin_SHSUB8
AnnaBridge 171:3a7713b1edbc 409 #define __USUB8 __iar_builtin_USUB8
AnnaBridge 171:3a7713b1edbc 410 #define __UQSUB8 __iar_builtin_UQSUB8
AnnaBridge 171:3a7713b1edbc 411 #define __UHSUB8 __iar_builtin_UHSUB8
AnnaBridge 171:3a7713b1edbc 412 #define __SADD16 __iar_builtin_SADD16
AnnaBridge 171:3a7713b1edbc 413 #define __QADD16 __iar_builtin_QADD16
AnnaBridge 171:3a7713b1edbc 414 #define __SHADD16 __iar_builtin_SHADD16
AnnaBridge 171:3a7713b1edbc 415 #define __UADD16 __iar_builtin_UADD16
AnnaBridge 171:3a7713b1edbc 416 #define __UQADD16 __iar_builtin_UQADD16
AnnaBridge 171:3a7713b1edbc 417 #define __UHADD16 __iar_builtin_UHADD16
AnnaBridge 171:3a7713b1edbc 418 #define __SSUB16 __iar_builtin_SSUB16
AnnaBridge 171:3a7713b1edbc 419 #define __QSUB16 __iar_builtin_QSUB16
AnnaBridge 171:3a7713b1edbc 420 #define __SHSUB16 __iar_builtin_SHSUB16
AnnaBridge 171:3a7713b1edbc 421 #define __USUB16 __iar_builtin_USUB16
AnnaBridge 171:3a7713b1edbc 422 #define __UQSUB16 __iar_builtin_UQSUB16
AnnaBridge 171:3a7713b1edbc 423 #define __UHSUB16 __iar_builtin_UHSUB16
AnnaBridge 171:3a7713b1edbc 424 #define __SASX __iar_builtin_SASX
AnnaBridge 171:3a7713b1edbc 425 #define __QASX __iar_builtin_QASX
AnnaBridge 171:3a7713b1edbc 426 #define __SHASX __iar_builtin_SHASX
AnnaBridge 171:3a7713b1edbc 427 #define __UASX __iar_builtin_UASX
AnnaBridge 171:3a7713b1edbc 428 #define __UQASX __iar_builtin_UQASX
AnnaBridge 171:3a7713b1edbc 429 #define __UHASX __iar_builtin_UHASX
AnnaBridge 171:3a7713b1edbc 430 #define __SSAX __iar_builtin_SSAX
AnnaBridge 171:3a7713b1edbc 431 #define __QSAX __iar_builtin_QSAX
AnnaBridge 171:3a7713b1edbc 432 #define __SHSAX __iar_builtin_SHSAX
AnnaBridge 171:3a7713b1edbc 433 #define __USAX __iar_builtin_USAX
AnnaBridge 171:3a7713b1edbc 434 #define __UQSAX __iar_builtin_UQSAX
AnnaBridge 171:3a7713b1edbc 435 #define __UHSAX __iar_builtin_UHSAX
AnnaBridge 171:3a7713b1edbc 436 #define __USAD8 __iar_builtin_USAD8
AnnaBridge 171:3a7713b1edbc 437 #define __USADA8 __iar_builtin_USADA8
AnnaBridge 171:3a7713b1edbc 438 #define __SSAT16 __iar_builtin_SSAT16
AnnaBridge 171:3a7713b1edbc 439 #define __USAT16 __iar_builtin_USAT16
AnnaBridge 171:3a7713b1edbc 440 #define __UXTB16 __iar_builtin_UXTB16
AnnaBridge 171:3a7713b1edbc 441 #define __UXTAB16 __iar_builtin_UXTAB16
AnnaBridge 171:3a7713b1edbc 442 #define __SXTB16 __iar_builtin_SXTB16
AnnaBridge 171:3a7713b1edbc 443 #define __SXTAB16 __iar_builtin_SXTAB16
AnnaBridge 171:3a7713b1edbc 444 #define __SMUAD __iar_builtin_SMUAD
AnnaBridge 171:3a7713b1edbc 445 #define __SMUADX __iar_builtin_SMUADX
AnnaBridge 171:3a7713b1edbc 446 #define __SMMLA __iar_builtin_SMMLA
AnnaBridge 171:3a7713b1edbc 447 #define __SMLAD __iar_builtin_SMLAD
AnnaBridge 171:3a7713b1edbc 448 #define __SMLADX __iar_builtin_SMLADX
AnnaBridge 171:3a7713b1edbc 449 #define __SMLALD __iar_builtin_SMLALD
AnnaBridge 171:3a7713b1edbc 450 #define __SMLALDX __iar_builtin_SMLALDX
AnnaBridge 171:3a7713b1edbc 451 #define __SMUSD __iar_builtin_SMUSD
AnnaBridge 171:3a7713b1edbc 452 #define __SMUSDX __iar_builtin_SMUSDX
AnnaBridge 171:3a7713b1edbc 453 #define __SMLSD __iar_builtin_SMLSD
AnnaBridge 171:3a7713b1edbc 454 #define __SMLSDX __iar_builtin_SMLSDX
AnnaBridge 171:3a7713b1edbc 455 #define __SMLSLD __iar_builtin_SMLSLD
AnnaBridge 171:3a7713b1edbc 456 #define __SMLSLDX __iar_builtin_SMLSLDX
AnnaBridge 171:3a7713b1edbc 457 #define __SEL __iar_builtin_SEL
AnnaBridge 171:3a7713b1edbc 458 #define __QADD __iar_builtin_QADD
AnnaBridge 171:3a7713b1edbc 459 #define __QSUB __iar_builtin_QSUB
AnnaBridge 171:3a7713b1edbc 460 #define __PKHBT __iar_builtin_PKHBT
AnnaBridge 171:3a7713b1edbc 461 #define __PKHTB __iar_builtin_PKHTB
AnnaBridge 171:3a7713b1edbc 462 #endif
AnnaBridge 171:3a7713b1edbc 463
AnnaBridge 171:3a7713b1edbc 464 #else /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 171:3a7713b1edbc 465
AnnaBridge 171:3a7713b1edbc 466 #if __IAR_M0_FAMILY
AnnaBridge 171:3a7713b1edbc 467 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
AnnaBridge 171:3a7713b1edbc 468 #define __CLZ __cmsis_iar_clz_not_active
AnnaBridge 171:3a7713b1edbc 469 #define __SSAT __cmsis_iar_ssat_not_active
AnnaBridge 171:3a7713b1edbc 470 #define __USAT __cmsis_iar_usat_not_active
AnnaBridge 171:3a7713b1edbc 471 #define __RBIT __cmsis_iar_rbit_not_active
AnnaBridge 171:3a7713b1edbc 472 #define __get_APSR __cmsis_iar_get_APSR_not_active
AnnaBridge 171:3a7713b1edbc 473 #endif
AnnaBridge 171:3a7713b1edbc 474
AnnaBridge 171:3a7713b1edbc 475
AnnaBridge 171:3a7713b1edbc 476 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 171:3a7713b1edbc 477 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
AnnaBridge 171:3a7713b1edbc 478 #define __get_FPSCR __cmsis_iar_get_FPSR_not_active
AnnaBridge 171:3a7713b1edbc 479 #define __set_FPSCR __cmsis_iar_set_FPSR_not_active
AnnaBridge 171:3a7713b1edbc 480 #endif
AnnaBridge 171:3a7713b1edbc 481
AnnaBridge 171:3a7713b1edbc 482 #ifdef __INTRINSICS_INCLUDED
AnnaBridge 171:3a7713b1edbc 483 #error intrinsics.h is already included previously!
AnnaBridge 171:3a7713b1edbc 484 #endif
AnnaBridge 171:3a7713b1edbc 485
AnnaBridge 171:3a7713b1edbc 486 #include <intrinsics.h>
AnnaBridge 171:3a7713b1edbc 487
AnnaBridge 171:3a7713b1edbc 488 #if __IAR_M0_FAMILY
AnnaBridge 171:3a7713b1edbc 489 /* Avoid clash between intrinsics.h and arm_math.h when compiling for Cortex-M0. */
AnnaBridge 171:3a7713b1edbc 490 #undef __CLZ
AnnaBridge 171:3a7713b1edbc 491 #undef __SSAT
AnnaBridge 171:3a7713b1edbc 492 #undef __USAT
AnnaBridge 171:3a7713b1edbc 493 #undef __RBIT
AnnaBridge 171:3a7713b1edbc 494 #undef __get_APSR
AnnaBridge 171:3a7713b1edbc 495
AnnaBridge 171:3a7713b1edbc 496 __STATIC_INLINE uint8_t __CLZ(uint32_t data)
AnnaBridge 171:3a7713b1edbc 497 {
AnnaBridge 171:3a7713b1edbc 498 if (data == 0U) { return 32U; }
AnnaBridge 171:3a7713b1edbc 499
AnnaBridge 171:3a7713b1edbc 500 uint32_t count = 0U;
AnnaBridge 171:3a7713b1edbc 501 uint32_t mask = 0x80000000U;
AnnaBridge 171:3a7713b1edbc 502
AnnaBridge 171:3a7713b1edbc 503 while ((data & mask) == 0U)
AnnaBridge 171:3a7713b1edbc 504 {
AnnaBridge 171:3a7713b1edbc 505 count += 1U;
AnnaBridge 171:3a7713b1edbc 506 mask = mask >> 1U;
AnnaBridge 171:3a7713b1edbc 507 }
AnnaBridge 171:3a7713b1edbc 508 return count;
AnnaBridge 171:3a7713b1edbc 509 }
AnnaBridge 171:3a7713b1edbc 510
AnnaBridge 171:3a7713b1edbc 511 __STATIC_INLINE uint32_t __RBIT(uint32_t v)
AnnaBridge 171:3a7713b1edbc 512 {
AnnaBridge 171:3a7713b1edbc 513 uint8_t sc = 31U;
AnnaBridge 171:3a7713b1edbc 514 uint32_t r = v;
AnnaBridge 171:3a7713b1edbc 515 for (v >>= 1U; v; v >>= 1U)
AnnaBridge 171:3a7713b1edbc 516 {
AnnaBridge 171:3a7713b1edbc 517 r <<= 1U;
AnnaBridge 171:3a7713b1edbc 518 r |= v & 1U;
AnnaBridge 171:3a7713b1edbc 519 sc--;
AnnaBridge 171:3a7713b1edbc 520 }
AnnaBridge 171:3a7713b1edbc 521 return (r << sc);
AnnaBridge 171:3a7713b1edbc 522 }
AnnaBridge 171:3a7713b1edbc 523
AnnaBridge 171:3a7713b1edbc 524 __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge 171:3a7713b1edbc 525 {
AnnaBridge 171:3a7713b1edbc 526 uint32_t res;
AnnaBridge 171:3a7713b1edbc 527 __asm("MRS %0,APSR" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 528 return res;
AnnaBridge 171:3a7713b1edbc 529 }
AnnaBridge 171:3a7713b1edbc 530
AnnaBridge 171:3a7713b1edbc 531 #endif
AnnaBridge 171:3a7713b1edbc 532
AnnaBridge 171:3a7713b1edbc 533 #if (!((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge 171:3a7713b1edbc 534 (defined (__FPU_USED ) && (__FPU_USED == 1U)) ))
AnnaBridge 171:3a7713b1edbc 535 #undef __get_FPSCR
AnnaBridge 171:3a7713b1edbc 536 #undef __set_FPSCR
AnnaBridge 171:3a7713b1edbc 537 #define __get_FPSCR() (0)
AnnaBridge 171:3a7713b1edbc 538 #define __set_FPSCR(VALUE) ((void)VALUE)
AnnaBridge 171:3a7713b1edbc 539 #endif
AnnaBridge 171:3a7713b1edbc 540
AnnaBridge 171:3a7713b1edbc 541 #pragma diag_suppress=Pe940
AnnaBridge 171:3a7713b1edbc 542 #pragma diag_suppress=Pe177
AnnaBridge 171:3a7713b1edbc 543
AnnaBridge 171:3a7713b1edbc 544 #define __enable_irq __enable_interrupt
AnnaBridge 171:3a7713b1edbc 545 #define __disable_irq __disable_interrupt
AnnaBridge 171:3a7713b1edbc 546 #define __NOP __no_operation
AnnaBridge 171:3a7713b1edbc 547
AnnaBridge 171:3a7713b1edbc 548 #define __get_xPSR __get_PSR
AnnaBridge 171:3a7713b1edbc 549
AnnaBridge 171:3a7713b1edbc 550 #if (!defined(__ARM_ARCH_6M__) || __ARM_ARCH_6M__==0)
AnnaBridge 171:3a7713b1edbc 551
AnnaBridge 171:3a7713b1edbc 552 __IAR_FT uint32_t __LDREXW(uint32_t volatile *ptr)
AnnaBridge 171:3a7713b1edbc 553 {
AnnaBridge 171:3a7713b1edbc 554 return __LDREX((unsigned long *)ptr);
AnnaBridge 171:3a7713b1edbc 555 }
AnnaBridge 171:3a7713b1edbc 556
AnnaBridge 171:3a7713b1edbc 557 __IAR_FT uint32_t __STREXW(uint32_t value, uint32_t volatile *ptr)
AnnaBridge 171:3a7713b1edbc 558 {
AnnaBridge 171:3a7713b1edbc 559 return __STREX(value, (unsigned long *)ptr);
AnnaBridge 171:3a7713b1edbc 560 }
AnnaBridge 171:3a7713b1edbc 561 #endif
AnnaBridge 171:3a7713b1edbc 562
AnnaBridge 171:3a7713b1edbc 563
AnnaBridge 171:3a7713b1edbc 564 /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
AnnaBridge 171:3a7713b1edbc 565 #if (__CORTEX_M >= 0x03)
AnnaBridge 171:3a7713b1edbc 566
AnnaBridge 171:3a7713b1edbc 567 __IAR_FT uint32_t __RRX(uint32_t value)
AnnaBridge 171:3a7713b1edbc 568 {
AnnaBridge 171:3a7713b1edbc 569 uint32_t result;
AnnaBridge 171:3a7713b1edbc 570 __ASM("RRX %0, %1" : "=r"(result) : "r" (value) : "cc");
AnnaBridge 171:3a7713b1edbc 571 return(result);
AnnaBridge 171:3a7713b1edbc 572 }
AnnaBridge 171:3a7713b1edbc 573
AnnaBridge 171:3a7713b1edbc 574 __IAR_FT void __set_BASEPRI_MAX(uint32_t value)
AnnaBridge 171:3a7713b1edbc 575 {
AnnaBridge 171:3a7713b1edbc 576 __asm volatile("MSR BASEPRI_MAX,%0"::"r" (value));
AnnaBridge 171:3a7713b1edbc 577 }
AnnaBridge 171:3a7713b1edbc 578
AnnaBridge 171:3a7713b1edbc 579
AnnaBridge 171:3a7713b1edbc 580 #define __enable_fault_irq __enable_fiq
AnnaBridge 171:3a7713b1edbc 581 #define __disable_fault_irq __disable_fiq
AnnaBridge 171:3a7713b1edbc 582
AnnaBridge 171:3a7713b1edbc 583
AnnaBridge 171:3a7713b1edbc 584 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 171:3a7713b1edbc 585
AnnaBridge 171:3a7713b1edbc 586 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge 171:3a7713b1edbc 587 {
AnnaBridge 171:3a7713b1edbc 588 return (op1 >> op2) | (op1 << ((sizeof(op1)*8)-op2));
AnnaBridge 171:3a7713b1edbc 589 }
AnnaBridge 171:3a7713b1edbc 590
AnnaBridge 171:3a7713b1edbc 591 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 171:3a7713b1edbc 592 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 171:3a7713b1edbc 593
AnnaBridge 171:3a7713b1edbc 594 __IAR_FT uint32_t __get_MSPLIM(void)
AnnaBridge 171:3a7713b1edbc 595 {
AnnaBridge 171:3a7713b1edbc 596 uint32_t res;
AnnaBridge 171:3a7713b1edbc 597 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 598 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 599 // without main extensions, the non-secure MSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 600 res = 0U;
AnnaBridge 171:3a7713b1edbc 601 #else
AnnaBridge 171:3a7713b1edbc 602 __asm volatile("MRS %0,MSPLIM" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 603 #endif
AnnaBridge 171:3a7713b1edbc 604 return res;
AnnaBridge 171:3a7713b1edbc 605 }
AnnaBridge 171:3a7713b1edbc 606
AnnaBridge 171:3a7713b1edbc 607 __IAR_FT void __set_MSPLIM(uint32_t value)
AnnaBridge 171:3a7713b1edbc 608 {
AnnaBridge 171:3a7713b1edbc 609 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 610 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 611 // without main extensions, the non-secure MSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 612 (void)value;
AnnaBridge 171:3a7713b1edbc 613 #else
AnnaBridge 171:3a7713b1edbc 614 __asm volatile("MSR MSPLIM,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 615 #endif
AnnaBridge 171:3a7713b1edbc 616 }
AnnaBridge 171:3a7713b1edbc 617
AnnaBridge 171:3a7713b1edbc 618 __IAR_FT uint32_t __get_PSPLIM(void)
AnnaBridge 171:3a7713b1edbc 619 {
AnnaBridge 171:3a7713b1edbc 620 uint32_t res;
AnnaBridge 171:3a7713b1edbc 621 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 622 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 623 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 624 res = 0U;
AnnaBridge 171:3a7713b1edbc 625 #else
AnnaBridge 171:3a7713b1edbc 626 __asm volatile("MRS %0,PSPLIM" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 627 #endif
AnnaBridge 171:3a7713b1edbc 628 return res;
AnnaBridge 171:3a7713b1edbc 629 }
AnnaBridge 171:3a7713b1edbc 630
AnnaBridge 171:3a7713b1edbc 631 __IAR_FT void __set_PSPLIM(uint32_t value)
AnnaBridge 171:3a7713b1edbc 632 {
AnnaBridge 171:3a7713b1edbc 633 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 634 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 635 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 636 (void)value;
AnnaBridge 171:3a7713b1edbc 637 #else
AnnaBridge 171:3a7713b1edbc 638 __asm volatile("MSR PSPLIM,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 639 #endif
AnnaBridge 171:3a7713b1edbc 640 }
AnnaBridge 171:3a7713b1edbc 641
AnnaBridge 171:3a7713b1edbc 642 __IAR_FT uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge 171:3a7713b1edbc 643 {
AnnaBridge 171:3a7713b1edbc 644 uint32_t res;
AnnaBridge 171:3a7713b1edbc 645 __asm volatile("MRS %0,CONTROL_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 646 return res;
AnnaBridge 171:3a7713b1edbc 647 }
AnnaBridge 171:3a7713b1edbc 648
AnnaBridge 171:3a7713b1edbc 649 __IAR_FT void __TZ_set_CONTROL_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 650 {
AnnaBridge 171:3a7713b1edbc 651 __asm volatile("MSR CONTROL_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 652 }
AnnaBridge 171:3a7713b1edbc 653
AnnaBridge 171:3a7713b1edbc 654 __IAR_FT uint32_t __TZ_get_PSP_NS(void)
AnnaBridge 171:3a7713b1edbc 655 {
AnnaBridge 171:3a7713b1edbc 656 uint32_t res;
AnnaBridge 171:3a7713b1edbc 657 __asm volatile("MRS %0,PSP_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 658 return res;
AnnaBridge 171:3a7713b1edbc 659 }
AnnaBridge 171:3a7713b1edbc 660
AnnaBridge 171:3a7713b1edbc 661 __IAR_FT void __TZ_set_PSP_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 662 {
AnnaBridge 171:3a7713b1edbc 663 __asm volatile("MSR PSP_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 664 }
AnnaBridge 171:3a7713b1edbc 665
AnnaBridge 171:3a7713b1edbc 666 __IAR_FT uint32_t __TZ_get_MSP_NS(void)
AnnaBridge 171:3a7713b1edbc 667 {
AnnaBridge 171:3a7713b1edbc 668 uint32_t res;
AnnaBridge 171:3a7713b1edbc 669 __asm volatile("MRS %0,MSP_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 670 return res;
AnnaBridge 171:3a7713b1edbc 671 }
AnnaBridge 171:3a7713b1edbc 672
AnnaBridge 171:3a7713b1edbc 673 __IAR_FT void __TZ_set_MSP_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 674 {
AnnaBridge 171:3a7713b1edbc 675 __asm volatile("MSR MSP_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 676 }
AnnaBridge 171:3a7713b1edbc 677
AnnaBridge 171:3a7713b1edbc 678 __IAR_FT uint32_t __TZ_get_SP_NS(void)
AnnaBridge 171:3a7713b1edbc 679 {
AnnaBridge 171:3a7713b1edbc 680 uint32_t res;
AnnaBridge 171:3a7713b1edbc 681 __asm volatile("MRS %0,SP_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 682 return res;
AnnaBridge 171:3a7713b1edbc 683 }
AnnaBridge 171:3a7713b1edbc 684 __IAR_FT void __TZ_set_SP_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 685 {
AnnaBridge 171:3a7713b1edbc 686 __asm volatile("MSR SP_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 687 }
AnnaBridge 171:3a7713b1edbc 688
AnnaBridge 171:3a7713b1edbc 689 __IAR_FT uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge 171:3a7713b1edbc 690 {
AnnaBridge 171:3a7713b1edbc 691 uint32_t res;
AnnaBridge 171:3a7713b1edbc 692 __asm volatile("MRS %0,PRIMASK_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 693 return res;
AnnaBridge 171:3a7713b1edbc 694 }
AnnaBridge 171:3a7713b1edbc 695
AnnaBridge 171:3a7713b1edbc 696 __IAR_FT void __TZ_set_PRIMASK_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 697 {
AnnaBridge 171:3a7713b1edbc 698 __asm volatile("MSR PRIMASK_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 699 }
AnnaBridge 171:3a7713b1edbc 700
AnnaBridge 171:3a7713b1edbc 701 __IAR_FT uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge 171:3a7713b1edbc 702 {
AnnaBridge 171:3a7713b1edbc 703 uint32_t res;
AnnaBridge 171:3a7713b1edbc 704 __asm volatile("MRS %0,BASEPRI_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 705 return res;
AnnaBridge 171:3a7713b1edbc 706 }
AnnaBridge 171:3a7713b1edbc 707
AnnaBridge 171:3a7713b1edbc 708 __IAR_FT void __TZ_set_BASEPRI_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 709 {
AnnaBridge 171:3a7713b1edbc 710 __asm volatile("MSR BASEPRI_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 711 }
AnnaBridge 171:3a7713b1edbc 712
AnnaBridge 171:3a7713b1edbc 713 __IAR_FT uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge 171:3a7713b1edbc 714 {
AnnaBridge 171:3a7713b1edbc 715 uint32_t res;
AnnaBridge 171:3a7713b1edbc 716 __asm volatile("MRS %0,FAULTMASK_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 717 return res;
AnnaBridge 171:3a7713b1edbc 718 }
AnnaBridge 171:3a7713b1edbc 719
AnnaBridge 171:3a7713b1edbc 720 __IAR_FT void __TZ_set_FAULTMASK_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 721 {
AnnaBridge 171:3a7713b1edbc 722 __asm volatile("MSR FAULTMASK_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 723 }
AnnaBridge 171:3a7713b1edbc 724
AnnaBridge 171:3a7713b1edbc 725 __IAR_FT uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge 171:3a7713b1edbc 726 {
AnnaBridge 171:3a7713b1edbc 727 uint32_t res;
AnnaBridge 171:3a7713b1edbc 728 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 729 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 730 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 731 res = 0U;
AnnaBridge 171:3a7713b1edbc 732 #else
AnnaBridge 171:3a7713b1edbc 733 __asm volatile("MRS %0,PSPLIM_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 734 #endif
AnnaBridge 171:3a7713b1edbc 735 return res;
AnnaBridge 171:3a7713b1edbc 736 }
AnnaBridge 171:3a7713b1edbc 737
AnnaBridge 171:3a7713b1edbc 738 __IAR_FT void __TZ_set_PSPLIM_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 739 {
AnnaBridge 171:3a7713b1edbc 740 #if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
AnnaBridge 171:3a7713b1edbc 741 (!defined (__ARM_FEATURE_CMSE ) || (__ARM_FEATURE_CMSE < 3)))
AnnaBridge 171:3a7713b1edbc 742 // without main extensions, the non-secure PSPLIM is RAZ/WI
AnnaBridge 171:3a7713b1edbc 743 (void)value;
AnnaBridge 171:3a7713b1edbc 744 #else
AnnaBridge 171:3a7713b1edbc 745 __asm volatile("MSR PSPLIM_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 746 #endif
AnnaBridge 171:3a7713b1edbc 747 }
AnnaBridge 171:3a7713b1edbc 748
AnnaBridge 171:3a7713b1edbc 749 __IAR_FT uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge 171:3a7713b1edbc 750 {
AnnaBridge 171:3a7713b1edbc 751 uint32_t res;
AnnaBridge 171:3a7713b1edbc 752 __asm volatile("MRS %0,MSPLIM_NS" : "=r" (res));
AnnaBridge 171:3a7713b1edbc 753 return res;
AnnaBridge 171:3a7713b1edbc 754 }
AnnaBridge 171:3a7713b1edbc 755
AnnaBridge 171:3a7713b1edbc 756 __IAR_FT void __TZ_set_MSPLIM_NS(uint32_t value)
AnnaBridge 171:3a7713b1edbc 757 {
AnnaBridge 171:3a7713b1edbc 758 __asm volatile("MSR MSPLIM_NS,%0" :: "r" (value));
AnnaBridge 171:3a7713b1edbc 759 }
AnnaBridge 171:3a7713b1edbc 760
AnnaBridge 171:3a7713b1edbc 761 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
AnnaBridge 171:3a7713b1edbc 762
AnnaBridge 171:3a7713b1edbc 763 #endif /* __ICCARM_INTRINSICS_VERSION__ == 2 */
AnnaBridge 171:3a7713b1edbc 764
AnnaBridge 171:3a7713b1edbc 765 #define __BKPT(value) __asm volatile ("BKPT %0" : : "i"(value))
AnnaBridge 171:3a7713b1edbc 766
AnnaBridge 171:3a7713b1edbc 767 #if __IAR_M0_FAMILY
AnnaBridge 171:3a7713b1edbc 768 __STATIC_INLINE int32_t __SSAT(int32_t val, uint32_t sat)
AnnaBridge 171:3a7713b1edbc 769 {
AnnaBridge 171:3a7713b1edbc 770 if ((sat >= 1U) && (sat <= 32U))
AnnaBridge 171:3a7713b1edbc 771 {
AnnaBridge 171:3a7713b1edbc 772 const int32_t max = (int32_t)((1U << (sat - 1U)) - 1U);
AnnaBridge 171:3a7713b1edbc 773 const int32_t min = -1 - max ;
AnnaBridge 171:3a7713b1edbc 774 if (val > max)
AnnaBridge 171:3a7713b1edbc 775 {
AnnaBridge 171:3a7713b1edbc 776 return max;
AnnaBridge 171:3a7713b1edbc 777 }
AnnaBridge 171:3a7713b1edbc 778 else if (val < min)
AnnaBridge 171:3a7713b1edbc 779 {
AnnaBridge 171:3a7713b1edbc 780 return min;
AnnaBridge 171:3a7713b1edbc 781 }
AnnaBridge 171:3a7713b1edbc 782 }
AnnaBridge 171:3a7713b1edbc 783 return val;
AnnaBridge 171:3a7713b1edbc 784 }
AnnaBridge 171:3a7713b1edbc 785
AnnaBridge 171:3a7713b1edbc 786 __STATIC_INLINE uint32_t __USAT(int32_t val, uint32_t sat)
AnnaBridge 171:3a7713b1edbc 787 {
AnnaBridge 171:3a7713b1edbc 788 if (sat <= 31U)
AnnaBridge 171:3a7713b1edbc 789 {
AnnaBridge 171:3a7713b1edbc 790 const uint32_t max = ((1U << sat) - 1U);
AnnaBridge 171:3a7713b1edbc 791 if (val > (int32_t)max)
AnnaBridge 171:3a7713b1edbc 792 {
AnnaBridge 171:3a7713b1edbc 793 return max;
AnnaBridge 171:3a7713b1edbc 794 }
AnnaBridge 171:3a7713b1edbc 795 else if (val < 0)
AnnaBridge 171:3a7713b1edbc 796 {
AnnaBridge 171:3a7713b1edbc 797 return 0U;
AnnaBridge 171:3a7713b1edbc 798 }
AnnaBridge 171:3a7713b1edbc 799 }
AnnaBridge 171:3a7713b1edbc 800 return (uint32_t)val;
AnnaBridge 171:3a7713b1edbc 801 }
AnnaBridge 171:3a7713b1edbc 802 #endif
AnnaBridge 171:3a7713b1edbc 803
AnnaBridge 171:3a7713b1edbc 804 #if (__CORTEX_M >= 0x03) /* __CORTEX_M is defined in core_cm0.h, core_cm3.h and core_cm4.h. */
AnnaBridge 171:3a7713b1edbc 805
AnnaBridge 171:3a7713b1edbc 806 __IAR_FT uint8_t __LDRBT(volatile uint8_t *addr)
AnnaBridge 171:3a7713b1edbc 807 {
AnnaBridge 171:3a7713b1edbc 808 uint32_t res;
AnnaBridge 171:3a7713b1edbc 809 __ASM("LDRBT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 171:3a7713b1edbc 810 return ((uint8_t)res);
AnnaBridge 171:3a7713b1edbc 811 }
AnnaBridge 171:3a7713b1edbc 812
AnnaBridge 171:3a7713b1edbc 813 __IAR_FT uint16_t __LDRHT(volatile uint16_t *addr)
AnnaBridge 171:3a7713b1edbc 814 {
AnnaBridge 171:3a7713b1edbc 815 uint32_t res;
AnnaBridge 171:3a7713b1edbc 816 __ASM("LDRHT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 171:3a7713b1edbc 817 return ((uint16_t)res);
AnnaBridge 171:3a7713b1edbc 818 }
AnnaBridge 171:3a7713b1edbc 819
AnnaBridge 171:3a7713b1edbc 820 __IAR_FT uint32_t __LDRT(volatile uint32_t *addr)
AnnaBridge 171:3a7713b1edbc 821 {
AnnaBridge 171:3a7713b1edbc 822 uint32_t res;
AnnaBridge 171:3a7713b1edbc 823 __ASM("LDRT %0, [%1]" : "=r" (res) : "r" (addr) : "memory");
AnnaBridge 171:3a7713b1edbc 824 return res;
AnnaBridge 171:3a7713b1edbc 825 }
AnnaBridge 171:3a7713b1edbc 826
AnnaBridge 171:3a7713b1edbc 827 __IAR_FT void __STRBT(uint8_t value, volatile uint8_t *addr)
AnnaBridge 171:3a7713b1edbc 828 {
AnnaBridge 171:3a7713b1edbc 829 __ASM("STRBT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
AnnaBridge 171:3a7713b1edbc 830 }
AnnaBridge 171:3a7713b1edbc 831
AnnaBridge 171:3a7713b1edbc 832 __IAR_FT void __STRHT(uint16_t value, volatile uint16_t *addr)
AnnaBridge 171:3a7713b1edbc 833 {
AnnaBridge 171:3a7713b1edbc 834 __ASM("STRHT %1, [%0]" : : "r" (addr), "r" ((uint32_t)value) : "memory");
AnnaBridge 171:3a7713b1edbc 835 }
AnnaBridge 171:3a7713b1edbc 836
AnnaBridge 171:3a7713b1edbc 837 __IAR_FT void __STRT(uint32_t value, volatile uint32_t *addr)
AnnaBridge 171:3a7713b1edbc 838 {
AnnaBridge 171:3a7713b1edbc 839 __ASM("STRT %1, [%0]" : : "r" (addr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 840 }
AnnaBridge 171:3a7713b1edbc 841
AnnaBridge 171:3a7713b1edbc 842 #endif /* (__CORTEX_M >= 0x03) */
AnnaBridge 171:3a7713b1edbc 843
AnnaBridge 171:3a7713b1edbc 844 #if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) || \
AnnaBridge 171:3a7713b1edbc 845 (defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge 171:3a7713b1edbc 846
AnnaBridge 171:3a7713b1edbc 847
AnnaBridge 171:3a7713b1edbc 848 __IAR_FT uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge 171:3a7713b1edbc 849 {
AnnaBridge 171:3a7713b1edbc 850 uint32_t res;
AnnaBridge 171:3a7713b1edbc 851 __ASM volatile ("LDAB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
AnnaBridge 171:3a7713b1edbc 852 return ((uint8_t)res);
AnnaBridge 171:3a7713b1edbc 853 }
AnnaBridge 171:3a7713b1edbc 854
AnnaBridge 171:3a7713b1edbc 855 __IAR_FT uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge 171:3a7713b1edbc 856 {
AnnaBridge 171:3a7713b1edbc 857 uint32_t res;
AnnaBridge 171:3a7713b1edbc 858 __ASM volatile ("LDAH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
AnnaBridge 171:3a7713b1edbc 859 return ((uint16_t)res);
AnnaBridge 171:3a7713b1edbc 860 }
AnnaBridge 171:3a7713b1edbc 861
AnnaBridge 171:3a7713b1edbc 862 __IAR_FT uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge 171:3a7713b1edbc 863 {
AnnaBridge 171:3a7713b1edbc 864 uint32_t res;
AnnaBridge 171:3a7713b1edbc 865 __ASM volatile ("LDA %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
AnnaBridge 171:3a7713b1edbc 866 return res;
AnnaBridge 171:3a7713b1edbc 867 }
AnnaBridge 171:3a7713b1edbc 868
AnnaBridge 171:3a7713b1edbc 869 __IAR_FT void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 171:3a7713b1edbc 870 {
AnnaBridge 171:3a7713b1edbc 871 __ASM volatile ("STLB %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 872 }
AnnaBridge 171:3a7713b1edbc 873
AnnaBridge 171:3a7713b1edbc 874 __IAR_FT void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 171:3a7713b1edbc 875 {
AnnaBridge 171:3a7713b1edbc 876 __ASM volatile ("STLH %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 877 }
AnnaBridge 171:3a7713b1edbc 878
AnnaBridge 171:3a7713b1edbc 879 __IAR_FT void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 171:3a7713b1edbc 880 {
AnnaBridge 171:3a7713b1edbc 881 __ASM volatile ("STL %1, [%0]" :: "r" (ptr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 882 }
AnnaBridge 171:3a7713b1edbc 883
AnnaBridge 171:3a7713b1edbc 884 __IAR_FT uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge 171:3a7713b1edbc 885 {
AnnaBridge 171:3a7713b1edbc 886 uint32_t res;
AnnaBridge 171:3a7713b1edbc 887 __ASM volatile ("LDAEXB %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
AnnaBridge 171:3a7713b1edbc 888 return ((uint8_t)res);
AnnaBridge 171:3a7713b1edbc 889 }
AnnaBridge 171:3a7713b1edbc 890
AnnaBridge 171:3a7713b1edbc 891 __IAR_FT uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge 171:3a7713b1edbc 892 {
AnnaBridge 171:3a7713b1edbc 893 uint32_t res;
AnnaBridge 171:3a7713b1edbc 894 __ASM volatile ("LDAEXH %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
AnnaBridge 171:3a7713b1edbc 895 return ((uint16_t)res);
AnnaBridge 171:3a7713b1edbc 896 }
AnnaBridge 171:3a7713b1edbc 897
AnnaBridge 171:3a7713b1edbc 898 __IAR_FT uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge 171:3a7713b1edbc 899 {
AnnaBridge 171:3a7713b1edbc 900 uint32_t res;
AnnaBridge 171:3a7713b1edbc 901 __ASM volatile ("LDAEX %0, [%1]" : "=r" (res) : "r" (ptr) : "memory");
AnnaBridge 171:3a7713b1edbc 902 return res;
AnnaBridge 171:3a7713b1edbc 903 }
AnnaBridge 171:3a7713b1edbc 904
AnnaBridge 171:3a7713b1edbc 905 __IAR_FT uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge 171:3a7713b1edbc 906 {
AnnaBridge 171:3a7713b1edbc 907 uint32_t res;
AnnaBridge 171:3a7713b1edbc 908 __ASM volatile ("STLEXB %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 909 return res;
AnnaBridge 171:3a7713b1edbc 910 }
AnnaBridge 171:3a7713b1edbc 911
AnnaBridge 171:3a7713b1edbc 912 __IAR_FT uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge 171:3a7713b1edbc 913 {
AnnaBridge 171:3a7713b1edbc 914 uint32_t res;
AnnaBridge 171:3a7713b1edbc 915 __ASM volatile ("STLEXH %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 916 return res;
AnnaBridge 171:3a7713b1edbc 917 }
AnnaBridge 171:3a7713b1edbc 918
AnnaBridge 171:3a7713b1edbc 919 __IAR_FT uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge 171:3a7713b1edbc 920 {
AnnaBridge 171:3a7713b1edbc 921 uint32_t res;
AnnaBridge 171:3a7713b1edbc 922 __ASM volatile ("STLEX %0, %2, [%1]" : "=r" (res) : "r" (ptr), "r" (value) : "memory");
AnnaBridge 171:3a7713b1edbc 923 return res;
AnnaBridge 171:3a7713b1edbc 924 }
AnnaBridge 171:3a7713b1edbc 925
AnnaBridge 171:3a7713b1edbc 926 #endif /* __ARM_ARCH_8M_MAIN__ or __ARM_ARCH_8M_BASE__ */
AnnaBridge 171:3a7713b1edbc 927
AnnaBridge 171:3a7713b1edbc 928 #undef __IAR_FT
AnnaBridge 171:3a7713b1edbc 929 #undef __IAR_M0_FAMILY
AnnaBridge 171:3a7713b1edbc 930 #undef __ICCARM_V8
AnnaBridge 171:3a7713b1edbc 931
AnnaBridge 171:3a7713b1edbc 932 #pragma diag_default=Pe940
AnnaBridge 171:3a7713b1edbc 933 #pragma diag_default=Pe177
AnnaBridge 171:3a7713b1edbc 934
AnnaBridge 171:3a7713b1edbc 935 #endif /* __CMSIS_ICCARM_H__ */