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TARGET_K64F/TOOLCHAIN_IAR/system_MK64F12.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /* |
AnnaBridge | 171:3a7713b1edbc | 2 | ** ################################################################### |
AnnaBridge | 171:3a7713b1edbc | 3 | ** Processors: MK64FN1M0CAJ12 |
AnnaBridge | 171:3a7713b1edbc | 4 | ** MK64FN1M0VDC12 |
AnnaBridge | 171:3a7713b1edbc | 5 | ** MK64FN1M0VLL12 |
AnnaBridge | 171:3a7713b1edbc | 6 | ** MK64FN1M0VLQ12 |
AnnaBridge | 171:3a7713b1edbc | 7 | ** MK64FN1M0VMD12 |
AnnaBridge | 171:3a7713b1edbc | 8 | ** MK64FX512VDC12 |
AnnaBridge | 171:3a7713b1edbc | 9 | ** MK64FX512VLL12 |
AnnaBridge | 171:3a7713b1edbc | 10 | ** MK64FX512VLQ12 |
AnnaBridge | 171:3a7713b1edbc | 11 | ** MK64FX512VMD12 |
AnnaBridge | 171:3a7713b1edbc | 12 | ** |
AnnaBridge | 171:3a7713b1edbc | 13 | ** Compilers: Keil ARM C/C++ Compiler |
AnnaBridge | 171:3a7713b1edbc | 14 | ** Freescale C/C++ for Embedded ARM |
AnnaBridge | 171:3a7713b1edbc | 15 | ** GNU C Compiler |
AnnaBridge | 171:3a7713b1edbc | 16 | ** IAR ANSI C/C++ Compiler for ARM |
AnnaBridge | 171:3a7713b1edbc | 17 | ** |
AnnaBridge | 171:3a7713b1edbc | 18 | ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014 |
AnnaBridge | 171:3a7713b1edbc | 19 | ** Version: rev. 2.9, 2016-03-21 |
AnnaBridge | 171:3a7713b1edbc | 20 | ** Build: b160321 |
AnnaBridge | 171:3a7713b1edbc | 21 | ** |
AnnaBridge | 171:3a7713b1edbc | 22 | ** Abstract: |
AnnaBridge | 171:3a7713b1edbc | 23 | ** Provides a system configuration function and a global variable that |
AnnaBridge | 171:3a7713b1edbc | 24 | ** contains the system frequency. It configures the device and initializes |
AnnaBridge | 171:3a7713b1edbc | 25 | ** the oscillator (PLL) that is part of the microcontroller device. |
AnnaBridge | 171:3a7713b1edbc | 26 | ** |
AnnaBridge | 171:3a7713b1edbc | 27 | ** Copyright (c) 2016 Freescale Semiconductor, Inc. |
AnnaBridge | 171:3a7713b1edbc | 28 | ** All rights reserved. |
AnnaBridge | 171:3a7713b1edbc | 29 | ** |
AnnaBridge | 171:3a7713b1edbc | 30 | ** Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 31 | ** are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 32 | ** |
AnnaBridge | 171:3a7713b1edbc | 33 | ** o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 171:3a7713b1edbc | 34 | ** of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 35 | ** |
AnnaBridge | 171:3a7713b1edbc | 36 | ** o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 171:3a7713b1edbc | 37 | ** list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 171:3a7713b1edbc | 38 | ** other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 39 | ** |
AnnaBridge | 171:3a7713b1edbc | 40 | ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
AnnaBridge | 171:3a7713b1edbc | 41 | ** contributors may be used to endorse or promote products derived from this |
AnnaBridge | 171:3a7713b1edbc | 42 | ** software without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 43 | ** |
AnnaBridge | 171:3a7713b1edbc | 44 | ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 171:3a7713b1edbc | 45 | ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 171:3a7713b1edbc | 46 | ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 47 | ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 171:3a7713b1edbc | 48 | ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 171:3a7713b1edbc | 49 | ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 171:3a7713b1edbc | 50 | ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 171:3a7713b1edbc | 51 | ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 171:3a7713b1edbc | 52 | ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 171:3a7713b1edbc | 53 | ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 54 | ** |
AnnaBridge | 171:3a7713b1edbc | 55 | ** http: www.freescale.com |
AnnaBridge | 171:3a7713b1edbc | 56 | ** mail: support@freescale.com |
AnnaBridge | 171:3a7713b1edbc | 57 | ** |
AnnaBridge | 171:3a7713b1edbc | 58 | ** Revisions: |
AnnaBridge | 171:3a7713b1edbc | 59 | ** - rev. 1.0 (2013-08-12) |
AnnaBridge | 171:3a7713b1edbc | 60 | ** Initial version. |
AnnaBridge | 171:3a7713b1edbc | 61 | ** - rev. 2.0 (2013-10-29) |
AnnaBridge | 171:3a7713b1edbc | 62 | ** Register accessor macros added to the memory map. |
AnnaBridge | 171:3a7713b1edbc | 63 | ** Symbols for Processor Expert memory map compatibility added to the memory map. |
AnnaBridge | 171:3a7713b1edbc | 64 | ** Startup file for gcc has been updated according to CMSIS 3.2. |
AnnaBridge | 171:3a7713b1edbc | 65 | ** System initialization updated. |
AnnaBridge | 171:3a7713b1edbc | 66 | ** MCG - registers updated. |
AnnaBridge | 171:3a7713b1edbc | 67 | ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed. |
AnnaBridge | 171:3a7713b1edbc | 68 | ** - rev. 2.1 (2013-10-30) |
AnnaBridge | 171:3a7713b1edbc | 69 | ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled. |
AnnaBridge | 171:3a7713b1edbc | 70 | ** - rev. 2.2 (2013-12-09) |
AnnaBridge | 171:3a7713b1edbc | 71 | ** DMA - EARS register removed. |
AnnaBridge | 171:3a7713b1edbc | 72 | ** AIPS0, AIPS1 - MPRA register updated. |
AnnaBridge | 171:3a7713b1edbc | 73 | ** - rev. 2.3 (2014-01-24) |
AnnaBridge | 171:3a7713b1edbc | 74 | ** Update according to reference manual rev. 2 |
AnnaBridge | 171:3a7713b1edbc | 75 | ** ENET, MCG, MCM, SIM, USB - registers updated |
AnnaBridge | 171:3a7713b1edbc | 76 | ** - rev. 2.4 (2014-02-10) |
AnnaBridge | 171:3a7713b1edbc | 77 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
AnnaBridge | 171:3a7713b1edbc | 78 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
AnnaBridge | 171:3a7713b1edbc | 79 | ** - rev. 2.5 (2014-02-10) |
AnnaBridge | 171:3a7713b1edbc | 80 | ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h |
AnnaBridge | 171:3a7713b1edbc | 81 | ** Update of SystemInit() and SystemCoreClockUpdate() functions. |
AnnaBridge | 171:3a7713b1edbc | 82 | ** Module access macro module_BASES replaced by module_BASE_PTRS. |
AnnaBridge | 171:3a7713b1edbc | 83 | ** - rev. 2.6 (2014-08-28) |
AnnaBridge | 171:3a7713b1edbc | 84 | ** Update of system files - default clock configuration changed. |
AnnaBridge | 171:3a7713b1edbc | 85 | ** Update of startup files - possibility to override DefaultISR added. |
AnnaBridge | 171:3a7713b1edbc | 86 | ** - rev. 2.7 (2014-10-14) |
AnnaBridge | 171:3a7713b1edbc | 87 | ** Interrupt INT_LPTimer renamed to INT_LPTMR0, interrupt INT_Watchdog renamed to INT_WDOG_EWM. |
AnnaBridge | 171:3a7713b1edbc | 88 | ** - rev. 2.8 (2015-02-19) |
AnnaBridge | 171:3a7713b1edbc | 89 | ** Renamed interrupt vector LLW to LLWU. |
AnnaBridge | 171:3a7713b1edbc | 90 | ** - rev. 2.9 (2016-03-21) |
AnnaBridge | 171:3a7713b1edbc | 91 | ** Added MK64FN1M0CAJ12 part. |
AnnaBridge | 171:3a7713b1edbc | 92 | ** GPIO - renamed port instances: PTx -> GPIOx. |
AnnaBridge | 171:3a7713b1edbc | 93 | ** |
AnnaBridge | 171:3a7713b1edbc | 94 | ** ################################################################### |
AnnaBridge | 171:3a7713b1edbc | 95 | */ |
AnnaBridge | 171:3a7713b1edbc | 96 | |
AnnaBridge | 171:3a7713b1edbc | 97 | /*! |
AnnaBridge | 171:3a7713b1edbc | 98 | * @file MK64F12 |
AnnaBridge | 171:3a7713b1edbc | 99 | * @version 2.9 |
AnnaBridge | 171:3a7713b1edbc | 100 | * @date 2016-03-21 |
AnnaBridge | 171:3a7713b1edbc | 101 | * @brief Device specific configuration file for MK64F12 (header file) |
AnnaBridge | 171:3a7713b1edbc | 102 | * |
AnnaBridge | 171:3a7713b1edbc | 103 | * Provides a system configuration function and a global variable that contains |
AnnaBridge | 171:3a7713b1edbc | 104 | * the system frequency. It configures the device and initializes the oscillator |
AnnaBridge | 171:3a7713b1edbc | 105 | * (PLL) that is part of the microcontroller device. |
AnnaBridge | 171:3a7713b1edbc | 106 | */ |
AnnaBridge | 171:3a7713b1edbc | 107 | |
AnnaBridge | 171:3a7713b1edbc | 108 | #ifndef _SYSTEM_MK64F12_H_ |
AnnaBridge | 171:3a7713b1edbc | 109 | #define _SYSTEM_MK64F12_H_ /**< Symbol preventing repeated inclusion */ |
AnnaBridge | 171:3a7713b1edbc | 110 | |
AnnaBridge | 171:3a7713b1edbc | 111 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 112 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 113 | #endif |
AnnaBridge | 171:3a7713b1edbc | 114 | |
AnnaBridge | 171:3a7713b1edbc | 115 | #include <stdint.h> |
AnnaBridge | 171:3a7713b1edbc | 116 | |
AnnaBridge | 171:3a7713b1edbc | 117 | |
AnnaBridge | 171:3a7713b1edbc | 118 | #ifndef DISABLE_WDOG |
AnnaBridge | 171:3a7713b1edbc | 119 | #define DISABLE_WDOG 1 |
AnnaBridge | 171:3a7713b1edbc | 120 | #endif |
AnnaBridge | 171:3a7713b1edbc | 121 | |
AnnaBridge | 171:3a7713b1edbc | 122 | /* Define clock source values */ |
AnnaBridge | 171:3a7713b1edbc | 123 | |
AnnaBridge | 171:3a7713b1edbc | 124 | #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */ |
AnnaBridge | 171:3a7713b1edbc | 125 | #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */ |
AnnaBridge | 171:3a7713b1edbc | 126 | #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */ |
AnnaBridge | 171:3a7713b1edbc | 127 | #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */ |
AnnaBridge | 171:3a7713b1edbc | 128 | #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */ |
AnnaBridge | 171:3a7713b1edbc | 129 | |
AnnaBridge | 171:3a7713b1edbc | 130 | /* RTC oscillator setting */ |
AnnaBridge | 171:3a7713b1edbc | 131 | /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */ |
AnnaBridge | 171:3a7713b1edbc | 132 | #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */ |
AnnaBridge | 171:3a7713b1edbc | 133 | |
AnnaBridge | 171:3a7713b1edbc | 134 | /* Low power mode enable */ |
AnnaBridge | 171:3a7713b1edbc | 135 | /* SMC_PMPROT: AVLP=1,ALLS=1,AVLLS=1 */ |
AnnaBridge | 171:3a7713b1edbc | 136 | #define SYSTEM_SMC_PMPROT_VALUE 0x2AU /* SMC_PMPROT */ |
AnnaBridge | 171:3a7713b1edbc | 137 | |
AnnaBridge | 171:3a7713b1edbc | 138 | #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */ |
AnnaBridge | 171:3a7713b1edbc | 139 | |
AnnaBridge | 171:3a7713b1edbc | 140 | |
AnnaBridge | 171:3a7713b1edbc | 141 | /** |
AnnaBridge | 171:3a7713b1edbc | 142 | * @brief System clock frequency (core clock) |
AnnaBridge | 171:3a7713b1edbc | 143 | * |
AnnaBridge | 171:3a7713b1edbc | 144 | * The system clock frequency supplied to the SysTick timer and the processor |
AnnaBridge | 171:3a7713b1edbc | 145 | * core clock. This variable can be used by the user application to setup the |
AnnaBridge | 171:3a7713b1edbc | 146 | * SysTick timer or configure other parameters. It may also be used by debugger to |
AnnaBridge | 171:3a7713b1edbc | 147 | * query the frequency of the debug timer or configure the trace clock speed |
AnnaBridge | 171:3a7713b1edbc | 148 | * SystemCoreClock is initialized with a correct predefined value. |
AnnaBridge | 171:3a7713b1edbc | 149 | */ |
AnnaBridge | 171:3a7713b1edbc | 150 | extern uint32_t SystemCoreClock; |
AnnaBridge | 171:3a7713b1edbc | 151 | |
AnnaBridge | 171:3a7713b1edbc | 152 | /** |
AnnaBridge | 171:3a7713b1edbc | 153 | * @brief Setup the microcontroller system. |
AnnaBridge | 171:3a7713b1edbc | 154 | * |
AnnaBridge | 171:3a7713b1edbc | 155 | * Typically this function configures the oscillator (PLL) that is part of the |
AnnaBridge | 171:3a7713b1edbc | 156 | * microcontroller device. For systems with variable clock speed it also updates |
AnnaBridge | 171:3a7713b1edbc | 157 | * the variable SystemCoreClock. SystemInit is called from startup_device file. |
AnnaBridge | 171:3a7713b1edbc | 158 | */ |
AnnaBridge | 171:3a7713b1edbc | 159 | void SystemInit (void); |
AnnaBridge | 171:3a7713b1edbc | 160 | |
AnnaBridge | 171:3a7713b1edbc | 161 | /** |
AnnaBridge | 171:3a7713b1edbc | 162 | * @brief Updates the SystemCoreClock variable. |
AnnaBridge | 171:3a7713b1edbc | 163 | * |
AnnaBridge | 171:3a7713b1edbc | 164 | * It must be called whenever the core clock is changed during program |
AnnaBridge | 171:3a7713b1edbc | 165 | * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates |
AnnaBridge | 171:3a7713b1edbc | 166 | * the current core clock. |
AnnaBridge | 171:3a7713b1edbc | 167 | */ |
AnnaBridge | 171:3a7713b1edbc | 168 | void SystemCoreClockUpdate (void); |
AnnaBridge | 171:3a7713b1edbc | 169 | |
AnnaBridge | 171:3a7713b1edbc | 170 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 171 | } |
AnnaBridge | 171:3a7713b1edbc | 172 | #endif |
AnnaBridge | 171:3a7713b1edbc | 173 | |
AnnaBridge | 171:3a7713b1edbc | 174 | #endif /* _SYSTEM_MK64F12_H_ */ |