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TARGET_K64F/TOOLCHAIN_IAR/fsl_phy.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_PHY_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_PHY_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_enet.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup phy_driver
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 41 * Definitions
AnnaBridge 171:3a7713b1edbc 42 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /*! @brief PHY driver version */
AnnaBridge 171:3a7713b1edbc 45 #define FSL_PHY_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /*! @brief Defines the PHY registers. */
AnnaBridge 171:3a7713b1edbc 48 #define PHY_BASICCONTROL_REG 0x00U /*!< The PHY basic control register. */
AnnaBridge 171:3a7713b1edbc 49 #define PHY_BASICSTATUS_REG 0x01U /*!< The PHY basic status register. */
AnnaBridge 171:3a7713b1edbc 50 #define PHY_ID1_REG 0x02U /*!< The PHY ID one register. */
AnnaBridge 171:3a7713b1edbc 51 #define PHY_ID2_REG 0x03U /*!< The PHY ID two register. */
AnnaBridge 171:3a7713b1edbc 52 #define PHY_AUTONEG_ADVERTISE_REG 0x04U /*!< The PHY auto-negotiate advertise register. */
AnnaBridge 171:3a7713b1edbc 53 #define PHY_CONTROL1_REG 0x1EU /*!< The PHY control one register. */
AnnaBridge 171:3a7713b1edbc 54 #define PHY_CONTROL2_REG 0x1FU /*!< The PHY control two register. */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 #define PHY_CONTROL_ID1 0x22U /*!< The PHY ID1*/
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /*! @brief Defines the mask flag in basic control register. */
AnnaBridge 171:3a7713b1edbc 59 #define PHY_BCTL_DUPLEX_MASK 0x0100U /*!< The PHY duplex bit mask. */
AnnaBridge 171:3a7713b1edbc 60 #define PHY_BCTL_RESTART_AUTONEG_MASK 0x0200U /*!< The PHY restart auto negotiation mask. */
AnnaBridge 171:3a7713b1edbc 61 #define PHY_BCTL_AUTONEG_MASK 0x1000U /*!< The PHY auto negotiation bit mask. */
AnnaBridge 171:3a7713b1edbc 62 #define PHY_BCTL_SPEED_MASK 0x2000U /*!< The PHY speed bit mask. */
AnnaBridge 171:3a7713b1edbc 63 #define PHY_BCTL_LOOP_MASK 0x4000U /*!< The PHY loop bit mask. */
AnnaBridge 171:3a7713b1edbc 64 #define PHY_BCTL_RESET_MASK 0x8000U /*!< The PHY reset bit mask. */
AnnaBridge 171:3a7713b1edbc 65
AnnaBridge 171:3a7713b1edbc 66 /*!@brief Defines the mask flag of operation mode in control two register*/
AnnaBridge 171:3a7713b1edbc 67 #define PHY_CTL2_REMOTELOOP_MASK 0x0004U /*!< The PHY remote loopback mask. */
AnnaBridge 171:3a7713b1edbc 68 #define PHY_CTL1_10HALFDUPLEX_MASK 0x0001U /*!< The PHY 10M half duplex mask. */
AnnaBridge 171:3a7713b1edbc 69 #define PHY_CTL1_100HALFDUPLEX_MASK 0x0002U /*!< The PHY 100M half duplex mask. */
AnnaBridge 171:3a7713b1edbc 70 #define PHY_CTL1_10FULLDUPLEX_MASK 0x0005U /*!< The PHY 10M full duplex mask. */
AnnaBridge 171:3a7713b1edbc 71 #define PHY_CTL1_100FULLDUPLEX_MASK 0x0006U /*!< The PHY 100M full duplex mask. */
AnnaBridge 171:3a7713b1edbc 72 #define PHY_CTL1_SPEEDUPLX_MASK 0x0007U /*!< The PHY speed and duplex mask. */
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 /*! @brief Defines the mask flag in basic status register. */
AnnaBridge 171:3a7713b1edbc 75 #define PHY_BSTATUS_LINKSTATUS_MASK 0x0004U /*!< The PHY link status mask. */
AnnaBridge 171:3a7713b1edbc 76 #define PHY_BSTATUS_AUTONEGABLE_MASK 0x0008U /*!< The PHY auto-negotiation ability mask. */
AnnaBridge 171:3a7713b1edbc 77 #define PHY_BSTATUS_AUTONEGCOMP_MASK 0x0020U /*!< The PHY auto-negotiation complete mask. */
AnnaBridge 171:3a7713b1edbc 78
AnnaBridge 171:3a7713b1edbc 79 /*! @brief Defines the mask flag in PHY auto-negotiation advertise register. */
AnnaBridge 171:3a7713b1edbc 80 #define PHY_100BaseT4_ABILITY_MASK 0x200U /*!< The PHY have the T4 ability. */
AnnaBridge 171:3a7713b1edbc 81 #define PHY_100BASETX_FULLDUPLEX_MASK 0x100U /*!< The PHY has the 100M full duplex ability.*/
AnnaBridge 171:3a7713b1edbc 82 #define PHY_100BASETX_HALFDUPLEX_MASK 0x080U /*!< The PHY has the 100M full duplex ability.*/
AnnaBridge 171:3a7713b1edbc 83 #define PHY_10BASETX_FULLDUPLEX_MASK 0x040U /*!< The PHY has the 10M full duplex ability.*/
AnnaBridge 171:3a7713b1edbc 84 #define PHY_10BASETX_HALFDUPLEX_MASK 0x020U /*!< The PHY has the 10M full duplex ability.*/
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 /*! @brief Defines the PHY status. */
AnnaBridge 171:3a7713b1edbc 87 enum _phy_status
AnnaBridge 171:3a7713b1edbc 88 {
AnnaBridge 171:3a7713b1edbc 89 kStatus_PHY_SMIVisitTimeout = MAKE_STATUS(kStatusGroup_PHY, 1), /*!< ENET PHY SMI visit timeout. */
AnnaBridge 171:3a7713b1edbc 90 kStatus_PHY_AutoNegotiateFail = MAKE_STATUS(kStatusGroup_PHY, 2) /*!< ENET PHY AutoNegotiate Fail. */
AnnaBridge 171:3a7713b1edbc 91 };
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 /*! @brief Defines the PHY link speed. This is align with the speed for ENET MAC. */
AnnaBridge 171:3a7713b1edbc 94 typedef enum _phy_speed
AnnaBridge 171:3a7713b1edbc 95 {
AnnaBridge 171:3a7713b1edbc 96 kPHY_Speed10M = 0U, /*!< ENET PHY 10M speed. */
AnnaBridge 171:3a7713b1edbc 97 kPHY_Speed100M /*!< ENET PHY 100M speed. */
AnnaBridge 171:3a7713b1edbc 98 } phy_speed_t;
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 /*! @brief Defines the PHY link duplex. */
AnnaBridge 171:3a7713b1edbc 101 typedef enum _phy_duplex
AnnaBridge 171:3a7713b1edbc 102 {
AnnaBridge 171:3a7713b1edbc 103 kPHY_HalfDuplex = 0U, /*!< ENET PHY half duplex. */
AnnaBridge 171:3a7713b1edbc 104 kPHY_FullDuplex /*!< ENET PHY full duplex. */
AnnaBridge 171:3a7713b1edbc 105 } phy_duplex_t;
AnnaBridge 171:3a7713b1edbc 106
AnnaBridge 171:3a7713b1edbc 107 /*! @brief Defines the PHY loopback mode. */
AnnaBridge 171:3a7713b1edbc 108 typedef enum _phy_loop
AnnaBridge 171:3a7713b1edbc 109 {
AnnaBridge 171:3a7713b1edbc 110 kPHY_LocalLoop = 0U, /*!< ENET PHY local loopback. */
AnnaBridge 171:3a7713b1edbc 111 kPHY_RemoteLoop /*!< ENET PHY remote loopback. */
AnnaBridge 171:3a7713b1edbc 112 } phy_loop_t;
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 115 * API
AnnaBridge 171:3a7713b1edbc 116 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 119 extern "C" {
AnnaBridge 171:3a7713b1edbc 120 #endif
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122 /*!
AnnaBridge 171:3a7713b1edbc 123 * @name PHY Driver
AnnaBridge 171:3a7713b1edbc 124 * @{
AnnaBridge 171:3a7713b1edbc 125 */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /*!
AnnaBridge 171:3a7713b1edbc 128 * @brief Initializes PHY.
AnnaBridge 171:3a7713b1edbc 129 *
AnnaBridge 171:3a7713b1edbc 130 * This function initialize the SMI interface and initialize PHY.
AnnaBridge 171:3a7713b1edbc 131 * The SMI is the MII management interface between PHY and MAC, which should be
AnnaBridge 171:3a7713b1edbc 132 * firstly initialized before any other operation for PHY.
AnnaBridge 171:3a7713b1edbc 133 *
AnnaBridge 171:3a7713b1edbc 134 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 135 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 136 * @param srcClock_Hz The module clock frequency - system clock for MII management interface - SMI.
AnnaBridge 171:3a7713b1edbc 137 * @retval kStatus_Success PHY initialize success
AnnaBridge 171:3a7713b1edbc 138 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 171:3a7713b1edbc 139 */
AnnaBridge 171:3a7713b1edbc 140 status_t PHY_Init(ENET_Type *base, uint32_t phyAddr, uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 /*!
AnnaBridge 171:3a7713b1edbc 143 * @brief Initiates auto negotiation.
AnnaBridge 171:3a7713b1edbc 144 *
AnnaBridge 171:3a7713b1edbc 145 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 146 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 147 * @retval kStatus_Success PHY auto negotiation success
AnnaBridge 171:3a7713b1edbc 148 * @retval kStatus_PHY_AutoNegotiateFail PHY auto negotiate fail
AnnaBridge 171:3a7713b1edbc 149 */
AnnaBridge 171:3a7713b1edbc 150 status_t PHY_AutoNegotiation(ENET_Type *base, uint32_t phyAddr);
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 /*!
AnnaBridge 171:3a7713b1edbc 153 * @brief PHY Write function. This function write data over the SMI to
AnnaBridge 171:3a7713b1edbc 154 * the specified PHY register. This function is called by all PHY interfaces.
AnnaBridge 171:3a7713b1edbc 155 *
AnnaBridge 171:3a7713b1edbc 156 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 157 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 158 * @param phyReg The PHY register.
AnnaBridge 171:3a7713b1edbc 159 * @param data The data written to the PHY register.
AnnaBridge 171:3a7713b1edbc 160 * @retval kStatus_Success PHY write success
AnnaBridge 171:3a7713b1edbc 161 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 171:3a7713b1edbc 162 */
AnnaBridge 171:3a7713b1edbc 163 status_t PHY_Write(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data);
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 /*!
AnnaBridge 171:3a7713b1edbc 166 * @brief PHY Read function. This interface read data over the SMI from the
AnnaBridge 171:3a7713b1edbc 167 * specified PHY register. This function is called by all PHY interfaces.
AnnaBridge 171:3a7713b1edbc 168 *
AnnaBridge 171:3a7713b1edbc 169 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 170 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 171 * @param phyReg The PHY register.
AnnaBridge 171:3a7713b1edbc 172 * @param dataPtr The address to store the data read from the PHY register.
AnnaBridge 171:3a7713b1edbc 173 * @retval kStatus_Success PHY read success
AnnaBridge 171:3a7713b1edbc 174 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 171:3a7713b1edbc 175 */
AnnaBridge 171:3a7713b1edbc 176 status_t PHY_Read(ENET_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t *dataPtr);
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /*!
AnnaBridge 171:3a7713b1edbc 179 * @brief Enables/disables PHY loopback.
AnnaBridge 171:3a7713b1edbc 180 *
AnnaBridge 171:3a7713b1edbc 181 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 182 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 183 * @param mode The loopback mode to be enabled, please see "phy_loop_t".
AnnaBridge 171:3a7713b1edbc 184 * the two loopback mode should not be both set. when one loopback mode is set
AnnaBridge 171:3a7713b1edbc 185 * the other one should be disabled.
AnnaBridge 171:3a7713b1edbc 186 * @param enable True to enable, false to disable.
AnnaBridge 171:3a7713b1edbc 187 * @retval kStatus_Success PHY loopback success
AnnaBridge 171:3a7713b1edbc 188 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 171:3a7713b1edbc 189 */
AnnaBridge 171:3a7713b1edbc 190 status_t PHY_EnableLoopback(ENET_Type *base, uint32_t phyAddr, phy_loop_t mode, bool enable);
AnnaBridge 171:3a7713b1edbc 191
AnnaBridge 171:3a7713b1edbc 192 /*!
AnnaBridge 171:3a7713b1edbc 193 * @brief Gets the PHY link status.
AnnaBridge 171:3a7713b1edbc 194 *
AnnaBridge 171:3a7713b1edbc 195 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 196 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 197 * @param status The link up or down status of the PHY.
AnnaBridge 171:3a7713b1edbc 198 * - true the link is up.
AnnaBridge 171:3a7713b1edbc 199 * - false the link is down.
AnnaBridge 171:3a7713b1edbc 200 * @retval kStatus_Success PHY get link status success
AnnaBridge 171:3a7713b1edbc 201 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 171:3a7713b1edbc 202 */
AnnaBridge 171:3a7713b1edbc 203 status_t PHY_GetLinkStatus(ENET_Type *base, uint32_t phyAddr, bool *status);
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 /*!
AnnaBridge 171:3a7713b1edbc 206 * @brief Gets the PHY link speed and duplex.
AnnaBridge 171:3a7713b1edbc 207 *
AnnaBridge 171:3a7713b1edbc 208 * @param base ENET peripheral base address.
AnnaBridge 171:3a7713b1edbc 209 * @param phyAddr The PHY address.
AnnaBridge 171:3a7713b1edbc 210 * @param speed The address of PHY link speed.
AnnaBridge 171:3a7713b1edbc 211 * @param duplex The link duplex of PHY.
AnnaBridge 171:3a7713b1edbc 212 * @retval kStatus_Success PHY get link speed and duplex success
AnnaBridge 171:3a7713b1edbc 213 * @retval kStatus_PHY_SMIVisitTimeout PHY SMI visit time out
AnnaBridge 171:3a7713b1edbc 214 */
AnnaBridge 171:3a7713b1edbc 215 status_t PHY_GetLinkSpeedDuplex(ENET_Type *base, uint32_t phyAddr, phy_speed_t *speed, phy_duplex_t *duplex);
AnnaBridge 171:3a7713b1edbc 216
AnnaBridge 171:3a7713b1edbc 217 /* @} */
AnnaBridge 171:3a7713b1edbc 218
AnnaBridge 171:3a7713b1edbc 219 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 220 }
AnnaBridge 171:3a7713b1edbc 221 #endif
AnnaBridge 171:3a7713b1edbc 222
AnnaBridge 171:3a7713b1edbc 223 /*! @}*/
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 #endif /* _FSL_PHY_H_ */