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Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**
AnnaBridge 161:aa5281ff4a02 2 ******************************************************************************
AnnaBridge 161:aa5281ff4a02 3 * @file stm32f4xx_hal_lptim.h
AnnaBridge 161:aa5281ff4a02 4 * @author MCD Application Team
AnnaBridge 161:aa5281ff4a02 5 * @brief Header file of LPTIM HAL module.
AnnaBridge 161:aa5281ff4a02 6 ******************************************************************************
AnnaBridge 161:aa5281ff4a02 7 * @attention
AnnaBridge 161:aa5281ff4a02 8 *
AnnaBridge 161:aa5281ff4a02 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 161:aa5281ff4a02 10 *
AnnaBridge 161:aa5281ff4a02 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 161:aa5281ff4a02 12 * are permitted provided that the following conditions are met:
AnnaBridge 161:aa5281ff4a02 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 161:aa5281ff4a02 14 * this list of conditions and the following disclaimer.
AnnaBridge 161:aa5281ff4a02 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 161:aa5281ff4a02 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 161:aa5281ff4a02 17 * and/or other materials provided with the distribution.
AnnaBridge 161:aa5281ff4a02 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 161:aa5281ff4a02 19 * may be used to endorse or promote products derived from this software
AnnaBridge 161:aa5281ff4a02 20 * without specific prior written permission.
AnnaBridge 161:aa5281ff4a02 21 *
AnnaBridge 161:aa5281ff4a02 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 161:aa5281ff4a02 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 161:aa5281ff4a02 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 161:aa5281ff4a02 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 161:aa5281ff4a02 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 161:aa5281ff4a02 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 161:aa5281ff4a02 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 161:aa5281ff4a02 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 161:aa5281ff4a02 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 161:aa5281ff4a02 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 161:aa5281ff4a02 32 *
AnnaBridge 161:aa5281ff4a02 33 ******************************************************************************
AnnaBridge 161:aa5281ff4a02 34 */
AnnaBridge 161:aa5281ff4a02 35
AnnaBridge 161:aa5281ff4a02 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 161:aa5281ff4a02 37 #ifndef __STM32F4xx_HAL_LPTIM_H
AnnaBridge 161:aa5281ff4a02 38 #define __STM32F4xx_HAL_LPTIM_H
AnnaBridge 161:aa5281ff4a02 39
AnnaBridge 161:aa5281ff4a02 40 #ifdef __cplusplus
AnnaBridge 161:aa5281ff4a02 41 extern "C" {
AnnaBridge 161:aa5281ff4a02 42 #endif
AnnaBridge 161:aa5281ff4a02 43
AnnaBridge 161:aa5281ff4a02 44 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 161:aa5281ff4a02 45 /* Includes ------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 46 #include "stm32f4xx_hal_def.h"
AnnaBridge 161:aa5281ff4a02 47
AnnaBridge 161:aa5281ff4a02 48 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 161:aa5281ff4a02 49 * @{
AnnaBridge 161:aa5281ff4a02 50 */
AnnaBridge 161:aa5281ff4a02 51
AnnaBridge 161:aa5281ff4a02 52 /** @defgroup LPTIM LPTIM
AnnaBridge 161:aa5281ff4a02 53 * @brief LPTIM HAL module driver
AnnaBridge 161:aa5281ff4a02 54 * @{
AnnaBridge 161:aa5281ff4a02 55 */
AnnaBridge 161:aa5281ff4a02 56
AnnaBridge 161:aa5281ff4a02 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 58 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types
AnnaBridge 161:aa5281ff4a02 59 * @{
AnnaBridge 161:aa5281ff4a02 60 */
AnnaBridge 161:aa5281ff4a02 61
AnnaBridge 161:aa5281ff4a02 62 /** @defgroup LPTIM_WAKEUPTIMER_EXTILINE LPTIM WAKEUP Timer EXTI Line
AnnaBridge 161:aa5281ff4a02 63 * @{
AnnaBridge 161:aa5281ff4a02 64 */
AnnaBridge 161:aa5281ff4a02 65 #define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_MR23) /*!< External interrupt line 23 Connected to the LPTIM EXTI Line */
AnnaBridge 161:aa5281ff4a02 66 /**
AnnaBridge 161:aa5281ff4a02 67 * @}
AnnaBridge 161:aa5281ff4a02 68 */
AnnaBridge 161:aa5281ff4a02 69
AnnaBridge 161:aa5281ff4a02 70 /**
AnnaBridge 161:aa5281ff4a02 71 * @brief LPTIM Clock configuration definition
AnnaBridge 161:aa5281ff4a02 72 */
AnnaBridge 161:aa5281ff4a02 73 typedef struct
AnnaBridge 161:aa5281ff4a02 74 {
AnnaBridge 161:aa5281ff4a02 75 uint32_t Source; /*!< Selects the clock source.
AnnaBridge 161:aa5281ff4a02 76 This parameter can be a value of @ref LPTIM_Clock_Source */
AnnaBridge 161:aa5281ff4a02 77
AnnaBridge 161:aa5281ff4a02 78 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
AnnaBridge 161:aa5281ff4a02 79 This parameter can be a value of @ref LPTIM_Clock_Prescaler */
AnnaBridge 161:aa5281ff4a02 80
AnnaBridge 161:aa5281ff4a02 81 }LPTIM_ClockConfigTypeDef;
AnnaBridge 161:aa5281ff4a02 82
AnnaBridge 161:aa5281ff4a02 83 /**
AnnaBridge 161:aa5281ff4a02 84 * @brief LPTIM Clock configuration definition
AnnaBridge 161:aa5281ff4a02 85 */
AnnaBridge 161:aa5281ff4a02 86 typedef struct
AnnaBridge 161:aa5281ff4a02 87 {
AnnaBridge 161:aa5281ff4a02 88 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
AnnaBridge 161:aa5281ff4a02 89 if the ULPTIM input is selected.
AnnaBridge 161:aa5281ff4a02 90 Note: This parameter is used only when Ultra low power clock source is used.
AnnaBridge 161:aa5281ff4a02 91 Note: If the polarity is configured on 'both edges', an auxiliary clock
AnnaBridge 161:aa5281ff4a02 92 (one of the Low power oscillator) must be active.
AnnaBridge 161:aa5281ff4a02 93 This parameter can be a value of @ref LPTIM_Clock_Polarity */
AnnaBridge 161:aa5281ff4a02 94
AnnaBridge 161:aa5281ff4a02 95 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
AnnaBridge 161:aa5281ff4a02 96 Note: This parameter is used only when Ultra low power clock source is used.
AnnaBridge 161:aa5281ff4a02 97 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
AnnaBridge 161:aa5281ff4a02 98
AnnaBridge 161:aa5281ff4a02 99 }LPTIM_ULPClockConfigTypeDef;
AnnaBridge 161:aa5281ff4a02 100
AnnaBridge 161:aa5281ff4a02 101 /**
AnnaBridge 161:aa5281ff4a02 102 * @brief LPTIM Trigger configuration definition
AnnaBridge 161:aa5281ff4a02 103 */
AnnaBridge 161:aa5281ff4a02 104 typedef struct
AnnaBridge 161:aa5281ff4a02 105 {
AnnaBridge 161:aa5281ff4a02 106 uint32_t Source; /*!< Selects the Trigger source.
AnnaBridge 161:aa5281ff4a02 107 This parameter can be a value of @ref LPTIM_Trigger_Source */
AnnaBridge 161:aa5281ff4a02 108
AnnaBridge 161:aa5281ff4a02 109 uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
AnnaBridge 161:aa5281ff4a02 110 Note: This parameter is used only when an external trigger is used.
AnnaBridge 161:aa5281ff4a02 111 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
AnnaBridge 161:aa5281ff4a02 112
AnnaBridge 161:aa5281ff4a02 113 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
AnnaBridge 161:aa5281ff4a02 114 Note: This parameter is used only when an external trigger is used.
AnnaBridge 161:aa5281ff4a02 115 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
AnnaBridge 161:aa5281ff4a02 116 }LPTIM_TriggerConfigTypeDef;
AnnaBridge 161:aa5281ff4a02 117
AnnaBridge 161:aa5281ff4a02 118 /**
AnnaBridge 161:aa5281ff4a02 119 * @brief LPTIM Initialization Structure definition
AnnaBridge 161:aa5281ff4a02 120 */
AnnaBridge 161:aa5281ff4a02 121 typedef struct
AnnaBridge 161:aa5281ff4a02 122 {
AnnaBridge 161:aa5281ff4a02 123 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */
AnnaBridge 161:aa5281ff4a02 124
AnnaBridge 161:aa5281ff4a02 125 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */
AnnaBridge 161:aa5281ff4a02 126
AnnaBridge 161:aa5281ff4a02 127 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */
AnnaBridge 161:aa5281ff4a02 128
AnnaBridge 161:aa5281ff4a02 129 uint32_t OutputPolarity; /*!< Specifies the Output polarity.
AnnaBridge 161:aa5281ff4a02 130 This parameter can be a value of @ref LPTIM_Output_Polarity */
AnnaBridge 161:aa5281ff4a02 131
AnnaBridge 161:aa5281ff4a02 132 uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
AnnaBridge 161:aa5281ff4a02 133 values is done immediately or after the end of current period.
AnnaBridge 161:aa5281ff4a02 134 This parameter can be a value of @ref LPTIM_Updating_Mode */
AnnaBridge 161:aa5281ff4a02 135
AnnaBridge 161:aa5281ff4a02 136 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
AnnaBridge 161:aa5281ff4a02 137 or each external event.
AnnaBridge 161:aa5281ff4a02 138 This parameter can be a value of @ref LPTIM_Counter_Source */
AnnaBridge 161:aa5281ff4a02 139
AnnaBridge 161:aa5281ff4a02 140 }LPTIM_InitTypeDef;
AnnaBridge 161:aa5281ff4a02 141
AnnaBridge 161:aa5281ff4a02 142 /**
AnnaBridge 161:aa5281ff4a02 143 * @brief HAL LPTIM State structure definition
AnnaBridge 161:aa5281ff4a02 144 */
AnnaBridge 161:aa5281ff4a02 145 typedef enum __HAL_LPTIM_StateTypeDef
AnnaBridge 161:aa5281ff4a02 146 {
AnnaBridge 161:aa5281ff4a02 147 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */
AnnaBridge 161:aa5281ff4a02 148 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 161:aa5281ff4a02 149 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
AnnaBridge 161:aa5281ff4a02 150 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
AnnaBridge 161:aa5281ff4a02 151 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
AnnaBridge 161:aa5281ff4a02 152 }HAL_LPTIM_StateTypeDef;
AnnaBridge 161:aa5281ff4a02 153
AnnaBridge 161:aa5281ff4a02 154 /**
AnnaBridge 161:aa5281ff4a02 155 * @brief LPTIM handle Structure definition
AnnaBridge 161:aa5281ff4a02 156 */
AnnaBridge 161:aa5281ff4a02 157 typedef struct
AnnaBridge 161:aa5281ff4a02 158 {
AnnaBridge 161:aa5281ff4a02 159 LPTIM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 161:aa5281ff4a02 160
AnnaBridge 161:aa5281ff4a02 161 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
AnnaBridge 161:aa5281ff4a02 162
AnnaBridge 161:aa5281ff4a02 163 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
AnnaBridge 161:aa5281ff4a02 164
AnnaBridge 161:aa5281ff4a02 165 HAL_LockTypeDef Lock; /*!< LPTIM locking object */
AnnaBridge 161:aa5281ff4a02 166
AnnaBridge 161:aa5281ff4a02 167 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
AnnaBridge 161:aa5281ff4a02 168
AnnaBridge 161:aa5281ff4a02 169 }LPTIM_HandleTypeDef;
AnnaBridge 161:aa5281ff4a02 170
AnnaBridge 161:aa5281ff4a02 171 /**
AnnaBridge 161:aa5281ff4a02 172 * @}
AnnaBridge 161:aa5281ff4a02 173 */
AnnaBridge 161:aa5281ff4a02 174
AnnaBridge 161:aa5281ff4a02 175 /* Exported constants --------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 176 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants
AnnaBridge 161:aa5281ff4a02 177 * @{
AnnaBridge 161:aa5281ff4a02 178 */
AnnaBridge 161:aa5281ff4a02 179
AnnaBridge 161:aa5281ff4a02 180 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source
AnnaBridge 161:aa5281ff4a02 181 * @{
AnnaBridge 161:aa5281ff4a02 182 */
AnnaBridge 161:aa5281ff4a02 183 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00U
AnnaBridge 161:aa5281ff4a02 184 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
AnnaBridge 161:aa5281ff4a02 185 /**
AnnaBridge 161:aa5281ff4a02 186 * @}
AnnaBridge 161:aa5281ff4a02 187 */
AnnaBridge 161:aa5281ff4a02 188
AnnaBridge 161:aa5281ff4a02 189 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler
AnnaBridge 161:aa5281ff4a02 190 * @{
AnnaBridge 161:aa5281ff4a02 191 */
AnnaBridge 161:aa5281ff4a02 192 #define LPTIM_PRESCALER_DIV1 0x00000000U
AnnaBridge 161:aa5281ff4a02 193 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
AnnaBridge 161:aa5281ff4a02 194 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
AnnaBridge 161:aa5281ff4a02 195 #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1))
AnnaBridge 161:aa5281ff4a02 196 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
AnnaBridge 161:aa5281ff4a02 197 #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2))
AnnaBridge 161:aa5281ff4a02 198 #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2))
AnnaBridge 161:aa5281ff4a02 199 #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC)
AnnaBridge 161:aa5281ff4a02 200 /**
AnnaBridge 161:aa5281ff4a02 201 * @}
AnnaBridge 161:aa5281ff4a02 202 */
AnnaBridge 161:aa5281ff4a02 203
AnnaBridge 161:aa5281ff4a02 204 /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity
AnnaBridge 161:aa5281ff4a02 205 * @{
AnnaBridge 161:aa5281ff4a02 206 */
AnnaBridge 161:aa5281ff4a02 207
AnnaBridge 161:aa5281ff4a02 208 #define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U
AnnaBridge 161:aa5281ff4a02 209 #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL)
AnnaBridge 161:aa5281ff4a02 210 /**
AnnaBridge 161:aa5281ff4a02 211 * @}
AnnaBridge 161:aa5281ff4a02 212 */
AnnaBridge 161:aa5281ff4a02 213
AnnaBridge 161:aa5281ff4a02 214 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time
AnnaBridge 161:aa5281ff4a02 215 * @{
AnnaBridge 161:aa5281ff4a02 216 */
AnnaBridge 161:aa5281ff4a02 217 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U
AnnaBridge 161:aa5281ff4a02 218 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
AnnaBridge 161:aa5281ff4a02 219 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
AnnaBridge 161:aa5281ff4a02 220 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
AnnaBridge 161:aa5281ff4a02 221 /**
AnnaBridge 161:aa5281ff4a02 222 * @}
AnnaBridge 161:aa5281ff4a02 223 */
AnnaBridge 161:aa5281ff4a02 224
AnnaBridge 161:aa5281ff4a02 225 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity
AnnaBridge 161:aa5281ff4a02 226 * @{
AnnaBridge 161:aa5281ff4a02 227 */
AnnaBridge 161:aa5281ff4a02 228
AnnaBridge 161:aa5281ff4a02 229 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U
AnnaBridge 161:aa5281ff4a02 230 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
AnnaBridge 161:aa5281ff4a02 231 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
AnnaBridge 161:aa5281ff4a02 232 /**
AnnaBridge 161:aa5281ff4a02 233 * @}
AnnaBridge 161:aa5281ff4a02 234 */
AnnaBridge 161:aa5281ff4a02 235
AnnaBridge 161:aa5281ff4a02 236 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source
AnnaBridge 161:aa5281ff4a02 237 * @{
AnnaBridge 161:aa5281ff4a02 238 */
AnnaBridge 161:aa5281ff4a02 239 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU
AnnaBridge 161:aa5281ff4a02 240 #define LPTIM_TRIGSOURCE_0 0x00000000U
AnnaBridge 161:aa5281ff4a02 241 #define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0)
AnnaBridge 161:aa5281ff4a02 242 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
AnnaBridge 161:aa5281ff4a02 243 #define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
AnnaBridge 161:aa5281ff4a02 244 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
AnnaBridge 161:aa5281ff4a02 245 #define LPTIM_TRIGSOURCE_5 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
AnnaBridge 161:aa5281ff4a02 246 /**
AnnaBridge 161:aa5281ff4a02 247 * @}
AnnaBridge 161:aa5281ff4a02 248 */
AnnaBridge 161:aa5281ff4a02 249
AnnaBridge 161:aa5281ff4a02 250 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity
AnnaBridge 161:aa5281ff4a02 251 * @{
AnnaBridge 161:aa5281ff4a02 252 */
AnnaBridge 161:aa5281ff4a02 253 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
AnnaBridge 161:aa5281ff4a02 254 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
AnnaBridge 161:aa5281ff4a02 255 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
AnnaBridge 161:aa5281ff4a02 256 /**
AnnaBridge 161:aa5281ff4a02 257 * @}
AnnaBridge 161:aa5281ff4a02 258 */
AnnaBridge 161:aa5281ff4a02 259
AnnaBridge 161:aa5281ff4a02 260 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time
AnnaBridge 161:aa5281ff4a02 261 * @{
AnnaBridge 161:aa5281ff4a02 262 */
AnnaBridge 161:aa5281ff4a02 263 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U
AnnaBridge 161:aa5281ff4a02 264 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
AnnaBridge 161:aa5281ff4a02 265 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
AnnaBridge 161:aa5281ff4a02 266 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
AnnaBridge 161:aa5281ff4a02 267 /**
AnnaBridge 161:aa5281ff4a02 268 * @}
AnnaBridge 161:aa5281ff4a02 269 */
AnnaBridge 161:aa5281ff4a02 270
AnnaBridge 161:aa5281ff4a02 271 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode
AnnaBridge 161:aa5281ff4a02 272 * @{
AnnaBridge 161:aa5281ff4a02 273 */
AnnaBridge 161:aa5281ff4a02 274
AnnaBridge 161:aa5281ff4a02 275 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U
AnnaBridge 161:aa5281ff4a02 276 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
AnnaBridge 161:aa5281ff4a02 277 /**
AnnaBridge 161:aa5281ff4a02 278 * @}
AnnaBridge 161:aa5281ff4a02 279 */
AnnaBridge 161:aa5281ff4a02 280
AnnaBridge 161:aa5281ff4a02 281 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source
AnnaBridge 161:aa5281ff4a02 282 * @{
AnnaBridge 161:aa5281ff4a02 283 */
AnnaBridge 161:aa5281ff4a02 284
AnnaBridge 161:aa5281ff4a02 285 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U
AnnaBridge 161:aa5281ff4a02 286 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
AnnaBridge 161:aa5281ff4a02 287 /**
AnnaBridge 161:aa5281ff4a02 288 * @}
AnnaBridge 161:aa5281ff4a02 289 */
AnnaBridge 161:aa5281ff4a02 290
AnnaBridge 161:aa5281ff4a02 291 /** @defgroup LPTIM_Flag_Definition LPTIM Flag Definition
AnnaBridge 161:aa5281ff4a02 292 * @{
AnnaBridge 161:aa5281ff4a02 293 */
AnnaBridge 161:aa5281ff4a02 294
AnnaBridge 161:aa5281ff4a02 295 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
AnnaBridge 161:aa5281ff4a02 296 #define LPTIM_FLAG_UP LPTIM_ISR_UP
AnnaBridge 161:aa5281ff4a02 297 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
AnnaBridge 161:aa5281ff4a02 298 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
AnnaBridge 161:aa5281ff4a02 299 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
AnnaBridge 161:aa5281ff4a02 300 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
AnnaBridge 161:aa5281ff4a02 301 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
AnnaBridge 161:aa5281ff4a02 302 /**
AnnaBridge 161:aa5281ff4a02 303 * @}
AnnaBridge 161:aa5281ff4a02 304 */
AnnaBridge 161:aa5281ff4a02 305
AnnaBridge 161:aa5281ff4a02 306 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition
AnnaBridge 161:aa5281ff4a02 307 * @{
AnnaBridge 161:aa5281ff4a02 308 */
AnnaBridge 161:aa5281ff4a02 309
AnnaBridge 161:aa5281ff4a02 310 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
AnnaBridge 161:aa5281ff4a02 311 #define LPTIM_IT_UP LPTIM_IER_UPIE
AnnaBridge 161:aa5281ff4a02 312 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
AnnaBridge 161:aa5281ff4a02 313 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
AnnaBridge 161:aa5281ff4a02 314 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
AnnaBridge 161:aa5281ff4a02 315 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
AnnaBridge 161:aa5281ff4a02 316 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
AnnaBridge 161:aa5281ff4a02 317 /**
AnnaBridge 161:aa5281ff4a02 318 * @}
AnnaBridge 161:aa5281ff4a02 319 */
AnnaBridge 161:aa5281ff4a02 320
AnnaBridge 161:aa5281ff4a02 321 /** @defgroup LPTIM_Option Register Definition
AnnaBridge 161:aa5281ff4a02 322 * @{
AnnaBridge 161:aa5281ff4a02 323 */
AnnaBridge 161:aa5281ff4a02 324 #define LPTIM_OP_PAD_AF 0x00000000U
AnnaBridge 161:aa5281ff4a02 325 #define LPTIM_OP_PAD_PA4 LPTIM_OR_LPT_IN1_RMP_0
AnnaBridge 161:aa5281ff4a02 326 #define LPTIM_OP_PAD_PB9 LPTIM_OR_LPT_IN1_RMP_1
AnnaBridge 161:aa5281ff4a02 327 #define LPTIM_OP_TIM_DAC LPTIM_OR_LPT_IN1_RMP
AnnaBridge 161:aa5281ff4a02 328
AnnaBridge 161:aa5281ff4a02 329 /**
AnnaBridge 161:aa5281ff4a02 330 * @}
AnnaBridge 161:aa5281ff4a02 331 */
AnnaBridge 161:aa5281ff4a02 332
AnnaBridge 161:aa5281ff4a02 333 /**
AnnaBridge 161:aa5281ff4a02 334 * @}
AnnaBridge 161:aa5281ff4a02 335 */
AnnaBridge 161:aa5281ff4a02 336
AnnaBridge 161:aa5281ff4a02 337 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 338 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
AnnaBridge 161:aa5281ff4a02 339 * @{
AnnaBridge 161:aa5281ff4a02 340 */
AnnaBridge 161:aa5281ff4a02 341
AnnaBridge 161:aa5281ff4a02 342 /** @brief Reset LPTIM handle state
AnnaBridge 163:e59c8e839560 343 * @param __HANDLE__ LPTIM handle
AnnaBridge 161:aa5281ff4a02 344 * @retval None
AnnaBridge 161:aa5281ff4a02 345 */
AnnaBridge 161:aa5281ff4a02 346 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
AnnaBridge 161:aa5281ff4a02 347
AnnaBridge 161:aa5281ff4a02 348 /**
AnnaBridge 161:aa5281ff4a02 349 * @brief Enable/Disable the LPTIM peripheral.
AnnaBridge 163:e59c8e839560 350 * @param __HANDLE__ LPTIM handle
AnnaBridge 161:aa5281ff4a02 351 * @retval None
AnnaBridge 161:aa5281ff4a02 352 */
AnnaBridge 161:aa5281ff4a02 353 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
AnnaBridge 161:aa5281ff4a02 354 #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE))
AnnaBridge 161:aa5281ff4a02 355
AnnaBridge 161:aa5281ff4a02 356 /**
AnnaBridge 161:aa5281ff4a02 357 * @brief Starts the LPTIM peripheral in Continuous or in single mode.
AnnaBridge 163:e59c8e839560 358 * @param __HANDLE__ DMA handle
AnnaBridge 161:aa5281ff4a02 359 * @retval None
AnnaBridge 161:aa5281ff4a02 360 */
AnnaBridge 161:aa5281ff4a02 361 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
AnnaBridge 161:aa5281ff4a02 362 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
AnnaBridge 161:aa5281ff4a02 363
AnnaBridge 161:aa5281ff4a02 364
AnnaBridge 161:aa5281ff4a02 365 /**
AnnaBridge 161:aa5281ff4a02 366 * @brief Writes the passed parameter in the Autoreload register.
AnnaBridge 163:e59c8e839560 367 * @param __HANDLE__ LPTIM handle
AnnaBridge 163:e59c8e839560 368 * @param __VALUE__ Autoreload value
AnnaBridge 161:aa5281ff4a02 369 * @retval None
AnnaBridge 161:aa5281ff4a02 370 */
AnnaBridge 161:aa5281ff4a02 371 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
AnnaBridge 161:aa5281ff4a02 372
AnnaBridge 161:aa5281ff4a02 373 /**
AnnaBridge 161:aa5281ff4a02 374 * @brief Writes the passed parameter in the Compare register.
AnnaBridge 163:e59c8e839560 375 * @param __HANDLE__ LPTIM handle
AnnaBridge 163:e59c8e839560 376 * @param __VALUE__ Compare value
AnnaBridge 161:aa5281ff4a02 377 * @retval None
AnnaBridge 161:aa5281ff4a02 378 */
AnnaBridge 161:aa5281ff4a02 379 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
AnnaBridge 161:aa5281ff4a02 380
AnnaBridge 161:aa5281ff4a02 381 /**
AnnaBridge 161:aa5281ff4a02 382 * @brief Checks whether the specified LPTIM flag is set or not.
AnnaBridge 163:e59c8e839560 383 * @param __HANDLE__ LPTIM handle
AnnaBridge 163:e59c8e839560 384 * @param __FLAG__ LPTIM flag to check
AnnaBridge 161:aa5281ff4a02 385 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 386 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
AnnaBridge 161:aa5281ff4a02 387 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
AnnaBridge 161:aa5281ff4a02 388 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
AnnaBridge 161:aa5281ff4a02 389 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
AnnaBridge 161:aa5281ff4a02 390 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
AnnaBridge 161:aa5281ff4a02 391 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
AnnaBridge 161:aa5281ff4a02 392 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
AnnaBridge 161:aa5281ff4a02 393 * @retval The state of the specified flag (SET or RESET).
AnnaBridge 161:aa5281ff4a02 394 */
AnnaBridge 161:aa5281ff4a02 395 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
AnnaBridge 161:aa5281ff4a02 396
AnnaBridge 161:aa5281ff4a02 397 /**
AnnaBridge 161:aa5281ff4a02 398 * @brief Clears the specified LPTIM flag.
AnnaBridge 163:e59c8e839560 399 * @param __HANDLE__ LPTIM handle.
AnnaBridge 163:e59c8e839560 400 * @param __FLAG__ LPTIM flag to clear.
AnnaBridge 161:aa5281ff4a02 401 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 402 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
AnnaBridge 161:aa5281ff4a02 403 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
AnnaBridge 161:aa5281ff4a02 404 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
AnnaBridge 161:aa5281ff4a02 405 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
AnnaBridge 161:aa5281ff4a02 406 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
AnnaBridge 161:aa5281ff4a02 407 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
AnnaBridge 161:aa5281ff4a02 408 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
AnnaBridge 161:aa5281ff4a02 409 * @retval None.
AnnaBridge 161:aa5281ff4a02 410 */
AnnaBridge 161:aa5281ff4a02 411 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 161:aa5281ff4a02 412
AnnaBridge 161:aa5281ff4a02 413 /**
AnnaBridge 161:aa5281ff4a02 414 * @brief Enable the specified LPTIM interrupt.
AnnaBridge 163:e59c8e839560 415 * @param __HANDLE__ LPTIM handle.
AnnaBridge 163:e59c8e839560 416 * @param __INTERRUPT__ LPTIM interrupt to set.
AnnaBridge 161:aa5281ff4a02 417 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 418 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 161:aa5281ff4a02 419 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 161:aa5281ff4a02 420 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 421 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 422 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 161:aa5281ff4a02 423 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 161:aa5281ff4a02 424 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 161:aa5281ff4a02 425 * @retval None.
AnnaBridge 161:aa5281ff4a02 426 */
AnnaBridge 161:aa5281ff4a02 427 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
AnnaBridge 161:aa5281ff4a02 428
AnnaBridge 161:aa5281ff4a02 429 /**
AnnaBridge 161:aa5281ff4a02 430 * @brief Disable the specified LPTIM interrupt.
AnnaBridge 163:e59c8e839560 431 * @param __HANDLE__ LPTIM handle.
AnnaBridge 163:e59c8e839560 432 * @param __INTERRUPT__ LPTIM interrupt to set.
AnnaBridge 161:aa5281ff4a02 433 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 434 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 161:aa5281ff4a02 435 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 161:aa5281ff4a02 436 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 437 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 438 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 161:aa5281ff4a02 439 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 161:aa5281ff4a02 440 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 161:aa5281ff4a02 441 * @retval None.
AnnaBridge 161:aa5281ff4a02 442 */
AnnaBridge 161:aa5281ff4a02 443 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
AnnaBridge 161:aa5281ff4a02 444
AnnaBridge 161:aa5281ff4a02 445 /**
AnnaBridge 161:aa5281ff4a02 446 * @brief Checks whether the specified LPTIM interrupt is set or not.
AnnaBridge 163:e59c8e839560 447 * @param __HANDLE__ LPTIM handle.
AnnaBridge 163:e59c8e839560 448 * @param __INTERRUPT__ LPTIM interrupt to check.
AnnaBridge 161:aa5281ff4a02 449 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 450 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 161:aa5281ff4a02 451 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 161:aa5281ff4a02 452 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 453 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 454 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 161:aa5281ff4a02 455 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 161:aa5281ff4a02 456 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 161:aa5281ff4a02 457 * @retval Interrupt status.
AnnaBridge 161:aa5281ff4a02 458 */
AnnaBridge 161:aa5281ff4a02 459
AnnaBridge 161:aa5281ff4a02 460 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
AnnaBridge 161:aa5281ff4a02 461
AnnaBridge 161:aa5281ff4a02 462 /** @brief LPTIM Option Register
AnnaBridge 163:e59c8e839560 463 * @param __HANDLE__ LPTIM handle
AnnaBridge 163:e59c8e839560 464 * @param __VALUE__ This parameter can be a value of :
AnnaBridge 161:aa5281ff4a02 465 * @arg LPTIM_OP_PAD_AF
AnnaBridge 161:aa5281ff4a02 466 * @arg LPTIM_OP_PAD_PA4
AnnaBridge 161:aa5281ff4a02 467 * @arg LPTIM_OP_PAD_PB9
AnnaBridge 161:aa5281ff4a02 468 * @arg LPTIM_OP_TIM_DAC
AnnaBridge 161:aa5281ff4a02 469 * @retval None
AnnaBridge 161:aa5281ff4a02 470 */
AnnaBridge 161:aa5281ff4a02 471 #define __HAL_LPTIM_OPTR_CONFIG(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->OR = (__VALUE__))
AnnaBridge 161:aa5281ff4a02 472
AnnaBridge 161:aa5281ff4a02 473 /**
AnnaBridge 161:aa5281ff4a02 474 * @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 475 * @retval None
AnnaBridge 161:aa5281ff4a02 476 */
AnnaBridge 161:aa5281ff4a02 477 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 478
AnnaBridge 161:aa5281ff4a02 479 /**
AnnaBridge 161:aa5281ff4a02 480 * @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 481 * @retval None
AnnaBridge 161:aa5281ff4a02 482 */
AnnaBridge 161:aa5281ff4a02 483 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 484
AnnaBridge 161:aa5281ff4a02 485 /**
AnnaBridge 161:aa5281ff4a02 486 * @brief Enable event on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 487 * @retval None.
AnnaBridge 161:aa5281ff4a02 488 */
AnnaBridge 161:aa5281ff4a02 489 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 490
AnnaBridge 161:aa5281ff4a02 491 /**
AnnaBridge 161:aa5281ff4a02 492 * @brief Disable event on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 493 * @retval None.
AnnaBridge 161:aa5281ff4a02 494 */
AnnaBridge 161:aa5281ff4a02 495 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 496
AnnaBridge 161:aa5281ff4a02 497 /**
AnnaBridge 161:aa5281ff4a02 498 * @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 499 * @retval None.
AnnaBridge 161:aa5281ff4a02 500 */
AnnaBridge 161:aa5281ff4a02 501 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 502
AnnaBridge 161:aa5281ff4a02 503 /**
AnnaBridge 161:aa5281ff4a02 504 * @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 505 * @retval None.
AnnaBridge 161:aa5281ff4a02 506 */
AnnaBridge 161:aa5281ff4a02 507 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 508
AnnaBridge 161:aa5281ff4a02 509 /**
AnnaBridge 161:aa5281ff4a02 510 * @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 511 * @retval None.
AnnaBridge 161:aa5281ff4a02 512 */
AnnaBridge 161:aa5281ff4a02 513 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 514
AnnaBridge 161:aa5281ff4a02 515 /**
AnnaBridge 161:aa5281ff4a02 516 * @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 517 * @retval None.
AnnaBridge 161:aa5281ff4a02 518 */
AnnaBridge 161:aa5281ff4a02 519 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 520
AnnaBridge 161:aa5281ff4a02 521 /**
AnnaBridge 161:aa5281ff4a02 522 * @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 523 * @retval None.
AnnaBridge 161:aa5281ff4a02 524 */
AnnaBridge 161:aa5281ff4a02 525 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\
AnnaBridge 161:aa5281ff4a02 526 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
AnnaBridge 161:aa5281ff4a02 527 }while(0U)
AnnaBridge 161:aa5281ff4a02 528
AnnaBridge 161:aa5281ff4a02 529 /**
AnnaBridge 161:aa5281ff4a02 530 * @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 531 * This parameter can be:
AnnaBridge 161:aa5281ff4a02 532 * @retval None.
AnnaBridge 161:aa5281ff4a02 533 */
AnnaBridge 161:aa5281ff4a02 534 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\
AnnaBridge 161:aa5281ff4a02 535 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
AnnaBridge 161:aa5281ff4a02 536 }while(0U)
AnnaBridge 161:aa5281ff4a02 537
AnnaBridge 161:aa5281ff4a02 538 /**
AnnaBridge 161:aa5281ff4a02 539 * @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not.
AnnaBridge 161:aa5281ff4a02 540 * @retval Line Status.
AnnaBridge 161:aa5281ff4a02 541 */
AnnaBridge 161:aa5281ff4a02 542 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 543
AnnaBridge 161:aa5281ff4a02 544 /**
AnnaBridge 161:aa5281ff4a02 545 * @brief Clear the LPTIM Wake-up Timer associated Exti line flag.
AnnaBridge 161:aa5281ff4a02 546 * @retval None.
AnnaBridge 161:aa5281ff4a02 547 */
AnnaBridge 161:aa5281ff4a02 548 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 549
AnnaBridge 161:aa5281ff4a02 550 /**
AnnaBridge 161:aa5281ff4a02 551 * @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 552 * @retval None.
AnnaBridge 161:aa5281ff4a02 553 */
AnnaBridge 161:aa5281ff4a02 554 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 555
AnnaBridge 161:aa5281ff4a02 556 /**
AnnaBridge 161:aa5281ff4a02 557 * @}
AnnaBridge 161:aa5281ff4a02 558 */
AnnaBridge 161:aa5281ff4a02 559 /* Exported functions --------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 560 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
AnnaBridge 161:aa5281ff4a02 561 * @{
AnnaBridge 161:aa5281ff4a02 562 */
AnnaBridge 161:aa5281ff4a02 563
AnnaBridge 161:aa5281ff4a02 564 /* Initialization/de-initialization functions ********************************/
AnnaBridge 161:aa5281ff4a02 565 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 566 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 567
AnnaBridge 161:aa5281ff4a02 568 /* MSP functions *************************************************************/
AnnaBridge 161:aa5281ff4a02 569 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 570 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 571
AnnaBridge 161:aa5281ff4a02 572 /* Start/Stop operation functions *********************************************/
AnnaBridge 161:aa5281ff4a02 573 /* ################################# PWM Mode ################################*/
AnnaBridge 161:aa5281ff4a02 574 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 575 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 576 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 577 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 578 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 579 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 580
AnnaBridge 161:aa5281ff4a02 581 /* ############################# One Pulse Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 582 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 583 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 584 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 585 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 586 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 587 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 588
AnnaBridge 161:aa5281ff4a02 589 /* ############################## Set once Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 590 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 591 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 592 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 593 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 594 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 595 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 596
AnnaBridge 161:aa5281ff4a02 597 /* ############################### Encoder Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 598 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 599 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 600 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 601 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 602 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 603 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 604
AnnaBridge 161:aa5281ff4a02 605 /* ############################# Time out Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 606 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 607 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
AnnaBridge 161:aa5281ff4a02 608 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 609 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 610 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
AnnaBridge 161:aa5281ff4a02 611 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 612
AnnaBridge 161:aa5281ff4a02 613 /* ############################## Counter Mode ###############################*/
AnnaBridge 161:aa5281ff4a02 614 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 615 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 616 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 617 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 618 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 619 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 620
AnnaBridge 161:aa5281ff4a02 621 /* Reading operation functions ************************************************/
AnnaBridge 161:aa5281ff4a02 622 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 623 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 624 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 625
AnnaBridge 161:aa5281ff4a02 626 /* LPTIM IRQ functions *******************************************************/
AnnaBridge 161:aa5281ff4a02 627 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 628
AnnaBridge 161:aa5281ff4a02 629 /* CallBack functions ********************************************************/
AnnaBridge 161:aa5281ff4a02 630 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 631 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 632 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 633 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 634 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 635 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 636 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 637
AnnaBridge 161:aa5281ff4a02 638 /* Peripheral State functions ************************************************/
AnnaBridge 161:aa5281ff4a02 639 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 640
AnnaBridge 161:aa5281ff4a02 641 /**
AnnaBridge 161:aa5281ff4a02 642 * @}
AnnaBridge 161:aa5281ff4a02 643 */
AnnaBridge 161:aa5281ff4a02 644
AnnaBridge 161:aa5281ff4a02 645 /* Private types -------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 646 /** @defgroup LPTIM_Private_Types LPTIM Private Types
AnnaBridge 161:aa5281ff4a02 647 * @{
AnnaBridge 161:aa5281ff4a02 648 */
AnnaBridge 161:aa5281ff4a02 649
AnnaBridge 161:aa5281ff4a02 650 /**
AnnaBridge 161:aa5281ff4a02 651 * @}
AnnaBridge 161:aa5281ff4a02 652 */
AnnaBridge 161:aa5281ff4a02 653
AnnaBridge 161:aa5281ff4a02 654 /* Private variables ---------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 655 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables
AnnaBridge 161:aa5281ff4a02 656 * @{
AnnaBridge 161:aa5281ff4a02 657 */
AnnaBridge 161:aa5281ff4a02 658
AnnaBridge 161:aa5281ff4a02 659 /**
AnnaBridge 161:aa5281ff4a02 660 * @}
AnnaBridge 161:aa5281ff4a02 661 */
AnnaBridge 161:aa5281ff4a02 662
AnnaBridge 161:aa5281ff4a02 663 /* Private constants ---------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 664 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants
AnnaBridge 161:aa5281ff4a02 665 * @{
AnnaBridge 161:aa5281ff4a02 666 */
AnnaBridge 161:aa5281ff4a02 667
AnnaBridge 161:aa5281ff4a02 668 /**
AnnaBridge 161:aa5281ff4a02 669 * @}
AnnaBridge 161:aa5281ff4a02 670 */
AnnaBridge 161:aa5281ff4a02 671
AnnaBridge 161:aa5281ff4a02 672 /* Private macros ------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 673 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros
AnnaBridge 161:aa5281ff4a02 674 * @{
AnnaBridge 161:aa5281ff4a02 675 */
AnnaBridge 161:aa5281ff4a02 676
AnnaBridge 161:aa5281ff4a02 677 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
AnnaBridge 161:aa5281ff4a02 678 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
AnnaBridge 161:aa5281ff4a02 679
AnnaBridge 161:aa5281ff4a02 680 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \
AnnaBridge 161:aa5281ff4a02 681 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
AnnaBridge 161:aa5281ff4a02 682 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
AnnaBridge 161:aa5281ff4a02 683 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
AnnaBridge 161:aa5281ff4a02 684 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
AnnaBridge 161:aa5281ff4a02 685 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
AnnaBridge 161:aa5281ff4a02 686 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
AnnaBridge 161:aa5281ff4a02 687 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
AnnaBridge 161:aa5281ff4a02 688 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
AnnaBridge 161:aa5281ff4a02 689
AnnaBridge 161:aa5281ff4a02 690 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
AnnaBridge 161:aa5281ff4a02 691 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
AnnaBridge 161:aa5281ff4a02 692
AnnaBridge 161:aa5281ff4a02 693 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
AnnaBridge 161:aa5281ff4a02 694 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
AnnaBridge 161:aa5281ff4a02 695 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
AnnaBridge 161:aa5281ff4a02 696 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
AnnaBridge 161:aa5281ff4a02 697
AnnaBridge 161:aa5281ff4a02 698 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \
AnnaBridge 161:aa5281ff4a02 699 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
AnnaBridge 161:aa5281ff4a02 700 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
AnnaBridge 161:aa5281ff4a02 701
AnnaBridge 161:aa5281ff4a02 702 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
AnnaBridge 161:aa5281ff4a02 703 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
AnnaBridge 161:aa5281ff4a02 704 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
AnnaBridge 161:aa5281ff4a02 705 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
AnnaBridge 161:aa5281ff4a02 706 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
AnnaBridge 161:aa5281ff4a02 707 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
AnnaBridge 161:aa5281ff4a02 708 ((__TRIG__) == LPTIM_TRIGSOURCE_5))
AnnaBridge 161:aa5281ff4a02 709
AnnaBridge 161:aa5281ff4a02 710 #define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \
AnnaBridge 161:aa5281ff4a02 711 ((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \
AnnaBridge 161:aa5281ff4a02 712 ((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
AnnaBridge 161:aa5281ff4a02 713
AnnaBridge 161:aa5281ff4a02 714 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \
AnnaBridge 161:aa5281ff4a02 715 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
AnnaBridge 161:aa5281ff4a02 716 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
AnnaBridge 161:aa5281ff4a02 717 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
AnnaBridge 161:aa5281ff4a02 718
AnnaBridge 161:aa5281ff4a02 719 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
AnnaBridge 161:aa5281ff4a02 720 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
AnnaBridge 161:aa5281ff4a02 721
AnnaBridge 161:aa5281ff4a02 722 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
AnnaBridge 161:aa5281ff4a02 723 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
AnnaBridge 161:aa5281ff4a02 724
AnnaBridge 161:aa5281ff4a02 725 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 726
AnnaBridge 161:aa5281ff4a02 727 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 728
AnnaBridge 161:aa5281ff4a02 729 #define IS_LPTIM_PERIOD(PERIOD) ((PERIOD) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 730
AnnaBridge 161:aa5281ff4a02 731 #define IS_LPTIM_PULSE(PULSE) ((PULSE) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 732
AnnaBridge 161:aa5281ff4a02 733 /**
AnnaBridge 161:aa5281ff4a02 734 * @}
AnnaBridge 161:aa5281ff4a02 735 */
AnnaBridge 161:aa5281ff4a02 736
AnnaBridge 161:aa5281ff4a02 737 /* Private functions ---------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 738 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
AnnaBridge 161:aa5281ff4a02 739 * @{
AnnaBridge 161:aa5281ff4a02 740 */
AnnaBridge 161:aa5281ff4a02 741
AnnaBridge 161:aa5281ff4a02 742 /**
AnnaBridge 161:aa5281ff4a02 743 * @}
AnnaBridge 161:aa5281ff4a02 744 */
AnnaBridge 161:aa5281ff4a02 745
AnnaBridge 161:aa5281ff4a02 746 /**
AnnaBridge 161:aa5281ff4a02 747 * @}
AnnaBridge 161:aa5281ff4a02 748 */
AnnaBridge 161:aa5281ff4a02 749
AnnaBridge 161:aa5281ff4a02 750 /**
AnnaBridge 161:aa5281ff4a02 751 * @}
AnnaBridge 161:aa5281ff4a02 752 */
AnnaBridge 161:aa5281ff4a02 753
AnnaBridge 161:aa5281ff4a02 754 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
AnnaBridge 161:aa5281ff4a02 755 #ifdef __cplusplus
AnnaBridge 161:aa5281ff4a02 756 }
AnnaBridge 161:aa5281ff4a02 757 #endif
AnnaBridge 161:aa5281ff4a02 758
AnnaBridge 161:aa5281ff4a02 759 #endif /* __STM32F4xx_HAL_LPTIM_H */
AnnaBridge 161:aa5281ff4a02 760
AnnaBridge 161:aa5281ff4a02 761 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/