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Committer:
AnnaBridge
Date:
Fri Feb 16 16:16:41 2018 +0000
Revision:
161:aa5281ff4a02
Child:
163:e59c8e839560
mbed library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 161:aa5281ff4a02 1 /**
AnnaBridge 161:aa5281ff4a02 2 ******************************************************************************
AnnaBridge 161:aa5281ff4a02 3 * @file stm32f4xx_hal_lptim.h
AnnaBridge 161:aa5281ff4a02 4 * @author MCD Application Team
AnnaBridge 161:aa5281ff4a02 5 * @version V1.7.1
AnnaBridge 161:aa5281ff4a02 6 * @date 14-April-2017
AnnaBridge 161:aa5281ff4a02 7 * @brief Header file of LPTIM HAL module.
AnnaBridge 161:aa5281ff4a02 8 ******************************************************************************
AnnaBridge 161:aa5281ff4a02 9 * @attention
AnnaBridge 161:aa5281ff4a02 10 *
AnnaBridge 161:aa5281ff4a02 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 161:aa5281ff4a02 12 *
AnnaBridge 161:aa5281ff4a02 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 161:aa5281ff4a02 14 * are permitted provided that the following conditions are met:
AnnaBridge 161:aa5281ff4a02 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 161:aa5281ff4a02 16 * this list of conditions and the following disclaimer.
AnnaBridge 161:aa5281ff4a02 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 161:aa5281ff4a02 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 161:aa5281ff4a02 19 * and/or other materials provided with the distribution.
AnnaBridge 161:aa5281ff4a02 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 161:aa5281ff4a02 21 * may be used to endorse or promote products derived from this software
AnnaBridge 161:aa5281ff4a02 22 * without specific prior written permission.
AnnaBridge 161:aa5281ff4a02 23 *
AnnaBridge 161:aa5281ff4a02 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 161:aa5281ff4a02 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 161:aa5281ff4a02 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 161:aa5281ff4a02 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 161:aa5281ff4a02 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 161:aa5281ff4a02 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 161:aa5281ff4a02 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 161:aa5281ff4a02 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 161:aa5281ff4a02 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 161:aa5281ff4a02 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 161:aa5281ff4a02 34 *
AnnaBridge 161:aa5281ff4a02 35 ******************************************************************************
AnnaBridge 161:aa5281ff4a02 36 */
AnnaBridge 161:aa5281ff4a02 37
AnnaBridge 161:aa5281ff4a02 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 161:aa5281ff4a02 39 #ifndef __STM32F4xx_HAL_LPTIM_H
AnnaBridge 161:aa5281ff4a02 40 #define __STM32F4xx_HAL_LPTIM_H
AnnaBridge 161:aa5281ff4a02 41
AnnaBridge 161:aa5281ff4a02 42 #ifdef __cplusplus
AnnaBridge 161:aa5281ff4a02 43 extern "C" {
AnnaBridge 161:aa5281ff4a02 44 #endif
AnnaBridge 161:aa5281ff4a02 45
AnnaBridge 161:aa5281ff4a02 46 #if defined(STM32F410Tx) || defined(STM32F410Cx) || defined(STM32F410Rx) || defined(STM32F413xx) || defined(STM32F423xx)
AnnaBridge 161:aa5281ff4a02 47 /* Includes ------------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 48 #include "stm32f4xx_hal_def.h"
AnnaBridge 161:aa5281ff4a02 49
AnnaBridge 161:aa5281ff4a02 50 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 161:aa5281ff4a02 51 * @{
AnnaBridge 161:aa5281ff4a02 52 */
AnnaBridge 161:aa5281ff4a02 53
AnnaBridge 161:aa5281ff4a02 54 /** @defgroup LPTIM LPTIM
AnnaBridge 161:aa5281ff4a02 55 * @brief LPTIM HAL module driver
AnnaBridge 161:aa5281ff4a02 56 * @{
AnnaBridge 161:aa5281ff4a02 57 */
AnnaBridge 161:aa5281ff4a02 58
AnnaBridge 161:aa5281ff4a02 59 /* Exported types ------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 60 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types
AnnaBridge 161:aa5281ff4a02 61 * @{
AnnaBridge 161:aa5281ff4a02 62 */
AnnaBridge 161:aa5281ff4a02 63
AnnaBridge 161:aa5281ff4a02 64 /** @defgroup LPTIM_WAKEUPTIMER_EXTILINE LPTIM WAKEUP Timer EXTI Line
AnnaBridge 161:aa5281ff4a02 65 * @{
AnnaBridge 161:aa5281ff4a02 66 */
AnnaBridge 161:aa5281ff4a02 67 #define LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT ((uint32_t)EXTI_IMR_MR23) /*!< External interrupt line 23 Connected to the LPTIM EXTI Line */
AnnaBridge 161:aa5281ff4a02 68 /**
AnnaBridge 161:aa5281ff4a02 69 * @}
AnnaBridge 161:aa5281ff4a02 70 */
AnnaBridge 161:aa5281ff4a02 71
AnnaBridge 161:aa5281ff4a02 72 /**
AnnaBridge 161:aa5281ff4a02 73 * @brief LPTIM Clock configuration definition
AnnaBridge 161:aa5281ff4a02 74 */
AnnaBridge 161:aa5281ff4a02 75 typedef struct
AnnaBridge 161:aa5281ff4a02 76 {
AnnaBridge 161:aa5281ff4a02 77 uint32_t Source; /*!< Selects the clock source.
AnnaBridge 161:aa5281ff4a02 78 This parameter can be a value of @ref LPTIM_Clock_Source */
AnnaBridge 161:aa5281ff4a02 79
AnnaBridge 161:aa5281ff4a02 80 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
AnnaBridge 161:aa5281ff4a02 81 This parameter can be a value of @ref LPTIM_Clock_Prescaler */
AnnaBridge 161:aa5281ff4a02 82
AnnaBridge 161:aa5281ff4a02 83 }LPTIM_ClockConfigTypeDef;
AnnaBridge 161:aa5281ff4a02 84
AnnaBridge 161:aa5281ff4a02 85 /**
AnnaBridge 161:aa5281ff4a02 86 * @brief LPTIM Clock configuration definition
AnnaBridge 161:aa5281ff4a02 87 */
AnnaBridge 161:aa5281ff4a02 88 typedef struct
AnnaBridge 161:aa5281ff4a02 89 {
AnnaBridge 161:aa5281ff4a02 90 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
AnnaBridge 161:aa5281ff4a02 91 if the ULPTIM input is selected.
AnnaBridge 161:aa5281ff4a02 92 Note: This parameter is used only when Ultra low power clock source is used.
AnnaBridge 161:aa5281ff4a02 93 Note: If the polarity is configured on 'both edges', an auxiliary clock
AnnaBridge 161:aa5281ff4a02 94 (one of the Low power oscillator) must be active.
AnnaBridge 161:aa5281ff4a02 95 This parameter can be a value of @ref LPTIM_Clock_Polarity */
AnnaBridge 161:aa5281ff4a02 96
AnnaBridge 161:aa5281ff4a02 97 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
AnnaBridge 161:aa5281ff4a02 98 Note: This parameter is used only when Ultra low power clock source is used.
AnnaBridge 161:aa5281ff4a02 99 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
AnnaBridge 161:aa5281ff4a02 100
AnnaBridge 161:aa5281ff4a02 101 }LPTIM_ULPClockConfigTypeDef;
AnnaBridge 161:aa5281ff4a02 102
AnnaBridge 161:aa5281ff4a02 103 /**
AnnaBridge 161:aa5281ff4a02 104 * @brief LPTIM Trigger configuration definition
AnnaBridge 161:aa5281ff4a02 105 */
AnnaBridge 161:aa5281ff4a02 106 typedef struct
AnnaBridge 161:aa5281ff4a02 107 {
AnnaBridge 161:aa5281ff4a02 108 uint32_t Source; /*!< Selects the Trigger source.
AnnaBridge 161:aa5281ff4a02 109 This parameter can be a value of @ref LPTIM_Trigger_Source */
AnnaBridge 161:aa5281ff4a02 110
AnnaBridge 161:aa5281ff4a02 111 uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
AnnaBridge 161:aa5281ff4a02 112 Note: This parameter is used only when an external trigger is used.
AnnaBridge 161:aa5281ff4a02 113 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
AnnaBridge 161:aa5281ff4a02 114
AnnaBridge 161:aa5281ff4a02 115 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
AnnaBridge 161:aa5281ff4a02 116 Note: This parameter is used only when an external trigger is used.
AnnaBridge 161:aa5281ff4a02 117 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
AnnaBridge 161:aa5281ff4a02 118 }LPTIM_TriggerConfigTypeDef;
AnnaBridge 161:aa5281ff4a02 119
AnnaBridge 161:aa5281ff4a02 120 /**
AnnaBridge 161:aa5281ff4a02 121 * @brief LPTIM Initialization Structure definition
AnnaBridge 161:aa5281ff4a02 122 */
AnnaBridge 161:aa5281ff4a02 123 typedef struct
AnnaBridge 161:aa5281ff4a02 124 {
AnnaBridge 161:aa5281ff4a02 125 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */
AnnaBridge 161:aa5281ff4a02 126
AnnaBridge 161:aa5281ff4a02 127 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */
AnnaBridge 161:aa5281ff4a02 128
AnnaBridge 161:aa5281ff4a02 129 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */
AnnaBridge 161:aa5281ff4a02 130
AnnaBridge 161:aa5281ff4a02 131 uint32_t OutputPolarity; /*!< Specifies the Output polarity.
AnnaBridge 161:aa5281ff4a02 132 This parameter can be a value of @ref LPTIM_Output_Polarity */
AnnaBridge 161:aa5281ff4a02 133
AnnaBridge 161:aa5281ff4a02 134 uint32_t UpdateMode; /*!< Specifies whether the update of the autorelaod and the compare
AnnaBridge 161:aa5281ff4a02 135 values is done immediately or after the end of current period.
AnnaBridge 161:aa5281ff4a02 136 This parameter can be a value of @ref LPTIM_Updating_Mode */
AnnaBridge 161:aa5281ff4a02 137
AnnaBridge 161:aa5281ff4a02 138 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
AnnaBridge 161:aa5281ff4a02 139 or each external event.
AnnaBridge 161:aa5281ff4a02 140 This parameter can be a value of @ref LPTIM_Counter_Source */
AnnaBridge 161:aa5281ff4a02 141
AnnaBridge 161:aa5281ff4a02 142 }LPTIM_InitTypeDef;
AnnaBridge 161:aa5281ff4a02 143
AnnaBridge 161:aa5281ff4a02 144 /**
AnnaBridge 161:aa5281ff4a02 145 * @brief HAL LPTIM State structure definition
AnnaBridge 161:aa5281ff4a02 146 */
AnnaBridge 161:aa5281ff4a02 147 typedef enum __HAL_LPTIM_StateTypeDef
AnnaBridge 161:aa5281ff4a02 148 {
AnnaBridge 161:aa5281ff4a02 149 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */
AnnaBridge 161:aa5281ff4a02 150 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 161:aa5281ff4a02 151 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
AnnaBridge 161:aa5281ff4a02 152 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
AnnaBridge 161:aa5281ff4a02 153 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
AnnaBridge 161:aa5281ff4a02 154 }HAL_LPTIM_StateTypeDef;
AnnaBridge 161:aa5281ff4a02 155
AnnaBridge 161:aa5281ff4a02 156 /**
AnnaBridge 161:aa5281ff4a02 157 * @brief LPTIM handle Structure definition
AnnaBridge 161:aa5281ff4a02 158 */
AnnaBridge 161:aa5281ff4a02 159 typedef struct
AnnaBridge 161:aa5281ff4a02 160 {
AnnaBridge 161:aa5281ff4a02 161 LPTIM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 161:aa5281ff4a02 162
AnnaBridge 161:aa5281ff4a02 163 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
AnnaBridge 161:aa5281ff4a02 164
AnnaBridge 161:aa5281ff4a02 165 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
AnnaBridge 161:aa5281ff4a02 166
AnnaBridge 161:aa5281ff4a02 167 HAL_LockTypeDef Lock; /*!< LPTIM locking object */
AnnaBridge 161:aa5281ff4a02 168
AnnaBridge 161:aa5281ff4a02 169 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
AnnaBridge 161:aa5281ff4a02 170
AnnaBridge 161:aa5281ff4a02 171 }LPTIM_HandleTypeDef;
AnnaBridge 161:aa5281ff4a02 172
AnnaBridge 161:aa5281ff4a02 173 /**
AnnaBridge 161:aa5281ff4a02 174 * @}
AnnaBridge 161:aa5281ff4a02 175 */
AnnaBridge 161:aa5281ff4a02 176
AnnaBridge 161:aa5281ff4a02 177 /* Exported constants --------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 178 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants
AnnaBridge 161:aa5281ff4a02 179 * @{
AnnaBridge 161:aa5281ff4a02 180 */
AnnaBridge 161:aa5281ff4a02 181
AnnaBridge 161:aa5281ff4a02 182 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source
AnnaBridge 161:aa5281ff4a02 183 * @{
AnnaBridge 161:aa5281ff4a02 184 */
AnnaBridge 161:aa5281ff4a02 185 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00U
AnnaBridge 161:aa5281ff4a02 186 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
AnnaBridge 161:aa5281ff4a02 187 /**
AnnaBridge 161:aa5281ff4a02 188 * @}
AnnaBridge 161:aa5281ff4a02 189 */
AnnaBridge 161:aa5281ff4a02 190
AnnaBridge 161:aa5281ff4a02 191 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler
AnnaBridge 161:aa5281ff4a02 192 * @{
AnnaBridge 161:aa5281ff4a02 193 */
AnnaBridge 161:aa5281ff4a02 194 #define LPTIM_PRESCALER_DIV1 0x00000000U
AnnaBridge 161:aa5281ff4a02 195 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
AnnaBridge 161:aa5281ff4a02 196 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
AnnaBridge 161:aa5281ff4a02 197 #define LPTIM_PRESCALER_DIV8 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1))
AnnaBridge 161:aa5281ff4a02 198 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
AnnaBridge 161:aa5281ff4a02 199 #define LPTIM_PRESCALER_DIV32 ((uint32_t)(LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2))
AnnaBridge 161:aa5281ff4a02 200 #define LPTIM_PRESCALER_DIV64 ((uint32_t)(LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2))
AnnaBridge 161:aa5281ff4a02 201 #define LPTIM_PRESCALER_DIV128 ((uint32_t)LPTIM_CFGR_PRESC)
AnnaBridge 161:aa5281ff4a02 202 /**
AnnaBridge 161:aa5281ff4a02 203 * @}
AnnaBridge 161:aa5281ff4a02 204 */
AnnaBridge 161:aa5281ff4a02 205
AnnaBridge 161:aa5281ff4a02 206 /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity
AnnaBridge 161:aa5281ff4a02 207 * @{
AnnaBridge 161:aa5281ff4a02 208 */
AnnaBridge 161:aa5281ff4a02 209
AnnaBridge 161:aa5281ff4a02 210 #define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U
AnnaBridge 161:aa5281ff4a02 211 #define LPTIM_OUTPUTPOLARITY_LOW (LPTIM_CFGR_WAVPOL)
AnnaBridge 161:aa5281ff4a02 212 /**
AnnaBridge 161:aa5281ff4a02 213 * @}
AnnaBridge 161:aa5281ff4a02 214 */
AnnaBridge 161:aa5281ff4a02 215
AnnaBridge 161:aa5281ff4a02 216 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time
AnnaBridge 161:aa5281ff4a02 217 * @{
AnnaBridge 161:aa5281ff4a02 218 */
AnnaBridge 161:aa5281ff4a02 219 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U
AnnaBridge 161:aa5281ff4a02 220 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
AnnaBridge 161:aa5281ff4a02 221 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
AnnaBridge 161:aa5281ff4a02 222 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
AnnaBridge 161:aa5281ff4a02 223 /**
AnnaBridge 161:aa5281ff4a02 224 * @}
AnnaBridge 161:aa5281ff4a02 225 */
AnnaBridge 161:aa5281ff4a02 226
AnnaBridge 161:aa5281ff4a02 227 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity
AnnaBridge 161:aa5281ff4a02 228 * @{
AnnaBridge 161:aa5281ff4a02 229 */
AnnaBridge 161:aa5281ff4a02 230
AnnaBridge 161:aa5281ff4a02 231 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U
AnnaBridge 161:aa5281ff4a02 232 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
AnnaBridge 161:aa5281ff4a02 233 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
AnnaBridge 161:aa5281ff4a02 234 /**
AnnaBridge 161:aa5281ff4a02 235 * @}
AnnaBridge 161:aa5281ff4a02 236 */
AnnaBridge 161:aa5281ff4a02 237
AnnaBridge 161:aa5281ff4a02 238 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source
AnnaBridge 161:aa5281ff4a02 239 * @{
AnnaBridge 161:aa5281ff4a02 240 */
AnnaBridge 161:aa5281ff4a02 241 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU
AnnaBridge 161:aa5281ff4a02 242 #define LPTIM_TRIGSOURCE_0 0x00000000U
AnnaBridge 161:aa5281ff4a02 243 #define LPTIM_TRIGSOURCE_1 ((uint32_t)LPTIM_CFGR_TRIGSEL_0)
AnnaBridge 161:aa5281ff4a02 244 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
AnnaBridge 161:aa5281ff4a02 245 #define LPTIM_TRIGSOURCE_3 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
AnnaBridge 161:aa5281ff4a02 246 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
AnnaBridge 161:aa5281ff4a02 247 #define LPTIM_TRIGSOURCE_5 ((uint32_t)LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
AnnaBridge 161:aa5281ff4a02 248 /**
AnnaBridge 161:aa5281ff4a02 249 * @}
AnnaBridge 161:aa5281ff4a02 250 */
AnnaBridge 161:aa5281ff4a02 251
AnnaBridge 161:aa5281ff4a02 252 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity
AnnaBridge 161:aa5281ff4a02 253 * @{
AnnaBridge 161:aa5281ff4a02 254 */
AnnaBridge 161:aa5281ff4a02 255 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
AnnaBridge 161:aa5281ff4a02 256 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
AnnaBridge 161:aa5281ff4a02 257 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
AnnaBridge 161:aa5281ff4a02 258 /**
AnnaBridge 161:aa5281ff4a02 259 * @}
AnnaBridge 161:aa5281ff4a02 260 */
AnnaBridge 161:aa5281ff4a02 261
AnnaBridge 161:aa5281ff4a02 262 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time
AnnaBridge 161:aa5281ff4a02 263 * @{
AnnaBridge 161:aa5281ff4a02 264 */
AnnaBridge 161:aa5281ff4a02 265 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U
AnnaBridge 161:aa5281ff4a02 266 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
AnnaBridge 161:aa5281ff4a02 267 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
AnnaBridge 161:aa5281ff4a02 268 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
AnnaBridge 161:aa5281ff4a02 269 /**
AnnaBridge 161:aa5281ff4a02 270 * @}
AnnaBridge 161:aa5281ff4a02 271 */
AnnaBridge 161:aa5281ff4a02 272
AnnaBridge 161:aa5281ff4a02 273 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode
AnnaBridge 161:aa5281ff4a02 274 * @{
AnnaBridge 161:aa5281ff4a02 275 */
AnnaBridge 161:aa5281ff4a02 276
AnnaBridge 161:aa5281ff4a02 277 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U
AnnaBridge 161:aa5281ff4a02 278 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
AnnaBridge 161:aa5281ff4a02 279 /**
AnnaBridge 161:aa5281ff4a02 280 * @}
AnnaBridge 161:aa5281ff4a02 281 */
AnnaBridge 161:aa5281ff4a02 282
AnnaBridge 161:aa5281ff4a02 283 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source
AnnaBridge 161:aa5281ff4a02 284 * @{
AnnaBridge 161:aa5281ff4a02 285 */
AnnaBridge 161:aa5281ff4a02 286
AnnaBridge 161:aa5281ff4a02 287 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U
AnnaBridge 161:aa5281ff4a02 288 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
AnnaBridge 161:aa5281ff4a02 289 /**
AnnaBridge 161:aa5281ff4a02 290 * @}
AnnaBridge 161:aa5281ff4a02 291 */
AnnaBridge 161:aa5281ff4a02 292
AnnaBridge 161:aa5281ff4a02 293 /** @defgroup LPTIM_Flag_Definition LPTIM Flag Definition
AnnaBridge 161:aa5281ff4a02 294 * @{
AnnaBridge 161:aa5281ff4a02 295 */
AnnaBridge 161:aa5281ff4a02 296
AnnaBridge 161:aa5281ff4a02 297 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
AnnaBridge 161:aa5281ff4a02 298 #define LPTIM_FLAG_UP LPTIM_ISR_UP
AnnaBridge 161:aa5281ff4a02 299 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
AnnaBridge 161:aa5281ff4a02 300 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
AnnaBridge 161:aa5281ff4a02 301 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
AnnaBridge 161:aa5281ff4a02 302 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
AnnaBridge 161:aa5281ff4a02 303 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
AnnaBridge 161:aa5281ff4a02 304 /**
AnnaBridge 161:aa5281ff4a02 305 * @}
AnnaBridge 161:aa5281ff4a02 306 */
AnnaBridge 161:aa5281ff4a02 307
AnnaBridge 161:aa5281ff4a02 308 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition
AnnaBridge 161:aa5281ff4a02 309 * @{
AnnaBridge 161:aa5281ff4a02 310 */
AnnaBridge 161:aa5281ff4a02 311
AnnaBridge 161:aa5281ff4a02 312 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
AnnaBridge 161:aa5281ff4a02 313 #define LPTIM_IT_UP LPTIM_IER_UPIE
AnnaBridge 161:aa5281ff4a02 314 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
AnnaBridge 161:aa5281ff4a02 315 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
AnnaBridge 161:aa5281ff4a02 316 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
AnnaBridge 161:aa5281ff4a02 317 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
AnnaBridge 161:aa5281ff4a02 318 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
AnnaBridge 161:aa5281ff4a02 319 /**
AnnaBridge 161:aa5281ff4a02 320 * @}
AnnaBridge 161:aa5281ff4a02 321 */
AnnaBridge 161:aa5281ff4a02 322
AnnaBridge 161:aa5281ff4a02 323 /** @defgroup LPTIM_Option Register Definition
AnnaBridge 161:aa5281ff4a02 324 * @{
AnnaBridge 161:aa5281ff4a02 325 */
AnnaBridge 161:aa5281ff4a02 326 #define LPTIM_OP_PAD_AF 0x00000000U
AnnaBridge 161:aa5281ff4a02 327 #define LPTIM_OP_PAD_PA4 LPTIM_OR_LPT_IN1_RMP_0
AnnaBridge 161:aa5281ff4a02 328 #define LPTIM_OP_PAD_PB9 LPTIM_OR_LPT_IN1_RMP_1
AnnaBridge 161:aa5281ff4a02 329 #define LPTIM_OP_TIM_DAC LPTIM_OR_LPT_IN1_RMP
AnnaBridge 161:aa5281ff4a02 330
AnnaBridge 161:aa5281ff4a02 331 /**
AnnaBridge 161:aa5281ff4a02 332 * @}
AnnaBridge 161:aa5281ff4a02 333 */
AnnaBridge 161:aa5281ff4a02 334
AnnaBridge 161:aa5281ff4a02 335 /**
AnnaBridge 161:aa5281ff4a02 336 * @}
AnnaBridge 161:aa5281ff4a02 337 */
AnnaBridge 161:aa5281ff4a02 338
AnnaBridge 161:aa5281ff4a02 339 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 340 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
AnnaBridge 161:aa5281ff4a02 341 * @{
AnnaBridge 161:aa5281ff4a02 342 */
AnnaBridge 161:aa5281ff4a02 343
AnnaBridge 161:aa5281ff4a02 344 /** @brief Reset LPTIM handle state
AnnaBridge 161:aa5281ff4a02 345 * @param __HANDLE__: LPTIM handle
AnnaBridge 161:aa5281ff4a02 346 * @retval None
AnnaBridge 161:aa5281ff4a02 347 */
AnnaBridge 161:aa5281ff4a02 348 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
AnnaBridge 161:aa5281ff4a02 349
AnnaBridge 161:aa5281ff4a02 350 /**
AnnaBridge 161:aa5281ff4a02 351 * @brief Enable/Disable the LPTIM peripheral.
AnnaBridge 161:aa5281ff4a02 352 * @param __HANDLE__: LPTIM handle
AnnaBridge 161:aa5281ff4a02 353 * @retval None
AnnaBridge 161:aa5281ff4a02 354 */
AnnaBridge 161:aa5281ff4a02 355 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
AnnaBridge 161:aa5281ff4a02 356 #define __HAL_LPTIM_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(LPTIM_CR_ENABLE))
AnnaBridge 161:aa5281ff4a02 357
AnnaBridge 161:aa5281ff4a02 358 /**
AnnaBridge 161:aa5281ff4a02 359 * @brief Starts the LPTIM peripheral in Continuous or in single mode.
AnnaBridge 161:aa5281ff4a02 360 * @param __HANDLE__: DMA handle
AnnaBridge 161:aa5281ff4a02 361 * @retval None
AnnaBridge 161:aa5281ff4a02 362 */
AnnaBridge 161:aa5281ff4a02 363 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
AnnaBridge 161:aa5281ff4a02 364 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
AnnaBridge 161:aa5281ff4a02 365
AnnaBridge 161:aa5281ff4a02 366
AnnaBridge 161:aa5281ff4a02 367 /**
AnnaBridge 161:aa5281ff4a02 368 * @brief Writes the passed parameter in the Autoreload register.
AnnaBridge 161:aa5281ff4a02 369 * @param __HANDLE__: LPTIM handle
AnnaBridge 161:aa5281ff4a02 370 * @param __VALUE__ : Autoreload value
AnnaBridge 161:aa5281ff4a02 371 * @retval None
AnnaBridge 161:aa5281ff4a02 372 */
AnnaBridge 161:aa5281ff4a02 373 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
AnnaBridge 161:aa5281ff4a02 374
AnnaBridge 161:aa5281ff4a02 375 /**
AnnaBridge 161:aa5281ff4a02 376 * @brief Writes the passed parameter in the Compare register.
AnnaBridge 161:aa5281ff4a02 377 * @param __HANDLE__: LPTIM handle
AnnaBridge 161:aa5281ff4a02 378 * @param __VALUE__ : Compare value
AnnaBridge 161:aa5281ff4a02 379 * @retval None
AnnaBridge 161:aa5281ff4a02 380 */
AnnaBridge 161:aa5281ff4a02 381 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
AnnaBridge 161:aa5281ff4a02 382
AnnaBridge 161:aa5281ff4a02 383 /**
AnnaBridge 161:aa5281ff4a02 384 * @brief Checks whether the specified LPTIM flag is set or not.
AnnaBridge 161:aa5281ff4a02 385 * @param __HANDLE__: LPTIM handle
AnnaBridge 161:aa5281ff4a02 386 * @param __FLAG__ : LPTIM flag to check
AnnaBridge 161:aa5281ff4a02 387 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 388 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
AnnaBridge 161:aa5281ff4a02 389 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
AnnaBridge 161:aa5281ff4a02 390 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
AnnaBridge 161:aa5281ff4a02 391 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
AnnaBridge 161:aa5281ff4a02 392 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
AnnaBridge 161:aa5281ff4a02 393 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
AnnaBridge 161:aa5281ff4a02 394 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
AnnaBridge 161:aa5281ff4a02 395 * @retval The state of the specified flag (SET or RESET).
AnnaBridge 161:aa5281ff4a02 396 */
AnnaBridge 161:aa5281ff4a02 397 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
AnnaBridge 161:aa5281ff4a02 398
AnnaBridge 161:aa5281ff4a02 399 /**
AnnaBridge 161:aa5281ff4a02 400 * @brief Clears the specified LPTIM flag.
AnnaBridge 161:aa5281ff4a02 401 * @param __HANDLE__: LPTIM handle.
AnnaBridge 161:aa5281ff4a02 402 * @param __FLAG__ : LPTIM flag to clear.
AnnaBridge 161:aa5281ff4a02 403 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 404 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
AnnaBridge 161:aa5281ff4a02 405 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
AnnaBridge 161:aa5281ff4a02 406 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
AnnaBridge 161:aa5281ff4a02 407 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
AnnaBridge 161:aa5281ff4a02 408 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
AnnaBridge 161:aa5281ff4a02 409 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
AnnaBridge 161:aa5281ff4a02 410 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
AnnaBridge 161:aa5281ff4a02 411 * @retval None.
AnnaBridge 161:aa5281ff4a02 412 */
AnnaBridge 161:aa5281ff4a02 413 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 161:aa5281ff4a02 414
AnnaBridge 161:aa5281ff4a02 415 /**
AnnaBridge 161:aa5281ff4a02 416 * @brief Enable the specified LPTIM interrupt.
AnnaBridge 161:aa5281ff4a02 417 * @param __HANDLE__ : LPTIM handle.
AnnaBridge 161:aa5281ff4a02 418 * @param __INTERRUPT__ : LPTIM interrupt to set.
AnnaBridge 161:aa5281ff4a02 419 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 420 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 161:aa5281ff4a02 421 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 161:aa5281ff4a02 422 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 423 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 424 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 161:aa5281ff4a02 425 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 161:aa5281ff4a02 426 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 161:aa5281ff4a02 427 * @retval None.
AnnaBridge 161:aa5281ff4a02 428 */
AnnaBridge 161:aa5281ff4a02 429 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
AnnaBridge 161:aa5281ff4a02 430
AnnaBridge 161:aa5281ff4a02 431 /**
AnnaBridge 161:aa5281ff4a02 432 * @brief Disable the specified LPTIM interrupt.
AnnaBridge 161:aa5281ff4a02 433 * @param __HANDLE__ : LPTIM handle.
AnnaBridge 161:aa5281ff4a02 434 * @param __INTERRUPT__ : LPTIM interrupt to set.
AnnaBridge 161:aa5281ff4a02 435 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 436 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 161:aa5281ff4a02 437 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 161:aa5281ff4a02 438 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 439 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 440 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 161:aa5281ff4a02 441 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 161:aa5281ff4a02 442 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 161:aa5281ff4a02 443 * @retval None.
AnnaBridge 161:aa5281ff4a02 444 */
AnnaBridge 161:aa5281ff4a02 445 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
AnnaBridge 161:aa5281ff4a02 446
AnnaBridge 161:aa5281ff4a02 447 /**
AnnaBridge 161:aa5281ff4a02 448 * @brief Checks whether the specified LPTIM interrupt is set or not.
AnnaBridge 161:aa5281ff4a02 449 * @param __HANDLE__ : LPTIM handle.
AnnaBridge 161:aa5281ff4a02 450 * @param __INTERRUPT__ : LPTIM interrupt to check.
AnnaBridge 161:aa5281ff4a02 451 * This parameter can be a value of:
AnnaBridge 161:aa5281ff4a02 452 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 161:aa5281ff4a02 453 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 161:aa5281ff4a02 454 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 455 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 161:aa5281ff4a02 456 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 161:aa5281ff4a02 457 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 161:aa5281ff4a02 458 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 161:aa5281ff4a02 459 * @retval Interrupt status.
AnnaBridge 161:aa5281ff4a02 460 */
AnnaBridge 161:aa5281ff4a02 461
AnnaBridge 161:aa5281ff4a02 462 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
AnnaBridge 161:aa5281ff4a02 463
AnnaBridge 161:aa5281ff4a02 464 /** @brief LPTIM Option Register
AnnaBridge 161:aa5281ff4a02 465 * @param __HANDLE__: LPTIM handle
AnnaBridge 161:aa5281ff4a02 466 * @param __VALUE__: This parameter can be a value of :
AnnaBridge 161:aa5281ff4a02 467 * @arg LPTIM_OP_PAD_AF
AnnaBridge 161:aa5281ff4a02 468 * @arg LPTIM_OP_PAD_PA4
AnnaBridge 161:aa5281ff4a02 469 * @arg LPTIM_OP_PAD_PB9
AnnaBridge 161:aa5281ff4a02 470 * @arg LPTIM_OP_TIM_DAC
AnnaBridge 161:aa5281ff4a02 471 * @retval None
AnnaBridge 161:aa5281ff4a02 472 */
AnnaBridge 161:aa5281ff4a02 473 #define __HAL_LPTIM_OPTR_CONFIG(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->OR = (__VALUE__))
AnnaBridge 161:aa5281ff4a02 474
AnnaBridge 161:aa5281ff4a02 475 /**
AnnaBridge 161:aa5281ff4a02 476 * @brief Enable interrupt on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 477 * @retval None
AnnaBridge 161:aa5281ff4a02 478 */
AnnaBridge 161:aa5281ff4a02 479 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT() (EXTI->IMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 480
AnnaBridge 161:aa5281ff4a02 481 /**
AnnaBridge 161:aa5281ff4a02 482 * @brief Disable interrupt on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 483 * @retval None
AnnaBridge 161:aa5281ff4a02 484 */
AnnaBridge 161:aa5281ff4a02 485 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT() (EXTI->IMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 486
AnnaBridge 161:aa5281ff4a02 487 /**
AnnaBridge 161:aa5281ff4a02 488 * @brief Enable event on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 489 * @retval None.
AnnaBridge 161:aa5281ff4a02 490 */
AnnaBridge 161:aa5281ff4a02 491 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_EVENT() (EXTI->EMR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 492
AnnaBridge 161:aa5281ff4a02 493 /**
AnnaBridge 161:aa5281ff4a02 494 * @brief Disable event on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 495 * @retval None.
AnnaBridge 161:aa5281ff4a02 496 */
AnnaBridge 161:aa5281ff4a02 497 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_EVENT() (EXTI->EMR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 498
AnnaBridge 161:aa5281ff4a02 499 /**
AnnaBridge 161:aa5281ff4a02 500 * @brief Enable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 501 * @retval None.
AnnaBridge 161:aa5281ff4a02 502 */
AnnaBridge 161:aa5281ff4a02 503 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE() (EXTI->FTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 504
AnnaBridge 161:aa5281ff4a02 505 /**
AnnaBridge 161:aa5281ff4a02 506 * @brief Disable falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 507 * @retval None.
AnnaBridge 161:aa5281ff4a02 508 */
AnnaBridge 161:aa5281ff4a02 509 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE() (EXTI->FTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 510
AnnaBridge 161:aa5281ff4a02 511 /**
AnnaBridge 161:aa5281ff4a02 512 * @brief Enable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 513 * @retval None.
AnnaBridge 161:aa5281ff4a02 514 */
AnnaBridge 161:aa5281ff4a02 515 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE() (EXTI->RTSR |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 516
AnnaBridge 161:aa5281ff4a02 517 /**
AnnaBridge 161:aa5281ff4a02 518 * @brief Disable rising edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 519 * @retval None.
AnnaBridge 161:aa5281ff4a02 520 */
AnnaBridge 161:aa5281ff4a02 521 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE() (EXTI->RTSR &= ~(LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT))
AnnaBridge 161:aa5281ff4a02 522
AnnaBridge 161:aa5281ff4a02 523 /**
AnnaBridge 161:aa5281ff4a02 524 * @brief Enable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 525 * @retval None.
AnnaBridge 161:aa5281ff4a02 526 */
AnnaBridge 161:aa5281ff4a02 527 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE();\
AnnaBridge 161:aa5281ff4a02 528 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_FALLING_EDGE();\
AnnaBridge 161:aa5281ff4a02 529 }while(0U)
AnnaBridge 161:aa5281ff4a02 530
AnnaBridge 161:aa5281ff4a02 531 /**
AnnaBridge 161:aa5281ff4a02 532 * @brief Disable rising & falling edge trigger on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 533 * This parameter can be:
AnnaBridge 161:aa5281ff4a02 534 * @retval None.
AnnaBridge 161:aa5281ff4a02 535 */
AnnaBridge 161:aa5281ff4a02 536 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_FALLING_EDGE() do{__HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE();\
AnnaBridge 161:aa5281ff4a02 537 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_FALLING_EDGE();\
AnnaBridge 161:aa5281ff4a02 538 }while(0U)
AnnaBridge 161:aa5281ff4a02 539
AnnaBridge 161:aa5281ff4a02 540 /**
AnnaBridge 161:aa5281ff4a02 541 * @brief Check whether the LPTIM Wake-up Timer associated Exti line interrupt flag is set or not.
AnnaBridge 161:aa5281ff4a02 542 * @retval Line Status.
AnnaBridge 161:aa5281ff4a02 543 */
AnnaBridge 161:aa5281ff4a02 544 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GET_FLAG() (EXTI->PR & LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 545
AnnaBridge 161:aa5281ff4a02 546 /**
AnnaBridge 161:aa5281ff4a02 547 * @brief Clear the LPTIM Wake-up Timer associated Exti line flag.
AnnaBridge 161:aa5281ff4a02 548 * @retval None.
AnnaBridge 161:aa5281ff4a02 549 */
AnnaBridge 161:aa5281ff4a02 550 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG() (EXTI->PR = LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 551
AnnaBridge 161:aa5281ff4a02 552 /**
AnnaBridge 161:aa5281ff4a02 553 * @brief Generate a Software interrupt on the LPTIM Wake-up Timer associated Exti line.
AnnaBridge 161:aa5281ff4a02 554 * @retval None.
AnnaBridge 161:aa5281ff4a02 555 */
AnnaBridge 161:aa5281ff4a02 556 #define __HAL_LPTIM_WAKEUPTIMER_EXTI_GENERATE_SWIT() (EXTI->SWIER |= LPTIM_EXTI_LINE_WAKEUPTIMER_EVENT)
AnnaBridge 161:aa5281ff4a02 557
AnnaBridge 161:aa5281ff4a02 558 /**
AnnaBridge 161:aa5281ff4a02 559 * @}
AnnaBridge 161:aa5281ff4a02 560 */
AnnaBridge 161:aa5281ff4a02 561 /* Exported functions --------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 562 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
AnnaBridge 161:aa5281ff4a02 563 * @{
AnnaBridge 161:aa5281ff4a02 564 */
AnnaBridge 161:aa5281ff4a02 565
AnnaBridge 161:aa5281ff4a02 566 /* Initialization/de-initialization functions ********************************/
AnnaBridge 161:aa5281ff4a02 567 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 568 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 569
AnnaBridge 161:aa5281ff4a02 570 /* MSP functions *************************************************************/
AnnaBridge 161:aa5281ff4a02 571 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 572 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 573
AnnaBridge 161:aa5281ff4a02 574 /* Start/Stop operation functions *********************************************/
AnnaBridge 161:aa5281ff4a02 575 /* ################################# PWM Mode ################################*/
AnnaBridge 161:aa5281ff4a02 576 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 577 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 578 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 579 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 580 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 581 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 582
AnnaBridge 161:aa5281ff4a02 583 /* ############################# One Pulse Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 584 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 585 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 586 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 587 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 588 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 589 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 590
AnnaBridge 161:aa5281ff4a02 591 /* ############################## Set once Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 592 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 593 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 594 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 595 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 596 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 161:aa5281ff4a02 597 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 598
AnnaBridge 161:aa5281ff4a02 599 /* ############################### Encoder Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 600 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 601 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 602 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 603 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 604 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 605 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 606
AnnaBridge 161:aa5281ff4a02 607 /* ############################# Time out Mode ##############################*/
AnnaBridge 161:aa5281ff4a02 608 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 609 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
AnnaBridge 161:aa5281ff4a02 610 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 611 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 612 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
AnnaBridge 161:aa5281ff4a02 613 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 614
AnnaBridge 161:aa5281ff4a02 615 /* ############################## Counter Mode ###############################*/
AnnaBridge 161:aa5281ff4a02 616 /* Blocking mode: Polling */
AnnaBridge 161:aa5281ff4a02 617 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 618 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 619 /* Non-Blocking mode: Interrupt */
AnnaBridge 161:aa5281ff4a02 620 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 161:aa5281ff4a02 621 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 622
AnnaBridge 161:aa5281ff4a02 623 /* Reading operation functions ************************************************/
AnnaBridge 161:aa5281ff4a02 624 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 625 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 626 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 627
AnnaBridge 161:aa5281ff4a02 628 /* LPTIM IRQ functions *******************************************************/
AnnaBridge 161:aa5281ff4a02 629 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 630
AnnaBridge 161:aa5281ff4a02 631 /* CallBack functions ********************************************************/
AnnaBridge 161:aa5281ff4a02 632 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 633 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 634 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 635 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 636 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 637 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 638 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 639
AnnaBridge 161:aa5281ff4a02 640 /* Peripheral State functions ************************************************/
AnnaBridge 161:aa5281ff4a02 641 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 161:aa5281ff4a02 642
AnnaBridge 161:aa5281ff4a02 643 /**
AnnaBridge 161:aa5281ff4a02 644 * @}
AnnaBridge 161:aa5281ff4a02 645 */
AnnaBridge 161:aa5281ff4a02 646
AnnaBridge 161:aa5281ff4a02 647 /* Private types -------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 648 /** @defgroup LPTIM_Private_Types LPTIM Private Types
AnnaBridge 161:aa5281ff4a02 649 * @{
AnnaBridge 161:aa5281ff4a02 650 */
AnnaBridge 161:aa5281ff4a02 651
AnnaBridge 161:aa5281ff4a02 652 /**
AnnaBridge 161:aa5281ff4a02 653 * @}
AnnaBridge 161:aa5281ff4a02 654 */
AnnaBridge 161:aa5281ff4a02 655
AnnaBridge 161:aa5281ff4a02 656 /* Private variables ---------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 657 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables
AnnaBridge 161:aa5281ff4a02 658 * @{
AnnaBridge 161:aa5281ff4a02 659 */
AnnaBridge 161:aa5281ff4a02 660
AnnaBridge 161:aa5281ff4a02 661 /**
AnnaBridge 161:aa5281ff4a02 662 * @}
AnnaBridge 161:aa5281ff4a02 663 */
AnnaBridge 161:aa5281ff4a02 664
AnnaBridge 161:aa5281ff4a02 665 /* Private constants ---------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 666 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants
AnnaBridge 161:aa5281ff4a02 667 * @{
AnnaBridge 161:aa5281ff4a02 668 */
AnnaBridge 161:aa5281ff4a02 669
AnnaBridge 161:aa5281ff4a02 670 /**
AnnaBridge 161:aa5281ff4a02 671 * @}
AnnaBridge 161:aa5281ff4a02 672 */
AnnaBridge 161:aa5281ff4a02 673
AnnaBridge 161:aa5281ff4a02 674 /* Private macros ------------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 675 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros
AnnaBridge 161:aa5281ff4a02 676 * @{
AnnaBridge 161:aa5281ff4a02 677 */
AnnaBridge 161:aa5281ff4a02 678
AnnaBridge 161:aa5281ff4a02 679 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
AnnaBridge 161:aa5281ff4a02 680 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
AnnaBridge 161:aa5281ff4a02 681
AnnaBridge 161:aa5281ff4a02 682 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \
AnnaBridge 161:aa5281ff4a02 683 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
AnnaBridge 161:aa5281ff4a02 684 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
AnnaBridge 161:aa5281ff4a02 685 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
AnnaBridge 161:aa5281ff4a02 686 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
AnnaBridge 161:aa5281ff4a02 687 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
AnnaBridge 161:aa5281ff4a02 688 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
AnnaBridge 161:aa5281ff4a02 689 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
AnnaBridge 161:aa5281ff4a02 690 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
AnnaBridge 161:aa5281ff4a02 691
AnnaBridge 161:aa5281ff4a02 692 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
AnnaBridge 161:aa5281ff4a02 693 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
AnnaBridge 161:aa5281ff4a02 694
AnnaBridge 161:aa5281ff4a02 695 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
AnnaBridge 161:aa5281ff4a02 696 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
AnnaBridge 161:aa5281ff4a02 697 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
AnnaBridge 161:aa5281ff4a02 698 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
AnnaBridge 161:aa5281ff4a02 699
AnnaBridge 161:aa5281ff4a02 700 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \
AnnaBridge 161:aa5281ff4a02 701 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
AnnaBridge 161:aa5281ff4a02 702 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
AnnaBridge 161:aa5281ff4a02 703
AnnaBridge 161:aa5281ff4a02 704 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
AnnaBridge 161:aa5281ff4a02 705 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
AnnaBridge 161:aa5281ff4a02 706 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
AnnaBridge 161:aa5281ff4a02 707 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
AnnaBridge 161:aa5281ff4a02 708 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
AnnaBridge 161:aa5281ff4a02 709 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
AnnaBridge 161:aa5281ff4a02 710 ((__TRIG__) == LPTIM_TRIGSOURCE_5))
AnnaBridge 161:aa5281ff4a02 711
AnnaBridge 161:aa5281ff4a02 712 #define IS_LPTIM_EXT_TRG_POLARITY(__POLAR__) (((__POLAR__) == LPTIM_ACTIVEEDGE_RISING ) || \
AnnaBridge 161:aa5281ff4a02 713 ((__POLAR__) == LPTIM_ACTIVEEDGE_FALLING ) || \
AnnaBridge 161:aa5281ff4a02 714 ((__POLAR__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
AnnaBridge 161:aa5281ff4a02 715
AnnaBridge 161:aa5281ff4a02 716 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \
AnnaBridge 161:aa5281ff4a02 717 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
AnnaBridge 161:aa5281ff4a02 718 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
AnnaBridge 161:aa5281ff4a02 719 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
AnnaBridge 161:aa5281ff4a02 720
AnnaBridge 161:aa5281ff4a02 721 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
AnnaBridge 161:aa5281ff4a02 722 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
AnnaBridge 161:aa5281ff4a02 723
AnnaBridge 161:aa5281ff4a02 724 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
AnnaBridge 161:aa5281ff4a02 725 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
AnnaBridge 161:aa5281ff4a02 726
AnnaBridge 161:aa5281ff4a02 727 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 728
AnnaBridge 161:aa5281ff4a02 729 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 730
AnnaBridge 161:aa5281ff4a02 731 #define IS_LPTIM_PERIOD(PERIOD) ((PERIOD) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 732
AnnaBridge 161:aa5281ff4a02 733 #define IS_LPTIM_PULSE(PULSE) ((PULSE) <= 0x0000FFFFU)
AnnaBridge 161:aa5281ff4a02 734
AnnaBridge 161:aa5281ff4a02 735 /**
AnnaBridge 161:aa5281ff4a02 736 * @}
AnnaBridge 161:aa5281ff4a02 737 */
AnnaBridge 161:aa5281ff4a02 738
AnnaBridge 161:aa5281ff4a02 739 /* Private functions ---------------------------------------------------------*/
AnnaBridge 161:aa5281ff4a02 740 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
AnnaBridge 161:aa5281ff4a02 741 * @{
AnnaBridge 161:aa5281ff4a02 742 */
AnnaBridge 161:aa5281ff4a02 743
AnnaBridge 161:aa5281ff4a02 744 /**
AnnaBridge 161:aa5281ff4a02 745 * @}
AnnaBridge 161:aa5281ff4a02 746 */
AnnaBridge 161:aa5281ff4a02 747
AnnaBridge 161:aa5281ff4a02 748 /**
AnnaBridge 161:aa5281ff4a02 749 * @}
AnnaBridge 161:aa5281ff4a02 750 */
AnnaBridge 161:aa5281ff4a02 751
AnnaBridge 161:aa5281ff4a02 752 /**
AnnaBridge 161:aa5281ff4a02 753 * @}
AnnaBridge 161:aa5281ff4a02 754 */
AnnaBridge 161:aa5281ff4a02 755
AnnaBridge 161:aa5281ff4a02 756 #endif /* STM32F410Tx || STM32F410Cx || STM32F410Rx || STM32F413xx || STM32F423xx */
AnnaBridge 161:aa5281ff4a02 757 #ifdef __cplusplus
AnnaBridge 161:aa5281ff4a02 758 }
AnnaBridge 161:aa5281ff4a02 759 #endif
AnnaBridge 161:aa5281ff4a02 760
AnnaBridge 161:aa5281ff4a02 761 #endif /* __STM32F4xx_HAL_LPTIM_H */
AnnaBridge 161:aa5281ff4a02 762
AnnaBridge 161:aa5281ff4a02 763 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/