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TARGET_EFM32PG12_STK3402/TOOLCHAIN_GCC_ARM/em_usart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_usart.h
Anna Bridge 142:4eea097334d6 3 * @brief Universal synchronous/asynchronous receiver/transmitter (USART/UART)
Anna Bridge 142:4eea097334d6 4 * peripheral API
Anna Bridge 160:5571c4ff569f 5 * @version 5.3.3
Anna Bridge 142:4eea097334d6 6 *******************************************************************************
Anna Bridge 160:5571c4ff569f 7 * # License
Anna Bridge 142:4eea097334d6 8 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 9 *******************************************************************************
Anna Bridge 142:4eea097334d6 10 *
Anna Bridge 142:4eea097334d6 11 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 12 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 13 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 14 *
Anna Bridge 142:4eea097334d6 15 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 16 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 17 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 18 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 19 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 20 *
Anna Bridge 142:4eea097334d6 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 22 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 23 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 24 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 25 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 26 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 27 *
Anna Bridge 142:4eea097334d6 28 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 29 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 30 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 31 *
Anna Bridge 142:4eea097334d6 32 ******************************************************************************/
Anna Bridge 142:4eea097334d6 33
Anna Bridge 142:4eea097334d6 34 #ifndef EM_USART_H
Anna Bridge 142:4eea097334d6 35 #define EM_USART_H
Anna Bridge 142:4eea097334d6 36
Anna Bridge 142:4eea097334d6 37 #include "em_device.h"
Anna Bridge 142:4eea097334d6 38 #if defined(USART_COUNT) && (USART_COUNT > 0)
Anna Bridge 142:4eea097334d6 39
Anna Bridge 142:4eea097334d6 40 #include <stdbool.h>
Anna Bridge 142:4eea097334d6 41
Anna Bridge 142:4eea097334d6 42 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 43 extern "C" {
Anna Bridge 142:4eea097334d6 44 #endif
Anna Bridge 142:4eea097334d6 45
Anna Bridge 142:4eea097334d6 46 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 47 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 48 * @{
Anna Bridge 142:4eea097334d6 49 ******************************************************************************/
Anna Bridge 142:4eea097334d6 50
Anna Bridge 142:4eea097334d6 51 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 52 * @addtogroup USART
Anna Bridge 142:4eea097334d6 53 * @brief Universal Synchronous/Asynchronous Receiver/Transmitter
Anna Bridge 142:4eea097334d6 54 * Peripheral API
Anna Bridge 142:4eea097334d6 55 * @details
Anna Bridge 142:4eea097334d6 56 * The Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
Anna Bridge 142:4eea097334d6 57 * is a very flexible serial I/O module. It supports full duplex asynchronous UART
Anna Bridge 142:4eea097334d6 58 * communication as well as RS-485, SPI, MicroWire and 3-wire. It can also interface
Anna Bridge 142:4eea097334d6 59 * with ISO7816 Smart-Cards, and IrDA devices.
Anna Bridge 142:4eea097334d6 60 *
Anna Bridge 142:4eea097334d6 61 * The USART has a wide selection of operating modes, frame formats and baud rates.
Anna Bridge 142:4eea097334d6 62 * All features are supported through the API of this module.
Anna Bridge 142:4eea097334d6 63 *
Anna Bridge 142:4eea097334d6 64 * Triple buffering and DMA support makes high data-rates possible with minimal
Anna Bridge 142:4eea097334d6 65 * CPU intervention and it is possible to transmit and receive large frames while
Anna Bridge 142:4eea097334d6 66 * the MCU remains in EM1 Sleep.
Anna Bridge 142:4eea097334d6 67 *
Anna Bridge 142:4eea097334d6 68 * This module does not support DMA configuration. The @ref UARTDRV and @ref SPIDRV drivers
Anna Bridge 142:4eea097334d6 69 * provide full support for DMA and more.
Anna Bridge 142:4eea097334d6 70 *
Anna Bridge 142:4eea097334d6 71 * The following steps are necessary for basic operation:
Anna Bridge 142:4eea097334d6 72 *
Anna Bridge 142:4eea097334d6 73 * Clock enable:
Anna Bridge 142:4eea097334d6 74 * @include em_usart_clock_enable.c
Anna Bridge 142:4eea097334d6 75 *
Anna Bridge 142:4eea097334d6 76 * To initialize the USART for asynchronous operation (eg. UART):
Anna Bridge 142:4eea097334d6 77 * @include em_usart_init_async.c
Anna Bridge 142:4eea097334d6 78 *
Anna Bridge 142:4eea097334d6 79 * To initialize the USART for synchronous operation (eg. SPI):
Anna Bridge 142:4eea097334d6 80 * @include em_usart_init_sync.c
Anna Bridge 142:4eea097334d6 81 *
Anna Bridge 142:4eea097334d6 82 * After pins are assigned for the application/board, enable pins at the
Anna Bridge 142:4eea097334d6 83 * desired location. Available locations can be obtained from the Pin Definitions
Anna Bridge 142:4eea097334d6 84 * section in the datasheet.
Anna Bridge 142:4eea097334d6 85 * @if DOXYDOC_P1_DEVICE
Anna Bridge 142:4eea097334d6 86 * @include em_usart_route_p1.c
Anna Bridge 142:4eea097334d6 87 * @note UART hardware flow control is not directly supported in hardware on
Anna Bridge 142:4eea097334d6 88 * @ref _SILICON_LABS_32B_SERIES_0 parts.
Anna Bridge 142:4eea097334d6 89 * @endif
Anna Bridge 142:4eea097334d6 90 * @if DOXYDOC_P2_DEVICE
Anna Bridge 142:4eea097334d6 91 * @include em_usart_route_p2.c
Anna Bridge 142:4eea097334d6 92 * @endif
Anna Bridge 142:4eea097334d6 93 * @note @ref UARTDRV supports all types of UART flow control. Software assisted
Anna Bridge 142:4eea097334d6 94 * hardware flow control is available for parts without true UART hardware
Anna Bridge 142:4eea097334d6 95 * flow control.
Anna Bridge 142:4eea097334d6 96 * @{
Anna Bridge 142:4eea097334d6 97 ******************************************************************************/
Anna Bridge 142:4eea097334d6 98
Anna Bridge 142:4eea097334d6 99 /*******************************************************************************
Anna Bridge 142:4eea097334d6 100 ******************************** ENUMS ************************************
Anna Bridge 142:4eea097334d6 101 ******************************************************************************/
Anna Bridge 142:4eea097334d6 102
Anna Bridge 142:4eea097334d6 103 /** Databit selection. */
Anna Bridge 160:5571c4ff569f 104 typedef enum {
Anna Bridge 142:4eea097334d6 105 usartDatabits4 = USART_FRAME_DATABITS_FOUR, /**< 4 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 106 usartDatabits5 = USART_FRAME_DATABITS_FIVE, /**< 5 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 107 usartDatabits6 = USART_FRAME_DATABITS_SIX, /**< 6 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 108 usartDatabits7 = USART_FRAME_DATABITS_SEVEN, /**< 7 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 109 usartDatabits8 = USART_FRAME_DATABITS_EIGHT, /**< 8 databits. */
Anna Bridge 142:4eea097334d6 110 usartDatabits9 = USART_FRAME_DATABITS_NINE, /**< 9 databits. */
Anna Bridge 142:4eea097334d6 111 usartDatabits10 = USART_FRAME_DATABITS_TEN, /**< 10 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 112 usartDatabits11 = USART_FRAME_DATABITS_ELEVEN, /**< 11 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 113 usartDatabits12 = USART_FRAME_DATABITS_TWELVE, /**< 12 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 114 usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN, /**< 13 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 115 usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN, /**< 14 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 116 usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN, /**< 15 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 117 usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN /**< 16 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 118 } USART_Databits_TypeDef;
Anna Bridge 142:4eea097334d6 119
Anna Bridge 142:4eea097334d6 120 /** Enable selection. */
Anna Bridge 160:5571c4ff569f 121 typedef enum {
Anna Bridge 142:4eea097334d6 122 /** Disable both receiver and transmitter. */
Anna Bridge 142:4eea097334d6 123 usartDisable = 0x0,
Anna Bridge 142:4eea097334d6 124
Anna Bridge 142:4eea097334d6 125 /** Enable receiver only, transmitter disabled. */
Anna Bridge 142:4eea097334d6 126 usartEnableRx = USART_CMD_RXEN,
Anna Bridge 142:4eea097334d6 127
Anna Bridge 142:4eea097334d6 128 /** Enable transmitter only, receiver disabled. */
Anna Bridge 142:4eea097334d6 129 usartEnableTx = USART_CMD_TXEN,
Anna Bridge 142:4eea097334d6 130
Anna Bridge 142:4eea097334d6 131 /** Enable both receiver and transmitter. */
Anna Bridge 142:4eea097334d6 132 usartEnable = (USART_CMD_RXEN | USART_CMD_TXEN)
Anna Bridge 142:4eea097334d6 133 } USART_Enable_TypeDef;
Anna Bridge 142:4eea097334d6 134
Anna Bridge 142:4eea097334d6 135 /** Oversampling selection, used for asynchronous operation. */
Anna Bridge 160:5571c4ff569f 136 typedef enum {
Anna Bridge 142:4eea097334d6 137 usartOVS16 = USART_CTRL_OVS_X16, /**< 16x oversampling (normal). */
Anna Bridge 142:4eea097334d6 138 usartOVS8 = USART_CTRL_OVS_X8, /**< 8x oversampling. */
Anna Bridge 142:4eea097334d6 139 usartOVS6 = USART_CTRL_OVS_X6, /**< 6x oversampling. */
Anna Bridge 142:4eea097334d6 140 usartOVS4 = USART_CTRL_OVS_X4 /**< 4x oversampling. */
Anna Bridge 142:4eea097334d6 141 } USART_OVS_TypeDef;
Anna Bridge 142:4eea097334d6 142
Anna Bridge 142:4eea097334d6 143 /** Parity selection, mainly used for asynchronous operation. */
Anna Bridge 160:5571c4ff569f 144 typedef enum {
Anna Bridge 142:4eea097334d6 145 usartNoParity = USART_FRAME_PARITY_NONE, /**< No parity. */
Anna Bridge 142:4eea097334d6 146 usartEvenParity = USART_FRAME_PARITY_EVEN, /**< Even parity. */
Anna Bridge 142:4eea097334d6 147 usartOddParity = USART_FRAME_PARITY_ODD /**< Odd parity. */
Anna Bridge 142:4eea097334d6 148 } USART_Parity_TypeDef;
Anna Bridge 142:4eea097334d6 149
Anna Bridge 142:4eea097334d6 150 /** Stopbits selection, used for asynchronous operation. */
Anna Bridge 160:5571c4ff569f 151 typedef enum {
Anna Bridge 142:4eea097334d6 152 usartStopbits0p5 = USART_FRAME_STOPBITS_HALF, /**< 0.5 stopbits. */
Anna Bridge 142:4eea097334d6 153 usartStopbits1 = USART_FRAME_STOPBITS_ONE, /**< 1 stopbits. */
Anna Bridge 142:4eea097334d6 154 usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF, /**< 1.5 stopbits. */
Anna Bridge 142:4eea097334d6 155 usartStopbits2 = USART_FRAME_STOPBITS_TWO /**< 2 stopbits. */
Anna Bridge 142:4eea097334d6 156 } USART_Stopbits_TypeDef;
Anna Bridge 142:4eea097334d6 157
Anna Bridge 160:5571c4ff569f 158 #if defined(_USART_ROUTEPEN_RTSPEN_MASK) && defined(_USART_ROUTEPEN_CTSPEN_MASK)
Anna Bridge 160:5571c4ff569f 159 typedef enum {
Anna Bridge 160:5571c4ff569f 160 usartHwFlowControlNone = 0,
Anna Bridge 160:5571c4ff569f 161 usartHwFlowControlCts = USART_ROUTEPEN_CTSPEN,
Anna Bridge 160:5571c4ff569f 162 usartHwFlowControlRts = USART_ROUTEPEN_RTSPEN,
Anna Bridge 160:5571c4ff569f 163 usartHwFlowControlCtsAndRts = USART_ROUTEPEN_CTSPEN | USART_ROUTEPEN_RTSPEN,
Anna Bridge 160:5571c4ff569f 164 } USART_HwFlowControl_TypeDef;
Anna Bridge 160:5571c4ff569f 165 #endif
Anna Bridge 142:4eea097334d6 166
Anna Bridge 142:4eea097334d6 167 /** Clock polarity/phase mode. */
Anna Bridge 160:5571c4ff569f 168 typedef enum {
Anna Bridge 142:4eea097334d6 169 /** Clock idle low, sample on rising edge. */
Anna Bridge 142:4eea097334d6 170 usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,
Anna Bridge 142:4eea097334d6 171
Anna Bridge 142:4eea097334d6 172 /** Clock idle low, sample on falling edge. */
Anna Bridge 142:4eea097334d6 173 usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,
Anna Bridge 142:4eea097334d6 174
Anna Bridge 142:4eea097334d6 175 /** Clock idle high, sample on falling edge. */
Anna Bridge 142:4eea097334d6 176 usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,
Anna Bridge 142:4eea097334d6 177
Anna Bridge 142:4eea097334d6 178 /** Clock idle high, sample on rising edge. */
Anna Bridge 142:4eea097334d6 179 usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
Anna Bridge 142:4eea097334d6 180 } USART_ClockMode_TypeDef;
Anna Bridge 142:4eea097334d6 181
Anna Bridge 142:4eea097334d6 182 /** Pulse width selection for IrDA mode. */
Anna Bridge 160:5571c4ff569f 183 typedef enum {
Anna Bridge 142:4eea097334d6 184 /** IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 185 usartIrDAPwONE = USART_IRCTRL_IRPW_ONE,
Anna Bridge 142:4eea097334d6 186
Anna Bridge 142:4eea097334d6 187 /** IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 188 usartIrDAPwTWO = USART_IRCTRL_IRPW_TWO,
Anna Bridge 142:4eea097334d6 189
Anna Bridge 142:4eea097334d6 190 /** IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 191 usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,
Anna Bridge 142:4eea097334d6 192
Anna Bridge 142:4eea097334d6 193 /** IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 194 usartIrDAPwFOUR = USART_IRCTRL_IRPW_FOUR
Anna Bridge 142:4eea097334d6 195 } USART_IrDAPw_Typedef;
Anna Bridge 142:4eea097334d6 196
Anna Bridge 142:4eea097334d6 197 /** PRS channel selection for IrDA mode. */
Anna Bridge 160:5571c4ff569f 198 typedef enum {
Anna Bridge 142:4eea097334d6 199 usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0, /**< PRS channel 0 */
Anna Bridge 142:4eea097334d6 200 usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1, /**< PRS channel 1 */
Anna Bridge 142:4eea097334d6 201 usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2, /**< PRS channel 2 */
Anna Bridge 142:4eea097334d6 202 usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3, /**< PRS channel 3 */
Anna Bridge 142:4eea097334d6 203 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH4)
Anna Bridge 142:4eea097334d6 204 usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4, /**< PRS channel 4 */
Anna Bridge 142:4eea097334d6 205 #endif
Anna Bridge 142:4eea097334d6 206 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH5)
Anna Bridge 142:4eea097334d6 207 usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5, /**< PRS channel 5 */
Anna Bridge 142:4eea097334d6 208 #endif
Anna Bridge 142:4eea097334d6 209 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH6)
Anna Bridge 142:4eea097334d6 210 usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6, /**< PRS channel 6 */
Anna Bridge 142:4eea097334d6 211 #endif
Anna Bridge 142:4eea097334d6 212 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH7)
Anna Bridge 142:4eea097334d6 213 usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7, /**< PRS channel 7 */
Anna Bridge 142:4eea097334d6 214 #endif
Anna Bridge 142:4eea097334d6 215 } USART_IrDAPrsSel_Typedef;
Anna Bridge 142:4eea097334d6 216
Anna Bridge 142:4eea097334d6 217 #if defined(_USART_I2SCTRL_MASK)
Anna Bridge 142:4eea097334d6 218 /** I2S format selection. */
Anna Bridge 160:5571c4ff569f 219 typedef enum {
Anna Bridge 142:4eea097334d6 220 usartI2sFormatW32D32 = USART_I2SCTRL_FORMAT_W32D32, /**< 32-bit word, 32-bit data */
Anna Bridge 142:4eea097334d6 221 usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M, /**< 32-bit word, 32-bit data with 8 lsb masked */
Anna Bridge 142:4eea097334d6 222 usartI2sFormatW32D24 = USART_I2SCTRL_FORMAT_W32D24, /**< 32-bit word, 24-bit data */
Anna Bridge 142:4eea097334d6 223 usartI2sFormatW32D16 = USART_I2SCTRL_FORMAT_W32D16, /**< 32-bit word, 16-bit data */
Anna Bridge 142:4eea097334d6 224 usartI2sFormatW32D8 = USART_I2SCTRL_FORMAT_W32D8, /**< 32-bit word, 8-bit data */
Anna Bridge 142:4eea097334d6 225 usartI2sFormatW16D16 = USART_I2SCTRL_FORMAT_W16D16, /**< 16-bit word, 16-bit data */
Anna Bridge 142:4eea097334d6 226 usartI2sFormatW16D8 = USART_I2SCTRL_FORMAT_W16D8, /**< 16-bit word, 8-bit data */
Anna Bridge 142:4eea097334d6 227 usartI2sFormatW8D8 = USART_I2SCTRL_FORMAT_W8D8 /**< 8-bit word, 8-bit data */
Anna Bridge 142:4eea097334d6 228 } USART_I2sFormat_TypeDef;
Anna Bridge 142:4eea097334d6 229
Anna Bridge 142:4eea097334d6 230 /** I2S frame data justify. */
Anna Bridge 160:5571c4ff569f 231 typedef enum {
Anna Bridge 142:4eea097334d6 232 usartI2sJustifyLeft = USART_I2SCTRL_JUSTIFY_LEFT, /**< Data is left-justified within the frame */
Anna Bridge 142:4eea097334d6 233 usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT /**< Data is right-justified within the frame */
Anna Bridge 142:4eea097334d6 234 } USART_I2sJustify_TypeDef;
Anna Bridge 142:4eea097334d6 235 #endif
Anna Bridge 142:4eea097334d6 236
Anna Bridge 142:4eea097334d6 237 #if defined(_USART_INPUT_MASK)
Anna Bridge 142:4eea097334d6 238 /** USART Rx input PRS selection. */
Anna Bridge 160:5571c4ff569f 239 typedef enum {
Anna Bridge 142:4eea097334d6 240 usartPrsRxCh0 = USART_INPUT_RXPRSSEL_PRSCH0, /**< PRSCH0 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 241 usartPrsRxCh1 = USART_INPUT_RXPRSSEL_PRSCH1, /**< PRSCH1 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 242 usartPrsRxCh2 = USART_INPUT_RXPRSSEL_PRSCH2, /**< PRSCH2 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 243 usartPrsRxCh3 = USART_INPUT_RXPRSSEL_PRSCH3, /**< PRSCH3 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 244
Anna Bridge 142:4eea097334d6 245 #if defined(USART_INPUT_RXPRSSEL_PRSCH7)
Anna Bridge 142:4eea097334d6 246 usartPrsRxCh4 = USART_INPUT_RXPRSSEL_PRSCH4, /**< PRSCH4 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 247 usartPrsRxCh5 = USART_INPUT_RXPRSSEL_PRSCH5, /**< PRSCH5 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 248 usartPrsRxCh6 = USART_INPUT_RXPRSSEL_PRSCH6, /**< PRSCH6 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 249 usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7, /**< PRSCH7 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 250 #endif
Anna Bridge 142:4eea097334d6 251
Anna Bridge 142:4eea097334d6 252 #if defined(USART_INPUT_RXPRSSEL_PRSCH11)
Anna Bridge 142:4eea097334d6 253 usartPrsRxCh8 = USART_INPUT_RXPRSSEL_PRSCH8, /**< PRSCH8 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 254 usartPrsRxCh9 = USART_INPUT_RXPRSSEL_PRSCH9, /**< PRSCH9 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 255 usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10, /**< PRSCH10 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 256 usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11 /**< PRSCH11 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 257 #endif
Anna Bridge 142:4eea097334d6 258 } USART_PrsRxCh_TypeDef;
Anna Bridge 142:4eea097334d6 259 #endif
Anna Bridge 142:4eea097334d6 260
Anna Bridge 142:4eea097334d6 261 /** USART PRS Transmit Trigger Channels */
Anna Bridge 160:5571c4ff569f 262 typedef enum {
Anna Bridge 142:4eea097334d6 263 usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 264 usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 265 usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 266 usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 267
Anna Bridge 142:4eea097334d6 268 #if defined(USART_TRIGCTRL_TSEL_PRSCH7)
Anna Bridge 142:4eea097334d6 269 usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 270 usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 271 usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 272 usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 273 #endif
Anna Bridge 142:4eea097334d6 274 } USART_PrsTriggerCh_TypeDef;
Anna Bridge 142:4eea097334d6 275
Anna Bridge 142:4eea097334d6 276 /*******************************************************************************
Anna Bridge 142:4eea097334d6 277 ******************************* STRUCTS ***********************************
Anna Bridge 142:4eea097334d6 278 ******************************************************************************/
Anna Bridge 142:4eea097334d6 279
Anna Bridge 142:4eea097334d6 280 /** Asynchronous mode init structure. */
Anna Bridge 160:5571c4ff569f 281 typedef struct {
Anna Bridge 142:4eea097334d6 282 /** Specifies whether TX and/or RX shall be enabled when init completed. */
Anna Bridge 142:4eea097334d6 283 USART_Enable_TypeDef enable;
Anna Bridge 142:4eea097334d6 284
Anna Bridge 142:4eea097334d6 285 /**
Anna Bridge 142:4eea097334d6 286 * USART/UART reference clock assumed when configuring baudrate setup. Set
Anna Bridge 142:4eea097334d6 287 * it to 0 if currently configurated reference clock shall be used.
Anna Bridge 142:4eea097334d6 288 */
Anna Bridge 142:4eea097334d6 289 uint32_t refFreq;
Anna Bridge 142:4eea097334d6 290
Anna Bridge 142:4eea097334d6 291 /** Desired baudrate. */
Anna Bridge 142:4eea097334d6 292 uint32_t baudrate;
Anna Bridge 142:4eea097334d6 293
Anna Bridge 142:4eea097334d6 294 /** Oversampling used. */
Anna Bridge 142:4eea097334d6 295 USART_OVS_TypeDef oversampling;
Anna Bridge 142:4eea097334d6 296
Anna Bridge 142:4eea097334d6 297 /** Number of databits in frame. Notice that UART modules only support 8 or
Anna Bridge 142:4eea097334d6 298 * 9 databits. */
Anna Bridge 142:4eea097334d6 299 USART_Databits_TypeDef databits;
Anna Bridge 142:4eea097334d6 300
Anna Bridge 142:4eea097334d6 301 /** Parity mode to use. */
Anna Bridge 142:4eea097334d6 302 USART_Parity_TypeDef parity;
Anna Bridge 142:4eea097334d6 303
Anna Bridge 142:4eea097334d6 304 /** Number of stopbits to use. */
Anna Bridge 142:4eea097334d6 305 USART_Stopbits_TypeDef stopbits;
Anna Bridge 142:4eea097334d6 306
Anna Bridge 142:4eea097334d6 307 #if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 142:4eea097334d6 308 /** Majority Vote Disable for 16x, 8x and 6x oversampling modes. */
Anna Bridge 142:4eea097334d6 309 bool mvdis;
Anna Bridge 142:4eea097334d6 310
Anna Bridge 142:4eea097334d6 311 /** Enable USART Rx via PRS. */
Anna Bridge 142:4eea097334d6 312 bool prsRxEnable;
Anna Bridge 142:4eea097334d6 313
Anna Bridge 142:4eea097334d6 314 /** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
Anna Bridge 142:4eea097334d6 315 USART_PrsRxCh_TypeDef prsRxCh;
Anna Bridge 142:4eea097334d6 316 #endif
Anna Bridge 142:4eea097334d6 317 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 318 /** Auto CS enabling */
Anna Bridge 142:4eea097334d6 319 bool autoCsEnable;
Anna Bridge 142:4eea097334d6 320 /** Auto CS hold time in baud cycles */
Anna Bridge 142:4eea097334d6 321 uint8_t autoCsHold;
Anna Bridge 142:4eea097334d6 322 /** Auto CS setup time in baud cycles */
Anna Bridge 142:4eea097334d6 323 uint8_t autoCsSetup;
Anna Bridge 142:4eea097334d6 324 #endif
Anna Bridge 160:5571c4ff569f 325 #if defined(_USART_ROUTEPEN_RTSPEN_MASK) && defined(_USART_ROUTEPEN_CTSPEN_MASK)
Anna Bridge 160:5571c4ff569f 326 USART_HwFlowControl_TypeDef hwFlowControl;
Anna Bridge 160:5571c4ff569f 327 #endif
Anna Bridge 142:4eea097334d6 328 } USART_InitAsync_TypeDef;
Anna Bridge 142:4eea097334d6 329
Anna Bridge 142:4eea097334d6 330 /** USART PRS trigger enable */
Anna Bridge 160:5571c4ff569f 331 typedef struct {
Anna Bridge 142:4eea097334d6 332 #if defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 333 /** Enable AUTOTX */
Anna Bridge 142:4eea097334d6 334 bool autoTxTriggerEnable;
Anna Bridge 142:4eea097334d6 335 #endif
Anna Bridge 142:4eea097334d6 336 /** Trigger receive via PRS channel */
Anna Bridge 142:4eea097334d6 337 bool rxTriggerEnable;
Anna Bridge 142:4eea097334d6 338 /** Trigger transmit via PRS channel */
Anna Bridge 142:4eea097334d6 339 bool txTriggerEnable;
Anna Bridge 142:4eea097334d6 340 /** PRS channel to be used to trigger auto transmission */
Anna Bridge 142:4eea097334d6 341 USART_PrsTriggerCh_TypeDef prsTriggerChannel;
Anna Bridge 142:4eea097334d6 342 } USART_PrsTriggerInit_TypeDef;
Anna Bridge 142:4eea097334d6 343
Anna Bridge 142:4eea097334d6 344 /** Default config for USART async init structure. */
Anna Bridge 160:5571c4ff569f 345 #if defined(_USART_ROUTEPEN_RTSPEN_MASK) && defined(_USART_ROUTEPEN_CTSPEN_MASK)
Anna Bridge 142:4eea097334d6 346 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 347 #define USART_INITASYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 348 { \
Anna Bridge 160:5571c4ff569f 349 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 350 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 351 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 352 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 353 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 354 usartNoParity, /* No parity. */ \
Anna Bridge 160:5571c4ff569f 355 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 356 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 357 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 358 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 359 false, /* Auto CS functionality enable/disable switch */ \
Anna Bridge 160:5571c4ff569f 360 0, /* Auto CS Hold cycles */ \
Anna Bridge 160:5571c4ff569f 361 0, /* Auto CS Setup cycles */ \
Anna Bridge 160:5571c4ff569f 362 usartHwFlowControlNone /* No HW flow control */ \
Anna Bridge 160:5571c4ff569f 363 }
Anna Bridge 142:4eea097334d6 364 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 365 #define USART_INITASYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 366 { \
Anna Bridge 160:5571c4ff569f 367 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 368 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 369 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 370 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 371 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 372 usartNoParity, /* No parity. */ \
Anna Bridge 160:5571c4ff569f 373 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 374 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 375 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 376 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 377 usartHwFlowControlNone /* No HW flow control */ \
Anna Bridge 160:5571c4ff569f 378 }
Anna Bridge 160:5571c4ff569f 379 #else
Anna Bridge 160:5571c4ff569f 380 #define USART_INITASYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 381 { \
Anna Bridge 160:5571c4ff569f 382 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 383 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 384 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 385 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 386 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 387 usartNoParity, /* No parity. */ \
Anna Bridge 160:5571c4ff569f 388 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 389 usartHwFlowControlNone /* No HW flow control */ \
Anna Bridge 160:5571c4ff569f 390 }
Anna Bridge 160:5571c4ff569f 391 #endif
Anna Bridge 142:4eea097334d6 392 #else
Anna Bridge 160:5571c4ff569f 393 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 394 #define USART_INITASYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 395 { \
Anna Bridge 160:5571c4ff569f 396 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 397 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 398 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 399 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 400 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 401 usartNoParity, /* No parity. */ \
Anna Bridge 160:5571c4ff569f 402 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 403 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 404 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 405 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 406 false, /* Auto CS functionality enable/disable switch */ \
Anna Bridge 160:5571c4ff569f 407 0, /* Auto CS Hold cycles */ \
Anna Bridge 160:5571c4ff569f 408 0 /* Auto CS Setup cycles */ \
Anna Bridge 160:5571c4ff569f 409 }
Anna Bridge 160:5571c4ff569f 410 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 411 #define USART_INITASYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 412 { \
Anna Bridge 160:5571c4ff569f 413 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 414 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 415 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 416 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 417 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 418 usartNoParity, /* No parity. */ \
Anna Bridge 160:5571c4ff569f 419 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 420 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 421 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 422 usartPrsRxCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 423 }
Anna Bridge 160:5571c4ff569f 424 #else
Anna Bridge 160:5571c4ff569f 425 #define USART_INITASYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 426 { \
Anna Bridge 160:5571c4ff569f 427 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 428 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 429 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 430 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 431 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 432 usartNoParity, /* No parity. */ \
Anna Bridge 160:5571c4ff569f 433 usartStopbits1 /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 434 }
Anna Bridge 160:5571c4ff569f 435 #endif
Anna Bridge 142:4eea097334d6 436 #endif
Anna Bridge 142:4eea097334d6 437
Anna Bridge 142:4eea097334d6 438 /** Default config for USART PRS triggering structure. */
Anna Bridge 142:4eea097334d6 439 #if defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 160:5571c4ff569f 440 #define USART_INITPRSTRIGGER_DEFAULT \
Anna Bridge 160:5571c4ff569f 441 { \
Anna Bridge 160:5571c4ff569f 442 false, /* Do not enable autoTX triggering. */ \
Anna Bridge 160:5571c4ff569f 443 false, /* Do not enable receive triggering. */ \
Anna Bridge 160:5571c4ff569f 444 false, /* Do not enable transmit triggering. */ \
Anna Bridge 160:5571c4ff569f 445 usartPrsTriggerCh0 /* Set default channel to zero. */ \
Anna Bridge 160:5571c4ff569f 446 }
Anna Bridge 142:4eea097334d6 447 #else
Anna Bridge 160:5571c4ff569f 448 #define USART_INITPRSTRIGGER_DEFAULT \
Anna Bridge 160:5571c4ff569f 449 { \
Anna Bridge 160:5571c4ff569f 450 false, /* Do not enable receive triggering. */ \
Anna Bridge 160:5571c4ff569f 451 false, /* Do not enable transmit triggering. */ \
Anna Bridge 160:5571c4ff569f 452 usartPrsTriggerCh0 /* Set default channel to zero. */ \
Anna Bridge 160:5571c4ff569f 453 }
Anna Bridge 142:4eea097334d6 454 #endif
Anna Bridge 142:4eea097334d6 455
Anna Bridge 142:4eea097334d6 456 /** Synchronous mode init structure. */
Anna Bridge 160:5571c4ff569f 457 typedef struct {
Anna Bridge 142:4eea097334d6 458 /** Specifies whether TX and/or RX shall be enabled when init completed. */
Anna Bridge 142:4eea097334d6 459 USART_Enable_TypeDef enable;
Anna Bridge 142:4eea097334d6 460
Anna Bridge 142:4eea097334d6 461 /**
Anna Bridge 142:4eea097334d6 462 * USART/UART reference clock assumed when configuring baudrate setup. Set
Anna Bridge 142:4eea097334d6 463 * it to 0 if currently configurated reference clock shall be used.
Anna Bridge 142:4eea097334d6 464 */
Anna Bridge 142:4eea097334d6 465 uint32_t refFreq;
Anna Bridge 142:4eea097334d6 466
Anna Bridge 142:4eea097334d6 467 /** Desired baudrate. */
Anna Bridge 142:4eea097334d6 468 uint32_t baudrate;
Anna Bridge 142:4eea097334d6 469
Anna Bridge 142:4eea097334d6 470 /** Number of databits in frame. */
Anna Bridge 142:4eea097334d6 471 USART_Databits_TypeDef databits;
Anna Bridge 142:4eea097334d6 472
Anna Bridge 142:4eea097334d6 473 /** Select if to operate in master or slave mode. */
Anna Bridge 142:4eea097334d6 474 bool master;
Anna Bridge 142:4eea097334d6 475
Anna Bridge 142:4eea097334d6 476 /** Select if to send most or least significant bit first. */
Anna Bridge 142:4eea097334d6 477 bool msbf;
Anna Bridge 142:4eea097334d6 478
Anna Bridge 142:4eea097334d6 479 /** Clock polarity/phase mode. */
Anna Bridge 142:4eea097334d6 480 USART_ClockMode_TypeDef clockMode;
Anna Bridge 142:4eea097334d6 481
Anna Bridge 142:4eea097334d6 482 #if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 483 /** Enable USART Rx via PRS. */
Anna Bridge 142:4eea097334d6 484 bool prsRxEnable;
Anna Bridge 142:4eea097334d6 485
Anna Bridge 142:4eea097334d6 486 /** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
Anna Bridge 142:4eea097334d6 487 USART_PrsRxCh_TypeDef prsRxCh;
Anna Bridge 142:4eea097334d6 488
Anna Bridge 142:4eea097334d6 489 /** Enable AUTOTX mode. Transmits as long as RX is not full.
Anna Bridge 142:4eea097334d6 490 * If TX is empty, underflows are generated. */
Anna Bridge 142:4eea097334d6 491 bool autoTx;
Anna Bridge 142:4eea097334d6 492 #endif
Anna Bridge 142:4eea097334d6 493 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 494 /** Auto CS enabling */
Anna Bridge 142:4eea097334d6 495 bool autoCsEnable;
Anna Bridge 142:4eea097334d6 496 /** Auto CS hold time in baud cycles */
Anna Bridge 142:4eea097334d6 497 uint8_t autoCsHold;
Anna Bridge 142:4eea097334d6 498 /** Auto CS setup time in baud cycles */
Anna Bridge 142:4eea097334d6 499 uint8_t autoCsSetup;
Anna Bridge 142:4eea097334d6 500 #endif
Anna Bridge 142:4eea097334d6 501 } USART_InitSync_TypeDef;
Anna Bridge 142:4eea097334d6 502
Anna Bridge 142:4eea097334d6 503 /** Default config for USART sync init structure. */
Anna Bridge 142:4eea097334d6 504 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 505 #define USART_INITSYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 506 { \
Anna Bridge 160:5571c4ff569f 507 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 508 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 509 1000000, /* 1 Mbits/s. */ \
Anna Bridge 160:5571c4ff569f 510 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 511 true, /* Master mode. */ \
Anna Bridge 160:5571c4ff569f 512 false, /* Send least significant bit first. */ \
Anna Bridge 160:5571c4ff569f 513 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 160:5571c4ff569f 514 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 515 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 516 false, /* No AUTOTX mode. */ \
Anna Bridge 160:5571c4ff569f 517 false, /* No AUTOCS mode */ \
Anna Bridge 160:5571c4ff569f 518 0, /* Auto CS Hold cycles */ \
Anna Bridge 160:5571c4ff569f 519 0 /* Auto CS Setup cycles */ \
Anna Bridge 160:5571c4ff569f 520 }
Anna Bridge 142:4eea097334d6 521 #elif defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 522 #define USART_INITSYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 523 { \
Anna Bridge 160:5571c4ff569f 524 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 525 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 526 1000000, /* 1 Mbits/s. */ \
Anna Bridge 160:5571c4ff569f 527 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 528 true, /* Master mode. */ \
Anna Bridge 160:5571c4ff569f 529 false, /* Send least significant bit first. */ \
Anna Bridge 160:5571c4ff569f 530 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 160:5571c4ff569f 531 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 532 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 533 false /* No AUTOTX mode. */ \
Anna Bridge 160:5571c4ff569f 534 }
Anna Bridge 142:4eea097334d6 535 #else
Anna Bridge 142:4eea097334d6 536 #define USART_INITSYNC_DEFAULT \
Anna Bridge 160:5571c4ff569f 537 { \
Anna Bridge 160:5571c4ff569f 538 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 539 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 540 1000000, /* 1 Mbits/s. */ \
Anna Bridge 160:5571c4ff569f 541 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 542 true, /* Master mode. */ \
Anna Bridge 160:5571c4ff569f 543 false, /* Send least significant bit first. */ \
Anna Bridge 160:5571c4ff569f 544 usartClockMode0 /* Clock idle low, sample on rising edge. */ \
Anna Bridge 160:5571c4ff569f 545 }
Anna Bridge 142:4eea097334d6 546 #endif
Anna Bridge 142:4eea097334d6 547
Anna Bridge 142:4eea097334d6 548 /** IrDA mode init structure. Inherited from asynchronous mode init structure */
Anna Bridge 160:5571c4ff569f 549 typedef struct {
Anna Bridge 142:4eea097334d6 550 /** General Async initialization structure. */
Anna Bridge 142:4eea097334d6 551 USART_InitAsync_TypeDef async;
Anna Bridge 142:4eea097334d6 552
Anna Bridge 142:4eea097334d6 553 /** Set to invert Rx signal before IrDA demodulator. */
Anna Bridge 142:4eea097334d6 554 bool irRxInv;
Anna Bridge 142:4eea097334d6 555
Anna Bridge 142:4eea097334d6 556 /** Set to enable filter on IrDA demodulator. */
Anna Bridge 142:4eea097334d6 557 bool irFilt;
Anna Bridge 142:4eea097334d6 558
Anna Bridge 142:4eea097334d6 559 /** Configure the pulse width generated by the IrDA modulator as a fraction
Anna Bridge 142:4eea097334d6 560 * of the configured USART bit period. */
Anna Bridge 142:4eea097334d6 561 USART_IrDAPw_Typedef irPw;
Anna Bridge 142:4eea097334d6 562
Anna Bridge 142:4eea097334d6 563 /** Enable the PRS channel selected by irPrsSel as input to IrDA module
Anna Bridge 142:4eea097334d6 564 * instead of TX. */
Anna Bridge 142:4eea097334d6 565 bool irPrsEn;
Anna Bridge 142:4eea097334d6 566
Anna Bridge 142:4eea097334d6 567 /** A PRS can be used as input to the pulse modulator instead of TX.
Anna Bridge 142:4eea097334d6 568 * This value selects the channel to use. */
Anna Bridge 142:4eea097334d6 569 USART_IrDAPrsSel_Typedef irPrsSel;
Anna Bridge 142:4eea097334d6 570 } USART_InitIrDA_TypeDef;
Anna Bridge 142:4eea097334d6 571
Anna Bridge 142:4eea097334d6 572 /** Default config for IrDA mode init structure. */
Anna Bridge 160:5571c4ff569f 573 #if defined(_USART_ROUTEPEN_RTSPEN_MASK) && defined(_USART_ROUTEPEN_CTSPEN_MASK)
Anna Bridge 142:4eea097334d6 574 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 575 #define USART_INITIRDA_DEFAULT \
Anna Bridge 160:5571c4ff569f 576 { \
Anna Bridge 160:5571c4ff569f 577 { \
Anna Bridge 160:5571c4ff569f 578 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 579 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 580 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 581 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 582 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 583 usartEvenParity,/* Even parity. */ \
Anna Bridge 160:5571c4ff569f 584 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 585 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 586 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 587 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 588 false, /* Auto CS functionality enable/disable switch */ \
Anna Bridge 160:5571c4ff569f 589 0, /* Auto CS Hold cycles */ \
Anna Bridge 160:5571c4ff569f 590 0, /* Auto CS Setup cycles */ \
Anna Bridge 160:5571c4ff569f 591 usartHwFlowControlNone /* No HW flow control */ \
Anna Bridge 160:5571c4ff569f 592 }, \
Anna Bridge 160:5571c4ff569f 593 false, /* Rx invert disabled. */ \
Anna Bridge 160:5571c4ff569f 594 false, /* Filtering disabled. */ \
Anna Bridge 160:5571c4ff569f 595 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 160:5571c4ff569f 596 false, /* Routing to PRS is disabled. */ \
Anna Bridge 160:5571c4ff569f 597 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 598 }
Anna Bridge 142:4eea097334d6 599 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 600 #define USART_INITIRDA_DEFAULT \
Anna Bridge 160:5571c4ff569f 601 { \
Anna Bridge 160:5571c4ff569f 602 { \
Anna Bridge 160:5571c4ff569f 603 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 604 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 605 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 606 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 607 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 608 usartEvenParity,/* Even parity. */ \
Anna Bridge 160:5571c4ff569f 609 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 610 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 611 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 612 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 613 usartHwFlowControlNone /* No HW flow control */ \
Anna Bridge 160:5571c4ff569f 614 }, \
Anna Bridge 160:5571c4ff569f 615 false, /* Rx invert disabled. */ \
Anna Bridge 160:5571c4ff569f 616 false, /* Filtering disabled. */ \
Anna Bridge 160:5571c4ff569f 617 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 160:5571c4ff569f 618 false, /* Routing to PRS is disabled. */ \
Anna Bridge 160:5571c4ff569f 619 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 620 }
Anna Bridge 160:5571c4ff569f 621 #else
Anna Bridge 160:5571c4ff569f 622 #define USART_INITIRDA_DEFAULT \
Anna Bridge 160:5571c4ff569f 623 { \
Anna Bridge 160:5571c4ff569f 624 { \
Anna Bridge 160:5571c4ff569f 625 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 626 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 627 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 628 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 629 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 630 usartEvenParity,/* Even parity. */ \
Anna Bridge 160:5571c4ff569f 631 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 632 usartHwFlowControlNone /* No HW flow control */ \
Anna Bridge 160:5571c4ff569f 633 }, \
Anna Bridge 160:5571c4ff569f 634 false, /* Rx invert disabled. */ \
Anna Bridge 160:5571c4ff569f 635 false, /* Filtering disabled. */ \
Anna Bridge 160:5571c4ff569f 636 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 160:5571c4ff569f 637 false, /* Routing to PRS is disabled. */ \
Anna Bridge 160:5571c4ff569f 638 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 639 }
Anna Bridge 160:5571c4ff569f 640 #endif
Anna Bridge 142:4eea097334d6 641 #else
Anna Bridge 160:5571c4ff569f 642 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 643 #define USART_INITIRDA_DEFAULT \
Anna Bridge 160:5571c4ff569f 644 { \
Anna Bridge 160:5571c4ff569f 645 { \
Anna Bridge 160:5571c4ff569f 646 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 647 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 648 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 649 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 650 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 651 usartEvenParity,/* Even parity. */ \
Anna Bridge 160:5571c4ff569f 652 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 653 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 654 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 655 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 656 false, /* Auto CS functionality enable/disable switch */ \
Anna Bridge 160:5571c4ff569f 657 0, /* Auto CS Hold cycles */ \
Anna Bridge 160:5571c4ff569f 658 0 /* Auto CS Setup cycles */ \
Anna Bridge 160:5571c4ff569f 659 }, \
Anna Bridge 160:5571c4ff569f 660 false, /* Rx invert disabled. */ \
Anna Bridge 160:5571c4ff569f 661 false, /* Filtering disabled. */ \
Anna Bridge 160:5571c4ff569f 662 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 160:5571c4ff569f 663 false, /* Routing to PRS is disabled. */ \
Anna Bridge 160:5571c4ff569f 664 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 665 }
Anna Bridge 160:5571c4ff569f 666 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 160:5571c4ff569f 667 #define USART_INITIRDA_DEFAULT \
Anna Bridge 160:5571c4ff569f 668 { \
Anna Bridge 160:5571c4ff569f 669 { \
Anna Bridge 160:5571c4ff569f 670 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 671 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 672 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 673 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 674 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 675 usartEvenParity,/* Even parity. */ \
Anna Bridge 160:5571c4ff569f 676 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 677 false, /* Do not disable majority vote. */ \
Anna Bridge 160:5571c4ff569f 678 false, /* Not USART PRS input mode. */ \
Anna Bridge 160:5571c4ff569f 679 usartPrsRxCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 680 }, \
Anna Bridge 160:5571c4ff569f 681 false, /* Rx invert disabled. */ \
Anna Bridge 160:5571c4ff569f 682 false, /* Filtering disabled. */ \
Anna Bridge 160:5571c4ff569f 683 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 160:5571c4ff569f 684 false, /* Routing to PRS is disabled. */ \
Anna Bridge 160:5571c4ff569f 685 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 686 }
Anna Bridge 160:5571c4ff569f 687 #else
Anna Bridge 160:5571c4ff569f 688 #define USART_INITIRDA_DEFAULT \
Anna Bridge 160:5571c4ff569f 689 { \
Anna Bridge 160:5571c4ff569f 690 { \
Anna Bridge 160:5571c4ff569f 691 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 692 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 693 115200, /* 115200 bits/s. */ \
Anna Bridge 160:5571c4ff569f 694 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 160:5571c4ff569f 695 usartDatabits8, /* 8 databits. */ \
Anna Bridge 160:5571c4ff569f 696 usartEvenParity,/* Even parity. */ \
Anna Bridge 160:5571c4ff569f 697 usartStopbits1 /* 1 stopbit. */ \
Anna Bridge 160:5571c4ff569f 698 }, \
Anna Bridge 160:5571c4ff569f 699 false, /* Rx invert disabled. */ \
Anna Bridge 160:5571c4ff569f 700 false, /* Filtering disabled. */ \
Anna Bridge 160:5571c4ff569f 701 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 160:5571c4ff569f 702 false, /* Routing to PRS is disabled. */ \
Anna Bridge 160:5571c4ff569f 703 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 160:5571c4ff569f 704 }
Anna Bridge 160:5571c4ff569f 705 #endif
Anna Bridge 142:4eea097334d6 706 #endif
Anna Bridge 142:4eea097334d6 707
Anna Bridge 142:4eea097334d6 708 #if defined(_USART_I2SCTRL_MASK)
Anna Bridge 142:4eea097334d6 709 /** I2S mode init structure. Inherited from synchronous mode init structure */
Anna Bridge 160:5571c4ff569f 710 typedef struct {
Anna Bridge 142:4eea097334d6 711 /** General Sync initialization structure. */
Anna Bridge 142:4eea097334d6 712 USART_InitSync_TypeDef sync;
Anna Bridge 142:4eea097334d6 713
Anna Bridge 142:4eea097334d6 714 /** I2S mode. */
Anna Bridge 142:4eea097334d6 715 USART_I2sFormat_TypeDef format;
Anna Bridge 142:4eea097334d6 716
Anna Bridge 142:4eea097334d6 717 /** Delay on I2S data. Set to add a one-cycle delay between a transition
Anna Bridge 142:4eea097334d6 718 * on the word-clock and the start of the I2S word.
Anna Bridge 142:4eea097334d6 719 * Should be set for standard I2S format. */
Anna Bridge 142:4eea097334d6 720 bool delay;
Anna Bridge 142:4eea097334d6 721
Anna Bridge 142:4eea097334d6 722 /** Separate DMA Request For Left/Right Data. */
Anna Bridge 142:4eea097334d6 723 bool dmaSplit;
Anna Bridge 142:4eea097334d6 724
Anna Bridge 142:4eea097334d6 725 /** Justification of I2S data within the frame */
Anna Bridge 142:4eea097334d6 726 USART_I2sJustify_TypeDef justify;
Anna Bridge 142:4eea097334d6 727
Anna Bridge 142:4eea097334d6 728 /** Stero or Mono, set to true for mono. */
Anna Bridge 142:4eea097334d6 729 bool mono;
Anna Bridge 142:4eea097334d6 730 } USART_InitI2s_TypeDef;
Anna Bridge 142:4eea097334d6 731
Anna Bridge 142:4eea097334d6 732 /** Default config for I2S mode init structure. */
Anna Bridge 142:4eea097334d6 733 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 734 #define USART_INITI2S_DEFAULT \
Anna Bridge 142:4eea097334d6 735 { \
Anna Bridge 160:5571c4ff569f 736 { \
Anna Bridge 160:5571c4ff569f 737 usartEnableTx, /* Enable TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 738 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 739 1000000, /* Baudrate 1M bits/s. */ \
Anna Bridge 160:5571c4ff569f 740 usartDatabits16, /* 16 databits. */ \
Anna Bridge 160:5571c4ff569f 741 true, /* Operate as I2S master. */ \
Anna Bridge 160:5571c4ff569f 742 true, /* Most significant bit first. */ \
Anna Bridge 160:5571c4ff569f 743 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 160:5571c4ff569f 744 false, /* Don't enable USARTRx via PRS. */ \
Anna Bridge 160:5571c4ff569f 745 usartPrsRxCh0, /* PRS channel selection (dummy). */ \
Anna Bridge 160:5571c4ff569f 746 false, /* Disable AUTOTX mode. */ \
Anna Bridge 160:5571c4ff569f 747 false, /* No AUTOCS mode */ \
Anna Bridge 160:5571c4ff569f 748 0, /* Auto CS Hold cycles */ \
Anna Bridge 160:5571c4ff569f 749 0 /* Auto CS Setup cycles */ \
Anna Bridge 160:5571c4ff569f 750 }, \
Anna Bridge 160:5571c4ff569f 751 usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
Anna Bridge 160:5571c4ff569f 752 true, /* Delay on I2S data. */ \
Anna Bridge 160:5571c4ff569f 753 false, /* No DMA split. */ \
Anna Bridge 160:5571c4ff569f 754 usartI2sJustifyLeft,/* Data is left-justified within the frame */ \
Anna Bridge 160:5571c4ff569f 755 false /* Stereo mode. */ \
Anna Bridge 160:5571c4ff569f 756 }
Anna Bridge 142:4eea097334d6 757 #else
Anna Bridge 142:4eea097334d6 758 #define USART_INITI2S_DEFAULT \
Anna Bridge 142:4eea097334d6 759 { \
Anna Bridge 160:5571c4ff569f 760 { \
Anna Bridge 160:5571c4ff569f 761 usartEnableTx, /* Enable TX when init completed. */ \
Anna Bridge 160:5571c4ff569f 762 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 160:5571c4ff569f 763 1000000, /* Baudrate 1M bits/s. */ \
Anna Bridge 160:5571c4ff569f 764 usartDatabits16, /* 16 databits. */ \
Anna Bridge 160:5571c4ff569f 765 true, /* Operate as I2S master. */ \
Anna Bridge 160:5571c4ff569f 766 true, /* Most significant bit first. */ \
Anna Bridge 160:5571c4ff569f 767 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 160:5571c4ff569f 768 false, /* Don't enable USARTRx via PRS. */ \
Anna Bridge 160:5571c4ff569f 769 usartPrsRxCh0, /* PRS channel selection (dummy). */ \
Anna Bridge 160:5571c4ff569f 770 false /* Disable AUTOTX mode. */ \
Anna Bridge 160:5571c4ff569f 771 }, \
Anna Bridge 160:5571c4ff569f 772 usartI2sFormatW16D16,/* 16-bit word, 16-bit data */ \
Anna Bridge 160:5571c4ff569f 773 true, /* Delay on I2S data. */ \
Anna Bridge 160:5571c4ff569f 774 false, /* No DMA split. */ \
Anna Bridge 160:5571c4ff569f 775 usartI2sJustifyLeft,/* Data is left-justified within the frame */ \
Anna Bridge 160:5571c4ff569f 776 false /* Stereo mode. */ \
Anna Bridge 160:5571c4ff569f 777 }
Anna Bridge 142:4eea097334d6 778 #endif
Anna Bridge 142:4eea097334d6 779 #endif
Anna Bridge 142:4eea097334d6 780
Anna Bridge 142:4eea097334d6 781 /*******************************************************************************
Anna Bridge 142:4eea097334d6 782 ***************************** PROTOTYPES **********************************
Anna Bridge 142:4eea097334d6 783 ******************************************************************************/
Anna Bridge 142:4eea097334d6 784
Anna Bridge 142:4eea097334d6 785 void USART_BaudrateAsyncSet(USART_TypeDef *usart,
Anna Bridge 142:4eea097334d6 786 uint32_t refFreq,
Anna Bridge 142:4eea097334d6 787 uint32_t baudrate,
Anna Bridge 142:4eea097334d6 788 USART_OVS_TypeDef ovs);
Anna Bridge 142:4eea097334d6 789 uint32_t USART_BaudrateCalc(uint32_t refFreq,
Anna Bridge 142:4eea097334d6 790 uint32_t clkdiv,
Anna Bridge 142:4eea097334d6 791 bool syncmode,
Anna Bridge 142:4eea097334d6 792 USART_OVS_TypeDef ovs);
Anna Bridge 142:4eea097334d6 793 uint32_t USART_BaudrateGet(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 794 void USART_BaudrateSyncSet(USART_TypeDef *usart,
Anna Bridge 142:4eea097334d6 795 uint32_t refFreq,
Anna Bridge 142:4eea097334d6 796 uint32_t baudrate);
Anna Bridge 142:4eea097334d6 797 void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
Anna Bridge 142:4eea097334d6 798
Anna Bridge 142:4eea097334d6 799 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
Anna Bridge 142:4eea097334d6 800 void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
Anna Bridge 142:4eea097334d6 801 void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init);
Anna Bridge 142:4eea097334d6 802
Anna Bridge 142:4eea097334d6 803 #if defined(_USART_I2SCTRL_MASK)
Anna Bridge 142:4eea097334d6 804 void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
Anna Bridge 142:4eea097334d6 805 #endif
Anna Bridge 142:4eea097334d6 806 void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);
Anna Bridge 142:4eea097334d6 807
Anna Bridge 142:4eea097334d6 808 #if defined(DEFAULT_IRDA_USART) || defined(USART0) || ((USART_COUNT == 1) && defined(USART1))
Anna Bridge 142:4eea097334d6 809 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 810 * @brief
Anna Bridge 142:4eea097334d6 811 * Init DEFAULT_IRDA_USART for asynchronous IrDA mode.
Anna Bridge 142:4eea097334d6 812 *
Anna Bridge 142:4eea097334d6 813 * @details
Anna Bridge 142:4eea097334d6 814 * This function will configure basic settings in order to operate in
Anna Bridge 142:4eea097334d6 815 * asynchronous IrDA mode.
Anna Bridge 142:4eea097334d6 816 *
Anna Bridge 142:4eea097334d6 817 * Special control setup not covered by this function must be done after
Anna Bridge 142:4eea097334d6 818 * using this function by direct modification of the CTRL and IRCTRL
Anna Bridge 142:4eea097334d6 819 * registers.
Anna Bridge 142:4eea097334d6 820 *
Anna Bridge 142:4eea097334d6 821 * Notice that pins used by the USART/UART module must be properly configured
Anna Bridge 142:4eea097334d6 822 * by the user explicitly, in order for the USART/UART to work as intended.
Anna Bridge 142:4eea097334d6 823 * (When configuring pins, one should remember to consider the sequence of
Anna Bridge 142:4eea097334d6 824 * configuration, in order to avoid unintended pulses/glitches on output
Anna Bridge 142:4eea097334d6 825 * pins.)
Anna Bridge 142:4eea097334d6 826 *
Anna Bridge 142:4eea097334d6 827 * @param[in] init
Anna Bridge 142:4eea097334d6 828 * Pointer to initialization structure used to configure async IrDA setup.
Anna Bridge 142:4eea097334d6 829 *
Anna Bridge 142:4eea097334d6 830 * @deprecated
Anna Bridge 142:4eea097334d6 831 * Deprecated function. New code should use USARTn_InitIrDA().
Anna Bridge 142:4eea097334d6 832 * This function uses DEFAULT_IRDA_USART, which unless otherwise specified, is
Anna Bridge 142:4eea097334d6 833 * USART0 on most devices, and USART1 on devices that don't have a USART0.
Anna Bridge 142:4eea097334d6 834 *
Anna Bridge 142:4eea097334d6 835 ******************************************************************************/
Anna Bridge 142:4eea097334d6 836 __STATIC_INLINE void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
Anna Bridge 142:4eea097334d6 837 {
Anna Bridge 142:4eea097334d6 838 #if defined(DEFAULT_IRDA_USART)
Anna Bridge 142:4eea097334d6 839 USART_TypeDef *usart = DEFAULT_IRDA_USART;
Anna Bridge 142:4eea097334d6 840 #elif (USART_COUNT == 1) && defined(USART1)
Anna Bridge 142:4eea097334d6 841 USART_TypeDef *usart = USART1;
Anna Bridge 142:4eea097334d6 842 #else
Anna Bridge 142:4eea097334d6 843 USART_TypeDef *usart = USART0;
Anna Bridge 142:4eea097334d6 844 #endif
Anna Bridge 142:4eea097334d6 845 USARTn_InitIrDA(usart, init);
Anna Bridge 142:4eea097334d6 846 }
Anna Bridge 142:4eea097334d6 847 #endif
Anna Bridge 142:4eea097334d6 848
Anna Bridge 142:4eea097334d6 849 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 850 * @brief
Anna Bridge 142:4eea097334d6 851 * Clear one or more pending USART interrupts.
Anna Bridge 142:4eea097334d6 852 *
Anna Bridge 142:4eea097334d6 853 * @param[in] usart
Anna Bridge 142:4eea097334d6 854 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 855 *
Anna Bridge 142:4eea097334d6 856 * @param[in] flags
Anna Bridge 142:4eea097334d6 857 * Pending USART/UART interrupt source(s) to clear. Use one or more valid
Anna Bridge 142:4eea097334d6 858 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 859 ******************************************************************************/
Anna Bridge 142:4eea097334d6 860 __STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 861 {
Anna Bridge 142:4eea097334d6 862 usart->IFC = flags;
Anna Bridge 142:4eea097334d6 863 }
Anna Bridge 142:4eea097334d6 864
Anna Bridge 142:4eea097334d6 865 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 866 * @brief
Anna Bridge 142:4eea097334d6 867 * Disable one or more USART interrupts.
Anna Bridge 142:4eea097334d6 868 *
Anna Bridge 142:4eea097334d6 869 * @param[in] usart
Anna Bridge 142:4eea097334d6 870 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 871 *
Anna Bridge 142:4eea097334d6 872 * @param[in] flags
Anna Bridge 142:4eea097334d6 873 * USART/UART interrupt source(s) to disable. Use one or more valid
Anna Bridge 142:4eea097334d6 874 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 875 ******************************************************************************/
Anna Bridge 142:4eea097334d6 876 __STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 877 {
Anna Bridge 142:4eea097334d6 878 usart->IEN &= ~flags;
Anna Bridge 142:4eea097334d6 879 }
Anna Bridge 142:4eea097334d6 880
Anna Bridge 142:4eea097334d6 881 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 882 * @brief
Anna Bridge 142:4eea097334d6 883 * Enable one or more USART interrupts.
Anna Bridge 142:4eea097334d6 884 *
Anna Bridge 142:4eea097334d6 885 * @note
Anna Bridge 142:4eea097334d6 886 * Depending on the use, a pending interrupt may already be set prior to
Anna Bridge 142:4eea097334d6 887 * enabling the interrupt. Consider using USART_IntClear() prior to enabling
Anna Bridge 142:4eea097334d6 888 * if such a pending interrupt should be ignored.
Anna Bridge 142:4eea097334d6 889 *
Anna Bridge 142:4eea097334d6 890 * @param[in] usart
Anna Bridge 142:4eea097334d6 891 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 892 *
Anna Bridge 142:4eea097334d6 893 * @param[in] flags
Anna Bridge 142:4eea097334d6 894 * USART/UART interrupt source(s) to enable. Use one or more valid
Anna Bridge 142:4eea097334d6 895 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 896 ******************************************************************************/
Anna Bridge 142:4eea097334d6 897 __STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 898 {
Anna Bridge 142:4eea097334d6 899 usart->IEN |= flags;
Anna Bridge 142:4eea097334d6 900 }
Anna Bridge 142:4eea097334d6 901
Anna Bridge 142:4eea097334d6 902 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 903 * @brief
Anna Bridge 142:4eea097334d6 904 * Get pending USART interrupt flags.
Anna Bridge 142:4eea097334d6 905 *
Anna Bridge 142:4eea097334d6 906 * @note
Anna Bridge 142:4eea097334d6 907 * The event bits are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 908 *
Anna Bridge 142:4eea097334d6 909 * @param[in] usart
Anna Bridge 142:4eea097334d6 910 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 911 *
Anna Bridge 142:4eea097334d6 912 * @return
Anna Bridge 142:4eea097334d6 913 * USART/UART interrupt source(s) pending. Returns one or more valid
Anna Bridge 142:4eea097334d6 914 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 915 ******************************************************************************/
Anna Bridge 142:4eea097334d6 916 __STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 917 {
Anna Bridge 142:4eea097334d6 918 return usart->IF;
Anna Bridge 142:4eea097334d6 919 }
Anna Bridge 142:4eea097334d6 920
Anna Bridge 142:4eea097334d6 921 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 922 * @brief
Anna Bridge 142:4eea097334d6 923 * Get enabled and pending USART interrupt flags.
Anna Bridge 142:4eea097334d6 924 * Useful for handling more interrupt sources in the same interrupt handler.
Anna Bridge 142:4eea097334d6 925 *
Anna Bridge 142:4eea097334d6 926 * @param[in] usart
Anna Bridge 142:4eea097334d6 927 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 928 *
Anna Bridge 142:4eea097334d6 929 * @note
Anna Bridge 142:4eea097334d6 930 * Interrupt flags are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 931 *
Anna Bridge 142:4eea097334d6 932 * @return
Anna Bridge 142:4eea097334d6 933 * Pending and enabled USART interrupt sources.
Anna Bridge 142:4eea097334d6 934 * The return value is the bitwise AND combination of
Anna Bridge 142:4eea097334d6 935 * - the OR combination of enabled interrupt sources in USARTx_IEN_nnn
Anna Bridge 142:4eea097334d6 936 * register (USARTx_IEN_nnn) and
Anna Bridge 142:4eea097334d6 937 * - the OR combination of valid interrupt flags of the USART module
Anna Bridge 142:4eea097334d6 938 * (USARTx_IF_nnn).
Anna Bridge 142:4eea097334d6 939 ******************************************************************************/
Anna Bridge 142:4eea097334d6 940 __STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 941 {
Anna Bridge 142:4eea097334d6 942 uint32_t ien;
Anna Bridge 142:4eea097334d6 943
Anna Bridge 142:4eea097334d6 944 /* Store USARTx->IEN in temporary variable in order to define explicit order
Anna Bridge 142:4eea097334d6 945 * of volatile accesses. */
Anna Bridge 142:4eea097334d6 946 ien = usart->IEN;
Anna Bridge 142:4eea097334d6 947
Anna Bridge 142:4eea097334d6 948 /* Bitwise AND of pending and enabled interrupts */
Anna Bridge 142:4eea097334d6 949 return usart->IF & ien;
Anna Bridge 142:4eea097334d6 950 }
Anna Bridge 142:4eea097334d6 951
Anna Bridge 142:4eea097334d6 952 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 953 * @brief
Anna Bridge 142:4eea097334d6 954 * Set one or more pending USART interrupts from SW.
Anna Bridge 142:4eea097334d6 955 *
Anna Bridge 142:4eea097334d6 956 * @param[in] usart
Anna Bridge 142:4eea097334d6 957 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 958 *
Anna Bridge 142:4eea097334d6 959 * @param[in] flags
Anna Bridge 142:4eea097334d6 960 * USART/UART interrupt source(s) to set to pending. Use one or more valid
Anna Bridge 142:4eea097334d6 961 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 962 ******************************************************************************/
Anna Bridge 142:4eea097334d6 963 __STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 964 {
Anna Bridge 142:4eea097334d6 965 usart->IFS = flags;
Anna Bridge 142:4eea097334d6 966 }
Anna Bridge 142:4eea097334d6 967
Anna Bridge 142:4eea097334d6 968 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 969 * @brief
Anna Bridge 142:4eea097334d6 970 * Get USART STATUS register.
Anna Bridge 142:4eea097334d6 971 *
Anna Bridge 142:4eea097334d6 972 * @param[in] usart
Anna Bridge 142:4eea097334d6 973 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 974 *
Anna Bridge 142:4eea097334d6 975 * @return
Anna Bridge 142:4eea097334d6 976 * STATUS register value.
Anna Bridge 142:4eea097334d6 977 *
Anna Bridge 142:4eea097334d6 978 ******************************************************************************/
Anna Bridge 142:4eea097334d6 979 __STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 980 {
Anna Bridge 142:4eea097334d6 981 return usart->STATUS;
Anna Bridge 142:4eea097334d6 982 }
Anna Bridge 142:4eea097334d6 983
Anna Bridge 142:4eea097334d6 984 void USART_Reset(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 985 uint8_t USART_Rx(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 986 uint16_t USART_RxDouble(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 987 uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 988 uint16_t USART_RxExt(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 989
Anna Bridge 142:4eea097334d6 990 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 991 * @brief
Anna Bridge 142:4eea097334d6 992 * Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Anna Bridge 142:4eea097334d6 993 *
Anna Bridge 142:4eea097334d6 994 * @details
Anna Bridge 142:4eea097334d6 995 * This function is used to quickly receive one 4-8 bits frame by reading the
Anna Bridge 142:4eea097334d6 996 * RXDATA register directly, without checking the STATUS register for the
Anna Bridge 142:4eea097334d6 997 * RXDATAV flag. This can be useful from the RXDATAV interrupt handler,
Anna Bridge 142:4eea097334d6 998 * i.e. waiting is superfluous, in order to quickly read the received data.
Anna Bridge 142:4eea097334d6 999 * Please refer to @ref USART_RxDataXGet() for reception of 9 bit frames.
Anna Bridge 142:4eea097334d6 1000 *
Anna Bridge 142:4eea097334d6 1001 * @note
Anna Bridge 142:4eea097334d6 1002 * Since this function does not check whether the RXDATA register actually
Anna Bridge 142:4eea097334d6 1003 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 1004 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 1005 * like when handling an RXDATAV interrupt. The @ref USART_Rx() is normally a
Anna Bridge 142:4eea097334d6 1006 * better choice if the validity of the RXDATA register is not certain.
Anna Bridge 142:4eea097334d6 1007 *
Anna Bridge 142:4eea097334d6 1008 * @note
Anna Bridge 142:4eea097334d6 1009 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 1010 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 1011 *
Anna Bridge 142:4eea097334d6 1012 * @param[in] usart
Anna Bridge 142:4eea097334d6 1013 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 1014 *
Anna Bridge 142:4eea097334d6 1015 * @return
Anna Bridge 142:4eea097334d6 1016 * Data received.
Anna Bridge 142:4eea097334d6 1017 ******************************************************************************/
Anna Bridge 142:4eea097334d6 1018 __STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 1019 {
Anna Bridge 142:4eea097334d6 1020 return (uint8_t)usart->RXDATA;
Anna Bridge 142:4eea097334d6 1021 }
Anna Bridge 142:4eea097334d6 1022
Anna Bridge 142:4eea097334d6 1023 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 1024 * @brief
Anna Bridge 142:4eea097334d6 1025 * Receive two 4-8 bit frames, or one 10-16 bit frame.
Anna Bridge 142:4eea097334d6 1026 *
Anna Bridge 142:4eea097334d6 1027 * @details
Anna Bridge 142:4eea097334d6 1028 * This function is used to quickly receive one 10-16 bits frame or two 4-8
Anna Bridge 142:4eea097334d6 1029 * bit frames by reading the RXDOUBLE register directly, without checking
Anna Bridge 142:4eea097334d6 1030 * the STATUS register for the RXDATAV flag. This can be useful from the
Anna Bridge 142:4eea097334d6 1031 * RXDATAV interrupt handler, i.e. waiting is superfluous, in order to
Anna Bridge 142:4eea097334d6 1032 * quickly read the received data.
Anna Bridge 142:4eea097334d6 1033 * This function is normally used to receive one frame when operating with
Anna Bridge 142:4eea097334d6 1034 * frame length 10-16 bits. Please refer to @ref USART_RxDoubleXGet()
Anna Bridge 142:4eea097334d6 1035 * for reception of two 9 bit frames.
Anna Bridge 142:4eea097334d6 1036 *
Anna Bridge 142:4eea097334d6 1037 * @note
Anna Bridge 142:4eea097334d6 1038 * Since this function does not check whether the RXDOUBLE register actually
Anna Bridge 142:4eea097334d6 1039 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 1040 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 1041 * like when handling an RXDATAV interrupt. The @ref USART_RxDouble() is
Anna Bridge 142:4eea097334d6 1042 * normally a better choice if the validity of the RXDOUBLE register is not
Anna Bridge 142:4eea097334d6 1043 * certain.
Anna Bridge 142:4eea097334d6 1044 *
Anna Bridge 142:4eea097334d6 1045 * @note
Anna Bridge 142:4eea097334d6 1046 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 1047 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 1048 *
Anna Bridge 142:4eea097334d6 1049 * @param[in] usart
Anna Bridge 142:4eea097334d6 1050 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 1051 *
Anna Bridge 142:4eea097334d6 1052 * @return
Anna Bridge 142:4eea097334d6 1053 * Data received.
Anna Bridge 142:4eea097334d6 1054 ******************************************************************************/
Anna Bridge 142:4eea097334d6 1055 __STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 1056 {
Anna Bridge 142:4eea097334d6 1057 return (uint16_t)usart->RXDOUBLE;
Anna Bridge 142:4eea097334d6 1058 }
Anna Bridge 142:4eea097334d6 1059
Anna Bridge 142:4eea097334d6 1060 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 1061 * @brief
Anna Bridge 142:4eea097334d6 1062 * Receive two 4-9 bit frames, or one 10-16 bit frame with extended
Anna Bridge 142:4eea097334d6 1063 * information.
Anna Bridge 142:4eea097334d6 1064 *
Anna Bridge 142:4eea097334d6 1065 * @details
Anna Bridge 142:4eea097334d6 1066 * This function is used to quickly receive one 10-16 bits frame or two 4-9
Anna Bridge 142:4eea097334d6 1067 * bit frames by reading the RXDOUBLEX register directly, without checking
Anna Bridge 142:4eea097334d6 1068 * the STATUS register for the RXDATAV flag. This can be useful from the
Anna Bridge 142:4eea097334d6 1069 * RXDATAV interrupt handler, i.e. waiting is superfluous, in order to
Anna Bridge 142:4eea097334d6 1070 * quickly read the received data.
Anna Bridge 142:4eea097334d6 1071 *
Anna Bridge 142:4eea097334d6 1072 * @note
Anna Bridge 142:4eea097334d6 1073 * Since this function does not check whether the RXDOUBLEX register actually
Anna Bridge 142:4eea097334d6 1074 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 1075 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 1076 * like when handling an RXDATAV interrupt. The @ref USART_RxDoubleExt() is
Anna Bridge 142:4eea097334d6 1077 * normally a better choice if the validity of the RXDOUBLEX register is not
Anna Bridge 142:4eea097334d6 1078 * certain.
Anna Bridge 142:4eea097334d6 1079 *
Anna Bridge 142:4eea097334d6 1080 * @note
Anna Bridge 142:4eea097334d6 1081 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 1082 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 1083 *
Anna Bridge 142:4eea097334d6 1084 * @param[in] usart
Anna Bridge 142:4eea097334d6 1085 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 1086 *
Anna Bridge 142:4eea097334d6 1087 * @return
Anna Bridge 142:4eea097334d6 1088 * Data received.
Anna Bridge 142:4eea097334d6 1089 ******************************************************************************/
Anna Bridge 142:4eea097334d6 1090 __STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 1091 {
Anna Bridge 142:4eea097334d6 1092 return usart->RXDOUBLEX;
Anna Bridge 142:4eea097334d6 1093 }
Anna Bridge 142:4eea097334d6 1094
Anna Bridge 142:4eea097334d6 1095 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 1096 * @brief
Anna Bridge 142:4eea097334d6 1097 * Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended
Anna Bridge 142:4eea097334d6 1098 * information.
Anna Bridge 142:4eea097334d6 1099 *
Anna Bridge 142:4eea097334d6 1100 * @details
Anna Bridge 142:4eea097334d6 1101 * This function is used to quickly receive one 4-9 bit frame, (or part of
Anna Bridge 142:4eea097334d6 1102 * 10-16 bit frame) with extended information by reading the RXDATAX register
Anna Bridge 142:4eea097334d6 1103 * directly, without checking the STATUS register for the RXDATAV flag. This
Anna Bridge 142:4eea097334d6 1104 * can be useful from the RXDATAV interrupt handler, i.e. waiting is
Anna Bridge 142:4eea097334d6 1105 * superfluous, in order to quickly read the received data.
Anna Bridge 142:4eea097334d6 1106 *
Anna Bridge 142:4eea097334d6 1107 * @note
Anna Bridge 142:4eea097334d6 1108 * Since this function does not check whether the RXDATAX register actually
Anna Bridge 142:4eea097334d6 1109 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 1110 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 1111 * like when handling an RXDATAV interrupt. The @ref USART_RxExt() is normally
Anna Bridge 142:4eea097334d6 1112 * a better choice if the validity of the RXDATAX register is not certain.
Anna Bridge 142:4eea097334d6 1113 *
Anna Bridge 142:4eea097334d6 1114 * @note
Anna Bridge 142:4eea097334d6 1115 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 1116 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 1117 *
Anna Bridge 142:4eea097334d6 1118 * @param[in] usart
Anna Bridge 142:4eea097334d6 1119 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 1120 *
Anna Bridge 142:4eea097334d6 1121 * @return
Anna Bridge 142:4eea097334d6 1122 * Data received.
Anna Bridge 142:4eea097334d6 1123 ******************************************************************************/
Anna Bridge 142:4eea097334d6 1124 __STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 1125 {
Anna Bridge 142:4eea097334d6 1126 return (uint16_t)usart->RXDATAX;
Anna Bridge 142:4eea097334d6 1127 }
Anna Bridge 142:4eea097334d6 1128
Anna Bridge 142:4eea097334d6 1129 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
Anna Bridge 142:4eea097334d6 1130 void USART_Tx(USART_TypeDef *usart, uint8_t data);
Anna Bridge 142:4eea097334d6 1131 void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
Anna Bridge 142:4eea097334d6 1132 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
Anna Bridge 142:4eea097334d6 1133 void USART_TxExt(USART_TypeDef *usart, uint16_t data);
Anna Bridge 142:4eea097334d6 1134
Anna Bridge 142:4eea097334d6 1135 /** @} (end addtogroup USART) */
Anna Bridge 142:4eea097334d6 1136 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 1137
Anna Bridge 142:4eea097334d6 1138 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 1139 }
Anna Bridge 142:4eea097334d6 1140 #endif
Anna Bridge 142:4eea097334d6 1141
Anna Bridge 142:4eea097334d6 1142 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
Anna Bridge 142:4eea097334d6 1143 #endif /* EM_USART_H */