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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_TB_SENSE_12/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_usart.h@142:4eea097334d6, 2017-05-10 (annotated)

Committer:
Anna Bridge
Date:
Wed May 10 11:31:27 2017 +0100
Revision:
142:4eea097334d6
Child:
159:7130f322cb7e
Release 142 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



4059: [Silicon Labs] Rename targets https://github.com/ARMmbed/mbed-os/pull/4059

4187: [NCS36510] Reduce default heap size allocated by IAR to 1/4 of RAM https://github.com/ARMmbed/mbed-os/pull/4187

4225: fixed missing device_name for xDot and removed progen https://github.com/ARMmbed/mbed-os/pull/4225

4251: Fix C++11 build error w/ u-blox EVK-ODIN-W2 https://github.com/ARMmbed/mbed-os/pull/4251

4236: STM32 Fixed warning related to __packed redefinition https://github.com/ARMmbed/mbed-os/pull/4236

4190: LPC4088: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/4190

4260: Inherit Xadow M0 target from LPC11U35_501 https://github.com/ARMmbed/mbed-os/pull/4260

4249: Add consistent button names across targets https://github.com/ARMmbed/mbed-os/pull/4249

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_usart.h
Anna Bridge 142:4eea097334d6 3 * @brief Universal synchronous/asynchronous receiver/transmitter (USART/UART)
Anna Bridge 142:4eea097334d6 4 * peripheral API
Anna Bridge 142:4eea097334d6 5 * @version 5.1.2
Anna Bridge 142:4eea097334d6 6 *******************************************************************************
Anna Bridge 142:4eea097334d6 7 * @section License
Anna Bridge 142:4eea097334d6 8 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 9 *******************************************************************************
Anna Bridge 142:4eea097334d6 10 *
Anna Bridge 142:4eea097334d6 11 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 12 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 13 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 14 *
Anna Bridge 142:4eea097334d6 15 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 16 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 17 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 18 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 19 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 20 *
Anna Bridge 142:4eea097334d6 21 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 22 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 23 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 24 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 25 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 26 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 27 *
Anna Bridge 142:4eea097334d6 28 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 29 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 30 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 31 *
Anna Bridge 142:4eea097334d6 32 ******************************************************************************/
Anna Bridge 142:4eea097334d6 33
Anna Bridge 142:4eea097334d6 34
Anna Bridge 142:4eea097334d6 35 #ifndef EM_USART_H
Anna Bridge 142:4eea097334d6 36 #define EM_USART_H
Anna Bridge 142:4eea097334d6 37
Anna Bridge 142:4eea097334d6 38 #include "em_device.h"
Anna Bridge 142:4eea097334d6 39 #if defined(USART_COUNT) && (USART_COUNT > 0)
Anna Bridge 142:4eea097334d6 40
Anna Bridge 142:4eea097334d6 41 #include <stdbool.h>
Anna Bridge 142:4eea097334d6 42
Anna Bridge 142:4eea097334d6 43 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 44 extern "C" {
Anna Bridge 142:4eea097334d6 45 #endif
Anna Bridge 142:4eea097334d6 46
Anna Bridge 142:4eea097334d6 47 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 48 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 49 * @{
Anna Bridge 142:4eea097334d6 50 ******************************************************************************/
Anna Bridge 142:4eea097334d6 51
Anna Bridge 142:4eea097334d6 52 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 53 * @addtogroup USART
Anna Bridge 142:4eea097334d6 54 * @brief Universal Synchronous/Asynchronous Receiver/Transmitter
Anna Bridge 142:4eea097334d6 55 * Peripheral API
Anna Bridge 142:4eea097334d6 56 * @details
Anna Bridge 142:4eea097334d6 57 * The Universal Synchronous/Asynchronous Receiver/Transmitter (USART)
Anna Bridge 142:4eea097334d6 58 * is a very flexible serial I/O module. It supports full duplex asynchronous UART
Anna Bridge 142:4eea097334d6 59 * communication as well as RS-485, SPI, MicroWire and 3-wire. It can also interface
Anna Bridge 142:4eea097334d6 60 * with ISO7816 Smart-Cards, and IrDA devices.
Anna Bridge 142:4eea097334d6 61 *
Anna Bridge 142:4eea097334d6 62 * The USART has a wide selection of operating modes, frame formats and baud rates.
Anna Bridge 142:4eea097334d6 63 * All features are supported through the API of this module.
Anna Bridge 142:4eea097334d6 64 *
Anna Bridge 142:4eea097334d6 65 * Triple buffering and DMA support makes high data-rates possible with minimal
Anna Bridge 142:4eea097334d6 66 * CPU intervention and it is possible to transmit and receive large frames while
Anna Bridge 142:4eea097334d6 67 * the MCU remains in EM1 Sleep.
Anna Bridge 142:4eea097334d6 68 *
Anna Bridge 142:4eea097334d6 69 * This module does not support DMA configuration. The @ref UARTDRV and @ref SPIDRV drivers
Anna Bridge 142:4eea097334d6 70 * provide full support for DMA and more.
Anna Bridge 142:4eea097334d6 71 *
Anna Bridge 142:4eea097334d6 72 * The following steps are necessary for basic operation:
Anna Bridge 142:4eea097334d6 73 *
Anna Bridge 142:4eea097334d6 74 * Clock enable:
Anna Bridge 142:4eea097334d6 75 * @include em_usart_clock_enable.c
Anna Bridge 142:4eea097334d6 76 *
Anna Bridge 142:4eea097334d6 77 * To initialize the USART for asynchronous operation (eg. UART):
Anna Bridge 142:4eea097334d6 78 * @include em_usart_init_async.c
Anna Bridge 142:4eea097334d6 79 *
Anna Bridge 142:4eea097334d6 80 * To initialize the USART for synchronous operation (eg. SPI):
Anna Bridge 142:4eea097334d6 81 * @include em_usart_init_sync.c
Anna Bridge 142:4eea097334d6 82 *
Anna Bridge 142:4eea097334d6 83 * After pins are assigned for the application/board, enable pins at the
Anna Bridge 142:4eea097334d6 84 * desired location. Available locations can be obtained from the Pin Definitions
Anna Bridge 142:4eea097334d6 85 * section in the datasheet.
Anna Bridge 142:4eea097334d6 86 * @if DOXYDOC_P1_DEVICE
Anna Bridge 142:4eea097334d6 87 * @include em_usart_route_p1.c
Anna Bridge 142:4eea097334d6 88 * @note UART hardware flow control is not directly supported in hardware on
Anna Bridge 142:4eea097334d6 89 * @ref _SILICON_LABS_32B_SERIES_0 parts.
Anna Bridge 142:4eea097334d6 90 * @endif
Anna Bridge 142:4eea097334d6 91 * @if DOXYDOC_P2_DEVICE
Anna Bridge 142:4eea097334d6 92 * @include em_usart_route_p2.c
Anna Bridge 142:4eea097334d6 93 * @endif
Anna Bridge 142:4eea097334d6 94 * @note @ref UARTDRV supports all types of UART flow control. Software assisted
Anna Bridge 142:4eea097334d6 95 * hardware flow control is available for parts without true UART hardware
Anna Bridge 142:4eea097334d6 96 * flow control.
Anna Bridge 142:4eea097334d6 97 * @{
Anna Bridge 142:4eea097334d6 98 ******************************************************************************/
Anna Bridge 142:4eea097334d6 99
Anna Bridge 142:4eea097334d6 100 /*******************************************************************************
Anna Bridge 142:4eea097334d6 101 ******************************** ENUMS ************************************
Anna Bridge 142:4eea097334d6 102 ******************************************************************************/
Anna Bridge 142:4eea097334d6 103
Anna Bridge 142:4eea097334d6 104 /** Databit selection. */
Anna Bridge 142:4eea097334d6 105 typedef enum
Anna Bridge 142:4eea097334d6 106 {
Anna Bridge 142:4eea097334d6 107 usartDatabits4 = USART_FRAME_DATABITS_FOUR, /**< 4 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 108 usartDatabits5 = USART_FRAME_DATABITS_FIVE, /**< 5 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 109 usartDatabits6 = USART_FRAME_DATABITS_SIX, /**< 6 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 110 usartDatabits7 = USART_FRAME_DATABITS_SEVEN, /**< 7 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 111 usartDatabits8 = USART_FRAME_DATABITS_EIGHT, /**< 8 databits. */
Anna Bridge 142:4eea097334d6 112 usartDatabits9 = USART_FRAME_DATABITS_NINE, /**< 9 databits. */
Anna Bridge 142:4eea097334d6 113 usartDatabits10 = USART_FRAME_DATABITS_TEN, /**< 10 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 114 usartDatabits11 = USART_FRAME_DATABITS_ELEVEN, /**< 11 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 115 usartDatabits12 = USART_FRAME_DATABITS_TWELVE, /**< 12 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 116 usartDatabits13 = USART_FRAME_DATABITS_THIRTEEN, /**< 13 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 117 usartDatabits14 = USART_FRAME_DATABITS_FOURTEEN, /**< 14 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 118 usartDatabits15 = USART_FRAME_DATABITS_FIFTEEN, /**< 15 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 119 usartDatabits16 = USART_FRAME_DATABITS_SIXTEEN /**< 16 databits (not available for UART). */
Anna Bridge 142:4eea097334d6 120 } USART_Databits_TypeDef;
Anna Bridge 142:4eea097334d6 121
Anna Bridge 142:4eea097334d6 122
Anna Bridge 142:4eea097334d6 123 /** Enable selection. */
Anna Bridge 142:4eea097334d6 124 typedef enum
Anna Bridge 142:4eea097334d6 125 {
Anna Bridge 142:4eea097334d6 126 /** Disable both receiver and transmitter. */
Anna Bridge 142:4eea097334d6 127 usartDisable = 0x0,
Anna Bridge 142:4eea097334d6 128
Anna Bridge 142:4eea097334d6 129 /** Enable receiver only, transmitter disabled. */
Anna Bridge 142:4eea097334d6 130 usartEnableRx = USART_CMD_RXEN,
Anna Bridge 142:4eea097334d6 131
Anna Bridge 142:4eea097334d6 132 /** Enable transmitter only, receiver disabled. */
Anna Bridge 142:4eea097334d6 133 usartEnableTx = USART_CMD_TXEN,
Anna Bridge 142:4eea097334d6 134
Anna Bridge 142:4eea097334d6 135 /** Enable both receiver and transmitter. */
Anna Bridge 142:4eea097334d6 136 usartEnable = (USART_CMD_RXEN | USART_CMD_TXEN)
Anna Bridge 142:4eea097334d6 137 } USART_Enable_TypeDef;
Anna Bridge 142:4eea097334d6 138
Anna Bridge 142:4eea097334d6 139
Anna Bridge 142:4eea097334d6 140 /** Oversampling selection, used for asynchronous operation. */
Anna Bridge 142:4eea097334d6 141 typedef enum
Anna Bridge 142:4eea097334d6 142 {
Anna Bridge 142:4eea097334d6 143 usartOVS16 = USART_CTRL_OVS_X16, /**< 16x oversampling (normal). */
Anna Bridge 142:4eea097334d6 144 usartOVS8 = USART_CTRL_OVS_X8, /**< 8x oversampling. */
Anna Bridge 142:4eea097334d6 145 usartOVS6 = USART_CTRL_OVS_X6, /**< 6x oversampling. */
Anna Bridge 142:4eea097334d6 146 usartOVS4 = USART_CTRL_OVS_X4 /**< 4x oversampling. */
Anna Bridge 142:4eea097334d6 147 } USART_OVS_TypeDef;
Anna Bridge 142:4eea097334d6 148
Anna Bridge 142:4eea097334d6 149
Anna Bridge 142:4eea097334d6 150 /** Parity selection, mainly used for asynchronous operation. */
Anna Bridge 142:4eea097334d6 151 typedef enum
Anna Bridge 142:4eea097334d6 152 {
Anna Bridge 142:4eea097334d6 153 usartNoParity = USART_FRAME_PARITY_NONE, /**< No parity. */
Anna Bridge 142:4eea097334d6 154 usartEvenParity = USART_FRAME_PARITY_EVEN, /**< Even parity. */
Anna Bridge 142:4eea097334d6 155 usartOddParity = USART_FRAME_PARITY_ODD /**< Odd parity. */
Anna Bridge 142:4eea097334d6 156 } USART_Parity_TypeDef;
Anna Bridge 142:4eea097334d6 157
Anna Bridge 142:4eea097334d6 158
Anna Bridge 142:4eea097334d6 159 /** Stopbits selection, used for asynchronous operation. */
Anna Bridge 142:4eea097334d6 160 typedef enum
Anna Bridge 142:4eea097334d6 161 {
Anna Bridge 142:4eea097334d6 162 usartStopbits0p5 = USART_FRAME_STOPBITS_HALF, /**< 0.5 stopbits. */
Anna Bridge 142:4eea097334d6 163 usartStopbits1 = USART_FRAME_STOPBITS_ONE, /**< 1 stopbits. */
Anna Bridge 142:4eea097334d6 164 usartStopbits1p5 = USART_FRAME_STOPBITS_ONEANDAHALF, /**< 1.5 stopbits. */
Anna Bridge 142:4eea097334d6 165 usartStopbits2 = USART_FRAME_STOPBITS_TWO /**< 2 stopbits. */
Anna Bridge 142:4eea097334d6 166 } USART_Stopbits_TypeDef;
Anna Bridge 142:4eea097334d6 167
Anna Bridge 142:4eea097334d6 168
Anna Bridge 142:4eea097334d6 169 /** Clock polarity/phase mode. */
Anna Bridge 142:4eea097334d6 170 typedef enum
Anna Bridge 142:4eea097334d6 171 {
Anna Bridge 142:4eea097334d6 172 /** Clock idle low, sample on rising edge. */
Anna Bridge 142:4eea097334d6 173 usartClockMode0 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLELEADING,
Anna Bridge 142:4eea097334d6 174
Anna Bridge 142:4eea097334d6 175 /** Clock idle low, sample on falling edge. */
Anna Bridge 142:4eea097334d6 176 usartClockMode1 = USART_CTRL_CLKPOL_IDLELOW | USART_CTRL_CLKPHA_SAMPLETRAILING,
Anna Bridge 142:4eea097334d6 177
Anna Bridge 142:4eea097334d6 178 /** Clock idle high, sample on falling edge. */
Anna Bridge 142:4eea097334d6 179 usartClockMode2 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLELEADING,
Anna Bridge 142:4eea097334d6 180
Anna Bridge 142:4eea097334d6 181 /** Clock idle high, sample on rising edge. */
Anna Bridge 142:4eea097334d6 182 usartClockMode3 = USART_CTRL_CLKPOL_IDLEHIGH | USART_CTRL_CLKPHA_SAMPLETRAILING
Anna Bridge 142:4eea097334d6 183 } USART_ClockMode_TypeDef;
Anna Bridge 142:4eea097334d6 184
Anna Bridge 142:4eea097334d6 185
Anna Bridge 142:4eea097334d6 186 /** Pulse width selection for IrDA mode. */
Anna Bridge 142:4eea097334d6 187 typedef enum
Anna Bridge 142:4eea097334d6 188 {
Anna Bridge 142:4eea097334d6 189 /** IrDA pulse width is 1/16 for OVS=0 and 1/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 190 usartIrDAPwONE = USART_IRCTRL_IRPW_ONE,
Anna Bridge 142:4eea097334d6 191
Anna Bridge 142:4eea097334d6 192 /** IrDA pulse width is 2/16 for OVS=0 and 2/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 193 usartIrDAPwTWO = USART_IRCTRL_IRPW_TWO,
Anna Bridge 142:4eea097334d6 194
Anna Bridge 142:4eea097334d6 195 /** IrDA pulse width is 3/16 for OVS=0 and 3/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 196 usartIrDAPwTHREE = USART_IRCTRL_IRPW_THREE,
Anna Bridge 142:4eea097334d6 197
Anna Bridge 142:4eea097334d6 198 /** IrDA pulse width is 4/16 for OVS=0 and 4/8 for OVS=1 */
Anna Bridge 142:4eea097334d6 199 usartIrDAPwFOUR = USART_IRCTRL_IRPW_FOUR
Anna Bridge 142:4eea097334d6 200 } USART_IrDAPw_Typedef;
Anna Bridge 142:4eea097334d6 201
Anna Bridge 142:4eea097334d6 202
Anna Bridge 142:4eea097334d6 203 /** PRS channel selection for IrDA mode. */
Anna Bridge 142:4eea097334d6 204 typedef enum
Anna Bridge 142:4eea097334d6 205 {
Anna Bridge 142:4eea097334d6 206 usartIrDAPrsCh0 = USART_IRCTRL_IRPRSSEL_PRSCH0, /**< PRS channel 0 */
Anna Bridge 142:4eea097334d6 207 usartIrDAPrsCh1 = USART_IRCTRL_IRPRSSEL_PRSCH1, /**< PRS channel 1 */
Anna Bridge 142:4eea097334d6 208 usartIrDAPrsCh2 = USART_IRCTRL_IRPRSSEL_PRSCH2, /**< PRS channel 2 */
Anna Bridge 142:4eea097334d6 209 usartIrDAPrsCh3 = USART_IRCTRL_IRPRSSEL_PRSCH3, /**< PRS channel 3 */
Anna Bridge 142:4eea097334d6 210 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH4)
Anna Bridge 142:4eea097334d6 211 usartIrDAPrsCh4 = USART_IRCTRL_IRPRSSEL_PRSCH4, /**< PRS channel 4 */
Anna Bridge 142:4eea097334d6 212 #endif
Anna Bridge 142:4eea097334d6 213 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH5)
Anna Bridge 142:4eea097334d6 214 usartIrDAPrsCh5 = USART_IRCTRL_IRPRSSEL_PRSCH5, /**< PRS channel 5 */
Anna Bridge 142:4eea097334d6 215 #endif
Anna Bridge 142:4eea097334d6 216 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH6)
Anna Bridge 142:4eea097334d6 217 usartIrDAPrsCh6 = USART_IRCTRL_IRPRSSEL_PRSCH6, /**< PRS channel 6 */
Anna Bridge 142:4eea097334d6 218 #endif
Anna Bridge 142:4eea097334d6 219 #if defined(USART_IRCTRL_IRPRSSEL_PRSCH7)
Anna Bridge 142:4eea097334d6 220 usartIrDAPrsCh7 = USART_IRCTRL_IRPRSSEL_PRSCH7, /**< PRS channel 7 */
Anna Bridge 142:4eea097334d6 221 #endif
Anna Bridge 142:4eea097334d6 222 } USART_IrDAPrsSel_Typedef;
Anna Bridge 142:4eea097334d6 223
Anna Bridge 142:4eea097334d6 224 #if defined(_USART_I2SCTRL_MASK)
Anna Bridge 142:4eea097334d6 225 /** I2S format selection. */
Anna Bridge 142:4eea097334d6 226 typedef enum
Anna Bridge 142:4eea097334d6 227 {
Anna Bridge 142:4eea097334d6 228 usartI2sFormatW32D32 = USART_I2SCTRL_FORMAT_W32D32, /**< 32-bit word, 32-bit data */
Anna Bridge 142:4eea097334d6 229 usartI2sFormatW32D24M = USART_I2SCTRL_FORMAT_W32D24M, /**< 32-bit word, 32-bit data with 8 lsb masked */
Anna Bridge 142:4eea097334d6 230 usartI2sFormatW32D24 = USART_I2SCTRL_FORMAT_W32D24, /**< 32-bit word, 24-bit data */
Anna Bridge 142:4eea097334d6 231 usartI2sFormatW32D16 = USART_I2SCTRL_FORMAT_W32D16, /**< 32-bit word, 16-bit data */
Anna Bridge 142:4eea097334d6 232 usartI2sFormatW32D8 = USART_I2SCTRL_FORMAT_W32D8, /**< 32-bit word, 8-bit data */
Anna Bridge 142:4eea097334d6 233 usartI2sFormatW16D16 = USART_I2SCTRL_FORMAT_W16D16, /**< 16-bit word, 16-bit data */
Anna Bridge 142:4eea097334d6 234 usartI2sFormatW16D8 = USART_I2SCTRL_FORMAT_W16D8, /**< 16-bit word, 8-bit data */
Anna Bridge 142:4eea097334d6 235 usartI2sFormatW8D8 = USART_I2SCTRL_FORMAT_W8D8 /**< 8-bit word, 8-bit data */
Anna Bridge 142:4eea097334d6 236 } USART_I2sFormat_TypeDef;
Anna Bridge 142:4eea097334d6 237
Anna Bridge 142:4eea097334d6 238 /** I2S frame data justify. */
Anna Bridge 142:4eea097334d6 239 typedef enum
Anna Bridge 142:4eea097334d6 240 {
Anna Bridge 142:4eea097334d6 241 usartI2sJustifyLeft = USART_I2SCTRL_JUSTIFY_LEFT, /**< Data is left-justified within the frame */
Anna Bridge 142:4eea097334d6 242 usartI2sJustifyRight = USART_I2SCTRL_JUSTIFY_RIGHT /**< Data is right-justified within the frame */
Anna Bridge 142:4eea097334d6 243 } USART_I2sJustify_TypeDef;
Anna Bridge 142:4eea097334d6 244 #endif
Anna Bridge 142:4eea097334d6 245
Anna Bridge 142:4eea097334d6 246 #if defined(_USART_INPUT_MASK)
Anna Bridge 142:4eea097334d6 247 /** USART Rx input PRS selection. */
Anna Bridge 142:4eea097334d6 248 typedef enum
Anna Bridge 142:4eea097334d6 249 {
Anna Bridge 142:4eea097334d6 250 usartPrsRxCh0 = USART_INPUT_RXPRSSEL_PRSCH0, /**< PRSCH0 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 251 usartPrsRxCh1 = USART_INPUT_RXPRSSEL_PRSCH1, /**< PRSCH1 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 252 usartPrsRxCh2 = USART_INPUT_RXPRSSEL_PRSCH2, /**< PRSCH2 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 253 usartPrsRxCh3 = USART_INPUT_RXPRSSEL_PRSCH3, /**< PRSCH3 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 254
Anna Bridge 142:4eea097334d6 255 #if defined(USART_INPUT_RXPRSSEL_PRSCH7)
Anna Bridge 142:4eea097334d6 256 usartPrsRxCh4 = USART_INPUT_RXPRSSEL_PRSCH4, /**< PRSCH4 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 257 usartPrsRxCh5 = USART_INPUT_RXPRSSEL_PRSCH5, /**< PRSCH5 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 258 usartPrsRxCh6 = USART_INPUT_RXPRSSEL_PRSCH6, /**< PRSCH6 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 259 usartPrsRxCh7 = USART_INPUT_RXPRSSEL_PRSCH7, /**< PRSCH7 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 260 #endif
Anna Bridge 142:4eea097334d6 261
Anna Bridge 142:4eea097334d6 262 #if defined(USART_INPUT_RXPRSSEL_PRSCH11)
Anna Bridge 142:4eea097334d6 263 usartPrsRxCh8 = USART_INPUT_RXPRSSEL_PRSCH8, /**< PRSCH8 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 264 usartPrsRxCh9 = USART_INPUT_RXPRSSEL_PRSCH9, /**< PRSCH9 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 265 usartPrsRxCh10 = USART_INPUT_RXPRSSEL_PRSCH10, /**< PRSCH10 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 266 usartPrsRxCh11 = USART_INPUT_RXPRSSEL_PRSCH11 /**< PRSCH11 selected as USART_INPUT */
Anna Bridge 142:4eea097334d6 267 #endif
Anna Bridge 142:4eea097334d6 268 } USART_PrsRxCh_TypeDef;
Anna Bridge 142:4eea097334d6 269 #endif
Anna Bridge 142:4eea097334d6 270
Anna Bridge 142:4eea097334d6 271 /** USART PRS Transmit Trigger Channels */
Anna Bridge 142:4eea097334d6 272 typedef enum
Anna Bridge 142:4eea097334d6 273 {
Anna Bridge 142:4eea097334d6 274 usartPrsTriggerCh0 = USART_TRIGCTRL_TSEL_PRSCH0, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 275 usartPrsTriggerCh1 = USART_TRIGCTRL_TSEL_PRSCH1, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 276 usartPrsTriggerCh2 = USART_TRIGCTRL_TSEL_PRSCH2, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 277 usartPrsTriggerCh3 = USART_TRIGCTRL_TSEL_PRSCH3, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 278
Anna Bridge 142:4eea097334d6 279 #if defined(USART_TRIGCTRL_TSEL_PRSCH7)
Anna Bridge 142:4eea097334d6 280 usartPrsTriggerCh4 = USART_TRIGCTRL_TSEL_PRSCH4, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 281 usartPrsTriggerCh5 = USART_TRIGCTRL_TSEL_PRSCH5, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 282 usartPrsTriggerCh6 = USART_TRIGCTRL_TSEL_PRSCH6, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 283 usartPrsTriggerCh7 = USART_TRIGCTRL_TSEL_PRSCH7, /**< PRSCH0 selected as USART Trigger */
Anna Bridge 142:4eea097334d6 284 #endif
Anna Bridge 142:4eea097334d6 285 } USART_PrsTriggerCh_TypeDef;
Anna Bridge 142:4eea097334d6 286
Anna Bridge 142:4eea097334d6 287 /*******************************************************************************
Anna Bridge 142:4eea097334d6 288 ******************************* STRUCTS ***********************************
Anna Bridge 142:4eea097334d6 289 ******************************************************************************/
Anna Bridge 142:4eea097334d6 290
Anna Bridge 142:4eea097334d6 291 /** Asynchronous mode init structure. */
Anna Bridge 142:4eea097334d6 292 typedef struct
Anna Bridge 142:4eea097334d6 293 {
Anna Bridge 142:4eea097334d6 294 /** Specifies whether TX and/or RX shall be enabled when init completed. */
Anna Bridge 142:4eea097334d6 295 USART_Enable_TypeDef enable;
Anna Bridge 142:4eea097334d6 296
Anna Bridge 142:4eea097334d6 297 /**
Anna Bridge 142:4eea097334d6 298 * USART/UART reference clock assumed when configuring baudrate setup. Set
Anna Bridge 142:4eea097334d6 299 * it to 0 if currently configurated reference clock shall be used.
Anna Bridge 142:4eea097334d6 300 */
Anna Bridge 142:4eea097334d6 301 uint32_t refFreq;
Anna Bridge 142:4eea097334d6 302
Anna Bridge 142:4eea097334d6 303 /** Desired baudrate. */
Anna Bridge 142:4eea097334d6 304 uint32_t baudrate;
Anna Bridge 142:4eea097334d6 305
Anna Bridge 142:4eea097334d6 306 /** Oversampling used. */
Anna Bridge 142:4eea097334d6 307 USART_OVS_TypeDef oversampling;
Anna Bridge 142:4eea097334d6 308
Anna Bridge 142:4eea097334d6 309 /** Number of databits in frame. Notice that UART modules only support 8 or
Anna Bridge 142:4eea097334d6 310 * 9 databits. */
Anna Bridge 142:4eea097334d6 311 USART_Databits_TypeDef databits;
Anna Bridge 142:4eea097334d6 312
Anna Bridge 142:4eea097334d6 313 /** Parity mode to use. */
Anna Bridge 142:4eea097334d6 314 USART_Parity_TypeDef parity;
Anna Bridge 142:4eea097334d6 315
Anna Bridge 142:4eea097334d6 316 /** Number of stopbits to use. */
Anna Bridge 142:4eea097334d6 317 USART_Stopbits_TypeDef stopbits;
Anna Bridge 142:4eea097334d6 318
Anna Bridge 142:4eea097334d6 319 #if defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 142:4eea097334d6 320 /** Majority Vote Disable for 16x, 8x and 6x oversampling modes. */
Anna Bridge 142:4eea097334d6 321 bool mvdis;
Anna Bridge 142:4eea097334d6 322
Anna Bridge 142:4eea097334d6 323 /** Enable USART Rx via PRS. */
Anna Bridge 142:4eea097334d6 324 bool prsRxEnable;
Anna Bridge 142:4eea097334d6 325
Anna Bridge 142:4eea097334d6 326 /** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
Anna Bridge 142:4eea097334d6 327 USART_PrsRxCh_TypeDef prsRxCh;
Anna Bridge 142:4eea097334d6 328 #endif
Anna Bridge 142:4eea097334d6 329 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 330 /** Auto CS enabling */
Anna Bridge 142:4eea097334d6 331 bool autoCsEnable;
Anna Bridge 142:4eea097334d6 332 /** Auto CS hold time in baud cycles */
Anna Bridge 142:4eea097334d6 333 uint8_t autoCsHold;
Anna Bridge 142:4eea097334d6 334 /** Auto CS setup time in baud cycles */
Anna Bridge 142:4eea097334d6 335 uint8_t autoCsSetup;
Anna Bridge 142:4eea097334d6 336 #endif
Anna Bridge 142:4eea097334d6 337 } USART_InitAsync_TypeDef;
Anna Bridge 142:4eea097334d6 338
Anna Bridge 142:4eea097334d6 339 /** USART PRS trigger enable */
Anna Bridge 142:4eea097334d6 340 typedef struct
Anna Bridge 142:4eea097334d6 341 {
Anna Bridge 142:4eea097334d6 342 #if defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 343 /** Enable AUTOTX */
Anna Bridge 142:4eea097334d6 344 bool autoTxTriggerEnable;
Anna Bridge 142:4eea097334d6 345 #endif
Anna Bridge 142:4eea097334d6 346 /** Trigger receive via PRS channel */
Anna Bridge 142:4eea097334d6 347 bool rxTriggerEnable;
Anna Bridge 142:4eea097334d6 348 /** Trigger transmit via PRS channel */
Anna Bridge 142:4eea097334d6 349 bool txTriggerEnable;
Anna Bridge 142:4eea097334d6 350 /** PRS channel to be used to trigger auto transmission */
Anna Bridge 142:4eea097334d6 351 USART_PrsTriggerCh_TypeDef prsTriggerChannel;
Anna Bridge 142:4eea097334d6 352 } USART_PrsTriggerInit_TypeDef;
Anna Bridge 142:4eea097334d6 353
Anna Bridge 142:4eea097334d6 354 /** Default config for USART async init structure. */
Anna Bridge 142:4eea097334d6 355 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Anna Bridge 142:4eea097334d6 356 #define USART_INITASYNC_DEFAULT \
Anna Bridge 142:4eea097334d6 357 { \
Anna Bridge 142:4eea097334d6 358 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 359 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 360 115200, /* 115200 bits/s. */ \
Anna Bridge 142:4eea097334d6 361 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 142:4eea097334d6 362 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 363 usartNoParity, /* No parity. */ \
Anna Bridge 142:4eea097334d6 364 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 142:4eea097334d6 365 false, /* Do not disable majority vote. */ \
Anna Bridge 142:4eea097334d6 366 false, /* Not USART PRS input mode. */ \
Anna Bridge 142:4eea097334d6 367 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 368 false, /* Auto CS functionality enable/disable switch */ \
Anna Bridge 142:4eea097334d6 369 0, /* Auto CS Hold cycles */ \
Anna Bridge 142:4eea097334d6 370 0 /* Auto CS Setup cycles */ \
Anna Bridge 142:4eea097334d6 371 }
Anna Bridge 142:4eea097334d6 372 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 142:4eea097334d6 373 #define USART_INITASYNC_DEFAULT \
Anna Bridge 142:4eea097334d6 374 { \
Anna Bridge 142:4eea097334d6 375 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 376 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 377 115200, /* 115200 bits/s. */ \
Anna Bridge 142:4eea097334d6 378 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 142:4eea097334d6 379 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 380 usartNoParity, /* No parity. */ \
Anna Bridge 142:4eea097334d6 381 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 142:4eea097334d6 382 false, /* Do not disable majority vote. */ \
Anna Bridge 142:4eea097334d6 383 false, /* Not USART PRS input mode. */ \
Anna Bridge 142:4eea097334d6 384 usartPrsRxCh0 /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 385 }
Anna Bridge 142:4eea097334d6 386 #else
Anna Bridge 142:4eea097334d6 387 #define USART_INITASYNC_DEFAULT \
Anna Bridge 142:4eea097334d6 388 { \
Anna Bridge 142:4eea097334d6 389 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 390 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 391 115200, /* 115200 bits/s. */ \
Anna Bridge 142:4eea097334d6 392 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 142:4eea097334d6 393 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 394 usartNoParity, /* No parity. */ \
Anna Bridge 142:4eea097334d6 395 usartStopbits1 /* 1 stopbit. */ \
Anna Bridge 142:4eea097334d6 396 }
Anna Bridge 142:4eea097334d6 397 #endif
Anna Bridge 142:4eea097334d6 398
Anna Bridge 142:4eea097334d6 399 /** Default config for USART PRS triggering structure. */
Anna Bridge 142:4eea097334d6 400 #if defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 401 #define USART_INITPRSTRIGGER_DEFAULT \
Anna Bridge 142:4eea097334d6 402 { \
Anna Bridge 142:4eea097334d6 403 false, /* Do not enable autoTX triggering. */ \
Anna Bridge 142:4eea097334d6 404 false, /* Do not enable receive triggering. */ \
Anna Bridge 142:4eea097334d6 405 false, /* Do not enable transmit triggering. */ \
Anna Bridge 142:4eea097334d6 406 usartPrsTriggerCh0 /* Set default channel to zero. */ \
Anna Bridge 142:4eea097334d6 407 }
Anna Bridge 142:4eea097334d6 408 #else
Anna Bridge 142:4eea097334d6 409 #define USART_INITPRSTRIGGER_DEFAULT \
Anna Bridge 142:4eea097334d6 410 { \
Anna Bridge 142:4eea097334d6 411 false, /* Do not enable receive triggering. */ \
Anna Bridge 142:4eea097334d6 412 false, /* Do not enable transmit triggering. */ \
Anna Bridge 142:4eea097334d6 413 usartPrsTriggerCh0 /* Set default channel to zero. */ \
Anna Bridge 142:4eea097334d6 414 }
Anna Bridge 142:4eea097334d6 415 #endif
Anna Bridge 142:4eea097334d6 416
Anna Bridge 142:4eea097334d6 417 /** Synchronous mode init structure. */
Anna Bridge 142:4eea097334d6 418 typedef struct
Anna Bridge 142:4eea097334d6 419 {
Anna Bridge 142:4eea097334d6 420 /** Specifies whether TX and/or RX shall be enabled when init completed. */
Anna Bridge 142:4eea097334d6 421 USART_Enable_TypeDef enable;
Anna Bridge 142:4eea097334d6 422
Anna Bridge 142:4eea097334d6 423 /**
Anna Bridge 142:4eea097334d6 424 * USART/UART reference clock assumed when configuring baudrate setup. Set
Anna Bridge 142:4eea097334d6 425 * it to 0 if currently configurated reference clock shall be used.
Anna Bridge 142:4eea097334d6 426 */
Anna Bridge 142:4eea097334d6 427 uint32_t refFreq;
Anna Bridge 142:4eea097334d6 428
Anna Bridge 142:4eea097334d6 429 /** Desired baudrate. */
Anna Bridge 142:4eea097334d6 430 uint32_t baudrate;
Anna Bridge 142:4eea097334d6 431
Anna Bridge 142:4eea097334d6 432 /** Number of databits in frame. */
Anna Bridge 142:4eea097334d6 433 USART_Databits_TypeDef databits;
Anna Bridge 142:4eea097334d6 434
Anna Bridge 142:4eea097334d6 435 /** Select if to operate in master or slave mode. */
Anna Bridge 142:4eea097334d6 436 bool master;
Anna Bridge 142:4eea097334d6 437
Anna Bridge 142:4eea097334d6 438 /** Select if to send most or least significant bit first. */
Anna Bridge 142:4eea097334d6 439 bool msbf;
Anna Bridge 142:4eea097334d6 440
Anna Bridge 142:4eea097334d6 441 /** Clock polarity/phase mode. */
Anna Bridge 142:4eea097334d6 442 USART_ClockMode_TypeDef clockMode;
Anna Bridge 142:4eea097334d6 443
Anna Bridge 142:4eea097334d6 444 #if defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 445 /** Enable USART Rx via PRS. */
Anna Bridge 142:4eea097334d6 446 bool prsRxEnable;
Anna Bridge 142:4eea097334d6 447
Anna Bridge 142:4eea097334d6 448 /** Select PRS channel for USART Rx. (Only valid if prsRxEnable is true). */
Anna Bridge 142:4eea097334d6 449 USART_PrsRxCh_TypeDef prsRxCh;
Anna Bridge 142:4eea097334d6 450
Anna Bridge 142:4eea097334d6 451 /** Enable AUTOTX mode. Transmits as long as RX is not full.
Anna Bridge 142:4eea097334d6 452 * If TX is empty, underflows are generated. */
Anna Bridge 142:4eea097334d6 453 bool autoTx;
Anna Bridge 142:4eea097334d6 454 #endif
Anna Bridge 142:4eea097334d6 455 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 456 /** Auto CS enabling */
Anna Bridge 142:4eea097334d6 457 bool autoCsEnable;
Anna Bridge 142:4eea097334d6 458 /** Auto CS hold time in baud cycles */
Anna Bridge 142:4eea097334d6 459 uint8_t autoCsHold;
Anna Bridge 142:4eea097334d6 460 /** Auto CS setup time in baud cycles */
Anna Bridge 142:4eea097334d6 461 uint8_t autoCsSetup;
Anna Bridge 142:4eea097334d6 462 #endif
Anna Bridge 142:4eea097334d6 463 } USART_InitSync_TypeDef;
Anna Bridge 142:4eea097334d6 464
Anna Bridge 142:4eea097334d6 465 /** Default config for USART sync init structure. */
Anna Bridge 142:4eea097334d6 466 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 467 #define USART_INITSYNC_DEFAULT \
Anna Bridge 142:4eea097334d6 468 { \
Anna Bridge 142:4eea097334d6 469 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 470 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 471 1000000, /* 1 Mbits/s. */ \
Anna Bridge 142:4eea097334d6 472 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 473 true, /* Master mode. */ \
Anna Bridge 142:4eea097334d6 474 false, /* Send least significant bit first. */ \
Anna Bridge 142:4eea097334d6 475 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 142:4eea097334d6 476 false, /* Not USART PRS input mode. */ \
Anna Bridge 142:4eea097334d6 477 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 478 false, /* No AUTOTX mode. */ \
Anna Bridge 142:4eea097334d6 479 false, /* No AUTOCS mode */ \
Anna Bridge 142:4eea097334d6 480 0, /* Auto CS Hold cycles */ \
Anna Bridge 142:4eea097334d6 481 0 /* Auto CS Setup cycles */ \
Anna Bridge 142:4eea097334d6 482 }
Anna Bridge 142:4eea097334d6 483 #elif defined(USART_INPUT_RXPRS) && defined(USART_TRIGCTRL_AUTOTXTEN)
Anna Bridge 142:4eea097334d6 484 #define USART_INITSYNC_DEFAULT \
Anna Bridge 142:4eea097334d6 485 { \
Anna Bridge 142:4eea097334d6 486 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 487 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 488 1000000, /* 1 Mbits/s. */ \
Anna Bridge 142:4eea097334d6 489 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 490 true, /* Master mode. */ \
Anna Bridge 142:4eea097334d6 491 false, /* Send least significant bit first. */ \
Anna Bridge 142:4eea097334d6 492 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 142:4eea097334d6 493 false, /* Not USART PRS input mode. */ \
Anna Bridge 142:4eea097334d6 494 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 495 false /* No AUTOTX mode. */ \
Anna Bridge 142:4eea097334d6 496 }
Anna Bridge 142:4eea097334d6 497 #else
Anna Bridge 142:4eea097334d6 498 #define USART_INITSYNC_DEFAULT \
Anna Bridge 142:4eea097334d6 499 { \
Anna Bridge 142:4eea097334d6 500 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 501 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 502 1000000, /* 1 Mbits/s. */ \
Anna Bridge 142:4eea097334d6 503 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 504 true, /* Master mode. */ \
Anna Bridge 142:4eea097334d6 505 false, /* Send least significant bit first. */ \
Anna Bridge 142:4eea097334d6 506 usartClockMode0 /* Clock idle low, sample on rising edge. */ \
Anna Bridge 142:4eea097334d6 507 }
Anna Bridge 142:4eea097334d6 508 #endif
Anna Bridge 142:4eea097334d6 509
Anna Bridge 142:4eea097334d6 510
Anna Bridge 142:4eea097334d6 511 /** IrDA mode init structure. Inherited from asynchronous mode init structure */
Anna Bridge 142:4eea097334d6 512 typedef struct
Anna Bridge 142:4eea097334d6 513 {
Anna Bridge 142:4eea097334d6 514 /** General Async initialization structure. */
Anna Bridge 142:4eea097334d6 515 USART_InitAsync_TypeDef async;
Anna Bridge 142:4eea097334d6 516
Anna Bridge 142:4eea097334d6 517 /** Set to invert Rx signal before IrDA demodulator. */
Anna Bridge 142:4eea097334d6 518 bool irRxInv;
Anna Bridge 142:4eea097334d6 519
Anna Bridge 142:4eea097334d6 520 /** Set to enable filter on IrDA demodulator. */
Anna Bridge 142:4eea097334d6 521 bool irFilt;
Anna Bridge 142:4eea097334d6 522
Anna Bridge 142:4eea097334d6 523 /** Configure the pulse width generated by the IrDA modulator as a fraction
Anna Bridge 142:4eea097334d6 524 * of the configured USART bit period. */
Anna Bridge 142:4eea097334d6 525 USART_IrDAPw_Typedef irPw;
Anna Bridge 142:4eea097334d6 526
Anna Bridge 142:4eea097334d6 527 /** Enable the PRS channel selected by irPrsSel as input to IrDA module
Anna Bridge 142:4eea097334d6 528 * instead of TX. */
Anna Bridge 142:4eea097334d6 529 bool irPrsEn;
Anna Bridge 142:4eea097334d6 530
Anna Bridge 142:4eea097334d6 531 /** A PRS can be used as input to the pulse modulator instead of TX.
Anna Bridge 142:4eea097334d6 532 * This value selects the channel to use. */
Anna Bridge 142:4eea097334d6 533 USART_IrDAPrsSel_Typedef irPrsSel;
Anna Bridge 142:4eea097334d6 534 } USART_InitIrDA_TypeDef;
Anna Bridge 142:4eea097334d6 535
Anna Bridge 142:4eea097334d6 536
Anna Bridge 142:4eea097334d6 537 /** Default config for IrDA mode init structure. */
Anna Bridge 142:4eea097334d6 538 #if defined(_USART_TIMING_CSHOLD_MASK) && defined(USART_CTRL_MVDIS)
Anna Bridge 142:4eea097334d6 539 #define USART_INITIRDA_DEFAULT \
Anna Bridge 142:4eea097334d6 540 { \
Anna Bridge 142:4eea097334d6 541 { \
Anna Bridge 142:4eea097334d6 542 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 543 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 544 115200, /* 115200 bits/s. */ \
Anna Bridge 142:4eea097334d6 545 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 142:4eea097334d6 546 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 547 usartEvenParity, /* Even parity. */ \
Anna Bridge 142:4eea097334d6 548 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 142:4eea097334d6 549 false, /* Do not disable majority vote. */ \
Anna Bridge 142:4eea097334d6 550 false, /* Not USART PRS input mode. */ \
Anna Bridge 142:4eea097334d6 551 usartPrsRxCh0, /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 552 false, /* Auto CS functionality enable/disable switch */ \
Anna Bridge 142:4eea097334d6 553 0, /* Auto CS Hold cycles */ \
Anna Bridge 142:4eea097334d6 554 0 /* Auto CS Setup cycles */ \
Anna Bridge 142:4eea097334d6 555 }, \
Anna Bridge 142:4eea097334d6 556 false, /* Rx invert disabled. */ \
Anna Bridge 142:4eea097334d6 557 false, /* Filtering disabled. */ \
Anna Bridge 142:4eea097334d6 558 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 142:4eea097334d6 559 false, /* Routing to PRS is disabled. */ \
Anna Bridge 142:4eea097334d6 560 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 561 }
Anna Bridge 142:4eea097334d6 562 #elif defined(USART_INPUT_RXPRS) && defined(USART_CTRL_MVDIS)
Anna Bridge 142:4eea097334d6 563 #define USART_INITIRDA_DEFAULT \
Anna Bridge 142:4eea097334d6 564 { \
Anna Bridge 142:4eea097334d6 565 { \
Anna Bridge 142:4eea097334d6 566 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 567 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 568 115200, /* 115200 bits/s. */ \
Anna Bridge 142:4eea097334d6 569 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 142:4eea097334d6 570 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 571 usartEvenParity, /* Even parity. */ \
Anna Bridge 142:4eea097334d6 572 usartStopbits1, /* 1 stopbit. */ \
Anna Bridge 142:4eea097334d6 573 false, /* Do not disable majority vote. */ \
Anna Bridge 142:4eea097334d6 574 false, /* Not USART PRS input mode. */ \
Anna Bridge 142:4eea097334d6 575 usartPrsRxCh0 /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 576 }, \
Anna Bridge 142:4eea097334d6 577 false, /* Rx invert disabled. */ \
Anna Bridge 142:4eea097334d6 578 false, /* Filtering disabled. */ \
Anna Bridge 142:4eea097334d6 579 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 142:4eea097334d6 580 false, /* Routing to PRS is disabled. */ \
Anna Bridge 142:4eea097334d6 581 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 582 }
Anna Bridge 142:4eea097334d6 583 #else
Anna Bridge 142:4eea097334d6 584 #define USART_INITIRDA_DEFAULT \
Anna Bridge 142:4eea097334d6 585 { \
Anna Bridge 142:4eea097334d6 586 { \
Anna Bridge 142:4eea097334d6 587 usartEnable, /* Enable RX/TX when init completed. */ \
Anna Bridge 142:4eea097334d6 588 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 589 115200, /* 115200 bits/s. */ \
Anna Bridge 142:4eea097334d6 590 usartOVS16, /* 16x oversampling. */ \
Anna Bridge 142:4eea097334d6 591 usartDatabits8, /* 8 databits. */ \
Anna Bridge 142:4eea097334d6 592 usartEvenParity, /* Even parity. */ \
Anna Bridge 142:4eea097334d6 593 usartStopbits1 /* 1 stopbit. */ \
Anna Bridge 142:4eea097334d6 594 }, \
Anna Bridge 142:4eea097334d6 595 false, /* Rx invert disabled. */ \
Anna Bridge 142:4eea097334d6 596 false, /* Filtering disabled. */ \
Anna Bridge 142:4eea097334d6 597 usartIrDAPwTHREE, /* Pulse width is set to ONE. */ \
Anna Bridge 142:4eea097334d6 598 false, /* Routing to PRS is disabled. */ \
Anna Bridge 142:4eea097334d6 599 usartIrDAPrsCh0 /* PRS channel 0. */ \
Anna Bridge 142:4eea097334d6 600 }
Anna Bridge 142:4eea097334d6 601 #endif
Anna Bridge 142:4eea097334d6 602
Anna Bridge 142:4eea097334d6 603 #if defined(_USART_I2SCTRL_MASK)
Anna Bridge 142:4eea097334d6 604 /** I2S mode init structure. Inherited from synchronous mode init structure */
Anna Bridge 142:4eea097334d6 605 typedef struct
Anna Bridge 142:4eea097334d6 606 {
Anna Bridge 142:4eea097334d6 607 /** General Sync initialization structure. */
Anna Bridge 142:4eea097334d6 608 USART_InitSync_TypeDef sync;
Anna Bridge 142:4eea097334d6 609
Anna Bridge 142:4eea097334d6 610 /** I2S mode. */
Anna Bridge 142:4eea097334d6 611 USART_I2sFormat_TypeDef format;
Anna Bridge 142:4eea097334d6 612
Anna Bridge 142:4eea097334d6 613 /** Delay on I2S data. Set to add a one-cycle delay between a transition
Anna Bridge 142:4eea097334d6 614 * on the word-clock and the start of the I2S word.
Anna Bridge 142:4eea097334d6 615 * Should be set for standard I2S format. */
Anna Bridge 142:4eea097334d6 616 bool delay;
Anna Bridge 142:4eea097334d6 617
Anna Bridge 142:4eea097334d6 618 /** Separate DMA Request For Left/Right Data. */
Anna Bridge 142:4eea097334d6 619 bool dmaSplit;
Anna Bridge 142:4eea097334d6 620
Anna Bridge 142:4eea097334d6 621 /** Justification of I2S data within the frame */
Anna Bridge 142:4eea097334d6 622 USART_I2sJustify_TypeDef justify;
Anna Bridge 142:4eea097334d6 623
Anna Bridge 142:4eea097334d6 624 /** Stero or Mono, set to true for mono. */
Anna Bridge 142:4eea097334d6 625 bool mono;
Anna Bridge 142:4eea097334d6 626 } USART_InitI2s_TypeDef;
Anna Bridge 142:4eea097334d6 627
Anna Bridge 142:4eea097334d6 628
Anna Bridge 142:4eea097334d6 629 /** Default config for I2S mode init structure. */
Anna Bridge 142:4eea097334d6 630 #if defined(_USART_TIMING_CSHOLD_MASK)
Anna Bridge 142:4eea097334d6 631 #define USART_INITI2S_DEFAULT \
Anna Bridge 142:4eea097334d6 632 { \
Anna Bridge 142:4eea097334d6 633 { \
Anna Bridge 142:4eea097334d6 634 usartEnableTx, /* Enable TX when init completed. */ \
Anna Bridge 142:4eea097334d6 635 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 636 1000000, /* Baudrate 1M bits/s. */ \
Anna Bridge 142:4eea097334d6 637 usartDatabits16, /* 16 databits. */ \
Anna Bridge 142:4eea097334d6 638 true, /* Operate as I2S master. */ \
Anna Bridge 142:4eea097334d6 639 true, /* Most significant bit first. */ \
Anna Bridge 142:4eea097334d6 640 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 142:4eea097334d6 641 false, /* Don't enable USARTRx via PRS. */ \
Anna Bridge 142:4eea097334d6 642 usartPrsRxCh0, /* PRS channel selection (dummy). */ \
Anna Bridge 142:4eea097334d6 643 false, /* Disable AUTOTX mode. */ \
Anna Bridge 142:4eea097334d6 644 false, /* No AUTOCS mode */ \
Anna Bridge 142:4eea097334d6 645 0, /* Auto CS Hold cycles */ \
Anna Bridge 142:4eea097334d6 646 0 /* Auto CS Setup cycles */ \
Anna Bridge 142:4eea097334d6 647 }, \
Anna Bridge 142:4eea097334d6 648 usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
Anna Bridge 142:4eea097334d6 649 true, /* Delay on I2S data. */ \
Anna Bridge 142:4eea097334d6 650 false, /* No DMA split. */ \
Anna Bridge 142:4eea097334d6 651 usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
Anna Bridge 142:4eea097334d6 652 false /* Stereo mode. */ \
Anna Bridge 142:4eea097334d6 653 }
Anna Bridge 142:4eea097334d6 654 #else
Anna Bridge 142:4eea097334d6 655 #define USART_INITI2S_DEFAULT \
Anna Bridge 142:4eea097334d6 656 { \
Anna Bridge 142:4eea097334d6 657 { \
Anna Bridge 142:4eea097334d6 658 usartEnableTx, /* Enable TX when init completed. */ \
Anna Bridge 142:4eea097334d6 659 0, /* Use current configured reference clock for configuring baudrate. */ \
Anna Bridge 142:4eea097334d6 660 1000000, /* Baudrate 1M bits/s. */ \
Anna Bridge 142:4eea097334d6 661 usartDatabits16, /* 16 databits. */ \
Anna Bridge 142:4eea097334d6 662 true, /* Operate as I2S master. */ \
Anna Bridge 142:4eea097334d6 663 true, /* Most significant bit first. */ \
Anna Bridge 142:4eea097334d6 664 usartClockMode0, /* Clock idle low, sample on rising edge. */ \
Anna Bridge 142:4eea097334d6 665 false, /* Don't enable USARTRx via PRS. */ \
Anna Bridge 142:4eea097334d6 666 usartPrsRxCh0, /* PRS channel selection (dummy). */ \
Anna Bridge 142:4eea097334d6 667 false /* Disable AUTOTX mode. */ \
Anna Bridge 142:4eea097334d6 668 }, \
Anna Bridge 142:4eea097334d6 669 usartI2sFormatW16D16, /* 16-bit word, 16-bit data */ \
Anna Bridge 142:4eea097334d6 670 true, /* Delay on I2S data. */ \
Anna Bridge 142:4eea097334d6 671 false, /* No DMA split. */ \
Anna Bridge 142:4eea097334d6 672 usartI2sJustifyLeft, /* Data is left-justified within the frame */ \
Anna Bridge 142:4eea097334d6 673 false /* Stereo mode. */ \
Anna Bridge 142:4eea097334d6 674 }
Anna Bridge 142:4eea097334d6 675 #endif
Anna Bridge 142:4eea097334d6 676 #endif
Anna Bridge 142:4eea097334d6 677
Anna Bridge 142:4eea097334d6 678 /*******************************************************************************
Anna Bridge 142:4eea097334d6 679 ***************************** PROTOTYPES **********************************
Anna Bridge 142:4eea097334d6 680 ******************************************************************************/
Anna Bridge 142:4eea097334d6 681
Anna Bridge 142:4eea097334d6 682 void USART_BaudrateAsyncSet(USART_TypeDef *usart,
Anna Bridge 142:4eea097334d6 683 uint32_t refFreq,
Anna Bridge 142:4eea097334d6 684 uint32_t baudrate,
Anna Bridge 142:4eea097334d6 685 USART_OVS_TypeDef ovs);
Anna Bridge 142:4eea097334d6 686 uint32_t USART_BaudrateCalc(uint32_t refFreq,
Anna Bridge 142:4eea097334d6 687 uint32_t clkdiv,
Anna Bridge 142:4eea097334d6 688 bool syncmode,
Anna Bridge 142:4eea097334d6 689 USART_OVS_TypeDef ovs);
Anna Bridge 142:4eea097334d6 690 uint32_t USART_BaudrateGet(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 691 void USART_BaudrateSyncSet(USART_TypeDef *usart,
Anna Bridge 142:4eea097334d6 692 uint32_t refFreq,
Anna Bridge 142:4eea097334d6 693 uint32_t baudrate);
Anna Bridge 142:4eea097334d6 694 void USART_Enable(USART_TypeDef *usart, USART_Enable_TypeDef enable);
Anna Bridge 142:4eea097334d6 695
Anna Bridge 142:4eea097334d6 696 void USART_InitAsync(USART_TypeDef *usart, const USART_InitAsync_TypeDef *init);
Anna Bridge 142:4eea097334d6 697 void USART_InitSync(USART_TypeDef *usart, const USART_InitSync_TypeDef *init);
Anna Bridge 142:4eea097334d6 698 void USARTn_InitIrDA(USART_TypeDef *usart, const USART_InitIrDA_TypeDef *init);
Anna Bridge 142:4eea097334d6 699
Anna Bridge 142:4eea097334d6 700 #if defined(_USART_I2SCTRL_MASK)
Anna Bridge 142:4eea097334d6 701 void USART_InitI2s(USART_TypeDef *usart, USART_InitI2s_TypeDef *init);
Anna Bridge 142:4eea097334d6 702 #endif
Anna Bridge 142:4eea097334d6 703 void USART_InitPrsTrigger(USART_TypeDef *usart, const USART_PrsTriggerInit_TypeDef *init);
Anna Bridge 142:4eea097334d6 704
Anna Bridge 142:4eea097334d6 705 #if defined(DEFAULT_IRDA_USART) || defined(USART0) || ((USART_COUNT == 1) && defined(USART1))
Anna Bridge 142:4eea097334d6 706 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 707 * @brief
Anna Bridge 142:4eea097334d6 708 * Init DEFAULT_IRDA_USART for asynchronous IrDA mode.
Anna Bridge 142:4eea097334d6 709 *
Anna Bridge 142:4eea097334d6 710 * @details
Anna Bridge 142:4eea097334d6 711 * This function will configure basic settings in order to operate in
Anna Bridge 142:4eea097334d6 712 * asynchronous IrDA mode.
Anna Bridge 142:4eea097334d6 713 *
Anna Bridge 142:4eea097334d6 714 * Special control setup not covered by this function must be done after
Anna Bridge 142:4eea097334d6 715 * using this function by direct modification of the CTRL and IRCTRL
Anna Bridge 142:4eea097334d6 716 * registers.
Anna Bridge 142:4eea097334d6 717 *
Anna Bridge 142:4eea097334d6 718 * Notice that pins used by the USART/UART module must be properly configured
Anna Bridge 142:4eea097334d6 719 * by the user explicitly, in order for the USART/UART to work as intended.
Anna Bridge 142:4eea097334d6 720 * (When configuring pins, one should remember to consider the sequence of
Anna Bridge 142:4eea097334d6 721 * configuration, in order to avoid unintended pulses/glitches on output
Anna Bridge 142:4eea097334d6 722 * pins.)
Anna Bridge 142:4eea097334d6 723 *
Anna Bridge 142:4eea097334d6 724 * @param[in] init
Anna Bridge 142:4eea097334d6 725 * Pointer to initialization structure used to configure async IrDA setup.
Anna Bridge 142:4eea097334d6 726 *
Anna Bridge 142:4eea097334d6 727 * @deprecated
Anna Bridge 142:4eea097334d6 728 * Deprecated function. New code should use USARTn_InitIrDA().
Anna Bridge 142:4eea097334d6 729 * This function uses DEFAULT_IRDA_USART, which unless otherwise specified, is
Anna Bridge 142:4eea097334d6 730 * USART0 on most devices, and USART1 on devices that don't have a USART0.
Anna Bridge 142:4eea097334d6 731 *
Anna Bridge 142:4eea097334d6 732 ******************************************************************************/
Anna Bridge 142:4eea097334d6 733 __STATIC_INLINE void USART_InitIrDA(const USART_InitIrDA_TypeDef *init)
Anna Bridge 142:4eea097334d6 734 {
Anna Bridge 142:4eea097334d6 735 #if defined(DEFAULT_IRDA_USART)
Anna Bridge 142:4eea097334d6 736 USART_TypeDef *usart = DEFAULT_IRDA_USART;
Anna Bridge 142:4eea097334d6 737 #elif (USART_COUNT == 1) && defined(USART1)
Anna Bridge 142:4eea097334d6 738 USART_TypeDef *usart = USART1;
Anna Bridge 142:4eea097334d6 739 #else
Anna Bridge 142:4eea097334d6 740 USART_TypeDef *usart = USART0;
Anna Bridge 142:4eea097334d6 741 #endif
Anna Bridge 142:4eea097334d6 742 USARTn_InitIrDA(usart, init);
Anna Bridge 142:4eea097334d6 743 }
Anna Bridge 142:4eea097334d6 744 #endif
Anna Bridge 142:4eea097334d6 745
Anna Bridge 142:4eea097334d6 746 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 747 * @brief
Anna Bridge 142:4eea097334d6 748 * Clear one or more pending USART interrupts.
Anna Bridge 142:4eea097334d6 749 *
Anna Bridge 142:4eea097334d6 750 * @param[in] usart
Anna Bridge 142:4eea097334d6 751 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 752 *
Anna Bridge 142:4eea097334d6 753 * @param[in] flags
Anna Bridge 142:4eea097334d6 754 * Pending USART/UART interrupt source(s) to clear. Use one or more valid
Anna Bridge 142:4eea097334d6 755 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 756 ******************************************************************************/
Anna Bridge 142:4eea097334d6 757 __STATIC_INLINE void USART_IntClear(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 758 {
Anna Bridge 142:4eea097334d6 759 usart->IFC = flags;
Anna Bridge 142:4eea097334d6 760 }
Anna Bridge 142:4eea097334d6 761
Anna Bridge 142:4eea097334d6 762
Anna Bridge 142:4eea097334d6 763 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 764 * @brief
Anna Bridge 142:4eea097334d6 765 * Disable one or more USART interrupts.
Anna Bridge 142:4eea097334d6 766 *
Anna Bridge 142:4eea097334d6 767 * @param[in] usart
Anna Bridge 142:4eea097334d6 768 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 769 *
Anna Bridge 142:4eea097334d6 770 * @param[in] flags
Anna Bridge 142:4eea097334d6 771 * USART/UART interrupt source(s) to disable. Use one or more valid
Anna Bridge 142:4eea097334d6 772 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 773 ******************************************************************************/
Anna Bridge 142:4eea097334d6 774 __STATIC_INLINE void USART_IntDisable(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 775 {
Anna Bridge 142:4eea097334d6 776 usart->IEN &= ~flags;
Anna Bridge 142:4eea097334d6 777 }
Anna Bridge 142:4eea097334d6 778
Anna Bridge 142:4eea097334d6 779
Anna Bridge 142:4eea097334d6 780 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 781 * @brief
Anna Bridge 142:4eea097334d6 782 * Enable one or more USART interrupts.
Anna Bridge 142:4eea097334d6 783 *
Anna Bridge 142:4eea097334d6 784 * @note
Anna Bridge 142:4eea097334d6 785 * Depending on the use, a pending interrupt may already be set prior to
Anna Bridge 142:4eea097334d6 786 * enabling the interrupt. Consider using USART_IntClear() prior to enabling
Anna Bridge 142:4eea097334d6 787 * if such a pending interrupt should be ignored.
Anna Bridge 142:4eea097334d6 788 *
Anna Bridge 142:4eea097334d6 789 * @param[in] usart
Anna Bridge 142:4eea097334d6 790 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 791 *
Anna Bridge 142:4eea097334d6 792 * @param[in] flags
Anna Bridge 142:4eea097334d6 793 * USART/UART interrupt source(s) to enable. Use one or more valid
Anna Bridge 142:4eea097334d6 794 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 795 ******************************************************************************/
Anna Bridge 142:4eea097334d6 796 __STATIC_INLINE void USART_IntEnable(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 797 {
Anna Bridge 142:4eea097334d6 798 usart->IEN |= flags;
Anna Bridge 142:4eea097334d6 799 }
Anna Bridge 142:4eea097334d6 800
Anna Bridge 142:4eea097334d6 801
Anna Bridge 142:4eea097334d6 802 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 803 * @brief
Anna Bridge 142:4eea097334d6 804 * Get pending USART interrupt flags.
Anna Bridge 142:4eea097334d6 805 *
Anna Bridge 142:4eea097334d6 806 * @note
Anna Bridge 142:4eea097334d6 807 * The event bits are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 808 *
Anna Bridge 142:4eea097334d6 809 * @param[in] usart
Anna Bridge 142:4eea097334d6 810 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 811 *
Anna Bridge 142:4eea097334d6 812 * @return
Anna Bridge 142:4eea097334d6 813 * USART/UART interrupt source(s) pending. Returns one or more valid
Anna Bridge 142:4eea097334d6 814 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 815 ******************************************************************************/
Anna Bridge 142:4eea097334d6 816 __STATIC_INLINE uint32_t USART_IntGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 817 {
Anna Bridge 142:4eea097334d6 818 return usart->IF;
Anna Bridge 142:4eea097334d6 819 }
Anna Bridge 142:4eea097334d6 820
Anna Bridge 142:4eea097334d6 821
Anna Bridge 142:4eea097334d6 822 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 823 * @brief
Anna Bridge 142:4eea097334d6 824 * Get enabled and pending USART interrupt flags.
Anna Bridge 142:4eea097334d6 825 * Useful for handling more interrupt sources in the same interrupt handler.
Anna Bridge 142:4eea097334d6 826 *
Anna Bridge 142:4eea097334d6 827 * @param[in] usart
Anna Bridge 142:4eea097334d6 828 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 829 *
Anna Bridge 142:4eea097334d6 830 * @note
Anna Bridge 142:4eea097334d6 831 * Interrupt flags are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 832 *
Anna Bridge 142:4eea097334d6 833 * @return
Anna Bridge 142:4eea097334d6 834 * Pending and enabled USART interrupt sources.
Anna Bridge 142:4eea097334d6 835 * The return value is the bitwise AND combination of
Anna Bridge 142:4eea097334d6 836 * - the OR combination of enabled interrupt sources in USARTx_IEN_nnn
Anna Bridge 142:4eea097334d6 837 * register (USARTx_IEN_nnn) and
Anna Bridge 142:4eea097334d6 838 * - the OR combination of valid interrupt flags of the USART module
Anna Bridge 142:4eea097334d6 839 * (USARTx_IF_nnn).
Anna Bridge 142:4eea097334d6 840 ******************************************************************************/
Anna Bridge 142:4eea097334d6 841 __STATIC_INLINE uint32_t USART_IntGetEnabled(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 842 {
Anna Bridge 142:4eea097334d6 843 uint32_t ien;
Anna Bridge 142:4eea097334d6 844
Anna Bridge 142:4eea097334d6 845 /* Store USARTx->IEN in temporary variable in order to define explicit order
Anna Bridge 142:4eea097334d6 846 * of volatile accesses. */
Anna Bridge 142:4eea097334d6 847 ien = usart->IEN;
Anna Bridge 142:4eea097334d6 848
Anna Bridge 142:4eea097334d6 849 /* Bitwise AND of pending and enabled interrupts */
Anna Bridge 142:4eea097334d6 850 return usart->IF & ien;
Anna Bridge 142:4eea097334d6 851 }
Anna Bridge 142:4eea097334d6 852
Anna Bridge 142:4eea097334d6 853
Anna Bridge 142:4eea097334d6 854 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 855 * @brief
Anna Bridge 142:4eea097334d6 856 * Set one or more pending USART interrupts from SW.
Anna Bridge 142:4eea097334d6 857 *
Anna Bridge 142:4eea097334d6 858 * @param[in] usart
Anna Bridge 142:4eea097334d6 859 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 860 *
Anna Bridge 142:4eea097334d6 861 * @param[in] flags
Anna Bridge 142:4eea097334d6 862 * USART/UART interrupt source(s) to set to pending. Use one or more valid
Anna Bridge 142:4eea097334d6 863 * interrupt flags for the USART module (USART_IF_nnn) OR'ed together.
Anna Bridge 142:4eea097334d6 864 ******************************************************************************/
Anna Bridge 142:4eea097334d6 865 __STATIC_INLINE void USART_IntSet(USART_TypeDef *usart, uint32_t flags)
Anna Bridge 142:4eea097334d6 866 {
Anna Bridge 142:4eea097334d6 867 usart->IFS = flags;
Anna Bridge 142:4eea097334d6 868 }
Anna Bridge 142:4eea097334d6 869
Anna Bridge 142:4eea097334d6 870
Anna Bridge 142:4eea097334d6 871 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 872 * @brief
Anna Bridge 142:4eea097334d6 873 * Get USART STATUS register.
Anna Bridge 142:4eea097334d6 874 *
Anna Bridge 142:4eea097334d6 875 * @param[in] usart
Anna Bridge 142:4eea097334d6 876 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 877 *
Anna Bridge 142:4eea097334d6 878 * @return
Anna Bridge 142:4eea097334d6 879 * STATUS register value.
Anna Bridge 142:4eea097334d6 880 *
Anna Bridge 142:4eea097334d6 881 ******************************************************************************/
Anna Bridge 142:4eea097334d6 882 __STATIC_INLINE uint32_t USART_StatusGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 883 {
Anna Bridge 142:4eea097334d6 884 return usart->STATUS;
Anna Bridge 142:4eea097334d6 885 }
Anna Bridge 142:4eea097334d6 886
Anna Bridge 142:4eea097334d6 887 void USART_Reset(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 888 uint8_t USART_Rx(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 889 uint16_t USART_RxDouble(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 890 uint32_t USART_RxDoubleExt(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 891 uint16_t USART_RxExt(USART_TypeDef *usart);
Anna Bridge 142:4eea097334d6 892
Anna Bridge 142:4eea097334d6 893
Anna Bridge 142:4eea097334d6 894 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 895 * @brief
Anna Bridge 142:4eea097334d6 896 * Receive one 4-8 bit frame, (or part of 10-16 bit frame).
Anna Bridge 142:4eea097334d6 897 *
Anna Bridge 142:4eea097334d6 898 * @details
Anna Bridge 142:4eea097334d6 899 * This function is used to quickly receive one 4-8 bits frame by reading the
Anna Bridge 142:4eea097334d6 900 * RXDATA register directly, without checking the STATUS register for the
Anna Bridge 142:4eea097334d6 901 * RXDATAV flag. This can be useful from the RXDATAV interrupt handler,
Anna Bridge 142:4eea097334d6 902 * i.e. waiting is superfluous, in order to quickly read the received data.
Anna Bridge 142:4eea097334d6 903 * Please refer to @ref USART_RxDataXGet() for reception of 9 bit frames.
Anna Bridge 142:4eea097334d6 904 *
Anna Bridge 142:4eea097334d6 905 * @note
Anna Bridge 142:4eea097334d6 906 * Since this function does not check whether the RXDATA register actually
Anna Bridge 142:4eea097334d6 907 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 908 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 909 * like when handling an RXDATAV interrupt. The @ref USART_Rx() is normally a
Anna Bridge 142:4eea097334d6 910 * better choice if the validity of the RXDATA register is not certain.
Anna Bridge 142:4eea097334d6 911 *
Anna Bridge 142:4eea097334d6 912 * @note
Anna Bridge 142:4eea097334d6 913 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 914 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 915 *
Anna Bridge 142:4eea097334d6 916 * @param[in] usart
Anna Bridge 142:4eea097334d6 917 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 918 *
Anna Bridge 142:4eea097334d6 919 * @return
Anna Bridge 142:4eea097334d6 920 * Data received.
Anna Bridge 142:4eea097334d6 921 ******************************************************************************/
Anna Bridge 142:4eea097334d6 922 __STATIC_INLINE uint8_t USART_RxDataGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 923 {
Anna Bridge 142:4eea097334d6 924 return (uint8_t)usart->RXDATA;
Anna Bridge 142:4eea097334d6 925 }
Anna Bridge 142:4eea097334d6 926
Anna Bridge 142:4eea097334d6 927
Anna Bridge 142:4eea097334d6 928 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 929 * @brief
Anna Bridge 142:4eea097334d6 930 * Receive two 4-8 bit frames, or one 10-16 bit frame.
Anna Bridge 142:4eea097334d6 931 *
Anna Bridge 142:4eea097334d6 932 * @details
Anna Bridge 142:4eea097334d6 933 * This function is used to quickly receive one 10-16 bits frame or two 4-8
Anna Bridge 142:4eea097334d6 934 * bit frames by reading the RXDOUBLE register directly, without checking
Anna Bridge 142:4eea097334d6 935 * the STATUS register for the RXDATAV flag. This can be useful from the
Anna Bridge 142:4eea097334d6 936 * RXDATAV interrupt handler, i.e. waiting is superfluous, in order to
Anna Bridge 142:4eea097334d6 937 * quickly read the received data.
Anna Bridge 142:4eea097334d6 938 * This function is normally used to receive one frame when operating with
Anna Bridge 142:4eea097334d6 939 * frame length 10-16 bits. Please refer to @ref USART_RxDoubleXGet()
Anna Bridge 142:4eea097334d6 940 * for reception of two 9 bit frames.
Anna Bridge 142:4eea097334d6 941 *
Anna Bridge 142:4eea097334d6 942 * @note
Anna Bridge 142:4eea097334d6 943 * Since this function does not check whether the RXDOUBLE register actually
Anna Bridge 142:4eea097334d6 944 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 945 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 946 * like when handling an RXDATAV interrupt. The @ref USART_RxDouble() is
Anna Bridge 142:4eea097334d6 947 * normally a better choice if the validity of the RXDOUBLE register is not
Anna Bridge 142:4eea097334d6 948 * certain.
Anna Bridge 142:4eea097334d6 949 *
Anna Bridge 142:4eea097334d6 950 * @note
Anna Bridge 142:4eea097334d6 951 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 952 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 953 *
Anna Bridge 142:4eea097334d6 954 * @param[in] usart
Anna Bridge 142:4eea097334d6 955 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 956 *
Anna Bridge 142:4eea097334d6 957 * @return
Anna Bridge 142:4eea097334d6 958 * Data received.
Anna Bridge 142:4eea097334d6 959 ******************************************************************************/
Anna Bridge 142:4eea097334d6 960 __STATIC_INLINE uint16_t USART_RxDoubleGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 961 {
Anna Bridge 142:4eea097334d6 962 return (uint16_t)usart->RXDOUBLE;
Anna Bridge 142:4eea097334d6 963 }
Anna Bridge 142:4eea097334d6 964
Anna Bridge 142:4eea097334d6 965
Anna Bridge 142:4eea097334d6 966 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 967 * @brief
Anna Bridge 142:4eea097334d6 968 * Receive two 4-9 bit frames, or one 10-16 bit frame with extended
Anna Bridge 142:4eea097334d6 969 * information.
Anna Bridge 142:4eea097334d6 970 *
Anna Bridge 142:4eea097334d6 971 * @details
Anna Bridge 142:4eea097334d6 972 * This function is used to quickly receive one 10-16 bits frame or two 4-9
Anna Bridge 142:4eea097334d6 973 * bit frames by reading the RXDOUBLEX register directly, without checking
Anna Bridge 142:4eea097334d6 974 * the STATUS register for the RXDATAV flag. This can be useful from the
Anna Bridge 142:4eea097334d6 975 * RXDATAV interrupt handler, i.e. waiting is superfluous, in order to
Anna Bridge 142:4eea097334d6 976 * quickly read the received data.
Anna Bridge 142:4eea097334d6 977 *
Anna Bridge 142:4eea097334d6 978 * @note
Anna Bridge 142:4eea097334d6 979 * Since this function does not check whether the RXDOUBLEX register actually
Anna Bridge 142:4eea097334d6 980 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 981 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 982 * like when handling an RXDATAV interrupt. The @ref USART_RxDoubleExt() is
Anna Bridge 142:4eea097334d6 983 * normally a better choice if the validity of the RXDOUBLEX register is not
Anna Bridge 142:4eea097334d6 984 * certain.
Anna Bridge 142:4eea097334d6 985 *
Anna Bridge 142:4eea097334d6 986 * @note
Anna Bridge 142:4eea097334d6 987 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 988 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 989 *
Anna Bridge 142:4eea097334d6 990 * @param[in] usart
Anna Bridge 142:4eea097334d6 991 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 992 *
Anna Bridge 142:4eea097334d6 993 * @return
Anna Bridge 142:4eea097334d6 994 * Data received.
Anna Bridge 142:4eea097334d6 995 ******************************************************************************/
Anna Bridge 142:4eea097334d6 996 __STATIC_INLINE uint32_t USART_RxDoubleXGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 997 {
Anna Bridge 142:4eea097334d6 998 return usart->RXDOUBLEX;
Anna Bridge 142:4eea097334d6 999 }
Anna Bridge 142:4eea097334d6 1000
Anna Bridge 142:4eea097334d6 1001
Anna Bridge 142:4eea097334d6 1002 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 1003 * @brief
Anna Bridge 142:4eea097334d6 1004 * Receive one 4-9 bit frame, (or part of 10-16 bit frame) with extended
Anna Bridge 142:4eea097334d6 1005 * information.
Anna Bridge 142:4eea097334d6 1006 *
Anna Bridge 142:4eea097334d6 1007 * @details
Anna Bridge 142:4eea097334d6 1008 * This function is used to quickly receive one 4-9 bit frame, (or part of
Anna Bridge 142:4eea097334d6 1009 * 10-16 bit frame) with extended information by reading the RXDATAX register
Anna Bridge 142:4eea097334d6 1010 * directly, without checking the STATUS register for the RXDATAV flag. This
Anna Bridge 142:4eea097334d6 1011 * can be useful from the RXDATAV interrupt handler, i.e. waiting is
Anna Bridge 142:4eea097334d6 1012 * superfluous, in order to quickly read the received data.
Anna Bridge 142:4eea097334d6 1013 *
Anna Bridge 142:4eea097334d6 1014 * @note
Anna Bridge 142:4eea097334d6 1015 * Since this function does not check whether the RXDATAX register actually
Anna Bridge 142:4eea097334d6 1016 * holds valid data, it should only be used in situations when it is certain
Anna Bridge 142:4eea097334d6 1017 * that there is valid data, ensured by some external program routine, e.g.
Anna Bridge 142:4eea097334d6 1018 * like when handling an RXDATAV interrupt. The @ref USART_RxExt() is normally
Anna Bridge 142:4eea097334d6 1019 * a better choice if the validity of the RXDATAX register is not certain.
Anna Bridge 142:4eea097334d6 1020 *
Anna Bridge 142:4eea097334d6 1021 * @note
Anna Bridge 142:4eea097334d6 1022 * Notice that possible parity/stop bits in asynchronous mode are not
Anna Bridge 142:4eea097334d6 1023 * considered part of specified frame bit length.
Anna Bridge 142:4eea097334d6 1024 *
Anna Bridge 142:4eea097334d6 1025 * @param[in] usart
Anna Bridge 142:4eea097334d6 1026 * Pointer to USART/UART peripheral register block.
Anna Bridge 142:4eea097334d6 1027 *
Anna Bridge 142:4eea097334d6 1028 * @return
Anna Bridge 142:4eea097334d6 1029 * Data received.
Anna Bridge 142:4eea097334d6 1030 ******************************************************************************/
Anna Bridge 142:4eea097334d6 1031 __STATIC_INLINE uint16_t USART_RxDataXGet(USART_TypeDef *usart)
Anna Bridge 142:4eea097334d6 1032 {
Anna Bridge 142:4eea097334d6 1033 return (uint16_t)usart->RXDATAX;
Anna Bridge 142:4eea097334d6 1034 }
Anna Bridge 142:4eea097334d6 1035
Anna Bridge 142:4eea097334d6 1036 uint8_t USART_SpiTransfer(USART_TypeDef *usart, uint8_t data);
Anna Bridge 142:4eea097334d6 1037 void USART_Tx(USART_TypeDef *usart, uint8_t data);
Anna Bridge 142:4eea097334d6 1038 void USART_TxDouble(USART_TypeDef *usart, uint16_t data);
Anna Bridge 142:4eea097334d6 1039 void USART_TxDoubleExt(USART_TypeDef *usart, uint32_t data);
Anna Bridge 142:4eea097334d6 1040 void USART_TxExt(USART_TypeDef *usart, uint16_t data);
Anna Bridge 142:4eea097334d6 1041
Anna Bridge 142:4eea097334d6 1042
Anna Bridge 142:4eea097334d6 1043 /** @} (end addtogroup USART) */
Anna Bridge 142:4eea097334d6 1044 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 1045
Anna Bridge 142:4eea097334d6 1046 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 1047 }
Anna Bridge 142:4eea097334d6 1048 #endif
Anna Bridge 142:4eea097334d6 1049
Anna Bridge 142:4eea097334d6 1050 #endif /* defined(USART_COUNT) && (USART_COUNT > 0) */
Anna Bridge 142:4eea097334d6 1051 #endif /* EM_USART_H */