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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_TB_SENSE_1/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_msc.h@142:4eea097334d6, 2017-05-10 (annotated)

Committer:
Anna Bridge
Date:
Wed May 10 11:31:27 2017 +0100
Revision:
142:4eea097334d6
Child:
159:7130f322cb7e
Release 142 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



4059: [Silicon Labs] Rename targets https://github.com/ARMmbed/mbed-os/pull/4059

4187: [NCS36510] Reduce default heap size allocated by IAR to 1/4 of RAM https://github.com/ARMmbed/mbed-os/pull/4187

4225: fixed missing device_name for xDot and removed progen https://github.com/ARMmbed/mbed-os/pull/4225

4251: Fix C++11 build error w/ u-blox EVK-ODIN-W2 https://github.com/ARMmbed/mbed-os/pull/4251

4236: STM32 Fixed warning related to __packed redefinition https://github.com/ARMmbed/mbed-os/pull/4236

4190: LPC4088: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/4190

4260: Inherit Xadow M0 target from LPC11U35_501 https://github.com/ARMmbed/mbed-os/pull/4260

4249: Add consistent button names across targets https://github.com/ARMmbed/mbed-os/pull/4249

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_msc.h
Anna Bridge 142:4eea097334d6 3 * @brief Flash controller (MSC) peripheral API
Anna Bridge 142:4eea097334d6 4 * @version 5.1.2
Anna Bridge 142:4eea097334d6 5 *******************************************************************************
Anna Bridge 142:4eea097334d6 6 * @section License
Anna Bridge 142:4eea097334d6 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 8 *******************************************************************************
Anna Bridge 142:4eea097334d6 9 *
Anna Bridge 142:4eea097334d6 10 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 11 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 12 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 13 *
Anna Bridge 142:4eea097334d6 14 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 15 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 16 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 17 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 18 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 19 *
Anna Bridge 142:4eea097334d6 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 21 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 22 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 23 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 24 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 25 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 26 *
Anna Bridge 142:4eea097334d6 27 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 28 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 29 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 30 *
Anna Bridge 142:4eea097334d6 31 ******************************************************************************/
Anna Bridge 142:4eea097334d6 32
Anna Bridge 142:4eea097334d6 33 #ifndef EM_MSC_H
Anna Bridge 142:4eea097334d6 34 #define EM_MSC_H
Anna Bridge 142:4eea097334d6 35
Anna Bridge 142:4eea097334d6 36 #include "em_device.h"
Anna Bridge 142:4eea097334d6 37 #if defined(MSC_COUNT) && (MSC_COUNT > 0)
Anna Bridge 142:4eea097334d6 38
Anna Bridge 142:4eea097334d6 39 #include <stdint.h>
Anna Bridge 142:4eea097334d6 40 #include <stdbool.h>
Anna Bridge 142:4eea097334d6 41 #include "em_bus.h"
Anna Bridge 142:4eea097334d6 42 #include "em_ramfunc.h"
Anna Bridge 142:4eea097334d6 43
Anna Bridge 142:4eea097334d6 44 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 45 extern "C" {
Anna Bridge 142:4eea097334d6 46 #endif
Anna Bridge 142:4eea097334d6 47
Anna Bridge 142:4eea097334d6 48 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 49 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 50 * @{
Anna Bridge 142:4eea097334d6 51 ******************************************************************************/
Anna Bridge 142:4eea097334d6 52
Anna Bridge 142:4eea097334d6 53 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 54 * @addtogroup MSC
Anna Bridge 142:4eea097334d6 55 * @brief Memory System Controller API
Anna Bridge 142:4eea097334d6 56 * @details
Anna Bridge 142:4eea097334d6 57 * This module contain functions to control the MSC, primarily the Flash.
Anna Bridge 142:4eea097334d6 58 * The user can perform Flash memory write and erase operations as well as
Anna Bridge 142:4eea097334d6 59 * optimization of the CPU instruction fetch interface for the application.
Anna Bridge 142:4eea097334d6 60 * Available instruction fetch features depends on the MCU or SoC family, but
Anna Bridge 142:4eea097334d6 61 * features such as instruction pre-fetch, cache and configurable branch prediction
Anna Bridge 142:4eea097334d6 62 * are typically available.
Anna Bridge 142:4eea097334d6 63 *
Anna Bridge 142:4eea097334d6 64 * @note Flash wait-state configuration is handled by the @ref CMU module.
Anna Bridge 142:4eea097334d6 65 * When the core clock configuration is changed by a calls to functions such as
Anna Bridge 142:4eea097334d6 66 * @ref CMU_ClockSelectSet() or @ref CMU_HFRCOBandSet(), then Flash wait-state
Anna Bridge 142:4eea097334d6 67 * configuration is also updated.
Anna Bridge 142:4eea097334d6 68 *
Anna Bridge 142:4eea097334d6 69 * The MSC resets into a safe state. To initialize the instruction interface
Anna Bridge 142:4eea097334d6 70 * to recommended settings:
Anna Bridge 142:4eea097334d6 71 * @include em_msc_init_exec.c
Anna Bridge 142:4eea097334d6 72 *
Anna Bridge 142:4eea097334d6 73 * @note The optimal configuration is highly application dependent. Performance
Anna Bridge 142:4eea097334d6 74 * benchmarking is supported by most families. See @ref MSC_StartCacheMeasurement()
Anna Bridge 142:4eea097334d6 75 * and @ref MSC_GetCacheMeasurement() for more details.
Anna Bridge 142:4eea097334d6 76 *
Anna Bridge 142:4eea097334d6 77 * Support for Flash write and erase runs from RAM by default. This code may be
Anna Bridge 142:4eea097334d6 78 * allocated to Flash by defining @ref EM_MSC_RUN_FROM_FLASH.
Anna Bridge 142:4eea097334d6 79 *
Anna Bridge 142:4eea097334d6 80 * @note
Anna Bridge 142:4eea097334d6 81 * Flash erase may add ms of delay to interrupt latency if executing from Flash.
Anna Bridge 142:4eea097334d6 82 *
Anna Bridge 142:4eea097334d6 83 * Flash write and erase operations are supported by @ref MSC_WriteWord(),
Anna Bridge 142:4eea097334d6 84 * @ref MSC_WriteWordFast(), @ref MSC_ErasePage() and @ref MSC_MassErase().
Anna Bridge 142:4eea097334d6 85 * Fast write is not supported for EFM32G and mass erase is supported for MCU and
Anna Bridge 142:4eea097334d6 86 * SoC families with larger Flash sizes.
Anna Bridge 142:4eea097334d6 87 *
Anna Bridge 142:4eea097334d6 88 * @note
Anna Bridge 142:4eea097334d6 89 * @ref MSC_Init() must be called prior to any Flash write or erase operation.
Anna Bridge 142:4eea097334d6 90 *
Anna Bridge 142:4eea097334d6 91 * The following steps are necessary to perform a page erase and write:
Anna Bridge 142:4eea097334d6 92 * @include em_msc_erase_write.c
Anna Bridge 142:4eea097334d6 93 * @{
Anna Bridge 142:4eea097334d6 94 ******************************************************************************/
Anna Bridge 142:4eea097334d6 95
Anna Bridge 142:4eea097334d6 96 /*******************************************************************************
Anna Bridge 142:4eea097334d6 97 ************************* DEFINES *****************************************
Anna Bridge 142:4eea097334d6 98 ******************************************************************************/
Anna Bridge 142:4eea097334d6 99
Anna Bridge 142:4eea097334d6 100 /**
Anna Bridge 142:4eea097334d6 101 * @brief
Anna Bridge 142:4eea097334d6 102 * The timeout used while waiting for the flash to become ready after
Anna Bridge 142:4eea097334d6 103 * a write. This number indicates the number of iterations to perform before
Anna Bridge 142:4eea097334d6 104 * issuing a timeout.
Anna Bridge 142:4eea097334d6 105 *
Anna Bridge 142:4eea097334d6 106 * @note
Anna Bridge 142:4eea097334d6 107 * This timeout is set very large (in the order of 100x longer than
Anna Bridge 142:4eea097334d6 108 * necessary). This is to avoid any corner cases.
Anna Bridge 142:4eea097334d6 109 */
Anna Bridge 142:4eea097334d6 110 #define MSC_PROGRAM_TIMEOUT 10000000ul
Anna Bridge 142:4eea097334d6 111
Anna Bridge 142:4eea097334d6 112 /**
Anna Bridge 142:4eea097334d6 113 * @brief
Anna Bridge 142:4eea097334d6 114 * By compiling with the define EM_MSC_RUN_FROM_FLASH, the functions
Anna Bridge 142:4eea097334d6 115 * performing erase or write operations will remain in and execute from Flash.
Anna Bridge 142:4eea097334d6 116 * This is useful for targets that don't want to allocate RAM space to
Anna Bridge 142:4eea097334d6 117 * hold the flash functions. Without this define, code for Flash operations
Anna Bridge 142:4eea097334d6 118 * will be copied into RAM at startup.
Anna Bridge 142:4eea097334d6 119 *
Anna Bridge 142:4eea097334d6 120 * @note
Anna Bridge 142:4eea097334d6 121 * This define is not present by default. The MSC controller API
Anna Bridge 142:4eea097334d6 122 * will run from RAM by default.
Anna Bridge 142:4eea097334d6 123 */
Anna Bridge 142:4eea097334d6 124 #if defined(DOXY_DOC_ONLY)
Anna Bridge 142:4eea097334d6 125 #define EM_MSC_RUN_FROM_FLASH
Anna Bridge 142:4eea097334d6 126 #endif
Anna Bridge 142:4eea097334d6 127
Anna Bridge 142:4eea097334d6 128 /*******************************************************************************
Anna Bridge 142:4eea097334d6 129 ************************* TYPEDEFS ****************************************
Anna Bridge 142:4eea097334d6 130 ******************************************************************************/
Anna Bridge 142:4eea097334d6 131
Anna Bridge 142:4eea097334d6 132 /** Return codes for writing/erasing the flash */
Anna Bridge 142:4eea097334d6 133 typedef enum
Anna Bridge 142:4eea097334d6 134 {
Anna Bridge 142:4eea097334d6 135 mscReturnOk = 0, /**< Flash write/erase successful. */
Anna Bridge 142:4eea097334d6 136 mscReturnInvalidAddr = -1, /**< Invalid address. Write to an address that is not flash. */
Anna Bridge 142:4eea097334d6 137 mscReturnLocked = -2, /**< Flash address is locked. */
Anna Bridge 142:4eea097334d6 138 mscReturnTimeOut = -3, /**< Timeout while writing to flash. */
Anna Bridge 142:4eea097334d6 139 mscReturnUnaligned = -4 /**< Unaligned access to flash. */
Anna Bridge 142:4eea097334d6 140 } MSC_Status_TypeDef;
Anna Bridge 142:4eea097334d6 141
Anna Bridge 142:4eea097334d6 142
Anna Bridge 142:4eea097334d6 143 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
Anna Bridge 142:4eea097334d6 144 /** Strategy for prioritized bus access */
Anna Bridge 142:4eea097334d6 145 typedef enum
Anna Bridge 142:4eea097334d6 146 {
Anna Bridge 142:4eea097334d6 147 mscBusStrategyCPU = MSC_READCTRL_BUSSTRATEGY_CPU, /**< Prioritize CPU bus accesses */
Anna Bridge 142:4eea097334d6 148 mscBusStrategyDMA = MSC_READCTRL_BUSSTRATEGY_DMA, /**< Prioritize DMA bus accesses */
Anna Bridge 142:4eea097334d6 149 mscBusStrategyDMAEM1 = MSC_READCTRL_BUSSTRATEGY_DMAEM1, /**< Prioritize DMAEM1 for bus accesses */
Anna Bridge 142:4eea097334d6 150 mscBusStrategyNone = MSC_READCTRL_BUSSTRATEGY_NONE /**< No unit has bus priority */
Anna Bridge 142:4eea097334d6 151 } MSC_BusStrategy_Typedef;
Anna Bridge 142:4eea097334d6 152 #endif
Anna Bridge 142:4eea097334d6 153
Anna Bridge 142:4eea097334d6 154 /** Code execution configuration */
Anna Bridge 142:4eea097334d6 155 typedef struct
Anna Bridge 142:4eea097334d6 156 {
Anna Bridge 142:4eea097334d6 157 bool scbtEn; /**< Enable Suppressed Conditional Branch Target Prefetch */
Anna Bridge 142:4eea097334d6 158 bool prefetchEn; /**< Enable MSC prefetching */
Anna Bridge 142:4eea097334d6 159 bool ifcDis; /**< Disable instruction cache */
Anna Bridge 142:4eea097334d6 160 bool aiDis; /**< Disable automatic cache invalidation on write or erase */
Anna Bridge 142:4eea097334d6 161 bool iccDis; /**< Disable automatic caching of fetches in interrupt context */
Anna Bridge 142:4eea097334d6 162 bool useHprot; /**< Use ahb_hprot to determine if the instruction is cacheable or not */
Anna Bridge 142:4eea097334d6 163 } MSC_ExecConfig_TypeDef;
Anna Bridge 142:4eea097334d6 164
Anna Bridge 142:4eea097334d6 165 /** Default MSC ExecConfig initialization */
Anna Bridge 142:4eea097334d6 166 #define MSC_EXECCONFIG_DEFAULT \
Anna Bridge 142:4eea097334d6 167 { \
Anna Bridge 142:4eea097334d6 168 false, \
Anna Bridge 142:4eea097334d6 169 true, \
Anna Bridge 142:4eea097334d6 170 false, \
Anna Bridge 142:4eea097334d6 171 false, \
Anna Bridge 142:4eea097334d6 172 false, \
Anna Bridge 142:4eea097334d6 173 false, \
Anna Bridge 142:4eea097334d6 174 }
Anna Bridge 142:4eea097334d6 175
Anna Bridge 142:4eea097334d6 176 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
Anna Bridge 142:4eea097334d6 177 /* Deprecated type names */
Anna Bridge 142:4eea097334d6 178 #define mscBusStrategy_Typedef MSC_BusStrategy_Typedef
Anna Bridge 142:4eea097334d6 179 #define msc_Return_TypeDef MSC_Status_TypeDef
Anna Bridge 142:4eea097334d6 180 /** @endcond */
Anna Bridge 142:4eea097334d6 181
Anna Bridge 142:4eea097334d6 182
Anna Bridge 142:4eea097334d6 183 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 184 * @brief
Anna Bridge 142:4eea097334d6 185 * Clear one or more pending MSC interrupts.
Anna Bridge 142:4eea097334d6 186 *
Anna Bridge 142:4eea097334d6 187 * @param[in] flags
Anna Bridge 142:4eea097334d6 188 * Pending MSC intterupt source to clear. Use a bitwise logic OR combination
Anna Bridge 142:4eea097334d6 189 * of valid interrupt flags for the MSC module (MSC_IF_nnn).
Anna Bridge 142:4eea097334d6 190 ******************************************************************************/
Anna Bridge 142:4eea097334d6 191 __STATIC_INLINE void MSC_IntClear(uint32_t flags)
Anna Bridge 142:4eea097334d6 192 {
Anna Bridge 142:4eea097334d6 193 MSC->IFC = flags;
Anna Bridge 142:4eea097334d6 194 }
Anna Bridge 142:4eea097334d6 195
Anna Bridge 142:4eea097334d6 196 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 197 * @brief
Anna Bridge 142:4eea097334d6 198 * Disable one or more MSC interrupts.
Anna Bridge 142:4eea097334d6 199 *
Anna Bridge 142:4eea097334d6 200 * @param[in] flags
Anna Bridge 142:4eea097334d6 201 * MSC interrupt sources to disable. Use a bitwise logic OR combination of
Anna Bridge 142:4eea097334d6 202 * valid interrupt flags for the MSC module (MSC_IF_nnn).
Anna Bridge 142:4eea097334d6 203 ******************************************************************************/
Anna Bridge 142:4eea097334d6 204 __STATIC_INLINE void MSC_IntDisable(uint32_t flags)
Anna Bridge 142:4eea097334d6 205 {
Anna Bridge 142:4eea097334d6 206 MSC->IEN &= ~(flags);
Anna Bridge 142:4eea097334d6 207 }
Anna Bridge 142:4eea097334d6 208
Anna Bridge 142:4eea097334d6 209
Anna Bridge 142:4eea097334d6 210 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 211 * @brief
Anna Bridge 142:4eea097334d6 212 * Enable one or more MSC interrupts.
Anna Bridge 142:4eea097334d6 213 *
Anna Bridge 142:4eea097334d6 214 * @note
Anna Bridge 142:4eea097334d6 215 * Depending on the use, a pending interrupt may already be set prior to
Anna Bridge 142:4eea097334d6 216 * enabling the interrupt. Consider using MSC_IntClear() prior to enabling
Anna Bridge 142:4eea097334d6 217 * if such a pending interrupt should be ignored.
Anna Bridge 142:4eea097334d6 218 *
Anna Bridge 142:4eea097334d6 219 * @param[in] flags
Anna Bridge 142:4eea097334d6 220 * MSC interrupt sources to enable. Use a bitwise logic OR combination of
Anna Bridge 142:4eea097334d6 221 * valid interrupt flags for the MSC module (MSC_IF_nnn).
Anna Bridge 142:4eea097334d6 222 ******************************************************************************/
Anna Bridge 142:4eea097334d6 223 __STATIC_INLINE void MSC_IntEnable(uint32_t flags)
Anna Bridge 142:4eea097334d6 224 {
Anna Bridge 142:4eea097334d6 225 MSC->IEN |= flags;
Anna Bridge 142:4eea097334d6 226 }
Anna Bridge 142:4eea097334d6 227
Anna Bridge 142:4eea097334d6 228
Anna Bridge 142:4eea097334d6 229 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 230 * @brief
Anna Bridge 142:4eea097334d6 231 * Get pending MSC interrupt flags.
Anna Bridge 142:4eea097334d6 232 *
Anna Bridge 142:4eea097334d6 233 * @note
Anna Bridge 142:4eea097334d6 234 * The event bits are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 235 *
Anna Bridge 142:4eea097334d6 236 * @return
Anna Bridge 142:4eea097334d6 237 * MSC interrupt sources pending. A bitwise logic OR combination of valid
Anna Bridge 142:4eea097334d6 238 * interrupt flags for the MSC module (MSC_IF_nnn).
Anna Bridge 142:4eea097334d6 239 ******************************************************************************/
Anna Bridge 142:4eea097334d6 240 __STATIC_INLINE uint32_t MSC_IntGet(void)
Anna Bridge 142:4eea097334d6 241 {
Anna Bridge 142:4eea097334d6 242 return(MSC->IF);
Anna Bridge 142:4eea097334d6 243 }
Anna Bridge 142:4eea097334d6 244
Anna Bridge 142:4eea097334d6 245
Anna Bridge 142:4eea097334d6 246 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 247 * @brief
Anna Bridge 142:4eea097334d6 248 * Get enabled and pending MSC interrupt flags.
Anna Bridge 142:4eea097334d6 249 * Useful for handling more interrupt sources in the same interrupt handler.
Anna Bridge 142:4eea097334d6 250 *
Anna Bridge 142:4eea097334d6 251 * @note
Anna Bridge 142:4eea097334d6 252 * Interrupt flags are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 253 *
Anna Bridge 142:4eea097334d6 254 * @return
Anna Bridge 142:4eea097334d6 255 * Pending and enabled MSC interrupt sources
Anna Bridge 142:4eea097334d6 256 * The return value is the bitwise AND of
Anna Bridge 142:4eea097334d6 257 * - the enabled interrupt sources in MSC_IEN and
Anna Bridge 142:4eea097334d6 258 * - the pending interrupt flags MSC_IF
Anna Bridge 142:4eea097334d6 259 ******************************************************************************/
Anna Bridge 142:4eea097334d6 260 __STATIC_INLINE uint32_t MSC_IntGetEnabled(void)
Anna Bridge 142:4eea097334d6 261 {
Anna Bridge 142:4eea097334d6 262 uint32_t ien;
Anna Bridge 142:4eea097334d6 263
Anna Bridge 142:4eea097334d6 264 ien = MSC->IEN;
Anna Bridge 142:4eea097334d6 265 return MSC->IF & ien;
Anna Bridge 142:4eea097334d6 266 }
Anna Bridge 142:4eea097334d6 267
Anna Bridge 142:4eea097334d6 268
Anna Bridge 142:4eea097334d6 269 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 270 * @brief
Anna Bridge 142:4eea097334d6 271 * Set one or more pending MSC interrupts from SW.
Anna Bridge 142:4eea097334d6 272 *
Anna Bridge 142:4eea097334d6 273 * @param[in] flags
Anna Bridge 142:4eea097334d6 274 * MSC interrupt sources to set to pending. Use a bitwise logic OR combination of
Anna Bridge 142:4eea097334d6 275 * valid interrupt flags for the MSC module (MSC_IF_nnn).
Anna Bridge 142:4eea097334d6 276 ******************************************************************************/
Anna Bridge 142:4eea097334d6 277 __STATIC_INLINE void MSC_IntSet(uint32_t flags)
Anna Bridge 142:4eea097334d6 278 {
Anna Bridge 142:4eea097334d6 279 MSC->IFS = flags;
Anna Bridge 142:4eea097334d6 280 }
Anna Bridge 142:4eea097334d6 281
Anna Bridge 142:4eea097334d6 282
Anna Bridge 142:4eea097334d6 283 #if defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF )
Anna Bridge 142:4eea097334d6 284 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 285 * @brief
Anna Bridge 142:4eea097334d6 286 * Starts measuring cache hit ratio.
Anna Bridge 142:4eea097334d6 287 * @details
Anna Bridge 142:4eea097334d6 288 * This function starts the performance counters. It is defined inline to
Anna Bridge 142:4eea097334d6 289 * minimize the impact of this code on the measurement itself.
Anna Bridge 142:4eea097334d6 290 ******************************************************************************/
Anna Bridge 142:4eea097334d6 291 __STATIC_INLINE void MSC_StartCacheMeasurement(void)
Anna Bridge 142:4eea097334d6 292 {
Anna Bridge 142:4eea097334d6 293 /* Clear CMOF and CHOF to catch these later */
Anna Bridge 142:4eea097334d6 294 MSC->IFC = MSC_IF_CHOF | MSC_IF_CMOF;
Anna Bridge 142:4eea097334d6 295
Anna Bridge 142:4eea097334d6 296 /* Start performance counters */
Anna Bridge 142:4eea097334d6 297 #if defined( _MSC_CACHECMD_MASK )
Anna Bridge 142:4eea097334d6 298 MSC->CACHECMD = MSC_CACHECMD_STARTPC;
Anna Bridge 142:4eea097334d6 299 #else
Anna Bridge 142:4eea097334d6 300 MSC->CMD = MSC_CMD_STARTPC;
Anna Bridge 142:4eea097334d6 301 #endif
Anna Bridge 142:4eea097334d6 302 }
Anna Bridge 142:4eea097334d6 303
Anna Bridge 142:4eea097334d6 304
Anna Bridge 142:4eea097334d6 305 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 306 * @brief
Anna Bridge 142:4eea097334d6 307 * Stops measuring the hit rate.
Anna Bridge 142:4eea097334d6 308 * @note
Anna Bridge 142:4eea097334d6 309 * This function is defined inline to minimize the impact of this
Anna Bridge 142:4eea097334d6 310 * code on the measurement itself.
Anna Bridge 142:4eea097334d6 311 * This code only works for relatively short sections of code. If you wish
Anna Bridge 142:4eea097334d6 312 * to measure longer sections of code you need to implement a IRQ Handler for
Anna Bridge 142:4eea097334d6 313 * The CHOF and CMOF overflow interrupts. Theses overflows needs to be
Anna Bridge 142:4eea097334d6 314 * counted and included in the total.
Anna Bridge 142:4eea097334d6 315 * The functions can then be implemented as follows:
Anna Bridge 142:4eea097334d6 316 * @verbatim
Anna Bridge 142:4eea097334d6 317 * volatile uint32_t hitOverflows
Anna Bridge 142:4eea097334d6 318 * volatile uint32_t missOverflows
Anna Bridge 142:4eea097334d6 319 *
Anna Bridge 142:4eea097334d6 320 * void MSC_IRQHandler(void)
Anna Bridge 142:4eea097334d6 321 * {
Anna Bridge 142:4eea097334d6 322 * uint32_t flags;
Anna Bridge 142:4eea097334d6 323 * flags = MSC->IF;
Anna Bridge 142:4eea097334d6 324 * if (flags & MSC_IF_CHOF)
Anna Bridge 142:4eea097334d6 325 * {
Anna Bridge 142:4eea097334d6 326 * MSC->IFC = MSC_IF_CHOF;
Anna Bridge 142:4eea097334d6 327 * hitOverflows++;
Anna Bridge 142:4eea097334d6 328 * }
Anna Bridge 142:4eea097334d6 329 * if (flags & MSC_IF_CMOF)
Anna Bridge 142:4eea097334d6 330 * {
Anna Bridge 142:4eea097334d6 331 * MSC->IFC = MSC_IF_CMOF;
Anna Bridge 142:4eea097334d6 332 * missOverflows++;
Anna Bridge 142:4eea097334d6 333 * }
Anna Bridge 142:4eea097334d6 334 * }
Anna Bridge 142:4eea097334d6 335 *
Anna Bridge 142:4eea097334d6 336 * void startPerformanceCounters(void)
Anna Bridge 142:4eea097334d6 337 * {
Anna Bridge 142:4eea097334d6 338 * hitOverflows = 0;
Anna Bridge 142:4eea097334d6 339 * missOverflows = 0;
Anna Bridge 142:4eea097334d6 340 *
Anna Bridge 142:4eea097334d6 341 * MSC_IntEnable(MSC_IF_CHOF | MSC_IF_CMOF);
Anna Bridge 142:4eea097334d6 342 * NVIC_EnableIRQ(MSC_IRQn);
Anna Bridge 142:4eea097334d6 343 *
Anna Bridge 142:4eea097334d6 344 * MSC_StartCacheMeasurement();
Anna Bridge 142:4eea097334d6 345 * }
Anna Bridge 142:4eea097334d6 346 * @endverbatim
Anna Bridge 142:4eea097334d6 347 * @return
Anna Bridge 142:4eea097334d6 348 * Returns -1 if there has been no cache accesses.
Anna Bridge 142:4eea097334d6 349 * Returns -2 if there has been an overflow in the performance counters.
Anna Bridge 142:4eea097334d6 350 * If not, it will return the percentage of hits versus misses.
Anna Bridge 142:4eea097334d6 351 ******************************************************************************/
Anna Bridge 142:4eea097334d6 352 __STATIC_INLINE int32_t MSC_GetCacheMeasurement(void)
Anna Bridge 142:4eea097334d6 353 {
Anna Bridge 142:4eea097334d6 354 int32_t total;
Anna Bridge 142:4eea097334d6 355 int32_t hits;
Anna Bridge 142:4eea097334d6 356 /* Stop the counter before computing the hit-rate */
Anna Bridge 142:4eea097334d6 357 #if defined( _MSC_CACHECMD_MASK )
Anna Bridge 142:4eea097334d6 358 MSC->CACHECMD = MSC_CACHECMD_STOPPC;
Anna Bridge 142:4eea097334d6 359 #else
Anna Bridge 142:4eea097334d6 360 MSC->CMD = MSC_CMD_STOPPC;
Anna Bridge 142:4eea097334d6 361 #endif
Anna Bridge 142:4eea097334d6 362
Anna Bridge 142:4eea097334d6 363 /* Check for overflows in performance counters */
Anna Bridge 142:4eea097334d6 364 if (MSC->IF & (MSC_IF_CHOF | MSC_IF_CMOF))
Anna Bridge 142:4eea097334d6 365 {
Anna Bridge 142:4eea097334d6 366 return -2;
Anna Bridge 142:4eea097334d6 367 }
Anna Bridge 142:4eea097334d6 368
Anna Bridge 142:4eea097334d6 369 hits = MSC->CACHEHITS;
Anna Bridge 142:4eea097334d6 370 total = MSC->CACHEMISSES + hits;
Anna Bridge 142:4eea097334d6 371
Anna Bridge 142:4eea097334d6 372 /* To avoid a division by zero. */
Anna Bridge 142:4eea097334d6 373 if (total == 0)
Anna Bridge 142:4eea097334d6 374 {
Anna Bridge 142:4eea097334d6 375 return -1;
Anna Bridge 142:4eea097334d6 376 }
Anna Bridge 142:4eea097334d6 377
Anna Bridge 142:4eea097334d6 378 return (hits * 100) / total;
Anna Bridge 142:4eea097334d6 379 }
Anna Bridge 142:4eea097334d6 380
Anna Bridge 142:4eea097334d6 381
Anna Bridge 142:4eea097334d6 382 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 383 * @brief
Anna Bridge 142:4eea097334d6 384 * Flush the contents of the instruction cache.
Anna Bridge 142:4eea097334d6 385 ******************************************************************************/
Anna Bridge 142:4eea097334d6 386 __STATIC_INLINE void MSC_FlushCache(void)
Anna Bridge 142:4eea097334d6 387 {
Anna Bridge 142:4eea097334d6 388 #if defined( _MSC_CACHECMD_MASK )
Anna Bridge 142:4eea097334d6 389 MSC->CACHECMD = MSC_CACHECMD_INVCACHE;
Anna Bridge 142:4eea097334d6 390 #else
Anna Bridge 142:4eea097334d6 391 MSC->CMD = MSC_CMD_INVCACHE;
Anna Bridge 142:4eea097334d6 392 #endif
Anna Bridge 142:4eea097334d6 393 }
Anna Bridge 142:4eea097334d6 394
Anna Bridge 142:4eea097334d6 395
Anna Bridge 142:4eea097334d6 396 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 397 * @brief
Anna Bridge 142:4eea097334d6 398 * Enable or disable instruction cache functionality
Anna Bridge 142:4eea097334d6 399 * @param[in] enable
Anna Bridge 142:4eea097334d6 400 * Enable instruction cache. Default is on.
Anna Bridge 142:4eea097334d6 401 ******************************************************************************/
Anna Bridge 142:4eea097334d6 402 __STATIC_INLINE void MSC_EnableCache(bool enable)
Anna Bridge 142:4eea097334d6 403 {
Anna Bridge 142:4eea097334d6 404 BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_IFCDIS_SHIFT, !enable);
Anna Bridge 142:4eea097334d6 405 }
Anna Bridge 142:4eea097334d6 406
Anna Bridge 142:4eea097334d6 407
Anna Bridge 142:4eea097334d6 408 #if defined( MSC_READCTRL_ICCDIS )
Anna Bridge 142:4eea097334d6 409 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 410 * @brief
Anna Bridge 142:4eea097334d6 411 * Enable or disable instruction cache functionality in IRQs
Anna Bridge 142:4eea097334d6 412 * @param[in] enable
Anna Bridge 142:4eea097334d6 413 * Enable instruction cache. Default is on.
Anna Bridge 142:4eea097334d6 414 ******************************************************************************/
Anna Bridge 142:4eea097334d6 415 __STATIC_INLINE void MSC_EnableCacheIRQs(bool enable)
Anna Bridge 142:4eea097334d6 416 {
Anna Bridge 142:4eea097334d6 417 BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_ICCDIS_SHIFT, !enable);
Anna Bridge 142:4eea097334d6 418 }
Anna Bridge 142:4eea097334d6 419 #endif
Anna Bridge 142:4eea097334d6 420
Anna Bridge 142:4eea097334d6 421
Anna Bridge 142:4eea097334d6 422 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 423 * @brief
Anna Bridge 142:4eea097334d6 424 * Enable or disable instruction cache flushing when writing to flash
Anna Bridge 142:4eea097334d6 425 * @param[in] enable
Anna Bridge 142:4eea097334d6 426 * Enable automatic cache flushing. Default is on.
Anna Bridge 142:4eea097334d6 427 ******************************************************************************/
Anna Bridge 142:4eea097334d6 428 __STATIC_INLINE void MSC_EnableAutoCacheFlush(bool enable)
Anna Bridge 142:4eea097334d6 429 {
Anna Bridge 142:4eea097334d6 430 BUS_RegBitWrite(&(MSC->READCTRL), _MSC_READCTRL_AIDIS_SHIFT, !enable);
Anna Bridge 142:4eea097334d6 431 }
Anna Bridge 142:4eea097334d6 432 #endif /* defined( MSC_IF_CHOF ) && defined( MSC_IF_CMOF ) */
Anna Bridge 142:4eea097334d6 433
Anna Bridge 142:4eea097334d6 434
Anna Bridge 142:4eea097334d6 435 #if defined( _MSC_READCTRL_BUSSTRATEGY_MASK )
Anna Bridge 142:4eea097334d6 436 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 437 * @brief
Anna Bridge 142:4eea097334d6 438 * Configure which unit should get priority on system bus.
Anna Bridge 142:4eea097334d6 439 * @param[in] mode
Anna Bridge 142:4eea097334d6 440 * Unit to prioritize bus accesses for.
Anna Bridge 142:4eea097334d6 441 ******************************************************************************/
Anna Bridge 142:4eea097334d6 442 __STATIC_INLINE void MSC_BusStrategy(mscBusStrategy_Typedef mode)
Anna Bridge 142:4eea097334d6 443 {
Anna Bridge 142:4eea097334d6 444 MSC->READCTRL = (MSC->READCTRL & ~(_MSC_READCTRL_BUSSTRATEGY_MASK)) | mode;
Anna Bridge 142:4eea097334d6 445 }
Anna Bridge 142:4eea097334d6 446 #endif
Anna Bridge 142:4eea097334d6 447
Anna Bridge 142:4eea097334d6 448
Anna Bridge 142:4eea097334d6 449 /*******************************************************************************
Anna Bridge 142:4eea097334d6 450 ************************* PROTOTYPES **************************************
Anna Bridge 142:4eea097334d6 451 ******************************************************************************/
Anna Bridge 142:4eea097334d6 452
Anna Bridge 142:4eea097334d6 453 void MSC_Init(void);
Anna Bridge 142:4eea097334d6 454 void MSC_Deinit(void);
Anna Bridge 142:4eea097334d6 455 void MSC_ExecConfigSet(MSC_ExecConfig_TypeDef *execConfig);
Anna Bridge 142:4eea097334d6 456
Anna Bridge 142:4eea097334d6 457 #if defined(EM_MSC_RUN_FROM_FLASH)
Anna Bridge 142:4eea097334d6 458 /** @brief Expands to @ref SL_RAMFUNC_DECLARATOR if @ref EM_MSC_RUN_FROM_FLASH is undefined and to nothing if @ref EM_MSC_RUN_FROM_FLASH is defined. */
Anna Bridge 142:4eea097334d6 459 #define MSC_RAMFUNC_DECLARATOR
Anna Bridge 142:4eea097334d6 460 /** @brief Expands to @ref SL_RAMFUNC_DEFINITION_BEGIN if @ref EM_MSC_RUN_FROM_FLASH is undefined and to nothing if @ref EM_MSC_RUN_FROM_FLASH is defined. */
Anna Bridge 142:4eea097334d6 461 #define MSC_RAMFUNC_DEFINITION_BEGIN
Anna Bridge 142:4eea097334d6 462 /** @brief Expands to @ref SL_RAMFUNC_DEFINITION_END if @ref EM_MSC_RUN_FROM_FLASH is undefined and to nothing if @ref EM_MSC_RUN_FROM_FLASH is defined. */
Anna Bridge 142:4eea097334d6 463 #define MSC_RAMFUNC_DEFINITION_END
Anna Bridge 142:4eea097334d6 464 #else
Anna Bridge 142:4eea097334d6 465 #define MSC_RAMFUNC_DECLARATOR SL_RAMFUNC_DECLARATOR
Anna Bridge 142:4eea097334d6 466 #define MSC_RAMFUNC_DEFINITION_BEGIN SL_RAMFUNC_DEFINITION_BEGIN
Anna Bridge 142:4eea097334d6 467 #define MSC_RAMFUNC_DEFINITION_END SL_RAMFUNC_DEFINITION_END
Anna Bridge 142:4eea097334d6 468 #endif
Anna Bridge 142:4eea097334d6 469
Anna Bridge 142:4eea097334d6 470 MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef
Anna Bridge 142:4eea097334d6 471 MSC_WriteWord(uint32_t *address,
Anna Bridge 142:4eea097334d6 472 void const *data,
Anna Bridge 142:4eea097334d6 473 uint32_t numBytes);
Anna Bridge 142:4eea097334d6 474
Anna Bridge 142:4eea097334d6 475 #if !defined( _EFM32_GECKO_FAMILY )
Anna Bridge 142:4eea097334d6 476 MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef
Anna Bridge 142:4eea097334d6 477 MSC_WriteWordFast(uint32_t *address,
Anna Bridge 142:4eea097334d6 478 void const *data,
Anna Bridge 142:4eea097334d6 479 uint32_t numBytes);
Anna Bridge 142:4eea097334d6 480
Anna Bridge 142:4eea097334d6 481 #endif
Anna Bridge 142:4eea097334d6 482
Anna Bridge 142:4eea097334d6 483 MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef
Anna Bridge 142:4eea097334d6 484 MSC_ErasePage(uint32_t *startAddress);
Anna Bridge 142:4eea097334d6 485
Anna Bridge 142:4eea097334d6 486 #if defined( _MSC_MASSLOCK_MASK )
Anna Bridge 142:4eea097334d6 487 MSC_RAMFUNC_DECLARATOR MSC_Status_TypeDef
Anna Bridge 142:4eea097334d6 488 MSC_MassErase(void);
Anna Bridge 142:4eea097334d6 489 #endif
Anna Bridge 142:4eea097334d6 490
Anna Bridge 142:4eea097334d6 491 /** @} (end addtogroup MSC) */
Anna Bridge 142:4eea097334d6 492 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 493
Anna Bridge 142:4eea097334d6 494 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 495 }
Anna Bridge 142:4eea097334d6 496 #endif
Anna Bridge 142:4eea097334d6 497
Anna Bridge 142:4eea097334d6 498 #endif /* defined(MSC_COUNT) && (MSC_COUNT > 0) */
Anna Bridge 142:4eea097334d6 499 #endif /* EM_MSC_H */