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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_TB_SENSE_1/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_dma.h@142:4eea097334d6, 2017-05-10 (annotated)

Committer:
Anna Bridge
Date:
Wed May 10 11:31:27 2017 +0100
Revision:
142:4eea097334d6
Child:
159:7130f322cb7e
Release 142 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



4059: [Silicon Labs] Rename targets https://github.com/ARMmbed/mbed-os/pull/4059

4187: [NCS36510] Reduce default heap size allocated by IAR to 1/4 of RAM https://github.com/ARMmbed/mbed-os/pull/4187

4225: fixed missing device_name for xDot and removed progen https://github.com/ARMmbed/mbed-os/pull/4225

4251: Fix C++11 build error w/ u-blox EVK-ODIN-W2 https://github.com/ARMmbed/mbed-os/pull/4251

4236: STM32 Fixed warning related to __packed redefinition https://github.com/ARMmbed/mbed-os/pull/4236

4190: LPC4088: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/4190

4260: Inherit Xadow M0 target from LPC11U35_501 https://github.com/ARMmbed/mbed-os/pull/4260

4249: Add consistent button names across targets https://github.com/ARMmbed/mbed-os/pull/4249

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_dma.h
Anna Bridge 142:4eea097334d6 3 * @brief Direct memory access (DMA) API
Anna Bridge 142:4eea097334d6 4 * @version 5.1.2
Anna Bridge 142:4eea097334d6 5 *******************************************************************************
Anna Bridge 142:4eea097334d6 6 * @section License
Anna Bridge 142:4eea097334d6 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 8 *******************************************************************************
Anna Bridge 142:4eea097334d6 9 *
Anna Bridge 142:4eea097334d6 10 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 11 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 12 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 13 *
Anna Bridge 142:4eea097334d6 14 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 15 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 16 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 17 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 18 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 19 *
Anna Bridge 142:4eea097334d6 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 21 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 22 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 23 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 24 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 25 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 26 *
Anna Bridge 142:4eea097334d6 27 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 28 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 29 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 30 *
Anna Bridge 142:4eea097334d6 31 ******************************************************************************/
Anna Bridge 142:4eea097334d6 32
Anna Bridge 142:4eea097334d6 33 #ifndef EM_DMA_H
Anna Bridge 142:4eea097334d6 34 #define EM_DMA_H
Anna Bridge 142:4eea097334d6 35
Anna Bridge 142:4eea097334d6 36 #include "em_device.h"
Anna Bridge 142:4eea097334d6 37 #if defined( DMA_PRESENT )
Anna Bridge 142:4eea097334d6 38
Anna Bridge 142:4eea097334d6 39 #include <stdio.h>
Anna Bridge 142:4eea097334d6 40 #include <stdbool.h>
Anna Bridge 142:4eea097334d6 41
Anna Bridge 142:4eea097334d6 42 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 43 extern "C" {
Anna Bridge 142:4eea097334d6 44 #endif
Anna Bridge 142:4eea097334d6 45
Anna Bridge 142:4eea097334d6 46 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 47 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 48 * @{
Anna Bridge 142:4eea097334d6 49 ******************************************************************************/
Anna Bridge 142:4eea097334d6 50
Anna Bridge 142:4eea097334d6 51 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 52 * @addtogroup DMA
Anna Bridge 142:4eea097334d6 53 * @{
Anna Bridge 142:4eea097334d6 54 ******************************************************************************/
Anna Bridge 142:4eea097334d6 55
Anna Bridge 142:4eea097334d6 56 /*******************************************************************************
Anna Bridge 142:4eea097334d6 57 ******************************** ENUMS ************************************
Anna Bridge 142:4eea097334d6 58 ******************************************************************************/
Anna Bridge 142:4eea097334d6 59
Anna Bridge 142:4eea097334d6 60 /**
Anna Bridge 142:4eea097334d6 61 * Amount source/destination address should be incremented for each data
Anna Bridge 142:4eea097334d6 62 * transfer.
Anna Bridge 142:4eea097334d6 63 */
Anna Bridge 142:4eea097334d6 64 typedef enum
Anna Bridge 142:4eea097334d6 65 {
Anna Bridge 142:4eea097334d6 66 dmaDataInc1 = _DMA_CTRL_SRC_INC_BYTE, /**< Increment address 1 byte. */
Anna Bridge 142:4eea097334d6 67 dmaDataInc2 = _DMA_CTRL_SRC_INC_HALFWORD, /**< Increment address 2 bytes. */
Anna Bridge 142:4eea097334d6 68 dmaDataInc4 = _DMA_CTRL_SRC_INC_WORD, /**< Increment address 4 bytes. */
Anna Bridge 142:4eea097334d6 69 dmaDataIncNone = _DMA_CTRL_SRC_INC_NONE /**< Do not increment address. */
Anna Bridge 142:4eea097334d6 70 } DMA_DataInc_TypeDef;
Anna Bridge 142:4eea097334d6 71
Anna Bridge 142:4eea097334d6 72
Anna Bridge 142:4eea097334d6 73 /** Data sizes (in number of bytes) to be read/written by DMA transfer. */
Anna Bridge 142:4eea097334d6 74 typedef enum
Anna Bridge 142:4eea097334d6 75 {
Anna Bridge 142:4eea097334d6 76 dmaDataSize1 = _DMA_CTRL_SRC_SIZE_BYTE, /**< 1 byte DMA transfer size. */
Anna Bridge 142:4eea097334d6 77 dmaDataSize2 = _DMA_CTRL_SRC_SIZE_HALFWORD, /**< 2 byte DMA transfer size. */
Anna Bridge 142:4eea097334d6 78 dmaDataSize4 = _DMA_CTRL_SRC_SIZE_WORD /**< 4 byte DMA transfer size. */
Anna Bridge 142:4eea097334d6 79 } DMA_DataSize_TypeDef;
Anna Bridge 142:4eea097334d6 80
Anna Bridge 142:4eea097334d6 81
Anna Bridge 142:4eea097334d6 82 /** Type of DMA transfer. */
Anna Bridge 142:4eea097334d6 83 typedef enum
Anna Bridge 142:4eea097334d6 84 {
Anna Bridge 142:4eea097334d6 85 /** Basic DMA cycle. */
Anna Bridge 142:4eea097334d6 86 dmaCycleCtrlBasic = _DMA_CTRL_CYCLE_CTRL_BASIC,
Anna Bridge 142:4eea097334d6 87 /** Auto-request DMA cycle. */
Anna Bridge 142:4eea097334d6 88 dmaCycleCtrlAuto = _DMA_CTRL_CYCLE_CTRL_AUTO,
Anna Bridge 142:4eea097334d6 89 /** Ping-pong DMA cycle. */
Anna Bridge 142:4eea097334d6 90 dmaCycleCtrlPingPong = _DMA_CTRL_CYCLE_CTRL_PINGPONG,
Anna Bridge 142:4eea097334d6 91 /** Memory scatter-gather DMA cycle. */
Anna Bridge 142:4eea097334d6 92 dmaCycleCtrlMemScatterGather = _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER,
Anna Bridge 142:4eea097334d6 93 /** Peripheral scatter-gather DMA cycle. */
Anna Bridge 142:4eea097334d6 94 dmaCycleCtrlPerScatterGather = _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER
Anna Bridge 142:4eea097334d6 95 } DMA_CycleCtrl_TypeDef;
Anna Bridge 142:4eea097334d6 96
Anna Bridge 142:4eea097334d6 97
Anna Bridge 142:4eea097334d6 98 /** Number of transfers before controller does new arbitration. */
Anna Bridge 142:4eea097334d6 99 typedef enum
Anna Bridge 142:4eea097334d6 100 {
Anna Bridge 142:4eea097334d6 101 dmaArbitrate1 = _DMA_CTRL_R_POWER_1, /**< Arbitrate after 1 DMA transfer. */
Anna Bridge 142:4eea097334d6 102 dmaArbitrate2 = _DMA_CTRL_R_POWER_2, /**< Arbitrate after 2 DMA transfers. */
Anna Bridge 142:4eea097334d6 103 dmaArbitrate4 = _DMA_CTRL_R_POWER_4, /**< Arbitrate after 4 DMA transfers. */
Anna Bridge 142:4eea097334d6 104 dmaArbitrate8 = _DMA_CTRL_R_POWER_8, /**< Arbitrate after 8 DMA transfers. */
Anna Bridge 142:4eea097334d6 105 dmaArbitrate16 = _DMA_CTRL_R_POWER_16, /**< Arbitrate after 16 DMA transfers. */
Anna Bridge 142:4eea097334d6 106 dmaArbitrate32 = _DMA_CTRL_R_POWER_32, /**< Arbitrate after 32 DMA transfers. */
Anna Bridge 142:4eea097334d6 107 dmaArbitrate64 = _DMA_CTRL_R_POWER_64, /**< Arbitrate after 64 DMA transfers. */
Anna Bridge 142:4eea097334d6 108 dmaArbitrate128 = _DMA_CTRL_R_POWER_128, /**< Arbitrate after 128 DMA transfers. */
Anna Bridge 142:4eea097334d6 109 dmaArbitrate256 = _DMA_CTRL_R_POWER_256, /**< Arbitrate after 256 DMA transfers. */
Anna Bridge 142:4eea097334d6 110 dmaArbitrate512 = _DMA_CTRL_R_POWER_512, /**< Arbitrate after 512 DMA transfers. */
Anna Bridge 142:4eea097334d6 111 dmaArbitrate1024 = _DMA_CTRL_R_POWER_1024 /**< Arbitrate after 1024 DMA transfers. */
Anna Bridge 142:4eea097334d6 112 } DMA_ArbiterConfig_TypeDef;
Anna Bridge 142:4eea097334d6 113
Anna Bridge 142:4eea097334d6 114
Anna Bridge 142:4eea097334d6 115 /*******************************************************************************
Anna Bridge 142:4eea097334d6 116 ******************************* STRUCTS ***********************************
Anna Bridge 142:4eea097334d6 117 ******************************************************************************/
Anna Bridge 142:4eea097334d6 118
Anna Bridge 142:4eea097334d6 119 /**
Anna Bridge 142:4eea097334d6 120 * @brief
Anna Bridge 142:4eea097334d6 121 * DMA interrupt callback function pointer.
Anna Bridge 142:4eea097334d6 122 * @details
Anna Bridge 142:4eea097334d6 123 * Parameters:
Anna Bridge 142:4eea097334d6 124 * @li channel - The DMA channel the callback function is invoked for.
Anna Bridge 142:4eea097334d6 125 * @li primary - Indicates if callback is invoked for completion of primary
Anna Bridge 142:4eea097334d6 126 * (true) or alternate (false) descriptor. This is mainly useful for
Anna Bridge 142:4eea097334d6 127 * ping-pong DMA cycles, in order to know which descriptor to refresh.
Anna Bridge 142:4eea097334d6 128 * @li user - User definable reference that may be used to pass information
Anna Bridge 142:4eea097334d6 129 * to be used by the callback handler. If used, the referenced data must be
Anna Bridge 142:4eea097334d6 130 * valid at the point when the interrupt handler invokes the callback.
Anna Bridge 142:4eea097334d6 131 * If callback changes any data in the provided user structure, remember
Anna Bridge 142:4eea097334d6 132 * that those changes are done in interrupt context, and proper protection
Anna Bridge 142:4eea097334d6 133 * of data may be required.
Anna Bridge 142:4eea097334d6 134 */
Anna Bridge 142:4eea097334d6 135 typedef void (*DMA_FuncPtr_TypeDef)(unsigned int channel, bool primary, void *user);
Anna Bridge 142:4eea097334d6 136
Anna Bridge 142:4eea097334d6 137
Anna Bridge 142:4eea097334d6 138 /**
Anna Bridge 142:4eea097334d6 139 * @brief
Anna Bridge 142:4eea097334d6 140 * Callback structure that can be used to define DMA complete actions.
Anna Bridge 142:4eea097334d6 141 * @details
Anna Bridge 142:4eea097334d6 142 * A reference to this structure is only stored in the primary descriptor
Anna Bridge 142:4eea097334d6 143 * for a channel (if callback feature is used). If callback is required
Anna Bridge 142:4eea097334d6 144 * for both primary and alternate descriptor completion, this must be
Anna Bridge 142:4eea097334d6 145 * handled by one common callback, using the provided 'primary' parameter
Anna Bridge 142:4eea097334d6 146 * with the callback function.
Anna Bridge 142:4eea097334d6 147 */
Anna Bridge 142:4eea097334d6 148 typedef struct
Anna Bridge 142:4eea097334d6 149 {
Anna Bridge 142:4eea097334d6 150 /**
Anna Bridge 142:4eea097334d6 151 * Pointer to callback function to invoke when DMA transfer cycle done.
Anna Bridge 142:4eea097334d6 152 * Notice that this function is invoked in interrupt context, and therefore
Anna Bridge 142:4eea097334d6 153 * should be short and non-blocking.
Anna Bridge 142:4eea097334d6 154 */
Anna Bridge 142:4eea097334d6 155 DMA_FuncPtr_TypeDef cbFunc;
Anna Bridge 142:4eea097334d6 156
Anna Bridge 142:4eea097334d6 157 /** User defined pointer to provide with callback function. */
Anna Bridge 142:4eea097334d6 158 void *userPtr;
Anna Bridge 142:4eea097334d6 159
Anna Bridge 142:4eea097334d6 160 /**
Anna Bridge 142:4eea097334d6 161 * For internal use only: Indicates if next callback applies to primary
Anna Bridge 142:4eea097334d6 162 * or alternate descriptor completion. Mainly useful for ping-pong DMA
Anna Bridge 142:4eea097334d6 163 * cycles. Set this value to 0 prior to configuring callback handling.
Anna Bridge 142:4eea097334d6 164 */
Anna Bridge 142:4eea097334d6 165 uint8_t primary;
Anna Bridge 142:4eea097334d6 166 } DMA_CB_TypeDef;
Anna Bridge 142:4eea097334d6 167
Anna Bridge 142:4eea097334d6 168
Anna Bridge 142:4eea097334d6 169 /** Configuration structure for a channel. */
Anna Bridge 142:4eea097334d6 170 typedef struct
Anna Bridge 142:4eea097334d6 171 {
Anna Bridge 142:4eea097334d6 172 /**
Anna Bridge 142:4eea097334d6 173 * Select if channel priority is in the high or default priority group
Anna Bridge 142:4eea097334d6 174 * with respect to arbitration. Within a priority group, lower numbered
Anna Bridge 142:4eea097334d6 175 * channels have higher priority than higher numbered channels.
Anna Bridge 142:4eea097334d6 176 */
Anna Bridge 142:4eea097334d6 177 bool highPri;
Anna Bridge 142:4eea097334d6 178
Anna Bridge 142:4eea097334d6 179 /**
Anna Bridge 142:4eea097334d6 180 * Select if interrupt shall be enabled for channel (triggering interrupt
Anna Bridge 142:4eea097334d6 181 * handler when dma_done signal is asserted). It should normally be
Anna Bridge 142:4eea097334d6 182 * enabled if using the callback feature for a channel, and disabled if
Anna Bridge 142:4eea097334d6 183 * not using the callback feature.
Anna Bridge 142:4eea097334d6 184 */
Anna Bridge 142:4eea097334d6 185 bool enableInt;
Anna Bridge 142:4eea097334d6 186
Anna Bridge 142:4eea097334d6 187 /**
Anna Bridge 142:4eea097334d6 188 * Channel control specifying the source of DMA signals. If accessing
Anna Bridge 142:4eea097334d6 189 * peripherals, use one of the DMAREQ_nnn defines available for the
Anna Bridge 142:4eea097334d6 190 * peripheral. Set it to 0 for memory-to-memory DMA cycles.
Anna Bridge 142:4eea097334d6 191 */
Anna Bridge 142:4eea097334d6 192 uint32_t select;
Anna Bridge 142:4eea097334d6 193
Anna Bridge 142:4eea097334d6 194 /**
Anna Bridge 142:4eea097334d6 195 * @brief
Anna Bridge 142:4eea097334d6 196 * User definable callback handling configuration.
Anna Bridge 142:4eea097334d6 197 * @details
Anna Bridge 142:4eea097334d6 198 * Please refer to structure definition for details. The callback
Anna Bridge 142:4eea097334d6 199 * is invoked when the specified DMA cycle is complete (when dma_done
Anna Bridge 142:4eea097334d6 200 * signal asserted). The callback is invoked in interrupt context,
Anna Bridge 142:4eea097334d6 201 * and should be efficient and non-blocking. Set to NULL to not
Anna Bridge 142:4eea097334d6 202 * use the callback feature.
Anna Bridge 142:4eea097334d6 203 * @note
Anna Bridge 142:4eea097334d6 204 * The referenced structure is used by the interrupt handler, and must
Anna Bridge 142:4eea097334d6 205 * be available until no longer used. Thus, in most cases it should
Anna Bridge 142:4eea097334d6 206 * not be located on the stack.
Anna Bridge 142:4eea097334d6 207 */
Anna Bridge 142:4eea097334d6 208 DMA_CB_TypeDef *cb;
Anna Bridge 142:4eea097334d6 209 } DMA_CfgChannel_TypeDef;
Anna Bridge 142:4eea097334d6 210
Anna Bridge 142:4eea097334d6 211
Anna Bridge 142:4eea097334d6 212 /**
Anna Bridge 142:4eea097334d6 213 * Configuration structure for primary or alternate descriptor
Anna Bridge 142:4eea097334d6 214 * (not used for scatter-gather DMA cycles).
Anna Bridge 142:4eea097334d6 215 */
Anna Bridge 142:4eea097334d6 216 typedef struct
Anna Bridge 142:4eea097334d6 217 {
Anna Bridge 142:4eea097334d6 218 /** Destination increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 219 DMA_DataInc_TypeDef dstInc;
Anna Bridge 142:4eea097334d6 220
Anna Bridge 142:4eea097334d6 221 /** Source increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 222 DMA_DataInc_TypeDef srcInc;
Anna Bridge 142:4eea097334d6 223
Anna Bridge 142:4eea097334d6 224 /** DMA transfer unit size. */
Anna Bridge 142:4eea097334d6 225 DMA_DataSize_TypeDef size;
Anna Bridge 142:4eea097334d6 226
Anna Bridge 142:4eea097334d6 227 /**
Anna Bridge 142:4eea097334d6 228 * Arbitration rate, ie number of DMA transfers done before rearbitration
Anna Bridge 142:4eea097334d6 229 * takes place.
Anna Bridge 142:4eea097334d6 230 */
Anna Bridge 142:4eea097334d6 231 DMA_ArbiterConfig_TypeDef arbRate;
Anna Bridge 142:4eea097334d6 232
Anna Bridge 142:4eea097334d6 233 /**
Anna Bridge 142:4eea097334d6 234 * HPROT signal state, please refer to reference manual, DMA chapter for
Anna Bridge 142:4eea097334d6 235 * further details. Normally set to 0 if protection is not an issue.
Anna Bridge 142:4eea097334d6 236 * The following bits are available:
Anna Bridge 142:4eea097334d6 237 * @li bit 0 - HPROT[1] control for source read accesses,
Anna Bridge 142:4eea097334d6 238 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 239 * @li bit 3 - HPROT[1] control for destination write accesses,
Anna Bridge 142:4eea097334d6 240 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 241 */
Anna Bridge 142:4eea097334d6 242 uint8_t hprot;
Anna Bridge 142:4eea097334d6 243 } DMA_CfgDescr_TypeDef;
Anna Bridge 142:4eea097334d6 244
Anna Bridge 142:4eea097334d6 245
Anna Bridge 142:4eea097334d6 246 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
Anna Bridge 142:4eea097334d6 247 /**
Anna Bridge 142:4eea097334d6 248 * Configuration structure for loop mode
Anna Bridge 142:4eea097334d6 249 */
Anna Bridge 142:4eea097334d6 250 typedef struct
Anna Bridge 142:4eea097334d6 251 {
Anna Bridge 142:4eea097334d6 252 /** Enable repeated loop */
Anna Bridge 142:4eea097334d6 253 bool enable;
Anna Bridge 142:4eea097334d6 254 /** Width of transfer, reload value for nMinus1 */
Anna Bridge 142:4eea097334d6 255 uint16_t nMinus1;
Anna Bridge 142:4eea097334d6 256 } DMA_CfgLoop_TypeDef;
Anna Bridge 142:4eea097334d6 257 #endif
Anna Bridge 142:4eea097334d6 258
Anna Bridge 142:4eea097334d6 259
Anna Bridge 142:4eea097334d6 260 #if defined( _DMA_RECT0_MASK )
Anna Bridge 142:4eea097334d6 261 /**
Anna Bridge 142:4eea097334d6 262 * Configuration structure for rectangular copy
Anna Bridge 142:4eea097334d6 263 */
Anna Bridge 142:4eea097334d6 264 typedef struct
Anna Bridge 142:4eea097334d6 265 {
Anna Bridge 142:4eea097334d6 266 /** DMA channel destination stride (width of destination image, distance between lines) */
Anna Bridge 142:4eea097334d6 267 uint16_t dstStride;
Anna Bridge 142:4eea097334d6 268 /** DMA channel source stride (width of source image, distance between lines) */
Anna Bridge 142:4eea097334d6 269 uint16_t srcStride;
Anna Bridge 142:4eea097334d6 270 /** 2D copy height */
Anna Bridge 142:4eea097334d6 271 uint16_t height;
Anna Bridge 142:4eea097334d6 272 } DMA_CfgRect_TypeDef;
Anna Bridge 142:4eea097334d6 273 #endif
Anna Bridge 142:4eea097334d6 274
Anna Bridge 142:4eea097334d6 275
Anna Bridge 142:4eea097334d6 276 /** Configuration structure for alternate scatter-gather descriptor. */
Anna Bridge 142:4eea097334d6 277 typedef struct
Anna Bridge 142:4eea097334d6 278 {
Anna Bridge 142:4eea097334d6 279 /** Pointer to location to transfer data from. */
Anna Bridge 142:4eea097334d6 280 void *src;
Anna Bridge 142:4eea097334d6 281
Anna Bridge 142:4eea097334d6 282 /** Pointer to location to transfer data to. */
Anna Bridge 142:4eea097334d6 283 void *dst;
Anna Bridge 142:4eea097334d6 284
Anna Bridge 142:4eea097334d6 285 /** Destination increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 286 DMA_DataInc_TypeDef dstInc;
Anna Bridge 142:4eea097334d6 287
Anna Bridge 142:4eea097334d6 288 /** Source increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 289 DMA_DataInc_TypeDef srcInc;
Anna Bridge 142:4eea097334d6 290
Anna Bridge 142:4eea097334d6 291 /** DMA transfer unit size. */
Anna Bridge 142:4eea097334d6 292 DMA_DataSize_TypeDef size;
Anna Bridge 142:4eea097334d6 293
Anna Bridge 142:4eea097334d6 294 /**
Anna Bridge 142:4eea097334d6 295 * Arbitration rate, ie number of DMA transfers done before rearbitration
Anna Bridge 142:4eea097334d6 296 * takes place.
Anna Bridge 142:4eea097334d6 297 */
Anna Bridge 142:4eea097334d6 298 DMA_ArbiterConfig_TypeDef arbRate;
Anna Bridge 142:4eea097334d6 299
Anna Bridge 142:4eea097334d6 300 /** Number of DMA transfers minus 1 to do. Must be <= 1023. */
Anna Bridge 142:4eea097334d6 301 uint16_t nMinus1;
Anna Bridge 142:4eea097334d6 302
Anna Bridge 142:4eea097334d6 303 /**
Anna Bridge 142:4eea097334d6 304 * HPROT signal state, please refer to reference manual, DMA chapter for
Anna Bridge 142:4eea097334d6 305 * further details. Normally set to 0 if protection is not an issue.
Anna Bridge 142:4eea097334d6 306 * The following bits are available:
Anna Bridge 142:4eea097334d6 307 * @li bit 0 - HPROT[1] control for source read accesses,
Anna Bridge 142:4eea097334d6 308 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 309 * @li bit 3 - HPROT[1] control for destination write accesses,
Anna Bridge 142:4eea097334d6 310 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 311 */
Anna Bridge 142:4eea097334d6 312 uint8_t hprot;
Anna Bridge 142:4eea097334d6 313
Anna Bridge 142:4eea097334d6 314 /** Specify if a memory or peripheral scatter-gather DMA cycle. Notice
Anna Bridge 142:4eea097334d6 315 * that this parameter should be the same for all alternate
Anna Bridge 142:4eea097334d6 316 * descriptors.
Anna Bridge 142:4eea097334d6 317 * @li true - this is a peripheral scatter-gather cycle
Anna Bridge 142:4eea097334d6 318 * @li false - this is a memory scatter-gather cycle
Anna Bridge 142:4eea097334d6 319 */
Anna Bridge 142:4eea097334d6 320 bool peripheral;
Anna Bridge 142:4eea097334d6 321 } DMA_CfgDescrSGAlt_TypeDef;
Anna Bridge 142:4eea097334d6 322
Anna Bridge 142:4eea097334d6 323
Anna Bridge 142:4eea097334d6 324 /** DMA init structure */
Anna Bridge 142:4eea097334d6 325 typedef struct
Anna Bridge 142:4eea097334d6 326 {
Anna Bridge 142:4eea097334d6 327 /**
Anna Bridge 142:4eea097334d6 328 * HPROT signal state when accessing the primary/alternate
Anna Bridge 142:4eea097334d6 329 * descriptors. Normally set to 0 if protection is not an issue.
Anna Bridge 142:4eea097334d6 330 * The following bits are available:
Anna Bridge 142:4eea097334d6 331 * @li bit 0 - HPROT[1] control for descriptor accesses (ie when
Anna Bridge 142:4eea097334d6 332 * the DMA controller accesses the channel control block itself),
Anna Bridge 142:4eea097334d6 333 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 334 */
Anna Bridge 142:4eea097334d6 335 uint8_t hprot;
Anna Bridge 142:4eea097334d6 336
Anna Bridge 142:4eea097334d6 337 /**
Anna Bridge 142:4eea097334d6 338 * Pointer to the controlblock in memory holding descriptors (channel
Anna Bridge 142:4eea097334d6 339 * control data structures). This memory must be properly aligned
Anna Bridge 142:4eea097334d6 340 * at a 256 bytes. I.e. the 8 least significant bits must be zero.
Anna Bridge 142:4eea097334d6 341 *
Anna Bridge 142:4eea097334d6 342 * Please refer to the reference manual, DMA chapter for more details.
Anna Bridge 142:4eea097334d6 343 *
Anna Bridge 142:4eea097334d6 344 * It is possible to provide a smaller memory block, only covering
Anna Bridge 142:4eea097334d6 345 * those channels actually used, if not all available channels are used.
Anna Bridge 142:4eea097334d6 346 * Ie, if only using 4 channels (0-3), both primary and alternate
Anna Bridge 142:4eea097334d6 347 * structures, then only 16*2*4 = 128 bytes must be provided. This
Anna Bridge 142:4eea097334d6 348 * implementation has however no check if later exceeding such a limit
Anna Bridge 142:4eea097334d6 349 * by configuring for instance channel 4, in which case memory overwrite
Anna Bridge 142:4eea097334d6 350 * of some other data will occur.
Anna Bridge 142:4eea097334d6 351 */
Anna Bridge 142:4eea097334d6 352 DMA_DESCRIPTOR_TypeDef *controlBlock;
Anna Bridge 142:4eea097334d6 353 } DMA_Init_TypeDef;
Anna Bridge 142:4eea097334d6 354
Anna Bridge 142:4eea097334d6 355
Anna Bridge 142:4eea097334d6 356 /*******************************************************************************
Anna Bridge 142:4eea097334d6 357 ***************************** PROTOTYPES **********************************
Anna Bridge 142:4eea097334d6 358 ******************************************************************************/
Anna Bridge 142:4eea097334d6 359
Anna Bridge 142:4eea097334d6 360 void DMA_ActivateAuto(unsigned int channel,
Anna Bridge 142:4eea097334d6 361 bool primary,
Anna Bridge 142:4eea097334d6 362 void *dst,
Anna Bridge 142:4eea097334d6 363 const void *src,
Anna Bridge 142:4eea097334d6 364 unsigned int nMinus1);
Anna Bridge 142:4eea097334d6 365 void DMA_ActivateBasic(unsigned int channel,
Anna Bridge 142:4eea097334d6 366 bool primary,
Anna Bridge 142:4eea097334d6 367 bool useBurst,
Anna Bridge 142:4eea097334d6 368 void *dst,
Anna Bridge 142:4eea097334d6 369 const void *src,
Anna Bridge 142:4eea097334d6 370 unsigned int nMinus1);
Anna Bridge 142:4eea097334d6 371 void DMA_ActivatePingPong(unsigned int channel,
Anna Bridge 142:4eea097334d6 372 bool useBurst,
Anna Bridge 142:4eea097334d6 373 void *primDst,
Anna Bridge 142:4eea097334d6 374 const void *primSrc,
Anna Bridge 142:4eea097334d6 375 unsigned int primNMinus1,
Anna Bridge 142:4eea097334d6 376 void *altDst,
Anna Bridge 142:4eea097334d6 377 const void *altSrc,
Anna Bridge 142:4eea097334d6 378 unsigned int altNMinus1);
Anna Bridge 142:4eea097334d6 379 void DMA_ActivateScatterGather(unsigned int channel,
Anna Bridge 142:4eea097334d6 380 bool useBurst,
Anna Bridge 142:4eea097334d6 381 DMA_DESCRIPTOR_TypeDef *altDescr,
Anna Bridge 142:4eea097334d6 382 unsigned int count);
Anna Bridge 142:4eea097334d6 383 void DMA_CfgChannel(unsigned int channel, DMA_CfgChannel_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 384 void DMA_CfgDescr(unsigned int channel,
Anna Bridge 142:4eea097334d6 385 bool primary,
Anna Bridge 142:4eea097334d6 386 DMA_CfgDescr_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 387 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
Anna Bridge 142:4eea097334d6 388 void DMA_CfgLoop(unsigned int channel, DMA_CfgLoop_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 389 #endif
Anna Bridge 142:4eea097334d6 390
Anna Bridge 142:4eea097334d6 391 #if defined( _DMA_RECT0_MASK )
Anna Bridge 142:4eea097334d6 392 void DMA_CfgRect(unsigned int channel, DMA_CfgRect_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 393 #endif
Anna Bridge 142:4eea097334d6 394
Anna Bridge 142:4eea097334d6 395 #if defined( _DMA_LOOP0_MASK ) && defined( _DMA_LOOP1_MASK )
Anna Bridge 142:4eea097334d6 396 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 397 * @brief
Anna Bridge 142:4eea097334d6 398 * Clear Loop configuration for channel
Anna Bridge 142:4eea097334d6 399 *
Anna Bridge 142:4eea097334d6 400 * @param[in] channel
Anna Bridge 142:4eea097334d6 401 * Channel to reset loop configuration for
Anna Bridge 142:4eea097334d6 402 ******************************************************************************/
Anna Bridge 142:4eea097334d6 403 __STATIC_INLINE void DMA_ResetLoop(unsigned int channel)
Anna Bridge 142:4eea097334d6 404 {
Anna Bridge 142:4eea097334d6 405 /* Clean loop copy operation */
Anna Bridge 142:4eea097334d6 406 switch(channel)
Anna Bridge 142:4eea097334d6 407 {
Anna Bridge 142:4eea097334d6 408 case 0:
Anna Bridge 142:4eea097334d6 409 DMA->LOOP0 = _DMA_LOOP0_RESETVALUE;
Anna Bridge 142:4eea097334d6 410 break;
Anna Bridge 142:4eea097334d6 411 case 1:
Anna Bridge 142:4eea097334d6 412 DMA->LOOP1 = _DMA_LOOP1_RESETVALUE;
Anna Bridge 142:4eea097334d6 413 break;
Anna Bridge 142:4eea097334d6 414 default:
Anna Bridge 142:4eea097334d6 415 break;
Anna Bridge 142:4eea097334d6 416 }
Anna Bridge 142:4eea097334d6 417 }
Anna Bridge 142:4eea097334d6 418 #endif
Anna Bridge 142:4eea097334d6 419
Anna Bridge 142:4eea097334d6 420
Anna Bridge 142:4eea097334d6 421 #if defined( _DMA_RECT0_MASK )
Anna Bridge 142:4eea097334d6 422 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 423 * @brief
Anna Bridge 142:4eea097334d6 424 * Clear Rect/2D DMA configuration for channel
Anna Bridge 142:4eea097334d6 425 *
Anna Bridge 142:4eea097334d6 426 * @param[in] channel
Anna Bridge 142:4eea097334d6 427 * Channel to reset loop configuration for
Anna Bridge 142:4eea097334d6 428 ******************************************************************************/
Anna Bridge 142:4eea097334d6 429 __STATIC_INLINE void DMA_ResetRect(unsigned int channel)
Anna Bridge 142:4eea097334d6 430 {
Anna Bridge 142:4eea097334d6 431 (void) channel;
Anna Bridge 142:4eea097334d6 432
Anna Bridge 142:4eea097334d6 433 /* Clear rect copy operation */
Anna Bridge 142:4eea097334d6 434 DMA->RECT0 = _DMA_RECT0_RESETVALUE;
Anna Bridge 142:4eea097334d6 435 }
Anna Bridge 142:4eea097334d6 436 #endif
Anna Bridge 142:4eea097334d6 437 void DMA_CfgDescrScatterGather(DMA_DESCRIPTOR_TypeDef *descr,
Anna Bridge 142:4eea097334d6 438 unsigned int indx,
Anna Bridge 142:4eea097334d6 439 DMA_CfgDescrSGAlt_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 440 void DMA_ChannelEnable(unsigned int channel, bool enable);
Anna Bridge 142:4eea097334d6 441 bool DMA_ChannelEnabled(unsigned int channel);
Anna Bridge 142:4eea097334d6 442 void DMA_ChannelRequestEnable(unsigned int channel, bool enable);
Anna Bridge 142:4eea097334d6 443 void DMA_Init(DMA_Init_TypeDef *init);
Anna Bridge 142:4eea097334d6 444 void DMA_IRQHandler(void);
Anna Bridge 142:4eea097334d6 445 void DMA_RefreshPingPong(unsigned int channel,
Anna Bridge 142:4eea097334d6 446 bool primary,
Anna Bridge 142:4eea097334d6 447 bool useBurst,
Anna Bridge 142:4eea097334d6 448 void *dst,
Anna Bridge 142:4eea097334d6 449 const void *src,
Anna Bridge 142:4eea097334d6 450 unsigned int nMinus1,
Anna Bridge 142:4eea097334d6 451 bool last);
Anna Bridge 142:4eea097334d6 452 void DMA_Reset(void);
Anna Bridge 142:4eea097334d6 453
Anna Bridge 142:4eea097334d6 454 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 455 * @brief
Anna Bridge 142:4eea097334d6 456 * Clear one or more pending DMA interrupts.
Anna Bridge 142:4eea097334d6 457 *
Anna Bridge 142:4eea097334d6 458 * @param[in] flags
Anna Bridge 142:4eea097334d6 459 * Pending DMA interrupt sources to clear. Use one or more valid
Anna Bridge 142:4eea097334d6 460 * interrupt flags for the DMA module (DMA_IFC_nnn).
Anna Bridge 142:4eea097334d6 461 ******************************************************************************/
Anna Bridge 142:4eea097334d6 462 __STATIC_INLINE void DMA_IntClear(uint32_t flags)
Anna Bridge 142:4eea097334d6 463 {
Anna Bridge 142:4eea097334d6 464 DMA->IFC = flags;
Anna Bridge 142:4eea097334d6 465 }
Anna Bridge 142:4eea097334d6 466
Anna Bridge 142:4eea097334d6 467
Anna Bridge 142:4eea097334d6 468 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 469 * @brief
Anna Bridge 142:4eea097334d6 470 * Disable one or more DMA interrupts.
Anna Bridge 142:4eea097334d6 471 *
Anna Bridge 142:4eea097334d6 472 * @param[in] flags
Anna Bridge 142:4eea097334d6 473 * DMA interrupt sources to disable. Use one or more valid
Anna Bridge 142:4eea097334d6 474 * interrupt flags for the DMA module (DMA_IEN_nnn).
Anna Bridge 142:4eea097334d6 475 ******************************************************************************/
Anna Bridge 142:4eea097334d6 476 __STATIC_INLINE void DMA_IntDisable(uint32_t flags)
Anna Bridge 142:4eea097334d6 477 {
Anna Bridge 142:4eea097334d6 478 DMA->IEN &= ~flags;
Anna Bridge 142:4eea097334d6 479 }
Anna Bridge 142:4eea097334d6 480
Anna Bridge 142:4eea097334d6 481
Anna Bridge 142:4eea097334d6 482 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 483 * @brief
Anna Bridge 142:4eea097334d6 484 * Enable one or more DMA interrupts.
Anna Bridge 142:4eea097334d6 485 *
Anna Bridge 142:4eea097334d6 486 * @note
Anna Bridge 142:4eea097334d6 487 * Depending on the use, a pending interrupt may already be set prior to
Anna Bridge 142:4eea097334d6 488 * enabling the interrupt. Consider using DMA_IntClear() prior to enabling
Anna Bridge 142:4eea097334d6 489 * if such a pending interrupt should be ignored.
Anna Bridge 142:4eea097334d6 490 *
Anna Bridge 142:4eea097334d6 491 * @param[in] flags
Anna Bridge 142:4eea097334d6 492 * DMA interrupt sources to enable. Use one or more valid
Anna Bridge 142:4eea097334d6 493 * interrupt flags for the DMA module (DMA_IEN_nnn).
Anna Bridge 142:4eea097334d6 494 ******************************************************************************/
Anna Bridge 142:4eea097334d6 495 __STATIC_INLINE void DMA_IntEnable(uint32_t flags)
Anna Bridge 142:4eea097334d6 496 {
Anna Bridge 142:4eea097334d6 497 DMA->IEN |= flags;
Anna Bridge 142:4eea097334d6 498 }
Anna Bridge 142:4eea097334d6 499
Anna Bridge 142:4eea097334d6 500
Anna Bridge 142:4eea097334d6 501 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 502 * @brief
Anna Bridge 142:4eea097334d6 503 * Get pending DMA interrupt flags.
Anna Bridge 142:4eea097334d6 504 *
Anna Bridge 142:4eea097334d6 505 * @note
Anna Bridge 142:4eea097334d6 506 * The event bits are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 507 *
Anna Bridge 142:4eea097334d6 508 * @return
Anna Bridge 142:4eea097334d6 509 * DMA interrupt sources pending. Returns one or more valid
Anna Bridge 142:4eea097334d6 510 * interrupt flags for the DMA module (DMA_IF_nnn).
Anna Bridge 142:4eea097334d6 511 ******************************************************************************/
Anna Bridge 142:4eea097334d6 512 __STATIC_INLINE uint32_t DMA_IntGet(void)
Anna Bridge 142:4eea097334d6 513 {
Anna Bridge 142:4eea097334d6 514 return DMA->IF;
Anna Bridge 142:4eea097334d6 515 }
Anna Bridge 142:4eea097334d6 516
Anna Bridge 142:4eea097334d6 517
Anna Bridge 142:4eea097334d6 518 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 519 * @brief
Anna Bridge 142:4eea097334d6 520 * Get enabled and pending DMA interrupt flags.
Anna Bridge 142:4eea097334d6 521 * Useful for handling more interrupt sources in the same interrupt handler.
Anna Bridge 142:4eea097334d6 522 *
Anna Bridge 142:4eea097334d6 523 * @note
Anna Bridge 142:4eea097334d6 524 * Interrupt flags are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 525 *
Anna Bridge 142:4eea097334d6 526 * @return
Anna Bridge 142:4eea097334d6 527 * Pending and enabled DMA interrupt sources
Anna Bridge 142:4eea097334d6 528 * The return value is the bitwise AND of
Anna Bridge 142:4eea097334d6 529 * - the enabled interrupt sources in DMA_IEN and
Anna Bridge 142:4eea097334d6 530 * - the pending interrupt flags DMA_IF
Anna Bridge 142:4eea097334d6 531 ******************************************************************************/
Anna Bridge 142:4eea097334d6 532 __STATIC_INLINE uint32_t DMA_IntGetEnabled(void)
Anna Bridge 142:4eea097334d6 533 {
Anna Bridge 142:4eea097334d6 534 uint32_t ien;
Anna Bridge 142:4eea097334d6 535
Anna Bridge 142:4eea097334d6 536 ien = DMA->IEN;
Anna Bridge 142:4eea097334d6 537 return DMA->IF & ien;
Anna Bridge 142:4eea097334d6 538 }
Anna Bridge 142:4eea097334d6 539
Anna Bridge 142:4eea097334d6 540
Anna Bridge 142:4eea097334d6 541 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 542 * @brief
Anna Bridge 142:4eea097334d6 543 * Set one or more pending DMA interrupts
Anna Bridge 142:4eea097334d6 544 *
Anna Bridge 142:4eea097334d6 545 * @param[in] flags
Anna Bridge 142:4eea097334d6 546 * DMA interrupt sources to set to pending. Use one or more valid
Anna Bridge 142:4eea097334d6 547 * interrupt flags for the DMA module (DMA_IFS_nnn).
Anna Bridge 142:4eea097334d6 548 ******************************************************************************/
Anna Bridge 142:4eea097334d6 549 __STATIC_INLINE void DMA_IntSet(uint32_t flags)
Anna Bridge 142:4eea097334d6 550 {
Anna Bridge 142:4eea097334d6 551 DMA->IFS = flags;
Anna Bridge 142:4eea097334d6 552 }
Anna Bridge 142:4eea097334d6 553
Anna Bridge 142:4eea097334d6 554 /** @} (end addtogroup DMA) */
Anna Bridge 142:4eea097334d6 555 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 556
Anna Bridge 142:4eea097334d6 557 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 558 }
Anna Bridge 142:4eea097334d6 559 #endif
Anna Bridge 142:4eea097334d6 560
Anna Bridge 142:4eea097334d6 561 #endif /* defined( DMA_PRESENT ) */
Anna Bridge 142:4eea097334d6 562 #endif /* EM_DMA_H */