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TARGET_TB_SENSE_12/TOOLCHAIN_ARM_STD/em_core.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_TB_SENSE_1/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_core.h@160:5571c4ff569f
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Anna Bridge |
142:4eea097334d6 | 1 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 2 | * @file em_core.h |
Anna Bridge |
142:4eea097334d6 | 3 | * @brief Core interrupt handling API |
Anna Bridge |
160:5571c4ff569f | 4 | * @version 5.3.3 |
Anna Bridge |
142:4eea097334d6 | 5 | ******************************************************************************* |
Anna Bridge |
160:5571c4ff569f | 6 | * # License |
Anna Bridge |
142:4eea097334d6 | 7 | * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b> |
Anna Bridge |
142:4eea097334d6 | 8 | ******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 9 | * |
Anna Bridge |
142:4eea097334d6 | 10 | * Permission is granted to anyone to use this software for any purpose, |
Anna Bridge |
142:4eea097334d6 | 11 | * including commercial applications, and to alter it and redistribute it |
Anna Bridge |
142:4eea097334d6 | 12 | * freely, subject to the following restrictions: |
Anna Bridge |
142:4eea097334d6 | 13 | * |
Anna Bridge |
142:4eea097334d6 | 14 | * 1. The origin of this software must not be misrepresented; you must not |
Anna Bridge |
142:4eea097334d6 | 15 | * claim that you wrote the original software.@n |
Anna Bridge |
142:4eea097334d6 | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
Anna Bridge |
142:4eea097334d6 | 17 | * misrepresented as being the original software.@n |
Anna Bridge |
142:4eea097334d6 | 18 | * 3. This notice may not be removed or altered from any source distribution. |
Anna Bridge |
142:4eea097334d6 | 19 | * |
Anna Bridge |
142:4eea097334d6 | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no |
Anna Bridge |
142:4eea097334d6 | 21 | * obligation to support this Software. Silicon Labs is providing the |
Anna Bridge |
142:4eea097334d6 | 22 | * Software "AS IS", with no express or implied warranties of any kind, |
Anna Bridge |
142:4eea097334d6 | 23 | * including, but not limited to, any implied warranties of merchantability |
Anna Bridge |
142:4eea097334d6 | 24 | * or fitness for any particular purpose or warranties against infringement |
Anna Bridge |
142:4eea097334d6 | 25 | * of any proprietary rights of a third party. |
Anna Bridge |
142:4eea097334d6 | 26 | * |
Anna Bridge |
142:4eea097334d6 | 27 | * Silicon Labs will not be liable for any consequential, incidental, or |
Anna Bridge |
142:4eea097334d6 | 28 | * special damages, or any other relief, or for any claim by any third party, |
Anna Bridge |
142:4eea097334d6 | 29 | * arising from your use of this Software. |
Anna Bridge |
142:4eea097334d6 | 30 | * |
Anna Bridge |
142:4eea097334d6 | 31 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 32 | #ifndef EM_CORE_H |
Anna Bridge |
142:4eea097334d6 | 33 | #define EM_CORE_H |
Anna Bridge |
142:4eea097334d6 | 34 | |
Anna Bridge |
142:4eea097334d6 | 35 | #include "em_device.h" |
Anna Bridge |
142:4eea097334d6 | 36 | #include "em_common.h" |
Anna Bridge |
142:4eea097334d6 | 37 | |
Anna Bridge |
142:4eea097334d6 | 38 | #include <stdbool.h> |
Anna Bridge |
142:4eea097334d6 | 39 | |
Anna Bridge |
142:4eea097334d6 | 40 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 41 | * @addtogroup emlib |
Anna Bridge |
142:4eea097334d6 | 42 | * @{ |
Anna Bridge |
142:4eea097334d6 | 43 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 44 | |
Anna Bridge |
142:4eea097334d6 | 45 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 46 | * @addtogroup CORE |
Anna Bridge |
142:4eea097334d6 | 47 | * @{ |
Anna Bridge |
142:4eea097334d6 | 48 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 49 | |
Anna Bridge |
142:4eea097334d6 | 50 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 51 | ******************************* DEFINES *********************************** |
Anna Bridge |
142:4eea097334d6 | 52 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 53 | |
Anna Bridge |
142:4eea097334d6 | 54 | /** Use PRIMASK register to disable interrupts in ATOMIC sections. */ |
Anna Bridge |
142:4eea097334d6 | 55 | #define CORE_ATOMIC_METHOD_PRIMASK 0 |
Anna Bridge |
142:4eea097334d6 | 56 | |
Anna Bridge |
142:4eea097334d6 | 57 | /** Use BASEPRI register to disable interrupts in ATOMIC sections. */ |
Anna Bridge |
142:4eea097334d6 | 58 | #define CORE_ATOMIC_METHOD_BASEPRI 1 |
Anna Bridge |
142:4eea097334d6 | 59 | |
Anna Bridge |
142:4eea097334d6 | 60 | /** Number of words in a NVIC mask set. */ |
Anna Bridge |
142:4eea097334d6 | 61 | #define CORE_NVIC_REG_WORDS ((EXT_IRQ_COUNT + 31) / 32) |
Anna Bridge |
142:4eea097334d6 | 62 | |
Anna Bridge |
142:4eea097334d6 | 63 | /** Number of entries in a default interrupt vector table. */ |
Anna Bridge |
142:4eea097334d6 | 64 | #define CORE_DEFAULT_VECTOR_TABLE_ENTRIES (EXT_IRQ_COUNT + 16) |
Anna Bridge |
142:4eea097334d6 | 65 | |
Anna Bridge |
142:4eea097334d6 | 66 | // Compile time sanity check. |
Anna Bridge |
142:4eea097334d6 | 67 | #if (CORE_NVIC_REG_WORDS > 3) |
Anna Bridge |
142:4eea097334d6 | 68 | #error "em_core: Unexpected NVIC external interrupt count." |
Anna Bridge |
142:4eea097334d6 | 69 | #endif |
Anna Bridge |
142:4eea097334d6 | 70 | |
Anna Bridge |
142:4eea097334d6 | 71 | #ifdef __cplusplus |
Anna Bridge |
142:4eea097334d6 | 72 | extern "C" { |
Anna Bridge |
142:4eea097334d6 | 73 | #endif |
Anna Bridge |
142:4eea097334d6 | 74 | |
Anna Bridge |
142:4eea097334d6 | 75 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 76 | ************************ MACRO API *************************************** |
Anna Bridge |
142:4eea097334d6 | 77 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 78 | |
Anna Bridge |
142:4eea097334d6 | 79 | // |
Anna Bridge |
142:4eea097334d6 | 80 | // CRITICAL section macro API. |
Anna Bridge |
142:4eea097334d6 | 81 | // |
Anna Bridge |
142:4eea097334d6 | 82 | |
Anna Bridge |
142:4eea097334d6 | 83 | /** Allocate storage for PRIMASK or BASEPRI value for use by |
Anna Bridge |
142:4eea097334d6 | 84 | * CORE_ENTER/EXIT_ATOMIC() and CORE_ENTER/EXIT_CRITICAL() macros. */ |
Anna Bridge |
142:4eea097334d6 | 85 | #define CORE_DECLARE_IRQ_STATE CORE_irqState_t irqState |
Anna Bridge |
142:4eea097334d6 | 86 | |
Anna Bridge |
142:4eea097334d6 | 87 | /** CRITICAL style interrupt disable. */ |
Anna Bridge |
142:4eea097334d6 | 88 | #define CORE_CRITICAL_IRQ_DISABLE() CORE_CriticalDisableIrq() |
Anna Bridge |
142:4eea097334d6 | 89 | |
Anna Bridge |
142:4eea097334d6 | 90 | /** CRITICAL style interrupt enable. */ |
Anna Bridge |
142:4eea097334d6 | 91 | #define CORE_CRITICAL_IRQ_ENABLE() CORE_CriticalEnableIrq() |
Anna Bridge |
142:4eea097334d6 | 92 | |
Anna Bridge |
142:4eea097334d6 | 93 | /** Convenience macro for implementing a CRITICAL section. */ |
Anna Bridge |
142:4eea097334d6 | 94 | #define CORE_CRITICAL_SECTION(yourcode) \ |
Anna Bridge |
142:4eea097334d6 | 95 | { \ |
Anna Bridge |
160:5571c4ff569f | 96 | CORE_DECLARE_IRQ_STATE; \ |
Anna Bridge |
160:5571c4ff569f | 97 | CORE_ENTER_CRITICAL(); \ |
Anna Bridge |
160:5571c4ff569f | 98 | { \ |
Anna Bridge |
160:5571c4ff569f | 99 | yourcode \ |
Anna Bridge |
160:5571c4ff569f | 100 | } \ |
Anna Bridge |
160:5571c4ff569f | 101 | CORE_EXIT_CRITICAL(); \ |
Anna Bridge |
160:5571c4ff569f | 102 | } |
Anna Bridge |
142:4eea097334d6 | 103 | |
Anna Bridge |
142:4eea097334d6 | 104 | /** Enter CRITICAL section. Assumes that a @ref CORE_DECLARE_IRQ_STATE exist in |
Anna Bridge |
142:4eea097334d6 | 105 | * scope. */ |
Anna Bridge |
142:4eea097334d6 | 106 | #define CORE_ENTER_CRITICAL() irqState = CORE_EnterCritical() |
Anna Bridge |
142:4eea097334d6 | 107 | |
Anna Bridge |
142:4eea097334d6 | 108 | /** Exit CRITICAL section. Assumes that a @ref CORE_DECLARE_IRQ_STATE exist in |
Anna Bridge |
142:4eea097334d6 | 109 | * scope. */ |
Anna Bridge |
142:4eea097334d6 | 110 | #define CORE_EXIT_CRITICAL() CORE_ExitCritical(irqState) |
Anna Bridge |
142:4eea097334d6 | 111 | |
Anna Bridge |
142:4eea097334d6 | 112 | /** CRITICAL style yield. */ |
Anna Bridge |
160:5571c4ff569f | 113 | #define CORE_YIELD_CRITICAL() CORE_YieldCritical() |
Anna Bridge |
142:4eea097334d6 | 114 | |
Anna Bridge |
142:4eea097334d6 | 115 | // |
Anna Bridge |
142:4eea097334d6 | 116 | // ATOMIC section macro API. |
Anna Bridge |
142:4eea097334d6 | 117 | // |
Anna Bridge |
142:4eea097334d6 | 118 | |
Anna Bridge |
142:4eea097334d6 | 119 | /** ATOMIC style interrupt disable. */ |
Anna Bridge |
142:4eea097334d6 | 120 | #define CORE_ATOMIC_IRQ_DISABLE() CORE_AtomicDisableIrq() |
Anna Bridge |
142:4eea097334d6 | 121 | |
Anna Bridge |
142:4eea097334d6 | 122 | /** ATOMIC style interrupt enable. */ |
Anna Bridge |
142:4eea097334d6 | 123 | #define CORE_ATOMIC_IRQ_ENABLE() CORE_AtomicEnableIrq() |
Anna Bridge |
142:4eea097334d6 | 124 | |
Anna Bridge |
142:4eea097334d6 | 125 | /** Convenience macro for implementing an ATOMIC section. */ |
Anna Bridge |
142:4eea097334d6 | 126 | #define CORE_ATOMIC_SECTION(yourcode) \ |
Anna Bridge |
142:4eea097334d6 | 127 | { \ |
Anna Bridge |
160:5571c4ff569f | 128 | CORE_DECLARE_IRQ_STATE; \ |
Anna Bridge |
160:5571c4ff569f | 129 | CORE_ENTER_ATOMIC(); \ |
Anna Bridge |
160:5571c4ff569f | 130 | { \ |
Anna Bridge |
160:5571c4ff569f | 131 | yourcode \ |
Anna Bridge |
160:5571c4ff569f | 132 | } \ |
Anna Bridge |
160:5571c4ff569f | 133 | CORE_EXIT_ATOMIC(); \ |
Anna Bridge |
160:5571c4ff569f | 134 | } |
Anna Bridge |
142:4eea097334d6 | 135 | |
Anna Bridge |
142:4eea097334d6 | 136 | /** Enter ATOMIC section. Assumes that a @ref CORE_DECLARE_IRQ_STATE exist in |
Anna Bridge |
142:4eea097334d6 | 137 | * scope. */ |
Anna Bridge |
142:4eea097334d6 | 138 | #define CORE_ENTER_ATOMIC() irqState = CORE_EnterAtomic() |
Anna Bridge |
142:4eea097334d6 | 139 | |
Anna Bridge |
142:4eea097334d6 | 140 | /** Exit ATOMIC section. Assumes that a @ref CORE_DECLARE_IRQ_STATE exist in |
Anna Bridge |
142:4eea097334d6 | 141 | * scope. */ |
Anna Bridge |
142:4eea097334d6 | 142 | #define CORE_EXIT_ATOMIC() CORE_ExitAtomic(irqState) |
Anna Bridge |
142:4eea097334d6 | 143 | |
Anna Bridge |
142:4eea097334d6 | 144 | /** ATOMIC style yield. */ |
Anna Bridge |
160:5571c4ff569f | 145 | #define CORE_YIELD_ATOMIC() CORE_YieldAtomic() |
Anna Bridge |
142:4eea097334d6 | 146 | |
Anna Bridge |
142:4eea097334d6 | 147 | // |
Anna Bridge |
142:4eea097334d6 | 148 | // NVIC mask section macro API. |
Anna Bridge |
142:4eea097334d6 | 149 | // |
Anna Bridge |
142:4eea097334d6 | 150 | |
Anna Bridge |
142:4eea097334d6 | 151 | /** Allocate storage for NVIC interrupt masks for use by |
Anna Bridge |
142:4eea097334d6 | 152 | * CORE_ENTER/EXIT_NVIC() macros. */ |
Anna Bridge |
142:4eea097334d6 | 153 | #define CORE_DECLARE_NVIC_STATE CORE_nvicMask_t nvicState |
Anna Bridge |
142:4eea097334d6 | 154 | |
Anna Bridge |
142:4eea097334d6 | 155 | /** Allocate storage for NVIC interrupt masks. |
Anna Bridge |
142:4eea097334d6 | 156 | * @param[in] x |
Anna Bridge |
142:4eea097334d6 | 157 | * The storage variable name to use.*/ |
Anna Bridge |
142:4eea097334d6 | 158 | #define CORE_DECLARE_NVIC_MASK(x) CORE_nvicMask_t x |
Anna Bridge |
142:4eea097334d6 | 159 | |
Anna Bridge |
142:4eea097334d6 | 160 | /** Allocate storage for and zero initialize NVIC interrupt mask. |
Anna Bridge |
142:4eea097334d6 | 161 | * @param[in] x |
Anna Bridge |
142:4eea097334d6 | 162 | * The storage variable name to use.*/ |
Anna Bridge |
160:5571c4ff569f | 163 | #define CORE_DECLARE_NVIC_ZEROMASK(x) CORE_nvicMask_t x = { { 0 } } |
Anna Bridge |
142:4eea097334d6 | 164 | |
Anna Bridge |
142:4eea097334d6 | 165 | /** NVIC mask style interrupt disable. |
Anna Bridge |
142:4eea097334d6 | 166 | * @param[in] mask |
Anna Bridge |
142:4eea097334d6 | 167 | * Mask specifying which NVIC interrupts to disable. */ |
Anna Bridge |
142:4eea097334d6 | 168 | #define CORE_NVIC_DISABLE(mask) CORE_NvicDisableMask(mask) |
Anna Bridge |
142:4eea097334d6 | 169 | |
Anna Bridge |
142:4eea097334d6 | 170 | /** NVIC mask style interrupt enable. |
Anna Bridge |
142:4eea097334d6 | 171 | * @param[in] mask |
Anna Bridge |
142:4eea097334d6 | 172 | * Mask specifying which NVIC interrupts to enable. */ |
Anna Bridge |
142:4eea097334d6 | 173 | #define CORE_NVIC_ENABLE(mask) CORE_NvicEnableMask(mask) |
Anna Bridge |
142:4eea097334d6 | 174 | |
Anna Bridge |
142:4eea097334d6 | 175 | /** Convenience macro for implementing a NVIC mask section. |
Anna Bridge |
142:4eea097334d6 | 176 | * @param[in] mask |
Anna Bridge |
142:4eea097334d6 | 177 | * Mask specifying which NVIC interrupts to disable within the section. |
Anna Bridge |
142:4eea097334d6 | 178 | * @param[in] yourcode |
Anna Bridge |
142:4eea097334d6 | 179 | * The code for the section. */ |
Anna Bridge |
160:5571c4ff569f | 180 | #define CORE_NVIC_SECTION(mask, yourcode) \ |
Anna Bridge |
160:5571c4ff569f | 181 | { \ |
Anna Bridge |
160:5571c4ff569f | 182 | CORE_DECLARE_NVIC_STATE; \ |
Anna Bridge |
160:5571c4ff569f | 183 | CORE_ENTER_NVIC(mask); \ |
Anna Bridge |
160:5571c4ff569f | 184 | { \ |
Anna Bridge |
160:5571c4ff569f | 185 | yourcode \ |
Anna Bridge |
160:5571c4ff569f | 186 | } \ |
Anna Bridge |
160:5571c4ff569f | 187 | CORE_EXIT_NVIC(); \ |
Anna Bridge |
160:5571c4ff569f | 188 | } |
Anna Bridge |
142:4eea097334d6 | 189 | |
Anna Bridge |
142:4eea097334d6 | 190 | /** Enter NVIC mask section. Assumes that a @ref CORE_DECLARE_NVIC_STATE exist |
Anna Bridge |
142:4eea097334d6 | 191 | * in scope. |
Anna Bridge |
142:4eea097334d6 | 192 | * @param[in] disable |
Anna Bridge |
142:4eea097334d6 | 193 | * Mask specifying which NVIC interrupts to disable within the section. */ |
Anna Bridge |
160:5571c4ff569f | 194 | #define CORE_ENTER_NVIC(disable) CORE_EnterNvicMask(&nvicState, disable) |
Anna Bridge |
142:4eea097334d6 | 195 | |
Anna Bridge |
142:4eea097334d6 | 196 | /** Exit NVIC mask section. Assumes that a @ref CORE_DECLARE_NVIC_STATE exist |
Anna Bridge |
142:4eea097334d6 | 197 | * in scope. */ |
Anna Bridge |
142:4eea097334d6 | 198 | #define CORE_EXIT_NVIC() CORE_NvicEnableMask(&nvicState) |
Anna Bridge |
142:4eea097334d6 | 199 | |
Anna Bridge |
142:4eea097334d6 | 200 | /** NVIC maks style yield. |
Anna Bridge |
142:4eea097334d6 | 201 | * @param[in] enable |
Anna Bridge |
142:4eea097334d6 | 202 | * Mask specifying which NVIC interrupts to briefly enable. */ |
Anna Bridge |
142:4eea097334d6 | 203 | #define CORE_YIELD_NVIC(enable) CORE_YieldNvicMask(enable) |
Anna Bridge |
142:4eea097334d6 | 204 | |
Anna Bridge |
142:4eea097334d6 | 205 | // |
Anna Bridge |
142:4eea097334d6 | 206 | // Miscellaneous macros. |
Anna Bridge |
142:4eea097334d6 | 207 | // |
Anna Bridge |
142:4eea097334d6 | 208 | |
Anna Bridge |
142:4eea097334d6 | 209 | /** Check if IRQ is disabled. */ |
Anna Bridge |
142:4eea097334d6 | 210 | #define CORE_IRQ_DISABLED() CORE_IrqIsDisabled() |
Anna Bridge |
142:4eea097334d6 | 211 | |
Anna Bridge |
142:4eea097334d6 | 212 | /** Check if inside an IRQ handler. */ |
Anna Bridge |
142:4eea097334d6 | 213 | #define CORE_IN_IRQ_CONTEXT() CORE_InIrqContext() |
Anna Bridge |
142:4eea097334d6 | 214 | |
Anna Bridge |
142:4eea097334d6 | 215 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 216 | ************************* TYPEDEFS **************************************** |
Anna Bridge |
142:4eea097334d6 | 217 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 218 | |
Anna Bridge |
142:4eea097334d6 | 219 | /** Storage for PRIMASK or BASEPRI value. */ |
Anna Bridge |
142:4eea097334d6 | 220 | typedef uint32_t CORE_irqState_t; |
Anna Bridge |
142:4eea097334d6 | 221 | |
Anna Bridge |
142:4eea097334d6 | 222 | /** Storage for NVIC interrupt masks. */ |
Anna Bridge |
142:4eea097334d6 | 223 | typedef struct { |
Anna Bridge |
142:4eea097334d6 | 224 | uint32_t a[CORE_NVIC_REG_WORDS]; /*!< Array of NVIC mask words. */ |
Anna Bridge |
142:4eea097334d6 | 225 | } CORE_nvicMask_t; |
Anna Bridge |
142:4eea097334d6 | 226 | |
Anna Bridge |
142:4eea097334d6 | 227 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 228 | ***************************** PROTOTYPES ********************************** |
Anna Bridge |
142:4eea097334d6 | 229 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 230 | |
Anna Bridge |
142:4eea097334d6 | 231 | void CORE_CriticalDisableIrq(void); |
Anna Bridge |
142:4eea097334d6 | 232 | void CORE_CriticalEnableIrq(void); |
Anna Bridge |
142:4eea097334d6 | 233 | void CORE_ExitCritical(CORE_irqState_t irqState); |
Anna Bridge |
142:4eea097334d6 | 234 | void CORE_YieldCritical(void); |
Anna Bridge |
142:4eea097334d6 | 235 | CORE_irqState_t CORE_EnterCritical(void); |
Anna Bridge |
142:4eea097334d6 | 236 | |
Anna Bridge |
142:4eea097334d6 | 237 | void CORE_AtomicDisableIrq(void); |
Anna Bridge |
142:4eea097334d6 | 238 | void CORE_AtomicEnableIrq(void); |
Anna Bridge |
142:4eea097334d6 | 239 | void CORE_ExitAtomic(CORE_irqState_t irqState); |
Anna Bridge |
142:4eea097334d6 | 240 | void CORE_YieldAtomic(void); |
Anna Bridge |
142:4eea097334d6 | 241 | CORE_irqState_t CORE_EnterAtomic(void); |
Anna Bridge |
142:4eea097334d6 | 242 | |
Anna Bridge |
142:4eea097334d6 | 243 | bool CORE_InIrqContext(void); |
Anna Bridge |
142:4eea097334d6 | 244 | bool CORE_IrqIsBlocked(IRQn_Type irqN); |
Anna Bridge |
142:4eea097334d6 | 245 | bool CORE_IrqIsDisabled(void); |
Anna Bridge |
142:4eea097334d6 | 246 | |
Anna Bridge |
142:4eea097334d6 | 247 | void CORE_GetNvicEnabledMask(CORE_nvicMask_t *mask); |
Anna Bridge |
142:4eea097334d6 | 248 | bool CORE_GetNvicMaskDisableState(const CORE_nvicMask_t *mask); |
Anna Bridge |
142:4eea097334d6 | 249 | |
Anna Bridge |
142:4eea097334d6 | 250 | void CORE_EnterNvicMask(CORE_nvicMask_t *nvicState, |
Anna Bridge |
142:4eea097334d6 | 251 | const CORE_nvicMask_t *disable); |
Anna Bridge |
142:4eea097334d6 | 252 | void CORE_NvicDisableMask(const CORE_nvicMask_t *disable); |
Anna Bridge |
142:4eea097334d6 | 253 | void CORE_NvicEnableMask(const CORE_nvicMask_t *enable); |
Anna Bridge |
142:4eea097334d6 | 254 | void CORE_YieldNvicMask(const CORE_nvicMask_t *enable); |
Anna Bridge |
142:4eea097334d6 | 255 | void CORE_NvicMaskSetIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask); |
Anna Bridge |
142:4eea097334d6 | 256 | void CORE_NvicMaskClearIRQ(IRQn_Type irqN, CORE_nvicMask_t *mask); |
Anna Bridge |
142:4eea097334d6 | 257 | bool CORE_NvicIRQDisabled(IRQn_Type irqN); |
Anna Bridge |
142:4eea097334d6 | 258 | |
Anna Bridge |
142:4eea097334d6 | 259 | void *CORE_GetNvicRamTableHandler(IRQn_Type irqN); |
Anna Bridge |
142:4eea097334d6 | 260 | void CORE_SetNvicRamTableHandler(IRQn_Type irqN, void *handler); |
Anna Bridge |
142:4eea097334d6 | 261 | void CORE_InitNvicVectorTable(uint32_t *sourceTable, |
Anna Bridge |
142:4eea097334d6 | 262 | uint32_t sourceSize, |
Anna Bridge |
142:4eea097334d6 | 263 | uint32_t *targetTable, |
Anna Bridge |
142:4eea097334d6 | 264 | uint32_t targetSize, |
Anna Bridge |
142:4eea097334d6 | 265 | void *defaultHandler, |
Anna Bridge |
142:4eea097334d6 | 266 | bool overwriteActive); |
Anna Bridge |
142:4eea097334d6 | 267 | |
Anna Bridge |
142:4eea097334d6 | 268 | #ifdef __cplusplus |
Anna Bridge |
142:4eea097334d6 | 269 | } |
Anna Bridge |
142:4eea097334d6 | 270 | #endif |
Anna Bridge |
142:4eea097334d6 | 271 | |
Anna Bridge |
142:4eea097334d6 | 272 | /** @} (end addtogroup CORE) */ |
Anna Bridge |
142:4eea097334d6 | 273 | /** @} (end addtogroup emlib) */ |
Anna Bridge |
142:4eea097334d6 | 274 | |
Anna Bridge |
142:4eea097334d6 | 275 | #endif /* EM_CORE_H */ |