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TARGET_TB_SENSE_1/TOOLCHAIN_IAR/em_dma.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_TB_SENSE_1/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_dma.h@160:5571c4ff569f 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_dma.h
Anna Bridge 142:4eea097334d6 3 * @brief Direct memory access (DMA) API
Anna Bridge 160:5571c4ff569f 4 * @version 5.3.3
Anna Bridge 142:4eea097334d6 5 *******************************************************************************
Anna Bridge 160:5571c4ff569f 6 * # License
Anna Bridge 142:4eea097334d6 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 8 *******************************************************************************
Anna Bridge 142:4eea097334d6 9 *
Anna Bridge 142:4eea097334d6 10 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 11 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 12 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 13 *
Anna Bridge 142:4eea097334d6 14 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 15 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 16 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 17 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 18 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 19 *
Anna Bridge 142:4eea097334d6 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 21 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 22 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 23 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 24 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 25 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 26 *
Anna Bridge 142:4eea097334d6 27 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 28 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 29 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 30 *
Anna Bridge 142:4eea097334d6 31 ******************************************************************************/
Anna Bridge 142:4eea097334d6 32
Anna Bridge 142:4eea097334d6 33 #ifndef EM_DMA_H
Anna Bridge 142:4eea097334d6 34 #define EM_DMA_H
Anna Bridge 142:4eea097334d6 35
Anna Bridge 142:4eea097334d6 36 #include "em_device.h"
Anna Bridge 160:5571c4ff569f 37 #if defined(DMA_PRESENT)
Anna Bridge 142:4eea097334d6 38
Anna Bridge 142:4eea097334d6 39 #include <stdio.h>
Anna Bridge 142:4eea097334d6 40 #include <stdbool.h>
Anna Bridge 142:4eea097334d6 41
Anna Bridge 142:4eea097334d6 42 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 43 extern "C" {
Anna Bridge 142:4eea097334d6 44 #endif
Anna Bridge 142:4eea097334d6 45
Anna Bridge 142:4eea097334d6 46 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 47 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 48 * @{
Anna Bridge 142:4eea097334d6 49 ******************************************************************************/
Anna Bridge 142:4eea097334d6 50
Anna Bridge 142:4eea097334d6 51 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 52 * @addtogroup DMA
Anna Bridge 142:4eea097334d6 53 * @{
Anna Bridge 142:4eea097334d6 54 ******************************************************************************/
Anna Bridge 142:4eea097334d6 55
Anna Bridge 142:4eea097334d6 56 /*******************************************************************************
Anna Bridge 142:4eea097334d6 57 ******************************** ENUMS ************************************
Anna Bridge 142:4eea097334d6 58 ******************************************************************************/
Anna Bridge 142:4eea097334d6 59
Anna Bridge 142:4eea097334d6 60 /**
Anna Bridge 142:4eea097334d6 61 * Amount source/destination address should be incremented for each data
Anna Bridge 142:4eea097334d6 62 * transfer.
Anna Bridge 142:4eea097334d6 63 */
Anna Bridge 160:5571c4ff569f 64 typedef enum {
Anna Bridge 142:4eea097334d6 65 dmaDataInc1 = _DMA_CTRL_SRC_INC_BYTE, /**< Increment address 1 byte. */
Anna Bridge 142:4eea097334d6 66 dmaDataInc2 = _DMA_CTRL_SRC_INC_HALFWORD, /**< Increment address 2 bytes. */
Anna Bridge 142:4eea097334d6 67 dmaDataInc4 = _DMA_CTRL_SRC_INC_WORD, /**< Increment address 4 bytes. */
Anna Bridge 142:4eea097334d6 68 dmaDataIncNone = _DMA_CTRL_SRC_INC_NONE /**< Do not increment address. */
Anna Bridge 142:4eea097334d6 69 } DMA_DataInc_TypeDef;
Anna Bridge 142:4eea097334d6 70
Anna Bridge 142:4eea097334d6 71 /** Data sizes (in number of bytes) to be read/written by DMA transfer. */
Anna Bridge 160:5571c4ff569f 72 typedef enum {
Anna Bridge 142:4eea097334d6 73 dmaDataSize1 = _DMA_CTRL_SRC_SIZE_BYTE, /**< 1 byte DMA transfer size. */
Anna Bridge 142:4eea097334d6 74 dmaDataSize2 = _DMA_CTRL_SRC_SIZE_HALFWORD, /**< 2 byte DMA transfer size. */
Anna Bridge 142:4eea097334d6 75 dmaDataSize4 = _DMA_CTRL_SRC_SIZE_WORD /**< 4 byte DMA transfer size. */
Anna Bridge 142:4eea097334d6 76 } DMA_DataSize_TypeDef;
Anna Bridge 142:4eea097334d6 77
Anna Bridge 142:4eea097334d6 78 /** Type of DMA transfer. */
Anna Bridge 160:5571c4ff569f 79 typedef enum {
Anna Bridge 142:4eea097334d6 80 /** Basic DMA cycle. */
Anna Bridge 142:4eea097334d6 81 dmaCycleCtrlBasic = _DMA_CTRL_CYCLE_CTRL_BASIC,
Anna Bridge 142:4eea097334d6 82 /** Auto-request DMA cycle. */
Anna Bridge 142:4eea097334d6 83 dmaCycleCtrlAuto = _DMA_CTRL_CYCLE_CTRL_AUTO,
Anna Bridge 142:4eea097334d6 84 /** Ping-pong DMA cycle. */
Anna Bridge 142:4eea097334d6 85 dmaCycleCtrlPingPong = _DMA_CTRL_CYCLE_CTRL_PINGPONG,
Anna Bridge 142:4eea097334d6 86 /** Memory scatter-gather DMA cycle. */
Anna Bridge 142:4eea097334d6 87 dmaCycleCtrlMemScatterGather = _DMA_CTRL_CYCLE_CTRL_MEM_SCATTER_GATHER,
Anna Bridge 142:4eea097334d6 88 /** Peripheral scatter-gather DMA cycle. */
Anna Bridge 142:4eea097334d6 89 dmaCycleCtrlPerScatterGather = _DMA_CTRL_CYCLE_CTRL_PER_SCATTER_GATHER
Anna Bridge 142:4eea097334d6 90 } DMA_CycleCtrl_TypeDef;
Anna Bridge 142:4eea097334d6 91
Anna Bridge 142:4eea097334d6 92 /** Number of transfers before controller does new arbitration. */
Anna Bridge 160:5571c4ff569f 93 typedef enum {
Anna Bridge 142:4eea097334d6 94 dmaArbitrate1 = _DMA_CTRL_R_POWER_1, /**< Arbitrate after 1 DMA transfer. */
Anna Bridge 142:4eea097334d6 95 dmaArbitrate2 = _DMA_CTRL_R_POWER_2, /**< Arbitrate after 2 DMA transfers. */
Anna Bridge 142:4eea097334d6 96 dmaArbitrate4 = _DMA_CTRL_R_POWER_4, /**< Arbitrate after 4 DMA transfers. */
Anna Bridge 142:4eea097334d6 97 dmaArbitrate8 = _DMA_CTRL_R_POWER_8, /**< Arbitrate after 8 DMA transfers. */
Anna Bridge 142:4eea097334d6 98 dmaArbitrate16 = _DMA_CTRL_R_POWER_16, /**< Arbitrate after 16 DMA transfers. */
Anna Bridge 142:4eea097334d6 99 dmaArbitrate32 = _DMA_CTRL_R_POWER_32, /**< Arbitrate after 32 DMA transfers. */
Anna Bridge 142:4eea097334d6 100 dmaArbitrate64 = _DMA_CTRL_R_POWER_64, /**< Arbitrate after 64 DMA transfers. */
Anna Bridge 142:4eea097334d6 101 dmaArbitrate128 = _DMA_CTRL_R_POWER_128, /**< Arbitrate after 128 DMA transfers. */
Anna Bridge 142:4eea097334d6 102 dmaArbitrate256 = _DMA_CTRL_R_POWER_256, /**< Arbitrate after 256 DMA transfers. */
Anna Bridge 142:4eea097334d6 103 dmaArbitrate512 = _DMA_CTRL_R_POWER_512, /**< Arbitrate after 512 DMA transfers. */
Anna Bridge 142:4eea097334d6 104 dmaArbitrate1024 = _DMA_CTRL_R_POWER_1024 /**< Arbitrate after 1024 DMA transfers. */
Anna Bridge 142:4eea097334d6 105 } DMA_ArbiterConfig_TypeDef;
Anna Bridge 142:4eea097334d6 106
Anna Bridge 142:4eea097334d6 107 /*******************************************************************************
Anna Bridge 142:4eea097334d6 108 ******************************* STRUCTS ***********************************
Anna Bridge 142:4eea097334d6 109 ******************************************************************************/
Anna Bridge 142:4eea097334d6 110
Anna Bridge 142:4eea097334d6 111 /**
Anna Bridge 142:4eea097334d6 112 * @brief
Anna Bridge 142:4eea097334d6 113 * DMA interrupt callback function pointer.
Anna Bridge 142:4eea097334d6 114 * @details
Anna Bridge 142:4eea097334d6 115 * Parameters:
Anna Bridge 142:4eea097334d6 116 * @li channel - The DMA channel the callback function is invoked for.
Anna Bridge 142:4eea097334d6 117 * @li primary - Indicates if callback is invoked for completion of primary
Anna Bridge 142:4eea097334d6 118 * (true) or alternate (false) descriptor. This is mainly useful for
Anna Bridge 142:4eea097334d6 119 * ping-pong DMA cycles, in order to know which descriptor to refresh.
Anna Bridge 142:4eea097334d6 120 * @li user - User definable reference that may be used to pass information
Anna Bridge 142:4eea097334d6 121 * to be used by the callback handler. If used, the referenced data must be
Anna Bridge 142:4eea097334d6 122 * valid at the point when the interrupt handler invokes the callback.
Anna Bridge 142:4eea097334d6 123 * If callback changes any data in the provided user structure, remember
Anna Bridge 142:4eea097334d6 124 * that those changes are done in interrupt context, and proper protection
Anna Bridge 142:4eea097334d6 125 * of data may be required.
Anna Bridge 142:4eea097334d6 126 */
Anna Bridge 142:4eea097334d6 127 typedef void (*DMA_FuncPtr_TypeDef)(unsigned int channel, bool primary, void *user);
Anna Bridge 142:4eea097334d6 128
Anna Bridge 142:4eea097334d6 129 /**
Anna Bridge 142:4eea097334d6 130 * @brief
Anna Bridge 142:4eea097334d6 131 * Callback structure that can be used to define DMA complete actions.
Anna Bridge 142:4eea097334d6 132 * @details
Anna Bridge 142:4eea097334d6 133 * A reference to this structure is only stored in the primary descriptor
Anna Bridge 142:4eea097334d6 134 * for a channel (if callback feature is used). If callback is required
Anna Bridge 142:4eea097334d6 135 * for both primary and alternate descriptor completion, this must be
Anna Bridge 142:4eea097334d6 136 * handled by one common callback, using the provided 'primary' parameter
Anna Bridge 142:4eea097334d6 137 * with the callback function.
Anna Bridge 142:4eea097334d6 138 */
Anna Bridge 160:5571c4ff569f 139 typedef struct {
Anna Bridge 142:4eea097334d6 140 /**
Anna Bridge 142:4eea097334d6 141 * Pointer to callback function to invoke when DMA transfer cycle done.
Anna Bridge 142:4eea097334d6 142 * Notice that this function is invoked in interrupt context, and therefore
Anna Bridge 142:4eea097334d6 143 * should be short and non-blocking.
Anna Bridge 142:4eea097334d6 144 */
Anna Bridge 142:4eea097334d6 145 DMA_FuncPtr_TypeDef cbFunc;
Anna Bridge 142:4eea097334d6 146
Anna Bridge 142:4eea097334d6 147 /** User defined pointer to provide with callback function. */
Anna Bridge 142:4eea097334d6 148 void *userPtr;
Anna Bridge 142:4eea097334d6 149
Anna Bridge 142:4eea097334d6 150 /**
Anna Bridge 142:4eea097334d6 151 * For internal use only: Indicates if next callback applies to primary
Anna Bridge 142:4eea097334d6 152 * or alternate descriptor completion. Mainly useful for ping-pong DMA
Anna Bridge 142:4eea097334d6 153 * cycles. Set this value to 0 prior to configuring callback handling.
Anna Bridge 142:4eea097334d6 154 */
Anna Bridge 142:4eea097334d6 155 uint8_t primary;
Anna Bridge 142:4eea097334d6 156 } DMA_CB_TypeDef;
Anna Bridge 142:4eea097334d6 157
Anna Bridge 142:4eea097334d6 158 /** Configuration structure for a channel. */
Anna Bridge 160:5571c4ff569f 159 typedef struct {
Anna Bridge 142:4eea097334d6 160 /**
Anna Bridge 142:4eea097334d6 161 * Select if channel priority is in the high or default priority group
Anna Bridge 142:4eea097334d6 162 * with respect to arbitration. Within a priority group, lower numbered
Anna Bridge 142:4eea097334d6 163 * channels have higher priority than higher numbered channels.
Anna Bridge 142:4eea097334d6 164 */
Anna Bridge 142:4eea097334d6 165 bool highPri;
Anna Bridge 142:4eea097334d6 166
Anna Bridge 142:4eea097334d6 167 /**
Anna Bridge 142:4eea097334d6 168 * Select if interrupt shall be enabled for channel (triggering interrupt
Anna Bridge 142:4eea097334d6 169 * handler when dma_done signal is asserted). It should normally be
Anna Bridge 142:4eea097334d6 170 * enabled if using the callback feature for a channel, and disabled if
Anna Bridge 142:4eea097334d6 171 * not using the callback feature.
Anna Bridge 142:4eea097334d6 172 */
Anna Bridge 142:4eea097334d6 173 bool enableInt;
Anna Bridge 142:4eea097334d6 174
Anna Bridge 142:4eea097334d6 175 /**
Anna Bridge 142:4eea097334d6 176 * Channel control specifying the source of DMA signals. If accessing
Anna Bridge 142:4eea097334d6 177 * peripherals, use one of the DMAREQ_nnn defines available for the
Anna Bridge 142:4eea097334d6 178 * peripheral. Set it to 0 for memory-to-memory DMA cycles.
Anna Bridge 142:4eea097334d6 179 */
Anna Bridge 142:4eea097334d6 180 uint32_t select;
Anna Bridge 142:4eea097334d6 181
Anna Bridge 142:4eea097334d6 182 /**
Anna Bridge 142:4eea097334d6 183 * @brief
Anna Bridge 142:4eea097334d6 184 * User definable callback handling configuration.
Anna Bridge 142:4eea097334d6 185 * @details
Anna Bridge 142:4eea097334d6 186 * Please refer to structure definition for details. The callback
Anna Bridge 142:4eea097334d6 187 * is invoked when the specified DMA cycle is complete (when dma_done
Anna Bridge 142:4eea097334d6 188 * signal asserted). The callback is invoked in interrupt context,
Anna Bridge 142:4eea097334d6 189 * and should be efficient and non-blocking. Set to NULL to not
Anna Bridge 142:4eea097334d6 190 * use the callback feature.
Anna Bridge 142:4eea097334d6 191 * @note
Anna Bridge 142:4eea097334d6 192 * The referenced structure is used by the interrupt handler, and must
Anna Bridge 142:4eea097334d6 193 * be available until no longer used. Thus, in most cases it should
Anna Bridge 142:4eea097334d6 194 * not be located on the stack.
Anna Bridge 142:4eea097334d6 195 */
Anna Bridge 142:4eea097334d6 196 DMA_CB_TypeDef *cb;
Anna Bridge 142:4eea097334d6 197 } DMA_CfgChannel_TypeDef;
Anna Bridge 142:4eea097334d6 198
Anna Bridge 142:4eea097334d6 199 /**
Anna Bridge 142:4eea097334d6 200 * Configuration structure for primary or alternate descriptor
Anna Bridge 142:4eea097334d6 201 * (not used for scatter-gather DMA cycles).
Anna Bridge 142:4eea097334d6 202 */
Anna Bridge 160:5571c4ff569f 203 typedef struct {
Anna Bridge 142:4eea097334d6 204 /** Destination increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 205 DMA_DataInc_TypeDef dstInc;
Anna Bridge 142:4eea097334d6 206
Anna Bridge 142:4eea097334d6 207 /** Source increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 208 DMA_DataInc_TypeDef srcInc;
Anna Bridge 142:4eea097334d6 209
Anna Bridge 142:4eea097334d6 210 /** DMA transfer unit size. */
Anna Bridge 142:4eea097334d6 211 DMA_DataSize_TypeDef size;
Anna Bridge 142:4eea097334d6 212
Anna Bridge 142:4eea097334d6 213 /**
Anna Bridge 142:4eea097334d6 214 * Arbitration rate, ie number of DMA transfers done before rearbitration
Anna Bridge 142:4eea097334d6 215 * takes place.
Anna Bridge 142:4eea097334d6 216 */
Anna Bridge 142:4eea097334d6 217 DMA_ArbiterConfig_TypeDef arbRate;
Anna Bridge 142:4eea097334d6 218
Anna Bridge 142:4eea097334d6 219 /**
Anna Bridge 142:4eea097334d6 220 * HPROT signal state, please refer to reference manual, DMA chapter for
Anna Bridge 142:4eea097334d6 221 * further details. Normally set to 0 if protection is not an issue.
Anna Bridge 142:4eea097334d6 222 * The following bits are available:
Anna Bridge 142:4eea097334d6 223 * @li bit 0 - HPROT[1] control for source read accesses,
Anna Bridge 142:4eea097334d6 224 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 225 * @li bit 3 - HPROT[1] control for destination write accesses,
Anna Bridge 142:4eea097334d6 226 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 227 */
Anna Bridge 142:4eea097334d6 228 uint8_t hprot;
Anna Bridge 142:4eea097334d6 229 } DMA_CfgDescr_TypeDef;
Anna Bridge 142:4eea097334d6 230
Anna Bridge 160:5571c4ff569f 231 #if defined(_DMA_LOOP0_MASK) && defined(_DMA_LOOP1_MASK)
Anna Bridge 142:4eea097334d6 232 /**
Anna Bridge 142:4eea097334d6 233 * Configuration structure for loop mode
Anna Bridge 142:4eea097334d6 234 */
Anna Bridge 160:5571c4ff569f 235 typedef struct {
Anna Bridge 142:4eea097334d6 236 /** Enable repeated loop */
Anna Bridge 142:4eea097334d6 237 bool enable;
Anna Bridge 142:4eea097334d6 238 /** Width of transfer, reload value for nMinus1 */
Anna Bridge 142:4eea097334d6 239 uint16_t nMinus1;
Anna Bridge 142:4eea097334d6 240 } DMA_CfgLoop_TypeDef;
Anna Bridge 142:4eea097334d6 241 #endif
Anna Bridge 142:4eea097334d6 242
Anna Bridge 160:5571c4ff569f 243 #if defined(_DMA_RECT0_MASK)
Anna Bridge 142:4eea097334d6 244 /**
Anna Bridge 142:4eea097334d6 245 * Configuration structure for rectangular copy
Anna Bridge 142:4eea097334d6 246 */
Anna Bridge 160:5571c4ff569f 247 typedef struct {
Anna Bridge 142:4eea097334d6 248 /** DMA channel destination stride (width of destination image, distance between lines) */
Anna Bridge 142:4eea097334d6 249 uint16_t dstStride;
Anna Bridge 142:4eea097334d6 250 /** DMA channel source stride (width of source image, distance between lines) */
Anna Bridge 142:4eea097334d6 251 uint16_t srcStride;
Anna Bridge 142:4eea097334d6 252 /** 2D copy height */
Anna Bridge 142:4eea097334d6 253 uint16_t height;
Anna Bridge 142:4eea097334d6 254 } DMA_CfgRect_TypeDef;
Anna Bridge 142:4eea097334d6 255 #endif
Anna Bridge 142:4eea097334d6 256
Anna Bridge 142:4eea097334d6 257 /** Configuration structure for alternate scatter-gather descriptor. */
Anna Bridge 160:5571c4ff569f 258 typedef struct {
Anna Bridge 142:4eea097334d6 259 /** Pointer to location to transfer data from. */
Anna Bridge 142:4eea097334d6 260 void *src;
Anna Bridge 142:4eea097334d6 261
Anna Bridge 142:4eea097334d6 262 /** Pointer to location to transfer data to. */
Anna Bridge 142:4eea097334d6 263 void *dst;
Anna Bridge 142:4eea097334d6 264
Anna Bridge 142:4eea097334d6 265 /** Destination increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 266 DMA_DataInc_TypeDef dstInc;
Anna Bridge 142:4eea097334d6 267
Anna Bridge 142:4eea097334d6 268 /** Source increment size for each DMA transfer */
Anna Bridge 142:4eea097334d6 269 DMA_DataInc_TypeDef srcInc;
Anna Bridge 142:4eea097334d6 270
Anna Bridge 142:4eea097334d6 271 /** DMA transfer unit size. */
Anna Bridge 142:4eea097334d6 272 DMA_DataSize_TypeDef size;
Anna Bridge 142:4eea097334d6 273
Anna Bridge 142:4eea097334d6 274 /**
Anna Bridge 142:4eea097334d6 275 * Arbitration rate, ie number of DMA transfers done before rearbitration
Anna Bridge 142:4eea097334d6 276 * takes place.
Anna Bridge 142:4eea097334d6 277 */
Anna Bridge 142:4eea097334d6 278 DMA_ArbiterConfig_TypeDef arbRate;
Anna Bridge 142:4eea097334d6 279
Anna Bridge 142:4eea097334d6 280 /** Number of DMA transfers minus 1 to do. Must be <= 1023. */
Anna Bridge 142:4eea097334d6 281 uint16_t nMinus1;
Anna Bridge 142:4eea097334d6 282
Anna Bridge 142:4eea097334d6 283 /**
Anna Bridge 142:4eea097334d6 284 * HPROT signal state, please refer to reference manual, DMA chapter for
Anna Bridge 142:4eea097334d6 285 * further details. Normally set to 0 if protection is not an issue.
Anna Bridge 142:4eea097334d6 286 * The following bits are available:
Anna Bridge 142:4eea097334d6 287 * @li bit 0 - HPROT[1] control for source read accesses,
Anna Bridge 142:4eea097334d6 288 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 289 * @li bit 3 - HPROT[1] control for destination write accesses,
Anna Bridge 142:4eea097334d6 290 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 291 */
Anna Bridge 142:4eea097334d6 292 uint8_t hprot;
Anna Bridge 142:4eea097334d6 293
Anna Bridge 142:4eea097334d6 294 /** Specify if a memory or peripheral scatter-gather DMA cycle. Notice
Anna Bridge 142:4eea097334d6 295 * that this parameter should be the same for all alternate
Anna Bridge 142:4eea097334d6 296 * descriptors.
Anna Bridge 142:4eea097334d6 297 * @li true - this is a peripheral scatter-gather cycle
Anna Bridge 142:4eea097334d6 298 * @li false - this is a memory scatter-gather cycle
Anna Bridge 142:4eea097334d6 299 */
Anna Bridge 142:4eea097334d6 300 bool peripheral;
Anna Bridge 142:4eea097334d6 301 } DMA_CfgDescrSGAlt_TypeDef;
Anna Bridge 142:4eea097334d6 302
Anna Bridge 142:4eea097334d6 303 /** DMA init structure */
Anna Bridge 160:5571c4ff569f 304 typedef struct {
Anna Bridge 142:4eea097334d6 305 /**
Anna Bridge 142:4eea097334d6 306 * HPROT signal state when accessing the primary/alternate
Anna Bridge 142:4eea097334d6 307 * descriptors. Normally set to 0 if protection is not an issue.
Anna Bridge 142:4eea097334d6 308 * The following bits are available:
Anna Bridge 142:4eea097334d6 309 * @li bit 0 - HPROT[1] control for descriptor accesses (ie when
Anna Bridge 142:4eea097334d6 310 * the DMA controller accesses the channel control block itself),
Anna Bridge 142:4eea097334d6 311 * privileged/non-privileged access
Anna Bridge 142:4eea097334d6 312 */
Anna Bridge 142:4eea097334d6 313 uint8_t hprot;
Anna Bridge 142:4eea097334d6 314
Anna Bridge 142:4eea097334d6 315 /**
Anna Bridge 142:4eea097334d6 316 * Pointer to the controlblock in memory holding descriptors (channel
Anna Bridge 142:4eea097334d6 317 * control data structures). This memory must be properly aligned
Anna Bridge 142:4eea097334d6 318 * at a 256 bytes. I.e. the 8 least significant bits must be zero.
Anna Bridge 142:4eea097334d6 319 *
Anna Bridge 142:4eea097334d6 320 * Please refer to the reference manual, DMA chapter for more details.
Anna Bridge 142:4eea097334d6 321 *
Anna Bridge 142:4eea097334d6 322 * It is possible to provide a smaller memory block, only covering
Anna Bridge 142:4eea097334d6 323 * those channels actually used, if not all available channels are used.
Anna Bridge 142:4eea097334d6 324 * Ie, if only using 4 channels (0-3), both primary and alternate
Anna Bridge 142:4eea097334d6 325 * structures, then only 16*2*4 = 128 bytes must be provided. This
Anna Bridge 142:4eea097334d6 326 * implementation has however no check if later exceeding such a limit
Anna Bridge 142:4eea097334d6 327 * by configuring for instance channel 4, in which case memory overwrite
Anna Bridge 142:4eea097334d6 328 * of some other data will occur.
Anna Bridge 142:4eea097334d6 329 */
Anna Bridge 142:4eea097334d6 330 DMA_DESCRIPTOR_TypeDef *controlBlock;
Anna Bridge 142:4eea097334d6 331 } DMA_Init_TypeDef;
Anna Bridge 142:4eea097334d6 332
Anna Bridge 142:4eea097334d6 333 /*******************************************************************************
Anna Bridge 142:4eea097334d6 334 ***************************** PROTOTYPES **********************************
Anna Bridge 142:4eea097334d6 335 ******************************************************************************/
Anna Bridge 142:4eea097334d6 336
Anna Bridge 142:4eea097334d6 337 void DMA_ActivateAuto(unsigned int channel,
Anna Bridge 142:4eea097334d6 338 bool primary,
Anna Bridge 142:4eea097334d6 339 void *dst,
Anna Bridge 142:4eea097334d6 340 const void *src,
Anna Bridge 142:4eea097334d6 341 unsigned int nMinus1);
Anna Bridge 142:4eea097334d6 342 void DMA_ActivateBasic(unsigned int channel,
Anna Bridge 142:4eea097334d6 343 bool primary,
Anna Bridge 142:4eea097334d6 344 bool useBurst,
Anna Bridge 142:4eea097334d6 345 void *dst,
Anna Bridge 142:4eea097334d6 346 const void *src,
Anna Bridge 142:4eea097334d6 347 unsigned int nMinus1);
Anna Bridge 142:4eea097334d6 348 void DMA_ActivatePingPong(unsigned int channel,
Anna Bridge 142:4eea097334d6 349 bool useBurst,
Anna Bridge 142:4eea097334d6 350 void *primDst,
Anna Bridge 142:4eea097334d6 351 const void *primSrc,
Anna Bridge 142:4eea097334d6 352 unsigned int primNMinus1,
Anna Bridge 142:4eea097334d6 353 void *altDst,
Anna Bridge 142:4eea097334d6 354 const void *altSrc,
Anna Bridge 142:4eea097334d6 355 unsigned int altNMinus1);
Anna Bridge 142:4eea097334d6 356 void DMA_ActivateScatterGather(unsigned int channel,
Anna Bridge 142:4eea097334d6 357 bool useBurst,
Anna Bridge 142:4eea097334d6 358 DMA_DESCRIPTOR_TypeDef *altDescr,
Anna Bridge 142:4eea097334d6 359 unsigned int count);
Anna Bridge 142:4eea097334d6 360 void DMA_CfgChannel(unsigned int channel, DMA_CfgChannel_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 361 void DMA_CfgDescr(unsigned int channel,
Anna Bridge 142:4eea097334d6 362 bool primary,
Anna Bridge 142:4eea097334d6 363 DMA_CfgDescr_TypeDef *cfg);
Anna Bridge 160:5571c4ff569f 364 #if defined(_DMA_LOOP0_MASK) && defined(_DMA_LOOP1_MASK)
Anna Bridge 142:4eea097334d6 365 void DMA_CfgLoop(unsigned int channel, DMA_CfgLoop_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 366 #endif
Anna Bridge 142:4eea097334d6 367
Anna Bridge 160:5571c4ff569f 368 #if defined(_DMA_RECT0_MASK)
Anna Bridge 142:4eea097334d6 369 void DMA_CfgRect(unsigned int channel, DMA_CfgRect_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 370 #endif
Anna Bridge 142:4eea097334d6 371
Anna Bridge 160:5571c4ff569f 372 #if defined(_DMA_LOOP0_MASK) && defined(_DMA_LOOP1_MASK)
Anna Bridge 142:4eea097334d6 373 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 374 * @brief
Anna Bridge 142:4eea097334d6 375 * Clear Loop configuration for channel
Anna Bridge 142:4eea097334d6 376 *
Anna Bridge 142:4eea097334d6 377 * @param[in] channel
Anna Bridge 142:4eea097334d6 378 * Channel to reset loop configuration for
Anna Bridge 142:4eea097334d6 379 ******************************************************************************/
Anna Bridge 142:4eea097334d6 380 __STATIC_INLINE void DMA_ResetLoop(unsigned int channel)
Anna Bridge 142:4eea097334d6 381 {
Anna Bridge 142:4eea097334d6 382 /* Clean loop copy operation */
Anna Bridge 160:5571c4ff569f 383 switch (channel) {
Anna Bridge 142:4eea097334d6 384 case 0:
Anna Bridge 142:4eea097334d6 385 DMA->LOOP0 = _DMA_LOOP0_RESETVALUE;
Anna Bridge 142:4eea097334d6 386 break;
Anna Bridge 142:4eea097334d6 387 case 1:
Anna Bridge 142:4eea097334d6 388 DMA->LOOP1 = _DMA_LOOP1_RESETVALUE;
Anna Bridge 142:4eea097334d6 389 break;
Anna Bridge 142:4eea097334d6 390 default:
Anna Bridge 142:4eea097334d6 391 break;
Anna Bridge 142:4eea097334d6 392 }
Anna Bridge 142:4eea097334d6 393 }
Anna Bridge 142:4eea097334d6 394 #endif
Anna Bridge 142:4eea097334d6 395
Anna Bridge 160:5571c4ff569f 396 #if defined(_DMA_RECT0_MASK)
Anna Bridge 142:4eea097334d6 397 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 398 * @brief
Anna Bridge 142:4eea097334d6 399 * Clear Rect/2D DMA configuration for channel
Anna Bridge 142:4eea097334d6 400 *
Anna Bridge 142:4eea097334d6 401 * @param[in] channel
Anna Bridge 142:4eea097334d6 402 * Channel to reset loop configuration for
Anna Bridge 142:4eea097334d6 403 ******************************************************************************/
Anna Bridge 142:4eea097334d6 404 __STATIC_INLINE void DMA_ResetRect(unsigned int channel)
Anna Bridge 142:4eea097334d6 405 {
Anna Bridge 142:4eea097334d6 406 (void) channel;
Anna Bridge 142:4eea097334d6 407
Anna Bridge 142:4eea097334d6 408 /* Clear rect copy operation */
Anna Bridge 142:4eea097334d6 409 DMA->RECT0 = _DMA_RECT0_RESETVALUE;
Anna Bridge 142:4eea097334d6 410 }
Anna Bridge 142:4eea097334d6 411 #endif
Anna Bridge 142:4eea097334d6 412 void DMA_CfgDescrScatterGather(DMA_DESCRIPTOR_TypeDef *descr,
Anna Bridge 142:4eea097334d6 413 unsigned int indx,
Anna Bridge 142:4eea097334d6 414 DMA_CfgDescrSGAlt_TypeDef *cfg);
Anna Bridge 142:4eea097334d6 415 void DMA_ChannelEnable(unsigned int channel, bool enable);
Anna Bridge 142:4eea097334d6 416 bool DMA_ChannelEnabled(unsigned int channel);
Anna Bridge 142:4eea097334d6 417 void DMA_ChannelRequestEnable(unsigned int channel, bool enable);
Anna Bridge 142:4eea097334d6 418 void DMA_Init(DMA_Init_TypeDef *init);
Anna Bridge 142:4eea097334d6 419 void DMA_IRQHandler(void);
Anna Bridge 142:4eea097334d6 420 void DMA_RefreshPingPong(unsigned int channel,
Anna Bridge 142:4eea097334d6 421 bool primary,
Anna Bridge 142:4eea097334d6 422 bool useBurst,
Anna Bridge 142:4eea097334d6 423 void *dst,
Anna Bridge 142:4eea097334d6 424 const void *src,
Anna Bridge 142:4eea097334d6 425 unsigned int nMinus1,
Anna Bridge 142:4eea097334d6 426 bool last);
Anna Bridge 142:4eea097334d6 427 void DMA_Reset(void);
Anna Bridge 142:4eea097334d6 428
Anna Bridge 142:4eea097334d6 429 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 430 * @brief
Anna Bridge 142:4eea097334d6 431 * Clear one or more pending DMA interrupts.
Anna Bridge 142:4eea097334d6 432 *
Anna Bridge 142:4eea097334d6 433 * @param[in] flags
Anna Bridge 142:4eea097334d6 434 * Pending DMA interrupt sources to clear. Use one or more valid
Anna Bridge 142:4eea097334d6 435 * interrupt flags for the DMA module (DMA_IFC_nnn).
Anna Bridge 142:4eea097334d6 436 ******************************************************************************/
Anna Bridge 142:4eea097334d6 437 __STATIC_INLINE void DMA_IntClear(uint32_t flags)
Anna Bridge 142:4eea097334d6 438 {
Anna Bridge 142:4eea097334d6 439 DMA->IFC = flags;
Anna Bridge 142:4eea097334d6 440 }
Anna Bridge 142:4eea097334d6 441
Anna Bridge 142:4eea097334d6 442 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 443 * @brief
Anna Bridge 142:4eea097334d6 444 * Disable one or more DMA interrupts.
Anna Bridge 142:4eea097334d6 445 *
Anna Bridge 142:4eea097334d6 446 * @param[in] flags
Anna Bridge 142:4eea097334d6 447 * DMA interrupt sources to disable. Use one or more valid
Anna Bridge 142:4eea097334d6 448 * interrupt flags for the DMA module (DMA_IEN_nnn).
Anna Bridge 142:4eea097334d6 449 ******************************************************************************/
Anna Bridge 142:4eea097334d6 450 __STATIC_INLINE void DMA_IntDisable(uint32_t flags)
Anna Bridge 142:4eea097334d6 451 {
Anna Bridge 142:4eea097334d6 452 DMA->IEN &= ~flags;
Anna Bridge 142:4eea097334d6 453 }
Anna Bridge 142:4eea097334d6 454
Anna Bridge 142:4eea097334d6 455 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 456 * @brief
Anna Bridge 142:4eea097334d6 457 * Enable one or more DMA interrupts.
Anna Bridge 142:4eea097334d6 458 *
Anna Bridge 142:4eea097334d6 459 * @note
Anna Bridge 142:4eea097334d6 460 * Depending on the use, a pending interrupt may already be set prior to
Anna Bridge 142:4eea097334d6 461 * enabling the interrupt. Consider using DMA_IntClear() prior to enabling
Anna Bridge 142:4eea097334d6 462 * if such a pending interrupt should be ignored.
Anna Bridge 142:4eea097334d6 463 *
Anna Bridge 142:4eea097334d6 464 * @param[in] flags
Anna Bridge 142:4eea097334d6 465 * DMA interrupt sources to enable. Use one or more valid
Anna Bridge 142:4eea097334d6 466 * interrupt flags for the DMA module (DMA_IEN_nnn).
Anna Bridge 142:4eea097334d6 467 ******************************************************************************/
Anna Bridge 142:4eea097334d6 468 __STATIC_INLINE void DMA_IntEnable(uint32_t flags)
Anna Bridge 142:4eea097334d6 469 {
Anna Bridge 142:4eea097334d6 470 DMA->IEN |= flags;
Anna Bridge 142:4eea097334d6 471 }
Anna Bridge 142:4eea097334d6 472
Anna Bridge 142:4eea097334d6 473 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 474 * @brief
Anna Bridge 142:4eea097334d6 475 * Get pending DMA interrupt flags.
Anna Bridge 142:4eea097334d6 476 *
Anna Bridge 142:4eea097334d6 477 * @note
Anna Bridge 142:4eea097334d6 478 * The event bits are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 479 *
Anna Bridge 142:4eea097334d6 480 * @return
Anna Bridge 142:4eea097334d6 481 * DMA interrupt sources pending. Returns one or more valid
Anna Bridge 142:4eea097334d6 482 * interrupt flags for the DMA module (DMA_IF_nnn).
Anna Bridge 142:4eea097334d6 483 ******************************************************************************/
Anna Bridge 142:4eea097334d6 484 __STATIC_INLINE uint32_t DMA_IntGet(void)
Anna Bridge 142:4eea097334d6 485 {
Anna Bridge 142:4eea097334d6 486 return DMA->IF;
Anna Bridge 142:4eea097334d6 487 }
Anna Bridge 142:4eea097334d6 488
Anna Bridge 142:4eea097334d6 489 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 490 * @brief
Anna Bridge 142:4eea097334d6 491 * Get enabled and pending DMA interrupt flags.
Anna Bridge 142:4eea097334d6 492 * Useful for handling more interrupt sources in the same interrupt handler.
Anna Bridge 142:4eea097334d6 493 *
Anna Bridge 142:4eea097334d6 494 * @note
Anna Bridge 142:4eea097334d6 495 * Interrupt flags are not cleared by the use of this function.
Anna Bridge 142:4eea097334d6 496 *
Anna Bridge 142:4eea097334d6 497 * @return
Anna Bridge 142:4eea097334d6 498 * Pending and enabled DMA interrupt sources
Anna Bridge 142:4eea097334d6 499 * The return value is the bitwise AND of
Anna Bridge 142:4eea097334d6 500 * - the enabled interrupt sources in DMA_IEN and
Anna Bridge 142:4eea097334d6 501 * - the pending interrupt flags DMA_IF
Anna Bridge 142:4eea097334d6 502 ******************************************************************************/
Anna Bridge 142:4eea097334d6 503 __STATIC_INLINE uint32_t DMA_IntGetEnabled(void)
Anna Bridge 142:4eea097334d6 504 {
Anna Bridge 142:4eea097334d6 505 uint32_t ien;
Anna Bridge 142:4eea097334d6 506
Anna Bridge 142:4eea097334d6 507 ien = DMA->IEN;
Anna Bridge 142:4eea097334d6 508 return DMA->IF & ien;
Anna Bridge 142:4eea097334d6 509 }
Anna Bridge 142:4eea097334d6 510
Anna Bridge 142:4eea097334d6 511 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 512 * @brief
Anna Bridge 142:4eea097334d6 513 * Set one or more pending DMA interrupts
Anna Bridge 142:4eea097334d6 514 *
Anna Bridge 142:4eea097334d6 515 * @param[in] flags
Anna Bridge 142:4eea097334d6 516 * DMA interrupt sources to set to pending. Use one or more valid
Anna Bridge 142:4eea097334d6 517 * interrupt flags for the DMA module (DMA_IFS_nnn).
Anna Bridge 142:4eea097334d6 518 ******************************************************************************/
Anna Bridge 142:4eea097334d6 519 __STATIC_INLINE void DMA_IntSet(uint32_t flags)
Anna Bridge 142:4eea097334d6 520 {
Anna Bridge 142:4eea097334d6 521 DMA->IFS = flags;
Anna Bridge 142:4eea097334d6 522 }
Anna Bridge 142:4eea097334d6 523
Anna Bridge 142:4eea097334d6 524 /** @} (end addtogroup DMA) */
Anna Bridge 142:4eea097334d6 525 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 526
Anna Bridge 142:4eea097334d6 527 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 528 }
Anna Bridge 142:4eea097334d6 529 #endif
Anna Bridge 142:4eea097334d6 530
Anna Bridge 142:4eea097334d6 531 #endif /* defined( DMA_PRESENT ) */
Anna Bridge 142:4eea097334d6 532 #endif /* EM_DMA_H */