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TARGET_TB_SENSE_1/TOOLCHAIN_IAR/em_bus.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_TB_SENSE_12/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_bus.h@160:5571c4ff569f 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_bus.h
Anna Bridge 142:4eea097334d6 3 * @brief RAM and peripheral bit-field set and clear API
Anna Bridge 160:5571c4ff569f 4 * @version 5.3.3
Anna Bridge 142:4eea097334d6 5 *******************************************************************************
Anna Bridge 160:5571c4ff569f 6 * # License
Anna Bridge 142:4eea097334d6 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 8 *******************************************************************************
Anna Bridge 142:4eea097334d6 9 *
Anna Bridge 142:4eea097334d6 10 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 11 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 12 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 13 *
Anna Bridge 142:4eea097334d6 14 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 15 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 16 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 17 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 18 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 19 *
Anna Bridge 142:4eea097334d6 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 21 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 22 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 23 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 24 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 25 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 26 *
Anna Bridge 142:4eea097334d6 27 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 28 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 29 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 30 *
Anna Bridge 142:4eea097334d6 31 ******************************************************************************/
Anna Bridge 142:4eea097334d6 32
Anna Bridge 142:4eea097334d6 33 #ifndef EM_BUS_H
Anna Bridge 142:4eea097334d6 34 #define EM_BUS_H
Anna Bridge 142:4eea097334d6 35
Anna Bridge 142:4eea097334d6 36 #include "em_device.h"
Anna Bridge 142:4eea097334d6 37
Anna Bridge 142:4eea097334d6 38 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 39 extern "C" {
Anna Bridge 142:4eea097334d6 40 #endif
Anna Bridge 142:4eea097334d6 41
Anna Bridge 142:4eea097334d6 42 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 43 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 44 * @{
Anna Bridge 142:4eea097334d6 45 ******************************************************************************/
Anna Bridge 142:4eea097334d6 46
Anna Bridge 142:4eea097334d6 47 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 48 * @addtogroup BUS
Anna Bridge 142:4eea097334d6 49 * @brief BUS register and RAM bit/field read/write API
Anna Bridge 142:4eea097334d6 50 * @details
Anna Bridge 142:4eea097334d6 51 * API to perform bit-band and field set/clear access to RAM and peripherals.
Anna Bridge 142:4eea097334d6 52 * @{
Anna Bridge 142:4eea097334d6 53 ******************************************************************************/
Anna Bridge 142:4eea097334d6 54
Anna Bridge 142:4eea097334d6 55 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 56 * @brief
Anna Bridge 142:4eea097334d6 57 * Perform a single-bit write operation on a 32-bit word in RAM
Anna Bridge 142:4eea097334d6 58 *
Anna Bridge 142:4eea097334d6 59 * @details
Anna Bridge 142:4eea097334d6 60 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 61 * read-modify-write operation on a single bit write on a 32-bit word in RAM.
Anna Bridge 142:4eea097334d6 62 * Please refer to the reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 63 *
Anna Bridge 142:4eea097334d6 64 * @note
Anna Bridge 142:4eea097334d6 65 * This function is atomic on Cortex-M cores with bit-banding support. Bit-
Anna Bridge 142:4eea097334d6 66 * banding is a multicycle read-modify-write bus operation. RAM bit-banding is
Anna Bridge 142:4eea097334d6 67 * performed using the memory alias region at BITBAND_RAM_BASE.
Anna Bridge 142:4eea097334d6 68 *
Anna Bridge 142:4eea097334d6 69 * @param[in] addr Address of 32-bit word in RAM
Anna Bridge 142:4eea097334d6 70 *
Anna Bridge 142:4eea097334d6 71 * @param[in] bit Bit position to write, 0-31
Anna Bridge 142:4eea097334d6 72 *
Anna Bridge 142:4eea097334d6 73 * @param[in] val Value to set bit to, 0 or 1
Anna Bridge 142:4eea097334d6 74 ******************************************************************************/
Anna Bridge 142:4eea097334d6 75 __STATIC_INLINE void BUS_RamBitWrite(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 76 unsigned int bit,
Anna Bridge 142:4eea097334d6 77 unsigned int val)
Anna Bridge 142:4eea097334d6 78 {
Anna Bridge 160:5571c4ff569f 79 #if defined(BITBAND_RAM_BASE)
Anna Bridge 142:4eea097334d6 80 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 81 BITBAND_RAM_BASE + (((uint32_t)addr - SRAM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 82
Anna Bridge 142:4eea097334d6 83 *(volatile uint32_t *)aliasAddr = (uint32_t)val;
Anna Bridge 142:4eea097334d6 84 #else
Anna Bridge 142:4eea097334d6 85 uint32_t tmp = *addr;
Anna Bridge 142:4eea097334d6 86
Anna Bridge 142:4eea097334d6 87 /* Make sure val is not more than 1, because we only want to set one bit. */
Anna Bridge 142:4eea097334d6 88 *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
Anna Bridge 142:4eea097334d6 89 #endif
Anna Bridge 142:4eea097334d6 90 }
Anna Bridge 142:4eea097334d6 91
Anna Bridge 142:4eea097334d6 92 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 93 * @brief
Anna Bridge 142:4eea097334d6 94 * Perform a single-bit read operation on a 32-bit word in RAM
Anna Bridge 142:4eea097334d6 95 *
Anna Bridge 142:4eea097334d6 96 * @details
Anna Bridge 142:4eea097334d6 97 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 98 * read operation on a single register bit. Please refer to the
Anna Bridge 142:4eea097334d6 99 * reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 100 *
Anna Bridge 142:4eea097334d6 101 * @note
Anna Bridge 142:4eea097334d6 102 * This function is atomic on Cortex-M cores with bit-banding support.
Anna Bridge 142:4eea097334d6 103 * RAM bit-banding is performed using the memory alias region
Anna Bridge 142:4eea097334d6 104 * at BITBAND_RAM_BASE.
Anna Bridge 142:4eea097334d6 105 *
Anna Bridge 142:4eea097334d6 106 * @param[in] addr RAM address
Anna Bridge 142:4eea097334d6 107 *
Anna Bridge 142:4eea097334d6 108 * @param[in] bit Bit position to read, 0-31
Anna Bridge 142:4eea097334d6 109 *
Anna Bridge 142:4eea097334d6 110 * @return
Anna Bridge 142:4eea097334d6 111 * The requested bit shifted to bit position 0 in the return value
Anna Bridge 142:4eea097334d6 112 ******************************************************************************/
Anna Bridge 142:4eea097334d6 113 __STATIC_INLINE unsigned int BUS_RamBitRead(volatile const uint32_t *addr,
Anna Bridge 142:4eea097334d6 114 unsigned int bit)
Anna Bridge 142:4eea097334d6 115 {
Anna Bridge 160:5571c4ff569f 116 #if defined(BITBAND_RAM_BASE)
Anna Bridge 142:4eea097334d6 117 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 118 BITBAND_RAM_BASE + (((uint32_t)addr - SRAM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 119
Anna Bridge 142:4eea097334d6 120 return *(volatile uint32_t *)aliasAddr;
Anna Bridge 142:4eea097334d6 121 #else
Anna Bridge 142:4eea097334d6 122 return ((*addr) >> bit) & 1;
Anna Bridge 142:4eea097334d6 123 #endif
Anna Bridge 142:4eea097334d6 124 }
Anna Bridge 142:4eea097334d6 125
Anna Bridge 142:4eea097334d6 126 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 127 * @brief
Anna Bridge 142:4eea097334d6 128 * Perform a single-bit write operation on a peripheral register
Anna Bridge 142:4eea097334d6 129 *
Anna Bridge 142:4eea097334d6 130 * @details
Anna Bridge 142:4eea097334d6 131 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 132 * read-modify-write operation on a single register bit. Please refer to the
Anna Bridge 142:4eea097334d6 133 * reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 134 *
Anna Bridge 142:4eea097334d6 135 * @note
Anna Bridge 142:4eea097334d6 136 * This function is atomic on Cortex-M cores with bit-banding support. Bit-
Anna Bridge 142:4eea097334d6 137 * banding is a multicycle read-modify-write bus operation. Peripheral register
Anna Bridge 142:4eea097334d6 138 * bit-banding is performed using the memory alias region at BITBAND_PER_BASE.
Anna Bridge 142:4eea097334d6 139 *
Anna Bridge 142:4eea097334d6 140 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 141 *
Anna Bridge 142:4eea097334d6 142 * @param[in] bit Bit position to write, 0-31
Anna Bridge 142:4eea097334d6 143 *
Anna Bridge 142:4eea097334d6 144 * @param[in] val Value to set bit to, 0 or 1
Anna Bridge 142:4eea097334d6 145 ******************************************************************************/
Anna Bridge 142:4eea097334d6 146 __STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 147 unsigned int bit,
Anna Bridge 142:4eea097334d6 148 unsigned int val)
Anna Bridge 142:4eea097334d6 149 {
Anna Bridge 160:5571c4ff569f 150 #if defined(BITBAND_PER_BASE)
Anna Bridge 142:4eea097334d6 151 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 152 BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 153
Anna Bridge 142:4eea097334d6 154 *(volatile uint32_t *)aliasAddr = (uint32_t)val;
Anna Bridge 142:4eea097334d6 155 #else
Anna Bridge 142:4eea097334d6 156 uint32_t tmp = *addr;
Anna Bridge 142:4eea097334d6 157
Anna Bridge 142:4eea097334d6 158 /* Make sure val is not more than 1, because we only want to set one bit. */
Anna Bridge 142:4eea097334d6 159 *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
Anna Bridge 142:4eea097334d6 160 #endif
Anna Bridge 142:4eea097334d6 161 }
Anna Bridge 142:4eea097334d6 162
Anna Bridge 142:4eea097334d6 163 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 164 * @brief
Anna Bridge 142:4eea097334d6 165 * Perform a single-bit read operation on a peripheral register
Anna Bridge 142:4eea097334d6 166 *
Anna Bridge 142:4eea097334d6 167 * @details
Anna Bridge 142:4eea097334d6 168 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 169 * read operation on a single register bit. Please refer to the
Anna Bridge 142:4eea097334d6 170 * reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 171 *
Anna Bridge 142:4eea097334d6 172 * @note
Anna Bridge 142:4eea097334d6 173 * This function is atomic on Cortex-M cores with bit-banding support.
Anna Bridge 142:4eea097334d6 174 * Peripheral register bit-banding is performed using the memory alias
Anna Bridge 142:4eea097334d6 175 * region at BITBAND_PER_BASE.
Anna Bridge 142:4eea097334d6 176 *
Anna Bridge 142:4eea097334d6 177 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 178 *
Anna Bridge 142:4eea097334d6 179 * @param[in] bit Bit position to read, 0-31
Anna Bridge 142:4eea097334d6 180 *
Anna Bridge 142:4eea097334d6 181 * @return
Anna Bridge 142:4eea097334d6 182 * The requested bit shifted to bit position 0 in the return value
Anna Bridge 142:4eea097334d6 183 ******************************************************************************/
Anna Bridge 142:4eea097334d6 184 __STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr,
Anna Bridge 142:4eea097334d6 185 unsigned int bit)
Anna Bridge 142:4eea097334d6 186 {
Anna Bridge 160:5571c4ff569f 187 #if defined(BITBAND_PER_BASE)
Anna Bridge 142:4eea097334d6 188 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 189 BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 190
Anna Bridge 142:4eea097334d6 191 return *(volatile uint32_t *)aliasAddr;
Anna Bridge 142:4eea097334d6 192 #else
Anna Bridge 142:4eea097334d6 193 return ((*addr) >> bit) & 1;
Anna Bridge 142:4eea097334d6 194 #endif
Anna Bridge 142:4eea097334d6 195 }
Anna Bridge 142:4eea097334d6 196
Anna Bridge 142:4eea097334d6 197 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 198 * @brief
Anna Bridge 142:4eea097334d6 199 * Perform a masked set operation on peripheral register address.
Anna Bridge 142:4eea097334d6 200 *
Anna Bridge 142:4eea097334d6 201 * @details
Anna Bridge 142:4eea097334d6 202 * Peripheral register masked set provides a single-cycle and atomic set
Anna Bridge 142:4eea097334d6 203 * operation of a bit-mask in a peripheral register. All 1's in the mask are
Anna Bridge 142:4eea097334d6 204 * set to 1 in the register. All 0's in the mask are not changed in the
Anna Bridge 142:4eea097334d6 205 * register.
Anna Bridge 142:4eea097334d6 206 * RAMs and special peripherals are not supported. Please refer to the
Anna Bridge 142:4eea097334d6 207 * reference manual for further details about peripheral register field set.
Anna Bridge 142:4eea097334d6 208 *
Anna Bridge 142:4eea097334d6 209 * @note
Anna Bridge 142:4eea097334d6 210 * This function is single-cycle and atomic on cores with peripheral bit set
Anna Bridge 142:4eea097334d6 211 * and clear support. It uses the memory alias region at PER_BITSET_MEM_BASE.
Anna Bridge 142:4eea097334d6 212 *
Anna Bridge 142:4eea097334d6 213 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 214 *
Anna Bridge 142:4eea097334d6 215 * @param[in] mask Mask to set
Anna Bridge 142:4eea097334d6 216 ******************************************************************************/
Anna Bridge 142:4eea097334d6 217 __STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 218 uint32_t mask)
Anna Bridge 142:4eea097334d6 219 {
Anna Bridge 160:5571c4ff569f 220 #if defined(PER_BITSET_MEM_BASE)
Anna Bridge 142:4eea097334d6 221 uint32_t aliasAddr = PER_BITSET_MEM_BASE + ((uint32_t)addr - PER_MEM_BASE);
Anna Bridge 142:4eea097334d6 222 *(volatile uint32_t *)aliasAddr = mask;
Anna Bridge 142:4eea097334d6 223 #else
Anna Bridge 142:4eea097334d6 224 *addr |= mask;
Anna Bridge 142:4eea097334d6 225 #endif
Anna Bridge 142:4eea097334d6 226 }
Anna Bridge 142:4eea097334d6 227
Anna Bridge 142:4eea097334d6 228 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 229 * @brief
Anna Bridge 142:4eea097334d6 230 * Perform a masked clear operation on peripheral register address.
Anna Bridge 142:4eea097334d6 231 *
Anna Bridge 142:4eea097334d6 232 * @details
Anna Bridge 142:4eea097334d6 233 * Peripheral register masked clear provides a single-cycle and atomic clear
Anna Bridge 142:4eea097334d6 234 * operation of a bit-mask in a peripheral register. All 1's in the mask are
Anna Bridge 142:4eea097334d6 235 * set to 0 in the register.
Anna Bridge 142:4eea097334d6 236 * All 0's in the mask are not changed in the register.
Anna Bridge 142:4eea097334d6 237 * RAMs and special peripherals are not supported. Please refer to the
Anna Bridge 142:4eea097334d6 238 * reference manual for further details about peripheral register field clear.
Anna Bridge 142:4eea097334d6 239 *
Anna Bridge 142:4eea097334d6 240 * @note
Anna Bridge 142:4eea097334d6 241 * This function is single-cycle and atomic on cores with peripheral bit set
Anna Bridge 142:4eea097334d6 242 * and clear support. It uses the memory alias region at PER_BITCLR_MEM_BASE.
Anna Bridge 142:4eea097334d6 243 *
Anna Bridge 142:4eea097334d6 244 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 245 *
Anna Bridge 142:4eea097334d6 246 * @param[in] mask Mask to clear
Anna Bridge 142:4eea097334d6 247 ******************************************************************************/
Anna Bridge 142:4eea097334d6 248 __STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 249 uint32_t mask)
Anna Bridge 142:4eea097334d6 250 {
Anna Bridge 160:5571c4ff569f 251 #if defined(PER_BITCLR_MEM_BASE)
Anna Bridge 142:4eea097334d6 252 uint32_t aliasAddr = PER_BITCLR_MEM_BASE + ((uint32_t)addr - PER_MEM_BASE);
Anna Bridge 142:4eea097334d6 253 *(volatile uint32_t *)aliasAddr = mask;
Anna Bridge 142:4eea097334d6 254 #else
Anna Bridge 142:4eea097334d6 255 *addr &= ~mask;
Anna Bridge 142:4eea097334d6 256 #endif
Anna Bridge 142:4eea097334d6 257 }
Anna Bridge 142:4eea097334d6 258
Anna Bridge 142:4eea097334d6 259 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 260 * @brief
Anna Bridge 142:4eea097334d6 261 * Perform peripheral register masked clear and value write.
Anna Bridge 142:4eea097334d6 262 *
Anna Bridge 142:4eea097334d6 263 * @details
Anna Bridge 142:4eea097334d6 264 * This function first clears the mask in the peripheral register, then
Anna Bridge 142:4eea097334d6 265 * writes the value. Typically the mask is a bit-field in the register, and
Anna Bridge 142:4eea097334d6 266 * the value val is within the mask.
Anna Bridge 142:4eea097334d6 267 *
Anna Bridge 142:4eea097334d6 268 * @note
Anna Bridge 142:4eea097334d6 269 * This operation is not atomic. Note that the mask is first set to 0 before
Anna Bridge 142:4eea097334d6 270 * the val is set.
Anna Bridge 142:4eea097334d6 271 *
Anna Bridge 142:4eea097334d6 272 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 273 *
Anna Bridge 142:4eea097334d6 274 * @param[in] mask Peripheral register mask
Anna Bridge 142:4eea097334d6 275 *
Anna Bridge 142:4eea097334d6 276 * @param[in] val Peripheral register value. The value must be shifted to the
Anna Bridge 142:4eea097334d6 277 correct bit position in the register corresponding to the field
Anna Bridge 142:4eea097334d6 278 defined by the mask parameter. The register value must be
Anna Bridge 142:4eea097334d6 279 contained in the field defined by the mask parameter. This
Anna Bridge 142:4eea097334d6 280 function is not performing masking of val internally.
Anna Bridge 142:4eea097334d6 281 ******************************************************************************/
Anna Bridge 142:4eea097334d6 282 __STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 283 uint32_t mask,
Anna Bridge 142:4eea097334d6 284 uint32_t val)
Anna Bridge 142:4eea097334d6 285 {
Anna Bridge 160:5571c4ff569f 286 #if defined(PER_BITCLR_MEM_BASE)
Anna Bridge 142:4eea097334d6 287 BUS_RegMaskedClear(addr, mask);
Anna Bridge 142:4eea097334d6 288 BUS_RegMaskedSet(addr, val);
Anna Bridge 142:4eea097334d6 289 #else
Anna Bridge 142:4eea097334d6 290 *addr = (*addr & ~mask) | val;
Anna Bridge 142:4eea097334d6 291 #endif
Anna Bridge 142:4eea097334d6 292 }
Anna Bridge 142:4eea097334d6 293
Anna Bridge 142:4eea097334d6 294 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 295 * @brief
Anna Bridge 142:4eea097334d6 296 * Perform a peripheral register masked read
Anna Bridge 142:4eea097334d6 297 *
Anna Bridge 142:4eea097334d6 298 * @details
Anna Bridge 142:4eea097334d6 299 * Read an unshifted and masked value from a peripheral register.
Anna Bridge 142:4eea097334d6 300 *
Anna Bridge 142:4eea097334d6 301 * @note
Anna Bridge 142:4eea097334d6 302 * This operation is not hardware accelerated.
Anna Bridge 142:4eea097334d6 303 *
Anna Bridge 142:4eea097334d6 304 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 305 *
Anna Bridge 142:4eea097334d6 306 * @param[in] mask Peripheral register mask
Anna Bridge 142:4eea097334d6 307 *
Anna Bridge 142:4eea097334d6 308 * @return
Anna Bridge 142:4eea097334d6 309 * Unshifted and masked register value
Anna Bridge 142:4eea097334d6 310 ******************************************************************************/
Anna Bridge 142:4eea097334d6 311 __STATIC_INLINE uint32_t BUS_RegMaskedRead(volatile const uint32_t *addr,
Anna Bridge 142:4eea097334d6 312 uint32_t mask)
Anna Bridge 142:4eea097334d6 313 {
Anna Bridge 142:4eea097334d6 314 return *addr & mask;
Anna Bridge 142:4eea097334d6 315 }
Anna Bridge 142:4eea097334d6 316
Anna Bridge 142:4eea097334d6 317 /** @} (end addtogroup BUS) */
Anna Bridge 142:4eea097334d6 318 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 319
Anna Bridge 142:4eea097334d6 320 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 321 }
Anna Bridge 142:4eea097334d6 322 #endif
Anna Bridge 142:4eea097334d6 323
Anna Bridge 142:4eea097334d6 324 #endif /* EM_BUS_H */