mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_TB_SENSE_12/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_bus.h@142:4eea097334d6, 2017-05-10 (annotated)

Committer:
Anna Bridge
Date:
Wed May 10 11:31:27 2017 +0100
Revision:
142:4eea097334d6
Child:
159:7130f322cb7e
Release 142 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



4059: [Silicon Labs] Rename targets https://github.com/ARMmbed/mbed-os/pull/4059

4187: [NCS36510] Reduce default heap size allocated by IAR to 1/4 of RAM https://github.com/ARMmbed/mbed-os/pull/4187

4225: fixed missing device_name for xDot and removed progen https://github.com/ARMmbed/mbed-os/pull/4225

4251: Fix C++11 build error w/ u-blox EVK-ODIN-W2 https://github.com/ARMmbed/mbed-os/pull/4251

4236: STM32 Fixed warning related to __packed redefinition https://github.com/ARMmbed/mbed-os/pull/4236

4190: LPC4088: Enable LWIP feature https://github.com/ARMmbed/mbed-os/pull/4190

4260: Inherit Xadow M0 target from LPC11U35_501 https://github.com/ARMmbed/mbed-os/pull/4260

4249: Add consistent button names across targets https://github.com/ARMmbed/mbed-os/pull/4249

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Anna Bridge 142:4eea097334d6 1 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 2 * @file em_bus.h
Anna Bridge 142:4eea097334d6 3 * @brief RAM and peripheral bit-field set and clear API
Anna Bridge 142:4eea097334d6 4 * @version 5.1.2
Anna Bridge 142:4eea097334d6 5 *******************************************************************************
Anna Bridge 142:4eea097334d6 6 * @section License
Anna Bridge 142:4eea097334d6 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
Anna Bridge 142:4eea097334d6 8 *******************************************************************************
Anna Bridge 142:4eea097334d6 9 *
Anna Bridge 142:4eea097334d6 10 * Permission is granted to anyone to use this software for any purpose,
Anna Bridge 142:4eea097334d6 11 * including commercial applications, and to alter it and redistribute it
Anna Bridge 142:4eea097334d6 12 * freely, subject to the following restrictions:
Anna Bridge 142:4eea097334d6 13 *
Anna Bridge 142:4eea097334d6 14 * 1. The origin of this software must not be misrepresented; you must not
Anna Bridge 142:4eea097334d6 15 * claim that you wrote the original software.
Anna Bridge 142:4eea097334d6 16 * 2. Altered source versions must be plainly marked as such, and must not be
Anna Bridge 142:4eea097334d6 17 * misrepresented as being the original software.
Anna Bridge 142:4eea097334d6 18 * 3. This notice may not be removed or altered from any source distribution.
Anna Bridge 142:4eea097334d6 19 *
Anna Bridge 142:4eea097334d6 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
Anna Bridge 142:4eea097334d6 21 * obligation to support this Software. Silicon Labs is providing the
Anna Bridge 142:4eea097334d6 22 * Software "AS IS", with no express or implied warranties of any kind,
Anna Bridge 142:4eea097334d6 23 * including, but not limited to, any implied warranties of merchantability
Anna Bridge 142:4eea097334d6 24 * or fitness for any particular purpose or warranties against infringement
Anna Bridge 142:4eea097334d6 25 * of any proprietary rights of a third party.
Anna Bridge 142:4eea097334d6 26 *
Anna Bridge 142:4eea097334d6 27 * Silicon Labs will not be liable for any consequential, incidental, or
Anna Bridge 142:4eea097334d6 28 * special damages, or any other relief, or for any claim by any third party,
Anna Bridge 142:4eea097334d6 29 * arising from your use of this Software.
Anna Bridge 142:4eea097334d6 30 *
Anna Bridge 142:4eea097334d6 31 ******************************************************************************/
Anna Bridge 142:4eea097334d6 32
Anna Bridge 142:4eea097334d6 33 #ifndef EM_BUS_H
Anna Bridge 142:4eea097334d6 34 #define EM_BUS_H
Anna Bridge 142:4eea097334d6 35
Anna Bridge 142:4eea097334d6 36 #include "em_device.h"
Anna Bridge 142:4eea097334d6 37
Anna Bridge 142:4eea097334d6 38 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 39 extern "C" {
Anna Bridge 142:4eea097334d6 40 #endif
Anna Bridge 142:4eea097334d6 41
Anna Bridge 142:4eea097334d6 42 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 43 * @addtogroup emlib
Anna Bridge 142:4eea097334d6 44 * @{
Anna Bridge 142:4eea097334d6 45 ******************************************************************************/
Anna Bridge 142:4eea097334d6 46
Anna Bridge 142:4eea097334d6 47 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 48 * @addtogroup BUS
Anna Bridge 142:4eea097334d6 49 * @brief BUS register and RAM bit/field read/write API
Anna Bridge 142:4eea097334d6 50 * @details
Anna Bridge 142:4eea097334d6 51 * API to perform bit-band and field set/clear access to RAM and peripherals.
Anna Bridge 142:4eea097334d6 52 * @{
Anna Bridge 142:4eea097334d6 53 ******************************************************************************/
Anna Bridge 142:4eea097334d6 54
Anna Bridge 142:4eea097334d6 55 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 56 * @brief
Anna Bridge 142:4eea097334d6 57 * Perform a single-bit write operation on a 32-bit word in RAM
Anna Bridge 142:4eea097334d6 58 *
Anna Bridge 142:4eea097334d6 59 * @details
Anna Bridge 142:4eea097334d6 60 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 61 * read-modify-write operation on a single bit write on a 32-bit word in RAM.
Anna Bridge 142:4eea097334d6 62 * Please refer to the reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 63 *
Anna Bridge 142:4eea097334d6 64 * @note
Anna Bridge 142:4eea097334d6 65 * This function is atomic on Cortex-M cores with bit-banding support. Bit-
Anna Bridge 142:4eea097334d6 66 * banding is a multicycle read-modify-write bus operation. RAM bit-banding is
Anna Bridge 142:4eea097334d6 67 * performed using the memory alias region at BITBAND_RAM_BASE.
Anna Bridge 142:4eea097334d6 68 *
Anna Bridge 142:4eea097334d6 69 * @param[in] addr Address of 32-bit word in RAM
Anna Bridge 142:4eea097334d6 70 *
Anna Bridge 142:4eea097334d6 71 * @param[in] bit Bit position to write, 0-31
Anna Bridge 142:4eea097334d6 72 *
Anna Bridge 142:4eea097334d6 73 * @param[in] val Value to set bit to, 0 or 1
Anna Bridge 142:4eea097334d6 74 ******************************************************************************/
Anna Bridge 142:4eea097334d6 75 __STATIC_INLINE void BUS_RamBitWrite(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 76 unsigned int bit,
Anna Bridge 142:4eea097334d6 77 unsigned int val)
Anna Bridge 142:4eea097334d6 78 {
Anna Bridge 142:4eea097334d6 79 #if defined( BITBAND_RAM_BASE )
Anna Bridge 142:4eea097334d6 80 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 81 BITBAND_RAM_BASE + (((uint32_t)addr - SRAM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 82
Anna Bridge 142:4eea097334d6 83 *(volatile uint32_t *)aliasAddr = (uint32_t)val;
Anna Bridge 142:4eea097334d6 84 #else
Anna Bridge 142:4eea097334d6 85 uint32_t tmp = *addr;
Anna Bridge 142:4eea097334d6 86
Anna Bridge 142:4eea097334d6 87 /* Make sure val is not more than 1, because we only want to set one bit. */
Anna Bridge 142:4eea097334d6 88 *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
Anna Bridge 142:4eea097334d6 89 #endif
Anna Bridge 142:4eea097334d6 90 }
Anna Bridge 142:4eea097334d6 91
Anna Bridge 142:4eea097334d6 92
Anna Bridge 142:4eea097334d6 93 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 94 * @brief
Anna Bridge 142:4eea097334d6 95 * Perform a single-bit read operation on a 32-bit word in RAM
Anna Bridge 142:4eea097334d6 96 *
Anna Bridge 142:4eea097334d6 97 * @details
Anna Bridge 142:4eea097334d6 98 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 99 * read operation on a single register bit. Please refer to the
Anna Bridge 142:4eea097334d6 100 * reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 101 *
Anna Bridge 142:4eea097334d6 102 * @note
Anna Bridge 142:4eea097334d6 103 * This function is atomic on Cortex-M cores with bit-banding support.
Anna Bridge 142:4eea097334d6 104 * RAM bit-banding is performed using the memory alias region
Anna Bridge 142:4eea097334d6 105 * at BITBAND_RAM_BASE.
Anna Bridge 142:4eea097334d6 106 *
Anna Bridge 142:4eea097334d6 107 * @param[in] addr RAM address
Anna Bridge 142:4eea097334d6 108 *
Anna Bridge 142:4eea097334d6 109 * @param[in] bit Bit position to read, 0-31
Anna Bridge 142:4eea097334d6 110 *
Anna Bridge 142:4eea097334d6 111 * @return
Anna Bridge 142:4eea097334d6 112 * The requested bit shifted to bit position 0 in the return value
Anna Bridge 142:4eea097334d6 113 ******************************************************************************/
Anna Bridge 142:4eea097334d6 114 __STATIC_INLINE unsigned int BUS_RamBitRead(volatile const uint32_t *addr,
Anna Bridge 142:4eea097334d6 115 unsigned int bit)
Anna Bridge 142:4eea097334d6 116 {
Anna Bridge 142:4eea097334d6 117 #if defined( BITBAND_RAM_BASE )
Anna Bridge 142:4eea097334d6 118 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 119 BITBAND_RAM_BASE + (((uint32_t)addr - SRAM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 120
Anna Bridge 142:4eea097334d6 121 return *(volatile uint32_t *)aliasAddr;
Anna Bridge 142:4eea097334d6 122 #else
Anna Bridge 142:4eea097334d6 123 return ((*addr) >> bit) & 1;
Anna Bridge 142:4eea097334d6 124 #endif
Anna Bridge 142:4eea097334d6 125 }
Anna Bridge 142:4eea097334d6 126
Anna Bridge 142:4eea097334d6 127
Anna Bridge 142:4eea097334d6 128 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 129 * @brief
Anna Bridge 142:4eea097334d6 130 * Perform a single-bit write operation on a peripheral register
Anna Bridge 142:4eea097334d6 131 *
Anna Bridge 142:4eea097334d6 132 * @details
Anna Bridge 142:4eea097334d6 133 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 134 * read-modify-write operation on a single register bit. Please refer to the
Anna Bridge 142:4eea097334d6 135 * reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 136 *
Anna Bridge 142:4eea097334d6 137 * @note
Anna Bridge 142:4eea097334d6 138 * This function is atomic on Cortex-M cores with bit-banding support. Bit-
Anna Bridge 142:4eea097334d6 139 * banding is a multicycle read-modify-write bus operation. Peripheral register
Anna Bridge 142:4eea097334d6 140 * bit-banding is performed using the memory alias region at BITBAND_PER_BASE.
Anna Bridge 142:4eea097334d6 141 *
Anna Bridge 142:4eea097334d6 142 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 143 *
Anna Bridge 142:4eea097334d6 144 * @param[in] bit Bit position to write, 0-31
Anna Bridge 142:4eea097334d6 145 *
Anna Bridge 142:4eea097334d6 146 * @param[in] val Value to set bit to, 0 or 1
Anna Bridge 142:4eea097334d6 147 ******************************************************************************/
Anna Bridge 142:4eea097334d6 148 __STATIC_INLINE void BUS_RegBitWrite(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 149 unsigned int bit,
Anna Bridge 142:4eea097334d6 150 unsigned int val)
Anna Bridge 142:4eea097334d6 151 {
Anna Bridge 142:4eea097334d6 152 #if defined( BITBAND_PER_BASE )
Anna Bridge 142:4eea097334d6 153 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 154 BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 155
Anna Bridge 142:4eea097334d6 156 *(volatile uint32_t *)aliasAddr = (uint32_t)val;
Anna Bridge 142:4eea097334d6 157 #else
Anna Bridge 142:4eea097334d6 158 uint32_t tmp = *addr;
Anna Bridge 142:4eea097334d6 159
Anna Bridge 142:4eea097334d6 160 /* Make sure val is not more than 1, because we only want to set one bit. */
Anna Bridge 142:4eea097334d6 161 *addr = (tmp & ~(1 << bit)) | ((val & 1) << bit);
Anna Bridge 142:4eea097334d6 162 #endif
Anna Bridge 142:4eea097334d6 163 }
Anna Bridge 142:4eea097334d6 164
Anna Bridge 142:4eea097334d6 165
Anna Bridge 142:4eea097334d6 166 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 167 * @brief
Anna Bridge 142:4eea097334d6 168 * Perform a single-bit read operation on a peripheral register
Anna Bridge 142:4eea097334d6 169 *
Anna Bridge 142:4eea097334d6 170 * @details
Anna Bridge 142:4eea097334d6 171 * This function uses Cortex-M bit-banding hardware to perform an atomic
Anna Bridge 142:4eea097334d6 172 * read operation on a single register bit. Please refer to the
Anna Bridge 142:4eea097334d6 173 * reference manual for further details about bit-banding.
Anna Bridge 142:4eea097334d6 174 *
Anna Bridge 142:4eea097334d6 175 * @note
Anna Bridge 142:4eea097334d6 176 * This function is atomic on Cortex-M cores with bit-banding support.
Anna Bridge 142:4eea097334d6 177 * Peripheral register bit-banding is performed using the memory alias
Anna Bridge 142:4eea097334d6 178 * region at BITBAND_PER_BASE.
Anna Bridge 142:4eea097334d6 179 *
Anna Bridge 142:4eea097334d6 180 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 181 *
Anna Bridge 142:4eea097334d6 182 * @param[in] bit Bit position to read, 0-31
Anna Bridge 142:4eea097334d6 183 *
Anna Bridge 142:4eea097334d6 184 * @return
Anna Bridge 142:4eea097334d6 185 * The requested bit shifted to bit position 0 in the return value
Anna Bridge 142:4eea097334d6 186 ******************************************************************************/
Anna Bridge 142:4eea097334d6 187 __STATIC_INLINE unsigned int BUS_RegBitRead(volatile const uint32_t *addr,
Anna Bridge 142:4eea097334d6 188 unsigned int bit)
Anna Bridge 142:4eea097334d6 189 {
Anna Bridge 142:4eea097334d6 190 #if defined( BITBAND_PER_BASE )
Anna Bridge 142:4eea097334d6 191 uint32_t aliasAddr =
Anna Bridge 142:4eea097334d6 192 BITBAND_PER_BASE + (((uint32_t)addr - PER_MEM_BASE) * 32) + (bit * 4);
Anna Bridge 142:4eea097334d6 193
Anna Bridge 142:4eea097334d6 194 return *(volatile uint32_t *)aliasAddr;
Anna Bridge 142:4eea097334d6 195 #else
Anna Bridge 142:4eea097334d6 196 return ((*addr) >> bit) & 1;
Anna Bridge 142:4eea097334d6 197 #endif
Anna Bridge 142:4eea097334d6 198 }
Anna Bridge 142:4eea097334d6 199
Anna Bridge 142:4eea097334d6 200
Anna Bridge 142:4eea097334d6 201 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 202 * @brief
Anna Bridge 142:4eea097334d6 203 * Perform a masked set operation on peripheral register address.
Anna Bridge 142:4eea097334d6 204 *
Anna Bridge 142:4eea097334d6 205 * @details
Anna Bridge 142:4eea097334d6 206 * Peripheral register masked set provides a single-cycle and atomic set
Anna Bridge 142:4eea097334d6 207 * operation of a bit-mask in a peripheral register. All 1's in the mask are
Anna Bridge 142:4eea097334d6 208 * set to 1 in the register. All 0's in the mask are not changed in the
Anna Bridge 142:4eea097334d6 209 * register.
Anna Bridge 142:4eea097334d6 210 * RAMs and special peripherals are not supported. Please refer to the
Anna Bridge 142:4eea097334d6 211 * reference manual for further details about peripheral register field set.
Anna Bridge 142:4eea097334d6 212 *
Anna Bridge 142:4eea097334d6 213 * @note
Anna Bridge 142:4eea097334d6 214 * This function is single-cycle and atomic on cores with peripheral bit set
Anna Bridge 142:4eea097334d6 215 * and clear support. It uses the memory alias region at PER_BITSET_MEM_BASE.
Anna Bridge 142:4eea097334d6 216 *
Anna Bridge 142:4eea097334d6 217 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 218 *
Anna Bridge 142:4eea097334d6 219 * @param[in] mask Mask to set
Anna Bridge 142:4eea097334d6 220 ******************************************************************************/
Anna Bridge 142:4eea097334d6 221 __STATIC_INLINE void BUS_RegMaskedSet(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 222 uint32_t mask)
Anna Bridge 142:4eea097334d6 223 {
Anna Bridge 142:4eea097334d6 224 #if defined( PER_BITSET_MEM_BASE )
Anna Bridge 142:4eea097334d6 225 uint32_t aliasAddr = PER_BITSET_MEM_BASE + ((uint32_t)addr - PER_MEM_BASE);
Anna Bridge 142:4eea097334d6 226 *(volatile uint32_t *)aliasAddr = mask;
Anna Bridge 142:4eea097334d6 227 #else
Anna Bridge 142:4eea097334d6 228 *addr |= mask;
Anna Bridge 142:4eea097334d6 229 #endif
Anna Bridge 142:4eea097334d6 230 }
Anna Bridge 142:4eea097334d6 231
Anna Bridge 142:4eea097334d6 232
Anna Bridge 142:4eea097334d6 233 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 234 * @brief
Anna Bridge 142:4eea097334d6 235 * Perform a masked clear operation on peripheral register address.
Anna Bridge 142:4eea097334d6 236 *
Anna Bridge 142:4eea097334d6 237 * @details
Anna Bridge 142:4eea097334d6 238 * Peripheral register masked clear provides a single-cycle and atomic clear
Anna Bridge 142:4eea097334d6 239 * operation of a bit-mask in a peripheral register. All 1's in the mask are
Anna Bridge 142:4eea097334d6 240 * set to 0 in the register.
Anna Bridge 142:4eea097334d6 241 * All 0's in the mask are not changed in the register.
Anna Bridge 142:4eea097334d6 242 * RAMs and special peripherals are not supported. Please refer to the
Anna Bridge 142:4eea097334d6 243 * reference manual for further details about peripheral register field clear.
Anna Bridge 142:4eea097334d6 244 *
Anna Bridge 142:4eea097334d6 245 * @note
Anna Bridge 142:4eea097334d6 246 * This function is single-cycle and atomic on cores with peripheral bit set
Anna Bridge 142:4eea097334d6 247 * and clear support. It uses the memory alias region at PER_BITCLR_MEM_BASE.
Anna Bridge 142:4eea097334d6 248 *
Anna Bridge 142:4eea097334d6 249 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 250 *
Anna Bridge 142:4eea097334d6 251 * @param[in] mask Mask to clear
Anna Bridge 142:4eea097334d6 252 ******************************************************************************/
Anna Bridge 142:4eea097334d6 253 __STATIC_INLINE void BUS_RegMaskedClear(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 254 uint32_t mask)
Anna Bridge 142:4eea097334d6 255 {
Anna Bridge 142:4eea097334d6 256 #if defined( PER_BITCLR_MEM_BASE )
Anna Bridge 142:4eea097334d6 257 uint32_t aliasAddr = PER_BITCLR_MEM_BASE + ((uint32_t)addr - PER_MEM_BASE);
Anna Bridge 142:4eea097334d6 258 *(volatile uint32_t *)aliasAddr = mask;
Anna Bridge 142:4eea097334d6 259 #else
Anna Bridge 142:4eea097334d6 260 *addr &= ~mask;
Anna Bridge 142:4eea097334d6 261 #endif
Anna Bridge 142:4eea097334d6 262 }
Anna Bridge 142:4eea097334d6 263
Anna Bridge 142:4eea097334d6 264
Anna Bridge 142:4eea097334d6 265 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 266 * @brief
Anna Bridge 142:4eea097334d6 267 * Perform peripheral register masked clear and value write.
Anna Bridge 142:4eea097334d6 268 *
Anna Bridge 142:4eea097334d6 269 * @details
Anna Bridge 142:4eea097334d6 270 * This function first clears the mask in the peripheral register, then
Anna Bridge 142:4eea097334d6 271 * writes the value. Typically the mask is a bit-field in the register, and
Anna Bridge 142:4eea097334d6 272 * the value val is within the mask.
Anna Bridge 142:4eea097334d6 273 *
Anna Bridge 142:4eea097334d6 274 * @note
Anna Bridge 142:4eea097334d6 275 * This operation is not atomic. Note that the mask is first set to 0 before
Anna Bridge 142:4eea097334d6 276 * the val is set.
Anna Bridge 142:4eea097334d6 277 *
Anna Bridge 142:4eea097334d6 278 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 279 *
Anna Bridge 142:4eea097334d6 280 * @param[in] mask Peripheral register mask
Anna Bridge 142:4eea097334d6 281 *
Anna Bridge 142:4eea097334d6 282 * @param[in] val Peripheral register value. The value must be shifted to the
Anna Bridge 142:4eea097334d6 283 correct bit position in the register corresponding to the field
Anna Bridge 142:4eea097334d6 284 defined by the mask parameter. The register value must be
Anna Bridge 142:4eea097334d6 285 contained in the field defined by the mask parameter. This
Anna Bridge 142:4eea097334d6 286 function is not performing masking of val internally.
Anna Bridge 142:4eea097334d6 287 ******************************************************************************/
Anna Bridge 142:4eea097334d6 288 __STATIC_INLINE void BUS_RegMaskedWrite(volatile uint32_t *addr,
Anna Bridge 142:4eea097334d6 289 uint32_t mask,
Anna Bridge 142:4eea097334d6 290 uint32_t val)
Anna Bridge 142:4eea097334d6 291 {
Anna Bridge 142:4eea097334d6 292 #if defined( PER_BITCLR_MEM_BASE )
Anna Bridge 142:4eea097334d6 293 BUS_RegMaskedClear(addr, mask);
Anna Bridge 142:4eea097334d6 294 BUS_RegMaskedSet(addr, val);
Anna Bridge 142:4eea097334d6 295 #else
Anna Bridge 142:4eea097334d6 296 *addr = (*addr & ~mask) | val;
Anna Bridge 142:4eea097334d6 297 #endif
Anna Bridge 142:4eea097334d6 298 }
Anna Bridge 142:4eea097334d6 299
Anna Bridge 142:4eea097334d6 300
Anna Bridge 142:4eea097334d6 301 /***************************************************************************//**
Anna Bridge 142:4eea097334d6 302 * @brief
Anna Bridge 142:4eea097334d6 303 * Perform a peripheral register masked read
Anna Bridge 142:4eea097334d6 304 *
Anna Bridge 142:4eea097334d6 305 * @details
Anna Bridge 142:4eea097334d6 306 * Read an unshifted and masked value from a peripheral register.
Anna Bridge 142:4eea097334d6 307 *
Anna Bridge 142:4eea097334d6 308 * @note
Anna Bridge 142:4eea097334d6 309 * This operation is not hardware accelerated.
Anna Bridge 142:4eea097334d6 310 *
Anna Bridge 142:4eea097334d6 311 * @param[in] addr Peripheral register address
Anna Bridge 142:4eea097334d6 312 *
Anna Bridge 142:4eea097334d6 313 * @param[in] mask Peripheral register mask
Anna Bridge 142:4eea097334d6 314 *
Anna Bridge 142:4eea097334d6 315 * @return
Anna Bridge 142:4eea097334d6 316 * Unshifted and masked register value
Anna Bridge 142:4eea097334d6 317 ******************************************************************************/
Anna Bridge 142:4eea097334d6 318 __STATIC_INLINE uint32_t BUS_RegMaskedRead(volatile const uint32_t *addr,
Anna Bridge 142:4eea097334d6 319 uint32_t mask)
Anna Bridge 142:4eea097334d6 320 {
Anna Bridge 142:4eea097334d6 321 return *addr & mask;
Anna Bridge 142:4eea097334d6 322 }
Anna Bridge 142:4eea097334d6 323
Anna Bridge 142:4eea097334d6 324
Anna Bridge 142:4eea097334d6 325 /** @} (end addtogroup BUS) */
Anna Bridge 142:4eea097334d6 326 /** @} (end addtogroup emlib) */
Anna Bridge 142:4eea097334d6 327
Anna Bridge 142:4eea097334d6 328 #ifdef __cplusplus
Anna Bridge 142:4eea097334d6 329 }
Anna Bridge 142:4eea097334d6 330 #endif
Anna Bridge 142:4eea097334d6 331
Anna Bridge 142:4eea097334d6 332 #endif /* EM_BUS_H */