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TARGET_SDT64B/TOOLCHAIN_ARM_STD/PeripheralNames.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Child:
172:65be27845400
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /* mbed Microcontroller Library
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2006-2013 ARM Limited
AnnaBridge 171:3a7713b1edbc 3 *
AnnaBridge 171:3a7713b1edbc 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 171:3a7713b1edbc 5 * you may not use this file except in compliance with the License.
AnnaBridge 171:3a7713b1edbc 6 * You may obtain a copy of the License at
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 171:3a7713b1edbc 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 171:3a7713b1edbc 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 171:3a7713b1edbc 13 * See the License for the specific language governing permissions and
AnnaBridge 171:3a7713b1edbc 14 * limitations under the License.
AnnaBridge 171:3a7713b1edbc 15 */
AnnaBridge 171:3a7713b1edbc 16 #ifndef MBED_PERIPHERALNAMES_H
AnnaBridge 171:3a7713b1edbc 17 #define MBED_PERIPHERALNAMES_H
AnnaBridge 171:3a7713b1edbc 18
AnnaBridge 171:3a7713b1edbc 19 #include "cmsis.h"
AnnaBridge 171:3a7713b1edbc 20
AnnaBridge 171:3a7713b1edbc 21 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 22 extern "C" {
AnnaBridge 171:3a7713b1edbc 23 #endif
AnnaBridge 171:3a7713b1edbc 24
AnnaBridge 171:3a7713b1edbc 25 typedef enum {
AnnaBridge 171:3a7713b1edbc 26 OSC32KCLK = 0,
AnnaBridge 171:3a7713b1edbc 27 } RTCName;
AnnaBridge 171:3a7713b1edbc 28
AnnaBridge 171:3a7713b1edbc 29 typedef enum {
AnnaBridge 171:3a7713b1edbc 30 UART_0 = 0,
AnnaBridge 171:3a7713b1edbc 31 UART_1 = 1,
AnnaBridge 171:3a7713b1edbc 32 UART_2 = 2,
AnnaBridge 171:3a7713b1edbc 33 UART_3 = 3,
AnnaBridge 171:3a7713b1edbc 34 UART_4 = 4,
AnnaBridge 171:3a7713b1edbc 35 } UARTName;
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #define STDIO_UART_TX USBTX
AnnaBridge 171:3a7713b1edbc 38 #define STDIO_UART_RX USBRX
AnnaBridge 171:3a7713b1edbc 39 #define STDIO_UART UART_0
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 typedef enum {
AnnaBridge 171:3a7713b1edbc 42 I2C_0 = 0,
AnnaBridge 171:3a7713b1edbc 43 I2C_1 = 1,
AnnaBridge 171:3a7713b1edbc 44 I2C_2 = 2,
AnnaBridge 171:3a7713b1edbc 45 } I2CName;
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 #define TPM_SHIFT 8
AnnaBridge 171:3a7713b1edbc 48 typedef enum {
AnnaBridge 171:3a7713b1edbc 49 PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
AnnaBridge 171:3a7713b1edbc 50 PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
AnnaBridge 171:3a7713b1edbc 51 PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
AnnaBridge 171:3a7713b1edbc 52 PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
AnnaBridge 171:3a7713b1edbc 53 PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
AnnaBridge 171:3a7713b1edbc 54 PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
AnnaBridge 171:3a7713b1edbc 55 PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
AnnaBridge 171:3a7713b1edbc 56 PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
AnnaBridge 171:3a7713b1edbc 57 PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
AnnaBridge 171:3a7713b1edbc 58 PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
AnnaBridge 171:3a7713b1edbc 59 PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
AnnaBridge 171:3a7713b1edbc 60 PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
AnnaBridge 171:3a7713b1edbc 61 PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
AnnaBridge 171:3a7713b1edbc 62 PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
AnnaBridge 171:3a7713b1edbc 63 PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
AnnaBridge 171:3a7713b1edbc 64 PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
AnnaBridge 171:3a7713b1edbc 65 PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
AnnaBridge 171:3a7713b1edbc 66 PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
AnnaBridge 171:3a7713b1edbc 67 PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
AnnaBridge 171:3a7713b1edbc 68 PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
AnnaBridge 171:3a7713b1edbc 69 PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
AnnaBridge 171:3a7713b1edbc 70 PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
AnnaBridge 171:3a7713b1edbc 71 PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
AnnaBridge 171:3a7713b1edbc 72 PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
AnnaBridge 171:3a7713b1edbc 73 PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
AnnaBridge 171:3a7713b1edbc 74 PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
AnnaBridge 171:3a7713b1edbc 75 PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
AnnaBridge 171:3a7713b1edbc 76 PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
AnnaBridge 171:3a7713b1edbc 77 PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
AnnaBridge 171:3a7713b1edbc 78 PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
AnnaBridge 171:3a7713b1edbc 79 PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
AnnaBridge 171:3a7713b1edbc 80 PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
AnnaBridge 171:3a7713b1edbc 81 } PWMName;
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 #define ADC_INSTANCE_SHIFT 8
AnnaBridge 171:3a7713b1edbc 84 #define ADC_B_CHANNEL_SHIFT 5
AnnaBridge 171:3a7713b1edbc 85 typedef enum {
AnnaBridge 171:3a7713b1edbc 86 ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
AnnaBridge 171:3a7713b1edbc 87 ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
AnnaBridge 171:3a7713b1edbc 88 ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
AnnaBridge 171:3a7713b1edbc 89 ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
AnnaBridge 171:3a7713b1edbc 90 ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
AnnaBridge 171:3a7713b1edbc 91 ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
AnnaBridge 171:3a7713b1edbc 92 ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
AnnaBridge 171:3a7713b1edbc 93 ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
AnnaBridge 171:3a7713b1edbc 94 ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
AnnaBridge 171:3a7713b1edbc 95 ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
AnnaBridge 171:3a7713b1edbc 96 ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
AnnaBridge 171:3a7713b1edbc 97 ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
AnnaBridge 171:3a7713b1edbc 98 ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
AnnaBridge 171:3a7713b1edbc 99 ADC0_SE21 = (0 << ADC_INSTANCE_SHIFT) | 21,
AnnaBridge 171:3a7713b1edbc 100 ADC0_SE22 = (0 << ADC_INSTANCE_SHIFT) | 22,
AnnaBridge 171:3a7713b1edbc 101 ADC0_SE23 = (0 << ADC_INSTANCE_SHIFT) | 23,
AnnaBridge 171:3a7713b1edbc 102 ADC1_SE4a = (1 << ADC_INSTANCE_SHIFT) | 4,
AnnaBridge 171:3a7713b1edbc 103 ADC1_SE5a = (1 << ADC_INSTANCE_SHIFT) | 5,
AnnaBridge 171:3a7713b1edbc 104 ADC1_SE6a = (1 << ADC_INSTANCE_SHIFT) | 6,
AnnaBridge 171:3a7713b1edbc 105 ADC1_SE7a = (1 << ADC_INSTANCE_SHIFT) | 7,
AnnaBridge 171:3a7713b1edbc 106 ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
AnnaBridge 171:3a7713b1edbc 107 ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
AnnaBridge 171:3a7713b1edbc 108 ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
AnnaBridge 171:3a7713b1edbc 109 ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
AnnaBridge 171:3a7713b1edbc 110 ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
AnnaBridge 171:3a7713b1edbc 111 ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
AnnaBridge 171:3a7713b1edbc 112 ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
AnnaBridge 171:3a7713b1edbc 113 ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
AnnaBridge 171:3a7713b1edbc 114 ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
AnnaBridge 171:3a7713b1edbc 115 ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
AnnaBridge 171:3a7713b1edbc 116 ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
AnnaBridge 171:3a7713b1edbc 117 ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
AnnaBridge 171:3a7713b1edbc 118 ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
AnnaBridge 171:3a7713b1edbc 119 ADC1_SE23 = (1 << ADC_INSTANCE_SHIFT) | 23,
AnnaBridge 171:3a7713b1edbc 120 } ADCName;
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122 typedef enum {
AnnaBridge 171:3a7713b1edbc 123 DAC_0 = 0
AnnaBridge 171:3a7713b1edbc 124 } DACName;
AnnaBridge 171:3a7713b1edbc 125
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 typedef enum {
AnnaBridge 171:3a7713b1edbc 128 SPI_0 = 0,
AnnaBridge 171:3a7713b1edbc 129 SPI_1 = 1,
AnnaBridge 171:3a7713b1edbc 130 SPI_2 = 2,
AnnaBridge 171:3a7713b1edbc 131 } SPIName;
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 134 }
AnnaBridge 171:3a7713b1edbc 135 #endif
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 #endif