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mbed 2

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Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

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AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file sc.h
AnnaBridge 171:3a7713b1edbc 3 * @version V3.00
AnnaBridge 171:3a7713b1edbc 4 * $Revision: 7 $
AnnaBridge 171:3a7713b1edbc 5 * $Date: 15/08/11 10:26a $
AnnaBridge 171:3a7713b1edbc 6 * @brief M451 series Smartcard UART mode (SCUART) driver header file
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * @note
AnnaBridge 171:3a7713b1edbc 9 * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 171:3a7713b1edbc 10 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 11 #ifndef __SCUART_H__
AnnaBridge 171:3a7713b1edbc 12 #define __SCUART_H__
AnnaBridge 171:3a7713b1edbc 13
AnnaBridge 171:3a7713b1edbc 14 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 15 extern "C"
AnnaBridge 171:3a7713b1edbc 16 {
AnnaBridge 171:3a7713b1edbc 17 #endif
AnnaBridge 171:3a7713b1edbc 18
AnnaBridge 171:3a7713b1edbc 19
AnnaBridge 171:3a7713b1edbc 20 /** @addtogroup Standard_Driver Standard Driver
AnnaBridge 171:3a7713b1edbc 21 @{
AnnaBridge 171:3a7713b1edbc 22 */
AnnaBridge 171:3a7713b1edbc 23
AnnaBridge 171:3a7713b1edbc 24 /** @addtogroup SCUART_Driver SCUART Driver
AnnaBridge 171:3a7713b1edbc 25 @{
AnnaBridge 171:3a7713b1edbc 26 */
AnnaBridge 171:3a7713b1edbc 27
AnnaBridge 171:3a7713b1edbc 28 /** @addtogroup SCUART_EXPORTED_CONSTANTS SCUART Exported Constants
AnnaBridge 171:3a7713b1edbc 29 @{
AnnaBridge 171:3a7713b1edbc 30 */
AnnaBridge 171:3a7713b1edbc 31 #define SCUART_CHAR_LEN_5 (0x3ul << SC_UARTCTL_WLS_Pos) /*!< Set SCUART word length to 5 bits */
AnnaBridge 171:3a7713b1edbc 32 #define SCUART_CHAR_LEN_6 (0x2ul << SC_UARTCTL_WLS_Pos) /*!< Set SCUART word length to 6 bits */
AnnaBridge 171:3a7713b1edbc 33 #define SCUART_CHAR_LEN_7 (0x1ul << SC_UARTCTL_WLS_Pos) /*!< Set SCUART word length to 7 bits */
AnnaBridge 171:3a7713b1edbc 34 #define SCUART_CHAR_LEN_8 (0) /*!< Set SCUART word length to 8 bits */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 #define SCUART_PARITY_NONE (SC_UARTCTL_PBOFF_Msk) /*!< Set SCUART transfer with no parity */
AnnaBridge 171:3a7713b1edbc 37 #define SCUART_PARITY_ODD (SC_UARTCTL_OPE_Msk) /*!< Set SCUART transfer with odd parity */
AnnaBridge 171:3a7713b1edbc 38 #define SCUART_PARITY_EVEN (0) /*!< Set SCUART transfer with even parity */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #define SCUART_STOP_BIT_1 (SC_CTL_NSB_Msk) /*!< Set SCUART transfer with one stop bit */
AnnaBridge 171:3a7713b1edbc 41 #define SCUART_STOP_BIT_2 (0) /*!< Set SCUART transfer with two stop bits */
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /*@}*/ /* end of group SCUART_EXPORTED_CONSTANTS */
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup SCUART_EXPORTED_FUNCTIONS SCUART Exported Functions
AnnaBridge 171:3a7713b1edbc 48 @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /* TX Macros */
AnnaBridge 171:3a7713b1edbc 52 /**
AnnaBridge 171:3a7713b1edbc 53 * @brief Write Data to Tx data register.
AnnaBridge 171:3a7713b1edbc 54 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 55 * @param[in] u8Data Data byte to transmit.
AnnaBridge 171:3a7713b1edbc 56 * @return None
AnnaBridge 171:3a7713b1edbc 57 * @details By writing data to DAT register, the SC will send out an 8-bit data.
AnnaBridge 171:3a7713b1edbc 58 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 59 */
AnnaBridge 171:3a7713b1edbc 60 #define SCUART_WRITE(sc, u8Data) ((sc)-> DAT = (u8Data))
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /**
AnnaBridge 171:3a7713b1edbc 63 * @brief Get TX FIFO empty flag status from register.
AnnaBridge 171:3a7713b1edbc 64 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 65 * @return Transmit FIFO empty status.
AnnaBridge 171:3a7713b1edbc 66 * @retval 0 Transmit FIFO is not empty.
AnnaBridge 171:3a7713b1edbc 67 * @retval SC_STATUS_TXEMPTY_Msk Transmit FIFO is empty.
AnnaBridge 171:3a7713b1edbc 68 * @details When the last byte of TX buffer has been transferred to Transmitter Shift Register, hardware sets TXEMPTY bit (SC_STATUS[9]) high.
AnnaBridge 171:3a7713b1edbc 69 * It will be cleared when writing data into DAT (SC_DAT[7:0]).
AnnaBridge 171:3a7713b1edbc 70 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 71 */
AnnaBridge 171:3a7713b1edbc 72 #define SCUART_GET_TX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_TXEMPTY_Msk)
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 /**
AnnaBridge 171:3a7713b1edbc 75 * @brief Get TX FIFO full flag status from register.
AnnaBridge 171:3a7713b1edbc 76 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 77 * @retval 0 Transmit FIFO is not full.
AnnaBridge 171:3a7713b1edbc 78 * @retval SC_STATUS_TXFULL_Msk Transmit FIFO is full.
AnnaBridge 171:3a7713b1edbc 79 * @details TXFULL(SC_STATUS[10]) is set when TX pointer is equal to 4, otherwise is cleared by hardware.
AnnaBridge 171:3a7713b1edbc 80 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 81 */
AnnaBridge 171:3a7713b1edbc 82 #define SCUART_GET_TX_FULL(sc) ((sc)->STATUS & SC_STATUS_TXFULL_Msk)
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 /**
AnnaBridge 171:3a7713b1edbc 85 * @brief Wait specified smartcard port transmission complete.
AnnaBridge 171:3a7713b1edbc 86 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 87 * @return None
AnnaBridge 171:3a7713b1edbc 88 * @details TXACT (SC_STATUS[31]) is cleared automatically when TX transfer is finished or the last byte transmission has completed.
AnnaBridge 171:3a7713b1edbc 89 * @note This macro blocks until transmit complete.
AnnaBridge 171:3a7713b1edbc 90 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 91 */
AnnaBridge 171:3a7713b1edbc 92 #define SCUART_WAIT_TX_EMPTY(sc) while((sc)->STATUS & SC_STATUS_TXACT_Msk)
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 /**
AnnaBridge 171:3a7713b1edbc 95 * @brief Check specified smartcard port transmit FIFO is full or not.
AnnaBridge 171:3a7713b1edbc 96 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 97 * @retval 0 Transmit FIFO is not full.
AnnaBridge 171:3a7713b1edbc 98 * @retval 1 Transmit FIFO is full.
AnnaBridge 171:3a7713b1edbc 99 * @details TXFULL(SC_STATUS[10]) indicates TX buffer full or not.
AnnaBridge 171:3a7713b1edbc 100 * This is set when TX pointer is equal to 4, otherwise is cleared by hardware.
AnnaBridge 171:3a7713b1edbc 101 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 102 */
AnnaBridge 171:3a7713b1edbc 103 #define SCUART_IS_TX_FULL(sc) ((sc)->STATUS & SC_STATUS_TXFULL_Msk ? 1 : 0)
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 /**
AnnaBridge 171:3a7713b1edbc 106 * @brief Check specified smartcard port transmission is over.
AnnaBridge 171:3a7713b1edbc 107 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 108 * @retval 0 Transmit is not complete.
AnnaBridge 171:3a7713b1edbc 109 * @retval 1 Transmit complete.
AnnaBridge 171:3a7713b1edbc 110 * @details TXACT (SC_STATUS[31]) is set by hardware when TX transfer is in active and the STOP bit of the last byte has been transmitted.
AnnaBridge 171:3a7713b1edbc 111 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 112 */
AnnaBridge 171:3a7713b1edbc 113 #define SCUART_IS_TX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_TXACT_Msk ? 0 : 1)
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 /* RX Macros */
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 /**
AnnaBridge 171:3a7713b1edbc 119 * @brief Read Rx data register.
AnnaBridge 171:3a7713b1edbc 120 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 121 * @return The oldest data byte in RX FIFO.
AnnaBridge 171:3a7713b1edbc 122 * @details By reading DAT register, the SC will return an 8-bit received data.
AnnaBridge 171:3a7713b1edbc 123 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 124 */
AnnaBridge 171:3a7713b1edbc 125 #define SCUART_READ(sc) ((sc)->DAT)
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /**
AnnaBridge 171:3a7713b1edbc 128 * @brief Get RX FIFO empty flag status from register.
AnnaBridge 171:3a7713b1edbc 129 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 130 * @retval 0 Receive FIFO is not empty.
AnnaBridge 171:3a7713b1edbc 131 * @retval SC_STATUS_RXEMPTY_Msk Receive FIFO is empty.
AnnaBridge 171:3a7713b1edbc 132 * @details When the last byte of Rx buffer has been read by CPU, hardware sets RXEMPTY(SC_STATUS[1]) high.
AnnaBridge 171:3a7713b1edbc 133 * It will be cleared when SC receives any new data.
AnnaBridge 171:3a7713b1edbc 134 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 135 */
AnnaBridge 171:3a7713b1edbc 136 #define SCUART_GET_RX_EMPTY(sc) ((sc)->STATUS & SC_STATUS_RXEMPTY_Msk)
AnnaBridge 171:3a7713b1edbc 137
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 /**
AnnaBridge 171:3a7713b1edbc 140 * @brief Get RX FIFO full flag status from register.
AnnaBridge 171:3a7713b1edbc 141 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 142 * @retval 0 Receive FIFO is not full.
AnnaBridge 171:3a7713b1edbc 143 * @retval SC_STATUS_TXFULL_Msk Receive FIFO is full.
AnnaBridge 171:3a7713b1edbc 144 * @details RXFULLF(SC_STATUS[2]) is set when RX pointer is equal to 4, otherwise it is cleared by hardware.
AnnaBridge 171:3a7713b1edbc 145 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 146 */
AnnaBridge 171:3a7713b1edbc 147 #define SCUART_GET_RX_FULL(sc) ((sc)->STATUS & SC_STATUS_RXFULL_Msk)
AnnaBridge 171:3a7713b1edbc 148
AnnaBridge 171:3a7713b1edbc 149 /**
AnnaBridge 171:3a7713b1edbc 150 * @brief Check if receive data number in FIFO reach FIFO trigger level or not.
AnnaBridge 171:3a7713b1edbc 151 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 152 * @retval 0 The number of bytes in receive FIFO is less than trigger level.
AnnaBridge 171:3a7713b1edbc 153 * @retval 1 The number of bytes in receive FIFO equals or larger than trigger level.
AnnaBridge 171:3a7713b1edbc 154 * @details RDAIF(SC_INTSTS[0]) is used for received data reaching trigger level RXTRGLV (SC_CTL[7:6]) interrupt status flag.
AnnaBridge 171:3a7713b1edbc 155 * @note If receive trigger level is \b not 1 byte, this macro return 0 does not necessary indicates there is no data in FIFO.
AnnaBridge 171:3a7713b1edbc 156 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 157 */
AnnaBridge 171:3a7713b1edbc 158 #define SCUART_IS_RX_READY(sc) ((sc)->INTSTS & SC_INTSTS_RDAIF_Msk ? 1 : 0)
AnnaBridge 171:3a7713b1edbc 159
AnnaBridge 171:3a7713b1edbc 160 /**
AnnaBridge 171:3a7713b1edbc 161 * @brief Check specified smartcard port receive FIFO is full or not.
AnnaBridge 171:3a7713b1edbc 162 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 163 * @retval 0 Receive FIFO is not full.
AnnaBridge 171:3a7713b1edbc 164 * @retval 1 Receive FIFO is full.
AnnaBridge 171:3a7713b1edbc 165 * @details RXFULLF(SC_STATUS[2]) is set when RX pointer is equal to 4, otherwise it is cleared by hardware.
AnnaBridge 171:3a7713b1edbc 166 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 167 */
AnnaBridge 171:3a7713b1edbc 168 #define SCUART_IS_RX_FULL(sc) ((sc)->STATUS & SC_STATUS_RXFULL_Msk ? 1 : 0)
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170 /* Interrupt Macros */
AnnaBridge 171:3a7713b1edbc 171
AnnaBridge 171:3a7713b1edbc 172 /**
AnnaBridge 171:3a7713b1edbc 173 * @brief Enable specified interrupts.
AnnaBridge 171:3a7713b1edbc 174 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 175 * @param[in] u32Mask Interrupt masks to enable, a combination of following bits.
AnnaBridge 171:3a7713b1edbc 176 * - \ref SC_INTEN_RXTOIF_Msk
AnnaBridge 171:3a7713b1edbc 177 * - \ref SC_INTEN_TERRIEN_Msk
AnnaBridge 171:3a7713b1edbc 178 * - \ref SC_INTEN_TBEIEN_Msk
AnnaBridge 171:3a7713b1edbc 179 * - \ref SC_INTEN_RDAIEN_Msk
AnnaBridge 171:3a7713b1edbc 180 * @return None
AnnaBridge 171:3a7713b1edbc 181 * @details The macro is used to enable receiver buffer time-out interrupt, transfer error interrupt,
AnnaBridge 171:3a7713b1edbc 182 * transmit buffer empty interrupt or receive data reach trigger level interrupt.
AnnaBridge 171:3a7713b1edbc 183 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 184 */
AnnaBridge 171:3a7713b1edbc 185 #define SCUART_ENABLE_INT(sc, u32Mask) ((sc)->INTEN |= (u32Mask))
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 /**
AnnaBridge 171:3a7713b1edbc 188 * @brief Disable specified interrupts.
AnnaBridge 171:3a7713b1edbc 189 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 190 * @param[in] u32Mask Interrupt masks to disable, a combination of following bits.
AnnaBridge 171:3a7713b1edbc 191 * - \ref SC_INTEN_RXTOIF_Msk
AnnaBridge 171:3a7713b1edbc 192 * - \ref SC_INTEN_TERRIEN_Msk
AnnaBridge 171:3a7713b1edbc 193 * - \ref SC_INTEN_TBEIEN_Msk
AnnaBridge 171:3a7713b1edbc 194 * - \ref SC_INTEN_RDAIEN_Msk
AnnaBridge 171:3a7713b1edbc 195 * @return None
AnnaBridge 171:3a7713b1edbc 196 * @details The macro is used to disable receiver buffer time-out interrupt, transfer error interrupt,
AnnaBridge 171:3a7713b1edbc 197 * transmit buffer empty interrupt or receive data reach trigger level interrupt.
AnnaBridge 171:3a7713b1edbc 198 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 199 */
AnnaBridge 171:3a7713b1edbc 200 #define SCUART_DISABLE_INT(sc, u32Mask) ((sc)->INTEN &= ~(u32Mask))
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 /**
AnnaBridge 171:3a7713b1edbc 203 * @brief Get specified interrupt flag/status.
AnnaBridge 171:3a7713b1edbc 204 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 205 * @param[in] u32Type Interrupt flag/status to check, could be one of following value:
AnnaBridge 171:3a7713b1edbc 206 * - \ref SC_INTSTS_RBTOIF_Msk
AnnaBridge 171:3a7713b1edbc 207 * - \ref SC_INTSTS_TERRIF_Msk
AnnaBridge 171:3a7713b1edbc 208 * - \ref SC_INTSTS_TBEIF_Msk
AnnaBridge 171:3a7713b1edbc 209 * - \ref SC_INTSTS_RDAIF_Msk
AnnaBridge 171:3a7713b1edbc 210 * @return The status of specified interrupt.
AnnaBridge 171:3a7713b1edbc 211 * @retval 0 Specified interrupt does not happened.
AnnaBridge 171:3a7713b1edbc 212 * @retval 1 Specified interrupt happened.
AnnaBridge 171:3a7713b1edbc 213 * @details The macro is used to get receiver buffer time-out interrupt status, transfer error interrupt status,
AnnaBridge 171:3a7713b1edbc 214 * transmit buffer empty interrupt status or receive data reach interrupt status.
AnnaBridge 171:3a7713b1edbc 215 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 216 */
AnnaBridge 171:3a7713b1edbc 217 #define SCUART_GET_INT_FLAG(sc, u32Type) ((sc)->INTSTS & (u32Type) ? 1 : 0)
AnnaBridge 171:3a7713b1edbc 218
AnnaBridge 171:3a7713b1edbc 219 /**
AnnaBridge 171:3a7713b1edbc 220 * @brief Clear specified interrupt flag/status.
AnnaBridge 171:3a7713b1edbc 221 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 222 * @param[in] u32Type Interrupt flag/status to clear, could be the combination of following values:
AnnaBridge 171:3a7713b1edbc 223 * - \ref SC_INTSTS_RBTOIF_Msk
AnnaBridge 171:3a7713b1edbc 224 * - \ref SC_INTSTS_TERRIF_Msk
AnnaBridge 171:3a7713b1edbc 225 * - \ref SC_INTSTS_TBEIF_Msk
AnnaBridge 171:3a7713b1edbc 226 * @return None
AnnaBridge 171:3a7713b1edbc 227 * @details The macro is used to clear receiver buffer time-out interrupt flag, transfer error interrupt flag or
AnnaBridge 171:3a7713b1edbc 228 * transmit buffer empty interrupt flag.
AnnaBridge 171:3a7713b1edbc 229 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 230 */
AnnaBridge 171:3a7713b1edbc 231 #define SCUART_CLR_INT_FLAG(sc, u32Type) ((sc)->INTSTS = (u32Type))
AnnaBridge 171:3a7713b1edbc 232
AnnaBridge 171:3a7713b1edbc 233 /**
AnnaBridge 171:3a7713b1edbc 234 * @brief Get receive error flag/status.
AnnaBridge 171:3a7713b1edbc 235 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 236 * @return Current receive error status, could one of following errors:
AnnaBridge 171:3a7713b1edbc 237 * @retval SC_STATUS_PEF_Msk Parity error.
AnnaBridge 171:3a7713b1edbc 238 * @retval SC_STATUS_FEF_Msk Frame error.
AnnaBridge 171:3a7713b1edbc 239 * @retval SC_STATUS_BEF_Msk Break error.
AnnaBridge 171:3a7713b1edbc 240 * @details The macro is used to get receiver parity error status, receiver frame error status or
AnnaBridge 171:3a7713b1edbc 241 * receiver break error status.
AnnaBridge 171:3a7713b1edbc 242 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 243 */
AnnaBridge 171:3a7713b1edbc 244 #define SCUART_GET_ERR_FLAG(sc) ((sc)->STATUS & (SC_STATUS_PEF_Msk | SC_STATUS_FEF_Msk | SC_STATUS_BEF_Msk))
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 /**
AnnaBridge 171:3a7713b1edbc 247 * @brief Clear specified receive error flag/status.
AnnaBridge 171:3a7713b1edbc 248 * @param[in] sc The pointer of smartcard module.
AnnaBridge 171:3a7713b1edbc 249 * @param[in] u32Mask Receive error flag/status to clear, combination following values:
AnnaBridge 171:3a7713b1edbc 250 * - \ref SC_STATUS_PEF_Msk
AnnaBridge 171:3a7713b1edbc 251 * - \ref SC_STATUS_FEF_Msk
AnnaBridge 171:3a7713b1edbc 252 * - \ref SC_STATUS_BEF_Msk
AnnaBridge 171:3a7713b1edbc 253 * @return None
AnnaBridge 171:3a7713b1edbc 254 * @details The macro is used to clear receiver parity error flag, receiver frame error flag or
AnnaBridge 171:3a7713b1edbc 255 * receiver break error flag.
AnnaBridge 171:3a7713b1edbc 256 * \hideinitializer
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 #define SCUART_CLR_ERR_FLAG(sc, u32Mask) ((sc)->STATUS = (u32Mask))
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 void SCUART_Close(SC_T* sc);
AnnaBridge 171:3a7713b1edbc 261 uint32_t SCUART_Open(SC_T* sc, uint32_t u32baudrate);
AnnaBridge 171:3a7713b1edbc 262 uint32_t SCUART_Read(SC_T* sc, uint8_t *pu8RxBuf, uint32_t u32ReadBytes);
AnnaBridge 171:3a7713b1edbc 263 uint32_t SCUART_SetLineConfig(SC_T* sc, uint32_t u32Baudrate, uint32_t u32DataWidth, uint32_t u32Parity, uint32_t u32StopBits);
AnnaBridge 171:3a7713b1edbc 264 void SCUART_SetTimeoutCnt(SC_T* sc, uint32_t u32TOC);
AnnaBridge 171:3a7713b1edbc 265 void SCUART_Write(SC_T* sc, uint8_t *pu8TxBuf, uint32_t u32WriteBytes);
AnnaBridge 171:3a7713b1edbc 266
AnnaBridge 171:3a7713b1edbc 267 /*@}*/ /* end of group SCUART_EXPORTED_FUNCTIONS */
AnnaBridge 171:3a7713b1edbc 268
AnnaBridge 171:3a7713b1edbc 269 /*@}*/ /* end of group SCUART_Driver */
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 /*@}*/ /* end of group Standard_Driver */
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 274 }
AnnaBridge 171:3a7713b1edbc 275 #endif
AnnaBridge 171:3a7713b1edbc 276
AnnaBridge 171:3a7713b1edbc 277 #endif //__SCUART_H__
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 /*** (C) COPYRIGHT 2013~2015 Nuvoton Technology Corp. ***/