mbed official
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUCLEO_L496ZG_P/TOOLCHAIN_IAR/stm32l4xx_ll_pwr.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_DISCO_L496AG/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_ll_pwr.h@165:d1b4690b3f8b
mbed library. Release version 164
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 165:d1b4690b3f8b | 1 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 2 | ****************************************************************************** |
| AnnaBridge | 165:d1b4690b3f8b | 3 | * @file stm32l4xx_ll_pwr.h |
| AnnaBridge | 165:d1b4690b3f8b | 4 | * @author MCD Application Team |
| AnnaBridge | 165:d1b4690b3f8b | 5 | * @brief Header file of PWR LL module. |
| AnnaBridge | 165:d1b4690b3f8b | 6 | ****************************************************************************** |
| AnnaBridge | 165:d1b4690b3f8b | 7 | * @attention |
| AnnaBridge | 165:d1b4690b3f8b | 8 | * |
| AnnaBridge | 165:d1b4690b3f8b | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 165:d1b4690b3f8b | 10 | * |
| AnnaBridge | 165:d1b4690b3f8b | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 165:d1b4690b3f8b | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 165:d1b4690b3f8b | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 165:d1b4690b3f8b | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 165:d1b4690b3f8b | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 165:d1b4690b3f8b | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 165:d1b4690b3f8b | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 165:d1b4690b3f8b | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 165:d1b4690b3f8b | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 165:d1b4690b3f8b | 20 | * without specific prior written permission. |
| AnnaBridge | 165:d1b4690b3f8b | 21 | * |
| AnnaBridge | 165:d1b4690b3f8b | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 165:d1b4690b3f8b | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 165:d1b4690b3f8b | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 165:d1b4690b3f8b | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 165:d1b4690b3f8b | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 165:d1b4690b3f8b | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 165:d1b4690b3f8b | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 165:d1b4690b3f8b | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 165:d1b4690b3f8b | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 165:d1b4690b3f8b | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 165:d1b4690b3f8b | 32 | * |
| AnnaBridge | 165:d1b4690b3f8b | 33 | ****************************************************************************** |
| AnnaBridge | 165:d1b4690b3f8b | 34 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 35 | |
| AnnaBridge | 165:d1b4690b3f8b | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 37 | #ifndef __STM32L4xx_LL_PWR_H |
| AnnaBridge | 165:d1b4690b3f8b | 38 | #define __STM32L4xx_LL_PWR_H |
| AnnaBridge | 165:d1b4690b3f8b | 39 | |
| AnnaBridge | 165:d1b4690b3f8b | 40 | #ifdef __cplusplus |
| AnnaBridge | 165:d1b4690b3f8b | 41 | extern "C" { |
| AnnaBridge | 165:d1b4690b3f8b | 42 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 43 | |
| AnnaBridge | 165:d1b4690b3f8b | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 45 | #include "stm32l4xx.h" |
| AnnaBridge | 165:d1b4690b3f8b | 46 | |
| AnnaBridge | 165:d1b4690b3f8b | 47 | /** @addtogroup STM32L4xx_LL_Driver |
| AnnaBridge | 165:d1b4690b3f8b | 48 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 49 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 50 | |
| AnnaBridge | 165:d1b4690b3f8b | 51 | #if defined(PWR) |
| AnnaBridge | 165:d1b4690b3f8b | 52 | |
| AnnaBridge | 165:d1b4690b3f8b | 53 | /** @defgroup PWR_LL PWR |
| AnnaBridge | 165:d1b4690b3f8b | 54 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 55 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 56 | |
| AnnaBridge | 165:d1b4690b3f8b | 57 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 58 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 59 | |
| AnnaBridge | 165:d1b4690b3f8b | 60 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 61 | |
| AnnaBridge | 165:d1b4690b3f8b | 62 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 63 | |
| AnnaBridge | 165:d1b4690b3f8b | 64 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 65 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 66 | /** @defgroup PWR_LL_Exported_Constants PWR Exported Constants |
| AnnaBridge | 165:d1b4690b3f8b | 67 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 68 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 69 | |
| AnnaBridge | 165:d1b4690b3f8b | 70 | /** @defgroup PWR_LL_EC_CLEAR_FLAG Clear Flags Defines |
| AnnaBridge | 165:d1b4690b3f8b | 71 | * @brief Flags defines which can be used with LL_PWR_WriteReg function |
| AnnaBridge | 165:d1b4690b3f8b | 72 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 73 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 74 | #define LL_PWR_SCR_CSBF PWR_SCR_CSBF |
| AnnaBridge | 165:d1b4690b3f8b | 75 | #define LL_PWR_SCR_CWUF PWR_SCR_CWUF |
| AnnaBridge | 165:d1b4690b3f8b | 76 | #define LL_PWR_SCR_CWUF5 PWR_SCR_CWUF5 |
| AnnaBridge | 165:d1b4690b3f8b | 77 | #define LL_PWR_SCR_CWUF4 PWR_SCR_CWUF4 |
| AnnaBridge | 165:d1b4690b3f8b | 78 | #define LL_PWR_SCR_CWUF3 PWR_SCR_CWUF3 |
| AnnaBridge | 165:d1b4690b3f8b | 79 | #define LL_PWR_SCR_CWUF2 PWR_SCR_CWUF2 |
| AnnaBridge | 165:d1b4690b3f8b | 80 | #define LL_PWR_SCR_CWUF1 PWR_SCR_CWUF1 |
| AnnaBridge | 165:d1b4690b3f8b | 81 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 82 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 83 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 84 | |
| AnnaBridge | 165:d1b4690b3f8b | 85 | /** @defgroup PWR_LL_EC_GET_FLAG Get Flags Defines |
| AnnaBridge | 165:d1b4690b3f8b | 86 | * @brief Flags defines which can be used with LL_PWR_ReadReg function |
| AnnaBridge | 165:d1b4690b3f8b | 87 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 88 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 89 | #define LL_PWR_SR1_WUFI PWR_SR1_WUFI |
| AnnaBridge | 165:d1b4690b3f8b | 90 | #define LL_PWR_SR1_SBF PWR_SR1_SBF |
| AnnaBridge | 165:d1b4690b3f8b | 91 | #define LL_PWR_SR1_WUF5 PWR_SR1_WUF5 |
| AnnaBridge | 165:d1b4690b3f8b | 92 | #define LL_PWR_SR1_WUF4 PWR_SR1_WUF4 |
| AnnaBridge | 165:d1b4690b3f8b | 93 | #define LL_PWR_SR1_WUF3 PWR_SR1_WUF3 |
| AnnaBridge | 165:d1b4690b3f8b | 94 | #define LL_PWR_SR1_WUF2 PWR_SR1_WUF2 |
| AnnaBridge | 165:d1b4690b3f8b | 95 | #define LL_PWR_SR1_WUF1 PWR_SR1_WUF1 |
| AnnaBridge | 165:d1b4690b3f8b | 96 | #if defined(PWR_SR2_PVMO4) |
| AnnaBridge | 165:d1b4690b3f8b | 97 | #define LL_PWR_SR2_PVMO4 PWR_SR2_PVMO4 |
| AnnaBridge | 165:d1b4690b3f8b | 98 | #endif /* PWR_SR2_PVMO4 */ |
| AnnaBridge | 165:d1b4690b3f8b | 99 | #if defined(PWR_SR2_PVMO3) |
| AnnaBridge | 165:d1b4690b3f8b | 100 | #define LL_PWR_SR2_PVMO3 PWR_SR2_PVMO3 |
| AnnaBridge | 165:d1b4690b3f8b | 101 | #endif /* PWR_SR2_PVMO3 */ |
| AnnaBridge | 165:d1b4690b3f8b | 102 | #if defined(PWR_SR2_PVMO2) |
| AnnaBridge | 165:d1b4690b3f8b | 103 | #define LL_PWR_SR2_PVMO2 PWR_SR2_PVMO2 |
| AnnaBridge | 165:d1b4690b3f8b | 104 | #endif /* PWR_SR2_PVMO2 */ |
| AnnaBridge | 165:d1b4690b3f8b | 105 | #if defined(PWR_SR2_PVMO1) |
| AnnaBridge | 165:d1b4690b3f8b | 106 | #define LL_PWR_SR2_PVMO1 PWR_SR2_PVMO1 |
| AnnaBridge | 165:d1b4690b3f8b | 107 | #endif /* PWR_SR2_PVMO1 */ |
| AnnaBridge | 165:d1b4690b3f8b | 108 | #define LL_PWR_SR2_PVDO PWR_SR2_PVDO |
| AnnaBridge | 165:d1b4690b3f8b | 109 | #define LL_PWR_SR2_VOSF PWR_SR2_VOSF |
| AnnaBridge | 165:d1b4690b3f8b | 110 | #define LL_PWR_SR2_REGLPF PWR_SR2_REGLPF |
| AnnaBridge | 165:d1b4690b3f8b | 111 | #define LL_PWR_SR2_REGLPS PWR_SR2_REGLPS |
| AnnaBridge | 165:d1b4690b3f8b | 112 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 113 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 114 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 115 | |
| AnnaBridge | 165:d1b4690b3f8b | 116 | /** @defgroup PWR_LL_EC_REGU_VOLTAGE REGU VOLTAGE |
| AnnaBridge | 165:d1b4690b3f8b | 117 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 118 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 119 | #define LL_PWR_REGU_VOLTAGE_SCALE1 (PWR_CR1_VOS_0) |
| AnnaBridge | 165:d1b4690b3f8b | 120 | #define LL_PWR_REGU_VOLTAGE_SCALE2 (PWR_CR1_VOS_1) |
| AnnaBridge | 165:d1b4690b3f8b | 121 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 122 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 123 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 124 | |
| AnnaBridge | 165:d1b4690b3f8b | 125 | /** @defgroup PWR_LL_EC_MODE_PWR MODE PWR |
| AnnaBridge | 165:d1b4690b3f8b | 126 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 127 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 128 | #define LL_PWR_MODE_STOP0 (PWR_CR1_LPMS_STOP0) |
| AnnaBridge | 165:d1b4690b3f8b | 129 | #define LL_PWR_MODE_STOP1 (PWR_CR1_LPMS_STOP1) |
| AnnaBridge | 165:d1b4690b3f8b | 130 | #define LL_PWR_MODE_STOP2 (PWR_CR1_LPMS_STOP2) |
| AnnaBridge | 165:d1b4690b3f8b | 131 | #define LL_PWR_MODE_STANDBY (PWR_CR1_LPMS_STANDBY) |
| AnnaBridge | 165:d1b4690b3f8b | 132 | #define LL_PWR_MODE_SHUTDOWN (PWR_CR1_LPMS_SHUTDOWN) |
| AnnaBridge | 165:d1b4690b3f8b | 133 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 134 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 135 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 136 | |
| AnnaBridge | 165:d1b4690b3f8b | 137 | /** @defgroup PWR_LL_EC_PVM_VDDUSB_1 Peripheral voltage monitoring |
| AnnaBridge | 165:d1b4690b3f8b | 138 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 139 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 140 | #if defined(PWR_CR2_PVME1) |
| AnnaBridge | 165:d1b4690b3f8b | 141 | #define LL_PWR_PVM_VDDUSB_1_2V (PWR_CR2_PVME1) /* Monitoring VDDUSB vs. 1.2V */ |
| AnnaBridge | 165:d1b4690b3f8b | 142 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 143 | #if defined(PWR_CR2_PVME2) |
| AnnaBridge | 165:d1b4690b3f8b | 144 | #define LL_PWR_PVM_VDDIO2_0_9V (PWR_CR2_PVME2) /* Monitoring VDDIO2 vs. 0.9V */ |
| AnnaBridge | 165:d1b4690b3f8b | 145 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 146 | #if defined(PWR_CR2_PVME3) |
| AnnaBridge | 165:d1b4690b3f8b | 147 | #define LL_PWR_PVM_VDDA_1_62V (PWR_CR2_PVME3) /* Monitoring VDDA vs. 1.62V */ |
| AnnaBridge | 165:d1b4690b3f8b | 148 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 149 | #if defined(PWR_CR2_PVME4) |
| AnnaBridge | 165:d1b4690b3f8b | 150 | #define LL_PWR_PVM_VDDA_2_2V (PWR_CR2_PVME4) /* Monitoring VDDA vs. 2.2V */ |
| AnnaBridge | 165:d1b4690b3f8b | 151 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 152 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 153 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 154 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 155 | |
| AnnaBridge | 165:d1b4690b3f8b | 156 | /** @defgroup PWR_LL_EC_PVDLEVEL PVDLEVEL |
| AnnaBridge | 165:d1b4690b3f8b | 157 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 158 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 159 | #define LL_PWR_PVDLEVEL_0 (PWR_CR2_PLS_LEV0) /* VPVD0 around 2.0 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 160 | #define LL_PWR_PVDLEVEL_1 (PWR_CR2_PLS_LEV1) /* VPVD1 around 2.2 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 161 | #define LL_PWR_PVDLEVEL_2 (PWR_CR2_PLS_LEV2) /* VPVD2 around 2.4 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 162 | #define LL_PWR_PVDLEVEL_3 (PWR_CR2_PLS_LEV3) /* VPVD3 around 2.5 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 163 | #define LL_PWR_PVDLEVEL_4 (PWR_CR2_PLS_LEV4) /* VPVD4 around 2.6 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 164 | #define LL_PWR_PVDLEVEL_5 (PWR_CR2_PLS_LEV5) /* VPVD5 around 2.8 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 165 | #define LL_PWR_PVDLEVEL_6 (PWR_CR2_PLS_LEV6) /* VPVD6 around 2.9 V */ |
| AnnaBridge | 165:d1b4690b3f8b | 166 | #define LL_PWR_PVDLEVEL_7 (PWR_CR2_PLS_LEV7) /* External input analog voltage (Compare internally to VREFINT) */ |
| AnnaBridge | 165:d1b4690b3f8b | 167 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 168 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 169 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 170 | |
| AnnaBridge | 165:d1b4690b3f8b | 171 | /** @defgroup PWR_LL_EC_WAKEUP WAKEUP |
| AnnaBridge | 165:d1b4690b3f8b | 172 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 173 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 174 | #define LL_PWR_WAKEUP_PIN1 (PWR_CR3_EWUP1) |
| AnnaBridge | 165:d1b4690b3f8b | 175 | #define LL_PWR_WAKEUP_PIN2 (PWR_CR3_EWUP2) |
| AnnaBridge | 165:d1b4690b3f8b | 176 | #define LL_PWR_WAKEUP_PIN3 (PWR_CR3_EWUP3) |
| AnnaBridge | 165:d1b4690b3f8b | 177 | #define LL_PWR_WAKEUP_PIN4 (PWR_CR3_EWUP4) |
| AnnaBridge | 165:d1b4690b3f8b | 178 | #define LL_PWR_WAKEUP_PIN5 (PWR_CR3_EWUP5) |
| AnnaBridge | 165:d1b4690b3f8b | 179 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 180 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 181 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 182 | |
| AnnaBridge | 165:d1b4690b3f8b | 183 | /** @defgroup PWR_LL_EC_BATT_CHARG_RESISTOR BATT CHARG RESISTOR |
| AnnaBridge | 165:d1b4690b3f8b | 184 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 185 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 186 | #define LL_PWR_BATT_CHARG_RESISTOR_5K (0x00000000U) |
| AnnaBridge | 165:d1b4690b3f8b | 187 | #define LL_PWR_BATT_CHARGRESISTOR_1_5K (PWR_CR4_VBRS) |
| AnnaBridge | 165:d1b4690b3f8b | 188 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 189 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 190 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 191 | |
| AnnaBridge | 165:d1b4690b3f8b | 192 | /** @defgroup PWR_LL_EC_GPIO GPIO |
| AnnaBridge | 165:d1b4690b3f8b | 193 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 194 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 195 | #define LL_PWR_GPIO_A ((uint32_t)(&(PWR->PUCRA))) |
| AnnaBridge | 165:d1b4690b3f8b | 196 | #define LL_PWR_GPIO_B ((uint32_t)(&(PWR->PUCRB))) |
| AnnaBridge | 165:d1b4690b3f8b | 197 | #define LL_PWR_GPIO_C ((uint32_t)(&(PWR->PUCRC))) |
| AnnaBridge | 165:d1b4690b3f8b | 198 | #define LL_PWR_GPIO_D ((uint32_t)(&(PWR->PUCRD))) |
| AnnaBridge | 165:d1b4690b3f8b | 199 | #define LL_PWR_GPIO_E ((uint32_t)(&(PWR->PUCRE))) |
| AnnaBridge | 165:d1b4690b3f8b | 200 | #if defined(GPIOF) |
| AnnaBridge | 165:d1b4690b3f8b | 201 | #define LL_PWR_GPIO_F ((uint32_t)(&(PWR->PUCRF))) |
| AnnaBridge | 165:d1b4690b3f8b | 202 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 203 | #if defined(GPIOG) |
| AnnaBridge | 165:d1b4690b3f8b | 204 | #define LL_PWR_GPIO_G ((uint32_t)(&(PWR->PUCRG))) |
| AnnaBridge | 165:d1b4690b3f8b | 205 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 206 | #if defined(GPIOH) |
| AnnaBridge | 165:d1b4690b3f8b | 207 | #define LL_PWR_GPIO_H ((uint32_t)(&(PWR->PUCRH))) |
| AnnaBridge | 165:d1b4690b3f8b | 208 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 209 | #if defined(GPIOI) |
| AnnaBridge | 165:d1b4690b3f8b | 210 | #define LL_PWR_GPIO_I ((uint32_t)(&(PWR->PUCRI))) |
| AnnaBridge | 165:d1b4690b3f8b | 211 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 212 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 213 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 214 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 215 | |
| AnnaBridge | 165:d1b4690b3f8b | 216 | /** @defgroup PWR_LL_EC_GPIO_BIT GPIO BIT |
| AnnaBridge | 165:d1b4690b3f8b | 217 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 218 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 219 | #define LL_PWR_GPIO_BIT_0 (0x00000001U) |
| AnnaBridge | 165:d1b4690b3f8b | 220 | #define LL_PWR_GPIO_BIT_1 (0x00000002U) |
| AnnaBridge | 165:d1b4690b3f8b | 221 | #define LL_PWR_GPIO_BIT_2 (0x00000004U) |
| AnnaBridge | 165:d1b4690b3f8b | 222 | #define LL_PWR_GPIO_BIT_3 (0x00000008U) |
| AnnaBridge | 165:d1b4690b3f8b | 223 | #define LL_PWR_GPIO_BIT_4 (0x00000010U) |
| AnnaBridge | 165:d1b4690b3f8b | 224 | #define LL_PWR_GPIO_BIT_5 (0x00000020U) |
| AnnaBridge | 165:d1b4690b3f8b | 225 | #define LL_PWR_GPIO_BIT_6 (0x00000040U) |
| AnnaBridge | 165:d1b4690b3f8b | 226 | #define LL_PWR_GPIO_BIT_7 (0x00000080U) |
| AnnaBridge | 165:d1b4690b3f8b | 227 | #define LL_PWR_GPIO_BIT_8 (0x00000100U) |
| AnnaBridge | 165:d1b4690b3f8b | 228 | #define LL_PWR_GPIO_BIT_9 (0x00000200U) |
| AnnaBridge | 165:d1b4690b3f8b | 229 | #define LL_PWR_GPIO_BIT_10 (0x00000400U) |
| AnnaBridge | 165:d1b4690b3f8b | 230 | #define LL_PWR_GPIO_BIT_11 (0x00000800U) |
| AnnaBridge | 165:d1b4690b3f8b | 231 | #define LL_PWR_GPIO_BIT_12 (0x00001000U) |
| AnnaBridge | 165:d1b4690b3f8b | 232 | #define LL_PWR_GPIO_BIT_13 (0x00002000U) |
| AnnaBridge | 165:d1b4690b3f8b | 233 | #define LL_PWR_GPIO_BIT_14 (0x00004000U) |
| AnnaBridge | 165:d1b4690b3f8b | 234 | #define LL_PWR_GPIO_BIT_15 (0x00008000U) |
| AnnaBridge | 165:d1b4690b3f8b | 235 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 236 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 237 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 238 | |
| AnnaBridge | 165:d1b4690b3f8b | 239 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 240 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 241 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 242 | |
| AnnaBridge | 165:d1b4690b3f8b | 243 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 244 | /** @defgroup PWR_LL_Exported_Macros PWR Exported Macros |
| AnnaBridge | 165:d1b4690b3f8b | 245 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 246 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 247 | |
| AnnaBridge | 165:d1b4690b3f8b | 248 | /** @defgroup PWR_LL_EM_WRITE_READ Common Write and read registers Macros |
| AnnaBridge | 165:d1b4690b3f8b | 249 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 250 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 251 | |
| AnnaBridge | 165:d1b4690b3f8b | 252 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 253 | * @brief Write a value in PWR register |
| AnnaBridge | 165:d1b4690b3f8b | 254 | * @param __REG__ Register to be written |
| AnnaBridge | 165:d1b4690b3f8b | 255 | * @param __VALUE__ Value to be written in the register |
| AnnaBridge | 165:d1b4690b3f8b | 256 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 257 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 258 | #define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR->__REG__, (__VALUE__)) |
| AnnaBridge | 165:d1b4690b3f8b | 259 | |
| AnnaBridge | 165:d1b4690b3f8b | 260 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 261 | * @brief Read a value in PWR register |
| AnnaBridge | 165:d1b4690b3f8b | 262 | * @param __REG__ Register to be read |
| AnnaBridge | 165:d1b4690b3f8b | 263 | * @retval Register value |
| AnnaBridge | 165:d1b4690b3f8b | 264 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 265 | #define LL_PWR_ReadReg(__REG__) READ_REG(PWR->__REG__) |
| AnnaBridge | 165:d1b4690b3f8b | 266 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 267 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 268 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 269 | |
| AnnaBridge | 165:d1b4690b3f8b | 270 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 271 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 272 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 273 | |
| AnnaBridge | 165:d1b4690b3f8b | 274 | |
| AnnaBridge | 165:d1b4690b3f8b | 275 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 165:d1b4690b3f8b | 276 | /** @defgroup PWR_LL_Exported_Functions PWR Exported Functions |
| AnnaBridge | 165:d1b4690b3f8b | 277 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 278 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 279 | |
| AnnaBridge | 165:d1b4690b3f8b | 280 | /** @defgroup PWR_LL_EF_Configuration Configuration |
| AnnaBridge | 165:d1b4690b3f8b | 281 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 282 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 283 | |
| AnnaBridge | 165:d1b4690b3f8b | 284 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 285 | * @brief Switch the regulator from main mode to low-power mode |
| AnnaBridge | 165:d1b4690b3f8b | 286 | * @rmtoll CR1 LPR LL_PWR_EnableLowPowerRunMode |
| AnnaBridge | 165:d1b4690b3f8b | 287 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 288 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 289 | __STATIC_INLINE void LL_PWR_EnableLowPowerRunMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 290 | { |
| AnnaBridge | 165:d1b4690b3f8b | 291 | SET_BIT(PWR->CR1, PWR_CR1_LPR); |
| AnnaBridge | 165:d1b4690b3f8b | 292 | } |
| AnnaBridge | 165:d1b4690b3f8b | 293 | |
| AnnaBridge | 165:d1b4690b3f8b | 294 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 295 | * @brief Switch the regulator from low-power mode to main mode |
| AnnaBridge | 165:d1b4690b3f8b | 296 | * @rmtoll CR1 LPR LL_PWR_DisableLowPowerRunMode |
| AnnaBridge | 165:d1b4690b3f8b | 297 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 298 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 299 | __STATIC_INLINE void LL_PWR_DisableLowPowerRunMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 300 | { |
| AnnaBridge | 165:d1b4690b3f8b | 301 | CLEAR_BIT(PWR->CR1, PWR_CR1_LPR); |
| AnnaBridge | 165:d1b4690b3f8b | 302 | } |
| AnnaBridge | 165:d1b4690b3f8b | 303 | |
| AnnaBridge | 165:d1b4690b3f8b | 304 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 305 | * @brief Switch from run main mode to run low-power mode. |
| AnnaBridge | 165:d1b4690b3f8b | 306 | * @rmtoll CR1 LPR LL_PWR_EnterLowPowerRunMode |
| AnnaBridge | 165:d1b4690b3f8b | 307 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 308 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 309 | __STATIC_INLINE void LL_PWR_EnterLowPowerRunMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 310 | { |
| AnnaBridge | 165:d1b4690b3f8b | 311 | LL_PWR_EnableLowPowerRunMode(); |
| AnnaBridge | 165:d1b4690b3f8b | 312 | } |
| AnnaBridge | 165:d1b4690b3f8b | 313 | |
| AnnaBridge | 165:d1b4690b3f8b | 314 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 315 | * @brief Switch from run main mode to low-power mode. |
| AnnaBridge | 165:d1b4690b3f8b | 316 | * @rmtoll CR1 LPR LL_PWR_ExitLowPowerRunMode |
| AnnaBridge | 165:d1b4690b3f8b | 317 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 318 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 319 | __STATIC_INLINE void LL_PWR_ExitLowPowerRunMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 320 | { |
| AnnaBridge | 165:d1b4690b3f8b | 321 | LL_PWR_DisableLowPowerRunMode(); |
| AnnaBridge | 165:d1b4690b3f8b | 322 | } |
| AnnaBridge | 165:d1b4690b3f8b | 323 | |
| AnnaBridge | 165:d1b4690b3f8b | 324 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 325 | * @brief Check if the regulator is in low-power mode |
| AnnaBridge | 165:d1b4690b3f8b | 326 | * @rmtoll CR1 LPR LL_PWR_IsEnabledLowPowerRunMode |
| AnnaBridge | 165:d1b4690b3f8b | 327 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 328 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 329 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledLowPowerRunMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 330 | { |
| AnnaBridge | 165:d1b4690b3f8b | 331 | return (READ_BIT(PWR->CR1, PWR_CR1_LPR) == (PWR_CR1_LPR)); |
| AnnaBridge | 165:d1b4690b3f8b | 332 | } |
| AnnaBridge | 165:d1b4690b3f8b | 333 | |
| AnnaBridge | 165:d1b4690b3f8b | 334 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 335 | * @brief Set the main internal regulator output voltage |
| AnnaBridge | 165:d1b4690b3f8b | 336 | * @note This configuration may be completed with LL_PWR_EnableRange1BoostMode() on STM32L4Rx/STM32L4Sx devices. |
| AnnaBridge | 165:d1b4690b3f8b | 337 | * @rmtoll CR1 VOS LL_PWR_SetRegulVoltageScaling |
| AnnaBridge | 165:d1b4690b3f8b | 338 | * @param VoltageScaling This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 339 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
| AnnaBridge | 165:d1b4690b3f8b | 340 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
| AnnaBridge | 165:d1b4690b3f8b | 341 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 342 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 343 | __STATIC_INLINE void LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling) |
| AnnaBridge | 165:d1b4690b3f8b | 344 | { |
| AnnaBridge | 165:d1b4690b3f8b | 345 | MODIFY_REG(PWR->CR1, PWR_CR1_VOS, VoltageScaling); |
| AnnaBridge | 165:d1b4690b3f8b | 346 | } |
| AnnaBridge | 165:d1b4690b3f8b | 347 | |
| AnnaBridge | 165:d1b4690b3f8b | 348 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 349 | * @brief Get the main internal regulator output voltage |
| AnnaBridge | 165:d1b4690b3f8b | 350 | * @rmtoll CR1 VOS LL_PWR_GetRegulVoltageScaling |
| AnnaBridge | 165:d1b4690b3f8b | 351 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 352 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE1 |
| AnnaBridge | 165:d1b4690b3f8b | 353 | * @arg @ref LL_PWR_REGU_VOLTAGE_SCALE2 |
| AnnaBridge | 165:d1b4690b3f8b | 354 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 355 | __STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(void) |
| AnnaBridge | 165:d1b4690b3f8b | 356 | { |
| AnnaBridge | 165:d1b4690b3f8b | 357 | return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_VOS)); |
| AnnaBridge | 165:d1b4690b3f8b | 358 | } |
| AnnaBridge | 165:d1b4690b3f8b | 359 | |
| AnnaBridge | 165:d1b4690b3f8b | 360 | #if defined(PWR_CR5_R1MODE) |
| AnnaBridge | 165:d1b4690b3f8b | 361 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 362 | * @brief Enable main regulator voltage range 1 boost mode |
| AnnaBridge | 165:d1b4690b3f8b | 363 | * @rmtoll CR5 R1MODE LL_PWR_EnableRange1BoostMode |
| AnnaBridge | 165:d1b4690b3f8b | 364 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 365 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 366 | __STATIC_INLINE void LL_PWR_EnableRange1BoostMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 367 | { |
| AnnaBridge | 165:d1b4690b3f8b | 368 | CLEAR_BIT(PWR->CR5, PWR_CR5_R1MODE); |
| AnnaBridge | 165:d1b4690b3f8b | 369 | } |
| AnnaBridge | 165:d1b4690b3f8b | 370 | |
| AnnaBridge | 165:d1b4690b3f8b | 371 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 372 | * @brief Disable main regulator voltage range 1 boost mode |
| AnnaBridge | 165:d1b4690b3f8b | 373 | * @rmtoll CR5 R1MODE LL_PWR_DisableRange1BoostMode |
| AnnaBridge | 165:d1b4690b3f8b | 374 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 375 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 376 | __STATIC_INLINE void LL_PWR_DisableRange1BoostMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 377 | { |
| AnnaBridge | 165:d1b4690b3f8b | 378 | SET_BIT(PWR->CR5, PWR_CR5_R1MODE); |
| AnnaBridge | 165:d1b4690b3f8b | 379 | } |
| AnnaBridge | 165:d1b4690b3f8b | 380 | |
| AnnaBridge | 165:d1b4690b3f8b | 381 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 382 | * @brief Check if the main regulator voltage range 1 boost mode is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 383 | * @rmtoll CR5 R1MODE LL_PWR_IsEnabledRange1BoostMode |
| AnnaBridge | 165:d1b4690b3f8b | 384 | * @retval Inverted state of bit (0 or 1). |
| AnnaBridge | 165:d1b4690b3f8b | 385 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 386 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledRange1BoostMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 387 | { |
| AnnaBridge | 165:d1b4690b3f8b | 388 | return (READ_BIT(PWR->CR5, PWR_CR5_R1MODE) == RESET); |
| AnnaBridge | 165:d1b4690b3f8b | 389 | } |
| AnnaBridge | 165:d1b4690b3f8b | 390 | #endif /* PWR_CR5_R1MODE */ |
| AnnaBridge | 165:d1b4690b3f8b | 391 | |
| AnnaBridge | 165:d1b4690b3f8b | 392 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 393 | * @brief Enable access to the backup domain |
| AnnaBridge | 165:d1b4690b3f8b | 394 | * @rmtoll CR1 DBP LL_PWR_EnableBkUpAccess |
| AnnaBridge | 165:d1b4690b3f8b | 395 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 396 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 397 | __STATIC_INLINE void LL_PWR_EnableBkUpAccess(void) |
| AnnaBridge | 165:d1b4690b3f8b | 398 | { |
| AnnaBridge | 165:d1b4690b3f8b | 399 | SET_BIT(PWR->CR1, PWR_CR1_DBP); |
| AnnaBridge | 165:d1b4690b3f8b | 400 | } |
| AnnaBridge | 165:d1b4690b3f8b | 401 | |
| AnnaBridge | 165:d1b4690b3f8b | 402 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 403 | * @brief Disable access to the backup domain |
| AnnaBridge | 165:d1b4690b3f8b | 404 | * @rmtoll CR1 DBP LL_PWR_DisableBkUpAccess |
| AnnaBridge | 165:d1b4690b3f8b | 405 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 406 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 407 | __STATIC_INLINE void LL_PWR_DisableBkUpAccess(void) |
| AnnaBridge | 165:d1b4690b3f8b | 408 | { |
| AnnaBridge | 165:d1b4690b3f8b | 409 | CLEAR_BIT(PWR->CR1, PWR_CR1_DBP); |
| AnnaBridge | 165:d1b4690b3f8b | 410 | } |
| AnnaBridge | 165:d1b4690b3f8b | 411 | |
| AnnaBridge | 165:d1b4690b3f8b | 412 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 413 | * @brief Check if the backup domain is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 414 | * @rmtoll CR1 DBP LL_PWR_IsEnabledBkUpAccess |
| AnnaBridge | 165:d1b4690b3f8b | 415 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 416 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 417 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(void) |
| AnnaBridge | 165:d1b4690b3f8b | 418 | { |
| AnnaBridge | 165:d1b4690b3f8b | 419 | return (READ_BIT(PWR->CR1, PWR_CR1_DBP) == (PWR_CR1_DBP)); |
| AnnaBridge | 165:d1b4690b3f8b | 420 | } |
| AnnaBridge | 165:d1b4690b3f8b | 421 | |
| AnnaBridge | 165:d1b4690b3f8b | 422 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 423 | * @brief Set Low-Power mode |
| AnnaBridge | 165:d1b4690b3f8b | 424 | * @rmtoll CR1 LPMS LL_PWR_SetPowerMode |
| AnnaBridge | 165:d1b4690b3f8b | 425 | * @param LowPowerMode This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 426 | * @arg @ref LL_PWR_MODE_STOP0 |
| AnnaBridge | 165:d1b4690b3f8b | 427 | * @arg @ref LL_PWR_MODE_STOP1 |
| AnnaBridge | 165:d1b4690b3f8b | 428 | * @arg @ref LL_PWR_MODE_STOP2 |
| AnnaBridge | 165:d1b4690b3f8b | 429 | * @arg @ref LL_PWR_MODE_STANDBY |
| AnnaBridge | 165:d1b4690b3f8b | 430 | * @arg @ref LL_PWR_MODE_SHUTDOWN |
| AnnaBridge | 165:d1b4690b3f8b | 431 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 432 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 433 | __STATIC_INLINE void LL_PWR_SetPowerMode(uint32_t LowPowerMode) |
| AnnaBridge | 165:d1b4690b3f8b | 434 | { |
| AnnaBridge | 165:d1b4690b3f8b | 435 | MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, LowPowerMode); |
| AnnaBridge | 165:d1b4690b3f8b | 436 | } |
| AnnaBridge | 165:d1b4690b3f8b | 437 | |
| AnnaBridge | 165:d1b4690b3f8b | 438 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 439 | * @brief Get Low-Power mode |
| AnnaBridge | 165:d1b4690b3f8b | 440 | * @rmtoll CR1 LPMS LL_PWR_GetPowerMode |
| AnnaBridge | 165:d1b4690b3f8b | 441 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 442 | * @arg @ref LL_PWR_MODE_STOP0 |
| AnnaBridge | 165:d1b4690b3f8b | 443 | * @arg @ref LL_PWR_MODE_STOP1 |
| AnnaBridge | 165:d1b4690b3f8b | 444 | * @arg @ref LL_PWR_MODE_STOP2 |
| AnnaBridge | 165:d1b4690b3f8b | 445 | * @arg @ref LL_PWR_MODE_STANDBY |
| AnnaBridge | 165:d1b4690b3f8b | 446 | * @arg @ref LL_PWR_MODE_SHUTDOWN |
| AnnaBridge | 165:d1b4690b3f8b | 447 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 448 | __STATIC_INLINE uint32_t LL_PWR_GetPowerMode(void) |
| AnnaBridge | 165:d1b4690b3f8b | 449 | { |
| AnnaBridge | 165:d1b4690b3f8b | 450 | return (uint32_t)(READ_BIT(PWR->CR1, PWR_CR1_LPMS)); |
| AnnaBridge | 165:d1b4690b3f8b | 451 | } |
| AnnaBridge | 165:d1b4690b3f8b | 452 | |
| AnnaBridge | 165:d1b4690b3f8b | 453 | #if defined(PWR_CR1_RRSTP) |
| AnnaBridge | 165:d1b4690b3f8b | 454 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 455 | * @brief Enable SRAM3 content retention in Stop mode |
| AnnaBridge | 165:d1b4690b3f8b | 456 | * @rmtoll CR1 RRSTP LL_PWR_EnableSRAM3Retention |
| AnnaBridge | 165:d1b4690b3f8b | 457 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 458 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 459 | __STATIC_INLINE void LL_PWR_EnableSRAM3Retention(void) |
| AnnaBridge | 165:d1b4690b3f8b | 460 | { |
| AnnaBridge | 165:d1b4690b3f8b | 461 | SET_BIT(PWR->CR1, PWR_CR1_RRSTP); |
| AnnaBridge | 165:d1b4690b3f8b | 462 | } |
| AnnaBridge | 165:d1b4690b3f8b | 463 | |
| AnnaBridge | 165:d1b4690b3f8b | 464 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 465 | * @brief Disable SRAM3 content retention in Stop mode |
| AnnaBridge | 165:d1b4690b3f8b | 466 | * @rmtoll CR1 RRSTP LL_PWR_DisableSRAM3Retention |
| AnnaBridge | 165:d1b4690b3f8b | 467 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 468 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 469 | __STATIC_INLINE void LL_PWR_DisableSRAM3Retention(void) |
| AnnaBridge | 165:d1b4690b3f8b | 470 | { |
| AnnaBridge | 165:d1b4690b3f8b | 471 | CLEAR_BIT(PWR->CR1, PWR_CR1_RRSTP); |
| AnnaBridge | 165:d1b4690b3f8b | 472 | } |
| AnnaBridge | 165:d1b4690b3f8b | 473 | |
| AnnaBridge | 165:d1b4690b3f8b | 474 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 475 | * @brief Check if SRAM3 content retention in Stop mode is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 476 | * @rmtoll CR1 RRSTP LL_PWR_IsEnabledSRAM3Retention |
| AnnaBridge | 165:d1b4690b3f8b | 477 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 478 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 479 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledSRAM3Retention(void) |
| AnnaBridge | 165:d1b4690b3f8b | 480 | { |
| AnnaBridge | 165:d1b4690b3f8b | 481 | return (READ_BIT(PWR->CR1, PWR_CR1_RRSTP) == (PWR_CR1_RRSTP)); |
| AnnaBridge | 165:d1b4690b3f8b | 482 | } |
| AnnaBridge | 165:d1b4690b3f8b | 483 | #endif /* PWR_CR1_RRSTP */ |
| AnnaBridge | 165:d1b4690b3f8b | 484 | |
| AnnaBridge | 165:d1b4690b3f8b | 485 | #if defined(PWR_CR3_DSIPDEN) |
| AnnaBridge | 165:d1b4690b3f8b | 486 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 487 | * @brief Enable pull-down activation on DSI pins |
| AnnaBridge | 165:d1b4690b3f8b | 488 | * @rmtoll CR3 DSIPDEN LL_PWR_EnableDSIPinsPDActivation |
| AnnaBridge | 165:d1b4690b3f8b | 489 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 490 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 491 | __STATIC_INLINE void LL_PWR_EnableDSIPinsPDActivation(void) |
| AnnaBridge | 165:d1b4690b3f8b | 492 | { |
| AnnaBridge | 165:d1b4690b3f8b | 493 | SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN); |
| AnnaBridge | 165:d1b4690b3f8b | 494 | } |
| AnnaBridge | 165:d1b4690b3f8b | 495 | |
| AnnaBridge | 165:d1b4690b3f8b | 496 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 497 | * @brief Disable pull-down activation on DSI pins |
| AnnaBridge | 165:d1b4690b3f8b | 498 | * @rmtoll CR3 DSIPDEN LL_PWR_DisableDSIPinsPDActivation |
| AnnaBridge | 165:d1b4690b3f8b | 499 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 500 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 501 | __STATIC_INLINE void LL_PWR_DisableDSIPinsPDActivation(void) |
| AnnaBridge | 165:d1b4690b3f8b | 502 | { |
| AnnaBridge | 165:d1b4690b3f8b | 503 | CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN); |
| AnnaBridge | 165:d1b4690b3f8b | 504 | } |
| AnnaBridge | 165:d1b4690b3f8b | 505 | |
| AnnaBridge | 165:d1b4690b3f8b | 506 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 507 | * @brief Check if pull-down activation on DSI pins is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 508 | * @rmtoll CR3 DSIPDEN LL_PWR_IsEnabledDSIPinsPDActivation |
| AnnaBridge | 165:d1b4690b3f8b | 509 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 510 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 511 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledDSIPinsPDActivation(void) |
| AnnaBridge | 165:d1b4690b3f8b | 512 | { |
| AnnaBridge | 165:d1b4690b3f8b | 513 | return (READ_BIT(PWR->CR3, PWR_CR3_DSIPDEN) == (PWR_CR3_DSIPDEN)); |
| AnnaBridge | 165:d1b4690b3f8b | 514 | } |
| AnnaBridge | 165:d1b4690b3f8b | 515 | #endif /* PWR_CR3_DSIPDEN */ |
| AnnaBridge | 165:d1b4690b3f8b | 516 | |
| AnnaBridge | 165:d1b4690b3f8b | 517 | #if defined(PWR_CR2_PVME1) |
| AnnaBridge | 165:d1b4690b3f8b | 518 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 519 | * @brief Enable VDDUSB supply |
| AnnaBridge | 165:d1b4690b3f8b | 520 | * @rmtoll CR2 USV LL_PWR_EnableVddUSB |
| AnnaBridge | 165:d1b4690b3f8b | 521 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 522 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 523 | __STATIC_INLINE void LL_PWR_EnableVddUSB(void) |
| AnnaBridge | 165:d1b4690b3f8b | 524 | { |
| AnnaBridge | 165:d1b4690b3f8b | 525 | SET_BIT(PWR->CR2, PWR_CR2_USV); |
| AnnaBridge | 165:d1b4690b3f8b | 526 | } |
| AnnaBridge | 165:d1b4690b3f8b | 527 | |
| AnnaBridge | 165:d1b4690b3f8b | 528 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 529 | * @brief Disable VDDUSB supply |
| AnnaBridge | 165:d1b4690b3f8b | 530 | * @rmtoll CR2 USV LL_PWR_DisableVddUSB |
| AnnaBridge | 165:d1b4690b3f8b | 531 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 532 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 533 | __STATIC_INLINE void LL_PWR_DisableVddUSB(void) |
| AnnaBridge | 165:d1b4690b3f8b | 534 | { |
| AnnaBridge | 165:d1b4690b3f8b | 535 | CLEAR_BIT(PWR->CR2, PWR_CR2_USV); |
| AnnaBridge | 165:d1b4690b3f8b | 536 | } |
| AnnaBridge | 165:d1b4690b3f8b | 537 | |
| AnnaBridge | 165:d1b4690b3f8b | 538 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 539 | * @brief Check if VDDUSB supply is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 540 | * @rmtoll CR2 USV LL_PWR_IsEnabledVddUSB |
| AnnaBridge | 165:d1b4690b3f8b | 541 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 542 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 543 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledVddUSB(void) |
| AnnaBridge | 165:d1b4690b3f8b | 544 | { |
| AnnaBridge | 165:d1b4690b3f8b | 545 | return (READ_BIT(PWR->CR2, PWR_CR2_USV) == (PWR_CR2_USV)); |
| AnnaBridge | 165:d1b4690b3f8b | 546 | } |
| AnnaBridge | 165:d1b4690b3f8b | 547 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 548 | |
| AnnaBridge | 165:d1b4690b3f8b | 549 | #if defined(PWR_CR2_IOSV) |
| AnnaBridge | 165:d1b4690b3f8b | 550 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 551 | * @brief Enable VDDIO2 supply |
| AnnaBridge | 165:d1b4690b3f8b | 552 | * @rmtoll CR2 IOSV LL_PWR_EnableVddIO2 |
| AnnaBridge | 165:d1b4690b3f8b | 553 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 554 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 555 | __STATIC_INLINE void LL_PWR_EnableVddIO2(void) |
| AnnaBridge | 165:d1b4690b3f8b | 556 | { |
| AnnaBridge | 165:d1b4690b3f8b | 557 | SET_BIT(PWR->CR2, PWR_CR2_IOSV); |
| AnnaBridge | 165:d1b4690b3f8b | 558 | } |
| AnnaBridge | 165:d1b4690b3f8b | 559 | |
| AnnaBridge | 165:d1b4690b3f8b | 560 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 561 | * @brief Disable VDDIO2 supply |
| AnnaBridge | 165:d1b4690b3f8b | 562 | * @rmtoll CR2 IOSV LL_PWR_DisableVddIO2 |
| AnnaBridge | 165:d1b4690b3f8b | 563 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 564 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 565 | __STATIC_INLINE void LL_PWR_DisableVddIO2(void) |
| AnnaBridge | 165:d1b4690b3f8b | 566 | { |
| AnnaBridge | 165:d1b4690b3f8b | 567 | CLEAR_BIT(PWR->CR2, PWR_CR2_IOSV); |
| AnnaBridge | 165:d1b4690b3f8b | 568 | } |
| AnnaBridge | 165:d1b4690b3f8b | 569 | |
| AnnaBridge | 165:d1b4690b3f8b | 570 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 571 | * @brief Check if VDDIO2 supply is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 572 | * @rmtoll CR2 IOSV LL_PWR_IsEnabledVddIO2 |
| AnnaBridge | 165:d1b4690b3f8b | 573 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 574 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 575 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledVddIO2(void) |
| AnnaBridge | 165:d1b4690b3f8b | 576 | { |
| AnnaBridge | 165:d1b4690b3f8b | 577 | return (READ_BIT(PWR->CR2, PWR_CR2_IOSV) == (PWR_CR2_IOSV)); |
| AnnaBridge | 165:d1b4690b3f8b | 578 | } |
| AnnaBridge | 165:d1b4690b3f8b | 579 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 580 | |
| AnnaBridge | 165:d1b4690b3f8b | 581 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 582 | * @brief Enable the Power Voltage Monitoring on a peripheral |
| AnnaBridge | 165:d1b4690b3f8b | 583 | * @rmtoll CR2 PVME1 LL_PWR_EnablePVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 584 | * CR2 PVME2 LL_PWR_EnablePVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 585 | * CR2 PVME3 LL_PWR_EnablePVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 586 | * CR2 PVME4 LL_PWR_EnablePVM |
| AnnaBridge | 165:d1b4690b3f8b | 587 | * @param PeriphVoltage This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 588 | * @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*) |
| AnnaBridge | 165:d1b4690b3f8b | 589 | * @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*) |
| AnnaBridge | 165:d1b4690b3f8b | 590 | * @arg @ref LL_PWR_PVM_VDDA_1_62V |
| AnnaBridge | 165:d1b4690b3f8b | 591 | * @arg @ref LL_PWR_PVM_VDDA_2_2V |
| AnnaBridge | 165:d1b4690b3f8b | 592 | * |
| AnnaBridge | 165:d1b4690b3f8b | 593 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 594 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 595 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 596 | __STATIC_INLINE void LL_PWR_EnablePVM(uint32_t PeriphVoltage) |
| AnnaBridge | 165:d1b4690b3f8b | 597 | { |
| AnnaBridge | 165:d1b4690b3f8b | 598 | SET_BIT(PWR->CR2, PeriphVoltage); |
| AnnaBridge | 165:d1b4690b3f8b | 599 | } |
| AnnaBridge | 165:d1b4690b3f8b | 600 | |
| AnnaBridge | 165:d1b4690b3f8b | 601 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 602 | * @brief Disable the Power Voltage Monitoring on a peripheral |
| AnnaBridge | 165:d1b4690b3f8b | 603 | * @rmtoll CR2 PVME1 LL_PWR_DisablePVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 604 | * CR2 PVME2 LL_PWR_DisablePVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 605 | * CR2 PVME3 LL_PWR_DisablePVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 606 | * CR2 PVME4 LL_PWR_DisablePVM |
| AnnaBridge | 165:d1b4690b3f8b | 607 | * @param PeriphVoltage This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 608 | * @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*) |
| AnnaBridge | 165:d1b4690b3f8b | 609 | * @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*) |
| AnnaBridge | 165:d1b4690b3f8b | 610 | * @arg @ref LL_PWR_PVM_VDDA_1_62V |
| AnnaBridge | 165:d1b4690b3f8b | 611 | * @arg @ref LL_PWR_PVM_VDDA_2_2V |
| AnnaBridge | 165:d1b4690b3f8b | 612 | * |
| AnnaBridge | 165:d1b4690b3f8b | 613 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 614 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 615 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 616 | __STATIC_INLINE void LL_PWR_DisablePVM(uint32_t PeriphVoltage) |
| AnnaBridge | 165:d1b4690b3f8b | 617 | { |
| AnnaBridge | 165:d1b4690b3f8b | 618 | CLEAR_BIT(PWR->CR2, PeriphVoltage); |
| AnnaBridge | 165:d1b4690b3f8b | 619 | } |
| AnnaBridge | 165:d1b4690b3f8b | 620 | |
| AnnaBridge | 165:d1b4690b3f8b | 621 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 622 | * @brief Check if Power Voltage Monitoring is enabled on a peripheral |
| AnnaBridge | 165:d1b4690b3f8b | 623 | * @rmtoll CR2 PVME1 LL_PWR_IsEnabledPVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 624 | * CR2 PVME2 LL_PWR_IsEnabledPVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 625 | * CR2 PVME3 LL_PWR_IsEnabledPVM\n |
| AnnaBridge | 165:d1b4690b3f8b | 626 | * CR2 PVME4 LL_PWR_IsEnabledPVM |
| AnnaBridge | 165:d1b4690b3f8b | 627 | * @param PeriphVoltage This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 628 | * @arg @ref LL_PWR_PVM_VDDUSB_1_2V (*) |
| AnnaBridge | 165:d1b4690b3f8b | 629 | * @arg @ref LL_PWR_PVM_VDDIO2_0_9V (*) |
| AnnaBridge | 165:d1b4690b3f8b | 630 | * @arg @ref LL_PWR_PVM_VDDA_1_62V |
| AnnaBridge | 165:d1b4690b3f8b | 631 | * @arg @ref LL_PWR_PVM_VDDA_2_2V |
| AnnaBridge | 165:d1b4690b3f8b | 632 | * |
| AnnaBridge | 165:d1b4690b3f8b | 633 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 634 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 635 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 636 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVM(uint32_t PeriphVoltage) |
| AnnaBridge | 165:d1b4690b3f8b | 637 | { |
| AnnaBridge | 165:d1b4690b3f8b | 638 | return (READ_BIT(PWR->CR2, PeriphVoltage) == (PeriphVoltage)); |
| AnnaBridge | 165:d1b4690b3f8b | 639 | } |
| AnnaBridge | 165:d1b4690b3f8b | 640 | |
| AnnaBridge | 165:d1b4690b3f8b | 641 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 642 | * @brief Configure the voltage threshold detected by the Power Voltage Detector |
| AnnaBridge | 165:d1b4690b3f8b | 643 | * @rmtoll CR2 PLS LL_PWR_SetPVDLevel |
| AnnaBridge | 165:d1b4690b3f8b | 644 | * @param PVDLevel This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 645 | * @arg @ref LL_PWR_PVDLEVEL_0 |
| AnnaBridge | 165:d1b4690b3f8b | 646 | * @arg @ref LL_PWR_PVDLEVEL_1 |
| AnnaBridge | 165:d1b4690b3f8b | 647 | * @arg @ref LL_PWR_PVDLEVEL_2 |
| AnnaBridge | 165:d1b4690b3f8b | 648 | * @arg @ref LL_PWR_PVDLEVEL_3 |
| AnnaBridge | 165:d1b4690b3f8b | 649 | * @arg @ref LL_PWR_PVDLEVEL_4 |
| AnnaBridge | 165:d1b4690b3f8b | 650 | * @arg @ref LL_PWR_PVDLEVEL_5 |
| AnnaBridge | 165:d1b4690b3f8b | 651 | * @arg @ref LL_PWR_PVDLEVEL_6 |
| AnnaBridge | 165:d1b4690b3f8b | 652 | * @arg @ref LL_PWR_PVDLEVEL_7 |
| AnnaBridge | 165:d1b4690b3f8b | 653 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 654 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 655 | __STATIC_INLINE void LL_PWR_SetPVDLevel(uint32_t PVDLevel) |
| AnnaBridge | 165:d1b4690b3f8b | 656 | { |
| AnnaBridge | 165:d1b4690b3f8b | 657 | MODIFY_REG(PWR->CR2, PWR_CR2_PLS, PVDLevel); |
| AnnaBridge | 165:d1b4690b3f8b | 658 | } |
| AnnaBridge | 165:d1b4690b3f8b | 659 | |
| AnnaBridge | 165:d1b4690b3f8b | 660 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 661 | * @brief Get the voltage threshold detection |
| AnnaBridge | 165:d1b4690b3f8b | 662 | * @rmtoll CR2 PLS LL_PWR_GetPVDLevel |
| AnnaBridge | 165:d1b4690b3f8b | 663 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 664 | * @arg @ref LL_PWR_PVDLEVEL_0 |
| AnnaBridge | 165:d1b4690b3f8b | 665 | * @arg @ref LL_PWR_PVDLEVEL_1 |
| AnnaBridge | 165:d1b4690b3f8b | 666 | * @arg @ref LL_PWR_PVDLEVEL_2 |
| AnnaBridge | 165:d1b4690b3f8b | 667 | * @arg @ref LL_PWR_PVDLEVEL_3 |
| AnnaBridge | 165:d1b4690b3f8b | 668 | * @arg @ref LL_PWR_PVDLEVEL_4 |
| AnnaBridge | 165:d1b4690b3f8b | 669 | * @arg @ref LL_PWR_PVDLEVEL_5 |
| AnnaBridge | 165:d1b4690b3f8b | 670 | * @arg @ref LL_PWR_PVDLEVEL_6 |
| AnnaBridge | 165:d1b4690b3f8b | 671 | * @arg @ref LL_PWR_PVDLEVEL_7 |
| AnnaBridge | 165:d1b4690b3f8b | 672 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 673 | __STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(void) |
| AnnaBridge | 165:d1b4690b3f8b | 674 | { |
| AnnaBridge | 165:d1b4690b3f8b | 675 | return (uint32_t)(READ_BIT(PWR->CR2, PWR_CR2_PLS)); |
| AnnaBridge | 165:d1b4690b3f8b | 676 | } |
| AnnaBridge | 165:d1b4690b3f8b | 677 | |
| AnnaBridge | 165:d1b4690b3f8b | 678 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 679 | * @brief Enable Power Voltage Detector |
| AnnaBridge | 165:d1b4690b3f8b | 680 | * @rmtoll CR2 PVDE LL_PWR_EnablePVD |
| AnnaBridge | 165:d1b4690b3f8b | 681 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 682 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 683 | __STATIC_INLINE void LL_PWR_EnablePVD(void) |
| AnnaBridge | 165:d1b4690b3f8b | 684 | { |
| AnnaBridge | 165:d1b4690b3f8b | 685 | SET_BIT(PWR->CR2, PWR_CR2_PVDE); |
| AnnaBridge | 165:d1b4690b3f8b | 686 | } |
| AnnaBridge | 165:d1b4690b3f8b | 687 | |
| AnnaBridge | 165:d1b4690b3f8b | 688 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 689 | * @brief Disable Power Voltage Detector |
| AnnaBridge | 165:d1b4690b3f8b | 690 | * @rmtoll CR2 PVDE LL_PWR_DisablePVD |
| AnnaBridge | 165:d1b4690b3f8b | 691 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 692 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 693 | __STATIC_INLINE void LL_PWR_DisablePVD(void) |
| AnnaBridge | 165:d1b4690b3f8b | 694 | { |
| AnnaBridge | 165:d1b4690b3f8b | 695 | CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE); |
| AnnaBridge | 165:d1b4690b3f8b | 696 | } |
| AnnaBridge | 165:d1b4690b3f8b | 697 | |
| AnnaBridge | 165:d1b4690b3f8b | 698 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 699 | * @brief Check if Power Voltage Detector is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 700 | * @rmtoll CR2 PVDE LL_PWR_IsEnabledPVD |
| AnnaBridge | 165:d1b4690b3f8b | 701 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 702 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 703 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(void) |
| AnnaBridge | 165:d1b4690b3f8b | 704 | { |
| AnnaBridge | 165:d1b4690b3f8b | 705 | return (READ_BIT(PWR->CR2, PWR_CR2_PVDE) == (PWR_CR2_PVDE)); |
| AnnaBridge | 165:d1b4690b3f8b | 706 | } |
| AnnaBridge | 165:d1b4690b3f8b | 707 | |
| AnnaBridge | 165:d1b4690b3f8b | 708 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 709 | * @brief Enable Internal Wake-up line |
| AnnaBridge | 165:d1b4690b3f8b | 710 | * @rmtoll CR3 EIWF LL_PWR_EnableInternWU |
| AnnaBridge | 165:d1b4690b3f8b | 711 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 712 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 713 | __STATIC_INLINE void LL_PWR_EnableInternWU(void) |
| AnnaBridge | 165:d1b4690b3f8b | 714 | { |
| AnnaBridge | 165:d1b4690b3f8b | 715 | SET_BIT(PWR->CR3, PWR_CR3_EIWF); |
| AnnaBridge | 165:d1b4690b3f8b | 716 | } |
| AnnaBridge | 165:d1b4690b3f8b | 717 | |
| AnnaBridge | 165:d1b4690b3f8b | 718 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 719 | * @brief Disable Internal Wake-up line |
| AnnaBridge | 165:d1b4690b3f8b | 720 | * @rmtoll CR3 EIWF LL_PWR_DisableInternWU |
| AnnaBridge | 165:d1b4690b3f8b | 721 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 722 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 723 | __STATIC_INLINE void LL_PWR_DisableInternWU(void) |
| AnnaBridge | 165:d1b4690b3f8b | 724 | { |
| AnnaBridge | 165:d1b4690b3f8b | 725 | CLEAR_BIT(PWR->CR3, PWR_CR3_EIWF); |
| AnnaBridge | 165:d1b4690b3f8b | 726 | } |
| AnnaBridge | 165:d1b4690b3f8b | 727 | |
| AnnaBridge | 165:d1b4690b3f8b | 728 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 729 | * @brief Check if Internal Wake-up line is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 730 | * @rmtoll CR3 EIWF LL_PWR_IsEnabledInternWU |
| AnnaBridge | 165:d1b4690b3f8b | 731 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 732 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 733 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledInternWU(void) |
| AnnaBridge | 165:d1b4690b3f8b | 734 | { |
| AnnaBridge | 165:d1b4690b3f8b | 735 | return (READ_BIT(PWR->CR3, PWR_CR3_EIWF) == (PWR_CR3_EIWF)); |
| AnnaBridge | 165:d1b4690b3f8b | 736 | } |
| AnnaBridge | 165:d1b4690b3f8b | 737 | |
| AnnaBridge | 165:d1b4690b3f8b | 738 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 739 | * @brief Enable pull-up and pull-down configuration |
| AnnaBridge | 165:d1b4690b3f8b | 740 | * @rmtoll CR3 APC LL_PWR_EnablePUPDCfg |
| AnnaBridge | 165:d1b4690b3f8b | 741 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 742 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 743 | __STATIC_INLINE void LL_PWR_EnablePUPDCfg(void) |
| AnnaBridge | 165:d1b4690b3f8b | 744 | { |
| AnnaBridge | 165:d1b4690b3f8b | 745 | SET_BIT(PWR->CR3, PWR_CR3_APC); |
| AnnaBridge | 165:d1b4690b3f8b | 746 | } |
| AnnaBridge | 165:d1b4690b3f8b | 747 | |
| AnnaBridge | 165:d1b4690b3f8b | 748 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 749 | * @brief Disable pull-up and pull-down configuration |
| AnnaBridge | 165:d1b4690b3f8b | 750 | * @rmtoll CR3 APC LL_PWR_DisablePUPDCfg |
| AnnaBridge | 165:d1b4690b3f8b | 751 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 752 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 753 | __STATIC_INLINE void LL_PWR_DisablePUPDCfg(void) |
| AnnaBridge | 165:d1b4690b3f8b | 754 | { |
| AnnaBridge | 165:d1b4690b3f8b | 755 | CLEAR_BIT(PWR->CR3, PWR_CR3_APC); |
| AnnaBridge | 165:d1b4690b3f8b | 756 | } |
| AnnaBridge | 165:d1b4690b3f8b | 757 | |
| AnnaBridge | 165:d1b4690b3f8b | 758 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 759 | * @brief Check if pull-up and pull-down configuration is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 760 | * @rmtoll CR3 APC LL_PWR_IsEnabledPUPDCfg |
| AnnaBridge | 165:d1b4690b3f8b | 761 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 762 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 763 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledPUPDCfg(void) |
| AnnaBridge | 165:d1b4690b3f8b | 764 | { |
| AnnaBridge | 165:d1b4690b3f8b | 765 | return (READ_BIT(PWR->CR3, PWR_CR3_APC) == (PWR_CR3_APC)); |
| AnnaBridge | 165:d1b4690b3f8b | 766 | } |
| AnnaBridge | 165:d1b4690b3f8b | 767 | |
| AnnaBridge | 165:d1b4690b3f8b | 768 | #if defined(PWR_CR3_DSIPDEN) |
| AnnaBridge | 165:d1b4690b3f8b | 769 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 770 | * @brief Enable pull-down activation on DSI pins |
| AnnaBridge | 165:d1b4690b3f8b | 771 | * @rmtoll CR3 DSIPDEN LL_PWR_EnableDSIPullDown |
| AnnaBridge | 165:d1b4690b3f8b | 772 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 773 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 774 | __STATIC_INLINE void LL_PWR_EnableDSIPullDown(void) |
| AnnaBridge | 165:d1b4690b3f8b | 775 | { |
| AnnaBridge | 165:d1b4690b3f8b | 776 | SET_BIT(PWR->CR3, PWR_CR3_DSIPDEN); |
| AnnaBridge | 165:d1b4690b3f8b | 777 | } |
| AnnaBridge | 165:d1b4690b3f8b | 778 | |
| AnnaBridge | 165:d1b4690b3f8b | 779 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 780 | * @brief Disable pull-down activation on DSI pins |
| AnnaBridge | 165:d1b4690b3f8b | 781 | * @rmtoll CR3 DSIPDEN LL_PWR_DisableDSIPullDown |
| AnnaBridge | 165:d1b4690b3f8b | 782 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 783 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 784 | __STATIC_INLINE void LL_PWR_DisableDSIPullDown(void) |
| AnnaBridge | 165:d1b4690b3f8b | 785 | { |
| AnnaBridge | 165:d1b4690b3f8b | 786 | CLEAR_BIT(PWR->CR3, PWR_CR3_DSIPDEN); |
| AnnaBridge | 165:d1b4690b3f8b | 787 | } |
| AnnaBridge | 165:d1b4690b3f8b | 788 | |
| AnnaBridge | 165:d1b4690b3f8b | 789 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 790 | * @brief Check if pull-down activation on DSI pins is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 791 | * @rmtoll CR3 DSIPDEN LL_PWR_IsEnabledDSIPullDown |
| AnnaBridge | 165:d1b4690b3f8b | 792 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 793 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 794 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledDSIPullDown(void) |
| AnnaBridge | 165:d1b4690b3f8b | 795 | { |
| AnnaBridge | 165:d1b4690b3f8b | 796 | return (READ_BIT(PWR->CR3, PWR_CR3_DSIPDEN) == (PWR_CR3_DSIPDEN)); |
| AnnaBridge | 165:d1b4690b3f8b | 797 | } |
| AnnaBridge | 165:d1b4690b3f8b | 798 | #endif /* PWR_CR3_DSIPDEN */ |
| AnnaBridge | 165:d1b4690b3f8b | 799 | |
| AnnaBridge | 165:d1b4690b3f8b | 800 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 801 | * @brief Enable SRAM2 content retention in Standby mode |
| AnnaBridge | 165:d1b4690b3f8b | 802 | * @rmtoll CR3 RRS LL_PWR_EnableSRAM2Retention |
| AnnaBridge | 165:d1b4690b3f8b | 803 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 804 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 805 | __STATIC_INLINE void LL_PWR_EnableSRAM2Retention(void) |
| AnnaBridge | 165:d1b4690b3f8b | 806 | { |
| AnnaBridge | 165:d1b4690b3f8b | 807 | SET_BIT(PWR->CR3, PWR_CR3_RRS); |
| AnnaBridge | 165:d1b4690b3f8b | 808 | } |
| AnnaBridge | 165:d1b4690b3f8b | 809 | |
| AnnaBridge | 165:d1b4690b3f8b | 810 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 811 | * @brief Disable SRAM2 content retention in Standby mode |
| AnnaBridge | 165:d1b4690b3f8b | 812 | * @rmtoll CR3 RRS LL_PWR_DisableSRAM2Retention |
| AnnaBridge | 165:d1b4690b3f8b | 813 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 814 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 815 | __STATIC_INLINE void LL_PWR_DisableSRAM2Retention(void) |
| AnnaBridge | 165:d1b4690b3f8b | 816 | { |
| AnnaBridge | 165:d1b4690b3f8b | 817 | CLEAR_BIT(PWR->CR3, PWR_CR3_RRS); |
| AnnaBridge | 165:d1b4690b3f8b | 818 | } |
| AnnaBridge | 165:d1b4690b3f8b | 819 | |
| AnnaBridge | 165:d1b4690b3f8b | 820 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 821 | * @brief Check if SRAM2 content retention in Standby mode is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 822 | * @rmtoll CR3 RRS LL_PWR_IsEnabledSRAM2Retention |
| AnnaBridge | 165:d1b4690b3f8b | 823 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 824 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 825 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledSRAM2Retention(void) |
| AnnaBridge | 165:d1b4690b3f8b | 826 | { |
| AnnaBridge | 165:d1b4690b3f8b | 827 | return (READ_BIT(PWR->CR3, PWR_CR3_RRS) == (PWR_CR3_RRS)); |
| AnnaBridge | 165:d1b4690b3f8b | 828 | } |
| AnnaBridge | 165:d1b4690b3f8b | 829 | |
| AnnaBridge | 165:d1b4690b3f8b | 830 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 831 | * @brief Enable the WakeUp PINx functionality |
| AnnaBridge | 165:d1b4690b3f8b | 832 | * @rmtoll CR3 EWUP1 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 833 | * CR3 EWUP2 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 834 | * CR3 EWUP3 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 835 | * CR3 EWUP4 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 836 | * CR3 EWUP5 LL_PWR_EnableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 837 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 838 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 165:d1b4690b3f8b | 839 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 165:d1b4690b3f8b | 840 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
| AnnaBridge | 165:d1b4690b3f8b | 841 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
| AnnaBridge | 165:d1b4690b3f8b | 842 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
| AnnaBridge | 165:d1b4690b3f8b | 843 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 844 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 845 | __STATIC_INLINE void LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin) |
| AnnaBridge | 165:d1b4690b3f8b | 846 | { |
| AnnaBridge | 165:d1b4690b3f8b | 847 | SET_BIT(PWR->CR3, WakeUpPin); |
| AnnaBridge | 165:d1b4690b3f8b | 848 | } |
| AnnaBridge | 165:d1b4690b3f8b | 849 | |
| AnnaBridge | 165:d1b4690b3f8b | 850 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 851 | * @brief Disable the WakeUp PINx functionality |
| AnnaBridge | 165:d1b4690b3f8b | 852 | * @rmtoll CR3 EWUP1 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 853 | * CR3 EWUP2 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 854 | * CR3 EWUP3 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 855 | * CR3 EWUP4 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 856 | * CR3 EWUP5 LL_PWR_DisableWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 857 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 858 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 165:d1b4690b3f8b | 859 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 165:d1b4690b3f8b | 860 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
| AnnaBridge | 165:d1b4690b3f8b | 861 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
| AnnaBridge | 165:d1b4690b3f8b | 862 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
| AnnaBridge | 165:d1b4690b3f8b | 863 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 864 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 865 | __STATIC_INLINE void LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin) |
| AnnaBridge | 165:d1b4690b3f8b | 866 | { |
| AnnaBridge | 165:d1b4690b3f8b | 867 | CLEAR_BIT(PWR->CR3, WakeUpPin); |
| AnnaBridge | 165:d1b4690b3f8b | 868 | } |
| AnnaBridge | 165:d1b4690b3f8b | 869 | |
| AnnaBridge | 165:d1b4690b3f8b | 870 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 871 | * @brief Check if the WakeUp PINx functionality is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 872 | * @rmtoll CR3 EWUP1 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 873 | * CR3 EWUP2 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 874 | * CR3 EWUP3 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 875 | * CR3 EWUP4 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 876 | * CR3 EWUP5 LL_PWR_IsEnabledWakeUpPin\n |
| AnnaBridge | 165:d1b4690b3f8b | 877 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 878 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 165:d1b4690b3f8b | 879 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 165:d1b4690b3f8b | 880 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
| AnnaBridge | 165:d1b4690b3f8b | 881 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
| AnnaBridge | 165:d1b4690b3f8b | 882 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
| AnnaBridge | 165:d1b4690b3f8b | 883 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 884 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 885 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin) |
| AnnaBridge | 165:d1b4690b3f8b | 886 | { |
| AnnaBridge | 165:d1b4690b3f8b | 887 | return (READ_BIT(PWR->CR3, WakeUpPin) == (WakeUpPin)); |
| AnnaBridge | 165:d1b4690b3f8b | 888 | } |
| AnnaBridge | 165:d1b4690b3f8b | 889 | |
| AnnaBridge | 165:d1b4690b3f8b | 890 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 891 | * @brief Set the resistor impedance |
| AnnaBridge | 165:d1b4690b3f8b | 892 | * @rmtoll CR4 VBRS LL_PWR_SetBattChargResistor |
| AnnaBridge | 165:d1b4690b3f8b | 893 | * @param Resistor This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 894 | * @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K |
| AnnaBridge | 165:d1b4690b3f8b | 895 | * @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K |
| AnnaBridge | 165:d1b4690b3f8b | 896 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 897 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 898 | __STATIC_INLINE void LL_PWR_SetBattChargResistor(uint32_t Resistor) |
| AnnaBridge | 165:d1b4690b3f8b | 899 | { |
| AnnaBridge | 165:d1b4690b3f8b | 900 | MODIFY_REG(PWR->CR4, PWR_CR4_VBRS, Resistor); |
| AnnaBridge | 165:d1b4690b3f8b | 901 | } |
| AnnaBridge | 165:d1b4690b3f8b | 902 | |
| AnnaBridge | 165:d1b4690b3f8b | 903 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 904 | * @brief Get the resistor impedance |
| AnnaBridge | 165:d1b4690b3f8b | 905 | * @rmtoll CR4 VBRS LL_PWR_GetBattChargResistor |
| AnnaBridge | 165:d1b4690b3f8b | 906 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 907 | * @arg @ref LL_PWR_BATT_CHARG_RESISTOR_5K |
| AnnaBridge | 165:d1b4690b3f8b | 908 | * @arg @ref LL_PWR_BATT_CHARGRESISTOR_1_5K |
| AnnaBridge | 165:d1b4690b3f8b | 909 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 910 | __STATIC_INLINE uint32_t LL_PWR_GetBattChargResistor(void) |
| AnnaBridge | 165:d1b4690b3f8b | 911 | { |
| AnnaBridge | 165:d1b4690b3f8b | 912 | return (uint32_t)(READ_BIT(PWR->CR4, PWR_CR4_VBRS)); |
| AnnaBridge | 165:d1b4690b3f8b | 913 | } |
| AnnaBridge | 165:d1b4690b3f8b | 914 | |
| AnnaBridge | 165:d1b4690b3f8b | 915 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 916 | * @brief Enable battery charging |
| AnnaBridge | 165:d1b4690b3f8b | 917 | * @rmtoll CR4 VBE LL_PWR_EnableBatteryCharging |
| AnnaBridge | 165:d1b4690b3f8b | 918 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 919 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 920 | __STATIC_INLINE void LL_PWR_EnableBatteryCharging(void) |
| AnnaBridge | 165:d1b4690b3f8b | 921 | { |
| AnnaBridge | 165:d1b4690b3f8b | 922 | SET_BIT(PWR->CR4, PWR_CR4_VBE); |
| AnnaBridge | 165:d1b4690b3f8b | 923 | } |
| AnnaBridge | 165:d1b4690b3f8b | 924 | |
| AnnaBridge | 165:d1b4690b3f8b | 925 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 926 | * @brief Disable battery charging |
| AnnaBridge | 165:d1b4690b3f8b | 927 | * @rmtoll CR4 VBE LL_PWR_DisableBatteryCharging |
| AnnaBridge | 165:d1b4690b3f8b | 928 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 929 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 930 | __STATIC_INLINE void LL_PWR_DisableBatteryCharging(void) |
| AnnaBridge | 165:d1b4690b3f8b | 931 | { |
| AnnaBridge | 165:d1b4690b3f8b | 932 | CLEAR_BIT(PWR->CR4, PWR_CR4_VBE); |
| AnnaBridge | 165:d1b4690b3f8b | 933 | } |
| AnnaBridge | 165:d1b4690b3f8b | 934 | |
| AnnaBridge | 165:d1b4690b3f8b | 935 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 936 | * @brief Check if battery charging is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 937 | * @rmtoll CR4 VBE LL_PWR_IsEnabledBatteryCharging |
| AnnaBridge | 165:d1b4690b3f8b | 938 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 939 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 940 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledBatteryCharging(void) |
| AnnaBridge | 165:d1b4690b3f8b | 941 | { |
| AnnaBridge | 165:d1b4690b3f8b | 942 | return (READ_BIT(PWR->CR4, PWR_CR4_VBE) == (PWR_CR4_VBE)); |
| AnnaBridge | 165:d1b4690b3f8b | 943 | } |
| AnnaBridge | 165:d1b4690b3f8b | 944 | |
| AnnaBridge | 165:d1b4690b3f8b | 945 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 946 | * @brief Set the Wake-Up pin polarity low for the event detection |
| AnnaBridge | 165:d1b4690b3f8b | 947 | * @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 948 | * CR4 WP2 LL_PWR_SetWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 949 | * CR4 WP3 LL_PWR_SetWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 950 | * CR4 WP4 LL_PWR_SetWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 951 | * CR4 WP5 LL_PWR_SetWakeUpPinPolarityLow |
| AnnaBridge | 165:d1b4690b3f8b | 952 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 953 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 165:d1b4690b3f8b | 954 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 165:d1b4690b3f8b | 955 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
| AnnaBridge | 165:d1b4690b3f8b | 956 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
| AnnaBridge | 165:d1b4690b3f8b | 957 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
| AnnaBridge | 165:d1b4690b3f8b | 958 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 959 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 960 | __STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityLow(uint32_t WakeUpPin) |
| AnnaBridge | 165:d1b4690b3f8b | 961 | { |
| AnnaBridge | 165:d1b4690b3f8b | 962 | SET_BIT(PWR->CR4, WakeUpPin); |
| AnnaBridge | 165:d1b4690b3f8b | 963 | } |
| AnnaBridge | 165:d1b4690b3f8b | 964 | |
| AnnaBridge | 165:d1b4690b3f8b | 965 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 966 | * @brief Set the Wake-Up pin polarity high for the event detection |
| AnnaBridge | 165:d1b4690b3f8b | 967 | * @rmtoll CR4 WP1 LL_PWR_SetWakeUpPinPolarityHigh\n |
| AnnaBridge | 165:d1b4690b3f8b | 968 | * CR4 WP2 LL_PWR_SetWakeUpPinPolarityHigh\n |
| AnnaBridge | 165:d1b4690b3f8b | 969 | * CR4 WP3 LL_PWR_SetWakeUpPinPolarityHigh\n |
| AnnaBridge | 165:d1b4690b3f8b | 970 | * CR4 WP4 LL_PWR_SetWakeUpPinPolarityHigh\n |
| AnnaBridge | 165:d1b4690b3f8b | 971 | * CR4 WP5 LL_PWR_SetWakeUpPinPolarityHigh |
| AnnaBridge | 165:d1b4690b3f8b | 972 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 973 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 165:d1b4690b3f8b | 974 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 165:d1b4690b3f8b | 975 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
| AnnaBridge | 165:d1b4690b3f8b | 976 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
| AnnaBridge | 165:d1b4690b3f8b | 977 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
| AnnaBridge | 165:d1b4690b3f8b | 978 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 979 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 980 | __STATIC_INLINE void LL_PWR_SetWakeUpPinPolarityHigh(uint32_t WakeUpPin) |
| AnnaBridge | 165:d1b4690b3f8b | 981 | { |
| AnnaBridge | 165:d1b4690b3f8b | 982 | CLEAR_BIT(PWR->CR4, WakeUpPin); |
| AnnaBridge | 165:d1b4690b3f8b | 983 | } |
| AnnaBridge | 165:d1b4690b3f8b | 984 | |
| AnnaBridge | 165:d1b4690b3f8b | 985 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 986 | * @brief Get the Wake-Up pin polarity for the event detection |
| AnnaBridge | 165:d1b4690b3f8b | 987 | * @rmtoll CR4 WP1 LL_PWR_IsWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 988 | * CR4 WP2 LL_PWR_IsWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 989 | * CR4 WP3 LL_PWR_IsWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 990 | * CR4 WP4 LL_PWR_IsWakeUpPinPolarityLow\n |
| AnnaBridge | 165:d1b4690b3f8b | 991 | * CR4 WP5 LL_PWR_IsWakeUpPinPolarityLow |
| AnnaBridge | 165:d1b4690b3f8b | 992 | * @param WakeUpPin This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 993 | * @arg @ref LL_PWR_WAKEUP_PIN1 |
| AnnaBridge | 165:d1b4690b3f8b | 994 | * @arg @ref LL_PWR_WAKEUP_PIN2 |
| AnnaBridge | 165:d1b4690b3f8b | 995 | * @arg @ref LL_PWR_WAKEUP_PIN3 |
| AnnaBridge | 165:d1b4690b3f8b | 996 | * @arg @ref LL_PWR_WAKEUP_PIN4 |
| AnnaBridge | 165:d1b4690b3f8b | 997 | * @arg @ref LL_PWR_WAKEUP_PIN5 |
| AnnaBridge | 165:d1b4690b3f8b | 998 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 999 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1000 | __STATIC_INLINE uint32_t LL_PWR_IsWakeUpPinPolarityLow(uint32_t WakeUpPin) |
| AnnaBridge | 165:d1b4690b3f8b | 1001 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1002 | return (READ_BIT(PWR->CR4, WakeUpPin) == (WakeUpPin)); |
| AnnaBridge | 165:d1b4690b3f8b | 1003 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1004 | |
| AnnaBridge | 165:d1b4690b3f8b | 1005 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1006 | * @brief Enable GPIO pull-up state in Standby and Shutdown modes |
| AnnaBridge | 165:d1b4690b3f8b | 1007 | * @rmtoll PUCRA PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1008 | * PUCRB PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1009 | * PUCRC PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1010 | * PUCRD PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1011 | * PUCRE PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1012 | * PUCRF PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1013 | * PUCRG PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1014 | * PUCRH PU0-15 LL_PWR_EnableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1015 | * PUCRI PU0-11 LL_PWR_EnableGPIOPullUp |
| AnnaBridge | 165:d1b4690b3f8b | 1016 | * @param GPIO This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1017 | * @arg @ref LL_PWR_GPIO_A |
| AnnaBridge | 165:d1b4690b3f8b | 1018 | * @arg @ref LL_PWR_GPIO_B |
| AnnaBridge | 165:d1b4690b3f8b | 1019 | * @arg @ref LL_PWR_GPIO_C |
| AnnaBridge | 165:d1b4690b3f8b | 1020 | * @arg @ref LL_PWR_GPIO_D |
| AnnaBridge | 165:d1b4690b3f8b | 1021 | * @arg @ref LL_PWR_GPIO_E |
| AnnaBridge | 165:d1b4690b3f8b | 1022 | * @arg @ref LL_PWR_GPIO_F (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1023 | * @arg @ref LL_PWR_GPIO_G (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1024 | * @arg @ref LL_PWR_GPIO_H |
| AnnaBridge | 165:d1b4690b3f8b | 1025 | * @arg @ref LL_PWR_GPIO_I (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1026 | * |
| AnnaBridge | 165:d1b4690b3f8b | 1027 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 1028 | * @param GPIONumber This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1029 | * @arg @ref LL_PWR_GPIO_BIT_0 |
| AnnaBridge | 165:d1b4690b3f8b | 1030 | * @arg @ref LL_PWR_GPIO_BIT_1 |
| AnnaBridge | 165:d1b4690b3f8b | 1031 | * @arg @ref LL_PWR_GPIO_BIT_2 |
| AnnaBridge | 165:d1b4690b3f8b | 1032 | * @arg @ref LL_PWR_GPIO_BIT_3 |
| AnnaBridge | 165:d1b4690b3f8b | 1033 | * @arg @ref LL_PWR_GPIO_BIT_4 |
| AnnaBridge | 165:d1b4690b3f8b | 1034 | * @arg @ref LL_PWR_GPIO_BIT_5 |
| AnnaBridge | 165:d1b4690b3f8b | 1035 | * @arg @ref LL_PWR_GPIO_BIT_6 |
| AnnaBridge | 165:d1b4690b3f8b | 1036 | * @arg @ref LL_PWR_GPIO_BIT_7 |
| AnnaBridge | 165:d1b4690b3f8b | 1037 | * @arg @ref LL_PWR_GPIO_BIT_8 |
| AnnaBridge | 165:d1b4690b3f8b | 1038 | * @arg @ref LL_PWR_GPIO_BIT_9 |
| AnnaBridge | 165:d1b4690b3f8b | 1039 | * @arg @ref LL_PWR_GPIO_BIT_10 |
| AnnaBridge | 165:d1b4690b3f8b | 1040 | * @arg @ref LL_PWR_GPIO_BIT_11 |
| AnnaBridge | 165:d1b4690b3f8b | 1041 | * @arg @ref LL_PWR_GPIO_BIT_12 |
| AnnaBridge | 165:d1b4690b3f8b | 1042 | * @arg @ref LL_PWR_GPIO_BIT_13 |
| AnnaBridge | 165:d1b4690b3f8b | 1043 | * @arg @ref LL_PWR_GPIO_BIT_14 |
| AnnaBridge | 165:d1b4690b3f8b | 1044 | * @arg @ref LL_PWR_GPIO_BIT_15 |
| AnnaBridge | 165:d1b4690b3f8b | 1045 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1046 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1047 | __STATIC_INLINE void LL_PWR_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) |
| AnnaBridge | 165:d1b4690b3f8b | 1048 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1049 | SET_BIT(*((uint32_t *)GPIO), GPIONumber); |
| AnnaBridge | 165:d1b4690b3f8b | 1050 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1051 | |
| AnnaBridge | 165:d1b4690b3f8b | 1052 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1053 | * @brief Disable GPIO pull-up state in Standby and Shutdown modes |
| AnnaBridge | 165:d1b4690b3f8b | 1054 | * @rmtoll PUCRA PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1055 | * PUCRB PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1056 | * PUCRC PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1057 | * PUCRD PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1058 | * PUCRE PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1059 | * PUCRF PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1060 | * PUCRG PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1061 | * PUCRH PU0-15 LL_PWR_DisableGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1062 | * PUCRI PU0-11 LL_PWR_DisableGPIOPullUp |
| AnnaBridge | 165:d1b4690b3f8b | 1063 | * @param GPIO This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1064 | * @arg @ref LL_PWR_GPIO_A |
| AnnaBridge | 165:d1b4690b3f8b | 1065 | * @arg @ref LL_PWR_GPIO_B |
| AnnaBridge | 165:d1b4690b3f8b | 1066 | * @arg @ref LL_PWR_GPIO_C |
| AnnaBridge | 165:d1b4690b3f8b | 1067 | * @arg @ref LL_PWR_GPIO_D |
| AnnaBridge | 165:d1b4690b3f8b | 1068 | * @arg @ref LL_PWR_GPIO_E |
| AnnaBridge | 165:d1b4690b3f8b | 1069 | * @arg @ref LL_PWR_GPIO_F (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1070 | * @arg @ref LL_PWR_GPIO_G (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1071 | * @arg @ref LL_PWR_GPIO_H |
| AnnaBridge | 165:d1b4690b3f8b | 1072 | * @arg @ref LL_PWR_GPIO_I (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1073 | * |
| AnnaBridge | 165:d1b4690b3f8b | 1074 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 1075 | * @param GPIONumber This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1076 | * @arg @ref LL_PWR_GPIO_BIT_0 |
| AnnaBridge | 165:d1b4690b3f8b | 1077 | * @arg @ref LL_PWR_GPIO_BIT_1 |
| AnnaBridge | 165:d1b4690b3f8b | 1078 | * @arg @ref LL_PWR_GPIO_BIT_2 |
| AnnaBridge | 165:d1b4690b3f8b | 1079 | * @arg @ref LL_PWR_GPIO_BIT_3 |
| AnnaBridge | 165:d1b4690b3f8b | 1080 | * @arg @ref LL_PWR_GPIO_BIT_4 |
| AnnaBridge | 165:d1b4690b3f8b | 1081 | * @arg @ref LL_PWR_GPIO_BIT_5 |
| AnnaBridge | 165:d1b4690b3f8b | 1082 | * @arg @ref LL_PWR_GPIO_BIT_6 |
| AnnaBridge | 165:d1b4690b3f8b | 1083 | * @arg @ref LL_PWR_GPIO_BIT_7 |
| AnnaBridge | 165:d1b4690b3f8b | 1084 | * @arg @ref LL_PWR_GPIO_BIT_8 |
| AnnaBridge | 165:d1b4690b3f8b | 1085 | * @arg @ref LL_PWR_GPIO_BIT_9 |
| AnnaBridge | 165:d1b4690b3f8b | 1086 | * @arg @ref LL_PWR_GPIO_BIT_10 |
| AnnaBridge | 165:d1b4690b3f8b | 1087 | * @arg @ref LL_PWR_GPIO_BIT_11 |
| AnnaBridge | 165:d1b4690b3f8b | 1088 | * @arg @ref LL_PWR_GPIO_BIT_12 |
| AnnaBridge | 165:d1b4690b3f8b | 1089 | * @arg @ref LL_PWR_GPIO_BIT_13 |
| AnnaBridge | 165:d1b4690b3f8b | 1090 | * @arg @ref LL_PWR_GPIO_BIT_14 |
| AnnaBridge | 165:d1b4690b3f8b | 1091 | * @arg @ref LL_PWR_GPIO_BIT_15 |
| AnnaBridge | 165:d1b4690b3f8b | 1092 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1093 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1094 | __STATIC_INLINE void LL_PWR_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) |
| AnnaBridge | 165:d1b4690b3f8b | 1095 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1096 | CLEAR_BIT(*((uint32_t *)GPIO), GPIONumber); |
| AnnaBridge | 165:d1b4690b3f8b | 1097 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1098 | |
| AnnaBridge | 165:d1b4690b3f8b | 1099 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1100 | * @brief Check if GPIO pull-up state is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 1101 | * @rmtoll PUCRA PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1102 | * PUCRB PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1103 | * PUCRC PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1104 | * PUCRD PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1105 | * PUCRE PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1106 | * PUCRF PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1107 | * PUCRG PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1108 | * PUCRH PU0-15 LL_PWR_IsEnabledGPIOPullUp\n |
| AnnaBridge | 165:d1b4690b3f8b | 1109 | * PUCRI PU0-11 LL_PWR_IsEnabledGPIOPullUp |
| AnnaBridge | 165:d1b4690b3f8b | 1110 | * @param GPIO This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1111 | * @arg @ref LL_PWR_GPIO_A |
| AnnaBridge | 165:d1b4690b3f8b | 1112 | * @arg @ref LL_PWR_GPIO_B |
| AnnaBridge | 165:d1b4690b3f8b | 1113 | * @arg @ref LL_PWR_GPIO_C |
| AnnaBridge | 165:d1b4690b3f8b | 1114 | * @arg @ref LL_PWR_GPIO_D |
| AnnaBridge | 165:d1b4690b3f8b | 1115 | * @arg @ref LL_PWR_GPIO_E |
| AnnaBridge | 165:d1b4690b3f8b | 1116 | * @arg @ref LL_PWR_GPIO_F (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1117 | * @arg @ref LL_PWR_GPIO_G (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1118 | * @arg @ref LL_PWR_GPIO_H |
| AnnaBridge | 165:d1b4690b3f8b | 1119 | * @arg @ref LL_PWR_GPIO_I (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1120 | * |
| AnnaBridge | 165:d1b4690b3f8b | 1121 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 1122 | * @param GPIONumber This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1123 | * @arg @ref LL_PWR_GPIO_BIT_0 |
| AnnaBridge | 165:d1b4690b3f8b | 1124 | * @arg @ref LL_PWR_GPIO_BIT_1 |
| AnnaBridge | 165:d1b4690b3f8b | 1125 | * @arg @ref LL_PWR_GPIO_BIT_2 |
| AnnaBridge | 165:d1b4690b3f8b | 1126 | * @arg @ref LL_PWR_GPIO_BIT_3 |
| AnnaBridge | 165:d1b4690b3f8b | 1127 | * @arg @ref LL_PWR_GPIO_BIT_4 |
| AnnaBridge | 165:d1b4690b3f8b | 1128 | * @arg @ref LL_PWR_GPIO_BIT_5 |
| AnnaBridge | 165:d1b4690b3f8b | 1129 | * @arg @ref LL_PWR_GPIO_BIT_6 |
| AnnaBridge | 165:d1b4690b3f8b | 1130 | * @arg @ref LL_PWR_GPIO_BIT_7 |
| AnnaBridge | 165:d1b4690b3f8b | 1131 | * @arg @ref LL_PWR_GPIO_BIT_8 |
| AnnaBridge | 165:d1b4690b3f8b | 1132 | * @arg @ref LL_PWR_GPIO_BIT_9 |
| AnnaBridge | 165:d1b4690b3f8b | 1133 | * @arg @ref LL_PWR_GPIO_BIT_10 |
| AnnaBridge | 165:d1b4690b3f8b | 1134 | * @arg @ref LL_PWR_GPIO_BIT_11 |
| AnnaBridge | 165:d1b4690b3f8b | 1135 | * @arg @ref LL_PWR_GPIO_BIT_12 |
| AnnaBridge | 165:d1b4690b3f8b | 1136 | * @arg @ref LL_PWR_GPIO_BIT_13 |
| AnnaBridge | 165:d1b4690b3f8b | 1137 | * @arg @ref LL_PWR_GPIO_BIT_14 |
| AnnaBridge | 165:d1b4690b3f8b | 1138 | * @arg @ref LL_PWR_GPIO_BIT_15 |
| AnnaBridge | 165:d1b4690b3f8b | 1139 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1140 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1141 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber) |
| AnnaBridge | 165:d1b4690b3f8b | 1142 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1143 | return (READ_BIT(*((uint32_t *)(GPIO)), GPIONumber) == (GPIONumber)); |
| AnnaBridge | 165:d1b4690b3f8b | 1144 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1145 | |
| AnnaBridge | 165:d1b4690b3f8b | 1146 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1147 | * @brief Enable GPIO pull-down state in Standby and Shutdown modes |
| AnnaBridge | 165:d1b4690b3f8b | 1148 | * @rmtoll PDCRA PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1149 | * PDCRB PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1150 | * PDCRC PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1151 | * PDCRD PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1152 | * PDCRE PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1153 | * PDCRF PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1154 | * PDCRG PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1155 | * PDCRH PD0-15 LL_PWR_EnableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1156 | * PDCRI PD0-11 LL_PWR_EnableGPIOPullDown |
| AnnaBridge | 165:d1b4690b3f8b | 1157 | * @param GPIO This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1158 | * @arg @ref LL_PWR_GPIO_A |
| AnnaBridge | 165:d1b4690b3f8b | 1159 | * @arg @ref LL_PWR_GPIO_B |
| AnnaBridge | 165:d1b4690b3f8b | 1160 | * @arg @ref LL_PWR_GPIO_C |
| AnnaBridge | 165:d1b4690b3f8b | 1161 | * @arg @ref LL_PWR_GPIO_D |
| AnnaBridge | 165:d1b4690b3f8b | 1162 | * @arg @ref LL_PWR_GPIO_E |
| AnnaBridge | 165:d1b4690b3f8b | 1163 | * @arg @ref LL_PWR_GPIO_F (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1164 | * @arg @ref LL_PWR_GPIO_G (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1165 | * @arg @ref LL_PWR_GPIO_H |
| AnnaBridge | 165:d1b4690b3f8b | 1166 | * @arg @ref LL_PWR_GPIO_I (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1167 | * |
| AnnaBridge | 165:d1b4690b3f8b | 1168 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 1169 | * @param GPIONumber This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1170 | * @arg @ref LL_PWR_GPIO_BIT_0 |
| AnnaBridge | 165:d1b4690b3f8b | 1171 | * @arg @ref LL_PWR_GPIO_BIT_1 |
| AnnaBridge | 165:d1b4690b3f8b | 1172 | * @arg @ref LL_PWR_GPIO_BIT_2 |
| AnnaBridge | 165:d1b4690b3f8b | 1173 | * @arg @ref LL_PWR_GPIO_BIT_3 |
| AnnaBridge | 165:d1b4690b3f8b | 1174 | * @arg @ref LL_PWR_GPIO_BIT_4 |
| AnnaBridge | 165:d1b4690b3f8b | 1175 | * @arg @ref LL_PWR_GPIO_BIT_5 |
| AnnaBridge | 165:d1b4690b3f8b | 1176 | * @arg @ref LL_PWR_GPIO_BIT_6 |
| AnnaBridge | 165:d1b4690b3f8b | 1177 | * @arg @ref LL_PWR_GPIO_BIT_7 |
| AnnaBridge | 165:d1b4690b3f8b | 1178 | * @arg @ref LL_PWR_GPIO_BIT_8 |
| AnnaBridge | 165:d1b4690b3f8b | 1179 | * @arg @ref LL_PWR_GPIO_BIT_9 |
| AnnaBridge | 165:d1b4690b3f8b | 1180 | * @arg @ref LL_PWR_GPIO_BIT_10 |
| AnnaBridge | 165:d1b4690b3f8b | 1181 | * @arg @ref LL_PWR_GPIO_BIT_11 |
| AnnaBridge | 165:d1b4690b3f8b | 1182 | * @arg @ref LL_PWR_GPIO_BIT_12 |
| AnnaBridge | 165:d1b4690b3f8b | 1183 | * @arg @ref LL_PWR_GPIO_BIT_13 |
| AnnaBridge | 165:d1b4690b3f8b | 1184 | * @arg @ref LL_PWR_GPIO_BIT_14 |
| AnnaBridge | 165:d1b4690b3f8b | 1185 | * @arg @ref LL_PWR_GPIO_BIT_15 |
| AnnaBridge | 165:d1b4690b3f8b | 1186 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1187 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1188 | __STATIC_INLINE void LL_PWR_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) |
| AnnaBridge | 165:d1b4690b3f8b | 1189 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1190 | register uint32_t temp = (uint32_t)(GPIO) + 4; |
| AnnaBridge | 165:d1b4690b3f8b | 1191 | SET_BIT(*((uint32_t *)(temp)), GPIONumber); |
| AnnaBridge | 165:d1b4690b3f8b | 1192 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1193 | |
| AnnaBridge | 165:d1b4690b3f8b | 1194 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1195 | * @brief Disable GPIO pull-down state in Standby and Shutdown modes |
| AnnaBridge | 165:d1b4690b3f8b | 1196 | * @rmtoll PDCRA PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1197 | * PDCRB PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1198 | * PDCRC PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1199 | * PDCRD PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1200 | * PDCRE PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1201 | * PDCRF PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1202 | * PDCRG PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1203 | * PDCRH PD0-15 LL_PWR_DisableGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1204 | * PDCRI PD0-11 LL_PWR_DisableGPIOPullDown |
| AnnaBridge | 165:d1b4690b3f8b | 1205 | * @param GPIO This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1206 | * @arg @ref LL_PWR_GPIO_A |
| AnnaBridge | 165:d1b4690b3f8b | 1207 | * @arg @ref LL_PWR_GPIO_B |
| AnnaBridge | 165:d1b4690b3f8b | 1208 | * @arg @ref LL_PWR_GPIO_C |
| AnnaBridge | 165:d1b4690b3f8b | 1209 | * @arg @ref LL_PWR_GPIO_D |
| AnnaBridge | 165:d1b4690b3f8b | 1210 | * @arg @ref LL_PWR_GPIO_E |
| AnnaBridge | 165:d1b4690b3f8b | 1211 | * @arg @ref LL_PWR_GPIO_F (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1212 | * @arg @ref LL_PWR_GPIO_G (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1213 | * @arg @ref LL_PWR_GPIO_H |
| AnnaBridge | 165:d1b4690b3f8b | 1214 | * @arg @ref LL_PWR_GPIO_I (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1215 | * |
| AnnaBridge | 165:d1b4690b3f8b | 1216 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 1217 | * @param GPIONumber This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1218 | * @arg @ref LL_PWR_GPIO_BIT_0 |
| AnnaBridge | 165:d1b4690b3f8b | 1219 | * @arg @ref LL_PWR_GPIO_BIT_1 |
| AnnaBridge | 165:d1b4690b3f8b | 1220 | * @arg @ref LL_PWR_GPIO_BIT_2 |
| AnnaBridge | 165:d1b4690b3f8b | 1221 | * @arg @ref LL_PWR_GPIO_BIT_3 |
| AnnaBridge | 165:d1b4690b3f8b | 1222 | * @arg @ref LL_PWR_GPIO_BIT_4 |
| AnnaBridge | 165:d1b4690b3f8b | 1223 | * @arg @ref LL_PWR_GPIO_BIT_5 |
| AnnaBridge | 165:d1b4690b3f8b | 1224 | * @arg @ref LL_PWR_GPIO_BIT_6 |
| AnnaBridge | 165:d1b4690b3f8b | 1225 | * @arg @ref LL_PWR_GPIO_BIT_7 |
| AnnaBridge | 165:d1b4690b3f8b | 1226 | * @arg @ref LL_PWR_GPIO_BIT_8 |
| AnnaBridge | 165:d1b4690b3f8b | 1227 | * @arg @ref LL_PWR_GPIO_BIT_9 |
| AnnaBridge | 165:d1b4690b3f8b | 1228 | * @arg @ref LL_PWR_GPIO_BIT_10 |
| AnnaBridge | 165:d1b4690b3f8b | 1229 | * @arg @ref LL_PWR_GPIO_BIT_11 |
| AnnaBridge | 165:d1b4690b3f8b | 1230 | * @arg @ref LL_PWR_GPIO_BIT_12 |
| AnnaBridge | 165:d1b4690b3f8b | 1231 | * @arg @ref LL_PWR_GPIO_BIT_13 |
| AnnaBridge | 165:d1b4690b3f8b | 1232 | * @arg @ref LL_PWR_GPIO_BIT_14 |
| AnnaBridge | 165:d1b4690b3f8b | 1233 | * @arg @ref LL_PWR_GPIO_BIT_15 |
| AnnaBridge | 165:d1b4690b3f8b | 1234 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1235 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1236 | __STATIC_INLINE void LL_PWR_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) |
| AnnaBridge | 165:d1b4690b3f8b | 1237 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1238 | register uint32_t temp = (uint32_t)(GPIO) + 4; |
| AnnaBridge | 165:d1b4690b3f8b | 1239 | CLEAR_BIT(*((uint32_t *)(temp)), GPIONumber); |
| AnnaBridge | 165:d1b4690b3f8b | 1240 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1241 | |
| AnnaBridge | 165:d1b4690b3f8b | 1242 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1243 | * @brief Check if GPIO pull-down state is enabled |
| AnnaBridge | 165:d1b4690b3f8b | 1244 | * @rmtoll PDCRA PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1245 | * PDCRB PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1246 | * PDCRC PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1247 | * PDCRD PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1248 | * PDCRE PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1249 | * PDCRF PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1250 | * PDCRG PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1251 | * PDCRH PD0-15 LL_PWR_IsEnabledGPIOPullDown\n |
| AnnaBridge | 165:d1b4690b3f8b | 1252 | * PDCRI PD0-11 LL_PWR_IsEnabledGPIOPullDown |
| AnnaBridge | 165:d1b4690b3f8b | 1253 | * @param GPIO This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1254 | * @arg @ref LL_PWR_GPIO_A |
| AnnaBridge | 165:d1b4690b3f8b | 1255 | * @arg @ref LL_PWR_GPIO_B |
| AnnaBridge | 165:d1b4690b3f8b | 1256 | * @arg @ref LL_PWR_GPIO_C |
| AnnaBridge | 165:d1b4690b3f8b | 1257 | * @arg @ref LL_PWR_GPIO_D |
| AnnaBridge | 165:d1b4690b3f8b | 1258 | * @arg @ref LL_PWR_GPIO_E |
| AnnaBridge | 165:d1b4690b3f8b | 1259 | * @arg @ref LL_PWR_GPIO_F (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1260 | * @arg @ref LL_PWR_GPIO_G (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1261 | * @arg @ref LL_PWR_GPIO_H |
| AnnaBridge | 165:d1b4690b3f8b | 1262 | * @arg @ref LL_PWR_GPIO_I (*) |
| AnnaBridge | 165:d1b4690b3f8b | 1263 | * |
| AnnaBridge | 165:d1b4690b3f8b | 1264 | * (*) value not defined in all devices |
| AnnaBridge | 165:d1b4690b3f8b | 1265 | * @param GPIONumber This parameter can be one of the following values: |
| AnnaBridge | 165:d1b4690b3f8b | 1266 | * @arg @ref LL_PWR_GPIO_BIT_0 |
| AnnaBridge | 165:d1b4690b3f8b | 1267 | * @arg @ref LL_PWR_GPIO_BIT_1 |
| AnnaBridge | 165:d1b4690b3f8b | 1268 | * @arg @ref LL_PWR_GPIO_BIT_2 |
| AnnaBridge | 165:d1b4690b3f8b | 1269 | * @arg @ref LL_PWR_GPIO_BIT_3 |
| AnnaBridge | 165:d1b4690b3f8b | 1270 | * @arg @ref LL_PWR_GPIO_BIT_4 |
| AnnaBridge | 165:d1b4690b3f8b | 1271 | * @arg @ref LL_PWR_GPIO_BIT_5 |
| AnnaBridge | 165:d1b4690b3f8b | 1272 | * @arg @ref LL_PWR_GPIO_BIT_6 |
| AnnaBridge | 165:d1b4690b3f8b | 1273 | * @arg @ref LL_PWR_GPIO_BIT_7 |
| AnnaBridge | 165:d1b4690b3f8b | 1274 | * @arg @ref LL_PWR_GPIO_BIT_8 |
| AnnaBridge | 165:d1b4690b3f8b | 1275 | * @arg @ref LL_PWR_GPIO_BIT_9 |
| AnnaBridge | 165:d1b4690b3f8b | 1276 | * @arg @ref LL_PWR_GPIO_BIT_10 |
| AnnaBridge | 165:d1b4690b3f8b | 1277 | * @arg @ref LL_PWR_GPIO_BIT_11 |
| AnnaBridge | 165:d1b4690b3f8b | 1278 | * @arg @ref LL_PWR_GPIO_BIT_12 |
| AnnaBridge | 165:d1b4690b3f8b | 1279 | * @arg @ref LL_PWR_GPIO_BIT_13 |
| AnnaBridge | 165:d1b4690b3f8b | 1280 | * @arg @ref LL_PWR_GPIO_BIT_14 |
| AnnaBridge | 165:d1b4690b3f8b | 1281 | * @arg @ref LL_PWR_GPIO_BIT_15 |
| AnnaBridge | 165:d1b4690b3f8b | 1282 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1283 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1284 | __STATIC_INLINE uint32_t LL_PWR_IsEnabledGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber) |
| AnnaBridge | 165:d1b4690b3f8b | 1285 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1286 | register uint32_t temp = (uint32_t)(GPIO) + 4; |
| AnnaBridge | 165:d1b4690b3f8b | 1287 | return (READ_BIT(*((uint32_t *)(temp)), GPIONumber) == (GPIONumber)); |
| AnnaBridge | 165:d1b4690b3f8b | 1288 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1289 | |
| AnnaBridge | 165:d1b4690b3f8b | 1290 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1291 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1292 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1293 | |
| AnnaBridge | 165:d1b4690b3f8b | 1294 | /** @defgroup PWR_LL_EF_FLAG_Management FLAG_Management |
| AnnaBridge | 165:d1b4690b3f8b | 1295 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 1296 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1297 | |
| AnnaBridge | 165:d1b4690b3f8b | 1298 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1299 | * @brief Get Internal Wake-up line Flag |
| AnnaBridge | 165:d1b4690b3f8b | 1300 | * @rmtoll SR1 WUFI LL_PWR_IsActiveFlag_InternWU |
| AnnaBridge | 165:d1b4690b3f8b | 1301 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1302 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1303 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_InternWU(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1304 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1305 | return (READ_BIT(PWR->SR1, PWR_SR1_WUFI) == (PWR_SR1_WUFI)); |
| AnnaBridge | 165:d1b4690b3f8b | 1306 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1307 | |
| AnnaBridge | 165:d1b4690b3f8b | 1308 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1309 | * @brief Get Stand-By Flag |
| AnnaBridge | 165:d1b4690b3f8b | 1310 | * @rmtoll SR1 SBF LL_PWR_IsActiveFlag_SB |
| AnnaBridge | 165:d1b4690b3f8b | 1311 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1312 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1313 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SB(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1314 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1315 | return (READ_BIT(PWR->SR1, PWR_SR1_SBF) == (PWR_SR1_SBF)); |
| AnnaBridge | 165:d1b4690b3f8b | 1316 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1317 | |
| AnnaBridge | 165:d1b4690b3f8b | 1318 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1319 | * @brief Get Wake-up Flag 5 |
| AnnaBridge | 165:d1b4690b3f8b | 1320 | * @rmtoll SR1 WUF5 LL_PWR_IsActiveFlag_WU5 |
| AnnaBridge | 165:d1b4690b3f8b | 1321 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1322 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1323 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU5(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1324 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1325 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF5) == (PWR_SR1_WUF5)); |
| AnnaBridge | 165:d1b4690b3f8b | 1326 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1327 | |
| AnnaBridge | 165:d1b4690b3f8b | 1328 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1329 | * @brief Get Wake-up Flag 4 |
| AnnaBridge | 165:d1b4690b3f8b | 1330 | * @rmtoll SR1 WUF4 LL_PWR_IsActiveFlag_WU4 |
| AnnaBridge | 165:d1b4690b3f8b | 1331 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1332 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1333 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU4(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1334 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1335 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF4) == (PWR_SR1_WUF4)); |
| AnnaBridge | 165:d1b4690b3f8b | 1336 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1337 | |
| AnnaBridge | 165:d1b4690b3f8b | 1338 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1339 | * @brief Get Wake-up Flag 3 |
| AnnaBridge | 165:d1b4690b3f8b | 1340 | * @rmtoll SR1 WUF3 LL_PWR_IsActiveFlag_WU3 |
| AnnaBridge | 165:d1b4690b3f8b | 1341 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1342 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1343 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU3(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1344 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1345 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF3) == (PWR_SR1_WUF3)); |
| AnnaBridge | 165:d1b4690b3f8b | 1346 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1347 | |
| AnnaBridge | 165:d1b4690b3f8b | 1348 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1349 | * @brief Get Wake-up Flag 2 |
| AnnaBridge | 165:d1b4690b3f8b | 1350 | * @rmtoll SR1 WUF2 LL_PWR_IsActiveFlag_WU2 |
| AnnaBridge | 165:d1b4690b3f8b | 1351 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1352 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1353 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU2(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1354 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1355 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF2) == (PWR_SR1_WUF2)); |
| AnnaBridge | 165:d1b4690b3f8b | 1356 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1357 | |
| AnnaBridge | 165:d1b4690b3f8b | 1358 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1359 | * @brief Get Wake-up Flag 1 |
| AnnaBridge | 165:d1b4690b3f8b | 1360 | * @rmtoll SR1 WUF1 LL_PWR_IsActiveFlag_WU1 |
| AnnaBridge | 165:d1b4690b3f8b | 1361 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1362 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1363 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU1(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1364 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1365 | return (READ_BIT(PWR->SR1, PWR_SR1_WUF1) == (PWR_SR1_WUF1)); |
| AnnaBridge | 165:d1b4690b3f8b | 1366 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1367 | |
| AnnaBridge | 165:d1b4690b3f8b | 1368 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1369 | * @brief Clear Stand-By Flag |
| AnnaBridge | 165:d1b4690b3f8b | 1370 | * @rmtoll SCR CSBF LL_PWR_ClearFlag_SB |
| AnnaBridge | 165:d1b4690b3f8b | 1371 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1372 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1373 | __STATIC_INLINE void LL_PWR_ClearFlag_SB(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1374 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1375 | WRITE_REG(PWR->SCR, PWR_SCR_CSBF); |
| AnnaBridge | 165:d1b4690b3f8b | 1376 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1377 | |
| AnnaBridge | 165:d1b4690b3f8b | 1378 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1379 | * @brief Clear Wake-up Flags |
| AnnaBridge | 165:d1b4690b3f8b | 1380 | * @rmtoll SCR CWUF LL_PWR_ClearFlag_WU |
| AnnaBridge | 165:d1b4690b3f8b | 1381 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1382 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1383 | __STATIC_INLINE void LL_PWR_ClearFlag_WU(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1384 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1385 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF); |
| AnnaBridge | 165:d1b4690b3f8b | 1386 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1387 | |
| AnnaBridge | 165:d1b4690b3f8b | 1388 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1389 | * @brief Clear Wake-up Flag 5 |
| AnnaBridge | 165:d1b4690b3f8b | 1390 | * @rmtoll SCR CWUF5 LL_PWR_ClearFlag_WU5 |
| AnnaBridge | 165:d1b4690b3f8b | 1391 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1392 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1393 | __STATIC_INLINE void LL_PWR_ClearFlag_WU5(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1394 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1395 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF5); |
| AnnaBridge | 165:d1b4690b3f8b | 1396 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1397 | |
| AnnaBridge | 165:d1b4690b3f8b | 1398 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1399 | * @brief Clear Wake-up Flag 4 |
| AnnaBridge | 165:d1b4690b3f8b | 1400 | * @rmtoll SCR CWUF4 LL_PWR_ClearFlag_WU4 |
| AnnaBridge | 165:d1b4690b3f8b | 1401 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1402 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1403 | __STATIC_INLINE void LL_PWR_ClearFlag_WU4(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1404 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1405 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF4); |
| AnnaBridge | 165:d1b4690b3f8b | 1406 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1407 | |
| AnnaBridge | 165:d1b4690b3f8b | 1408 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1409 | * @brief Clear Wake-up Flag 3 |
| AnnaBridge | 165:d1b4690b3f8b | 1410 | * @rmtoll SCR CWUF3 LL_PWR_ClearFlag_WU3 |
| AnnaBridge | 165:d1b4690b3f8b | 1411 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1412 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1413 | __STATIC_INLINE void LL_PWR_ClearFlag_WU3(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1414 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1415 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF3); |
| AnnaBridge | 165:d1b4690b3f8b | 1416 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1417 | |
| AnnaBridge | 165:d1b4690b3f8b | 1418 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1419 | * @brief Clear Wake-up Flag 2 |
| AnnaBridge | 165:d1b4690b3f8b | 1420 | * @rmtoll SCR CWUF2 LL_PWR_ClearFlag_WU2 |
| AnnaBridge | 165:d1b4690b3f8b | 1421 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1422 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1423 | __STATIC_INLINE void LL_PWR_ClearFlag_WU2(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1424 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1425 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF2); |
| AnnaBridge | 165:d1b4690b3f8b | 1426 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1427 | |
| AnnaBridge | 165:d1b4690b3f8b | 1428 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1429 | * @brief Clear Wake-up Flag 1 |
| AnnaBridge | 165:d1b4690b3f8b | 1430 | * @rmtoll SCR CWUF1 LL_PWR_ClearFlag_WU1 |
| AnnaBridge | 165:d1b4690b3f8b | 1431 | * @retval None |
| AnnaBridge | 165:d1b4690b3f8b | 1432 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1433 | __STATIC_INLINE void LL_PWR_ClearFlag_WU1(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1434 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1435 | WRITE_REG(PWR->SCR, PWR_SCR_CWUF1); |
| AnnaBridge | 165:d1b4690b3f8b | 1436 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1437 | |
| AnnaBridge | 165:d1b4690b3f8b | 1438 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1439 | * @brief Indicate whether VDDA voltage is below or above PVM4 threshold |
| AnnaBridge | 165:d1b4690b3f8b | 1440 | * @rmtoll SR2 PVMO4 LL_PWR_IsActiveFlag_PVMO4 |
| AnnaBridge | 165:d1b4690b3f8b | 1441 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1442 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1443 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO4(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1444 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1445 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO4) == (PWR_SR2_PVMO4)); |
| AnnaBridge | 165:d1b4690b3f8b | 1446 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1447 | |
| AnnaBridge | 165:d1b4690b3f8b | 1448 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1449 | * @brief Indicate whether VDDA voltage is below or above PVM3 threshold |
| AnnaBridge | 165:d1b4690b3f8b | 1450 | * @rmtoll SR2 PVMO3 LL_PWR_IsActiveFlag_PVMO3 |
| AnnaBridge | 165:d1b4690b3f8b | 1451 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1452 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1453 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO3(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1454 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1455 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO3) == (PWR_SR2_PVMO3)); |
| AnnaBridge | 165:d1b4690b3f8b | 1456 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1457 | |
| AnnaBridge | 165:d1b4690b3f8b | 1458 | #if defined(PWR_SR2_PVMO2) |
| AnnaBridge | 165:d1b4690b3f8b | 1459 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1460 | * @brief Indicate whether VDDIO2 voltage is below or above PVM2 threshold |
| AnnaBridge | 165:d1b4690b3f8b | 1461 | * @rmtoll SR2 PVMO2 LL_PWR_IsActiveFlag_PVMO2 |
| AnnaBridge | 165:d1b4690b3f8b | 1462 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1463 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1464 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO2(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1465 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1466 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO2) == (PWR_SR2_PVMO2)); |
| AnnaBridge | 165:d1b4690b3f8b | 1467 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1468 | #endif /* PWR_SR2_PVMO2 */ |
| AnnaBridge | 165:d1b4690b3f8b | 1469 | |
| AnnaBridge | 165:d1b4690b3f8b | 1470 | #if defined(PWR_SR2_PVMO1) |
| AnnaBridge | 165:d1b4690b3f8b | 1471 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1472 | * @brief Indicate whether VDDUSB voltage is below or above PVM1 threshold |
| AnnaBridge | 165:d1b4690b3f8b | 1473 | * @rmtoll SR2 PVMO1 LL_PWR_IsActiveFlag_PVMO1 |
| AnnaBridge | 165:d1b4690b3f8b | 1474 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1475 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1476 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVMO1(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1477 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1478 | return (READ_BIT(PWR->SR2, PWR_SR2_PVMO1) == (PWR_SR2_PVMO1)); |
| AnnaBridge | 165:d1b4690b3f8b | 1479 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1480 | #endif /* PWR_SR2_PVMO1 */ |
| AnnaBridge | 165:d1b4690b3f8b | 1481 | |
| AnnaBridge | 165:d1b4690b3f8b | 1482 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1483 | * @brief Indicate whether VDD voltage is below or above the selected PVD threshold |
| AnnaBridge | 165:d1b4690b3f8b | 1484 | * @rmtoll SR2 PVDO LL_PWR_IsActiveFlag_PVDO |
| AnnaBridge | 165:d1b4690b3f8b | 1485 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1486 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1487 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1488 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1489 | return (READ_BIT(PWR->SR2, PWR_SR2_PVDO) == (PWR_SR2_PVDO)); |
| AnnaBridge | 165:d1b4690b3f8b | 1490 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1491 | |
| AnnaBridge | 165:d1b4690b3f8b | 1492 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1493 | * @brief Indicate whether the regulator is ready in the selected voltage range or if its output voltage is still changing to the required voltage level |
| AnnaBridge | 165:d1b4690b3f8b | 1494 | * @rmtoll SR2 VOSF LL_PWR_IsActiveFlag_VOS |
| AnnaBridge | 165:d1b4690b3f8b | 1495 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1496 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1497 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1498 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1499 | return (READ_BIT(PWR->SR2, PWR_SR2_VOSF) == (PWR_SR2_VOSF)); |
| AnnaBridge | 165:d1b4690b3f8b | 1500 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1501 | |
| AnnaBridge | 165:d1b4690b3f8b | 1502 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1503 | * @brief Indicate whether the regulator is ready in main mode or is in low-power mode |
| AnnaBridge | 165:d1b4690b3f8b | 1504 | * @note Take care, return value "0" means the regulator is ready. Return value "1" means the output voltage range is still changing. |
| AnnaBridge | 165:d1b4690b3f8b | 1505 | * @rmtoll SR2 REGLPF LL_PWR_IsActiveFlag_REGLPF |
| AnnaBridge | 165:d1b4690b3f8b | 1506 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1507 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1508 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPF(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1509 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1510 | return (READ_BIT(PWR->SR2, PWR_SR2_REGLPF) == (PWR_SR2_REGLPF)); |
| AnnaBridge | 165:d1b4690b3f8b | 1511 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1512 | |
| AnnaBridge | 165:d1b4690b3f8b | 1513 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1514 | * @brief Indicate whether or not the low-power regulator is ready |
| AnnaBridge | 165:d1b4690b3f8b | 1515 | * @rmtoll SR2 REGLPS LL_PWR_IsActiveFlag_REGLPS |
| AnnaBridge | 165:d1b4690b3f8b | 1516 | * @retval State of bit (1 or 0). |
| AnnaBridge | 165:d1b4690b3f8b | 1517 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1518 | __STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_REGLPS(void) |
| AnnaBridge | 165:d1b4690b3f8b | 1519 | { |
| AnnaBridge | 165:d1b4690b3f8b | 1520 | return (READ_BIT(PWR->SR2, PWR_SR2_REGLPS) == (PWR_SR2_REGLPS)); |
| AnnaBridge | 165:d1b4690b3f8b | 1521 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1522 | |
| AnnaBridge | 165:d1b4690b3f8b | 1523 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1524 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1525 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1526 | |
| AnnaBridge | 165:d1b4690b3f8b | 1527 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 165:d1b4690b3f8b | 1528 | /** @defgroup PWR_LL_EF_Init De-initialization function |
| AnnaBridge | 165:d1b4690b3f8b | 1529 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 1530 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1531 | ErrorStatus LL_PWR_DeInit(void); |
| AnnaBridge | 165:d1b4690b3f8b | 1532 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1533 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1534 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1535 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 165:d1b4690b3f8b | 1536 | |
| AnnaBridge | 165:d1b4690b3f8b | 1537 | /** @defgroup PWR_LL_EF_Legacy_Functions Legacy functions name |
| AnnaBridge | 165:d1b4690b3f8b | 1538 | * @{ |
| AnnaBridge | 165:d1b4690b3f8b | 1539 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1540 | /* Old functions name kept for legacy purpose, to be replaced by the */ |
| AnnaBridge | 165:d1b4690b3f8b | 1541 | /* current functions name. */ |
| AnnaBridge | 165:d1b4690b3f8b | 1542 | #define LL_PWR_IsActiveFlag_VOSF LL_PWR_IsActiveFlag_VOS |
| AnnaBridge | 165:d1b4690b3f8b | 1543 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1544 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1545 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1546 | |
| AnnaBridge | 165:d1b4690b3f8b | 1547 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1548 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1549 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1550 | |
| AnnaBridge | 165:d1b4690b3f8b | 1551 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1552 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1553 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1554 | |
| AnnaBridge | 165:d1b4690b3f8b | 1555 | #endif /* defined(PWR) */ |
| AnnaBridge | 165:d1b4690b3f8b | 1556 | |
| AnnaBridge | 165:d1b4690b3f8b | 1557 | /** |
| AnnaBridge | 165:d1b4690b3f8b | 1558 | * @} |
| AnnaBridge | 165:d1b4690b3f8b | 1559 | */ |
| AnnaBridge | 165:d1b4690b3f8b | 1560 | |
| AnnaBridge | 165:d1b4690b3f8b | 1561 | #ifdef __cplusplus |
| AnnaBridge | 165:d1b4690b3f8b | 1562 | } |
| AnnaBridge | 165:d1b4690b3f8b | 1563 | #endif |
| AnnaBridge | 165:d1b4690b3f8b | 1564 | |
| AnnaBridge | 165:d1b4690b3f8b | 1565 | #endif /* __STM32L4xx_LL_PWR_H */ |
| AnnaBridge | 165:d1b4690b3f8b | 1566 | |
| AnnaBridge | 165:d1b4690b3f8b | 1567 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
