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TARGET_NUCLEO_L011K4/TOOLCHAIN_ARM_MICRO/stm32l0xx_ll_adc.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc
Parent:: TARGET_NUCLEO_L011K4/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_adc.h@167:84c0a372a020

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	157:e7ca05fa8600	1	/**
AnnaBridge	157:e7ca05fa8600	2	******************************************************************************
AnnaBridge	157:e7ca05fa8600	3	* @file stm32l0xx_ll_adc.h
AnnaBridge	157:e7ca05fa8600	4	* @author MCD Application Team
AnnaBridge	157:e7ca05fa8600	5	* @brief Header file of ADC LL module.
AnnaBridge	157:e7ca05fa8600	6	******************************************************************************
AnnaBridge	157:e7ca05fa8600	7	* @attention
AnnaBridge	157:e7ca05fa8600	8	*
AnnaBridge	157:e7ca05fa8600	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	157:e7ca05fa8600	10	*
AnnaBridge	157:e7ca05fa8600	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	157:e7ca05fa8600	12	* are permitted provided that the following conditions are met:
AnnaBridge	157:e7ca05fa8600	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	157:e7ca05fa8600	14	* this list of conditions and the following disclaimer.
AnnaBridge	157:e7ca05fa8600	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	157:e7ca05fa8600	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	157:e7ca05fa8600	17	* and/or other materials provided with the distribution.
AnnaBridge	157:e7ca05fa8600	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	157:e7ca05fa8600	19	* may be used to endorse or promote products derived from this software
AnnaBridge	157:e7ca05fa8600	20	* without specific prior written permission.
AnnaBridge	157:e7ca05fa8600	21	*
AnnaBridge	157:e7ca05fa8600	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	157:e7ca05fa8600	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	157:e7ca05fa8600	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	157:e7ca05fa8600	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	157:e7ca05fa8600	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	157:e7ca05fa8600	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	157:e7ca05fa8600	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	157:e7ca05fa8600	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	157:e7ca05fa8600	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	157:e7ca05fa8600	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	157:e7ca05fa8600	32	*
AnnaBridge	157:e7ca05fa8600	33	******************************************************************************
AnnaBridge	157:e7ca05fa8600	34	*/
AnnaBridge	157:e7ca05fa8600	35
AnnaBridge	157:e7ca05fa8600	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	157:e7ca05fa8600	37	#ifndef __STM32L0xx_LL_ADC_H
AnnaBridge	157:e7ca05fa8600	38	#define __STM32L0xx_LL_ADC_H
AnnaBridge	157:e7ca05fa8600	39
AnnaBridge	157:e7ca05fa8600	40	#ifdef __cplusplus
AnnaBridge	157:e7ca05fa8600	41	extern "C" {
AnnaBridge	157:e7ca05fa8600	42	#endif
AnnaBridge	157:e7ca05fa8600	43
AnnaBridge	157:e7ca05fa8600	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	45	#include "stm32l0xx.h"
AnnaBridge	157:e7ca05fa8600	46
AnnaBridge	157:e7ca05fa8600	47	/** @addtogroup STM32L0xx_LL_Driver
AnnaBridge	157:e7ca05fa8600	48	* @{
AnnaBridge	157:e7ca05fa8600	49	*/
AnnaBridge	157:e7ca05fa8600	50
AnnaBridge	157:e7ca05fa8600	51	#if defined (ADC1)
AnnaBridge	157:e7ca05fa8600	52
AnnaBridge	157:e7ca05fa8600	53	/** @defgroup ADC_LL ADC
AnnaBridge	157:e7ca05fa8600	54	* @{
AnnaBridge	157:e7ca05fa8600	55	*/
AnnaBridge	157:e7ca05fa8600	56
AnnaBridge	157:e7ca05fa8600	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	59
AnnaBridge	157:e7ca05fa8600	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	61	/** @defgroup ADC_LL_Private_Constants ADC Private Constants
AnnaBridge	157:e7ca05fa8600	62	* @{
AnnaBridge	157:e7ca05fa8600	63	*/
AnnaBridge	157:e7ca05fa8600	64
AnnaBridge	157:e7ca05fa8600	65	/* Internal mask for ADC group regular trigger: */
AnnaBridge	157:e7ca05fa8600	66	/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
AnnaBridge	157:e7ca05fa8600	67	/* - regular trigger source */
AnnaBridge	157:e7ca05fa8600	68	/* - regular trigger edge */
AnnaBridge	157:e7ca05fa8600	69	#define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
AnnaBridge	157:e7ca05fa8600	70
AnnaBridge	157:e7ca05fa8600	71	/* Mask containing trigger source masks for each of possible */
AnnaBridge	157:e7ca05fa8600	72	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	157:e7ca05fa8600	73	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	157:e7ca05fa8600	74	#define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTSEL) << (4U * 0U)) \| \
AnnaBridge	157:e7ca05fa8600	75	((ADC_CFGR1_EXTSEL) << (4U * 1U)) \| \
AnnaBridge	157:e7ca05fa8600	76	((ADC_CFGR1_EXTSEL) << (4U * 2U)) \| \
AnnaBridge	157:e7ca05fa8600	77	((ADC_CFGR1_EXTSEL) << (4U * 3U)) )
AnnaBridge	157:e7ca05fa8600	78
AnnaBridge	157:e7ca05fa8600	79	/* Mask containing trigger edge masks for each of possible */
AnnaBridge	157:e7ca05fa8600	80	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	157:e7ca05fa8600	81	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	157:e7ca05fa8600	82	#define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * 0U)) \| \
AnnaBridge	157:e7ca05fa8600	83	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
AnnaBridge	157:e7ca05fa8600	84	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
AnnaBridge	157:e7ca05fa8600	85	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
AnnaBridge	157:e7ca05fa8600	86
AnnaBridge	157:e7ca05fa8600	87	/* Definition of ADC group regular trigger bits information. */
AnnaBridge	157:e7ca05fa8600	88	#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTSEL) */
AnnaBridge	157:e7ca05fa8600	89	#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTEN) */
AnnaBridge	157:e7ca05fa8600	90
AnnaBridge	157:e7ca05fa8600	91
AnnaBridge	157:e7ca05fa8600	92
AnnaBridge	157:e7ca05fa8600	93	/* Internal mask for ADC channel: */
AnnaBridge	157:e7ca05fa8600	94	/* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
AnnaBridge	157:e7ca05fa8600	95	/* - channel identifier defined by number */
AnnaBridge	157:e7ca05fa8600	96	/* - channel identifier defined by bitfield */
AnnaBridge	157:e7ca05fa8600	97	/* - channel differentiation between external channels (connected to */
AnnaBridge	157:e7ca05fa8600	98	/* GPIO pins) and internal channels (connected to internal paths) */
AnnaBridge	157:e7ca05fa8600	99	#define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR1_AWDCH)
AnnaBridge	157:e7ca05fa8600	100	#define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
AnnaBridge	157:e7ca05fa8600	101	#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS ((uint32_t)26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
AnnaBridge	157:e7ca05fa8600	102	#define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK \| ADC_CHANNEL_ID_BITFIELD_MASK \| ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	157:e7ca05fa8600	103	/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
AnnaBridge	157:e7ca05fa8600	104	#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 ((uint32_t)0x0000001FU) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
AnnaBridge	157:e7ca05fa8600	105
AnnaBridge	157:e7ca05fa8600	106	/* Channel differentiation between external and internal channels */
AnnaBridge	157:e7ca05fa8600	107	#define ADC_CHANNEL_ID_INTERNAL_CH ((uint32_t)0x80000000U) /* Marker of internal channel */
AnnaBridge	157:e7ca05fa8600	108	#define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH)
AnnaBridge	157:e7ca05fa8600	109
AnnaBridge	157:e7ca05fa8600	110	/* Definition of channels ID number information to be inserted into */
AnnaBridge	157:e7ca05fa8600	111	/* channels literals definition. */
AnnaBridge	157:e7ca05fa8600	112	#define ADC_CHANNEL_0_NUMBER ((uint32_t)0x00000000U)
AnnaBridge	157:e7ca05fa8600	113	#define ADC_CHANNEL_1_NUMBER ( ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	114	#define ADC_CHANNEL_2_NUMBER ( ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	115	#define ADC_CHANNEL_3_NUMBER ( ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	116	#define ADC_CHANNEL_4_NUMBER ( ADC_CFGR1_AWDCH_2 )
AnnaBridge	157:e7ca05fa8600	117	#define ADC_CHANNEL_5_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	118	#define ADC_CHANNEL_6_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	119	#define ADC_CHANNEL_7_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	120	#define ADC_CHANNEL_8_NUMBER ( ADC_CFGR1_AWDCH_3 )
AnnaBridge	157:e7ca05fa8600	121	#define ADC_CHANNEL_9_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	122	#define ADC_CHANNEL_10_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	123	#define ADC_CHANNEL_11_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	124	#define ADC_CHANNEL_12_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 )
AnnaBridge	157:e7ca05fa8600	125	#define ADC_CHANNEL_13_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	126	#define ADC_CHANNEL_14_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	127	#define ADC_CHANNEL_15_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	128	#define ADC_CHANNEL_16_NUMBER (ADC_CFGR1_AWDCH_4 )
AnnaBridge	157:e7ca05fa8600	129	#define ADC_CHANNEL_17_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	130	#define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	131
AnnaBridge	157:e7ca05fa8600	132	/* Definition of channels ID bitfield information to be inserted into */
AnnaBridge	157:e7ca05fa8600	133	/* channels literals definition. */
AnnaBridge	157:e7ca05fa8600	134	#define ADC_CHANNEL_0_BITFIELD (ADC_CHSELR_CHSEL0)
AnnaBridge	157:e7ca05fa8600	135	#define ADC_CHANNEL_1_BITFIELD (ADC_CHSELR_CHSEL1)
AnnaBridge	157:e7ca05fa8600	136	#define ADC_CHANNEL_2_BITFIELD (ADC_CHSELR_CHSEL2)
AnnaBridge	157:e7ca05fa8600	137	#define ADC_CHANNEL_3_BITFIELD (ADC_CHSELR_CHSEL3)
AnnaBridge	157:e7ca05fa8600	138	#define ADC_CHANNEL_4_BITFIELD (ADC_CHSELR_CHSEL4)
AnnaBridge	157:e7ca05fa8600	139	#define ADC_CHANNEL_5_BITFIELD (ADC_CHSELR_CHSEL5)
AnnaBridge	157:e7ca05fa8600	140	#define ADC_CHANNEL_6_BITFIELD (ADC_CHSELR_CHSEL6)
AnnaBridge	157:e7ca05fa8600	141	#define ADC_CHANNEL_7_BITFIELD (ADC_CHSELR_CHSEL7)
AnnaBridge	157:e7ca05fa8600	142	#define ADC_CHANNEL_8_BITFIELD (ADC_CHSELR_CHSEL8)
AnnaBridge	157:e7ca05fa8600	143	#define ADC_CHANNEL_9_BITFIELD (ADC_CHSELR_CHSEL9)
AnnaBridge	157:e7ca05fa8600	144	#define ADC_CHANNEL_10_BITFIELD (ADC_CHSELR_CHSEL10)
AnnaBridge	157:e7ca05fa8600	145	#define ADC_CHANNEL_11_BITFIELD (ADC_CHSELR_CHSEL11)
AnnaBridge	157:e7ca05fa8600	146	#define ADC_CHANNEL_12_BITFIELD (ADC_CHSELR_CHSEL12)
AnnaBridge	157:e7ca05fa8600	147	#define ADC_CHANNEL_13_BITFIELD (ADC_CHSELR_CHSEL13)
AnnaBridge	157:e7ca05fa8600	148	#define ADC_CHANNEL_14_BITFIELD (ADC_CHSELR_CHSEL14)
AnnaBridge	157:e7ca05fa8600	149	#define ADC_CHANNEL_15_BITFIELD (ADC_CHSELR_CHSEL15)
AnnaBridge	157:e7ca05fa8600	150	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	151	#define ADC_CHANNEL_16_BITFIELD (ADC_CHSELR_CHSEL16)
AnnaBridge	157:e7ca05fa8600	152	#endif
AnnaBridge	157:e7ca05fa8600	153	#define ADC_CHANNEL_17_BITFIELD (ADC_CHSELR_CHSEL17)
AnnaBridge	157:e7ca05fa8600	154	#define ADC_CHANNEL_18_BITFIELD (ADC_CHSELR_CHSEL18)
AnnaBridge	157:e7ca05fa8600	155
AnnaBridge	157:e7ca05fa8600	156	/* Internal mask for ADC analog watchdog: */
AnnaBridge	157:e7ca05fa8600	157	/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
AnnaBridge	157:e7ca05fa8600	158	/* (concatenation of multiple bits used in different analog watchdogs, */
AnnaBridge	157:e7ca05fa8600	159	/* (feature of several watchdogs not available on all STM32 families)). */
AnnaBridge	157:e7ca05fa8600	160	/* - analog watchdog 1: monitored channel defined by number, */
AnnaBridge	157:e7ca05fa8600	161	/* selection of ADC group (ADC group regular). */
AnnaBridge	157:e7ca05fa8600	162
AnnaBridge	157:e7ca05fa8600	163	/* Internal register offset for ADC analog watchdog channel configuration */
AnnaBridge	157:e7ca05fa8600	164	#define ADC_AWD_CR1_REGOFFSET ((uint32_t)0x00000000U)
AnnaBridge	157:e7ca05fa8600	165
AnnaBridge	157:e7ca05fa8600	166	#define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	157:e7ca05fa8600	167
AnnaBridge	157:e7ca05fa8600	168	#define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	157:e7ca05fa8600	169	#define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK)
AnnaBridge	157:e7ca05fa8600	170
AnnaBridge	157:e7ca05fa8600	171	/* Internal register offset for ADC analog watchdog threshold configuration */
AnnaBridge	157:e7ca05fa8600	172	#define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	157:e7ca05fa8600	173	#define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET)
AnnaBridge	157:e7ca05fa8600	174
AnnaBridge	157:e7ca05fa8600	175
AnnaBridge	157:e7ca05fa8600	176	/* ADC registers bits positions */
AnnaBridge	157:e7ca05fa8600	177	#define ADC_CFGR1_RES_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_RES) */
AnnaBridge	157:e7ca05fa8600	178	#define ADC_CFGR1_AWDSGL_BITOFFSET_POS ((uint32_t)22U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_AWDSGL) */
AnnaBridge	157:e7ca05fa8600	179	#define ADC_TR_HT_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_TR_HT) */
AnnaBridge	157:e7ca05fa8600	180	#define ADC_CHSELR_CHSEL0_BITOFFSET_POS ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL0) */
AnnaBridge	157:e7ca05fa8600	181	#define ADC_CHSELR_CHSEL1_BITOFFSET_POS ((uint32_t) 1U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL1) */
AnnaBridge	157:e7ca05fa8600	182	#define ADC_CHSELR_CHSEL2_BITOFFSET_POS ((uint32_t) 2U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL2) */
AnnaBridge	157:e7ca05fa8600	183	#define ADC_CHSELR_CHSEL3_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL3) */
AnnaBridge	157:e7ca05fa8600	184	#define ADC_CHSELR_CHSEL4_BITOFFSET_POS ((uint32_t) 4U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL4) */
AnnaBridge	157:e7ca05fa8600	185	#define ADC_CHSELR_CHSEL5_BITOFFSET_POS ((uint32_t) 5U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL5) */
AnnaBridge	157:e7ca05fa8600	186	#define ADC_CHSELR_CHSEL6_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL6) */
AnnaBridge	157:e7ca05fa8600	187	#define ADC_CHSELR_CHSEL7_BITOFFSET_POS ((uint32_t) 7U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL7) */
AnnaBridge	157:e7ca05fa8600	188	#define ADC_CHSELR_CHSEL8_BITOFFSET_POS ((uint32_t) 8U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL8) */
AnnaBridge	157:e7ca05fa8600	189	#define ADC_CHSELR_CHSEL9_BITOFFSET_POS ((uint32_t) 9U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL9) */
AnnaBridge	157:e7ca05fa8600	190	#define ADC_CHSELR_CHSEL10_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL10) */
AnnaBridge	157:e7ca05fa8600	191	#define ADC_CHSELR_CHSEL11_BITOFFSET_POS ((uint32_t)11U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL11) */
AnnaBridge	157:e7ca05fa8600	192	#define ADC_CHSELR_CHSEL12_BITOFFSET_POS ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL12) */
AnnaBridge	157:e7ca05fa8600	193	#define ADC_CHSELR_CHSEL13_BITOFFSET_POS ((uint32_t)13U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL13) */
AnnaBridge	157:e7ca05fa8600	194	#define ADC_CHSELR_CHSEL14_BITOFFSET_POS ((uint32_t)14U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL14) */
AnnaBridge	157:e7ca05fa8600	195	#define ADC_CHSELR_CHSEL15_BITOFFSET_POS ((uint32_t)15U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL15) */
AnnaBridge	157:e7ca05fa8600	196	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	197	#define ADC_CHSELR_CHSEL16_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL16) */
AnnaBridge	157:e7ca05fa8600	198	#endif
AnnaBridge	157:e7ca05fa8600	199	#define ADC_CHSELR_CHSEL17_BITOFFSET_POS ((uint32_t)17U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL17) */
AnnaBridge	157:e7ca05fa8600	200	#define ADC_CHSELR_CHSEL18_BITOFFSET_POS ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL18) */
AnnaBridge	157:e7ca05fa8600	201
AnnaBridge	157:e7ca05fa8600	202
AnnaBridge	157:e7ca05fa8600	203	/* ADC registers bits groups */
AnnaBridge	157:e7ca05fa8600	204	#define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL \| ADC_CR_ADSTP \| ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
AnnaBridge	157:e7ca05fa8600	205
AnnaBridge	157:e7ca05fa8600	206
AnnaBridge	157:e7ca05fa8600	207	/* ADC internal channels related definitions */
AnnaBridge	157:e7ca05fa8600	208	/* Internal voltage reference VrefInt */
AnnaBridge	157:e7ca05fa8600	209	#define VREFINT_CAL_ADDR ((uint16_t) ((uint32_t)0x1FF80078U)) / Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	157:e7ca05fa8600	210	#define VREFINT_CAL_VREF ((uint32_t) 3000U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
AnnaBridge	157:e7ca05fa8600	211	/* Temperature sensor */
AnnaBridge	167:84c0a372a020	212	/* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
AnnaBridge	167:84c0a372a020	213	#if !defined(STM32L011xx)
AnnaBridge	157:e7ca05fa8600	214	#define TEMPSENSOR_CAL1_ADDR ((uint16_t) ((uint32_t)0x1FF8007AU)) / Internal temperature sensor, address of parameter TS_CAL1: On STM32L0, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	167:84c0a372a020	215	#endif
AnnaBridge	157:e7ca05fa8600	216	#define TEMPSENSOR_CAL2_ADDR ((uint16_t) ((uint32_t)0x1FF8007EU)) / Internal temperature sensor, address of parameter TS_CAL2: On STM32L0, temperature sensor ADC raw data acquired at temperature 130 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	167:84c0a372a020	217	#if !defined(STM32L011xx)
AnnaBridge	157:e7ca05fa8600	218	#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	167:84c0a372a020	219	#endif
AnnaBridge	157:e7ca05fa8600	220	#define TEMPSENSOR_CAL2_TEMP (( int32_t) 130) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	157:e7ca05fa8600	221	#define TEMPSENSOR_CAL_VREFANALOG ((uint32_t) 3000U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
AnnaBridge	157:e7ca05fa8600	222
AnnaBridge	157:e7ca05fa8600	223
AnnaBridge	157:e7ca05fa8600	224	/**
AnnaBridge	157:e7ca05fa8600	225	* @}
AnnaBridge	157:e7ca05fa8600	226	*/
AnnaBridge	157:e7ca05fa8600	227
AnnaBridge	157:e7ca05fa8600	228
AnnaBridge	157:e7ca05fa8600	229	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	157:e7ca05fa8600	230	/* Private macros ------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	231	/** @defgroup ADC_LL_Private_Macros ADC Private Macros
AnnaBridge	157:e7ca05fa8600	232	* @{
AnnaBridge	157:e7ca05fa8600	233	*/
AnnaBridge	157:e7ca05fa8600	234
AnnaBridge	157:e7ca05fa8600	235
AnnaBridge	157:e7ca05fa8600	236	/**
AnnaBridge	157:e7ca05fa8600	237	* @}
AnnaBridge	157:e7ca05fa8600	238	*/
AnnaBridge	157:e7ca05fa8600	239
AnnaBridge	157:e7ca05fa8600	240	#endif
AnnaBridge	157:e7ca05fa8600	241
AnnaBridge	157:e7ca05fa8600	242	/* Exported types ------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	243	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	157:e7ca05fa8600	244	/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
AnnaBridge	157:e7ca05fa8600	245	* @{
AnnaBridge	157:e7ca05fa8600	246	*/
AnnaBridge	157:e7ca05fa8600	247
AnnaBridge	157:e7ca05fa8600	248	/**
AnnaBridge	157:e7ca05fa8600	249	* @brief Structure definition of some features of ADC common parameters
AnnaBridge	157:e7ca05fa8600	250	* and multimode
AnnaBridge	157:e7ca05fa8600	251	* (all ADC instances belonging to the same ADC common instance).
AnnaBridge	157:e7ca05fa8600	252	* @note The setting of these parameters by function @ref LL_ADC_CommonInit()
AnnaBridge	157:e7ca05fa8600	253	* is conditioned to ADC instances state (all ADC instances
AnnaBridge	157:e7ca05fa8600	254	* sharing the same ADC common instance):
AnnaBridge	157:e7ca05fa8600	255	* All ADC instances sharing the same ADC common instance must be
AnnaBridge	157:e7ca05fa8600	256	* disabled.
AnnaBridge	157:e7ca05fa8600	257	*/
AnnaBridge	157:e7ca05fa8600	258	typedef struct
AnnaBridge	157:e7ca05fa8600	259	{
AnnaBridge	157:e7ca05fa8600	260	uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	261	This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
AnnaBridge	157:e7ca05fa8600	262
AnnaBridge	157:e7ca05fa8600	263	This feature can be modified afterwards using unitary function @ref LL_ADC_SetCommonClock(). */
AnnaBridge	157:e7ca05fa8600	264
AnnaBridge	157:e7ca05fa8600	265	} LL_ADC_CommonInitTypeDef;
AnnaBridge	157:e7ca05fa8600	266
AnnaBridge	157:e7ca05fa8600	267	/**
AnnaBridge	157:e7ca05fa8600	268	* @brief Structure definition of some features of ADC instance.
AnnaBridge	157:e7ca05fa8600	269	* @note These parameters have an impact on ADC scope: ADC instance.
AnnaBridge	157:e7ca05fa8600	270	* Refer to corresponding unitary functions into
AnnaBridge	157:e7ca05fa8600	271	* @ref ADC_LL_EF_Configuration_ADC_Instance .
AnnaBridge	157:e7ca05fa8600	272	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	157:e7ca05fa8600	273	* is conditioned to ADC state:
AnnaBridge	157:e7ca05fa8600	274	* ADC instance must be disabled.
AnnaBridge	157:e7ca05fa8600	275	* This condition is applied to all ADC features, for efficiency
AnnaBridge	157:e7ca05fa8600	276	* and compatibility over all STM32 families. However, the different
AnnaBridge	157:e7ca05fa8600	277	* features can be set under different ADC state conditions
AnnaBridge	157:e7ca05fa8600	278	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	157:e7ca05fa8600	279	* ADC enabled with conversion on going, ...)
AnnaBridge	157:e7ca05fa8600	280	* Each feature can be updated afterwards with a unitary function
AnnaBridge	157:e7ca05fa8600	281	* and potentially with ADC in a different state than disabled,
AnnaBridge	157:e7ca05fa8600	282	* refer to description of each function for setting
AnnaBridge	157:e7ca05fa8600	283	* conditioned to ADC state.
AnnaBridge	157:e7ca05fa8600	284	*/
AnnaBridge	157:e7ca05fa8600	285	typedef struct
AnnaBridge	157:e7ca05fa8600	286	{
AnnaBridge	157:e7ca05fa8600	287	uint32_t Clock; /*!< Set ADC instance clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	288	This parameter can be a value of @ref ADC_LL_EC_CLOCK_SOURCE
AnnaBridge	157:e7ca05fa8600	289	@note On this STM32 serie, this parameter has some clock ratio constraints:
AnnaBridge	157:e7ca05fa8600	290	ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clock cycle
AnnaBridge	157:e7ca05fa8600	291	(APB prescaler configured inside the RCC must be bypassed and the system clock must by 50% duty cycle).
AnnaBridge	157:e7ca05fa8600	292
AnnaBridge	157:e7ca05fa8600	293
AnnaBridge	157:e7ca05fa8600	294	This feature can be modified afterwards using unitary function @ref LL_ADC_SetClock().
AnnaBridge	157:e7ca05fa8600	295	For more details, refer to description of this function. */
AnnaBridge	157:e7ca05fa8600	296
AnnaBridge	157:e7ca05fa8600	297	uint32_t Resolution; /*!< Set ADC resolution.
AnnaBridge	157:e7ca05fa8600	298	This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
AnnaBridge	157:e7ca05fa8600	299
AnnaBridge	157:e7ca05fa8600	300	This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
AnnaBridge	157:e7ca05fa8600	301
AnnaBridge	157:e7ca05fa8600	302	uint32_t DataAlignment; /*!< Set ADC conversion data alignment.
AnnaBridge	157:e7ca05fa8600	303	This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
AnnaBridge	157:e7ca05fa8600	304
AnnaBridge	157:e7ca05fa8600	305	This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
AnnaBridge	157:e7ca05fa8600	306
AnnaBridge	157:e7ca05fa8600	307	uint32_t LowPowerMode; /*!< Set ADC low power mode.
AnnaBridge	157:e7ca05fa8600	308	This parameter can be a value of @ref ADC_LL_EC_LP_MODE
AnnaBridge	157:e7ca05fa8600	309
AnnaBridge	157:e7ca05fa8600	310	This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
AnnaBridge	157:e7ca05fa8600	311
AnnaBridge	157:e7ca05fa8600	312	} LL_ADC_InitTypeDef;
AnnaBridge	157:e7ca05fa8600	313
AnnaBridge	157:e7ca05fa8600	314	/**
AnnaBridge	157:e7ca05fa8600	315	* @brief Structure definition of some features of ADC group regular.
AnnaBridge	157:e7ca05fa8600	316	* @note These parameters have an impact on ADC scope: ADC group regular.
AnnaBridge	157:e7ca05fa8600	317	* Refer to corresponding unitary functions into
AnnaBridge	157:e7ca05fa8600	318	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	157:e7ca05fa8600	319	* (functions with prefix "REG").
AnnaBridge	157:e7ca05fa8600	320	* @note The setting of these parameters by function @ref LL_ADC_REG_Init()
AnnaBridge	157:e7ca05fa8600	321	* is conditioned to ADC state:
AnnaBridge	157:e7ca05fa8600	322	* ADC instance must be disabled.
AnnaBridge	157:e7ca05fa8600	323	* This condition is applied to all ADC features, for efficiency
AnnaBridge	157:e7ca05fa8600	324	* and compatibility over all STM32 families. However, the different
AnnaBridge	157:e7ca05fa8600	325	* features can be set under different ADC state conditions
AnnaBridge	157:e7ca05fa8600	326	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	157:e7ca05fa8600	327	* ADC enabled with conversion on going, ...)
AnnaBridge	157:e7ca05fa8600	328	* Each feature can be updated afterwards with a unitary function
AnnaBridge	157:e7ca05fa8600	329	* and potentially with ADC in a different state than disabled,
AnnaBridge	157:e7ca05fa8600	330	* refer to description of each function for setting
AnnaBridge	157:e7ca05fa8600	331	* conditioned to ADC state.
AnnaBridge	157:e7ca05fa8600	332	*/
AnnaBridge	157:e7ca05fa8600	333	typedef struct
AnnaBridge	157:e7ca05fa8600	334	{
AnnaBridge	157:e7ca05fa8600	335	uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	157:e7ca05fa8600	336	This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
AnnaBridge	157:e7ca05fa8600	337	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
AnnaBridge	157:e7ca05fa8600	338	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
AnnaBridge	157:e7ca05fa8600	339	In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	157:e7ca05fa8600	340
AnnaBridge	157:e7ca05fa8600	341	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
AnnaBridge	157:e7ca05fa8600	342
AnnaBridge	157:e7ca05fa8600	343	uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
AnnaBridge	157:e7ca05fa8600	344	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
AnnaBridge	157:e7ca05fa8600	345	@note This parameter has an effect only if group regular sequencer is enabled
AnnaBridge	157:e7ca05fa8600	346	(several ADC channels enabled in group regular sequencer).
AnnaBridge	157:e7ca05fa8600	347
AnnaBridge	157:e7ca05fa8600	348	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
AnnaBridge	157:e7ca05fa8600	349
AnnaBridge	157:e7ca05fa8600	350	uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
AnnaBridge	157:e7ca05fa8600	351	This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
AnnaBridge	157:e7ca05fa8600	352	Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
AnnaBridge	157:e7ca05fa8600	353
AnnaBridge	157:e7ca05fa8600	354	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
AnnaBridge	157:e7ca05fa8600	355
AnnaBridge	157:e7ca05fa8600	356	uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
AnnaBridge	157:e7ca05fa8600	357	This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
AnnaBridge	157:e7ca05fa8600	358
AnnaBridge	157:e7ca05fa8600	359	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
AnnaBridge	157:e7ca05fa8600	360
AnnaBridge	157:e7ca05fa8600	361	uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
AnnaBridge	157:e7ca05fa8600	362	data preserved or overwritten.
AnnaBridge	157:e7ca05fa8600	363	This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
AnnaBridge	157:e7ca05fa8600	364
AnnaBridge	157:e7ca05fa8600	365	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
AnnaBridge	157:e7ca05fa8600	366
AnnaBridge	157:e7ca05fa8600	367	} LL_ADC_REG_InitTypeDef;
AnnaBridge	157:e7ca05fa8600	368
AnnaBridge	157:e7ca05fa8600	369	/**
AnnaBridge	157:e7ca05fa8600	370	* @}
AnnaBridge	157:e7ca05fa8600	371	*/
AnnaBridge	157:e7ca05fa8600	372	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	157:e7ca05fa8600	373
AnnaBridge	157:e7ca05fa8600	374	/* Exported constants --------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	375	/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
AnnaBridge	157:e7ca05fa8600	376	* @{
AnnaBridge	157:e7ca05fa8600	377	*/
AnnaBridge	157:e7ca05fa8600	378
AnnaBridge	157:e7ca05fa8600	379	/** @defgroup ADC_LL_EC_FLAG ADC flags
AnnaBridge	157:e7ca05fa8600	380	* @brief Flags defines which can be used with LL_ADC_ReadReg function
AnnaBridge	157:e7ca05fa8600	381	* @{
AnnaBridge	157:e7ca05fa8600	382	*/
AnnaBridge	157:e7ca05fa8600	383	#define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /!< ADC flag ADC instance ready /
AnnaBridge	157:e7ca05fa8600	384	#define LL_ADC_FLAG_EOC ADC_ISR_EOC /!< ADC flag ADC group regular end of unitary conversion /
AnnaBridge	157:e7ca05fa8600	385	#define LL_ADC_FLAG_EOS ADC_ISR_EOS /!< ADC flag ADC group regular end of sequence conversions /
AnnaBridge	157:e7ca05fa8600	386	#define LL_ADC_FLAG_OVR ADC_ISR_OVR /!< ADC flag ADC group regular overrun /
AnnaBridge	157:e7ca05fa8600	387	#define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC flag ADC group regular end of sampling phase /
AnnaBridge	157:e7ca05fa8600	388	#define LL_ADC_FLAG_AWD1 ADC_ISR_AWD /!< ADC flag ADC analog watchdog 1 /
AnnaBridge	157:e7ca05fa8600	389	#define LL_ADC_FLAG_EOCAL ADC_ISR_EOCAL /!< ADC flag end of calibration /
AnnaBridge	157:e7ca05fa8600	390	/**
AnnaBridge	157:e7ca05fa8600	391	* @}
AnnaBridge	157:e7ca05fa8600	392	*/
AnnaBridge	157:e7ca05fa8600	393
AnnaBridge	157:e7ca05fa8600	394	/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
AnnaBridge	157:e7ca05fa8600	395	* @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
AnnaBridge	157:e7ca05fa8600	396	* @{
AnnaBridge	157:e7ca05fa8600	397	*/
AnnaBridge	157:e7ca05fa8600	398	#define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /!< ADC interruption ADC instance ready /
AnnaBridge	157:e7ca05fa8600	399	#define LL_ADC_IT_EOC ADC_IER_EOCIE /!< ADC interruption ADC group regular end of unitary conversion /
AnnaBridge	157:e7ca05fa8600	400	#define LL_ADC_IT_EOS ADC_IER_EOSIE /!< ADC interruption ADC group regular end of sequence conversions /
AnnaBridge	157:e7ca05fa8600	401	#define LL_ADC_IT_OVR ADC_IER_OVRIE /!< ADC interruption ADC group regular overrun /
AnnaBridge	157:e7ca05fa8600	402	#define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /!< ADC interruption ADC group regular end of sampling phase /
AnnaBridge	157:e7ca05fa8600	403	#define LL_ADC_IT_AWD1 ADC_IER_AWDIE /!< ADC interruption ADC analog watchdog 1 /
AnnaBridge	157:e7ca05fa8600	404	#define LL_ADC_IT_EOCAL ADC_IER_EOCALIE /!< ADC interruption ADC end of calibration /
AnnaBridge	157:e7ca05fa8600	405	/**
AnnaBridge	157:e7ca05fa8600	406	* @}
AnnaBridge	157:e7ca05fa8600	407	*/
AnnaBridge	157:e7ca05fa8600	408
AnnaBridge	157:e7ca05fa8600	409	/** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
AnnaBridge	157:e7ca05fa8600	410	* @{
AnnaBridge	157:e7ca05fa8600	411	*/
AnnaBridge	157:e7ca05fa8600	412	/* List of ADC registers intended to be used (most commonly) with */
AnnaBridge	157:e7ca05fa8600	413	/* DMA transfer. */
AnnaBridge	157:e7ca05fa8600	414	/* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
AnnaBridge	157:e7ca05fa8600	415	#define LL_ADC_DMA_REG_REGULAR_DATA ((uint32_t)0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
AnnaBridge	157:e7ca05fa8600	416	/**
AnnaBridge	157:e7ca05fa8600	417	* @}
AnnaBridge	157:e7ca05fa8600	418	*/
AnnaBridge	157:e7ca05fa8600	419
AnnaBridge	157:e7ca05fa8600	420	/** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source
AnnaBridge	157:e7ca05fa8600	421	* @{
AnnaBridge	157:e7ca05fa8600	422	*/
AnnaBridge	157:e7ca05fa8600	423	#define LL_ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000U) /!< ADC asynchronous clock without prescaler /
AnnaBridge	157:e7ca05fa8600	424	#define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 2. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	425	#define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 4. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	426	#define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 6. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	427	#define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /!< ADC asynchronous clock with prescaler division by 8. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	428	#define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 10. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	429	#define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 12. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	430	#define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 16. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	431	#define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /!< ADC asynchronous clock with prescaler division by 32. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	432	#define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 64. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	433	#define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1) /!< ADC asynchronous clock with prescaler division by 128. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	434	#define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 256. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	435	/**
AnnaBridge	157:e7ca05fa8600	436	* @}
AnnaBridge	157:e7ca05fa8600	437	*/
AnnaBridge	157:e7ca05fa8600	438
AnnaBridge	157:e7ca05fa8600	439	/** @defgroup ADC_LL_EC_COMMON_CLOCK_FREQ_MODE ADC common - Clock frequency mode
AnnaBridge	157:e7ca05fa8600	440	* @{
AnnaBridge	157:e7ca05fa8600	441	*/
AnnaBridge	157:e7ca05fa8600	442	#define LL_ADC_CLOCK_FREQ_MODE_HIGH ((uint32_t)0x00000000U)/!< ADC clock mode to high frequency. On STM32L0, ADC clock frequency above 2.8MHz. /
AnnaBridge	157:e7ca05fa8600	443	#define LL_ADC_CLOCK_FREQ_MODE_LOW (ADC_CCR_LFMEN) /!< ADC clock mode to low frequency. On STM32L0, ADC clock frequency below 2.8MHz. /
AnnaBridge	157:e7ca05fa8600	444	/**
AnnaBridge	157:e7ca05fa8600	445	* @}
AnnaBridge	157:e7ca05fa8600	446	*/
AnnaBridge	157:e7ca05fa8600	447
AnnaBridge	157:e7ca05fa8600	448	/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
AnnaBridge	157:e7ca05fa8600	449	* @{
AnnaBridge	157:e7ca05fa8600	450	*/
AnnaBridge	157:e7ca05fa8600	451	/* Note: Other measurement paths to internal channels may be available */
AnnaBridge	157:e7ca05fa8600	452	/* (connections to other peripherals). */
AnnaBridge	157:e7ca05fa8600	453	/* If they are not listed below, they do not require any specific */
AnnaBridge	157:e7ca05fa8600	454	/* path enable. In this case, Access to measurement path is done */
AnnaBridge	157:e7ca05fa8600	455	/* only by selecting the corresponding ADC internal channel. */
AnnaBridge	157:e7ca05fa8600	456	#define LL_ADC_PATH_INTERNAL_NONE ((uint32_t)0x00000000U)/!< ADC measurement pathes all disabled /
AnnaBridge	157:e7ca05fa8600	457	#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /!< ADC measurement path to internal channel VrefInt /
AnnaBridge	157:e7ca05fa8600	458	#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /!< ADC measurement path to internal channel temperature sensor /
AnnaBridge	157:e7ca05fa8600	459	#define LL_ADC_PATH_INTERNAL_VLCD (ADC_CCR_VLCDEN) /!< ADC measurement path to internal channel Vlcd /
AnnaBridge	157:e7ca05fa8600	460	/**
AnnaBridge	157:e7ca05fa8600	461	* @}
AnnaBridge	157:e7ca05fa8600	462	*/
AnnaBridge	157:e7ca05fa8600	463
AnnaBridge	157:e7ca05fa8600	464	/** @defgroup ADC_LL_EC_CLOCK_SOURCE ADC instance - Clock source
AnnaBridge	157:e7ca05fa8600	465	* @{
AnnaBridge	157:e7ca05fa8600	466	*/
AnnaBridge	157:e7ca05fa8600	467	#define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /!< ADC synchronous clock derived from AHB clock divided by 4 /
AnnaBridge	157:e7ca05fa8600	468	#define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock divided by 2 /
AnnaBridge	157:e7ca05fa8600	469	#define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock not divided /
AnnaBridge	157:e7ca05fa8600	470	#define LL_ADC_CLOCK_ASYNC ((uint32_t)0x00000000U) /!< ADC asynchronous clock. Asynchronous clock prescaler can be configured using function @ref LL_ADC_SetCommonClock(). /
AnnaBridge	157:e7ca05fa8600	471	/**
AnnaBridge	157:e7ca05fa8600	472	* @}
AnnaBridge	157:e7ca05fa8600	473	*/
AnnaBridge	157:e7ca05fa8600	474
AnnaBridge	157:e7ca05fa8600	475	/** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
AnnaBridge	157:e7ca05fa8600	476	* @{
AnnaBridge	157:e7ca05fa8600	477	*/
AnnaBridge	157:e7ca05fa8600	478	#define LL_ADC_RESOLUTION_12B ((uint32_t)0x00000000U) /!< ADC resolution 12 bits /
AnnaBridge	157:e7ca05fa8600	479	#define LL_ADC_RESOLUTION_10B ( ADC_CFGR1_RES_0) /!< ADC resolution 10 bits /
AnnaBridge	157:e7ca05fa8600	480	#define LL_ADC_RESOLUTION_8B (ADC_CFGR1_RES_1 ) /!< ADC resolution 8 bits /
AnnaBridge	157:e7ca05fa8600	481	#define LL_ADC_RESOLUTION_6B (ADC_CFGR1_RES_1 \| ADC_CFGR1_RES_0) /!< ADC resolution 6 bits /
AnnaBridge	157:e7ca05fa8600	482	/**
AnnaBridge	157:e7ca05fa8600	483	* @}
AnnaBridge	157:e7ca05fa8600	484	*/
AnnaBridge	157:e7ca05fa8600	485
AnnaBridge	157:e7ca05fa8600	486	/** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
AnnaBridge	157:e7ca05fa8600	487	* @{
AnnaBridge	157:e7ca05fa8600	488	*/
AnnaBridge	157:e7ca05fa8600	489	#define LL_ADC_DATA_ALIGN_RIGHT ((uint32_t)0x00000000U)/!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)/
AnnaBridge	157:e7ca05fa8600	490	#define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR1_ALIGN) /!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)/
AnnaBridge	157:e7ca05fa8600	491	/**
AnnaBridge	157:e7ca05fa8600	492	* @}
AnnaBridge	157:e7ca05fa8600	493	*/
AnnaBridge	157:e7ca05fa8600	494
AnnaBridge	157:e7ca05fa8600	495	/** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
AnnaBridge	157:e7ca05fa8600	496	* @{
AnnaBridge	157:e7ca05fa8600	497	*/
AnnaBridge	167:84c0a372a020	498	#define LL_ADC_LP_MODE_NONE ((uint32_t)0x00000000U) /!< No ADC low power mode activated /
AnnaBridge	157:e7ca05fa8600	499	#define LL_ADC_LP_AUTOWAIT (ADC_CFGR1_WAIT) /!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	157:e7ca05fa8600	500	#define LL_ADC_LP_AUTOPOWEROFF (ADC_CFGR1_AUTOFF) /!< ADC low power mode auto power-off: the ADC automatically powers-off after a ADC conversion and automatically wakes up when a new ADC conversion is triggered (with startup time between trigger and start of sampling). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	157:e7ca05fa8600	501	#define LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF) /!< ADC low power modes auto wait and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	157:e7ca05fa8600	502	/**
AnnaBridge	157:e7ca05fa8600	503	* @}
AnnaBridge	157:e7ca05fa8600	504	*/
AnnaBridge	157:e7ca05fa8600	505
AnnaBridge	157:e7ca05fa8600	506	/** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
AnnaBridge	157:e7ca05fa8600	507	* @{
AnnaBridge	157:e7ca05fa8600	508	*/
AnnaBridge	157:e7ca05fa8600	509	#define LL_ADC_GROUP_REGULAR ((uint32_t)0x00000001U) /!< ADC group regular (available on all STM32 devices) /
AnnaBridge	157:e7ca05fa8600	510	/**
AnnaBridge	157:e7ca05fa8600	511	* @}
AnnaBridge	157:e7ca05fa8600	512	*/
AnnaBridge	157:e7ca05fa8600	513
AnnaBridge	157:e7ca05fa8600	514	/** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
AnnaBridge	157:e7ca05fa8600	515	* @{
AnnaBridge	157:e7ca05fa8600	516	*/
AnnaBridge	157:e7ca05fa8600	517	#define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER \| ADC_CHANNEL_0_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN0 /
AnnaBridge	157:e7ca05fa8600	518	#define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER \| ADC_CHANNEL_1_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN1 /
AnnaBridge	157:e7ca05fa8600	519	#define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER \| ADC_CHANNEL_2_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN2 /
AnnaBridge	157:e7ca05fa8600	520	#define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER \| ADC_CHANNEL_3_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN3 /
AnnaBridge	157:e7ca05fa8600	521	#define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER \| ADC_CHANNEL_4_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN4 /
AnnaBridge	157:e7ca05fa8600	522	#define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER \| ADC_CHANNEL_5_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN5 /
AnnaBridge	157:e7ca05fa8600	523	#define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER \| ADC_CHANNEL_6_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN6 /
AnnaBridge	157:e7ca05fa8600	524	#define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER \| ADC_CHANNEL_7_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN7 /
AnnaBridge	157:e7ca05fa8600	525	#define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER \| ADC_CHANNEL_8_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN8 /
AnnaBridge	157:e7ca05fa8600	526	#define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER \| ADC_CHANNEL_9_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN9 /
AnnaBridge	157:e7ca05fa8600	527	#define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER \| ADC_CHANNEL_10_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 /
AnnaBridge	157:e7ca05fa8600	528	#define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER \| ADC_CHANNEL_11_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 /
AnnaBridge	157:e7ca05fa8600	529	#define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER \| ADC_CHANNEL_12_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 /
AnnaBridge	157:e7ca05fa8600	530	#define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER \| ADC_CHANNEL_13_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 /
AnnaBridge	157:e7ca05fa8600	531	#define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER \| ADC_CHANNEL_14_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 /
AnnaBridge	157:e7ca05fa8600	532	#define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER \| ADC_CHANNEL_15_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 /
AnnaBridge	157:e7ca05fa8600	533	#define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER \| ADC_CHANNEL_17_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 /
AnnaBridge	157:e7ca05fa8600	534	#define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER \| ADC_CHANNEL_18_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 /
AnnaBridge	157:e7ca05fa8600	535	#define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to VrefInt: Internal voltage reference. /
AnnaBridge	157:e7ca05fa8600	536	#define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Temperature sensor. /
AnnaBridge	157:e7ca05fa8600	537	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	538	#define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER \| ADC_CHANNEL_16_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 /
AnnaBridge	157:e7ca05fa8600	539	#define LL_ADC_CHANNEL_VLCD (LL_ADC_CHANNEL_16 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Vlcd: Vlcd voltage through a divider ladder of factor 1/4, 1/3 or 1/2 (set by LCD voltage generator biasing), to have Vlcd always below Vdda. /
AnnaBridge	157:e7ca05fa8600	540	#endif
AnnaBridge	157:e7ca05fa8600	541	/**
AnnaBridge	157:e7ca05fa8600	542	* @}
AnnaBridge	157:e7ca05fa8600	543	*/
AnnaBridge	157:e7ca05fa8600	544
AnnaBridge	157:e7ca05fa8600	545	/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
AnnaBridge	157:e7ca05fa8600	546	* @{
AnnaBridge	157:e7ca05fa8600	547	*/
AnnaBridge	157:e7ca05fa8600	548	#define LL_ADC_REG_TRIG_SOFTWARE ((uint32_t)0x00000000U) /!< ADC group regular conversion trigger internal: SW start. /
AnnaBridge	157:e7ca05fa8600	549	#define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	550	#define LL_ADC_REG_TRIG_EXT_TIM21_CH2 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM21 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	551	#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	552	#define LL_ADC_REG_TRIG_EXT_TIM2_CH4 (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	553	#define LL_ADC_REG_TRIG_EXT_TIM22_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM22 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	554	#define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	555	#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 TRG0. Trigger edge set to rising edge (default setting). /
AnnaBridge	167:84c0a372a020	556	#define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: external interrupt line 11. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	557	/**
AnnaBridge	157:e7ca05fa8600	558	* @}
AnnaBridge	157:e7ca05fa8600	559	*/
AnnaBridge	157:e7ca05fa8600	560
AnnaBridge	157:e7ca05fa8600	561	/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
AnnaBridge	157:e7ca05fa8600	562	* @{
AnnaBridge	157:e7ca05fa8600	563	*/
AnnaBridge	157:e7ca05fa8600	564	#define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to rising edge /
AnnaBridge	157:e7ca05fa8600	565	#define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR1_EXTEN_1 ) /!< ADC group regular conversion trigger polarity set to falling edge /
AnnaBridge	157:e7ca05fa8600	566	#define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR1_EXTEN_1 \| ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to both rising and falling edges /
AnnaBridge	157:e7ca05fa8600	567	/**
AnnaBridge	157:e7ca05fa8600	568	* @}
AnnaBridge	157:e7ca05fa8600	569	*/
AnnaBridge	157:e7ca05fa8600	570
AnnaBridge	157:e7ca05fa8600	571	/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
AnnaBridge	157:e7ca05fa8600	572	* @{
AnnaBridge	157:e7ca05fa8600	573	*/
AnnaBridge	157:e7ca05fa8600	574	#define LL_ADC_REG_CONV_SINGLE ((uint32_t)0x00000000U) /!< ADC conversions are performed in single mode: one conversion per trigger /
AnnaBridge	157:e7ca05fa8600	575	#define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR1_CONT) /!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically /
AnnaBridge	157:e7ca05fa8600	576	/**
AnnaBridge	157:e7ca05fa8600	577	* @}
AnnaBridge	157:e7ca05fa8600	578	*/
AnnaBridge	157:e7ca05fa8600	579
AnnaBridge	157:e7ca05fa8600	580	/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
AnnaBridge	157:e7ca05fa8600	581	* @{
AnnaBridge	157:e7ca05fa8600	582	*/
AnnaBridge	157:e7ca05fa8600	583	#define LL_ADC_REG_DMA_TRANSFER_NONE ((uint32_t)0x00000000U) /!< ADC conversions are not transferred by DMA /
AnnaBridge	157:e7ca05fa8600	584	#define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. /
AnnaBridge	157:e7ca05fa8600	585	#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. /
AnnaBridge	157:e7ca05fa8600	586	/**
AnnaBridge	157:e7ca05fa8600	587	* @}
AnnaBridge	157:e7ca05fa8600	588	*/
AnnaBridge	157:e7ca05fa8600	589
AnnaBridge	157:e7ca05fa8600	590	/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion data
AnnaBridge	157:e7ca05fa8600	591	* @{
AnnaBridge	157:e7ca05fa8600	592	*/
AnnaBridge	157:e7ca05fa8600	593	#define LL_ADC_REG_OVR_DATA_PRESERVED ((uint32_t)0x00000000U)/!< ADC group regular behavior in case of overrun: data preserved /
AnnaBridge	157:e7ca05fa8600	594	#define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR1_OVRMOD) /!< ADC group regular behavior in case of overrun: data overwritten /
AnnaBridge	157:e7ca05fa8600	595	/**
AnnaBridge	157:e7ca05fa8600	596	* @}
AnnaBridge	157:e7ca05fa8600	597	*/
AnnaBridge	157:e7ca05fa8600	598
AnnaBridge	157:e7ca05fa8600	599	/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_DIRECTION ADC group regular - Sequencer scan direction
AnnaBridge	157:e7ca05fa8600	600	* @{
AnnaBridge	157:e7ca05fa8600	601	*/
AnnaBridge	157:e7ca05fa8600	602	#define LL_ADC_REG_SEQ_SCAN_DIR_FORWARD ((uint32_t)0x00000000U)/!< ADC group regular sequencer scan direction forward: from lowest channel number to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer). On some other STM32 families, this setting is not available and the default scan direction is forward. /
AnnaBridge	157:e7ca05fa8600	603	#define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD (ADC_CFGR1_SCANDIR) /!< ADC group regular sequencer scan direction backward: from highest channel number to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer) /
AnnaBridge	157:e7ca05fa8600	604	/**
AnnaBridge	157:e7ca05fa8600	605	* @}
AnnaBridge	157:e7ca05fa8600	606	*/
AnnaBridge	157:e7ca05fa8600	607
AnnaBridge	157:e7ca05fa8600	608	/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
AnnaBridge	157:e7ca05fa8600	609	* @{
AnnaBridge	157:e7ca05fa8600	610	*/
AnnaBridge	157:e7ca05fa8600	611	#define LL_ADC_REG_SEQ_DISCONT_DISABLE ((uint32_t)0x00000000U) /!< ADC group regular sequencer discontinuous mode disable /
AnnaBridge	157:e7ca05fa8600	612	#define LL_ADC_REG_SEQ_DISCONT_1RANK (ADC_CFGR1_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank /
AnnaBridge	157:e7ca05fa8600	613	/**
AnnaBridge	157:e7ca05fa8600	614	* @}
AnnaBridge	157:e7ca05fa8600	615	*/
AnnaBridge	157:e7ca05fa8600	616
AnnaBridge	157:e7ca05fa8600	617	/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
AnnaBridge	157:e7ca05fa8600	618	* @{
AnnaBridge	157:e7ca05fa8600	619	*/
AnnaBridge	157:e7ca05fa8600	620	#define LL_ADC_SAMPLINGTIME_1CYCLE_5 ((uint32_t)0x00000000U) /!< Sampling time 1.5 ADC clock cycle /
AnnaBridge	167:84c0a372a020	621	#define LL_ADC_SAMPLINGTIME_3CYCLES_5 (ADC_SMPR_SMP_0) /!< Sampling time 3.5 ADC clock cycles /
AnnaBridge	167:84c0a372a020	622	#define LL_ADC_SAMPLINGTIME_7CYCLES_5 (ADC_SMPR_SMP_1) /!< Sampling time 7.5 ADC clock cycles /
AnnaBridge	167:84c0a372a020	623	#define LL_ADC_SAMPLINGTIME_12CYCLES_5 (ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 12.5 ADC clock cycles /
AnnaBridge	167:84c0a372a020	624	#define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP_2) /!< Sampling time 19.5 ADC clock cycles /
AnnaBridge	167:84c0a372a020	625	#define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_0) /!< Sampling time 39.5 ADC clock cycles /
AnnaBridge	167:84c0a372a020	626	#define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1) /!< Sampling time 79.5 ADC clock cycles /
AnnaBridge	167:84c0a372a020	627	#define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 160.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	628	/**
AnnaBridge	157:e7ca05fa8600	629	* @}
AnnaBridge	157:e7ca05fa8600	630	*/
AnnaBridge	157:e7ca05fa8600	631
AnnaBridge	157:e7ca05fa8600	632	/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
AnnaBridge	157:e7ca05fa8600	633	* @{
AnnaBridge	157:e7ca05fa8600	634	*/
AnnaBridge	157:e7ca05fa8600	635	#define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR1_REGOFFSET) /!< ADC analog watchdog number 1 /
AnnaBridge	157:e7ca05fa8600	636	/**
AnnaBridge	157:e7ca05fa8600	637	* @}
AnnaBridge	157:e7ca05fa8600	638	*/
AnnaBridge	157:e7ca05fa8600	639
AnnaBridge	157:e7ca05fa8600	640	/** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
AnnaBridge	157:e7ca05fa8600	641	* @{
AnnaBridge	157:e7ca05fa8600	642	*/
AnnaBridge	157:e7ca05fa8600	643	#define LL_ADC_AWD_DISABLE ((uint32_t)0x00000000U) /!< ADC analog watchdog monitoring disabled /
AnnaBridge	157:e7ca05fa8600	644	#define LL_ADC_AWD_ALL_CHANNELS_REG ( ADC_CFGR1_AWDEN ) /!< ADC analog watchdog monitoring of all channels, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	645	#define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	646	#define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	647	#define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	648	#define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	649	#define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	650	#define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	651	#define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	652	#define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	653	#define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	654	#define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	655	#define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	656	#define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	657	#define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	658	#define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	659	#define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	660	#define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	661	#define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	662	#define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	663	#define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	664	#define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	665	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	666	#define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	667	#define LL_ADC_AWD_CH_VLCD_REG ((LL_ADC_CHANNEL_VLCD & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	668	#endif
AnnaBridge	157:e7ca05fa8600	669	/**
AnnaBridge	157:e7ca05fa8600	670	* @}
AnnaBridge	157:e7ca05fa8600	671	*/
AnnaBridge	157:e7ca05fa8600	672
AnnaBridge	157:e7ca05fa8600	673	/** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
AnnaBridge	157:e7ca05fa8600	674	* @{
AnnaBridge	157:e7ca05fa8600	675	*/
AnnaBridge	157:e7ca05fa8600	676	#define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR_HT ) /!< ADC analog watchdog threshold high /
AnnaBridge	157:e7ca05fa8600	677	#define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR_LT) /!< ADC analog watchdog threshold low /
AnnaBridge	157:e7ca05fa8600	678	#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR_HT \| ADC_TR_LT) /!< ADC analog watchdog both thresholds high and low concatenated into the same data /
AnnaBridge	157:e7ca05fa8600	679	/**
AnnaBridge	157:e7ca05fa8600	680	* @}
AnnaBridge	157:e7ca05fa8600	681	*/
AnnaBridge	157:e7ca05fa8600	682
AnnaBridge	157:e7ca05fa8600	683	/** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope
AnnaBridge	157:e7ca05fa8600	684	* @{
AnnaBridge	157:e7ca05fa8600	685	*/
AnnaBridge	157:e7ca05fa8600	686	#define LL_ADC_OVS_DISABLE ((uint32_t)0x00000000U) /!< ADC oversampling disabled. /
AnnaBridge	157:e7ca05fa8600	687	#define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_OVSE) /!< ADC oversampling on conversions of ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices featuring ADC group injected, in this case other oversampling scope parameters are available. /
AnnaBridge	157:e7ca05fa8600	688	/**
AnnaBridge	157:e7ca05fa8600	689	* @}
AnnaBridge	157:e7ca05fa8600	690	*/
AnnaBridge	157:e7ca05fa8600	691
AnnaBridge	157:e7ca05fa8600	692	/** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode
AnnaBridge	157:e7ca05fa8600	693	* @{
AnnaBridge	157:e7ca05fa8600	694	*/
AnnaBridge	157:e7ca05fa8600	695	#define LL_ADC_OVS_REG_CONT ((uint32_t)0x00000000U)/!< ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done from 1 trigger) /
AnnaBridge	157:e7ca05fa8600	696	#define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TOVS) /!< ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs a trigger) /
AnnaBridge	157:e7ca05fa8600	697	/**
AnnaBridge	157:e7ca05fa8600	698	* @}
AnnaBridge	157:e7ca05fa8600	699	*/
AnnaBridge	157:e7ca05fa8600	700
AnnaBridge	157:e7ca05fa8600	701	/** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio
AnnaBridge	157:e7ca05fa8600	702	* @{
AnnaBridge	157:e7ca05fa8600	703	*/
AnnaBridge	157:e7ca05fa8600	704	#define LL_ADC_OVS_RATIO_2 ((uint32_t)0x00000000U) /!< ADC oversampling ratio of 2 (2 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	705	#define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 4 (4 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	706	#define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 8 (8 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	707	#define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 16 (16 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	708	#define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) /!< ADC oversampling ratio of 32 (32 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	709	#define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 64 (64 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	710	#define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 128 (128 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	711	#define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 256 (256 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	712	/**
AnnaBridge	157:e7ca05fa8600	713	* @}
AnnaBridge	157:e7ca05fa8600	714	*/
AnnaBridge	157:e7ca05fa8600	715
AnnaBridge	157:e7ca05fa8600	716	/** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift
AnnaBridge	157:e7ca05fa8600	717	* @{
AnnaBridge	157:e7ca05fa8600	718	*/
AnnaBridge	157:e7ca05fa8600	719	#define LL_ADC_OVS_SHIFT_NONE ((uint32_t)0x00000000U) /!< ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	720	#define LL_ADC_OVS_SHIFT_RIGHT_1 ( ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	721	#define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	722	#define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	723	#define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 ) /!< ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	724	#define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	725	#define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	726	#define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	727	#define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 ) /!< ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	728	/**
AnnaBridge	157:e7ca05fa8600	729	* @}
AnnaBridge	157:e7ca05fa8600	730	*/
AnnaBridge	157:e7ca05fa8600	731
AnnaBridge	157:e7ca05fa8600	732
AnnaBridge	157:e7ca05fa8600	733	/** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
AnnaBridge	157:e7ca05fa8600	734	* @note Only ADC IP HW delays are defined in ADC LL driver driver,
AnnaBridge	157:e7ca05fa8600	735	* not timeout values.
AnnaBridge	157:e7ca05fa8600	736	* For details on delays values, refer to descriptions in source code
AnnaBridge	157:e7ca05fa8600	737	* above each literal definition.
AnnaBridge	157:e7ca05fa8600	738	* @{
AnnaBridge	157:e7ca05fa8600	739	*/
AnnaBridge	157:e7ca05fa8600	740
AnnaBridge	157:e7ca05fa8600	741	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
AnnaBridge	157:e7ca05fa8600	742	/* not timeout values. */
AnnaBridge	157:e7ca05fa8600	743	/* Timeout values for ADC operations are dependent to device clock */
AnnaBridge	157:e7ca05fa8600	744	/* configuration (system clock versus ADC clock), */
AnnaBridge	157:e7ca05fa8600	745	/* and therefore must be defined in user application. */
AnnaBridge	157:e7ca05fa8600	746	/* Indications for estimation of ADC timeout delays, for this */
AnnaBridge	157:e7ca05fa8600	747	/* STM32 serie: */
AnnaBridge	157:e7ca05fa8600	748	/* - ADC calibration time: maximum delay is 83/fADC. */
AnnaBridge	157:e7ca05fa8600	749	/* (refer to device datasheet, parameter "tCAL") */
AnnaBridge	157:e7ca05fa8600	750	/* - ADC enable time: maximum delay is 1 conversion cycle. */
AnnaBridge	157:e7ca05fa8600	751	/* (refer to device datasheet, parameter "tSTAB") */
AnnaBridge	157:e7ca05fa8600	752	/* - ADC disable time: maximum delay should be a few ADC clock cycles */
AnnaBridge	157:e7ca05fa8600	753	/* - ADC stop conversion time: maximum delay should be a few ADC clock */
AnnaBridge	157:e7ca05fa8600	754	/* cycles */
AnnaBridge	157:e7ca05fa8600	755	/* - ADC conversion time: duration depending on ADC clock and ADC */
AnnaBridge	157:e7ca05fa8600	756	/* configuration. */
AnnaBridge	157:e7ca05fa8600	757	/* (refer to device reference manual, section "Timing") */
AnnaBridge	157:e7ca05fa8600	758
AnnaBridge	157:e7ca05fa8600	759	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
AnnaBridge	157:e7ca05fa8600	760	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	157:e7ca05fa8600	761	/* parameter "tUP_LDO"). */
AnnaBridge	157:e7ca05fa8600	762	#define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ((uint32_t) 10U) /!< Delay for ADC stabilization time (ADC voltage regulator start-up time) /
AnnaBridge	157:e7ca05fa8600	763
AnnaBridge	157:e7ca05fa8600	764	/* Delay for internal voltage reference stabilization time. */
AnnaBridge	157:e7ca05fa8600	765	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	157:e7ca05fa8600	766	/* parameter "TADC_BUF"). */
AnnaBridge	157:e7ca05fa8600	767	/* Unit: us */
AnnaBridge	157:e7ca05fa8600	768	#define LL_ADC_DELAY_VREFINT_STAB_US ((uint32_t) 10U) /!< Delay for internal voltage reference stabilization time /
AnnaBridge	157:e7ca05fa8600	769
AnnaBridge	157:e7ca05fa8600	770	/* Delay for temperature sensor stabilization time. */
AnnaBridge	157:e7ca05fa8600	771	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	157:e7ca05fa8600	772	/* parameter "tSTART"). */
AnnaBridge	157:e7ca05fa8600	773	/* Unit: us */
AnnaBridge	157:e7ca05fa8600	774	#define LL_ADC_DELAY_TEMPSENSOR_STAB_US ((uint32_t) 10U) /!< Delay for temperature sensor stabilization time /
AnnaBridge	157:e7ca05fa8600	775
AnnaBridge	157:e7ca05fa8600	776	/* Delay required between ADC end of calibration and ADC enable. */
AnnaBridge	157:e7ca05fa8600	777	/* Note: On this STM32 serie, a minimum number of ADC clock cycles */
AnnaBridge	157:e7ca05fa8600	778	/* are required between ADC end of calibration and ADC enable. */
AnnaBridge	157:e7ca05fa8600	779	/* Wait time can be computed in user application by waiting for the */
AnnaBridge	157:e7ca05fa8600	780	/* equivalent number of CPU cycles, by taking into account */
AnnaBridge	157:e7ca05fa8600	781	/* ratio of CPU clock versus ADC clock prescalers. */
AnnaBridge	157:e7ca05fa8600	782	/* Unit: ADC clock cycles. */
AnnaBridge	157:e7ca05fa8600	783	#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ((uint32_t) 2U) /!< Delay required between ADC end of calibration and ADC enable /
AnnaBridge	157:e7ca05fa8600	784
AnnaBridge	157:e7ca05fa8600	785	/**
AnnaBridge	157:e7ca05fa8600	786	* @}
AnnaBridge	157:e7ca05fa8600	787	*/
AnnaBridge	157:e7ca05fa8600	788
AnnaBridge	157:e7ca05fa8600	789	/**
AnnaBridge	157:e7ca05fa8600	790	* @}
AnnaBridge	157:e7ca05fa8600	791	*/
AnnaBridge	157:e7ca05fa8600	792
AnnaBridge	157:e7ca05fa8600	793
AnnaBridge	157:e7ca05fa8600	794	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	795	/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
AnnaBridge	157:e7ca05fa8600	796	* @{
AnnaBridge	157:e7ca05fa8600	797	*/
AnnaBridge	157:e7ca05fa8600	798
AnnaBridge	157:e7ca05fa8600	799	/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge	157:e7ca05fa8600	800	* @{
AnnaBridge	157:e7ca05fa8600	801	*/
AnnaBridge	157:e7ca05fa8600	802
AnnaBridge	157:e7ca05fa8600	803	/**
AnnaBridge	157:e7ca05fa8600	804	* @brief Write a value in ADC register
AnnaBridge	157:e7ca05fa8600	805	* @param __INSTANCE__ ADC Instance
AnnaBridge	157:e7ca05fa8600	806	* @param __REG__ Register to be written
AnnaBridge	157:e7ca05fa8600	807	* @param __VALUE__ Value to be written in the register
AnnaBridge	157:e7ca05fa8600	808	* @retval None
AnnaBridge	157:e7ca05fa8600	809	*/
AnnaBridge	157:e7ca05fa8600	810	#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	157:e7ca05fa8600	811
AnnaBridge	157:e7ca05fa8600	812	/**
AnnaBridge	157:e7ca05fa8600	813	* @brief Read a value in ADC register
AnnaBridge	157:e7ca05fa8600	814	* @param __INSTANCE__ ADC Instance
AnnaBridge	157:e7ca05fa8600	815	* @param __REG__ Register to be read
AnnaBridge	157:e7ca05fa8600	816	* @retval Register value
AnnaBridge	157:e7ca05fa8600	817	*/
AnnaBridge	157:e7ca05fa8600	818	#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	157:e7ca05fa8600	819	/**
AnnaBridge	157:e7ca05fa8600	820	* @}
AnnaBridge	157:e7ca05fa8600	821	*/
AnnaBridge	157:e7ca05fa8600	822
AnnaBridge	157:e7ca05fa8600	823	/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
AnnaBridge	157:e7ca05fa8600	824	* @{
AnnaBridge	157:e7ca05fa8600	825	*/
AnnaBridge	157:e7ca05fa8600	826
AnnaBridge	157:e7ca05fa8600	827	/**
AnnaBridge	157:e7ca05fa8600	828	* @brief Helper macro to get ADC channel number in decimal format
AnnaBridge	157:e7ca05fa8600	829	* from literals LL_ADC_CHANNEL_x.
AnnaBridge	157:e7ca05fa8600	830	* @note Example:
AnnaBridge	157:e7ca05fa8600	831	* __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
AnnaBridge	157:e7ca05fa8600	832	* will return decimal number "4".
AnnaBridge	157:e7ca05fa8600	833	* @note The input can be a value from functions where a channel
AnnaBridge	157:e7ca05fa8600	834	* number is returned, either defined with number
AnnaBridge	157:e7ca05fa8600	835	* or with bitfield (only one bit must be set).
AnnaBridge	157:e7ca05fa8600	836	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	837	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	838	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	839	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	840	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	841	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	842	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	843	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	844	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	845	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	846	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	847	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	848	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	849	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	850	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	851	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	852	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	853	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	854	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	855	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	856	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	857	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	858	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	859	*
AnnaBridge	157:e7ca05fa8600	860	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	861	* @retval Value between Min_Data=0 and Max_Data=18
AnnaBridge	157:e7ca05fa8600	862	*/
AnnaBridge	157:e7ca05fa8600	863	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	864	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	865	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	157:e7ca05fa8600	866	? ( \
AnnaBridge	157:e7ca05fa8600	867	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	157:e7ca05fa8600	868	) \
AnnaBridge	157:e7ca05fa8600	869	: \
AnnaBridge	157:e7ca05fa8600	870	( \
AnnaBridge	157:e7ca05fa8600	871	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	157:e7ca05fa8600	872	( \
AnnaBridge	157:e7ca05fa8600	873	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	157:e7ca05fa8600	874	( \
AnnaBridge	157:e7ca05fa8600	875	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	157:e7ca05fa8600	876	( \
AnnaBridge	157:e7ca05fa8600	877	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	157:e7ca05fa8600	878	( \
AnnaBridge	157:e7ca05fa8600	879	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	157:e7ca05fa8600	880	( \
AnnaBridge	157:e7ca05fa8600	881	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	157:e7ca05fa8600	882	( \
AnnaBridge	157:e7ca05fa8600	883	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	157:e7ca05fa8600	884	( \
AnnaBridge	157:e7ca05fa8600	885	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	157:e7ca05fa8600	886	( \
AnnaBridge	157:e7ca05fa8600	887	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	157:e7ca05fa8600	888	( \
AnnaBridge	157:e7ca05fa8600	889	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	157:e7ca05fa8600	890	( \
AnnaBridge	157:e7ca05fa8600	891	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	157:e7ca05fa8600	892	( \
AnnaBridge	157:e7ca05fa8600	893	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	157:e7ca05fa8600	894	( \
AnnaBridge	157:e7ca05fa8600	895	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	157:e7ca05fa8600	896	( \
AnnaBridge	157:e7ca05fa8600	897	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	157:e7ca05fa8600	898	( \
AnnaBridge	157:e7ca05fa8600	899	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	157:e7ca05fa8600	900	( \
AnnaBridge	157:e7ca05fa8600	901	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	157:e7ca05fa8600	902	( \
AnnaBridge	157:e7ca05fa8600	903	(((__CHANNEL__) & ADC_CHSELR_CHSEL16) == ADC_CHSELR_CHSEL16) ? (16U) : \
AnnaBridge	157:e7ca05fa8600	904	( \
AnnaBridge	157:e7ca05fa8600	905	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	157:e7ca05fa8600	906	( \
AnnaBridge	157:e7ca05fa8600	907	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	157:e7ca05fa8600	908	(0U) \
AnnaBridge	157:e7ca05fa8600	909	) \
AnnaBridge	157:e7ca05fa8600	910	) \
AnnaBridge	157:e7ca05fa8600	911	) \
AnnaBridge	157:e7ca05fa8600	912	) \
AnnaBridge	157:e7ca05fa8600	913	) \
AnnaBridge	157:e7ca05fa8600	914	) \
AnnaBridge	157:e7ca05fa8600	915	) \
AnnaBridge	157:e7ca05fa8600	916	) \
AnnaBridge	157:e7ca05fa8600	917	) \
AnnaBridge	157:e7ca05fa8600	918	) \
AnnaBridge	157:e7ca05fa8600	919	) \
AnnaBridge	157:e7ca05fa8600	920	) \
AnnaBridge	157:e7ca05fa8600	921	) \
AnnaBridge	157:e7ca05fa8600	922	) \
AnnaBridge	157:e7ca05fa8600	923	) \
AnnaBridge	157:e7ca05fa8600	924	) \
AnnaBridge	157:e7ca05fa8600	925	) \
AnnaBridge	157:e7ca05fa8600	926	) \
AnnaBridge	157:e7ca05fa8600	927	) \
AnnaBridge	157:e7ca05fa8600	928	)
AnnaBridge	157:e7ca05fa8600	929	#else
AnnaBridge	157:e7ca05fa8600	930	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	931	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	157:e7ca05fa8600	932	? ( \
AnnaBridge	157:e7ca05fa8600	933	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	157:e7ca05fa8600	934	) \
AnnaBridge	157:e7ca05fa8600	935	: \
AnnaBridge	157:e7ca05fa8600	936	( \
AnnaBridge	157:e7ca05fa8600	937	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	157:e7ca05fa8600	938	( \
AnnaBridge	157:e7ca05fa8600	939	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	157:e7ca05fa8600	940	( \
AnnaBridge	157:e7ca05fa8600	941	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	157:e7ca05fa8600	942	( \
AnnaBridge	157:e7ca05fa8600	943	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	157:e7ca05fa8600	944	( \
AnnaBridge	157:e7ca05fa8600	945	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	157:e7ca05fa8600	946	( \
AnnaBridge	157:e7ca05fa8600	947	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	157:e7ca05fa8600	948	( \
AnnaBridge	157:e7ca05fa8600	949	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	157:e7ca05fa8600	950	( \
AnnaBridge	157:e7ca05fa8600	951	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	157:e7ca05fa8600	952	( \
AnnaBridge	157:e7ca05fa8600	953	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	157:e7ca05fa8600	954	( \
AnnaBridge	157:e7ca05fa8600	955	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	157:e7ca05fa8600	956	( \
AnnaBridge	157:e7ca05fa8600	957	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	157:e7ca05fa8600	958	( \
AnnaBridge	157:e7ca05fa8600	959	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	157:e7ca05fa8600	960	( \
AnnaBridge	157:e7ca05fa8600	961	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	157:e7ca05fa8600	962	( \
AnnaBridge	157:e7ca05fa8600	963	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	157:e7ca05fa8600	964	( \
AnnaBridge	157:e7ca05fa8600	965	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	157:e7ca05fa8600	966	( \
AnnaBridge	157:e7ca05fa8600	967	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	157:e7ca05fa8600	968	( \
AnnaBridge	157:e7ca05fa8600	969	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	157:e7ca05fa8600	970	( \
AnnaBridge	157:e7ca05fa8600	971	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	157:e7ca05fa8600	972	(0U) \
AnnaBridge	157:e7ca05fa8600	973	) \
AnnaBridge	157:e7ca05fa8600	974	) \
AnnaBridge	157:e7ca05fa8600	975	) \
AnnaBridge	157:e7ca05fa8600	976	) \
AnnaBridge	157:e7ca05fa8600	977	) \
AnnaBridge	157:e7ca05fa8600	978	) \
AnnaBridge	157:e7ca05fa8600	979	) \
AnnaBridge	157:e7ca05fa8600	980	) \
AnnaBridge	157:e7ca05fa8600	981	) \
AnnaBridge	157:e7ca05fa8600	982	) \
AnnaBridge	157:e7ca05fa8600	983	) \
AnnaBridge	157:e7ca05fa8600	984	) \
AnnaBridge	157:e7ca05fa8600	985	) \
AnnaBridge	157:e7ca05fa8600	986	) \
AnnaBridge	157:e7ca05fa8600	987	) \
AnnaBridge	157:e7ca05fa8600	988	) \
AnnaBridge	157:e7ca05fa8600	989	) \
AnnaBridge	157:e7ca05fa8600	990	) \
AnnaBridge	157:e7ca05fa8600	991	)
AnnaBridge	157:e7ca05fa8600	992	#endif
AnnaBridge	157:e7ca05fa8600	993
AnnaBridge	157:e7ca05fa8600	994	/**
AnnaBridge	157:e7ca05fa8600	995	* @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
AnnaBridge	157:e7ca05fa8600	996	* from number in decimal format.
AnnaBridge	157:e7ca05fa8600	997	* @note Example:
AnnaBridge	157:e7ca05fa8600	998	* __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
AnnaBridge	157:e7ca05fa8600	999	* will return a data equivalent to "LL_ADC_CHANNEL_4".
AnnaBridge	157:e7ca05fa8600	1000	* @param __DECIMAL_NB__: Value between Min_Data=0 and Max_Data=18
AnnaBridge	157:e7ca05fa8600	1001	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1002	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1003	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1004	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1005	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1006	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1007	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1008	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1009	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1010	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1011	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1012	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1013	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1014	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1015	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1016	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1017	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1018	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1019	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1020	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1021	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	157:e7ca05fa8600	1022	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	157:e7ca05fa8600	1023	* @arg @ref LL_ADC_CHANNEL_VLCD (1)(2)
AnnaBridge	157:e7ca05fa8600	1024	*
AnnaBridge	157:e7ca05fa8600	1025	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
AnnaBridge	157:e7ca05fa8600	1026	* (2) For ADC channel read back from ADC register,
AnnaBridge	157:e7ca05fa8600	1027	* comparison with internal channel parameter to be done
AnnaBridge	157:e7ca05fa8600	1028	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	157:e7ca05fa8600	1029	*/
AnnaBridge	157:e7ca05fa8600	1030	#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	157:e7ca05fa8600	1031	( \
AnnaBridge	157:e7ca05fa8600	1032	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
AnnaBridge	157:e7ca05fa8600	1033	(ADC_CHSELR_CHSEL0 << (__DECIMAL_NB__)) \
AnnaBridge	157:e7ca05fa8600	1034	)
AnnaBridge	157:e7ca05fa8600	1035
AnnaBridge	157:e7ca05fa8600	1036	/**
AnnaBridge	157:e7ca05fa8600	1037	* @brief Helper macro to determine whether the selected channel
AnnaBridge	157:e7ca05fa8600	1038	* corresponds to literal definitions of driver.
AnnaBridge	157:e7ca05fa8600	1039	* @note The different literal definitions of ADC channels are:
AnnaBridge	157:e7ca05fa8600	1040	* - ADC internal channel:
AnnaBridge	157:e7ca05fa8600	1041	* LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
AnnaBridge	157:e7ca05fa8600	1042	* - ADC external channel (channel connected to a GPIO pin):
AnnaBridge	157:e7ca05fa8600	1043	* LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
AnnaBridge	157:e7ca05fa8600	1044	* @note The channel parameter must be a value defined from literal
AnnaBridge	157:e7ca05fa8600	1045	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	157:e7ca05fa8600	1046	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1047	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
AnnaBridge	157:e7ca05fa8600	1048	* must not be a value from functions where a channel number is
AnnaBridge	157:e7ca05fa8600	1049	* returned from ADC registers,
AnnaBridge	157:e7ca05fa8600	1050	* because internal and external channels share the same channel
AnnaBridge	157:e7ca05fa8600	1051	* number in ADC registers. The differentiation is made only with
AnnaBridge	157:e7ca05fa8600	1052	* parameters definitions of driver.
AnnaBridge	157:e7ca05fa8600	1053	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1054	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1055	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1056	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1057	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1058	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1059	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1060	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1061	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1062	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1063	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1064	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1065	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1066	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1067	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1068	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1069	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1070	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1071	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1072	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1073	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	1074	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1075	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	1076	*
AnnaBridge	157:e7ca05fa8600	1077	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	167:84c0a372a020	1078	* @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin).
AnnaBridge	167:84c0a372a020	1079	* Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
AnnaBridge	157:e7ca05fa8600	1080	*/
AnnaBridge	157:e7ca05fa8600	1081	#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1082	(((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
AnnaBridge	157:e7ca05fa8600	1083
AnnaBridge	157:e7ca05fa8600	1084	/**
AnnaBridge	157:e7ca05fa8600	1085	* @brief Helper macro to convert a channel defined from parameter
AnnaBridge	157:e7ca05fa8600	1086	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	157:e7ca05fa8600	1087	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1088	* to its equivalent parameter definition of a ADC external channel
AnnaBridge	157:e7ca05fa8600	1089	* (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
AnnaBridge	157:e7ca05fa8600	1090	* @note The channel parameter can be, additionally to a value
AnnaBridge	157:e7ca05fa8600	1091	* defined from parameter definition of a ADC internal channel
AnnaBridge	157:e7ca05fa8600	1092	* (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1093	* a value defined from parameter definition of
AnnaBridge	157:e7ca05fa8600	1094	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	157:e7ca05fa8600	1095	* or a value from functions where a channel number is returned
AnnaBridge	157:e7ca05fa8600	1096	* from ADC registers.
AnnaBridge	157:e7ca05fa8600	1097	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1098	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1099	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1100	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1101	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1102	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1103	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1104	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1105	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1106	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1107	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1108	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1109	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1110	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1111	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1112	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1113	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1114	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1115	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1116	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1117	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	1118	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1119	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	1120	*
AnnaBridge	157:e7ca05fa8600	1121	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1122	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1123	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1124	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1125	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1126	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1127	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1128	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1129	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1130	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1131	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1132	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1133	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1134	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1135	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1136	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1137	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1138	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1139	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	157:e7ca05fa8600	1140	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1141	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1142	*/
AnnaBridge	157:e7ca05fa8600	1143	#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1144	((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	157:e7ca05fa8600	1145
AnnaBridge	157:e7ca05fa8600	1146	/**
AnnaBridge	157:e7ca05fa8600	1147	* @brief Helper macro to determine whether the internal channel
AnnaBridge	157:e7ca05fa8600	1148	* selected is available on the ADC instance selected.
AnnaBridge	157:e7ca05fa8600	1149	* @note The channel parameter must be a value defined from parameter
AnnaBridge	157:e7ca05fa8600	1150	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	157:e7ca05fa8600	1151	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1152	* must not be a value defined from parameter definition of
AnnaBridge	157:e7ca05fa8600	1153	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	157:e7ca05fa8600	1154	* or a value from functions where a channel number is
AnnaBridge	157:e7ca05fa8600	1155	* returned from ADC registers,
AnnaBridge	157:e7ca05fa8600	1156	* because internal and external channels share the same channel
AnnaBridge	157:e7ca05fa8600	1157	* number in ADC registers. The differentiation is made only with
AnnaBridge	157:e7ca05fa8600	1158	* parameters definitions of driver.
AnnaBridge	157:e7ca05fa8600	1159	* @param __ADC_INSTANCE__ ADC instance
AnnaBridge	157:e7ca05fa8600	1160	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1161	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	1162	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1163	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	1164	*
AnnaBridge	157:e7ca05fa8600	1165	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1166
AnnaBridge	167:84c0a372a020	1167	* @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
AnnaBridge	167:84c0a372a020	1168	* Value "1" if the internal channel selected is available on the ADC instance selected.
AnnaBridge	157:e7ca05fa8600	1169	*/
AnnaBridge	157:e7ca05fa8600	1170	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	1171	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1172	( \
AnnaBridge	157:e7ca05fa8600	1173	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	157:e7ca05fa8600	1174	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	157:e7ca05fa8600	1175	((__CHANNEL__) == LL_ADC_CHANNEL_VLCD) \
AnnaBridge	157:e7ca05fa8600	1176	)
AnnaBridge	157:e7ca05fa8600	1177	#else
AnnaBridge	157:e7ca05fa8600	1178	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1179	( \
AnnaBridge	157:e7ca05fa8600	1180	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	157:e7ca05fa8600	1181	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \
AnnaBridge	157:e7ca05fa8600	1182	)
AnnaBridge	157:e7ca05fa8600	1183	#endif
AnnaBridge	157:e7ca05fa8600	1184
AnnaBridge	157:e7ca05fa8600	1185	/**
AnnaBridge	157:e7ca05fa8600	1186	* @brief Helper macro to define ADC analog watchdog parameter:
AnnaBridge	157:e7ca05fa8600	1187	* define a single channel to monitor with analog watchdog
AnnaBridge	157:e7ca05fa8600	1188	* from sequencer channel and groups definition.
AnnaBridge	157:e7ca05fa8600	1189	* @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
AnnaBridge	157:e7ca05fa8600	1190	* Example:
AnnaBridge	157:e7ca05fa8600	1191	* LL_ADC_SetAnalogWDMonitChannels(
AnnaBridge	157:e7ca05fa8600	1192	* ADC1, LL_ADC_AWD1,
AnnaBridge	157:e7ca05fa8600	1193	* __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
AnnaBridge	157:e7ca05fa8600	1194	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1195	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1196	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1197	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1198	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1199	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1200	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1201	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1202	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1203	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1204	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1205	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1206	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1207	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1208	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1209	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1210	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1211	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1212	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1213	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1214	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	157:e7ca05fa8600	1215	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	157:e7ca05fa8600	1216	* @arg @ref LL_ADC_CHANNEL_VLCD (1)(2)
AnnaBridge	157:e7ca05fa8600	1217	*
AnnaBridge	157:e7ca05fa8600	1218	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
AnnaBridge	157:e7ca05fa8600	1219	* (2) For ADC channel read back from ADC register,
AnnaBridge	157:e7ca05fa8600	1220	* comparison with internal channel parameter to be done
AnnaBridge	157:e7ca05fa8600	1221	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	157:e7ca05fa8600	1222	* @param __GROUP__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1223	* @arg @ref LL_ADC_GROUP_REGULAR
AnnaBridge	157:e7ca05fa8600	1224	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1225	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	157:e7ca05fa8600	1226	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	157:e7ca05fa8600	1227	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	157:e7ca05fa8600	1228	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	157:e7ca05fa8600	1229	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	157:e7ca05fa8600	1230	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	157:e7ca05fa8600	1231	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	157:e7ca05fa8600	1232	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	157:e7ca05fa8600	1233	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	157:e7ca05fa8600	1234	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	157:e7ca05fa8600	1235	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	157:e7ca05fa8600	1236	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	157:e7ca05fa8600	1237	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	157:e7ca05fa8600	1238	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	157:e7ca05fa8600	1239	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	157:e7ca05fa8600	1240	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	157:e7ca05fa8600	1241	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	157:e7ca05fa8600	1242	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	157:e7ca05fa8600	1243	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (1)
AnnaBridge	157:e7ca05fa8600	1244	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	157:e7ca05fa8600	1245	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	157:e7ca05fa8600	1246	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	157:e7ca05fa8600	1247	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	157:e7ca05fa8600	1248	* @arg @ref LL_ADC_AWD_CH_VLCD_REG (1)
AnnaBridge	157:e7ca05fa8600	1249	*
AnnaBridge	157:e7ca05fa8600	1250	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1251	*/
AnnaBridge	157:e7ca05fa8600	1252	#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) \
AnnaBridge	157:e7ca05fa8600	1253	(((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	157:e7ca05fa8600	1254
AnnaBridge	157:e7ca05fa8600	1255	/**
AnnaBridge	157:e7ca05fa8600	1256	* @brief Helper macro to set the value of ADC analog watchdog threshold high
AnnaBridge	157:e7ca05fa8600	1257	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	157:e7ca05fa8600	1258	* different of 12 bits.
AnnaBridge	157:e7ca05fa8600	1259	* @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
AnnaBridge	157:e7ca05fa8600	1260	* or @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	1261	* Example, with a ADC resolution of 8 bits, to set the value of
AnnaBridge	157:e7ca05fa8600	1262	* analog watchdog threshold high (on 8 bits):
AnnaBridge	157:e7ca05fa8600	1263	* LL_ADC_SetAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	1264	* (< ADCx param >,
AnnaBridge	157:e7ca05fa8600	1265	* __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8_bits>)
AnnaBridge	157:e7ca05fa8600	1266	* );
AnnaBridge	157:e7ca05fa8600	1267	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1268	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1269	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1270	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1271	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1272	* @param __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1273	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1274	*/
AnnaBridge	157:e7ca05fa8600	1275	#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
AnnaBridge	157:e7ca05fa8600	1276	((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	157:e7ca05fa8600	1277
AnnaBridge	157:e7ca05fa8600	1278	/**
AnnaBridge	157:e7ca05fa8600	1279	* @brief Helper macro to get the value of ADC analog watchdog threshold high
AnnaBridge	157:e7ca05fa8600	1280	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	157:e7ca05fa8600	1281	* different of 12 bits.
AnnaBridge	157:e7ca05fa8600	1282	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	1283	* Example, with a ADC resolution of 8 bits, to get the value of
AnnaBridge	157:e7ca05fa8600	1284	* analog watchdog threshold high (on 8 bits):
AnnaBridge	157:e7ca05fa8600	1285	* < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
AnnaBridge	157:e7ca05fa8600	1286	* (LL_ADC_RESOLUTION_8B,
AnnaBridge	157:e7ca05fa8600	1287	* LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
AnnaBridge	157:e7ca05fa8600	1288	* );
AnnaBridge	157:e7ca05fa8600	1289	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1290	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1291	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1292	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1293	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1294	* @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1295	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1296	*/
AnnaBridge	157:e7ca05fa8600	1297	#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
AnnaBridge	157:e7ca05fa8600	1298	((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	157:e7ca05fa8600	1299
AnnaBridge	157:e7ca05fa8600	1300	/**
AnnaBridge	157:e7ca05fa8600	1301	* @brief Helper macro to get the ADC analog watchdog threshold high
AnnaBridge	157:e7ca05fa8600	1302	* or low from raw value containing both thresholds concatenated.
AnnaBridge	157:e7ca05fa8600	1303	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	1304	* Example, to get analog watchdog threshold high from the register raw value:
AnnaBridge	157:e7ca05fa8600	1305	* __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both_thresholds>);
AnnaBridge	157:e7ca05fa8600	1306	* @param __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1307	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	157:e7ca05fa8600	1308	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	157:e7ca05fa8600	1309	* @param __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	157:e7ca05fa8600	1310	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1311	*/
AnnaBridge	157:e7ca05fa8600	1312	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
AnnaBridge	157:e7ca05fa8600	1313	(((__AWD_THRESHOLD_TYPE__) == LL_ADC_AWD_THRESHOLD_LOW) \
AnnaBridge	157:e7ca05fa8600	1314	? ( \
AnnaBridge	157:e7ca05fa8600	1315	(__AWD_THRESHOLDS__) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	157:e7ca05fa8600	1316	) \
AnnaBridge	157:e7ca05fa8600	1317	: \
AnnaBridge	157:e7ca05fa8600	1318	( \
AnnaBridge	157:e7ca05fa8600	1319	((__AWD_THRESHOLDS__) >> ADC_TR_HT_BITOFFSET_POS) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	157:e7ca05fa8600	1320	) \
AnnaBridge	157:e7ca05fa8600	1321	)
AnnaBridge	157:e7ca05fa8600	1322
AnnaBridge	157:e7ca05fa8600	1323	/**
AnnaBridge	157:e7ca05fa8600	1324	* @brief Helper macro to select the ADC common instance
AnnaBridge	157:e7ca05fa8600	1325	* to which is belonging the selected ADC instance.
AnnaBridge	157:e7ca05fa8600	1326	* @note ADC common register instance can be used for:
AnnaBridge	157:e7ca05fa8600	1327	* - Set parameters common to several ADC instances
AnnaBridge	157:e7ca05fa8600	1328	* - Multimode (for devices with several ADC instances)
AnnaBridge	157:e7ca05fa8600	1329	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	157:e7ca05fa8600	1330	* @param __ADCx__ ADC instance
AnnaBridge	157:e7ca05fa8600	1331	* @retval ADC common register instance
AnnaBridge	157:e7ca05fa8600	1332	*/
AnnaBridge	157:e7ca05fa8600	1333	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	157:e7ca05fa8600	1334	(ADC1_COMMON)
AnnaBridge	157:e7ca05fa8600	1335
AnnaBridge	157:e7ca05fa8600	1336	/**
AnnaBridge	157:e7ca05fa8600	1337	* @brief Helper macro to check if all ADC instances sharing the same
AnnaBridge	157:e7ca05fa8600	1338	* ADC common instance are disabled.
AnnaBridge	157:e7ca05fa8600	1339	* @note This check is required by functions with setting conditioned to
AnnaBridge	157:e7ca05fa8600	1340	* ADC state:
AnnaBridge	157:e7ca05fa8600	1341	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	157:e7ca05fa8600	1342	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	157:e7ca05fa8600	1343	* @note On devices with only 1 ADC common instance, parameter of this macro
AnnaBridge	157:e7ca05fa8600	1344	* is useless and can be ignored (parameter kept for compatibility
AnnaBridge	157:e7ca05fa8600	1345	* with devices featuring several ADC common instances).
AnnaBridge	157:e7ca05fa8600	1346	* @param __ADCXY_COMMON__ ADC common instance
AnnaBridge	157:e7ca05fa8600	1347	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	167:84c0a372a020	1348	* @retval Value "0" if all ADC instances sharing the same ADC common instance
AnnaBridge	167:84c0a372a020	1349	* are disabled.
AnnaBridge	167:84c0a372a020	1350	* Value "1" if at least one ADC instance sharing the same ADC common instance
AnnaBridge	167:84c0a372a020	1351	* is enabled.
AnnaBridge	157:e7ca05fa8600	1352	*/
AnnaBridge	157:e7ca05fa8600	1353	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	157:e7ca05fa8600	1354	LL_ADC_IsEnabled(ADC1)
AnnaBridge	157:e7ca05fa8600	1355
AnnaBridge	157:e7ca05fa8600	1356	/**
AnnaBridge	157:e7ca05fa8600	1357	* @brief Helper macro to define the ADC conversion data full-scale digital
AnnaBridge	157:e7ca05fa8600	1358	* value corresponding to the selected ADC resolution.
AnnaBridge	157:e7ca05fa8600	1359	* @note ADC conversion data full-scale corresponds to voltage range
AnnaBridge	157:e7ca05fa8600	1360	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	157:e7ca05fa8600	1361	* (refer to reference manual).
AnnaBridge	157:e7ca05fa8600	1362	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1363	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1364	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1365	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1366	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1367	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	157:e7ca05fa8600	1368	*/
AnnaBridge	157:e7ca05fa8600	1369	#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1370	(((uint32_t)0xFFFU) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))
AnnaBridge	157:e7ca05fa8600	1371
AnnaBridge	157:e7ca05fa8600	1372	/**
AnnaBridge	157:e7ca05fa8600	1373	* @brief Helper macro to convert the ADC conversion data from
AnnaBridge	157:e7ca05fa8600	1374	* a resolution to another resolution.
AnnaBridge	157:e7ca05fa8600	1375	* @param __DATA__ ADC conversion data to be converted
AnnaBridge	157:e7ca05fa8600	1376	* @param __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
AnnaBridge	157:e7ca05fa8600	1377	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1378	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1379	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1380	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1381	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1382	* @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
AnnaBridge	157:e7ca05fa8600	1383	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1384	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1385	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1386	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1387	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1388	* @retval ADC conversion data to the requested resolution
AnnaBridge	157:e7ca05fa8600	1389	*/
AnnaBridge	157:e7ca05fa8600	1390	#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__, __ADC_RESOLUTION_CURRENT__, __ADC_RESOLUTION_TARGET__) \
AnnaBridge	157:e7ca05fa8600	1391	(((__DATA__) \
AnnaBridge	157:e7ca05fa8600	1392	<< ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U))) \
AnnaBridge	157:e7ca05fa8600	1393	>> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)) \
AnnaBridge	157:e7ca05fa8600	1394	)
AnnaBridge	157:e7ca05fa8600	1395
AnnaBridge	157:e7ca05fa8600	1396	/**
AnnaBridge	157:e7ca05fa8600	1397	* @brief Helper macro to calculate the voltage (unit: mVolt)
AnnaBridge	157:e7ca05fa8600	1398	* corresponding to a ADC conversion data (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1399	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	157:e7ca05fa8600	1400	* user board environment or can be calculated using ADC measurement
AnnaBridge	157:e7ca05fa8600	1401	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	157:e7ca05fa8600	1402	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1403	* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	157:e7ca05fa8600	1404	* (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1405	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1406	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1407	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1408	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1409	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1410	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	157:e7ca05fa8600	1411	*/
AnnaBridge	157:e7ca05fa8600	1412	#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	157:e7ca05fa8600	1413	__ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1414	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1415	((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
AnnaBridge	157:e7ca05fa8600	1416	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1417	)
AnnaBridge	157:e7ca05fa8600	1418
AnnaBridge	157:e7ca05fa8600	1419	/**
AnnaBridge	157:e7ca05fa8600	1420	* @brief Helper macro to calculate analog reference voltage (Vref+)
AnnaBridge	157:e7ca05fa8600	1421	* (unit: mVolt) from ADC conversion data of internal voltage
AnnaBridge	157:e7ca05fa8600	1422	* reference VrefInt.
AnnaBridge	157:e7ca05fa8600	1423	* @note Computation is using VrefInt calibration value
AnnaBridge	157:e7ca05fa8600	1424	* stored in system memory for each device during production.
AnnaBridge	157:e7ca05fa8600	1425	* @note This voltage depends on user board environment: voltage level
AnnaBridge	157:e7ca05fa8600	1426	* connected to pin Vref+.
AnnaBridge	157:e7ca05fa8600	1427	* On devices with small package, the pin Vref+ is not present
AnnaBridge	157:e7ca05fa8600	1428	* and internally bonded to pin Vdda.
AnnaBridge	157:e7ca05fa8600	1429	* @note On this STM32 serie, calibration data of internal voltage reference
AnnaBridge	157:e7ca05fa8600	1430	* VrefInt corresponds to a resolution of 12 bits,
AnnaBridge	157:e7ca05fa8600	1431	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	157:e7ca05fa8600	1432	* internal voltage reference VrefInt.
AnnaBridge	157:e7ca05fa8600	1433	* Otherwise, this macro performs the processing to scale
AnnaBridge	157:e7ca05fa8600	1434	* ADC conversion data to 12 bits.
AnnaBridge	157:e7ca05fa8600	1435	* @param __VREFINT_ADC_DATA__: ADC conversion data (resolution 12 bits)
AnnaBridge	157:e7ca05fa8600	1436	* of internal voltage reference VrefInt (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1437	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1438	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1439	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1440	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1441	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1442	* @retval Analog reference voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1443	*/
AnnaBridge	157:e7ca05fa8600	1444	#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1445	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1446	(((uint32_t)(VREFINT_CAL_ADDR) VREFINT_CAL_VREF) \
AnnaBridge	157:e7ca05fa8600	1447	/ __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
AnnaBridge	157:e7ca05fa8600	1448	(__ADC_RESOLUTION__), \
AnnaBridge	157:e7ca05fa8600	1449	LL_ADC_RESOLUTION_12B) \
AnnaBridge	157:e7ca05fa8600	1450	)
AnnaBridge	157:e7ca05fa8600	1451
AnnaBridge	167:84c0a372a020	1452	/* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
AnnaBridge	167:84c0a372a020	1453	/* Therefore, helper macro __LL_ADC_CALC_TEMPERATURE() is not available.*/
AnnaBridge	167:84c0a372a020	1454	/* Use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(). */
AnnaBridge	167:84c0a372a020	1455	#if !defined(STM32L011xx)
AnnaBridge	157:e7ca05fa8600	1456	/**
AnnaBridge	157:e7ca05fa8600	1457	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1458	* from ADC conversion data of internal temperature sensor.
AnnaBridge	157:e7ca05fa8600	1459	* @note Computation is using temperature sensor calibration values
AnnaBridge	157:e7ca05fa8600	1460	* stored in system memory for each device during production.
AnnaBridge	157:e7ca05fa8600	1461	* @note Calculation formula:
AnnaBridge	157:e7ca05fa8600	1462	* Temperature = ((TS_ADC_DATA - TS_CAL1)
AnnaBridge	157:e7ca05fa8600	1463	* * (TS_CAL2_TEMP - TS_CAL1_TEMP))
AnnaBridge	157:e7ca05fa8600	1464	* / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
AnnaBridge	157:e7ca05fa8600	1465	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	157:e7ca05fa8600	1466	* Avg_Slope = (TS_CAL2 - TS_CAL1)
AnnaBridge	157:e7ca05fa8600	1467	* / (TS_CAL2_TEMP - TS_CAL1_TEMP)
AnnaBridge	157:e7ca05fa8600	1468	* TS_CAL1 = equivalent TS_ADC_DATA at temperature
AnnaBridge	157:e7ca05fa8600	1469	* TEMP_DEGC_CAL1 (calibrated in factory)
AnnaBridge	157:e7ca05fa8600	1470	* TS_CAL2 = equivalent TS_ADC_DATA at temperature
AnnaBridge	157:e7ca05fa8600	1471	* TEMP_DEGC_CAL2 (calibrated in factory)
AnnaBridge	157:e7ca05fa8600	1472	* Caution: Calculation relevancy under reserve that calibration
AnnaBridge	157:e7ca05fa8600	1473	* parameters are correct (address and data).
AnnaBridge	157:e7ca05fa8600	1474	* To calculate temperature using temperature sensor
AnnaBridge	157:e7ca05fa8600	1475	* datasheet typical values (generic values less, therefore
AnnaBridge	157:e7ca05fa8600	1476	* less accurate than calibrated values),
AnnaBridge	157:e7ca05fa8600	1477	* use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
AnnaBridge	157:e7ca05fa8600	1478	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	157:e7ca05fa8600	1479	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	157:e7ca05fa8600	1480	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	157:e7ca05fa8600	1481	* user board environment or can be calculated using ADC measurement
AnnaBridge	157:e7ca05fa8600	1482	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	157:e7ca05fa8600	1483	* @note On this STM32 serie, calibration data of temperature sensor
AnnaBridge	157:e7ca05fa8600	1484	* corresponds to a resolution of 12 bits,
AnnaBridge	157:e7ca05fa8600	1485	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	157:e7ca05fa8600	1486	* temperature sensor.
AnnaBridge	157:e7ca05fa8600	1487	* Otherwise, this macro performs the processing to scale
AnnaBridge	157:e7ca05fa8600	1488	* ADC conversion data to 12 bits.
AnnaBridge	157:e7ca05fa8600	1489	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1490	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
AnnaBridge	157:e7ca05fa8600	1491	* temperature sensor (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1492	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
AnnaBridge	157:e7ca05fa8600	1493	* sensor voltage has been measured.
AnnaBridge	157:e7ca05fa8600	1494	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1495	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1496	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1497	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1498	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1499	* @retval Temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1500	*/
AnnaBridge	157:e7ca05fa8600	1501	#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	157:e7ca05fa8600	1502	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1503	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1504	(((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
AnnaBridge	157:e7ca05fa8600	1505	(__ADC_RESOLUTION__), \
AnnaBridge	157:e7ca05fa8600	1506	LL_ADC_RESOLUTION_12B) \
AnnaBridge	157:e7ca05fa8600	1507	* (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	157:e7ca05fa8600	1508	/ TEMPSENSOR_CAL_VREFANALOG) \
AnnaBridge	157:e7ca05fa8600	1509	- (int32_t) *TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	157:e7ca05fa8600	1510	) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
AnnaBridge	157:e7ca05fa8600	1511	) / (int32_t)((int32_t)TEMPSENSOR_CAL2_ADDR - (int32_t)TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	157:e7ca05fa8600	1512	) + TEMPSENSOR_CAL1_TEMP \
AnnaBridge	157:e7ca05fa8600	1513	)
AnnaBridge	167:84c0a372a020	1514	#endif
AnnaBridge	157:e7ca05fa8600	1515
AnnaBridge	157:e7ca05fa8600	1516	/**
AnnaBridge	157:e7ca05fa8600	1517	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1518	* from ADC conversion data of internal temperature sensor.
AnnaBridge	157:e7ca05fa8600	1519	* @note Computation is using temperature sensor typical values
AnnaBridge	157:e7ca05fa8600	1520	* (refer to device datasheet).
AnnaBridge	157:e7ca05fa8600	1521	* @note Calculation formula:
AnnaBridge	157:e7ca05fa8600	1522	* Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
AnnaBridge	157:e7ca05fa8600	1523	* / Avg_Slope + CALx_TEMP
AnnaBridge	157:e7ca05fa8600	1524	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	157:e7ca05fa8600	1525	* (unit: digital value)
AnnaBridge	157:e7ca05fa8600	1526	* Avg_Slope = temperature sensor slope
AnnaBridge	157:e7ca05fa8600	1527	* (unit: uV/Degree Celsius)
AnnaBridge	157:e7ca05fa8600	1528	* TS_TYP_CALx_VOLT = temperature sensor digital value at
AnnaBridge	157:e7ca05fa8600	1529	* temperature CALx_TEMP (unit: mV)
AnnaBridge	157:e7ca05fa8600	1530	* Caution: Calculation relevancy under reserve the temperature sensor
AnnaBridge	157:e7ca05fa8600	1531	* of the current device has characteristics in line with
AnnaBridge	157:e7ca05fa8600	1532	* datasheet typical values.
AnnaBridge	157:e7ca05fa8600	1533	* If temperature sensor calibration values are available on
AnnaBridge	157:e7ca05fa8600	1534	* on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
AnnaBridge	157:e7ca05fa8600	1535	* temperature calculation will be more accurate using
AnnaBridge	157:e7ca05fa8600	1536	* helper macro @ref __LL_ADC_CALC_TEMPERATURE().
AnnaBridge	157:e7ca05fa8600	1537	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	157:e7ca05fa8600	1538	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	157:e7ca05fa8600	1539	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	157:e7ca05fa8600	1540	* user board environment or can be calculated using ADC measurement
AnnaBridge	157:e7ca05fa8600	1541	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	157:e7ca05fa8600	1542	* @note ADC measurement data must correspond to a resolution of 12bits
AnnaBridge	157:e7ca05fa8600	1543	* (full scale digital value 4095). If not the case, the data must be
AnnaBridge	157:e7ca05fa8600	1544	* preliminarily rescaled to an equivalent resolution of 12 bits.
AnnaBridge	157:e7ca05fa8600	1545	* @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
AnnaBridge	157:e7ca05fa8600	1546	* On STM32L0, refer to device datasheet parameter "Avg_Slope".
AnnaBridge	157:e7ca05fa8600	1547	* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
AnnaBridge	157:e7ca05fa8600	1548	* On STM32L0, refer to device datasheet parameter "V130" (corresponding to TS_CAL2).
AnnaBridge	157:e7ca05fa8600	1549	* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
AnnaBridge	157:e7ca05fa8600	1550	* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1551	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1552	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
AnnaBridge	157:e7ca05fa8600	1553	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1554	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1555	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1556	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1557	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1558	* @retval Temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1559	*/
AnnaBridge	157:e7ca05fa8600	1560	#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
AnnaBridge	157:e7ca05fa8600	1561	__TEMPSENSOR_TYP_CALX_V__,\
AnnaBridge	157:e7ca05fa8600	1562	__TEMPSENSOR_CALX_TEMP__,\
AnnaBridge	157:e7ca05fa8600	1563	__VREFANALOG_VOLTAGE__,\
AnnaBridge	157:e7ca05fa8600	1564	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1565	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1566	((( ( \
AnnaBridge	157:e7ca05fa8600	1567	(int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	157:e7ca05fa8600	1568	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
AnnaBridge	157:e7ca05fa8600	1569	* 1000) \
AnnaBridge	157:e7ca05fa8600	1570	- \
AnnaBridge	157:e7ca05fa8600	1571	(int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
AnnaBridge	157:e7ca05fa8600	1572	* 1000) \
AnnaBridge	157:e7ca05fa8600	1573	) \
AnnaBridge	157:e7ca05fa8600	1574	) / (__TEMPSENSOR_TYP_AVGSLOPE__) \
AnnaBridge	157:e7ca05fa8600	1575	) + (__TEMPSENSOR_CALX_TEMP__) \
AnnaBridge	157:e7ca05fa8600	1576	)
AnnaBridge	157:e7ca05fa8600	1577
AnnaBridge	157:e7ca05fa8600	1578	/**
AnnaBridge	157:e7ca05fa8600	1579	* @}
AnnaBridge	157:e7ca05fa8600	1580	*/
AnnaBridge	157:e7ca05fa8600	1581
AnnaBridge	157:e7ca05fa8600	1582	/**
AnnaBridge	157:e7ca05fa8600	1583	* @}
AnnaBridge	157:e7ca05fa8600	1584	*/
AnnaBridge	157:e7ca05fa8600	1585
AnnaBridge	157:e7ca05fa8600	1586
AnnaBridge	157:e7ca05fa8600	1587	/* Exported functions --------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	1588	/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
AnnaBridge	157:e7ca05fa8600	1589	* @{
AnnaBridge	157:e7ca05fa8600	1590	*/
AnnaBridge	157:e7ca05fa8600	1591
AnnaBridge	157:e7ca05fa8600	1592	/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
AnnaBridge	157:e7ca05fa8600	1593	* @{
AnnaBridge	157:e7ca05fa8600	1594	*/
AnnaBridge	157:e7ca05fa8600	1595	/* Note: LL ADC functions to set DMA transfer are located into sections of */
AnnaBridge	157:e7ca05fa8600	1596	/* configuration of ADC instance, groups and multimode (if available): */
AnnaBridge	157:e7ca05fa8600	1597	/* @ref LL_ADC_REG_SetDMATransfer(), ... */
AnnaBridge	157:e7ca05fa8600	1598
AnnaBridge	157:e7ca05fa8600	1599	/**
AnnaBridge	157:e7ca05fa8600	1600	* @brief Function to help to configure DMA transfer from ADC: retrieve the
AnnaBridge	157:e7ca05fa8600	1601	* ADC register address from ADC instance and a list of ADC registers
AnnaBridge	157:e7ca05fa8600	1602	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	157:e7ca05fa8600	1603	* @note These ADC registers are data registers:
AnnaBridge	157:e7ca05fa8600	1604	* when ADC conversion data is available in ADC data registers,
AnnaBridge	157:e7ca05fa8600	1605	* ADC generates a DMA transfer request.
AnnaBridge	157:e7ca05fa8600	1606	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	157:e7ca05fa8600	1607	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	157:e7ca05fa8600	1608	* Example:
AnnaBridge	157:e7ca05fa8600	1609	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	157:e7ca05fa8600	1610	* LL_DMA_CHANNEL_1,
AnnaBridge	157:e7ca05fa8600	1611	* LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
AnnaBridge	157:e7ca05fa8600	1612	* (uint32_t)&< array or variable >,
AnnaBridge	157:e7ca05fa8600	1613	* LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
AnnaBridge	157:e7ca05fa8600	1614	* @note For devices with several ADC: in multimode, some devices
AnnaBridge	157:e7ca05fa8600	1615	* use a different data register outside of ADC instance scope
AnnaBridge	157:e7ca05fa8600	1616	* (common data register). This macro manages this register difference,
AnnaBridge	157:e7ca05fa8600	1617	* only ADC instance has to be set as parameter.
AnnaBridge	157:e7ca05fa8600	1618	* @rmtoll DR DATA LL_ADC_DMA_GetRegAddr
AnnaBridge	157:e7ca05fa8600	1619	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1620	* @param Register This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1621	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
AnnaBridge	157:e7ca05fa8600	1622	* @retval ADC register address
AnnaBridge	157:e7ca05fa8600	1623	*/
AnnaBridge	157:e7ca05fa8600	1624	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
AnnaBridge	157:e7ca05fa8600	1625	{
AnnaBridge	157:e7ca05fa8600	1626	/* Retrieve address of register DR */
AnnaBridge	157:e7ca05fa8600	1627	return (uint32_t)&(ADCx->DR);
AnnaBridge	157:e7ca05fa8600	1628	}
AnnaBridge	157:e7ca05fa8600	1629
AnnaBridge	157:e7ca05fa8600	1630	/**
AnnaBridge	157:e7ca05fa8600	1631	* @}
AnnaBridge	157:e7ca05fa8600	1632	*/
AnnaBridge	157:e7ca05fa8600	1633
AnnaBridge	157:e7ca05fa8600	1634	/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
AnnaBridge	157:e7ca05fa8600	1635	* @{
AnnaBridge	157:e7ca05fa8600	1636	*/
AnnaBridge	157:e7ca05fa8600	1637
AnnaBridge	157:e7ca05fa8600	1638	/**
AnnaBridge	157:e7ca05fa8600	1639	* @brief Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1640	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1641	* ADC state:
AnnaBridge	157:e7ca05fa8600	1642	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	157:e7ca05fa8600	1643	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	157:e7ca05fa8600	1644	* ADC instance or by using helper macro helper macro
AnnaBridge	157:e7ca05fa8600	1645	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	157:e7ca05fa8600	1646	* @rmtoll CCR PRESC LL_ADC_SetCommonClock
AnnaBridge	157:e7ca05fa8600	1647	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1648	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1649	* @param CommonClock This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1650	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 (1)
AnnaBridge	157:e7ca05fa8600	1651	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 (1)
AnnaBridge	157:e7ca05fa8600	1652	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 (1)
AnnaBridge	157:e7ca05fa8600	1653	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 (1)
AnnaBridge	157:e7ca05fa8600	1654	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 (1)
AnnaBridge	157:e7ca05fa8600	1655	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 (1)
AnnaBridge	157:e7ca05fa8600	1656	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 (1)
AnnaBridge	157:e7ca05fa8600	1657	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 (1)
AnnaBridge	157:e7ca05fa8600	1658	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 (1)
AnnaBridge	157:e7ca05fa8600	1659	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 (1)
AnnaBridge	157:e7ca05fa8600	1660	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
AnnaBridge	157:e7ca05fa8600	1661	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
AnnaBridge	157:e7ca05fa8600	1662	*
AnnaBridge	157:e7ca05fa8600	1663	* (1) ADC common clock asynchonous prescaler is applied to
AnnaBridge	157:e7ca05fa8600	1664	* each ADC instance if the corresponding ADC instance clock
AnnaBridge	157:e7ca05fa8600	1665	* is set to clock source asynchronous.
AnnaBridge	157:e7ca05fa8600	1666	* (refer to function @ref LL_ADC_SetClock() ).
AnnaBridge	157:e7ca05fa8600	1667	* @retval None
AnnaBridge	157:e7ca05fa8600	1668	*/
AnnaBridge	157:e7ca05fa8600	1669	__STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
AnnaBridge	157:e7ca05fa8600	1670	{
AnnaBridge	157:e7ca05fa8600	1671	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_PRESC, CommonClock);
AnnaBridge	157:e7ca05fa8600	1672	}
AnnaBridge	157:e7ca05fa8600	1673
AnnaBridge	157:e7ca05fa8600	1674	/**
AnnaBridge	157:e7ca05fa8600	1675	* @brief Get parameter common to several ADC: Clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1676	* @rmtoll CCR PRESC LL_ADC_GetCommonClock
AnnaBridge	157:e7ca05fa8600	1677	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1678	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1679	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1680	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 (1)
AnnaBridge	157:e7ca05fa8600	1681	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 (1)
AnnaBridge	157:e7ca05fa8600	1682	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 (1)
AnnaBridge	157:e7ca05fa8600	1683	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 (1)
AnnaBridge	157:e7ca05fa8600	1684	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 (1)
AnnaBridge	157:e7ca05fa8600	1685	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 (1)
AnnaBridge	157:e7ca05fa8600	1686	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 (1)
AnnaBridge	157:e7ca05fa8600	1687	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 (1)
AnnaBridge	157:e7ca05fa8600	1688	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 (1)
AnnaBridge	157:e7ca05fa8600	1689	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 (1)
AnnaBridge	157:e7ca05fa8600	1690	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
AnnaBridge	157:e7ca05fa8600	1691	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
AnnaBridge	157:e7ca05fa8600	1692	*
AnnaBridge	157:e7ca05fa8600	1693	* (1) ADC common clock asynchonous prescaler is applied to
AnnaBridge	157:e7ca05fa8600	1694	* each ADC instance if the corresponding ADC instance clock
AnnaBridge	157:e7ca05fa8600	1695	* is set to clock source asynchronous.
AnnaBridge	157:e7ca05fa8600	1696	* (refer to function @ref LL_ADC_SetClock() ).
AnnaBridge	157:e7ca05fa8600	1697	*/
AnnaBridge	157:e7ca05fa8600	1698	__STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	157:e7ca05fa8600	1699	{
AnnaBridge	157:e7ca05fa8600	1700	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_PRESC));
AnnaBridge	157:e7ca05fa8600	1701	}
AnnaBridge	157:e7ca05fa8600	1702
AnnaBridge	157:e7ca05fa8600	1703	/**
AnnaBridge	157:e7ca05fa8600	1704	* @brief Set parameter common to several ADC: Clock low frequency mode.
AnnaBridge	157:e7ca05fa8600	1705	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1706	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1707	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1708	* ADC state:
AnnaBridge	157:e7ca05fa8600	1709	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	1710	* on group regular.
AnnaBridge	157:e7ca05fa8600	1711	* @rmtoll CCR LFMEN LL_ADC_SetCommonFrequencyMode
AnnaBridge	157:e7ca05fa8600	1712	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1713	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1714	* @param Resolution This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1715	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
AnnaBridge	157:e7ca05fa8600	1716	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
AnnaBridge	157:e7ca05fa8600	1717	* @retval None
AnnaBridge	157:e7ca05fa8600	1718	*/
AnnaBridge	157:e7ca05fa8600	1719	__STATIC_INLINE void LL_ADC_SetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Resolution)
AnnaBridge	157:e7ca05fa8600	1720	{
AnnaBridge	157:e7ca05fa8600	1721	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_LFMEN, Resolution);
AnnaBridge	157:e7ca05fa8600	1722	}
AnnaBridge	157:e7ca05fa8600	1723
AnnaBridge	157:e7ca05fa8600	1724	/**
AnnaBridge	157:e7ca05fa8600	1725	* @brief Get parameter common to several ADC: Clock low frequency mode.
AnnaBridge	157:e7ca05fa8600	1726	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1727	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1728	* @rmtoll CCR LFMEN LL_ADC_GetCommonFrequencyMode
AnnaBridge	157:e7ca05fa8600	1729	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1730	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1731	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1732	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
AnnaBridge	157:e7ca05fa8600	1733	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
AnnaBridge	157:e7ca05fa8600	1734	*/
AnnaBridge	157:e7ca05fa8600	1735	__STATIC_INLINE uint32_t LL_ADC_GetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	157:e7ca05fa8600	1736	{
AnnaBridge	157:e7ca05fa8600	1737	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_LFMEN));
AnnaBridge	157:e7ca05fa8600	1738	}
AnnaBridge	157:e7ca05fa8600	1739
AnnaBridge	157:e7ca05fa8600	1740	/**
AnnaBridge	157:e7ca05fa8600	1741	* @brief Set parameter common to several ADC: measurement path to internal
AnnaBridge	157:e7ca05fa8600	1742	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	157:e7ca05fa8600	1743	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	1744	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	157:e7ca05fa8600	1745	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	157:e7ca05fa8600	1746	* @note Stabilization time of measurement path to internal channel:
AnnaBridge	157:e7ca05fa8600	1747	* After enabling internal paths, before starting ADC conversion,
AnnaBridge	157:e7ca05fa8600	1748	* a delay is required for internal voltage reference and
AnnaBridge	157:e7ca05fa8600	1749	* temperature sensor stabilization time.
AnnaBridge	157:e7ca05fa8600	1750	* Refer to device datasheet.
AnnaBridge	157:e7ca05fa8600	1751	* Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
AnnaBridge	157:e7ca05fa8600	1752	* Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
AnnaBridge	157:e7ca05fa8600	1753	* @note ADC internal channel sampling time constraint:
AnnaBridge	157:e7ca05fa8600	1754	* For ADC conversion of internal channels,
AnnaBridge	157:e7ca05fa8600	1755	* a sampling time minimum value is required.
AnnaBridge	157:e7ca05fa8600	1756	* Refer to device datasheet.
AnnaBridge	157:e7ca05fa8600	1757	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1758	* ADC state:
AnnaBridge	157:e7ca05fa8600	1759	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	157:e7ca05fa8600	1760	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	157:e7ca05fa8600	1761	* ADC instance or by using helper macro helper macro
AnnaBridge	157:e7ca05fa8600	1762	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	157:e7ca05fa8600	1763	* @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1764	* CCR TSEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1765	* CCR VLCDEN LL_ADC_SetCommonPathInternalCh
AnnaBridge	157:e7ca05fa8600	1766	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1767	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1768	* @param PathInternal This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	1769	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	157:e7ca05fa8600	1770	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	157:e7ca05fa8600	1771	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1772	* @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
AnnaBridge	157:e7ca05fa8600	1773	*
AnnaBridge	157:e7ca05fa8600	1774	* (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1775	* @retval None
AnnaBridge	157:e7ca05fa8600	1776	*/
AnnaBridge	157:e7ca05fa8600	1777	__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
AnnaBridge	157:e7ca05fa8600	1778	{
AnnaBridge	157:e7ca05fa8600	1779	#if defined (ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	1780	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VLCDEN, PathInternal);
AnnaBridge	157:e7ca05fa8600	1781	#else
AnnaBridge	157:e7ca05fa8600	1782	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN, PathInternal);
AnnaBridge	157:e7ca05fa8600	1783	#endif
AnnaBridge	157:e7ca05fa8600	1784	}
AnnaBridge	157:e7ca05fa8600	1785
AnnaBridge	157:e7ca05fa8600	1786	/**
AnnaBridge	157:e7ca05fa8600	1787	* @brief Get parameter common to several ADC: measurement path to internal
AnnaBridge	157:e7ca05fa8600	1788	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	157:e7ca05fa8600	1789	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	1790	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	157:e7ca05fa8600	1791	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	157:e7ca05fa8600	1792	* @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1793	* CCR TSEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1794	* CCR VLCDEN LL_ADC_GetCommonPathInternalCh
AnnaBridge	157:e7ca05fa8600	1795	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1796	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1797	* @retval Returned value can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	1798	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	157:e7ca05fa8600	1799	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	157:e7ca05fa8600	1800	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1801	* @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
AnnaBridge	157:e7ca05fa8600	1802	*
AnnaBridge	157:e7ca05fa8600	1803	* (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1804	*/
AnnaBridge	157:e7ca05fa8600	1805	__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	157:e7ca05fa8600	1806	{
AnnaBridge	157:e7ca05fa8600	1807	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	1808	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VLCDEN));
AnnaBridge	157:e7ca05fa8600	1809	#else
AnnaBridge	157:e7ca05fa8600	1810	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN));
AnnaBridge	157:e7ca05fa8600	1811	#endif
AnnaBridge	157:e7ca05fa8600	1812	}
AnnaBridge	157:e7ca05fa8600	1813
AnnaBridge	157:e7ca05fa8600	1814	/**
AnnaBridge	157:e7ca05fa8600	1815	* @}
AnnaBridge	157:e7ca05fa8600	1816	*/
AnnaBridge	157:e7ca05fa8600	1817
AnnaBridge	157:e7ca05fa8600	1818	/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
AnnaBridge	157:e7ca05fa8600	1819	* @{
AnnaBridge	157:e7ca05fa8600	1820	*/
AnnaBridge	157:e7ca05fa8600	1821
AnnaBridge	157:e7ca05fa8600	1822	/**
AnnaBridge	157:e7ca05fa8600	1823	* @brief Set ADC instance clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1824	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1825	* ADC state:
AnnaBridge	157:e7ca05fa8600	1826	* ADC must be disabled.
AnnaBridge	157:e7ca05fa8600	1827	* @rmtoll CFGR2 CKMODE LL_ADC_SetClock
AnnaBridge	157:e7ca05fa8600	1828	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1829	* @param ClockSource This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1830	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	157:e7ca05fa8600	1831	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	157:e7ca05fa8600	1832	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
AnnaBridge	157:e7ca05fa8600	1833	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	157:e7ca05fa8600	1834	*
AnnaBridge	157:e7ca05fa8600	1835	* (1) Asynchronous clock prescaler can be configured using
AnnaBridge	157:e7ca05fa8600	1836	* function @ref LL_ADC_SetCommonClock().\n
AnnaBridge	157:e7ca05fa8600	1837	* (2) Caution: This parameter has some clock ratio constraints:
AnnaBridge	157:e7ca05fa8600	1838	* This configuration must be enabled only if PCLK has a 50%
AnnaBridge	157:e7ca05fa8600	1839	* duty clock cycle (APB prescaler configured inside the RCC
AnnaBridge	157:e7ca05fa8600	1840	* must be bypassed and the system clock must by 50% duty
AnnaBridge	157:e7ca05fa8600	1841	* cycle).
AnnaBridge	157:e7ca05fa8600	1842	* Refer to reference manual.
AnnaBridge	157:e7ca05fa8600	1843	* @retval None
AnnaBridge	157:e7ca05fa8600	1844	*/
AnnaBridge	157:e7ca05fa8600	1845	__STATIC_INLINE void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
AnnaBridge	157:e7ca05fa8600	1846	{
AnnaBridge	157:e7ca05fa8600	1847	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource);
AnnaBridge	157:e7ca05fa8600	1848	}
AnnaBridge	157:e7ca05fa8600	1849
AnnaBridge	157:e7ca05fa8600	1850	/**
AnnaBridge	157:e7ca05fa8600	1851	* @brief Get ADC instance clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1852	* @rmtoll CFGR2 CKMODE LL_ADC_GetClock
AnnaBridge	157:e7ca05fa8600	1853	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1854	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1855	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	157:e7ca05fa8600	1856	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	157:e7ca05fa8600	1857	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
AnnaBridge	157:e7ca05fa8600	1858	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	157:e7ca05fa8600	1859	*
AnnaBridge	157:e7ca05fa8600	1860	* (1) Asynchronous clock prescaler can be retrieved using
AnnaBridge	157:e7ca05fa8600	1861	* function @ref LL_ADC_GetCommonClock().\n
AnnaBridge	157:e7ca05fa8600	1862	* (2) Caution: This parameter has some clock ratio constraints:
AnnaBridge	157:e7ca05fa8600	1863	* This configuration must be enabled only if PCLK has a 50%
AnnaBridge	157:e7ca05fa8600	1864	* duty clock cycle (APB prescaler configured inside the RCC
AnnaBridge	157:e7ca05fa8600	1865	* must be bypassed and the system clock must by 50% duty
AnnaBridge	157:e7ca05fa8600	1866	* cycle).
AnnaBridge	157:e7ca05fa8600	1867	* Refer to reference manual.
AnnaBridge	157:e7ca05fa8600	1868	*/
AnnaBridge	157:e7ca05fa8600	1869	__STATIC_INLINE uint32_t LL_ADC_GetClock(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1870	{
AnnaBridge	157:e7ca05fa8600	1871	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE));
AnnaBridge	157:e7ca05fa8600	1872	}
AnnaBridge	157:e7ca05fa8600	1873
AnnaBridge	157:e7ca05fa8600	1874	/**
AnnaBridge	157:e7ca05fa8600	1875	* @brief Set ADC calibration factor in the mode single-ended
AnnaBridge	157:e7ca05fa8600	1876	* or differential (for devices with differential mode available).
AnnaBridge	157:e7ca05fa8600	1877	* @note This function is intended to set calibration parameters
AnnaBridge	157:e7ca05fa8600	1878	* without having to perform a new calibration using
AnnaBridge	157:e7ca05fa8600	1879	* @ref LL_ADC_StartCalibration().
AnnaBridge	157:e7ca05fa8600	1880	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1881	* ADC state:
AnnaBridge	157:e7ca05fa8600	1882	* ADC must be enabled, without calibration on going, without conversion
AnnaBridge	157:e7ca05fa8600	1883	* on going on group regular.
AnnaBridge	157:e7ca05fa8600	1884	* @rmtoll CALFACT CALFACT LL_ADC_SetCalibrationFactor
AnnaBridge	157:e7ca05fa8600	1885	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1886	* @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	157:e7ca05fa8600	1887	* @retval None
AnnaBridge	157:e7ca05fa8600	1888	*/
AnnaBridge	157:e7ca05fa8600	1889	__STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t CalibrationFactor)
AnnaBridge	157:e7ca05fa8600	1890	{
AnnaBridge	157:e7ca05fa8600	1891	MODIFY_REG(ADCx->CALFACT,
AnnaBridge	157:e7ca05fa8600	1892	ADC_CALFACT_CALFACT,
AnnaBridge	157:e7ca05fa8600	1893	CalibrationFactor);
AnnaBridge	157:e7ca05fa8600	1894	}
AnnaBridge	157:e7ca05fa8600	1895
AnnaBridge	157:e7ca05fa8600	1896	/**
AnnaBridge	157:e7ca05fa8600	1897	* @brief Get ADC calibration factor in the mode single-ended
AnnaBridge	157:e7ca05fa8600	1898	* or differential (for devices with differential mode available).
AnnaBridge	157:e7ca05fa8600	1899	* @note Calibration factors are set by hardware after performing
AnnaBridge	157:e7ca05fa8600	1900	* a calibration run using function @ref LL_ADC_StartCalibration().
AnnaBridge	157:e7ca05fa8600	1901	* @rmtoll CALFACT CALFACT LL_ADC_GetCalibrationFactor
AnnaBridge	157:e7ca05fa8600	1902	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1903	* @retval Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	157:e7ca05fa8600	1904	*/
AnnaBridge	157:e7ca05fa8600	1905	__STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1906	{
AnnaBridge	157:e7ca05fa8600	1907	return (uint32_t)(READ_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT));
AnnaBridge	157:e7ca05fa8600	1908	}
AnnaBridge	157:e7ca05fa8600	1909
AnnaBridge	157:e7ca05fa8600	1910	/**
AnnaBridge	157:e7ca05fa8600	1911	* @brief Set ADC resolution.
AnnaBridge	157:e7ca05fa8600	1912	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1913	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1914	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1915	* ADC state:
AnnaBridge	157:e7ca05fa8600	1916	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	1917	* on group regular.
AnnaBridge	157:e7ca05fa8600	1918	* @rmtoll CFGR1 RES LL_ADC_SetResolution
AnnaBridge	157:e7ca05fa8600	1919	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1920	* @param Resolution This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1921	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1922	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1923	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1924	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1925	* @retval None
AnnaBridge	157:e7ca05fa8600	1926	*/
AnnaBridge	157:e7ca05fa8600	1927	__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
AnnaBridge	157:e7ca05fa8600	1928	{
AnnaBridge	157:e7ca05fa8600	1929	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);
AnnaBridge	157:e7ca05fa8600	1930	}
AnnaBridge	157:e7ca05fa8600	1931
AnnaBridge	157:e7ca05fa8600	1932	/**
AnnaBridge	157:e7ca05fa8600	1933	* @brief Get ADC resolution.
AnnaBridge	157:e7ca05fa8600	1934	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1935	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1936	* @rmtoll CFGR1 RES LL_ADC_GetResolution
AnnaBridge	157:e7ca05fa8600	1937	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1938	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1939	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1940	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1941	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1942	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1943	*/
AnnaBridge	157:e7ca05fa8600	1944	__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1945	{
AnnaBridge	157:e7ca05fa8600	1946	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));
AnnaBridge	157:e7ca05fa8600	1947	}
AnnaBridge	157:e7ca05fa8600	1948
AnnaBridge	157:e7ca05fa8600	1949	/**
AnnaBridge	157:e7ca05fa8600	1950	* @brief Set ADC conversion data alignment.
AnnaBridge	157:e7ca05fa8600	1951	* @note Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1952	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1953	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1954	* ADC state:
AnnaBridge	157:e7ca05fa8600	1955	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	1956	* on group regular.
AnnaBridge	157:e7ca05fa8600	1957	* @rmtoll CFGR1 ALIGN LL_ADC_SetDataAlignment
AnnaBridge	157:e7ca05fa8600	1958	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1959	* @param DataAlignment This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1960	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	157:e7ca05fa8600	1961	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	157:e7ca05fa8600	1962	* @retval None
AnnaBridge	157:e7ca05fa8600	1963	*/
AnnaBridge	157:e7ca05fa8600	1964	__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
AnnaBridge	157:e7ca05fa8600	1965	{
AnnaBridge	157:e7ca05fa8600	1966	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);
AnnaBridge	157:e7ca05fa8600	1967	}
AnnaBridge	157:e7ca05fa8600	1968
AnnaBridge	157:e7ca05fa8600	1969	/**
AnnaBridge	157:e7ca05fa8600	1970	* @brief Get ADC conversion data alignment.
AnnaBridge	157:e7ca05fa8600	1971	* @note Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1972	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1973	* @rmtoll CFGR1 ALIGN LL_ADC_GetDataAlignment
AnnaBridge	157:e7ca05fa8600	1974	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1975	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1976	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	157:e7ca05fa8600	1977	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	157:e7ca05fa8600	1978	*/
AnnaBridge	157:e7ca05fa8600	1979	__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1980	{
AnnaBridge	157:e7ca05fa8600	1981	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));
AnnaBridge	157:e7ca05fa8600	1982	}
AnnaBridge	157:e7ca05fa8600	1983
AnnaBridge	157:e7ca05fa8600	1984	/**
AnnaBridge	157:e7ca05fa8600	1985	* @brief Set ADC low power mode.
AnnaBridge	157:e7ca05fa8600	1986	* @note Description of ADC low power modes:
AnnaBridge	157:e7ca05fa8600	1987	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	157:e7ca05fa8600	1988	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	157:e7ca05fa8600	1989	* in order to reduce power consumption.
AnnaBridge	157:e7ca05fa8600	1990	* New ADC conversion starts only when the previous
AnnaBridge	157:e7ca05fa8600	1991	* unitary conversion data (for ADC group regular)
AnnaBridge	157:e7ca05fa8600	1992	* has been retrieved by user software.
AnnaBridge	157:e7ca05fa8600	1993	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	157:e7ca05fa8600	1994	* other conversion.
AnnaBridge	157:e7ca05fa8600	1995	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	157:e7ca05fa8600	1996	* triggers to the speed of the software that reads the data.
AnnaBridge	157:e7ca05fa8600	1997	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	157:e7ca05fa8600	1998	* applications.
AnnaBridge	157:e7ca05fa8600	1999	* How to use this low power mode:
AnnaBridge	157:e7ca05fa8600	2000	* - Do not use with interruption or DMA since these modes
AnnaBridge	157:e7ca05fa8600	2001	* have to clear immediately the EOC flag to free the
AnnaBridge	157:e7ca05fa8600	2002	* IRQ vector sequencer.
AnnaBridge	157:e7ca05fa8600	2003	* - Do use with polling: 1. Start conversion,
AnnaBridge	157:e7ca05fa8600	2004	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	157:e7ca05fa8600	2005	* conversion to ensure that conversion is completed and
AnnaBridge	157:e7ca05fa8600	2006	* retrieve ADC conversion data. This will trig another
AnnaBridge	157:e7ca05fa8600	2007	* ADC conversion start.
AnnaBridge	157:e7ca05fa8600	2008	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	157:e7ca05fa8600	2009	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	157:e7ca05fa8600	2010	* the ADC automatically powers-off after a conversion and
AnnaBridge	157:e7ca05fa8600	2011	* automatically wakes up when a new conversion is triggered
AnnaBridge	157:e7ca05fa8600	2012	* (with startup time between trigger and start of sampling).
AnnaBridge	157:e7ca05fa8600	2013	* This feature can be combined with low power mode "auto wait".
AnnaBridge	157:e7ca05fa8600	2014	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	157:e7ca05fa8600	2015	* is corresponding to previous ADC conversion start, independently
AnnaBridge	157:e7ca05fa8600	2016	* of delay during which ADC was idle.
AnnaBridge	157:e7ca05fa8600	2017	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	157:e7ca05fa8600	2018	* correspond to the current voltage level on the selected
AnnaBridge	157:e7ca05fa8600	2019	* ADC channel.
AnnaBridge	157:e7ca05fa8600	2020	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2021	* ADC state:
AnnaBridge	157:e7ca05fa8600	2022	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2023	* on group regular.
AnnaBridge	157:e7ca05fa8600	2024	* @rmtoll CFGR1 WAIT LL_ADC_SetLowPowerMode\n
AnnaBridge	157:e7ca05fa8600	2025	* CFGR1 AUTOFF LL_ADC_SetLowPowerMode
AnnaBridge	157:e7ca05fa8600	2026	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2027	* @param LowPowerMode This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2028	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	157:e7ca05fa8600	2029	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	157:e7ca05fa8600	2030	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2031	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2032	* @retval None
AnnaBridge	157:e7ca05fa8600	2033	*/
AnnaBridge	157:e7ca05fa8600	2034	__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
AnnaBridge	157:e7ca05fa8600	2035	{
AnnaBridge	157:e7ca05fa8600	2036	MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF), LowPowerMode);
AnnaBridge	157:e7ca05fa8600	2037	}
AnnaBridge	157:e7ca05fa8600	2038
AnnaBridge	157:e7ca05fa8600	2039	/**
AnnaBridge	157:e7ca05fa8600	2040	* @brief Get ADC low power mode:
AnnaBridge	157:e7ca05fa8600	2041	* @note Description of ADC low power modes:
AnnaBridge	157:e7ca05fa8600	2042	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	157:e7ca05fa8600	2043	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	157:e7ca05fa8600	2044	* in order to reduce power consumption.
AnnaBridge	157:e7ca05fa8600	2045	* New ADC conversion starts only when the previous
AnnaBridge	157:e7ca05fa8600	2046	* unitary conversion data (for ADC group regular)
AnnaBridge	157:e7ca05fa8600	2047	* has been retrieved by user software.
AnnaBridge	157:e7ca05fa8600	2048	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	157:e7ca05fa8600	2049	* other conversion.
AnnaBridge	157:e7ca05fa8600	2050	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	157:e7ca05fa8600	2051	* triggers to the speed of the software that reads the data.
AnnaBridge	157:e7ca05fa8600	2052	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	157:e7ca05fa8600	2053	* applications.
AnnaBridge	157:e7ca05fa8600	2054	* How to use this low power mode:
AnnaBridge	157:e7ca05fa8600	2055	* - Do not use with interruption or DMA since these modes
AnnaBridge	157:e7ca05fa8600	2056	* have to clear immediately the EOC flag to free the
AnnaBridge	157:e7ca05fa8600	2057	* IRQ vector sequencer.
AnnaBridge	157:e7ca05fa8600	2058	* - Do use with polling: 1. Start conversion,
AnnaBridge	157:e7ca05fa8600	2059	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	157:e7ca05fa8600	2060	* conversion to ensure that conversion is completed and
AnnaBridge	157:e7ca05fa8600	2061	* retrieve ADC conversion data. This will trig another
AnnaBridge	157:e7ca05fa8600	2062	* ADC conversion start.
AnnaBridge	157:e7ca05fa8600	2063	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	157:e7ca05fa8600	2064	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	157:e7ca05fa8600	2065	* the ADC automatically powers-off after a conversion and
AnnaBridge	157:e7ca05fa8600	2066	* automatically wakes up when a new conversion is triggered
AnnaBridge	157:e7ca05fa8600	2067	* (with startup time between trigger and start of sampling).
AnnaBridge	157:e7ca05fa8600	2068	* This feature can be combined with low power mode "auto wait".
AnnaBridge	157:e7ca05fa8600	2069	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	157:e7ca05fa8600	2070	* is corresponding to previous ADC conversion start, independently
AnnaBridge	157:e7ca05fa8600	2071	* of delay during which ADC was idle.
AnnaBridge	157:e7ca05fa8600	2072	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	157:e7ca05fa8600	2073	* correspond to the current voltage level on the selected
AnnaBridge	157:e7ca05fa8600	2074	* ADC channel.
AnnaBridge	157:e7ca05fa8600	2075	* @rmtoll CFGR1 WAIT LL_ADC_GetLowPowerMode\n
AnnaBridge	157:e7ca05fa8600	2076	* CFGR1 AUTOFF LL_ADC_GetLowPowerMode
AnnaBridge	157:e7ca05fa8600	2077	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2078	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2079	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	157:e7ca05fa8600	2080	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	157:e7ca05fa8600	2081	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2082	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2083	*/
AnnaBridge	157:e7ca05fa8600	2084	__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2085	{
AnnaBridge	157:e7ca05fa8600	2086	return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF)));
AnnaBridge	157:e7ca05fa8600	2087	}
AnnaBridge	157:e7ca05fa8600	2088
AnnaBridge	157:e7ca05fa8600	2089	/**
AnnaBridge	157:e7ca05fa8600	2090	* @brief Set sampling time common to a group of channels.
AnnaBridge	157:e7ca05fa8600	2091	* @note Unit: ADC clock cycles.
AnnaBridge	157:e7ca05fa8600	2092	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	157:e7ca05fa8600	2093	* Sampling time common to all channels.
AnnaBridge	157:e7ca05fa8600	2094	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	157:e7ca05fa8600	2095	* @note In case of internal channel (VrefInt, TempSensor, ...) to be
AnnaBridge	157:e7ca05fa8600	2096	* converted:
AnnaBridge	157:e7ca05fa8600	2097	* sampling time constraints must be respected (sampling time can be
AnnaBridge	157:e7ca05fa8600	2098	* adjusted in function of ADC clock frequency and sampling time
AnnaBridge	157:e7ca05fa8600	2099	* setting).
AnnaBridge	157:e7ca05fa8600	2100	* Refer to device datasheet for timings values (parameters TS_vrefint,
AnnaBridge	157:e7ca05fa8600	2101	* TS_temp, ...).
AnnaBridge	157:e7ca05fa8600	2102	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	157:e7ca05fa8600	2103	* On this STM32 serie, ADC processing time is:
AnnaBridge	157:e7ca05fa8600	2104	* - 12.5 ADC clock cycles at ADC resolution 12 bits
AnnaBridge	157:e7ca05fa8600	2105	* - 10.5 ADC clock cycles at ADC resolution 10 bits
AnnaBridge	157:e7ca05fa8600	2106	* - 8.5 ADC clock cycles at ADC resolution 8 bits
AnnaBridge	157:e7ca05fa8600	2107	* - 6.5 ADC clock cycles at ADC resolution 6 bits
AnnaBridge	157:e7ca05fa8600	2108	* @note In case of ADC conversion of internal channel (VrefInt,
AnnaBridge	157:e7ca05fa8600	2109	* temperature sensor, ...), a sampling time minimum value
AnnaBridge	157:e7ca05fa8600	2110	* is required.
AnnaBridge	157:e7ca05fa8600	2111	* Refer to device datasheet.
AnnaBridge	157:e7ca05fa8600	2112	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2113	* ADC state:
AnnaBridge	157:e7ca05fa8600	2114	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2115	* on group regular.
AnnaBridge	157:e7ca05fa8600	2116	* @rmtoll SMPR SMP LL_ADC_SetSamplingTimeCommonChannels
AnnaBridge	157:e7ca05fa8600	2117	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2118	* @param SamplingTime This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2119	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	167:84c0a372a020	2120	* @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
AnnaBridge	157:e7ca05fa8600	2121	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	167:84c0a372a020	2122	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
AnnaBridge	167:84c0a372a020	2123	* @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
AnnaBridge	167:84c0a372a020	2124	* @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
AnnaBridge	167:84c0a372a020	2125	* @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
AnnaBridge	167:84c0a372a020	2126	* @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
AnnaBridge	157:e7ca05fa8600	2127	* @retval None
AnnaBridge	157:e7ca05fa8600	2128	*/
AnnaBridge	157:e7ca05fa8600	2129	__STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTime)
AnnaBridge	157:e7ca05fa8600	2130	{
AnnaBridge	157:e7ca05fa8600	2131	MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime);
AnnaBridge	157:e7ca05fa8600	2132	}
AnnaBridge	157:e7ca05fa8600	2133
AnnaBridge	157:e7ca05fa8600	2134	/**
AnnaBridge	157:e7ca05fa8600	2135	* @brief Get sampling time common to a group of channels.
AnnaBridge	157:e7ca05fa8600	2136	* @note Unit: ADC clock cycles.
AnnaBridge	157:e7ca05fa8600	2137	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	157:e7ca05fa8600	2138	* Sampling time common to all channels.
AnnaBridge	157:e7ca05fa8600	2139	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	157:e7ca05fa8600	2140	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	157:e7ca05fa8600	2141	* Refer to reference manual for ADC processing time of
AnnaBridge	157:e7ca05fa8600	2142	* this STM32 serie.
AnnaBridge	157:e7ca05fa8600	2143	* @rmtoll SMPR SMP LL_ADC_GetSamplingTimeCommonChannels
AnnaBridge	157:e7ca05fa8600	2144	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2145	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2146	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	167:84c0a372a020	2147	* @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
AnnaBridge	157:e7ca05fa8600	2148	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	167:84c0a372a020	2149	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
AnnaBridge	167:84c0a372a020	2150	* @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
AnnaBridge	167:84c0a372a020	2151	* @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
AnnaBridge	167:84c0a372a020	2152	* @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
AnnaBridge	167:84c0a372a020	2153	* @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
AnnaBridge	157:e7ca05fa8600	2154	*/
AnnaBridge	157:e7ca05fa8600	2155	__STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2156	{
AnnaBridge	157:e7ca05fa8600	2157	return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP));
AnnaBridge	157:e7ca05fa8600	2158	}
AnnaBridge	157:e7ca05fa8600	2159
AnnaBridge	157:e7ca05fa8600	2160	/**
AnnaBridge	157:e7ca05fa8600	2161	* @}
AnnaBridge	157:e7ca05fa8600	2162	*/
AnnaBridge	157:e7ca05fa8600	2163
AnnaBridge	157:e7ca05fa8600	2164	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
AnnaBridge	157:e7ca05fa8600	2165	* @{
AnnaBridge	157:e7ca05fa8600	2166	*/
AnnaBridge	157:e7ca05fa8600	2167
AnnaBridge	157:e7ca05fa8600	2168	/**
AnnaBridge	157:e7ca05fa8600	2169	* @brief Set ADC group regular conversion trigger source:
AnnaBridge	157:e7ca05fa8600	2170	* internal (SW start) or from external IP (timer event,
AnnaBridge	157:e7ca05fa8600	2171	* external interrupt line).
AnnaBridge	157:e7ca05fa8600	2172	* @note On this STM32 serie, setting trigger source to external trigger
AnnaBridge	157:e7ca05fa8600	2173	* also set trigger polarity to rising edge
AnnaBridge	157:e7ca05fa8600	2174	* (default setting for compatibility with some ADC on other
AnnaBridge	157:e7ca05fa8600	2175	* STM32 families having this setting set by HW default value).
AnnaBridge	157:e7ca05fa8600	2176	* In case of need to modify trigger edge, use
AnnaBridge	157:e7ca05fa8600	2177	* function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	157:e7ca05fa8600	2178	* @note Availability of parameters of trigger sources from timer
AnnaBridge	157:e7ca05fa8600	2179	* depends on timers availability on the selected device.
AnnaBridge	157:e7ca05fa8600	2180	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2181	* ADC state:
AnnaBridge	157:e7ca05fa8600	2182	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2183	* on group regular.
AnnaBridge	157:e7ca05fa8600	2184	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_SetTriggerSource\n
AnnaBridge	157:e7ca05fa8600	2185	* CFGR1 EXTEN LL_ADC_REG_SetTriggerSource
AnnaBridge	157:e7ca05fa8600	2186	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2187	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2188	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	157:e7ca05fa8600	2189	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	157:e7ca05fa8600	2190	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
AnnaBridge	157:e7ca05fa8600	2191	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	157:e7ca05fa8600	2192	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
AnnaBridge	157:e7ca05fa8600	2193	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
AnnaBridge	157:e7ca05fa8600	2194	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
AnnaBridge	157:e7ca05fa8600	2195	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	157:e7ca05fa8600	2196	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	157:e7ca05fa8600	2197	*
AnnaBridge	157:e7ca05fa8600	2198	* (*) value not defined in all devices
AnnaBridge	157:e7ca05fa8600	2199	* @retval None
AnnaBridge	157:e7ca05fa8600	2200	*/
AnnaBridge	157:e7ca05fa8600	2201	__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	157:e7ca05fa8600	2202	{
AnnaBridge	157:e7ca05fa8600	2203	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN \| ADC_CFGR1_EXTSEL, TriggerSource);
AnnaBridge	157:e7ca05fa8600	2204	}
AnnaBridge	157:e7ca05fa8600	2205
AnnaBridge	157:e7ca05fa8600	2206	/**
AnnaBridge	157:e7ca05fa8600	2207	* @brief Get ADC group regular conversion trigger source:
AnnaBridge	157:e7ca05fa8600	2208	* internal (SW start) or from external IP (timer event,
AnnaBridge	157:e7ca05fa8600	2209	* external interrupt line).
AnnaBridge	157:e7ca05fa8600	2210	* @note To determine whether group regular trigger source is
AnnaBridge	157:e7ca05fa8600	2211	* internal (SW start) or external, without detail
AnnaBridge	157:e7ca05fa8600	2212	* of which peripheral is selected as external trigger,
AnnaBridge	157:e7ca05fa8600	2213	* (equivalent to
AnnaBridge	157:e7ca05fa8600	2214	* "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
AnnaBridge	157:e7ca05fa8600	2215	* use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
AnnaBridge	157:e7ca05fa8600	2216	* @note Availability of parameters of trigger sources from timer
AnnaBridge	157:e7ca05fa8600	2217	* depends on timers availability on the selected device.
AnnaBridge	157:e7ca05fa8600	2218	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_GetTriggerSource\n
AnnaBridge	157:e7ca05fa8600	2219	* CFGR1 EXTEN LL_ADC_REG_GetTriggerSource
AnnaBridge	157:e7ca05fa8600	2220	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2221	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2222	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	157:e7ca05fa8600	2223	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	157:e7ca05fa8600	2224	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
AnnaBridge	157:e7ca05fa8600	2225	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	157:e7ca05fa8600	2226	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
AnnaBridge	157:e7ca05fa8600	2227	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
AnnaBridge	157:e7ca05fa8600	2228	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
AnnaBridge	157:e7ca05fa8600	2229	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	157:e7ca05fa8600	2230	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	157:e7ca05fa8600	2231	*
AnnaBridge	157:e7ca05fa8600	2232	* (*) value not defined in all devices
AnnaBridge	157:e7ca05fa8600	2233	*/
AnnaBridge	157:e7ca05fa8600	2234	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2235	{
AnnaBridge	157:e7ca05fa8600	2236	register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL \| ADC_CFGR1_EXTEN);
AnnaBridge	157:e7ca05fa8600	2237
AnnaBridge	157:e7ca05fa8600	2238	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
AnnaBridge	157:e7ca05fa8600	2239	/* corresponding to ADC_CFGR1_EXTEN {0; 1; 2; 3}. */
AnnaBridge	157:e7ca05fa8600	2240	register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
AnnaBridge	157:e7ca05fa8600	2241
AnnaBridge	157:e7ca05fa8600	2242	/* Set bitfield corresponding to ADC_CFGR1_EXTEN and ADC_CFGR1_EXTSEL */
AnnaBridge	157:e7ca05fa8600	2243	/* to match with triggers literals definition. */
AnnaBridge	157:e7ca05fa8600	2244	return ((TriggerSource
AnnaBridge	157:e7ca05fa8600	2245	& (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR1_EXTSEL)
AnnaBridge	157:e7ca05fa8600	2246	\| ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN)
AnnaBridge	157:e7ca05fa8600	2247	);
AnnaBridge	157:e7ca05fa8600	2248	}
AnnaBridge	157:e7ca05fa8600	2249
AnnaBridge	157:e7ca05fa8600	2250	/**
AnnaBridge	157:e7ca05fa8600	2251	* @brief Get ADC group regular conversion trigger source internal (SW start)
AnnaBridge	157:e7ca05fa8600	2252	or external.
AnnaBridge	157:e7ca05fa8600	2253	* @note In case of group regular trigger source set to external trigger,
AnnaBridge	157:e7ca05fa8600	2254	* to determine which peripheral is selected as external trigger,
AnnaBridge	157:e7ca05fa8600	2255	* use function @ref LL_ADC_REG_GetTriggerSource().
AnnaBridge	157:e7ca05fa8600	2256	* @rmtoll CFGR1 EXTEN LL_ADC_REG_IsTriggerSourceSWStart
AnnaBridge	157:e7ca05fa8600	2257	* @param ADCx ADC instance
AnnaBridge	167:84c0a372a020	2258	* @retval Value "0" if trigger source external trigger
AnnaBridge	167:84c0a372a020	2259	* Value "1" if trigger source SW start.
AnnaBridge	157:e7ca05fa8600	2260	*/
AnnaBridge	157:e7ca05fa8600	2261	__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2262	{
AnnaBridge	157:e7ca05fa8600	2263	return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN));
AnnaBridge	157:e7ca05fa8600	2264	}
AnnaBridge	157:e7ca05fa8600	2265
AnnaBridge	157:e7ca05fa8600	2266	/**
AnnaBridge	157:e7ca05fa8600	2267	* @brief Set ADC group regular conversion trigger polarity.
AnnaBridge	157:e7ca05fa8600	2268	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	157:e7ca05fa8600	2269	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2270	* ADC state:
AnnaBridge	157:e7ca05fa8600	2271	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2272	* on group regular.
AnnaBridge	157:e7ca05fa8600	2273	* @rmtoll CFGR1 EXTEN LL_ADC_REG_SetTriggerEdge
AnnaBridge	157:e7ca05fa8600	2274	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2275	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2276	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	157:e7ca05fa8600	2277	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	157:e7ca05fa8600	2278	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	157:e7ca05fa8600	2279	* @retval None
AnnaBridge	157:e7ca05fa8600	2280	*/
AnnaBridge	157:e7ca05fa8600	2281	__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
AnnaBridge	157:e7ca05fa8600	2282	{
AnnaBridge	157:e7ca05fa8600	2283	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);
AnnaBridge	157:e7ca05fa8600	2284	}
AnnaBridge	157:e7ca05fa8600	2285
AnnaBridge	157:e7ca05fa8600	2286	/**
AnnaBridge	157:e7ca05fa8600	2287	* @brief Get ADC group regular conversion trigger polarity.
AnnaBridge	157:e7ca05fa8600	2288	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	157:e7ca05fa8600	2289	* @rmtoll CFGR1 EXTEN LL_ADC_REG_GetTriggerEdge
AnnaBridge	157:e7ca05fa8600	2290	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2291	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2292	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	157:e7ca05fa8600	2293	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	157:e7ca05fa8600	2294	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	157:e7ca05fa8600	2295	*/
AnnaBridge	157:e7ca05fa8600	2296	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2297	{
AnnaBridge	157:e7ca05fa8600	2298	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));
AnnaBridge	157:e7ca05fa8600	2299	}
AnnaBridge	157:e7ca05fa8600	2300
AnnaBridge	157:e7ca05fa8600	2301
AnnaBridge	157:e7ca05fa8600	2302	/**
AnnaBridge	157:e7ca05fa8600	2303	* @brief Set ADC group regular sequencer scan direction.
AnnaBridge	157:e7ca05fa8600	2304	* @note On some other STM32 families, this setting is not available and
AnnaBridge	157:e7ca05fa8600	2305	* the default scan direction is forward.
AnnaBridge	157:e7ca05fa8600	2306	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2307	* ADC state:
AnnaBridge	157:e7ca05fa8600	2308	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2309	* on group regular.
AnnaBridge	157:e7ca05fa8600	2310	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_SetSequencerScanDirection
AnnaBridge	157:e7ca05fa8600	2311	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2312	* @param ScanDirection This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2313	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	157:e7ca05fa8600	2314	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	157:e7ca05fa8600	2315	* @retval None
AnnaBridge	157:e7ca05fa8600	2316	*/
AnnaBridge	157:e7ca05fa8600	2317	__STATIC_INLINE void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection)
AnnaBridge	157:e7ca05fa8600	2318	{
AnnaBridge	157:e7ca05fa8600	2319	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);
AnnaBridge	157:e7ca05fa8600	2320	}
AnnaBridge	157:e7ca05fa8600	2321
AnnaBridge	157:e7ca05fa8600	2322	/**
AnnaBridge	157:e7ca05fa8600	2323	* @brief Get ADC group regular sequencer scan direction.
AnnaBridge	157:e7ca05fa8600	2324	* @note On some other STM32 families, this setting is not available and
AnnaBridge	157:e7ca05fa8600	2325	* the default scan direction is forward.
AnnaBridge	157:e7ca05fa8600	2326	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_GetSequencerScanDirection
AnnaBridge	157:e7ca05fa8600	2327	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2328	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2329	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	157:e7ca05fa8600	2330	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	157:e7ca05fa8600	2331	*/
AnnaBridge	157:e7ca05fa8600	2332	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerScanDirection(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2333	{
AnnaBridge	157:e7ca05fa8600	2334	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));
AnnaBridge	157:e7ca05fa8600	2335	}
AnnaBridge	157:e7ca05fa8600	2336
AnnaBridge	157:e7ca05fa8600	2337	/**
AnnaBridge	157:e7ca05fa8600	2338	* @brief Set ADC group regular sequencer discontinuous mode:
AnnaBridge	157:e7ca05fa8600	2339	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	157:e7ca05fa8600	2340	* number of ranks.
AnnaBridge	157:e7ca05fa8600	2341	* @note It is not possible to enable both ADC group regular
AnnaBridge	157:e7ca05fa8600	2342	* continuous mode and sequencer discontinuous mode.
AnnaBridge	157:e7ca05fa8600	2343	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2344	* ADC state:
AnnaBridge	157:e7ca05fa8600	2345	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2346	* on group regular.
AnnaBridge	157:e7ca05fa8600	2347	* @rmtoll CFGR1 DISCEN LL_ADC_REG_SetSequencerDiscont\n
AnnaBridge	157:e7ca05fa8600	2348	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2349	* @param SeqDiscont This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2350	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	157:e7ca05fa8600	2351	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	157:e7ca05fa8600	2352	* @retval None
AnnaBridge	157:e7ca05fa8600	2353	*/
AnnaBridge	157:e7ca05fa8600	2354	__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
AnnaBridge	157:e7ca05fa8600	2355	{
AnnaBridge	157:e7ca05fa8600	2356	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);
AnnaBridge	157:e7ca05fa8600	2357	}
AnnaBridge	157:e7ca05fa8600	2358
AnnaBridge	157:e7ca05fa8600	2359	/**
AnnaBridge	157:e7ca05fa8600	2360	* @brief Get ADC group regular sequencer discontinuous mode:
AnnaBridge	157:e7ca05fa8600	2361	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	157:e7ca05fa8600	2362	* number of ranks.
AnnaBridge	157:e7ca05fa8600	2363	* @rmtoll CFGR1 DISCEN LL_ADC_REG_GetSequencerDiscont\n
AnnaBridge	157:e7ca05fa8600	2364	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2365	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2366	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	157:e7ca05fa8600	2367	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	157:e7ca05fa8600	2368	*/
AnnaBridge	157:e7ca05fa8600	2369	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2370	{
AnnaBridge	157:e7ca05fa8600	2371	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));
AnnaBridge	157:e7ca05fa8600	2372	}
AnnaBridge	157:e7ca05fa8600	2373
AnnaBridge	157:e7ca05fa8600	2374	/**
AnnaBridge	157:e7ca05fa8600	2375	* @brief Set ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2376	* channel number.
AnnaBridge	157:e7ca05fa8600	2377	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2378	* - Channels ordering into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2379	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2380	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2381	* - Set channels selected by overwriting the current sequencer
AnnaBridge	157:e7ca05fa8600	2382	* configuration.
AnnaBridge	157:e7ca05fa8600	2383	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2384	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2385	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2386	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2387	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2388	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2389	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2390	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2391	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2392	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2393	* ADC state:
AnnaBridge	157:e7ca05fa8600	2394	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2395	* on group regular.
AnnaBridge	157:e7ca05fa8600	2396	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	2397	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2398	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2399	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2400	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2401	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2402	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2403	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2404	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2405	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2406	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2407	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2408	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2409	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2410	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2411	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2412	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2413	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2414	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2415	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2416	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChannels
AnnaBridge	157:e7ca05fa8600	2417	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2418	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2419	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2420	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2421	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2422	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2423	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2424	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2425	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2426	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2427	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2428	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2429	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2430	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2431	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2432	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2433	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2434	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2435	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2436	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2437	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2438	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2439	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2440	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2441	*
AnnaBridge	157:e7ca05fa8600	2442	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2443	* @retval None
AnnaBridge	157:e7ca05fa8600	2444	*/
AnnaBridge	157:e7ca05fa8600	2445	__STATIC_INLINE void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	157:e7ca05fa8600	2446	{
AnnaBridge	157:e7ca05fa8600	2447	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	157:e7ca05fa8600	2448	/* other bits reserved for other purpose. */
AnnaBridge	157:e7ca05fa8600	2449	WRITE_REG(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	157:e7ca05fa8600	2450	}
AnnaBridge	157:e7ca05fa8600	2451
AnnaBridge	157:e7ca05fa8600	2452	/**
AnnaBridge	157:e7ca05fa8600	2453	* @brief Add channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2454	* channel number.
AnnaBridge	157:e7ca05fa8600	2455	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2456	* - Channels ordering into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2457	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2458	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2459	* - Set channels selected by adding them to the current sequencer
AnnaBridge	157:e7ca05fa8600	2460	* configuration.
AnnaBridge	157:e7ca05fa8600	2461	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2462	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2463	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2464	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2465	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2466	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2467	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2468	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2469	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2470	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2471	* ADC state:
AnnaBridge	157:e7ca05fa8600	2472	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2473	* on group regular.
AnnaBridge	157:e7ca05fa8600	2474	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	2475	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2476	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2477	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2478	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2479	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2480	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2481	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2482	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2483	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2484	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2485	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2486	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2487	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2488	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2489	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2490	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2491	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2492	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2493	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2494	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChAdd
AnnaBridge	157:e7ca05fa8600	2495	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2496	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2497	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2498	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2499	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2500	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2501	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2502	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2503	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2504	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2505	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2506	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2507	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2508	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2509	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2510	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2511	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2512	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2513	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2514	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2515	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2516	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2517	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2518	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2519	*
AnnaBridge	157:e7ca05fa8600	2520	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2521	* @retval None
AnnaBridge	157:e7ca05fa8600	2522	*/
AnnaBridge	157:e7ca05fa8600	2523	__STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	157:e7ca05fa8600	2524	{
AnnaBridge	157:e7ca05fa8600	2525	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	157:e7ca05fa8600	2526	/* other bits reserved for other purpose. */
AnnaBridge	157:e7ca05fa8600	2527	SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	157:e7ca05fa8600	2528	}
AnnaBridge	157:e7ca05fa8600	2529
AnnaBridge	157:e7ca05fa8600	2530	/**
AnnaBridge	157:e7ca05fa8600	2531	* @brief Remove channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2532	* channel number.
AnnaBridge	157:e7ca05fa8600	2533	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2534	* - Channels ordering into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2535	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2536	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2537	* - Set channels selected by removing them to the current sequencer
AnnaBridge	157:e7ca05fa8600	2538	* configuration.
AnnaBridge	157:e7ca05fa8600	2539	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2540	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2541	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2542	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2543	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2544	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2545	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2546	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2547	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2548	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2549	* ADC state:
AnnaBridge	157:e7ca05fa8600	2550	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2551	* on group regular.
AnnaBridge	157:e7ca05fa8600	2552	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	2553	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2554	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2555	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2556	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2557	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2558	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2559	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2560	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2561	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2562	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2563	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2564	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2565	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2566	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2567	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2568	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2569	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2570	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2571	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2572	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChRem
AnnaBridge	157:e7ca05fa8600	2573	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2574	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2575	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2576	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2577	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2578	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2579	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2580	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2581	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2582	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2583	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2584	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2585	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2586	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2587	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2588	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2589	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2590	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2591	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2592	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2593	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2594	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2595	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2596	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2597	*
AnnaBridge	157:e7ca05fa8600	2598	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2599	* @retval None
AnnaBridge	157:e7ca05fa8600	2600	*/
AnnaBridge	157:e7ca05fa8600	2601	__STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	157:e7ca05fa8600	2602	{
AnnaBridge	157:e7ca05fa8600	2603	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	157:e7ca05fa8600	2604	/* other bits reserved for other purpose. */
AnnaBridge	157:e7ca05fa8600	2605	CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	157:e7ca05fa8600	2606	}
AnnaBridge	157:e7ca05fa8600	2607
AnnaBridge	157:e7ca05fa8600	2608	/**
AnnaBridge	157:e7ca05fa8600	2609	* @brief Get ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2610	* channel number.
AnnaBridge	157:e7ca05fa8600	2611	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2612	* - Channels order reading into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2613	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2614	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2615	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2616	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2617	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2618	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2619	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2620	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2621	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2622	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2623	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2624	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2625	* ADC state:
AnnaBridge	157:e7ca05fa8600	2626	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2627	* on group regular.
AnnaBridge	157:e7ca05fa8600	2628	* @note One or several values can be retrieved.
AnnaBridge	157:e7ca05fa8600	2629	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2630	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2631	* CHSELR CHSEL1 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2632	* CHSELR CHSEL2 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2633	* CHSELR CHSEL3 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2634	* CHSELR CHSEL4 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2635	* CHSELR CHSEL5 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2636	* CHSELR CHSEL6 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2637	* CHSELR CHSEL7 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2638	* CHSELR CHSEL8 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2639	* CHSELR CHSEL9 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2640	* CHSELR CHSEL10 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2641	* CHSELR CHSEL11 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2642	* CHSELR CHSEL12 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2643	* CHSELR CHSEL13 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2644	* CHSELR CHSEL14 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2645	* CHSELR CHSEL15 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2646	* CHSELR CHSEL16 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2647	* CHSELR CHSEL17 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2648	* CHSELR CHSEL18 LL_ADC_REG_GetSequencerChannels
AnnaBridge	157:e7ca05fa8600	2649	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2650	* @retval Returned value can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2651	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2652	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2653	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2654	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2655	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2656	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2657	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2658	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2659	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2660	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2661	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2662	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2663	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2664	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2665	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2666	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2667	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2668	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2669	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2670	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2671	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2672	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2673	*
AnnaBridge	157:e7ca05fa8600	2674	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2675	*/
AnnaBridge	157:e7ca05fa8600	2676	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerChannels(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2677	{
AnnaBridge	157:e7ca05fa8600	2678	register uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL);
AnnaBridge	157:e7ca05fa8600	2679
AnnaBridge	157:e7ca05fa8600	2680	return ( (((ChannelsBitfield & ADC_CHSELR_CHSEL0) >> ADC_CHSELR_CHSEL0_BITOFFSET_POS) * LL_ADC_CHANNEL_0)
AnnaBridge	157:e7ca05fa8600	2681	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL1) >> ADC_CHSELR_CHSEL1_BITOFFSET_POS) * LL_ADC_CHANNEL_1)
AnnaBridge	157:e7ca05fa8600	2682	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL2) >> ADC_CHSELR_CHSEL2_BITOFFSET_POS) * LL_ADC_CHANNEL_2)
AnnaBridge	157:e7ca05fa8600	2683	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL3) >> ADC_CHSELR_CHSEL3_BITOFFSET_POS) * LL_ADC_CHANNEL_3)
AnnaBridge	157:e7ca05fa8600	2684	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL4) >> ADC_CHSELR_CHSEL4_BITOFFSET_POS) * LL_ADC_CHANNEL_4)
AnnaBridge	157:e7ca05fa8600	2685	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_CHANNEL_5)
AnnaBridge	157:e7ca05fa8600	2686	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL6) >> ADC_CHSELR_CHSEL6_BITOFFSET_POS) * LL_ADC_CHANNEL_6)
AnnaBridge	157:e7ca05fa8600	2687	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL7) >> ADC_CHSELR_CHSEL7_BITOFFSET_POS) * LL_ADC_CHANNEL_7)
AnnaBridge	157:e7ca05fa8600	2688	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL8) >> ADC_CHSELR_CHSEL8_BITOFFSET_POS) * LL_ADC_CHANNEL_8)
AnnaBridge	157:e7ca05fa8600	2689	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL9) >> ADC_CHSELR_CHSEL9_BITOFFSET_POS) * LL_ADC_CHANNEL_9)
AnnaBridge	157:e7ca05fa8600	2690	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL10) >> ADC_CHSELR_CHSEL10_BITOFFSET_POS) * LL_ADC_CHANNEL_10)
AnnaBridge	157:e7ca05fa8600	2691	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL11) >> ADC_CHSELR_CHSEL11_BITOFFSET_POS) * LL_ADC_CHANNEL_11)
AnnaBridge	157:e7ca05fa8600	2692	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL12) >> ADC_CHSELR_CHSEL12_BITOFFSET_POS) * LL_ADC_CHANNEL_12)
AnnaBridge	157:e7ca05fa8600	2693	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL13) >> ADC_CHSELR_CHSEL13_BITOFFSET_POS) * LL_ADC_CHANNEL_13)
AnnaBridge	157:e7ca05fa8600	2694	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL14) >> ADC_CHSELR_CHSEL14_BITOFFSET_POS) * LL_ADC_CHANNEL_14)
AnnaBridge	157:e7ca05fa8600	2695	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL15) >> ADC_CHSELR_CHSEL15_BITOFFSET_POS) * LL_ADC_CHANNEL_15)
AnnaBridge	157:e7ca05fa8600	2696	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	2697	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL16) >> ADC_CHSELR_CHSEL16_BITOFFSET_POS) * LL_ADC_CHANNEL_16)
AnnaBridge	157:e7ca05fa8600	2698	#endif
AnnaBridge	157:e7ca05fa8600	2699	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL17) >> ADC_CHSELR_CHSEL17_BITOFFSET_POS) * LL_ADC_CHANNEL_17)
AnnaBridge	157:e7ca05fa8600	2700	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL18) >> ADC_CHSELR_CHSEL18_BITOFFSET_POS) * LL_ADC_CHANNEL_18)
AnnaBridge	157:e7ca05fa8600	2701	);
AnnaBridge	157:e7ca05fa8600	2702	}
AnnaBridge	157:e7ca05fa8600	2703	/**
AnnaBridge	157:e7ca05fa8600	2704	* @brief Set ADC continuous conversion mode on ADC group regular.
AnnaBridge	157:e7ca05fa8600	2705	* @note Description of ADC continuous conversion mode:
AnnaBridge	157:e7ca05fa8600	2706	* - single mode: one conversion per trigger
AnnaBridge	157:e7ca05fa8600	2707	* - continuous mode: after the first trigger, following
AnnaBridge	157:e7ca05fa8600	2708	* conversions launched successively automatically.
AnnaBridge	157:e7ca05fa8600	2709	* @note It is not possible to enable both ADC group regular
AnnaBridge	157:e7ca05fa8600	2710	* continuous mode and sequencer discontinuous mode.
AnnaBridge	157:e7ca05fa8600	2711	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2712	* ADC state:
AnnaBridge	157:e7ca05fa8600	2713	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2714	* on group regular.
AnnaBridge	157:e7ca05fa8600	2715	* @rmtoll CFGR1 CONT LL_ADC_REG_SetContinuousMode
AnnaBridge	157:e7ca05fa8600	2716	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2717	* @param Continuous This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2718	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	157:e7ca05fa8600	2719	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	157:e7ca05fa8600	2720	* @retval None
AnnaBridge	157:e7ca05fa8600	2721	*/
AnnaBridge	157:e7ca05fa8600	2722	__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
AnnaBridge	157:e7ca05fa8600	2723	{
AnnaBridge	157:e7ca05fa8600	2724	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);
AnnaBridge	157:e7ca05fa8600	2725	}
AnnaBridge	157:e7ca05fa8600	2726
AnnaBridge	157:e7ca05fa8600	2727	/**
AnnaBridge	157:e7ca05fa8600	2728	* @brief Get ADC continuous conversion mode on ADC group regular.
AnnaBridge	157:e7ca05fa8600	2729	* @note Description of ADC continuous conversion mode:
AnnaBridge	157:e7ca05fa8600	2730	* - single mode: one conversion per trigger
AnnaBridge	157:e7ca05fa8600	2731	* - continuous mode: after the first trigger, following
AnnaBridge	157:e7ca05fa8600	2732	* conversions launched successively automatically.
AnnaBridge	157:e7ca05fa8600	2733	* @rmtoll CFGR1 CONT LL_ADC_REG_GetContinuousMode
AnnaBridge	157:e7ca05fa8600	2734	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2735	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2736	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	157:e7ca05fa8600	2737	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	157:e7ca05fa8600	2738	*/
AnnaBridge	157:e7ca05fa8600	2739	__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2740	{
AnnaBridge	157:e7ca05fa8600	2741	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));
AnnaBridge	157:e7ca05fa8600	2742	}
AnnaBridge	157:e7ca05fa8600	2743
AnnaBridge	157:e7ca05fa8600	2744	/**
AnnaBridge	157:e7ca05fa8600	2745	* @brief Set ADC group regular conversion data transfer: no transfer or
AnnaBridge	157:e7ca05fa8600	2746	* transfer by DMA, and DMA requests mode.
AnnaBridge	157:e7ca05fa8600	2747	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	157:e7ca05fa8600	2748	* mode:
AnnaBridge	157:e7ca05fa8600	2749	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	157:e7ca05fa8600	2750	* when number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2751	* ADC conversions) is reached.
AnnaBridge	157:e7ca05fa8600	2752	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	157:e7ca05fa8600	2753	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	157:e7ca05fa8600	2754	* whatever number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2755	* ADC conversions).
AnnaBridge	157:e7ca05fa8600	2756	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	157:e7ca05fa8600	2757	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	157:e7ca05fa8600	2758	* mode non-circular:
AnnaBridge	157:e7ca05fa8600	2759	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	157:e7ca05fa8600	2760	* ADC conversions data ADC will raise an overrun error
AnnaBridge	157:e7ca05fa8600	2761	* (overrun flag and interruption if enabled).
AnnaBridge	157:e7ca05fa8600	2762	* @note To configure DMA source address (peripheral address),
AnnaBridge	157:e7ca05fa8600	2763	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	157:e7ca05fa8600	2764	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2765	* ADC state:
AnnaBridge	157:e7ca05fa8600	2766	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2767	* on group regular.
AnnaBridge	157:e7ca05fa8600	2768	* @rmtoll CFGR1 DMAEN LL_ADC_REG_SetDMATransfer\n
AnnaBridge	157:e7ca05fa8600	2769	* CFGR1 DMACFG LL_ADC_REG_SetDMATransfer
AnnaBridge	157:e7ca05fa8600	2770	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2771	* @param DMATransfer This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2772	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	157:e7ca05fa8600	2773	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	157:e7ca05fa8600	2774	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	157:e7ca05fa8600	2775	* @retval None
AnnaBridge	157:e7ca05fa8600	2776	*/
AnnaBridge	157:e7ca05fa8600	2777	__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
AnnaBridge	157:e7ca05fa8600	2778	{
AnnaBridge	157:e7ca05fa8600	2779	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG, DMATransfer);
AnnaBridge	157:e7ca05fa8600	2780	}
AnnaBridge	157:e7ca05fa8600	2781
AnnaBridge	157:e7ca05fa8600	2782	/**
AnnaBridge	157:e7ca05fa8600	2783	* @brief Get ADC group regular conversion data transfer: no transfer or
AnnaBridge	157:e7ca05fa8600	2784	* transfer by DMA, and DMA requests mode.
AnnaBridge	157:e7ca05fa8600	2785	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	157:e7ca05fa8600	2786	* mode:
AnnaBridge	157:e7ca05fa8600	2787	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	157:e7ca05fa8600	2788	* when number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2789	* ADC conversions) is reached.
AnnaBridge	157:e7ca05fa8600	2790	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	157:e7ca05fa8600	2791	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	157:e7ca05fa8600	2792	* whatever number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2793	* ADC conversions).
AnnaBridge	157:e7ca05fa8600	2794	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	157:e7ca05fa8600	2795	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	157:e7ca05fa8600	2796	* mode non-circular:
AnnaBridge	157:e7ca05fa8600	2797	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	157:e7ca05fa8600	2798	* ADC conversions data ADC will raise an overrun error
AnnaBridge	157:e7ca05fa8600	2799	* (overrun flag and interruption if enabled).
AnnaBridge	157:e7ca05fa8600	2800	* @note To configure DMA source address (peripheral address),
AnnaBridge	157:e7ca05fa8600	2801	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	157:e7ca05fa8600	2802	* @rmtoll CFGR1 DMAEN LL_ADC_REG_GetDMATransfer\n
AnnaBridge	157:e7ca05fa8600	2803	* CFGR1 DMACFG LL_ADC_REG_GetDMATransfer
AnnaBridge	157:e7ca05fa8600	2804	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2805	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2806	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	157:e7ca05fa8600	2807	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	157:e7ca05fa8600	2808	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	157:e7ca05fa8600	2809	*/
AnnaBridge	157:e7ca05fa8600	2810	__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2811	{
AnnaBridge	157:e7ca05fa8600	2812	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG));
AnnaBridge	157:e7ca05fa8600	2813	}
AnnaBridge	157:e7ca05fa8600	2814
AnnaBridge	157:e7ca05fa8600	2815	/**
AnnaBridge	157:e7ca05fa8600	2816	* @brief Set ADC group regular behavior in case of overrun:
AnnaBridge	157:e7ca05fa8600	2817	* data preserved or overwritten.
AnnaBridge	157:e7ca05fa8600	2818	* @note Compatibility with devices without feature overrun:
AnnaBridge	157:e7ca05fa8600	2819	* other devices without this feature have a behavior
AnnaBridge	157:e7ca05fa8600	2820	* equivalent to data overwritten.
AnnaBridge	157:e7ca05fa8600	2821	* The default setting of overrun is data preserved.
AnnaBridge	157:e7ca05fa8600	2822	* Therefore, for compatibility with all devices, parameter
AnnaBridge	157:e7ca05fa8600	2823	* overrun should be set to data overwritten.
AnnaBridge	157:e7ca05fa8600	2824	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2825	* ADC state:
AnnaBridge	157:e7ca05fa8600	2826	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2827	* on group regular.
AnnaBridge	157:e7ca05fa8600	2828	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_SetOverrun
AnnaBridge	157:e7ca05fa8600	2829	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2830	* @param Overrun This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2831	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	157:e7ca05fa8600	2832	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	157:e7ca05fa8600	2833	* @retval None
AnnaBridge	157:e7ca05fa8600	2834	*/
AnnaBridge	157:e7ca05fa8600	2835	__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
AnnaBridge	157:e7ca05fa8600	2836	{
AnnaBridge	157:e7ca05fa8600	2837	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);
AnnaBridge	157:e7ca05fa8600	2838	}
AnnaBridge	157:e7ca05fa8600	2839
AnnaBridge	157:e7ca05fa8600	2840	/**
AnnaBridge	157:e7ca05fa8600	2841	* @brief Get ADC group regular behavior in case of overrun:
AnnaBridge	157:e7ca05fa8600	2842	* data preserved or overwritten.
AnnaBridge	157:e7ca05fa8600	2843	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_GetOverrun
AnnaBridge	157:e7ca05fa8600	2844	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2845	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2846	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	157:e7ca05fa8600	2847	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	157:e7ca05fa8600	2848	*/
AnnaBridge	157:e7ca05fa8600	2849	__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2850	{
AnnaBridge	157:e7ca05fa8600	2851	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));
AnnaBridge	157:e7ca05fa8600	2852	}
AnnaBridge	157:e7ca05fa8600	2853
AnnaBridge	157:e7ca05fa8600	2854	/**
AnnaBridge	157:e7ca05fa8600	2855	* @}
AnnaBridge	157:e7ca05fa8600	2856	*/
AnnaBridge	157:e7ca05fa8600	2857
AnnaBridge	157:e7ca05fa8600	2858
AnnaBridge	157:e7ca05fa8600	2859	/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
AnnaBridge	157:e7ca05fa8600	2860	* @{
AnnaBridge	157:e7ca05fa8600	2861	*/
AnnaBridge	157:e7ca05fa8600	2862
AnnaBridge	157:e7ca05fa8600	2863	/**
AnnaBridge	157:e7ca05fa8600	2864	* @brief Set ADC analog watchdog monitored channels:
AnnaBridge	157:e7ca05fa8600	2865	* a single channel or all channels,
AnnaBridge	157:e7ca05fa8600	2866	* on ADC group regular.
AnnaBridge	157:e7ca05fa8600	2867	* @note Once monitored channels are selected, analog watchdog
AnnaBridge	157:e7ca05fa8600	2868	* is enabled.
AnnaBridge	157:e7ca05fa8600	2869	* @note In case of need to define a single channel to monitor
AnnaBridge	157:e7ca05fa8600	2870	* with analog watchdog from sequencer channel definition,
AnnaBridge	157:e7ca05fa8600	2871	* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
AnnaBridge	157:e7ca05fa8600	2872	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	2873	* instance:
AnnaBridge	157:e7ca05fa8600	2874	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	2875	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	2876	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	2877	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	2878	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	2879	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2880	* ADC state:
AnnaBridge	157:e7ca05fa8600	2881	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2882	* on group regular.
AnnaBridge	157:e7ca05fa8600	2883	* @rmtoll CFGR1 AWDCH LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2884	* CFGR1 AWDSGL LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2885	* CFGR1 AWDEN LL_ADC_SetAnalogWDMonitChannels
AnnaBridge	157:e7ca05fa8600	2886	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2887	* @param AWDChannelGroup This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2888	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	157:e7ca05fa8600	2889	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	157:e7ca05fa8600	2890	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	157:e7ca05fa8600	2891	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	157:e7ca05fa8600	2892	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	157:e7ca05fa8600	2893	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	157:e7ca05fa8600	2894	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	157:e7ca05fa8600	2895	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	157:e7ca05fa8600	2896	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	157:e7ca05fa8600	2897	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	157:e7ca05fa8600	2898	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	157:e7ca05fa8600	2899	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	157:e7ca05fa8600	2900	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	157:e7ca05fa8600	2901	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	157:e7ca05fa8600	2902	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	157:e7ca05fa8600	2903	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	157:e7ca05fa8600	2904	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	157:e7ca05fa8600	2905	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	157:e7ca05fa8600	2906	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (1)
AnnaBridge	157:e7ca05fa8600	2907	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	157:e7ca05fa8600	2908	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	157:e7ca05fa8600	2909	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	157:e7ca05fa8600	2910	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	157:e7ca05fa8600	2911	* @arg @ref LL_ADC_AWD_CH_VLCD_REG (1)
AnnaBridge	157:e7ca05fa8600	2912	*
AnnaBridge	157:e7ca05fa8600	2913	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2914	* @retval None
AnnaBridge	157:e7ca05fa8600	2915	*/
AnnaBridge	157:e7ca05fa8600	2916	__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDChannelGroup)
AnnaBridge	157:e7ca05fa8600	2917	{
AnnaBridge	157:e7ca05fa8600	2918	MODIFY_REG(ADCx->CFGR1,
AnnaBridge	157:e7ca05fa8600	2919	(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN),
AnnaBridge	157:e7ca05fa8600	2920	(AWDChannelGroup & ADC_AWD_CR_ALL_CHANNEL_MASK));
AnnaBridge	157:e7ca05fa8600	2921	}
AnnaBridge	157:e7ca05fa8600	2922
AnnaBridge	157:e7ca05fa8600	2923	/**
AnnaBridge	157:e7ca05fa8600	2924	* @brief Get ADC analog watchdog monitored channel.
AnnaBridge	157:e7ca05fa8600	2925	* @note Usage of the returned channel number:
AnnaBridge	157:e7ca05fa8600	2926	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	157:e7ca05fa8600	2927	* the returned channel number is only partly formatted on definition
AnnaBridge	157:e7ca05fa8600	2928	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	157:e7ca05fa8600	2929	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	157:e7ca05fa8600	2930	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	157:e7ca05fa8600	2931	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	157:e7ca05fa8600	2932	* as parameter for another function.
AnnaBridge	157:e7ca05fa8600	2933	* - To get the channel number in decimal format:
AnnaBridge	157:e7ca05fa8600	2934	* process the returned value with the helper macro
AnnaBridge	157:e7ca05fa8600	2935	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	157:e7ca05fa8600	2936	* Applicable only when the analog watchdog is set to monitor
AnnaBridge	157:e7ca05fa8600	2937	* one channel.
AnnaBridge	157:e7ca05fa8600	2938	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	2939	* instance:
AnnaBridge	157:e7ca05fa8600	2940	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	2941	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	2942	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	2943	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	2944	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	2945	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2946	* ADC state:
AnnaBridge	157:e7ca05fa8600	2947	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2948	* on group regular.
AnnaBridge	157:e7ca05fa8600	2949	* @rmtoll CFGR1 AWDCH LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2950	* CFGR1 AWDSGL LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2951	* CFGR1 AWDEN LL_ADC_GetAnalogWDMonitChannels
AnnaBridge	157:e7ca05fa8600	2952	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2953	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2954	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	157:e7ca05fa8600	2955	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	157:e7ca05fa8600	2956	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	157:e7ca05fa8600	2957	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	157:e7ca05fa8600	2958	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	157:e7ca05fa8600	2959	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	157:e7ca05fa8600	2960	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	157:e7ca05fa8600	2961	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	157:e7ca05fa8600	2962	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	157:e7ca05fa8600	2963	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	157:e7ca05fa8600	2964	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	157:e7ca05fa8600	2965	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	157:e7ca05fa8600	2966	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	157:e7ca05fa8600	2967	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	157:e7ca05fa8600	2968	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	157:e7ca05fa8600	2969	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	157:e7ca05fa8600	2970	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	157:e7ca05fa8600	2971	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	157:e7ca05fa8600	2972	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG
AnnaBridge	157:e7ca05fa8600	2973	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	157:e7ca05fa8600	2974	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	157:e7ca05fa8600	2975	*/
AnnaBridge	157:e7ca05fa8600	2976	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2977	{
AnnaBridge	157:e7ca05fa8600	2978	register uint32_t AWDChannelGroup = READ_BIT(ADCx->CFGR1, (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN));
AnnaBridge	157:e7ca05fa8600	2979
AnnaBridge	157:e7ca05fa8600	2980	/* Note: Set variable according to channel definition including channel ID */
AnnaBridge	157:e7ca05fa8600	2981	/* with bitfield. */
AnnaBridge	157:e7ca05fa8600	2982	register uint32_t AWDChannelSingle = ((AWDChannelGroup & ADC_CFGR1_AWDSGL) >> ADC_CFGR1_AWDSGL_BITOFFSET_POS);
AnnaBridge	157:e7ca05fa8600	2983	register uint32_t AWDChannelBitField = (ADC_CHANNEL_0_BITFIELD << ((AWDChannelGroup & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS));
AnnaBridge	157:e7ca05fa8600	2984
AnnaBridge	157:e7ca05fa8600	2985	return (AWDChannelGroup \| (AWDChannelBitField * AWDChannelSingle));
AnnaBridge	157:e7ca05fa8600	2986	}
AnnaBridge	157:e7ca05fa8600	2987
AnnaBridge	157:e7ca05fa8600	2988	/**
AnnaBridge	157:e7ca05fa8600	2989	* @brief Set ADC analog watchdog thresholds value of both thresholds
AnnaBridge	157:e7ca05fa8600	2990	* high and low.
AnnaBridge	157:e7ca05fa8600	2991	* @note If value of only one threshold high or low must be set,
AnnaBridge	157:e7ca05fa8600	2992	* use function @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	2993	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	157:e7ca05fa8600	2994	* analog watchdog thresholds data require a specific shift.
AnnaBridge	157:e7ca05fa8600	2995	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	157:e7ca05fa8600	2996	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	2997	* instance:
AnnaBridge	157:e7ca05fa8600	2998	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	2999	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	3000	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	3001	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	3002	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	3003	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3004	* ADC state:
AnnaBridge	157:e7ca05fa8600	3005	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3006	* on group regular.
AnnaBridge	157:e7ca05fa8600	3007	* @rmtoll TR HT LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	157:e7ca05fa8600	3008	* TR LT LL_ADC_ConfigAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	3009	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3010	* @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3011	* @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3012	* @retval None
AnnaBridge	157:e7ca05fa8600	3013	*/
AnnaBridge	157:e7ca05fa8600	3014	__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
AnnaBridge	157:e7ca05fa8600	3015	{
AnnaBridge	157:e7ca05fa8600	3016	MODIFY_REG(ADCx->TR,
AnnaBridge	157:e7ca05fa8600	3017	ADC_TR_HT \| ADC_TR_LT,
AnnaBridge	157:e7ca05fa8600	3018	(AWDThresholdHighValue << ADC_TR_HT_BITOFFSET_POS) \| AWDThresholdLowValue);
AnnaBridge	157:e7ca05fa8600	3019	}
AnnaBridge	157:e7ca05fa8600	3020
AnnaBridge	157:e7ca05fa8600	3021	/**
AnnaBridge	157:e7ca05fa8600	3022	* @brief Set ADC analog watchdog threshold value of threshold
AnnaBridge	157:e7ca05fa8600	3023	* high or low.
AnnaBridge	157:e7ca05fa8600	3024	* @note If values of both thresholds high or low must be set,
AnnaBridge	157:e7ca05fa8600	3025	* use function @ref LL_ADC_ConfigAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	3026	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	157:e7ca05fa8600	3027	* analog watchdog thresholds data require a specific shift.
AnnaBridge	157:e7ca05fa8600	3028	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	157:e7ca05fa8600	3029	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	3030	* instance:
AnnaBridge	157:e7ca05fa8600	3031	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	3032	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	3033	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	3034	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	3035	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	3036	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3037	* ADC state:
AnnaBridge	157:e7ca05fa8600	3038	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3039	* on group regular.
AnnaBridge	157:e7ca05fa8600	3040	* @rmtoll TR HT LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	157:e7ca05fa8600	3041	* TR LT LL_ADC_SetAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	3042	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3043	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3044	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	157:e7ca05fa8600	3045	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	157:e7ca05fa8600	3046	* @param AWDThresholdValue: Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3047	* @retval None
AnnaBridge	157:e7ca05fa8600	3048	*/
AnnaBridge	157:e7ca05fa8600	3049	__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
AnnaBridge	157:e7ca05fa8600	3050	{
AnnaBridge	157:e7ca05fa8600	3051	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	157:e7ca05fa8600	3052	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	157:e7ca05fa8600	3053	/* high is selected, then data is shifted to LSB. Else(threshold low), */
AnnaBridge	157:e7ca05fa8600	3054	/* data is not shifted. */
AnnaBridge	157:e7ca05fa8600	3055	MODIFY_REG(ADCx->TR,
AnnaBridge	157:e7ca05fa8600	3056	AWDThresholdsHighLow,
AnnaBridge	157:e7ca05fa8600	3057	AWDThresholdValue << ((AWDThresholdsHighLow >> ADC_TR_HT_BITOFFSET_POS) & ((uint32_t)0x00000010U)));
AnnaBridge	157:e7ca05fa8600	3058	}
AnnaBridge	157:e7ca05fa8600	3059
AnnaBridge	157:e7ca05fa8600	3060	/**
AnnaBridge	157:e7ca05fa8600	3061	* @brief Get ADC analog watchdog threshold value of threshold high,
AnnaBridge	157:e7ca05fa8600	3062	* threshold low or raw data with ADC thresholds high and low
AnnaBridge	157:e7ca05fa8600	3063	* concatenated.
AnnaBridge	157:e7ca05fa8600	3064	* @note If raw data with ADC thresholds high and low is retrieved,
AnnaBridge	157:e7ca05fa8600	3065	* the data of each threshold high or low can be isolated
AnnaBridge	157:e7ca05fa8600	3066	* using helper macro:
AnnaBridge	157:e7ca05fa8600	3067	* @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
AnnaBridge	157:e7ca05fa8600	3068	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	157:e7ca05fa8600	3069	* analog watchdog thresholds data require a specific shift.
AnnaBridge	157:e7ca05fa8600	3070	* Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
AnnaBridge	157:e7ca05fa8600	3071	* @rmtoll TR HT LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	157:e7ca05fa8600	3072	* TR LT LL_ADC_GetAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	3073	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3074	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3075	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	157:e7ca05fa8600	3076	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	157:e7ca05fa8600	3077	* @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
AnnaBridge	157:e7ca05fa8600	3078	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3079	*/
AnnaBridge	157:e7ca05fa8600	3080	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow)
AnnaBridge	157:e7ca05fa8600	3081	{
AnnaBridge	157:e7ca05fa8600	3082	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	157:e7ca05fa8600	3083	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	157:e7ca05fa8600	3084	/* high is selected, then data is shifted to LSB. Else(threshold low or */
AnnaBridge	157:e7ca05fa8600	3085	/* both thresholds), data is not shifted. */
AnnaBridge	157:e7ca05fa8600	3086	return (uint32_t)(READ_BIT(ADCx->TR,
AnnaBridge	157:e7ca05fa8600	3087	(AWDThresholdsHighLow \| ADC_TR_LT))
AnnaBridge	157:e7ca05fa8600	3088	>> ((~AWDThresholdsHighLow) & ((uint32_t)0x00000010U))
AnnaBridge	157:e7ca05fa8600	3089	);
AnnaBridge	157:e7ca05fa8600	3090	}
AnnaBridge	157:e7ca05fa8600	3091
AnnaBridge	157:e7ca05fa8600	3092	/**
AnnaBridge	157:e7ca05fa8600	3093	* @}
AnnaBridge	157:e7ca05fa8600	3094	*/
AnnaBridge	157:e7ca05fa8600	3095
AnnaBridge	157:e7ca05fa8600	3096	/** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: oversampling
AnnaBridge	157:e7ca05fa8600	3097	* @{
AnnaBridge	157:e7ca05fa8600	3098	*/
AnnaBridge	157:e7ca05fa8600	3099
AnnaBridge	157:e7ca05fa8600	3100	/**
AnnaBridge	157:e7ca05fa8600	3101	* @brief Set ADC oversampling scope.
AnnaBridge	157:e7ca05fa8600	3102	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3103	* ADC state:
AnnaBridge	157:e7ca05fa8600	3104	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3105	* on group regular.
AnnaBridge	157:e7ca05fa8600	3106	* @rmtoll CFGR2 OVSE LL_ADC_SetOverSamplingScope
AnnaBridge	157:e7ca05fa8600	3107	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3108	* @param OvsScope This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3109	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	157:e7ca05fa8600	3110	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	157:e7ca05fa8600	3111	* @retval None
AnnaBridge	157:e7ca05fa8600	3112	*/
AnnaBridge	157:e7ca05fa8600	3113	__STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
AnnaBridge	157:e7ca05fa8600	3114	{
AnnaBridge	157:e7ca05fa8600	3115	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSE, OvsScope);
AnnaBridge	157:e7ca05fa8600	3116	}
AnnaBridge	157:e7ca05fa8600	3117
AnnaBridge	157:e7ca05fa8600	3118	/**
AnnaBridge	157:e7ca05fa8600	3119	* @brief Get ADC oversampling scope.
AnnaBridge	157:e7ca05fa8600	3120	* @rmtoll CFGR2 OVSE LL_ADC_GetOverSamplingScope
AnnaBridge	157:e7ca05fa8600	3121	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3122	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3123	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	157:e7ca05fa8600	3124	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	157:e7ca05fa8600	3125	*/
AnnaBridge	157:e7ca05fa8600	3126	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3127	{
AnnaBridge	157:e7ca05fa8600	3128	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSE));
AnnaBridge	157:e7ca05fa8600	3129	}
AnnaBridge	157:e7ca05fa8600	3130
AnnaBridge	157:e7ca05fa8600	3131	/**
AnnaBridge	157:e7ca05fa8600	3132	* @brief Set ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	157:e7ca05fa8600	3133	* on the selected ADC group.
AnnaBridge	157:e7ca05fa8600	3134	* @note Number of oversampled conversions are done either in:
AnnaBridge	157:e7ca05fa8600	3135	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3136	* are done from 1 trigger)
AnnaBridge	157:e7ca05fa8600	3137	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3138	* needs a trigger)
AnnaBridge	157:e7ca05fa8600	3139	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3140	* ADC state:
AnnaBridge	157:e7ca05fa8600	3141	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3142	* on group regular.
AnnaBridge	157:e7ca05fa8600	3143	* @rmtoll CFGR2 TOVS LL_ADC_SetOverSamplingDiscont
AnnaBridge	157:e7ca05fa8600	3144	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3145	* @param OverSamplingDiscont This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3146	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	157:e7ca05fa8600	3147	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	157:e7ca05fa8600	3148	* @retval None
AnnaBridge	157:e7ca05fa8600	3149	*/
AnnaBridge	157:e7ca05fa8600	3150	__STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
AnnaBridge	157:e7ca05fa8600	3151	{
AnnaBridge	157:e7ca05fa8600	3152	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TOVS, OverSamplingDiscont);
AnnaBridge	157:e7ca05fa8600	3153	}
AnnaBridge	157:e7ca05fa8600	3154
AnnaBridge	157:e7ca05fa8600	3155	/**
AnnaBridge	157:e7ca05fa8600	3156	* @brief Get ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	157:e7ca05fa8600	3157	* on the selected ADC group.
AnnaBridge	157:e7ca05fa8600	3158	* @note Number of oversampled conversions are done either in:
AnnaBridge	157:e7ca05fa8600	3159	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3160	* are done from 1 trigger)
AnnaBridge	157:e7ca05fa8600	3161	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3162	* needs a trigger)
AnnaBridge	157:e7ca05fa8600	3163	* @rmtoll CFGR2 TOVS LL_ADC_GetOverSamplingDiscont
AnnaBridge	157:e7ca05fa8600	3164	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3165	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3166	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	157:e7ca05fa8600	3167	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	157:e7ca05fa8600	3168	*/
AnnaBridge	157:e7ca05fa8600	3169	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3170	{
AnnaBridge	157:e7ca05fa8600	3171	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TOVS));
AnnaBridge	157:e7ca05fa8600	3172	}
AnnaBridge	157:e7ca05fa8600	3173
AnnaBridge	157:e7ca05fa8600	3174	/**
AnnaBridge	157:e7ca05fa8600	3175	* @brief Set ADC oversampling
AnnaBridge	157:e7ca05fa8600	3176	* @note This function set the 2 items of oversampling configuration:
AnnaBridge	157:e7ca05fa8600	3177	* - ratio
AnnaBridge	157:e7ca05fa8600	3178	* - shift
AnnaBridge	157:e7ca05fa8600	3179	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3180	* ADC state:
AnnaBridge	157:e7ca05fa8600	3181	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3182	* on group regular.
AnnaBridge	157:e7ca05fa8600	3183	* @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n
AnnaBridge	157:e7ca05fa8600	3184	* CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift
AnnaBridge	157:e7ca05fa8600	3185	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3186	* @param Ratio This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3187	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	157:e7ca05fa8600	3188	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	157:e7ca05fa8600	3189	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	157:e7ca05fa8600	3190	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	157:e7ca05fa8600	3191	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	157:e7ca05fa8600	3192	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	157:e7ca05fa8600	3193	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	157:e7ca05fa8600	3194	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	157:e7ca05fa8600	3195	* @param Shift This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3196	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	157:e7ca05fa8600	3197	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	157:e7ca05fa8600	3198	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	157:e7ca05fa8600	3199	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	157:e7ca05fa8600	3200	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	157:e7ca05fa8600	3201	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	157:e7ca05fa8600	3202	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	157:e7ca05fa8600	3203	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	157:e7ca05fa8600	3204	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	157:e7ca05fa8600	3205	* @retval None
AnnaBridge	157:e7ca05fa8600	3206	*/
AnnaBridge	157:e7ca05fa8600	3207	__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
AnnaBridge	157:e7ca05fa8600	3208	{
AnnaBridge	157:e7ca05fa8600	3209	MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR), (Shift \| Ratio));
AnnaBridge	157:e7ca05fa8600	3210	}
AnnaBridge	157:e7ca05fa8600	3211
AnnaBridge	157:e7ca05fa8600	3212	/**
AnnaBridge	157:e7ca05fa8600	3213	* @brief Get ADC oversampling ratio
AnnaBridge	157:e7ca05fa8600	3214	* @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio
AnnaBridge	157:e7ca05fa8600	3215	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3216	* @retval Ratio This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3217	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	157:e7ca05fa8600	3218	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	157:e7ca05fa8600	3219	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	157:e7ca05fa8600	3220	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	157:e7ca05fa8600	3221	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	157:e7ca05fa8600	3222	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	157:e7ca05fa8600	3223	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	157:e7ca05fa8600	3224	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	157:e7ca05fa8600	3225	*/
AnnaBridge	157:e7ca05fa8600	3226	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3227	{
AnnaBridge	157:e7ca05fa8600	3228	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
AnnaBridge	157:e7ca05fa8600	3229	}
AnnaBridge	157:e7ca05fa8600	3230
AnnaBridge	157:e7ca05fa8600	3231	/**
AnnaBridge	157:e7ca05fa8600	3232	* @brief Get ADC oversampling shift
AnnaBridge	157:e7ca05fa8600	3233	* @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift
AnnaBridge	157:e7ca05fa8600	3234	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3235	* @retval Shift This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3236	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	157:e7ca05fa8600	3237	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	157:e7ca05fa8600	3238	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	157:e7ca05fa8600	3239	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	157:e7ca05fa8600	3240	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	157:e7ca05fa8600	3241	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	157:e7ca05fa8600	3242	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	157:e7ca05fa8600	3243	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	157:e7ca05fa8600	3244	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	157:e7ca05fa8600	3245	*/
AnnaBridge	157:e7ca05fa8600	3246	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3247	{
AnnaBridge	157:e7ca05fa8600	3248	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
AnnaBridge	157:e7ca05fa8600	3249	}
AnnaBridge	157:e7ca05fa8600	3250
AnnaBridge	157:e7ca05fa8600	3251	/**
AnnaBridge	157:e7ca05fa8600	3252	* @}
AnnaBridge	157:e7ca05fa8600	3253	*/
AnnaBridge	157:e7ca05fa8600	3254
AnnaBridge	157:e7ca05fa8600	3255	/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
AnnaBridge	157:e7ca05fa8600	3256	* @{
AnnaBridge	157:e7ca05fa8600	3257	*/
AnnaBridge	157:e7ca05fa8600	3258
AnnaBridge	157:e7ca05fa8600	3259	/**
AnnaBridge	157:e7ca05fa8600	3260	* @brief Enable ADC instance internal voltage regulator.
AnnaBridge	157:e7ca05fa8600	3261	* @note On this STM32 serie, there are three possibilities to enable
AnnaBridge	157:e7ca05fa8600	3262	* the voltage regulator:
AnnaBridge	157:e7ca05fa8600	3263	* - by enabling it manually
AnnaBridge	167:84c0a372a020	3264	* using function @ref LL_ADC_EnableInternalRegulator().
AnnaBridge	157:e7ca05fa8600	3265	* - by launching a calibration
AnnaBridge	157:e7ca05fa8600	3266	* using function @ref LL_ADC_StartCalibration().
AnnaBridge	157:e7ca05fa8600	3267	* - by enabling the ADC
AnnaBridge	157:e7ca05fa8600	3268	* using function @ref LL_ADC_Enable().
AnnaBridge	157:e7ca05fa8600	3269	* @note On this STM32 serie, after ADC internal voltage regulator enable,
AnnaBridge	157:e7ca05fa8600	3270	* a delay for ADC internal voltage regulator stabilization
AnnaBridge	157:e7ca05fa8600	3271	* is required before performing a ADC calibration or ADC enable.
AnnaBridge	167:84c0a372a020	3272	* Refer to device datasheet, parameter "tUP_LDO".
AnnaBridge	157:e7ca05fa8600	3273	* Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
AnnaBridge	157:e7ca05fa8600	3274	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3275	* ADC state:
AnnaBridge	157:e7ca05fa8600	3276	* ADC must be ADC disabled.
AnnaBridge	157:e7ca05fa8600	3277	* @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
AnnaBridge	157:e7ca05fa8600	3278	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3279	* @retval None
AnnaBridge	157:e7ca05fa8600	3280	*/
AnnaBridge	157:e7ca05fa8600	3281	__STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3282	{
AnnaBridge	157:e7ca05fa8600	3283	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3284	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3285	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3286	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3287	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3288	ADC_CR_ADVREGEN);
AnnaBridge	157:e7ca05fa8600	3289	}
AnnaBridge	157:e7ca05fa8600	3290
AnnaBridge	157:e7ca05fa8600	3291	/**
AnnaBridge	157:e7ca05fa8600	3292	* @brief Disable ADC internal voltage regulator.
AnnaBridge	157:e7ca05fa8600	3293	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3294	* ADC state:
AnnaBridge	157:e7ca05fa8600	3295	* ADC must be ADC disabled.
AnnaBridge	157:e7ca05fa8600	3296	* @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator
AnnaBridge	157:e7ca05fa8600	3297	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3298	* @retval None
AnnaBridge	157:e7ca05fa8600	3299	*/
AnnaBridge	157:e7ca05fa8600	3300	__STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3301	{
AnnaBridge	157:e7ca05fa8600	3302	CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN \| ADC_CR_BITS_PROPERTY_RS));
AnnaBridge	157:e7ca05fa8600	3303	}
AnnaBridge	157:e7ca05fa8600	3304
AnnaBridge	157:e7ca05fa8600	3305	/**
AnnaBridge	157:e7ca05fa8600	3306	* @brief Get the selected ADC instance internal voltage regulator state.
AnnaBridge	157:e7ca05fa8600	3307	* @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
AnnaBridge	157:e7ca05fa8600	3308	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3309	* @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
AnnaBridge	157:e7ca05fa8600	3310	*/
AnnaBridge	157:e7ca05fa8600	3311	__STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3312	{
AnnaBridge	157:e7ca05fa8600	3313	return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
AnnaBridge	157:e7ca05fa8600	3314	}
AnnaBridge	157:e7ca05fa8600	3315
AnnaBridge	157:e7ca05fa8600	3316	/**
AnnaBridge	157:e7ca05fa8600	3317	* @brief Enable the selected ADC instance.
AnnaBridge	157:e7ca05fa8600	3318	* @note On this STM32 serie, after ADC enable, a delay for
AnnaBridge	157:e7ca05fa8600	3319	* ADC internal analog stabilization is required before performing a
AnnaBridge	157:e7ca05fa8600	3320	* ADC conversion start.
AnnaBridge	157:e7ca05fa8600	3321	* Refer to device datasheet, parameter tSTAB.
AnnaBridge	157:e7ca05fa8600	3322	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3323	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3324	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3325	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3326	* ADC state:
AnnaBridge	157:e7ca05fa8600	3327	* ADC must be ADC disabled and ADC internal voltage regulator enabled.
AnnaBridge	157:e7ca05fa8600	3328	* @rmtoll CR ADEN LL_ADC_Enable
AnnaBridge	157:e7ca05fa8600	3329	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3330	* @retval None
AnnaBridge	157:e7ca05fa8600	3331	*/
AnnaBridge	157:e7ca05fa8600	3332	__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3333	{
AnnaBridge	157:e7ca05fa8600	3334	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3335	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3336	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3337	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3338	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3339	ADC_CR_ADEN);
AnnaBridge	157:e7ca05fa8600	3340	}
AnnaBridge	157:e7ca05fa8600	3341
AnnaBridge	157:e7ca05fa8600	3342	/**
AnnaBridge	157:e7ca05fa8600	3343	* @brief Disable the selected ADC instance.
AnnaBridge	157:e7ca05fa8600	3344	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3345	* ADC state:
AnnaBridge	157:e7ca05fa8600	3346	* ADC must be not disabled. Must be enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3347	* on group regular.
AnnaBridge	157:e7ca05fa8600	3348	* @rmtoll CR ADDIS LL_ADC_Disable
AnnaBridge	157:e7ca05fa8600	3349	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3350	* @retval None
AnnaBridge	157:e7ca05fa8600	3351	*/
AnnaBridge	157:e7ca05fa8600	3352	__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3353	{
AnnaBridge	157:e7ca05fa8600	3354	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3355	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3356	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3357	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3358	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3359	ADC_CR_ADDIS);
AnnaBridge	157:e7ca05fa8600	3360	}
AnnaBridge	157:e7ca05fa8600	3361
AnnaBridge	157:e7ca05fa8600	3362	/**
AnnaBridge	157:e7ca05fa8600	3363	* @brief Get the selected ADC instance enable state.
AnnaBridge	157:e7ca05fa8600	3364	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3365	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3366	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3367	* @rmtoll CR ADEN LL_ADC_IsEnabled
AnnaBridge	157:e7ca05fa8600	3368	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3369	* @retval 0: ADC is disabled, 1: ADC is enabled.
AnnaBridge	157:e7ca05fa8600	3370	*/
AnnaBridge	157:e7ca05fa8600	3371	__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3372	{
AnnaBridge	157:e7ca05fa8600	3373	return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
AnnaBridge	157:e7ca05fa8600	3374	}
AnnaBridge	157:e7ca05fa8600	3375
AnnaBridge	157:e7ca05fa8600	3376	/**
AnnaBridge	157:e7ca05fa8600	3377	* @brief Get the selected ADC instance disable state.
AnnaBridge	157:e7ca05fa8600	3378	* @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
AnnaBridge	157:e7ca05fa8600	3379	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3380	* @retval 0: no ADC disable command on going.
AnnaBridge	157:e7ca05fa8600	3381	*/
AnnaBridge	157:e7ca05fa8600	3382	__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3383	{
AnnaBridge	157:e7ca05fa8600	3384	return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
AnnaBridge	157:e7ca05fa8600	3385	}
AnnaBridge	157:e7ca05fa8600	3386
AnnaBridge	157:e7ca05fa8600	3387	/**
AnnaBridge	157:e7ca05fa8600	3388	* @brief Start ADC calibration in the mode single-ended
AnnaBridge	157:e7ca05fa8600	3389	* or differential (for devices with differential mode available).
AnnaBridge	157:e7ca05fa8600	3390	* @note On this STM32 serie, a minimum number of ADC clock cycles
AnnaBridge	157:e7ca05fa8600	3391	* are required between ADC end of calibration and ADC enable.
AnnaBridge	157:e7ca05fa8600	3392	* Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
AnnaBridge	157:e7ca05fa8600	3393	* @note In case of usage of ADC with DMA transfer:
AnnaBridge	157:e7ca05fa8600	3394	* On this STM32 serie, ADC DMA transfer request should be disabled
AnnaBridge	157:e7ca05fa8600	3395	* during calibration:
AnnaBridge	157:e7ca05fa8600	3396	* Calibration factor is available in data register
AnnaBridge	157:e7ca05fa8600	3397	* and also transfered by DMA.
AnnaBridge	157:e7ca05fa8600	3398	* To not insert ADC calibration factor among ADC conversion data
AnnaBridge	157:e7ca05fa8600	3399	* in array variable, DMA transfer must be disabled during
AnnaBridge	157:e7ca05fa8600	3400	* calibration.
AnnaBridge	157:e7ca05fa8600	3401	* (DMA transfer setting backup and disable before calibration,
AnnaBridge	157:e7ca05fa8600	3402	* DMA transfer setting restore after calibration.
AnnaBridge	157:e7ca05fa8600	3403	* Refer to functions @ref LL_ADC_REG_GetDMATransfer(),
AnnaBridge	157:e7ca05fa8600	3404	* @ref LL_ADC_REG_SetDMATransfer() ).
AnnaBridge	157:e7ca05fa8600	3405	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3406	* ADC state:
AnnaBridge	157:e7ca05fa8600	3407	* ADC must be ADC disabled.
AnnaBridge	157:e7ca05fa8600	3408	* @rmtoll CR ADCAL LL_ADC_StartCalibration
AnnaBridge	157:e7ca05fa8600	3409	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3410	* @retval None
AnnaBridge	157:e7ca05fa8600	3411	*/
AnnaBridge	157:e7ca05fa8600	3412	__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3413	{
AnnaBridge	157:e7ca05fa8600	3414	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3415	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3416	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3417	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3418	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3419	ADC_CR_ADCAL);
AnnaBridge	157:e7ca05fa8600	3420	}
AnnaBridge	157:e7ca05fa8600	3421
AnnaBridge	157:e7ca05fa8600	3422	/**
AnnaBridge	157:e7ca05fa8600	3423	* @brief Get ADC calibration state.
AnnaBridge	157:e7ca05fa8600	3424	* @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
AnnaBridge	157:e7ca05fa8600	3425	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3426	* @retval 0: calibration complete, 1: calibration in progress.
AnnaBridge	157:e7ca05fa8600	3427	*/
AnnaBridge	157:e7ca05fa8600	3428	__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3429	{
AnnaBridge	157:e7ca05fa8600	3430	return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
AnnaBridge	157:e7ca05fa8600	3431	}
AnnaBridge	157:e7ca05fa8600	3432
AnnaBridge	157:e7ca05fa8600	3433	/**
AnnaBridge	157:e7ca05fa8600	3434	* @}
AnnaBridge	157:e7ca05fa8600	3435	*/
AnnaBridge	157:e7ca05fa8600	3436
AnnaBridge	157:e7ca05fa8600	3437	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
AnnaBridge	157:e7ca05fa8600	3438	* @{
AnnaBridge	157:e7ca05fa8600	3439	*/
AnnaBridge	157:e7ca05fa8600	3440
AnnaBridge	157:e7ca05fa8600	3441	/**
AnnaBridge	157:e7ca05fa8600	3442	* @brief Start ADC group regular conversion.
AnnaBridge	157:e7ca05fa8600	3443	* @note On this STM32 serie, this function is relevant for both
AnnaBridge	157:e7ca05fa8600	3444	* internal trigger (SW start) and external trigger:
AnnaBridge	157:e7ca05fa8600	3445	* - If ADC trigger has been set to software start, ADC conversion
AnnaBridge	157:e7ca05fa8600	3446	* starts immediately.
AnnaBridge	157:e7ca05fa8600	3447	* - If ADC trigger has been set to external trigger, ADC conversion
AnnaBridge	157:e7ca05fa8600	3448	* will start at next trigger event (on the selected trigger edge)
AnnaBridge	157:e7ca05fa8600	3449	* following the ADC start conversion command.
AnnaBridge	157:e7ca05fa8600	3450	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3451	* ADC state:
AnnaBridge	157:e7ca05fa8600	3452	* ADC must be enabled without conversion on going on group regular,
AnnaBridge	167:84c0a372a020	3453	* without conversion stop command on going on group regular,
AnnaBridge	167:84c0a372a020	3454	* without ADC disable command on going.
AnnaBridge	157:e7ca05fa8600	3455	* @rmtoll CR ADSTART LL_ADC_REG_StartConversion
AnnaBridge	157:e7ca05fa8600	3456	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3457	* @retval None
AnnaBridge	157:e7ca05fa8600	3458	*/
AnnaBridge	157:e7ca05fa8600	3459	__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3460	{
AnnaBridge	157:e7ca05fa8600	3461	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3462	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3463	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3464	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3465	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3466	ADC_CR_ADSTART);
AnnaBridge	157:e7ca05fa8600	3467	}
AnnaBridge	157:e7ca05fa8600	3468
AnnaBridge	157:e7ca05fa8600	3469	/**
AnnaBridge	157:e7ca05fa8600	3470	* @brief Stop ADC group regular conversion.
AnnaBridge	157:e7ca05fa8600	3471	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3472	* ADC state:
AnnaBridge	157:e7ca05fa8600	3473	* ADC must be enabled with conversion on going on group regular,
AnnaBridge	157:e7ca05fa8600	3474	* without ADC disable command on going.
AnnaBridge	157:e7ca05fa8600	3475	* @rmtoll CR ADSTP LL_ADC_REG_StopConversion
AnnaBridge	157:e7ca05fa8600	3476	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3477	* @retval None
AnnaBridge	157:e7ca05fa8600	3478	*/
AnnaBridge	157:e7ca05fa8600	3479	__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3480	{
AnnaBridge	157:e7ca05fa8600	3481	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3482	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3483	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3484	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3485	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3486	ADC_CR_ADSTP);
AnnaBridge	157:e7ca05fa8600	3487	}
AnnaBridge	157:e7ca05fa8600	3488
AnnaBridge	157:e7ca05fa8600	3489	/**
AnnaBridge	157:e7ca05fa8600	3490	* @brief Get ADC group regular conversion state.
AnnaBridge	157:e7ca05fa8600	3491	* @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
AnnaBridge	157:e7ca05fa8600	3492	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3493	* @retval 0: no conversion is on going on ADC group regular.
AnnaBridge	157:e7ca05fa8600	3494	*/
AnnaBridge	157:e7ca05fa8600	3495	__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3496	{
AnnaBridge	157:e7ca05fa8600	3497	return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
AnnaBridge	157:e7ca05fa8600	3498	}
AnnaBridge	157:e7ca05fa8600	3499
AnnaBridge	157:e7ca05fa8600	3500	/**
AnnaBridge	157:e7ca05fa8600	3501	* @brief Get ADC group regular command of conversion stop state
AnnaBridge	157:e7ca05fa8600	3502	* @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
AnnaBridge	157:e7ca05fa8600	3503	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3504	* @retval 0: no command of conversion stop is on going on ADC group regular.
AnnaBridge	157:e7ca05fa8600	3505	*/
AnnaBridge	157:e7ca05fa8600	3506	__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3507	{
AnnaBridge	157:e7ca05fa8600	3508	return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
AnnaBridge	157:e7ca05fa8600	3509	}
AnnaBridge	157:e7ca05fa8600	3510
AnnaBridge	157:e7ca05fa8600	3511	/**
AnnaBridge	157:e7ca05fa8600	3512	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3513	* all ADC configurations: all ADC resolutions and
AnnaBridge	157:e7ca05fa8600	3514	* all oversampling increased data width (for devices
AnnaBridge	157:e7ca05fa8600	3515	* with feature oversampling).
AnnaBridge	157:e7ca05fa8600	3516	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData32
AnnaBridge	157:e7ca05fa8600	3517	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3518	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	157:e7ca05fa8600	3519	*/
AnnaBridge	157:e7ca05fa8600	3520	__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3521	{
AnnaBridge	157:e7ca05fa8600	3522	return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3523	}
AnnaBridge	157:e7ca05fa8600	3524
AnnaBridge	157:e7ca05fa8600	3525	/**
AnnaBridge	157:e7ca05fa8600	3526	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3527	* ADC resolution 12 bits.
AnnaBridge	157:e7ca05fa8600	3528	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3529	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3530	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3531	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData12
AnnaBridge	157:e7ca05fa8600	3532	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3533	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3534	*/
AnnaBridge	157:e7ca05fa8600	3535	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3536	{
AnnaBridge	157:e7ca05fa8600	3537	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3538	}
AnnaBridge	157:e7ca05fa8600	3539
AnnaBridge	157:e7ca05fa8600	3540	/**
AnnaBridge	157:e7ca05fa8600	3541	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3542	* ADC resolution 10 bits.
AnnaBridge	157:e7ca05fa8600	3543	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3544	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3545	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3546	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData10
AnnaBridge	157:e7ca05fa8600	3547	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3548	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge	157:e7ca05fa8600	3549	*/
AnnaBridge	157:e7ca05fa8600	3550	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3551	{
AnnaBridge	157:e7ca05fa8600	3552	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3553	}
AnnaBridge	157:e7ca05fa8600	3554
AnnaBridge	157:e7ca05fa8600	3555	/**
AnnaBridge	157:e7ca05fa8600	3556	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3557	* ADC resolution 8 bits.
AnnaBridge	157:e7ca05fa8600	3558	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3559	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3560	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3561	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData8
AnnaBridge	157:e7ca05fa8600	3562	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3563	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	157:e7ca05fa8600	3564	*/
AnnaBridge	157:e7ca05fa8600	3565	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3566	{
AnnaBridge	157:e7ca05fa8600	3567	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3568	}
AnnaBridge	157:e7ca05fa8600	3569
AnnaBridge	157:e7ca05fa8600	3570	/**
AnnaBridge	157:e7ca05fa8600	3571	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3572	* ADC resolution 6 bits.
AnnaBridge	157:e7ca05fa8600	3573	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3574	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3575	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3576	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData6
AnnaBridge	157:e7ca05fa8600	3577	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3578	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	157:e7ca05fa8600	3579	*/
AnnaBridge	157:e7ca05fa8600	3580	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3581	{
AnnaBridge	157:e7ca05fa8600	3582	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3583	}
AnnaBridge	157:e7ca05fa8600	3584
AnnaBridge	157:e7ca05fa8600	3585	/**
AnnaBridge	157:e7ca05fa8600	3586	* @}
AnnaBridge	157:e7ca05fa8600	3587	*/
AnnaBridge	157:e7ca05fa8600	3588
AnnaBridge	157:e7ca05fa8600	3589	/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
AnnaBridge	157:e7ca05fa8600	3590	* @{
AnnaBridge	157:e7ca05fa8600	3591	*/
AnnaBridge	157:e7ca05fa8600	3592
AnnaBridge	157:e7ca05fa8600	3593	/**
AnnaBridge	157:e7ca05fa8600	3594	* @brief Get flag ADC ready.
AnnaBridge	157:e7ca05fa8600	3595	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3596	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3597	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3598	* @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY
AnnaBridge	157:e7ca05fa8600	3599	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3600	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3601	*/
AnnaBridge	157:e7ca05fa8600	3602	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3603	{
AnnaBridge	157:e7ca05fa8600	3604	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
AnnaBridge	157:e7ca05fa8600	3605	}
AnnaBridge	157:e7ca05fa8600	3606
AnnaBridge	157:e7ca05fa8600	3607	/**
AnnaBridge	157:e7ca05fa8600	3608	* @brief Get flag ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3609	* @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC
AnnaBridge	157:e7ca05fa8600	3610	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3611	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3612	*/
AnnaBridge	157:e7ca05fa8600	3613	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3614	{
AnnaBridge	157:e7ca05fa8600	3615	return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
AnnaBridge	157:e7ca05fa8600	3616	}
AnnaBridge	157:e7ca05fa8600	3617
AnnaBridge	157:e7ca05fa8600	3618	/**
AnnaBridge	157:e7ca05fa8600	3619	* @brief Get flag ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3620	* @rmtoll ISR EOSEQ LL_ADC_IsActiveFlag_EOS
AnnaBridge	157:e7ca05fa8600	3621	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3622	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3623	*/
AnnaBridge	157:e7ca05fa8600	3624	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3625	{
AnnaBridge	157:e7ca05fa8600	3626	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
AnnaBridge	157:e7ca05fa8600	3627	}
AnnaBridge	157:e7ca05fa8600	3628
AnnaBridge	157:e7ca05fa8600	3629	/**
AnnaBridge	157:e7ca05fa8600	3630	* @brief Get flag ADC group regular overrun.
AnnaBridge	157:e7ca05fa8600	3631	* @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR
AnnaBridge	157:e7ca05fa8600	3632	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3633	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3634	*/
AnnaBridge	157:e7ca05fa8600	3635	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3636	{
AnnaBridge	157:e7ca05fa8600	3637	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
AnnaBridge	157:e7ca05fa8600	3638	}
AnnaBridge	157:e7ca05fa8600	3639
AnnaBridge	157:e7ca05fa8600	3640	/**
AnnaBridge	157:e7ca05fa8600	3641	* @brief Get flag ADC group regular end of sampling phase.
AnnaBridge	157:e7ca05fa8600	3642	* @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP
AnnaBridge	157:e7ca05fa8600	3643	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3644	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3645	*/
AnnaBridge	157:e7ca05fa8600	3646	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3647	{
AnnaBridge	157:e7ca05fa8600	3648	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
AnnaBridge	157:e7ca05fa8600	3649	}
AnnaBridge	157:e7ca05fa8600	3650
AnnaBridge	157:e7ca05fa8600	3651	/**
AnnaBridge	157:e7ca05fa8600	3652	* @brief Get flag ADC analog watchdog 1 flag
AnnaBridge	157:e7ca05fa8600	3653	* @rmtoll ISR AWD LL_ADC_IsActiveFlag_AWD1
AnnaBridge	157:e7ca05fa8600	3654	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3655	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3656	*/
AnnaBridge	157:e7ca05fa8600	3657	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3658	{
AnnaBridge	157:e7ca05fa8600	3659	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
AnnaBridge	157:e7ca05fa8600	3660	}
AnnaBridge	157:e7ca05fa8600	3661
AnnaBridge	157:e7ca05fa8600	3662	/**
AnnaBridge	157:e7ca05fa8600	3663	* @brief Get flag ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3664	* @rmtoll ISR EOCAL LL_ADC_IsActiveFlag_EOCAL
AnnaBridge	157:e7ca05fa8600	3665	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3666	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3667	*/
AnnaBridge	157:e7ca05fa8600	3668	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3669	{
AnnaBridge	157:e7ca05fa8600	3670	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOCAL) == (LL_ADC_FLAG_EOCAL));
AnnaBridge	157:e7ca05fa8600	3671	}
AnnaBridge	157:e7ca05fa8600	3672
AnnaBridge	157:e7ca05fa8600	3673	/**
AnnaBridge	157:e7ca05fa8600	3674	* @brief Clear flag ADC ready.
AnnaBridge	157:e7ca05fa8600	3675	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3676	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3677	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3678	* @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY
AnnaBridge	157:e7ca05fa8600	3679	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3680	* @retval None
AnnaBridge	157:e7ca05fa8600	3681	*/
AnnaBridge	157:e7ca05fa8600	3682	__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3683	{
AnnaBridge	157:e7ca05fa8600	3684	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
AnnaBridge	157:e7ca05fa8600	3685	}
AnnaBridge	157:e7ca05fa8600	3686
AnnaBridge	157:e7ca05fa8600	3687	/**
AnnaBridge	157:e7ca05fa8600	3688	* @brief Clear flag ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3689	* @rmtoll ISR EOC LL_ADC_ClearFlag_EOC
AnnaBridge	157:e7ca05fa8600	3690	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3691	* @retval None
AnnaBridge	157:e7ca05fa8600	3692	*/
AnnaBridge	157:e7ca05fa8600	3693	__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3694	{
AnnaBridge	157:e7ca05fa8600	3695	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
AnnaBridge	157:e7ca05fa8600	3696	}
AnnaBridge	157:e7ca05fa8600	3697
AnnaBridge	157:e7ca05fa8600	3698	/**
AnnaBridge	157:e7ca05fa8600	3699	* @brief Clear flag ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3700	* @rmtoll ISR EOSEQ LL_ADC_ClearFlag_EOS
AnnaBridge	157:e7ca05fa8600	3701	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3702	* @retval None
AnnaBridge	157:e7ca05fa8600	3703	*/
AnnaBridge	157:e7ca05fa8600	3704	__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3705	{
AnnaBridge	157:e7ca05fa8600	3706	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
AnnaBridge	157:e7ca05fa8600	3707	}
AnnaBridge	157:e7ca05fa8600	3708
AnnaBridge	157:e7ca05fa8600	3709	/**
AnnaBridge	157:e7ca05fa8600	3710	* @brief Clear flag ADC group regular overrun.
AnnaBridge	157:e7ca05fa8600	3711	* @rmtoll ISR OVR LL_ADC_ClearFlag_OVR
AnnaBridge	157:e7ca05fa8600	3712	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3713	* @retval None
AnnaBridge	157:e7ca05fa8600	3714	*/
AnnaBridge	157:e7ca05fa8600	3715	__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3716	{
AnnaBridge	157:e7ca05fa8600	3717	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
AnnaBridge	157:e7ca05fa8600	3718	}
AnnaBridge	157:e7ca05fa8600	3719
AnnaBridge	157:e7ca05fa8600	3720	/**
AnnaBridge	157:e7ca05fa8600	3721	* @brief Clear flag ADC group regular end of sampling phase.
AnnaBridge	157:e7ca05fa8600	3722	* @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP
AnnaBridge	157:e7ca05fa8600	3723	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3724	* @retval None
AnnaBridge	157:e7ca05fa8600	3725	*/
AnnaBridge	157:e7ca05fa8600	3726	__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3727	{
AnnaBridge	157:e7ca05fa8600	3728	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
AnnaBridge	157:e7ca05fa8600	3729	}
AnnaBridge	157:e7ca05fa8600	3730
AnnaBridge	157:e7ca05fa8600	3731	/**
AnnaBridge	157:e7ca05fa8600	3732	* @brief Clear flag ADC analog watchdog 1.
AnnaBridge	157:e7ca05fa8600	3733	* @rmtoll ISR AWD LL_ADC_ClearFlag_AWD1
AnnaBridge	157:e7ca05fa8600	3734	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3735	* @retval None
AnnaBridge	157:e7ca05fa8600	3736	*/
AnnaBridge	157:e7ca05fa8600	3737	__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3738	{
AnnaBridge	157:e7ca05fa8600	3739	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
AnnaBridge	157:e7ca05fa8600	3740	}
AnnaBridge	157:e7ca05fa8600	3741
AnnaBridge	157:e7ca05fa8600	3742	/**
AnnaBridge	157:e7ca05fa8600	3743	* @brief Clear flag ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3744	* @rmtoll ISR EOCAL LL_ADC_ClearFlag_EOCAL
AnnaBridge	157:e7ca05fa8600	3745	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3746	* @retval None
AnnaBridge	157:e7ca05fa8600	3747	*/
AnnaBridge	157:e7ca05fa8600	3748	__STATIC_INLINE void LL_ADC_ClearFlag_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3749	{
AnnaBridge	157:e7ca05fa8600	3750	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOCAL);
AnnaBridge	157:e7ca05fa8600	3751	}
AnnaBridge	157:e7ca05fa8600	3752
AnnaBridge	157:e7ca05fa8600	3753	/**
AnnaBridge	157:e7ca05fa8600	3754	* @}
AnnaBridge	157:e7ca05fa8600	3755	*/
AnnaBridge	157:e7ca05fa8600	3756
AnnaBridge	157:e7ca05fa8600	3757	/** @defgroup ADC_LL_EF_IT_Management ADC IT management
AnnaBridge	157:e7ca05fa8600	3758	* @{
AnnaBridge	157:e7ca05fa8600	3759	*/
AnnaBridge	157:e7ca05fa8600	3760
AnnaBridge	157:e7ca05fa8600	3761	/**
AnnaBridge	157:e7ca05fa8600	3762	* @brief Enable ADC ready.
AnnaBridge	157:e7ca05fa8600	3763	* @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY
AnnaBridge	157:e7ca05fa8600	3764	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3765	* @retval None
AnnaBridge	157:e7ca05fa8600	3766	*/
AnnaBridge	157:e7ca05fa8600	3767	__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3768	{
AnnaBridge	157:e7ca05fa8600	3769	SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	157:e7ca05fa8600	3770	}
AnnaBridge	157:e7ca05fa8600	3771
AnnaBridge	157:e7ca05fa8600	3772	/**
AnnaBridge	157:e7ca05fa8600	3773	* @brief Enable interruption ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3774	* @rmtoll IER EOCIE LL_ADC_EnableIT_EOC
AnnaBridge	157:e7ca05fa8600	3775	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3776	* @retval None
AnnaBridge	157:e7ca05fa8600	3777	*/
AnnaBridge	157:e7ca05fa8600	3778	__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3779	{
AnnaBridge	157:e7ca05fa8600	3780	SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	157:e7ca05fa8600	3781	}
AnnaBridge	157:e7ca05fa8600	3782
AnnaBridge	157:e7ca05fa8600	3783	/**
AnnaBridge	157:e7ca05fa8600	3784	* @brief Enable interruption ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3785	* @rmtoll IER EOSEQIE LL_ADC_EnableIT_EOS
AnnaBridge	157:e7ca05fa8600	3786	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3787	* @retval None
AnnaBridge	157:e7ca05fa8600	3788	*/
AnnaBridge	157:e7ca05fa8600	3789	__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3790	{
AnnaBridge	157:e7ca05fa8600	3791	SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	157:e7ca05fa8600	3792	}
AnnaBridge	157:e7ca05fa8600	3793
AnnaBridge	157:e7ca05fa8600	3794	/**
AnnaBridge	157:e7ca05fa8600	3795	* @brief Enable ADC group regular interruption overrun.
AnnaBridge	157:e7ca05fa8600	3796	* @rmtoll IER OVRIE LL_ADC_EnableIT_OVR
AnnaBridge	157:e7ca05fa8600	3797	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3798	* @retval None
AnnaBridge	157:e7ca05fa8600	3799	*/
AnnaBridge	157:e7ca05fa8600	3800	__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3801	{
AnnaBridge	157:e7ca05fa8600	3802	SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	157:e7ca05fa8600	3803	}
AnnaBridge	157:e7ca05fa8600	3804
AnnaBridge	157:e7ca05fa8600	3805	/**
AnnaBridge	157:e7ca05fa8600	3806	* @brief Enable interruption ADC group regular end of sampling.
AnnaBridge	157:e7ca05fa8600	3807	* @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP
AnnaBridge	157:e7ca05fa8600	3808	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3809	* @retval None
AnnaBridge	157:e7ca05fa8600	3810	*/
AnnaBridge	157:e7ca05fa8600	3811	__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3812	{
AnnaBridge	157:e7ca05fa8600	3813	SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	157:e7ca05fa8600	3814	}
AnnaBridge	157:e7ca05fa8600	3815
AnnaBridge	157:e7ca05fa8600	3816	/**
AnnaBridge	157:e7ca05fa8600	3817	* @brief Enable interruption ADC analog watchdog 1.
AnnaBridge	157:e7ca05fa8600	3818	* @rmtoll IER AWDIE LL_ADC_EnableIT_AWD1
AnnaBridge	157:e7ca05fa8600	3819	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3820	* @retval None
AnnaBridge	157:e7ca05fa8600	3821	*/
AnnaBridge	157:e7ca05fa8600	3822	__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3823	{
AnnaBridge	157:e7ca05fa8600	3824	SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	157:e7ca05fa8600	3825	}
AnnaBridge	157:e7ca05fa8600	3826
AnnaBridge	157:e7ca05fa8600	3827	/**
AnnaBridge	157:e7ca05fa8600	3828	* @brief Enable interruption ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3829	* @rmtoll IER EOCALIE LL_ADC_EnableIT_EOCAL
AnnaBridge	157:e7ca05fa8600	3830	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3831	* @retval None
AnnaBridge	157:e7ca05fa8600	3832	*/
AnnaBridge	157:e7ca05fa8600	3833	__STATIC_INLINE void LL_ADC_EnableIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3834	{
AnnaBridge	157:e7ca05fa8600	3835	SET_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
AnnaBridge	157:e7ca05fa8600	3836	}
AnnaBridge	157:e7ca05fa8600	3837
AnnaBridge	157:e7ca05fa8600	3838	/**
AnnaBridge	157:e7ca05fa8600	3839	* @brief Disable interruption ADC ready.
AnnaBridge	157:e7ca05fa8600	3840	* @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY
AnnaBridge	157:e7ca05fa8600	3841	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3842	* @retval None
AnnaBridge	157:e7ca05fa8600	3843	*/
AnnaBridge	157:e7ca05fa8600	3844	__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3845	{
AnnaBridge	157:e7ca05fa8600	3846	CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	157:e7ca05fa8600	3847	}
AnnaBridge	157:e7ca05fa8600	3848
AnnaBridge	157:e7ca05fa8600	3849	/**
AnnaBridge	157:e7ca05fa8600	3850	* @brief Disable interruption ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3851	* @rmtoll IER EOCIE LL_ADC_DisableIT_EOC
AnnaBridge	157:e7ca05fa8600	3852	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3853	* @retval None
AnnaBridge	157:e7ca05fa8600	3854	*/
AnnaBridge	157:e7ca05fa8600	3855	__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3856	{
AnnaBridge	157:e7ca05fa8600	3857	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	157:e7ca05fa8600	3858	}
AnnaBridge	157:e7ca05fa8600	3859
AnnaBridge	157:e7ca05fa8600	3860	/**
AnnaBridge	157:e7ca05fa8600	3861	* @brief Disable interruption ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3862	* @rmtoll IER EOSEQIE LL_ADC_DisableIT_EOS
AnnaBridge	157:e7ca05fa8600	3863	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3864	* @retval None
AnnaBridge	157:e7ca05fa8600	3865	*/
AnnaBridge	157:e7ca05fa8600	3866	__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3867	{
AnnaBridge	157:e7ca05fa8600	3868	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	157:e7ca05fa8600	3869	}
AnnaBridge	157:e7ca05fa8600	3870
AnnaBridge	157:e7ca05fa8600	3871	/**
AnnaBridge	157:e7ca05fa8600	3872	* @brief Disable interruption ADC group regular overrun.
AnnaBridge	157:e7ca05fa8600	3873	* @rmtoll IER OVRIE LL_ADC_DisableIT_OVR
AnnaBridge	157:e7ca05fa8600	3874	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3875	* @retval None
AnnaBridge	157:e7ca05fa8600	3876	*/
AnnaBridge	157:e7ca05fa8600	3877	__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3878	{
AnnaBridge	157:e7ca05fa8600	3879	CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	157:e7ca05fa8600	3880	}
AnnaBridge	157:e7ca05fa8600	3881
AnnaBridge	157:e7ca05fa8600	3882	/**
AnnaBridge	157:e7ca05fa8600	3883	* @brief Disable interruption ADC group regular end of sampling.
AnnaBridge	157:e7ca05fa8600	3884	* @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP
AnnaBridge	157:e7ca05fa8600	3885	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3886	* @retval None
AnnaBridge	157:e7ca05fa8600	3887	*/
AnnaBridge	157:e7ca05fa8600	3888	__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3889	{
AnnaBridge	157:e7ca05fa8600	3890	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	157:e7ca05fa8600	3891	}
AnnaBridge	157:e7ca05fa8600	3892
AnnaBridge	157:e7ca05fa8600	3893	/**
AnnaBridge	157:e7ca05fa8600	3894	* @brief Disable interruption ADC analog watchdog 1.
AnnaBridge	157:e7ca05fa8600	3895	* @rmtoll IER AWDIE LL_ADC_DisableIT_AWD1
AnnaBridge	157:e7ca05fa8600	3896	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3897	* @retval None
AnnaBridge	157:e7ca05fa8600	3898	*/
AnnaBridge	157:e7ca05fa8600	3899	__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3900	{
AnnaBridge	157:e7ca05fa8600	3901	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	157:e7ca05fa8600	3902	}
AnnaBridge	157:e7ca05fa8600	3903
AnnaBridge	157:e7ca05fa8600	3904	/**
AnnaBridge	157:e7ca05fa8600	3905	* @brief Disable interruption ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3906	* @rmtoll IER EOCALIE LL_ADC_DisableIT_EOCAL
AnnaBridge	157:e7ca05fa8600	3907	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3908	* @retval None
AnnaBridge	157:e7ca05fa8600	3909	*/
AnnaBridge	157:e7ca05fa8600	3910	__STATIC_INLINE void LL_ADC_DisableIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3911	{
AnnaBridge	157:e7ca05fa8600	3912	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
AnnaBridge	157:e7ca05fa8600	3913	}
AnnaBridge	157:e7ca05fa8600	3914
AnnaBridge	157:e7ca05fa8600	3915	/**
AnnaBridge	157:e7ca05fa8600	3916	* @brief Get state of interruption ADC ready
AnnaBridge	157:e7ca05fa8600	3917	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3918	* @rmtoll IER ADRDYIE LL_ADC_IsEnabledIT_ADRDY
AnnaBridge	157:e7ca05fa8600	3919	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3920	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3921	*/
AnnaBridge	157:e7ca05fa8600	3922	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3923	{
AnnaBridge	157:e7ca05fa8600	3924	return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
AnnaBridge	157:e7ca05fa8600	3925	}
AnnaBridge	157:e7ca05fa8600	3926
AnnaBridge	157:e7ca05fa8600	3927	/**
AnnaBridge	157:e7ca05fa8600	3928	* @brief Get state of interruption ADC group regular end of unitary conversion
AnnaBridge	157:e7ca05fa8600	3929	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3930	* @rmtoll IER EOCIE LL_ADC_IsEnabledIT_EOC
AnnaBridge	157:e7ca05fa8600	3931	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3932	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3933	*/
AnnaBridge	157:e7ca05fa8600	3934	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3935	{
AnnaBridge	157:e7ca05fa8600	3936	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
AnnaBridge	157:e7ca05fa8600	3937	}
AnnaBridge	157:e7ca05fa8600	3938
AnnaBridge	157:e7ca05fa8600	3939	/**
AnnaBridge	157:e7ca05fa8600	3940	* @brief Get state of interruption ADC group regular end of sequence conversions
AnnaBridge	157:e7ca05fa8600	3941	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3942	* @rmtoll IER EOSEQIE LL_ADC_IsEnabledIT_EOS
AnnaBridge	157:e7ca05fa8600	3943	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3944	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3945	*/
AnnaBridge	157:e7ca05fa8600	3946	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3947	{
AnnaBridge	157:e7ca05fa8600	3948	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
AnnaBridge	157:e7ca05fa8600	3949	}
AnnaBridge	157:e7ca05fa8600	3950
AnnaBridge	157:e7ca05fa8600	3951	/**
AnnaBridge	157:e7ca05fa8600	3952	* @brief Get state of interruption ADC group regular overrun
AnnaBridge	157:e7ca05fa8600	3953	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3954	* @rmtoll IER OVRIE LL_ADC_IsEnabledIT_OVR
AnnaBridge	157:e7ca05fa8600	3955	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3956	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3957	*/
AnnaBridge	157:e7ca05fa8600	3958	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3959	{
AnnaBridge	157:e7ca05fa8600	3960	return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
AnnaBridge	157:e7ca05fa8600	3961	}
AnnaBridge	157:e7ca05fa8600	3962
AnnaBridge	157:e7ca05fa8600	3963	/**
AnnaBridge	157:e7ca05fa8600	3964	* @brief Get state of interruption ADC group regular end of sampling
AnnaBridge	157:e7ca05fa8600	3965	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3966	* @rmtoll IER EOSMPIE LL_ADC_IsEnabledIT_EOSMP
AnnaBridge	157:e7ca05fa8600	3967	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3968	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3969	*/
AnnaBridge	157:e7ca05fa8600	3970	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3971	{
AnnaBridge	157:e7ca05fa8600	3972	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
AnnaBridge	157:e7ca05fa8600	3973	}
AnnaBridge	157:e7ca05fa8600	3974
AnnaBridge	157:e7ca05fa8600	3975	/**
AnnaBridge	157:e7ca05fa8600	3976	* @brief Get state of interruption ADC analog watchdog 1
AnnaBridge	157:e7ca05fa8600	3977	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3978	* @rmtoll IER AWDIE LL_ADC_IsEnabledIT_AWD1
AnnaBridge	157:e7ca05fa8600	3979	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3980	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3981	*/
AnnaBridge	157:e7ca05fa8600	3982	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3983	{
AnnaBridge	157:e7ca05fa8600	3984	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
AnnaBridge	157:e7ca05fa8600	3985	}
AnnaBridge	157:e7ca05fa8600	3986
AnnaBridge	157:e7ca05fa8600	3987	/**
AnnaBridge	157:e7ca05fa8600	3988	* @brief Get state of interruption ADC end of calibration
AnnaBridge	157:e7ca05fa8600	3989	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3990	* @rmtoll IER EOCALIE LL_ADC_IsEnabledIT_EOCAL
AnnaBridge	157:e7ca05fa8600	3991	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3992	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3993	*/
AnnaBridge	157:e7ca05fa8600	3994	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3995	{
AnnaBridge	157:e7ca05fa8600	3996	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOCAL) == (LL_ADC_IT_EOCAL));
AnnaBridge	157:e7ca05fa8600	3997	}
AnnaBridge	157:e7ca05fa8600	3998
AnnaBridge	157:e7ca05fa8600	3999	/**
AnnaBridge	157:e7ca05fa8600	4000	* @}
AnnaBridge	157:e7ca05fa8600	4001	*/
AnnaBridge	157:e7ca05fa8600	4002
AnnaBridge	157:e7ca05fa8600	4003	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	157:e7ca05fa8600	4004	/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	157:e7ca05fa8600	4005	* @{
AnnaBridge	157:e7ca05fa8600	4006	*/
AnnaBridge	157:e7ca05fa8600	4007
AnnaBridge	157:e7ca05fa8600	4008	/* Initialization of some features of ADC common parameters and multimode */
AnnaBridge	157:e7ca05fa8600	4009	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
AnnaBridge	157:e7ca05fa8600	4010	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct);
AnnaBridge	157:e7ca05fa8600	4011	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
AnnaBridge	157:e7ca05fa8600	4012
AnnaBridge	157:e7ca05fa8600	4013	/* De-initialization of ADC instance */
AnnaBridge	157:e7ca05fa8600	4014	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
AnnaBridge	157:e7ca05fa8600	4015
AnnaBridge	157:e7ca05fa8600	4016	/* Initialization of some features of ADC instance */
AnnaBridge	157:e7ca05fa8600	4017	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct);
AnnaBridge	157:e7ca05fa8600	4018	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
AnnaBridge	157:e7ca05fa8600	4019
AnnaBridge	157:e7ca05fa8600	4020	/* Initialization of some features of ADC instance and ADC group regular */
AnnaBridge	157:e7ca05fa8600	4021	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct);
AnnaBridge	157:e7ca05fa8600	4022	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
AnnaBridge	157:e7ca05fa8600	4023
AnnaBridge	157:e7ca05fa8600	4024	/**
AnnaBridge	157:e7ca05fa8600	4025	* @}
AnnaBridge	157:e7ca05fa8600	4026	*/
AnnaBridge	157:e7ca05fa8600	4027	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	157:e7ca05fa8600	4028
AnnaBridge	157:e7ca05fa8600	4029	/**
AnnaBridge	157:e7ca05fa8600	4030	* @}
AnnaBridge	157:e7ca05fa8600	4031	*/
AnnaBridge	157:e7ca05fa8600	4032
AnnaBridge	157:e7ca05fa8600	4033	/**
AnnaBridge	157:e7ca05fa8600	4034	* @}
AnnaBridge	157:e7ca05fa8600	4035	*/
AnnaBridge	157:e7ca05fa8600	4036
AnnaBridge	157:e7ca05fa8600	4037	#endif /* ADC1 */
AnnaBridge	157:e7ca05fa8600	4038
AnnaBridge	157:e7ca05fa8600	4039	/**
AnnaBridge	157:e7ca05fa8600	4040	* @}
AnnaBridge	157:e7ca05fa8600	4041	*/
AnnaBridge	157:e7ca05fa8600	4042
AnnaBridge	157:e7ca05fa8600	4043	#ifdef __cplusplus
AnnaBridge	157:e7ca05fa8600	4044	}
AnnaBridge	157:e7ca05fa8600	4045	#endif
AnnaBridge	157:e7ca05fa8600	4046
AnnaBridge	157:e7ca05fa8600	4047	#endif /* __STM32L0xx_LL_ADC_H */
AnnaBridge	157:e7ca05fa8600	4048
AnnaBridge	157:e7ca05fa8600	4049	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/