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TARGET_NUCLEO_L011K4/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_adc.h@157:e7ca05fa8600, 2017-11-09 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 09 11:14:10 2017 +0000
Revision:: 157:e7ca05fa8600
Child:: 167:84c0a372a020

Release 155 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	157:e7ca05fa8600	1	/**
AnnaBridge	157:e7ca05fa8600	2	******************************************************************************
AnnaBridge	157:e7ca05fa8600	3	* @file stm32l0xx_ll_adc.h
AnnaBridge	157:e7ca05fa8600	4	* @author MCD Application Team
AnnaBridge	157:e7ca05fa8600	5	* @version V1.7.0
AnnaBridge	157:e7ca05fa8600	6	* @date 31-May-2016
AnnaBridge	157:e7ca05fa8600	7	* @brief Header file of ADC LL module.
AnnaBridge	157:e7ca05fa8600	8	******************************************************************************
AnnaBridge	157:e7ca05fa8600	9	* @attention
AnnaBridge	157:e7ca05fa8600	10	*
AnnaBridge	157:e7ca05fa8600	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	157:e7ca05fa8600	12	*
AnnaBridge	157:e7ca05fa8600	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	157:e7ca05fa8600	14	* are permitted provided that the following conditions are met:
AnnaBridge	157:e7ca05fa8600	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	157:e7ca05fa8600	16	* this list of conditions and the following disclaimer.
AnnaBridge	157:e7ca05fa8600	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	157:e7ca05fa8600	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	157:e7ca05fa8600	19	* and/or other materials provided with the distribution.
AnnaBridge	157:e7ca05fa8600	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	157:e7ca05fa8600	21	* may be used to endorse or promote products derived from this software
AnnaBridge	157:e7ca05fa8600	22	* without specific prior written permission.
AnnaBridge	157:e7ca05fa8600	23	*
AnnaBridge	157:e7ca05fa8600	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	157:e7ca05fa8600	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	157:e7ca05fa8600	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	157:e7ca05fa8600	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	157:e7ca05fa8600	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	157:e7ca05fa8600	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	157:e7ca05fa8600	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	157:e7ca05fa8600	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	157:e7ca05fa8600	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	157:e7ca05fa8600	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	157:e7ca05fa8600	34	*
AnnaBridge	157:e7ca05fa8600	35	******************************************************************************
AnnaBridge	157:e7ca05fa8600	36	*/
AnnaBridge	157:e7ca05fa8600	37
AnnaBridge	157:e7ca05fa8600	38	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	157:e7ca05fa8600	39	#ifndef __STM32L0xx_LL_ADC_H
AnnaBridge	157:e7ca05fa8600	40	#define __STM32L0xx_LL_ADC_H
AnnaBridge	157:e7ca05fa8600	41
AnnaBridge	157:e7ca05fa8600	42	#ifdef __cplusplus
AnnaBridge	157:e7ca05fa8600	43	extern "C" {
AnnaBridge	157:e7ca05fa8600	44	#endif
AnnaBridge	157:e7ca05fa8600	45
AnnaBridge	157:e7ca05fa8600	46	/* Includes ------------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	47	#include "stm32l0xx.h"
AnnaBridge	157:e7ca05fa8600	48
AnnaBridge	157:e7ca05fa8600	49	/** @addtogroup STM32L0xx_LL_Driver
AnnaBridge	157:e7ca05fa8600	50	* @{
AnnaBridge	157:e7ca05fa8600	51	*/
AnnaBridge	157:e7ca05fa8600	52
AnnaBridge	157:e7ca05fa8600	53	#if defined (ADC1)
AnnaBridge	157:e7ca05fa8600	54
AnnaBridge	157:e7ca05fa8600	55	/** @defgroup ADC_LL ADC
AnnaBridge	157:e7ca05fa8600	56	* @{
AnnaBridge	157:e7ca05fa8600	57	*/
AnnaBridge	157:e7ca05fa8600	58
AnnaBridge	157:e7ca05fa8600	59	/* Private types -------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	60	/* Private variables ---------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	61
AnnaBridge	157:e7ca05fa8600	62	/* Private constants ---------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	63	/** @defgroup ADC_LL_Private_Constants ADC Private Constants
AnnaBridge	157:e7ca05fa8600	64	* @{
AnnaBridge	157:e7ca05fa8600	65	*/
AnnaBridge	157:e7ca05fa8600	66
AnnaBridge	157:e7ca05fa8600	67	/* Internal mask for ADC group regular trigger: */
AnnaBridge	157:e7ca05fa8600	68	/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
AnnaBridge	157:e7ca05fa8600	69	/* - regular trigger source */
AnnaBridge	157:e7ca05fa8600	70	/* - regular trigger edge */
AnnaBridge	157:e7ca05fa8600	71	#define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
AnnaBridge	157:e7ca05fa8600	72
AnnaBridge	157:e7ca05fa8600	73	/* Mask containing trigger source masks for each of possible */
AnnaBridge	157:e7ca05fa8600	74	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	157:e7ca05fa8600	75	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	157:e7ca05fa8600	76	#define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTSEL) << (4U * 0U)) \| \
AnnaBridge	157:e7ca05fa8600	77	((ADC_CFGR1_EXTSEL) << (4U * 1U)) \| \
AnnaBridge	157:e7ca05fa8600	78	((ADC_CFGR1_EXTSEL) << (4U * 2U)) \| \
AnnaBridge	157:e7ca05fa8600	79	((ADC_CFGR1_EXTSEL) << (4U * 3U)) )
AnnaBridge	157:e7ca05fa8600	80
AnnaBridge	157:e7ca05fa8600	81	/* Mask containing trigger edge masks for each of possible */
AnnaBridge	157:e7ca05fa8600	82	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	157:e7ca05fa8600	83	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	157:e7ca05fa8600	84	#define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * 0U)) \| \
AnnaBridge	157:e7ca05fa8600	85	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
AnnaBridge	157:e7ca05fa8600	86	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
AnnaBridge	157:e7ca05fa8600	87	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
AnnaBridge	157:e7ca05fa8600	88
AnnaBridge	157:e7ca05fa8600	89	/* Definition of ADC group regular trigger bits information. */
AnnaBridge	157:e7ca05fa8600	90	#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTSEL) */
AnnaBridge	157:e7ca05fa8600	91	#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTEN) */
AnnaBridge	157:e7ca05fa8600	92
AnnaBridge	157:e7ca05fa8600	93
AnnaBridge	157:e7ca05fa8600	94
AnnaBridge	157:e7ca05fa8600	95	/* Internal mask for ADC channel: */
AnnaBridge	157:e7ca05fa8600	96	/* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
AnnaBridge	157:e7ca05fa8600	97	/* - channel identifier defined by number */
AnnaBridge	157:e7ca05fa8600	98	/* - channel identifier defined by bitfield */
AnnaBridge	157:e7ca05fa8600	99	/* - channel differentiation between external channels (connected to */
AnnaBridge	157:e7ca05fa8600	100	/* GPIO pins) and internal channels (connected to internal paths) */
AnnaBridge	157:e7ca05fa8600	101	#define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR1_AWDCH)
AnnaBridge	157:e7ca05fa8600	102	#define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
AnnaBridge	157:e7ca05fa8600	103	#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS ((uint32_t)26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
AnnaBridge	157:e7ca05fa8600	104	#define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK \| ADC_CHANNEL_ID_BITFIELD_MASK \| ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	157:e7ca05fa8600	105	/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
AnnaBridge	157:e7ca05fa8600	106	#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 ((uint32_t)0x0000001FU) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
AnnaBridge	157:e7ca05fa8600	107
AnnaBridge	157:e7ca05fa8600	108	/* Channel differentiation between external and internal channels */
AnnaBridge	157:e7ca05fa8600	109	#define ADC_CHANNEL_ID_INTERNAL_CH ((uint32_t)0x80000000U) /* Marker of internal channel */
AnnaBridge	157:e7ca05fa8600	110	#define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH)
AnnaBridge	157:e7ca05fa8600	111
AnnaBridge	157:e7ca05fa8600	112	/* Definition of channels ID number information to be inserted into */
AnnaBridge	157:e7ca05fa8600	113	/* channels literals definition. */
AnnaBridge	157:e7ca05fa8600	114	#define ADC_CHANNEL_0_NUMBER ((uint32_t)0x00000000U)
AnnaBridge	157:e7ca05fa8600	115	#define ADC_CHANNEL_1_NUMBER ( ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	116	#define ADC_CHANNEL_2_NUMBER ( ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	117	#define ADC_CHANNEL_3_NUMBER ( ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	118	#define ADC_CHANNEL_4_NUMBER ( ADC_CFGR1_AWDCH_2 )
AnnaBridge	157:e7ca05fa8600	119	#define ADC_CHANNEL_5_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	120	#define ADC_CHANNEL_6_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	121	#define ADC_CHANNEL_7_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	122	#define ADC_CHANNEL_8_NUMBER ( ADC_CFGR1_AWDCH_3 )
AnnaBridge	157:e7ca05fa8600	123	#define ADC_CHANNEL_9_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	124	#define ADC_CHANNEL_10_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	125	#define ADC_CHANNEL_11_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	126	#define ADC_CHANNEL_12_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 )
AnnaBridge	157:e7ca05fa8600	127	#define ADC_CHANNEL_13_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	128	#define ADC_CHANNEL_14_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	129	#define ADC_CHANNEL_15_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	130	#define ADC_CHANNEL_16_NUMBER (ADC_CFGR1_AWDCH_4 )
AnnaBridge	157:e7ca05fa8600	131	#define ADC_CHANNEL_17_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	157:e7ca05fa8600	132	#define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	157:e7ca05fa8600	133
AnnaBridge	157:e7ca05fa8600	134	/* Definition of channels ID bitfield information to be inserted into */
AnnaBridge	157:e7ca05fa8600	135	/* channels literals definition. */
AnnaBridge	157:e7ca05fa8600	136	#define ADC_CHANNEL_0_BITFIELD (ADC_CHSELR_CHSEL0)
AnnaBridge	157:e7ca05fa8600	137	#define ADC_CHANNEL_1_BITFIELD (ADC_CHSELR_CHSEL1)
AnnaBridge	157:e7ca05fa8600	138	#define ADC_CHANNEL_2_BITFIELD (ADC_CHSELR_CHSEL2)
AnnaBridge	157:e7ca05fa8600	139	#define ADC_CHANNEL_3_BITFIELD (ADC_CHSELR_CHSEL3)
AnnaBridge	157:e7ca05fa8600	140	#define ADC_CHANNEL_4_BITFIELD (ADC_CHSELR_CHSEL4)
AnnaBridge	157:e7ca05fa8600	141	#define ADC_CHANNEL_5_BITFIELD (ADC_CHSELR_CHSEL5)
AnnaBridge	157:e7ca05fa8600	142	#define ADC_CHANNEL_6_BITFIELD (ADC_CHSELR_CHSEL6)
AnnaBridge	157:e7ca05fa8600	143	#define ADC_CHANNEL_7_BITFIELD (ADC_CHSELR_CHSEL7)
AnnaBridge	157:e7ca05fa8600	144	#define ADC_CHANNEL_8_BITFIELD (ADC_CHSELR_CHSEL8)
AnnaBridge	157:e7ca05fa8600	145	#define ADC_CHANNEL_9_BITFIELD (ADC_CHSELR_CHSEL9)
AnnaBridge	157:e7ca05fa8600	146	#define ADC_CHANNEL_10_BITFIELD (ADC_CHSELR_CHSEL10)
AnnaBridge	157:e7ca05fa8600	147	#define ADC_CHANNEL_11_BITFIELD (ADC_CHSELR_CHSEL11)
AnnaBridge	157:e7ca05fa8600	148	#define ADC_CHANNEL_12_BITFIELD (ADC_CHSELR_CHSEL12)
AnnaBridge	157:e7ca05fa8600	149	#define ADC_CHANNEL_13_BITFIELD (ADC_CHSELR_CHSEL13)
AnnaBridge	157:e7ca05fa8600	150	#define ADC_CHANNEL_14_BITFIELD (ADC_CHSELR_CHSEL14)
AnnaBridge	157:e7ca05fa8600	151	#define ADC_CHANNEL_15_BITFIELD (ADC_CHSELR_CHSEL15)
AnnaBridge	157:e7ca05fa8600	152	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	153	#define ADC_CHANNEL_16_BITFIELD (ADC_CHSELR_CHSEL16)
AnnaBridge	157:e7ca05fa8600	154	#endif
AnnaBridge	157:e7ca05fa8600	155	#define ADC_CHANNEL_17_BITFIELD (ADC_CHSELR_CHSEL17)
AnnaBridge	157:e7ca05fa8600	156	#define ADC_CHANNEL_18_BITFIELD (ADC_CHSELR_CHSEL18)
AnnaBridge	157:e7ca05fa8600	157
AnnaBridge	157:e7ca05fa8600	158	/* Internal mask for ADC analog watchdog: */
AnnaBridge	157:e7ca05fa8600	159	/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
AnnaBridge	157:e7ca05fa8600	160	/* (concatenation of multiple bits used in different analog watchdogs, */
AnnaBridge	157:e7ca05fa8600	161	/* (feature of several watchdogs not available on all STM32 families)). */
AnnaBridge	157:e7ca05fa8600	162	/* - analog watchdog 1: monitored channel defined by number, */
AnnaBridge	157:e7ca05fa8600	163	/* selection of ADC group (ADC group regular). */
AnnaBridge	157:e7ca05fa8600	164
AnnaBridge	157:e7ca05fa8600	165	/* Internal register offset for ADC analog watchdog channel configuration */
AnnaBridge	157:e7ca05fa8600	166	#define ADC_AWD_CR1_REGOFFSET ((uint32_t)0x00000000U)
AnnaBridge	157:e7ca05fa8600	167
AnnaBridge	157:e7ca05fa8600	168	#define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	157:e7ca05fa8600	169
AnnaBridge	157:e7ca05fa8600	170	#define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	157:e7ca05fa8600	171	#define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK)
AnnaBridge	157:e7ca05fa8600	172
AnnaBridge	157:e7ca05fa8600	173	/* Internal register offset for ADC analog watchdog threshold configuration */
AnnaBridge	157:e7ca05fa8600	174	#define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	157:e7ca05fa8600	175	#define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET)
AnnaBridge	157:e7ca05fa8600	176
AnnaBridge	157:e7ca05fa8600	177
AnnaBridge	157:e7ca05fa8600	178	/* ADC registers bits positions */
AnnaBridge	157:e7ca05fa8600	179	#define ADC_CFGR1_RES_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_RES) */
AnnaBridge	157:e7ca05fa8600	180	#define ADC_CFGR1_AWDSGL_BITOFFSET_POS ((uint32_t)22U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_AWDSGL) */
AnnaBridge	157:e7ca05fa8600	181	#define ADC_TR_HT_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_TR_HT) */
AnnaBridge	157:e7ca05fa8600	182	#define ADC_CHSELR_CHSEL0_BITOFFSET_POS ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL0) */
AnnaBridge	157:e7ca05fa8600	183	#define ADC_CHSELR_CHSEL1_BITOFFSET_POS ((uint32_t) 1U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL1) */
AnnaBridge	157:e7ca05fa8600	184	#define ADC_CHSELR_CHSEL2_BITOFFSET_POS ((uint32_t) 2U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL2) */
AnnaBridge	157:e7ca05fa8600	185	#define ADC_CHSELR_CHSEL3_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL3) */
AnnaBridge	157:e7ca05fa8600	186	#define ADC_CHSELR_CHSEL4_BITOFFSET_POS ((uint32_t) 4U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL4) */
AnnaBridge	157:e7ca05fa8600	187	#define ADC_CHSELR_CHSEL5_BITOFFSET_POS ((uint32_t) 5U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL5) */
AnnaBridge	157:e7ca05fa8600	188	#define ADC_CHSELR_CHSEL6_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL6) */
AnnaBridge	157:e7ca05fa8600	189	#define ADC_CHSELR_CHSEL7_BITOFFSET_POS ((uint32_t) 7U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL7) */
AnnaBridge	157:e7ca05fa8600	190	#define ADC_CHSELR_CHSEL8_BITOFFSET_POS ((uint32_t) 8U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL8) */
AnnaBridge	157:e7ca05fa8600	191	#define ADC_CHSELR_CHSEL9_BITOFFSET_POS ((uint32_t) 9U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL9) */
AnnaBridge	157:e7ca05fa8600	192	#define ADC_CHSELR_CHSEL10_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL10) */
AnnaBridge	157:e7ca05fa8600	193	#define ADC_CHSELR_CHSEL11_BITOFFSET_POS ((uint32_t)11U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL11) */
AnnaBridge	157:e7ca05fa8600	194	#define ADC_CHSELR_CHSEL12_BITOFFSET_POS ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL12) */
AnnaBridge	157:e7ca05fa8600	195	#define ADC_CHSELR_CHSEL13_BITOFFSET_POS ((uint32_t)13U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL13) */
AnnaBridge	157:e7ca05fa8600	196	#define ADC_CHSELR_CHSEL14_BITOFFSET_POS ((uint32_t)14U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL14) */
AnnaBridge	157:e7ca05fa8600	197	#define ADC_CHSELR_CHSEL15_BITOFFSET_POS ((uint32_t)15U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL15) */
AnnaBridge	157:e7ca05fa8600	198	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	199	#define ADC_CHSELR_CHSEL16_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL16) */
AnnaBridge	157:e7ca05fa8600	200	#endif
AnnaBridge	157:e7ca05fa8600	201	#define ADC_CHSELR_CHSEL17_BITOFFSET_POS ((uint32_t)17U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL17) */
AnnaBridge	157:e7ca05fa8600	202	#define ADC_CHSELR_CHSEL18_BITOFFSET_POS ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL18) */
AnnaBridge	157:e7ca05fa8600	203
AnnaBridge	157:e7ca05fa8600	204
AnnaBridge	157:e7ca05fa8600	205	/* ADC registers bits groups */
AnnaBridge	157:e7ca05fa8600	206	#define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL \| ADC_CR_ADSTP \| ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
AnnaBridge	157:e7ca05fa8600	207
AnnaBridge	157:e7ca05fa8600	208
AnnaBridge	157:e7ca05fa8600	209	/* ADC internal channels related definitions */
AnnaBridge	157:e7ca05fa8600	210	/* Internal voltage reference VrefInt */
AnnaBridge	157:e7ca05fa8600	211	#define VREFINT_CAL_ADDR ((uint16_t) ((uint32_t)0x1FF80078U)) / Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	157:e7ca05fa8600	212	#define VREFINT_CAL_VREF ((uint32_t) 3000U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
AnnaBridge	157:e7ca05fa8600	213	/* Temperature sensor */
AnnaBridge	157:e7ca05fa8600	214	#define TEMPSENSOR_CAL1_ADDR ((uint16_t) ((uint32_t)0x1FF8007AU)) / Internal temperature sensor, address of parameter TS_CAL1: On STM32L0, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	157:e7ca05fa8600	215	#define TEMPSENSOR_CAL2_ADDR ((uint16_t) ((uint32_t)0x1FF8007EU)) / Internal temperature sensor, address of parameter TS_CAL2: On STM32L0, temperature sensor ADC raw data acquired at temperature 130 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	157:e7ca05fa8600	216	#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	157:e7ca05fa8600	217	#define TEMPSENSOR_CAL2_TEMP (( int32_t) 130) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	157:e7ca05fa8600	218	#define TEMPSENSOR_CAL_VREFANALOG ((uint32_t) 3000U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
AnnaBridge	157:e7ca05fa8600	219
AnnaBridge	157:e7ca05fa8600	220
AnnaBridge	157:e7ca05fa8600	221	/**
AnnaBridge	157:e7ca05fa8600	222	* @}
AnnaBridge	157:e7ca05fa8600	223	*/
AnnaBridge	157:e7ca05fa8600	224
AnnaBridge	157:e7ca05fa8600	225
AnnaBridge	157:e7ca05fa8600	226	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	157:e7ca05fa8600	227	/* Private macros ------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	228	/** @defgroup ADC_LL_Private_Macros ADC Private Macros
AnnaBridge	157:e7ca05fa8600	229	* @{
AnnaBridge	157:e7ca05fa8600	230	*/
AnnaBridge	157:e7ca05fa8600	231
AnnaBridge	157:e7ca05fa8600	232
AnnaBridge	157:e7ca05fa8600	233	/**
AnnaBridge	157:e7ca05fa8600	234	* @}
AnnaBridge	157:e7ca05fa8600	235	*/
AnnaBridge	157:e7ca05fa8600	236
AnnaBridge	157:e7ca05fa8600	237	#endif
AnnaBridge	157:e7ca05fa8600	238
AnnaBridge	157:e7ca05fa8600	239	/* Exported types ------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	240	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	157:e7ca05fa8600	241	/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
AnnaBridge	157:e7ca05fa8600	242	* @{
AnnaBridge	157:e7ca05fa8600	243	*/
AnnaBridge	157:e7ca05fa8600	244
AnnaBridge	157:e7ca05fa8600	245	/**
AnnaBridge	157:e7ca05fa8600	246	* @brief Structure definition of some features of ADC common parameters
AnnaBridge	157:e7ca05fa8600	247	* and multimode
AnnaBridge	157:e7ca05fa8600	248	* (all ADC instances belonging to the same ADC common instance).
AnnaBridge	157:e7ca05fa8600	249	* @note The setting of these parameters by function @ref LL_ADC_CommonInit()
AnnaBridge	157:e7ca05fa8600	250	* is conditioned to ADC instances state (all ADC instances
AnnaBridge	157:e7ca05fa8600	251	* sharing the same ADC common instance):
AnnaBridge	157:e7ca05fa8600	252	* All ADC instances sharing the same ADC common instance must be
AnnaBridge	157:e7ca05fa8600	253	* disabled.
AnnaBridge	157:e7ca05fa8600	254	*/
AnnaBridge	157:e7ca05fa8600	255	typedef struct
AnnaBridge	157:e7ca05fa8600	256	{
AnnaBridge	157:e7ca05fa8600	257	uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	258	This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
AnnaBridge	157:e7ca05fa8600	259
AnnaBridge	157:e7ca05fa8600	260	This feature can be modified afterwards using unitary function @ref LL_ADC_SetCommonClock(). */
AnnaBridge	157:e7ca05fa8600	261
AnnaBridge	157:e7ca05fa8600	262	} LL_ADC_CommonInitTypeDef;
AnnaBridge	157:e7ca05fa8600	263
AnnaBridge	157:e7ca05fa8600	264	/**
AnnaBridge	157:e7ca05fa8600	265	* @brief Structure definition of some features of ADC instance.
AnnaBridge	157:e7ca05fa8600	266	* @note These parameters have an impact on ADC scope: ADC instance.
AnnaBridge	157:e7ca05fa8600	267	* Refer to corresponding unitary functions into
AnnaBridge	157:e7ca05fa8600	268	* @ref ADC_LL_EF_Configuration_ADC_Instance .
AnnaBridge	157:e7ca05fa8600	269	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	157:e7ca05fa8600	270	* is conditioned to ADC state:
AnnaBridge	157:e7ca05fa8600	271	* ADC instance must be disabled.
AnnaBridge	157:e7ca05fa8600	272	* This condition is applied to all ADC features, for efficiency
AnnaBridge	157:e7ca05fa8600	273	* and compatibility over all STM32 families. However, the different
AnnaBridge	157:e7ca05fa8600	274	* features can be set under different ADC state conditions
AnnaBridge	157:e7ca05fa8600	275	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	157:e7ca05fa8600	276	* ADC enabled with conversion on going, ...)
AnnaBridge	157:e7ca05fa8600	277	* Each feature can be updated afterwards with a unitary function
AnnaBridge	157:e7ca05fa8600	278	* and potentially with ADC in a different state than disabled,
AnnaBridge	157:e7ca05fa8600	279	* refer to description of each function for setting
AnnaBridge	157:e7ca05fa8600	280	* conditioned to ADC state.
AnnaBridge	157:e7ca05fa8600	281	*/
AnnaBridge	157:e7ca05fa8600	282	typedef struct
AnnaBridge	157:e7ca05fa8600	283	{
AnnaBridge	157:e7ca05fa8600	284	uint32_t Clock; /*!< Set ADC instance clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	285	This parameter can be a value of @ref ADC_LL_EC_CLOCK_SOURCE
AnnaBridge	157:e7ca05fa8600	286	@note On this STM32 serie, this parameter has some clock ratio constraints:
AnnaBridge	157:e7ca05fa8600	287	ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clock cycle
AnnaBridge	157:e7ca05fa8600	288	(APB prescaler configured inside the RCC must be bypassed and the system clock must by 50% duty cycle).
AnnaBridge	157:e7ca05fa8600	289
AnnaBridge	157:e7ca05fa8600	290
AnnaBridge	157:e7ca05fa8600	291	This feature can be modified afterwards using unitary function @ref LL_ADC_SetClock().
AnnaBridge	157:e7ca05fa8600	292	For more details, refer to description of this function. */
AnnaBridge	157:e7ca05fa8600	293
AnnaBridge	157:e7ca05fa8600	294	uint32_t Resolution; /*!< Set ADC resolution.
AnnaBridge	157:e7ca05fa8600	295	This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
AnnaBridge	157:e7ca05fa8600	296
AnnaBridge	157:e7ca05fa8600	297	This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
AnnaBridge	157:e7ca05fa8600	298
AnnaBridge	157:e7ca05fa8600	299	uint32_t DataAlignment; /*!< Set ADC conversion data alignment.
AnnaBridge	157:e7ca05fa8600	300	This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
AnnaBridge	157:e7ca05fa8600	301
AnnaBridge	157:e7ca05fa8600	302	This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
AnnaBridge	157:e7ca05fa8600	303
AnnaBridge	157:e7ca05fa8600	304	uint32_t LowPowerMode; /*!< Set ADC low power mode.
AnnaBridge	157:e7ca05fa8600	305	This parameter can be a value of @ref ADC_LL_EC_LP_MODE
AnnaBridge	157:e7ca05fa8600	306
AnnaBridge	157:e7ca05fa8600	307	This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
AnnaBridge	157:e7ca05fa8600	308
AnnaBridge	157:e7ca05fa8600	309	} LL_ADC_InitTypeDef;
AnnaBridge	157:e7ca05fa8600	310
AnnaBridge	157:e7ca05fa8600	311	/**
AnnaBridge	157:e7ca05fa8600	312	* @brief Structure definition of some features of ADC group regular.
AnnaBridge	157:e7ca05fa8600	313	* @note These parameters have an impact on ADC scope: ADC group regular.
AnnaBridge	157:e7ca05fa8600	314	* Refer to corresponding unitary functions into
AnnaBridge	157:e7ca05fa8600	315	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	157:e7ca05fa8600	316	* (functions with prefix "REG").
AnnaBridge	157:e7ca05fa8600	317	* @note The setting of these parameters by function @ref LL_ADC_REG_Init()
AnnaBridge	157:e7ca05fa8600	318	* is conditioned to ADC state:
AnnaBridge	157:e7ca05fa8600	319	* ADC instance must be disabled.
AnnaBridge	157:e7ca05fa8600	320	* This condition is applied to all ADC features, for efficiency
AnnaBridge	157:e7ca05fa8600	321	* and compatibility over all STM32 families. However, the different
AnnaBridge	157:e7ca05fa8600	322	* features can be set under different ADC state conditions
AnnaBridge	157:e7ca05fa8600	323	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	157:e7ca05fa8600	324	* ADC enabled with conversion on going, ...)
AnnaBridge	157:e7ca05fa8600	325	* Each feature can be updated afterwards with a unitary function
AnnaBridge	157:e7ca05fa8600	326	* and potentially with ADC in a different state than disabled,
AnnaBridge	157:e7ca05fa8600	327	* refer to description of each function for setting
AnnaBridge	157:e7ca05fa8600	328	* conditioned to ADC state.
AnnaBridge	157:e7ca05fa8600	329	*/
AnnaBridge	157:e7ca05fa8600	330	typedef struct
AnnaBridge	157:e7ca05fa8600	331	{
AnnaBridge	157:e7ca05fa8600	332	uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	157:e7ca05fa8600	333	This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
AnnaBridge	157:e7ca05fa8600	334	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
AnnaBridge	157:e7ca05fa8600	335	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
AnnaBridge	157:e7ca05fa8600	336	In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	157:e7ca05fa8600	337
AnnaBridge	157:e7ca05fa8600	338	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
AnnaBridge	157:e7ca05fa8600	339
AnnaBridge	157:e7ca05fa8600	340	uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
AnnaBridge	157:e7ca05fa8600	341	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
AnnaBridge	157:e7ca05fa8600	342	@note This parameter has an effect only if group regular sequencer is enabled
AnnaBridge	157:e7ca05fa8600	343	(several ADC channels enabled in group regular sequencer).
AnnaBridge	157:e7ca05fa8600	344
AnnaBridge	157:e7ca05fa8600	345	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
AnnaBridge	157:e7ca05fa8600	346
AnnaBridge	157:e7ca05fa8600	347	uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
AnnaBridge	157:e7ca05fa8600	348	This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
AnnaBridge	157:e7ca05fa8600	349	Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
AnnaBridge	157:e7ca05fa8600	350
AnnaBridge	157:e7ca05fa8600	351	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
AnnaBridge	157:e7ca05fa8600	352
AnnaBridge	157:e7ca05fa8600	353	uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
AnnaBridge	157:e7ca05fa8600	354	This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
AnnaBridge	157:e7ca05fa8600	355
AnnaBridge	157:e7ca05fa8600	356	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
AnnaBridge	157:e7ca05fa8600	357
AnnaBridge	157:e7ca05fa8600	358	uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
AnnaBridge	157:e7ca05fa8600	359	data preserved or overwritten.
AnnaBridge	157:e7ca05fa8600	360	This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
AnnaBridge	157:e7ca05fa8600	361
AnnaBridge	157:e7ca05fa8600	362	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
AnnaBridge	157:e7ca05fa8600	363
AnnaBridge	157:e7ca05fa8600	364	} LL_ADC_REG_InitTypeDef;
AnnaBridge	157:e7ca05fa8600	365
AnnaBridge	157:e7ca05fa8600	366	/**
AnnaBridge	157:e7ca05fa8600	367	* @}
AnnaBridge	157:e7ca05fa8600	368	*/
AnnaBridge	157:e7ca05fa8600	369	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	157:e7ca05fa8600	370
AnnaBridge	157:e7ca05fa8600	371	/* Exported constants --------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	372	/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
AnnaBridge	157:e7ca05fa8600	373	* @{
AnnaBridge	157:e7ca05fa8600	374	*/
AnnaBridge	157:e7ca05fa8600	375
AnnaBridge	157:e7ca05fa8600	376	/** @defgroup ADC_LL_EC_FLAG ADC flags
AnnaBridge	157:e7ca05fa8600	377	* @brief Flags defines which can be used with LL_ADC_ReadReg function
AnnaBridge	157:e7ca05fa8600	378	* @{
AnnaBridge	157:e7ca05fa8600	379	*/
AnnaBridge	157:e7ca05fa8600	380	#define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /!< ADC flag ADC instance ready /
AnnaBridge	157:e7ca05fa8600	381	#define LL_ADC_FLAG_EOC ADC_ISR_EOC /!< ADC flag ADC group regular end of unitary conversion /
AnnaBridge	157:e7ca05fa8600	382	#define LL_ADC_FLAG_EOS ADC_ISR_EOS /!< ADC flag ADC group regular end of sequence conversions /
AnnaBridge	157:e7ca05fa8600	383	#define LL_ADC_FLAG_OVR ADC_ISR_OVR /!< ADC flag ADC group regular overrun /
AnnaBridge	157:e7ca05fa8600	384	#define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC flag ADC group regular end of sampling phase /
AnnaBridge	157:e7ca05fa8600	385	#define LL_ADC_FLAG_AWD1 ADC_ISR_AWD /!< ADC flag ADC analog watchdog 1 /
AnnaBridge	157:e7ca05fa8600	386	#define LL_ADC_FLAG_EOCAL ADC_ISR_EOCAL /!< ADC flag end of calibration /
AnnaBridge	157:e7ca05fa8600	387	/**
AnnaBridge	157:e7ca05fa8600	388	* @}
AnnaBridge	157:e7ca05fa8600	389	*/
AnnaBridge	157:e7ca05fa8600	390
AnnaBridge	157:e7ca05fa8600	391	/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
AnnaBridge	157:e7ca05fa8600	392	* @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
AnnaBridge	157:e7ca05fa8600	393	* @{
AnnaBridge	157:e7ca05fa8600	394	*/
AnnaBridge	157:e7ca05fa8600	395	#define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /!< ADC interruption ADC instance ready /
AnnaBridge	157:e7ca05fa8600	396	#define LL_ADC_IT_EOC ADC_IER_EOCIE /!< ADC interruption ADC group regular end of unitary conversion /
AnnaBridge	157:e7ca05fa8600	397	#define LL_ADC_IT_EOS ADC_IER_EOSIE /!< ADC interruption ADC group regular end of sequence conversions /
AnnaBridge	157:e7ca05fa8600	398	#define LL_ADC_IT_OVR ADC_IER_OVRIE /!< ADC interruption ADC group regular overrun /
AnnaBridge	157:e7ca05fa8600	399	#define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /!< ADC interruption ADC group regular end of sampling phase /
AnnaBridge	157:e7ca05fa8600	400	#define LL_ADC_IT_AWD1 ADC_IER_AWDIE /!< ADC interruption ADC analog watchdog 1 /
AnnaBridge	157:e7ca05fa8600	401	#define LL_ADC_IT_EOCAL ADC_IER_EOCALIE /!< ADC interruption ADC end of calibration /
AnnaBridge	157:e7ca05fa8600	402	/**
AnnaBridge	157:e7ca05fa8600	403	* @}
AnnaBridge	157:e7ca05fa8600	404	*/
AnnaBridge	157:e7ca05fa8600	405
AnnaBridge	157:e7ca05fa8600	406	/** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
AnnaBridge	157:e7ca05fa8600	407	* @{
AnnaBridge	157:e7ca05fa8600	408	*/
AnnaBridge	157:e7ca05fa8600	409	/* List of ADC registers intended to be used (most commonly) with */
AnnaBridge	157:e7ca05fa8600	410	/* DMA transfer. */
AnnaBridge	157:e7ca05fa8600	411	/* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
AnnaBridge	157:e7ca05fa8600	412	#define LL_ADC_DMA_REG_REGULAR_DATA ((uint32_t)0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
AnnaBridge	157:e7ca05fa8600	413	/**
AnnaBridge	157:e7ca05fa8600	414	* @}
AnnaBridge	157:e7ca05fa8600	415	*/
AnnaBridge	157:e7ca05fa8600	416
AnnaBridge	157:e7ca05fa8600	417	/** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source
AnnaBridge	157:e7ca05fa8600	418	* @{
AnnaBridge	157:e7ca05fa8600	419	*/
AnnaBridge	157:e7ca05fa8600	420	#define LL_ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000U) /!< ADC asynchronous clock without prescaler /
AnnaBridge	157:e7ca05fa8600	421	#define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 2. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	422	#define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 4. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	423	#define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 6. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	424	#define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /!< ADC asynchronous clock with prescaler division by 8. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	425	#define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 10. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	426	#define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 12. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	427	#define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 16. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	428	#define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /!< ADC asynchronous clock with prescaler division by 32. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	429	#define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 64. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	430	#define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1) /!< ADC asynchronous clock with prescaler division by 128. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	431	#define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 256. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	157:e7ca05fa8600	432	/**
AnnaBridge	157:e7ca05fa8600	433	* @}
AnnaBridge	157:e7ca05fa8600	434	*/
AnnaBridge	157:e7ca05fa8600	435
AnnaBridge	157:e7ca05fa8600	436	/** @defgroup ADC_LL_EC_COMMON_CLOCK_FREQ_MODE ADC common - Clock frequency mode
AnnaBridge	157:e7ca05fa8600	437	* @{
AnnaBridge	157:e7ca05fa8600	438	*/
AnnaBridge	157:e7ca05fa8600	439	#define LL_ADC_CLOCK_FREQ_MODE_HIGH ((uint32_t)0x00000000U)/!< ADC clock mode to high frequency. On STM32L0, ADC clock frequency above 2.8MHz. /
AnnaBridge	157:e7ca05fa8600	440	#define LL_ADC_CLOCK_FREQ_MODE_LOW (ADC_CCR_LFMEN) /!< ADC clock mode to low frequency. On STM32L0, ADC clock frequency below 2.8MHz. /
AnnaBridge	157:e7ca05fa8600	441	/**
AnnaBridge	157:e7ca05fa8600	442	* @}
AnnaBridge	157:e7ca05fa8600	443	*/
AnnaBridge	157:e7ca05fa8600	444
AnnaBridge	157:e7ca05fa8600	445	/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
AnnaBridge	157:e7ca05fa8600	446	* @{
AnnaBridge	157:e7ca05fa8600	447	*/
AnnaBridge	157:e7ca05fa8600	448	/* Note: Other measurement paths to internal channels may be available */
AnnaBridge	157:e7ca05fa8600	449	/* (connections to other peripherals). */
AnnaBridge	157:e7ca05fa8600	450	/* If they are not listed below, they do not require any specific */
AnnaBridge	157:e7ca05fa8600	451	/* path enable. In this case, Access to measurement path is done */
AnnaBridge	157:e7ca05fa8600	452	/* only by selecting the corresponding ADC internal channel. */
AnnaBridge	157:e7ca05fa8600	453	#define LL_ADC_PATH_INTERNAL_NONE ((uint32_t)0x00000000U)/!< ADC measurement pathes all disabled /
AnnaBridge	157:e7ca05fa8600	454	#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /!< ADC measurement path to internal channel VrefInt /
AnnaBridge	157:e7ca05fa8600	455	#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /!< ADC measurement path to internal channel temperature sensor /
AnnaBridge	157:e7ca05fa8600	456	#define LL_ADC_PATH_INTERNAL_VLCD (ADC_CCR_VLCDEN) /!< ADC measurement path to internal channel Vlcd /
AnnaBridge	157:e7ca05fa8600	457	/**
AnnaBridge	157:e7ca05fa8600	458	* @}
AnnaBridge	157:e7ca05fa8600	459	*/
AnnaBridge	157:e7ca05fa8600	460
AnnaBridge	157:e7ca05fa8600	461	/** @defgroup ADC_LL_EC_CLOCK_SOURCE ADC instance - Clock source
AnnaBridge	157:e7ca05fa8600	462	* @{
AnnaBridge	157:e7ca05fa8600	463	*/
AnnaBridge	157:e7ca05fa8600	464	#define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /!< ADC synchronous clock derived from AHB clock divided by 4 /
AnnaBridge	157:e7ca05fa8600	465	#define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock divided by 2 /
AnnaBridge	157:e7ca05fa8600	466	#define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock not divided /
AnnaBridge	157:e7ca05fa8600	467	#define LL_ADC_CLOCK_ASYNC ((uint32_t)0x00000000U) /!< ADC asynchronous clock. Asynchronous clock prescaler can be configured using function @ref LL_ADC_SetCommonClock(). /
AnnaBridge	157:e7ca05fa8600	468	/**
AnnaBridge	157:e7ca05fa8600	469	* @}
AnnaBridge	157:e7ca05fa8600	470	*/
AnnaBridge	157:e7ca05fa8600	471
AnnaBridge	157:e7ca05fa8600	472	/** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
AnnaBridge	157:e7ca05fa8600	473	* @{
AnnaBridge	157:e7ca05fa8600	474	*/
AnnaBridge	157:e7ca05fa8600	475	#define LL_ADC_RESOLUTION_12B ((uint32_t)0x00000000U) /!< ADC resolution 12 bits /
AnnaBridge	157:e7ca05fa8600	476	#define LL_ADC_RESOLUTION_10B ( ADC_CFGR1_RES_0) /!< ADC resolution 10 bits /
AnnaBridge	157:e7ca05fa8600	477	#define LL_ADC_RESOLUTION_8B (ADC_CFGR1_RES_1 ) /!< ADC resolution 8 bits /
AnnaBridge	157:e7ca05fa8600	478	#define LL_ADC_RESOLUTION_6B (ADC_CFGR1_RES_1 \| ADC_CFGR1_RES_0) /!< ADC resolution 6 bits /
AnnaBridge	157:e7ca05fa8600	479	/**
AnnaBridge	157:e7ca05fa8600	480	* @}
AnnaBridge	157:e7ca05fa8600	481	*/
AnnaBridge	157:e7ca05fa8600	482
AnnaBridge	157:e7ca05fa8600	483	/** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
AnnaBridge	157:e7ca05fa8600	484	* @{
AnnaBridge	157:e7ca05fa8600	485	*/
AnnaBridge	157:e7ca05fa8600	486	#define LL_ADC_DATA_ALIGN_RIGHT ((uint32_t)0x00000000U)/!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)/
AnnaBridge	157:e7ca05fa8600	487	#define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR1_ALIGN) /!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)/
AnnaBridge	157:e7ca05fa8600	488	/**
AnnaBridge	157:e7ca05fa8600	489	* @}
AnnaBridge	157:e7ca05fa8600	490	*/
AnnaBridge	157:e7ca05fa8600	491
AnnaBridge	157:e7ca05fa8600	492	/** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
AnnaBridge	157:e7ca05fa8600	493	* @{
AnnaBridge	157:e7ca05fa8600	494	*/
AnnaBridge	157:e7ca05fa8600	495	#define LL_ADC_LP_MODE_NONE ((uint32_t)0x00000000U) /!< No ADC low power mode activated /
AnnaBridge	157:e7ca05fa8600	496	#define LL_ADC_LP_AUTOWAIT (ADC_CFGR1_WAIT) /!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	157:e7ca05fa8600	497	#define LL_ADC_LP_AUTOPOWEROFF (ADC_CFGR1_AUTOFF) /!< ADC low power mode auto power-off: the ADC automatically powers-off after a ADC conversion and automatically wakes up when a new ADC conversion is triggered (with startup time between trigger and start of sampling). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	157:e7ca05fa8600	498	#define LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF) /!< ADC low power modes auto wait and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	157:e7ca05fa8600	499	/**
AnnaBridge	157:e7ca05fa8600	500	* @}
AnnaBridge	157:e7ca05fa8600	501	*/
AnnaBridge	157:e7ca05fa8600	502
AnnaBridge	157:e7ca05fa8600	503	/** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
AnnaBridge	157:e7ca05fa8600	504	* @{
AnnaBridge	157:e7ca05fa8600	505	*/
AnnaBridge	157:e7ca05fa8600	506	#define LL_ADC_GROUP_REGULAR ((uint32_t)0x00000001U) /!< ADC group regular (available on all STM32 devices) /
AnnaBridge	157:e7ca05fa8600	507	/**
AnnaBridge	157:e7ca05fa8600	508	* @}
AnnaBridge	157:e7ca05fa8600	509	*/
AnnaBridge	157:e7ca05fa8600	510
AnnaBridge	157:e7ca05fa8600	511	/** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
AnnaBridge	157:e7ca05fa8600	512	* @{
AnnaBridge	157:e7ca05fa8600	513	*/
AnnaBridge	157:e7ca05fa8600	514	#define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER \| ADC_CHANNEL_0_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN0 /
AnnaBridge	157:e7ca05fa8600	515	#define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER \| ADC_CHANNEL_1_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN1 /
AnnaBridge	157:e7ca05fa8600	516	#define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER \| ADC_CHANNEL_2_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN2 /
AnnaBridge	157:e7ca05fa8600	517	#define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER \| ADC_CHANNEL_3_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN3 /
AnnaBridge	157:e7ca05fa8600	518	#define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER \| ADC_CHANNEL_4_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN4 /
AnnaBridge	157:e7ca05fa8600	519	#define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER \| ADC_CHANNEL_5_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN5 /
AnnaBridge	157:e7ca05fa8600	520	#define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER \| ADC_CHANNEL_6_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN6 /
AnnaBridge	157:e7ca05fa8600	521	#define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER \| ADC_CHANNEL_7_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN7 /
AnnaBridge	157:e7ca05fa8600	522	#define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER \| ADC_CHANNEL_8_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN8 /
AnnaBridge	157:e7ca05fa8600	523	#define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER \| ADC_CHANNEL_9_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN9 /
AnnaBridge	157:e7ca05fa8600	524	#define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER \| ADC_CHANNEL_10_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 /
AnnaBridge	157:e7ca05fa8600	525	#define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER \| ADC_CHANNEL_11_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 /
AnnaBridge	157:e7ca05fa8600	526	#define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER \| ADC_CHANNEL_12_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 /
AnnaBridge	157:e7ca05fa8600	527	#define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER \| ADC_CHANNEL_13_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 /
AnnaBridge	157:e7ca05fa8600	528	#define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER \| ADC_CHANNEL_14_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 /
AnnaBridge	157:e7ca05fa8600	529	#define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER \| ADC_CHANNEL_15_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 /
AnnaBridge	157:e7ca05fa8600	530	#define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER \| ADC_CHANNEL_17_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 /
AnnaBridge	157:e7ca05fa8600	531	#define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER \| ADC_CHANNEL_18_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 /
AnnaBridge	157:e7ca05fa8600	532	#define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to VrefInt: Internal voltage reference. /
AnnaBridge	157:e7ca05fa8600	533	#define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Temperature sensor. /
AnnaBridge	157:e7ca05fa8600	534	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	535	#define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER \| ADC_CHANNEL_16_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 /
AnnaBridge	157:e7ca05fa8600	536	#define LL_ADC_CHANNEL_VLCD (LL_ADC_CHANNEL_16 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Vlcd: Vlcd voltage through a divider ladder of factor 1/4, 1/3 or 1/2 (set by LCD voltage generator biasing), to have Vlcd always below Vdda. /
AnnaBridge	157:e7ca05fa8600	537	#endif
AnnaBridge	157:e7ca05fa8600	538	/**
AnnaBridge	157:e7ca05fa8600	539	* @}
AnnaBridge	157:e7ca05fa8600	540	*/
AnnaBridge	157:e7ca05fa8600	541
AnnaBridge	157:e7ca05fa8600	542	/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
AnnaBridge	157:e7ca05fa8600	543	* @{
AnnaBridge	157:e7ca05fa8600	544	*/
AnnaBridge	157:e7ca05fa8600	545	#define LL_ADC_REG_TRIG_SOFTWARE ((uint32_t)0x00000000U) /!< ADC group regular conversion trigger internal: SW start. /
AnnaBridge	157:e7ca05fa8600	546	#define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	547	#define LL_ADC_REG_TRIG_EXT_TIM21_CH2 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM21 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	548	#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	549	#define LL_ADC_REG_TRIG_EXT_TIM2_CH4 (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	550	#define LL_ADC_REG_TRIG_EXT_TIM22_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM22 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	551	#define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	552	#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 TRG0. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	553	#define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger external interrupt line 11. Trigger edge set to rising edge (default setting). /
AnnaBridge	157:e7ca05fa8600	554	/**
AnnaBridge	157:e7ca05fa8600	555	* @}
AnnaBridge	157:e7ca05fa8600	556	*/
AnnaBridge	157:e7ca05fa8600	557
AnnaBridge	157:e7ca05fa8600	558	/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
AnnaBridge	157:e7ca05fa8600	559	* @{
AnnaBridge	157:e7ca05fa8600	560	*/
AnnaBridge	157:e7ca05fa8600	561	#define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to rising edge /
AnnaBridge	157:e7ca05fa8600	562	#define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR1_EXTEN_1 ) /!< ADC group regular conversion trigger polarity set to falling edge /
AnnaBridge	157:e7ca05fa8600	563	#define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR1_EXTEN_1 \| ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to both rising and falling edges /
AnnaBridge	157:e7ca05fa8600	564	/**
AnnaBridge	157:e7ca05fa8600	565	* @}
AnnaBridge	157:e7ca05fa8600	566	*/
AnnaBridge	157:e7ca05fa8600	567
AnnaBridge	157:e7ca05fa8600	568	/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
AnnaBridge	157:e7ca05fa8600	569	* @{
AnnaBridge	157:e7ca05fa8600	570	*/
AnnaBridge	157:e7ca05fa8600	571	#define LL_ADC_REG_CONV_SINGLE ((uint32_t)0x00000000U) /!< ADC conversions are performed in single mode: one conversion per trigger /
AnnaBridge	157:e7ca05fa8600	572	#define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR1_CONT) /!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically /
AnnaBridge	157:e7ca05fa8600	573	/**
AnnaBridge	157:e7ca05fa8600	574	* @}
AnnaBridge	157:e7ca05fa8600	575	*/
AnnaBridge	157:e7ca05fa8600	576
AnnaBridge	157:e7ca05fa8600	577	/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
AnnaBridge	157:e7ca05fa8600	578	* @{
AnnaBridge	157:e7ca05fa8600	579	*/
AnnaBridge	157:e7ca05fa8600	580	#define LL_ADC_REG_DMA_TRANSFER_NONE ((uint32_t)0x00000000U) /!< ADC conversions are not transferred by DMA /
AnnaBridge	157:e7ca05fa8600	581	#define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. /
AnnaBridge	157:e7ca05fa8600	582	#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. /
AnnaBridge	157:e7ca05fa8600	583	/**
AnnaBridge	157:e7ca05fa8600	584	* @}
AnnaBridge	157:e7ca05fa8600	585	*/
AnnaBridge	157:e7ca05fa8600	586
AnnaBridge	157:e7ca05fa8600	587	/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion data
AnnaBridge	157:e7ca05fa8600	588	* @{
AnnaBridge	157:e7ca05fa8600	589	*/
AnnaBridge	157:e7ca05fa8600	590	#define LL_ADC_REG_OVR_DATA_PRESERVED ((uint32_t)0x00000000U)/!< ADC group regular behavior in case of overrun: data preserved /
AnnaBridge	157:e7ca05fa8600	591	#define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR1_OVRMOD) /!< ADC group regular behavior in case of overrun: data overwritten /
AnnaBridge	157:e7ca05fa8600	592	/**
AnnaBridge	157:e7ca05fa8600	593	* @}
AnnaBridge	157:e7ca05fa8600	594	*/
AnnaBridge	157:e7ca05fa8600	595
AnnaBridge	157:e7ca05fa8600	596	/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_DIRECTION ADC group regular - Sequencer scan direction
AnnaBridge	157:e7ca05fa8600	597	* @{
AnnaBridge	157:e7ca05fa8600	598	*/
AnnaBridge	157:e7ca05fa8600	599	#define LL_ADC_REG_SEQ_SCAN_DIR_FORWARD ((uint32_t)0x00000000U)/!< ADC group regular sequencer scan direction forward: from lowest channel number to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer). On some other STM32 families, this setting is not available and the default scan direction is forward. /
AnnaBridge	157:e7ca05fa8600	600	#define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD (ADC_CFGR1_SCANDIR) /!< ADC group regular sequencer scan direction backward: from highest channel number to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer) /
AnnaBridge	157:e7ca05fa8600	601	/**
AnnaBridge	157:e7ca05fa8600	602	* @}
AnnaBridge	157:e7ca05fa8600	603	*/
AnnaBridge	157:e7ca05fa8600	604
AnnaBridge	157:e7ca05fa8600	605	/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
AnnaBridge	157:e7ca05fa8600	606	* @{
AnnaBridge	157:e7ca05fa8600	607	*/
AnnaBridge	157:e7ca05fa8600	608	#define LL_ADC_REG_SEQ_DISCONT_DISABLE ((uint32_t)0x00000000U) /!< ADC group regular sequencer discontinuous mode disable /
AnnaBridge	157:e7ca05fa8600	609	#define LL_ADC_REG_SEQ_DISCONT_1RANK (ADC_CFGR1_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank /
AnnaBridge	157:e7ca05fa8600	610	/**
AnnaBridge	157:e7ca05fa8600	611	* @}
AnnaBridge	157:e7ca05fa8600	612	*/
AnnaBridge	157:e7ca05fa8600	613
AnnaBridge	157:e7ca05fa8600	614	/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
AnnaBridge	157:e7ca05fa8600	615	* @{
AnnaBridge	157:e7ca05fa8600	616	*/
AnnaBridge	157:e7ca05fa8600	617	#define LL_ADC_SAMPLINGTIME_1CYCLE_5 ((uint32_t)0x00000000U) /!< Sampling time 1.5 ADC clock cycle /
AnnaBridge	157:e7ca05fa8600	618	#define LL_ADC_SAMPLINGTIME_7CYCLES_5 (ADC_SMPR_SMP_0) /!< Sampling time 7.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	619	#define LL_ADC_SAMPLINGTIME_13CYCLES_5 (ADC_SMPR_SMP_1) /!< Sampling time 13.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	620	#define LL_ADC_SAMPLINGTIME_28CYCLES_5 (ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 28.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	621	#define LL_ADC_SAMPLINGTIME_41CYCLES_5 (ADC_SMPR_SMP_2) /!< Sampling time 41.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	622	#define LL_ADC_SAMPLINGTIME_55CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_0) /!< Sampling time 55.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	623	#define LL_ADC_SAMPLINGTIME_71CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1) /!< Sampling time 71.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	624	#define LL_ADC_SAMPLINGTIME_239CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 239.5 ADC clock cycles /
AnnaBridge	157:e7ca05fa8600	625	/**
AnnaBridge	157:e7ca05fa8600	626	* @}
AnnaBridge	157:e7ca05fa8600	627	*/
AnnaBridge	157:e7ca05fa8600	628
AnnaBridge	157:e7ca05fa8600	629	/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
AnnaBridge	157:e7ca05fa8600	630	* @{
AnnaBridge	157:e7ca05fa8600	631	*/
AnnaBridge	157:e7ca05fa8600	632	#define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR1_REGOFFSET) /!< ADC analog watchdog number 1 /
AnnaBridge	157:e7ca05fa8600	633	/**
AnnaBridge	157:e7ca05fa8600	634	* @}
AnnaBridge	157:e7ca05fa8600	635	*/
AnnaBridge	157:e7ca05fa8600	636
AnnaBridge	157:e7ca05fa8600	637	/** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
AnnaBridge	157:e7ca05fa8600	638	* @{
AnnaBridge	157:e7ca05fa8600	639	*/
AnnaBridge	157:e7ca05fa8600	640	#define LL_ADC_AWD_DISABLE ((uint32_t)0x00000000U) /!< ADC analog watchdog monitoring disabled /
AnnaBridge	157:e7ca05fa8600	641	#define LL_ADC_AWD_ALL_CHANNELS_REG ( ADC_CFGR1_AWDEN ) /!< ADC analog watchdog monitoring of all channels, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	642	#define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	643	#define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	644	#define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	645	#define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	646	#define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	647	#define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	648	#define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	649	#define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	650	#define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	651	#define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	652	#define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	653	#define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	654	#define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	655	#define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	656	#define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	657	#define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	658	#define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	659	#define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	660	#define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	661	#define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	662	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	663	#define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	664	#define LL_ADC_AWD_CH_VLCD_REG ((LL_ADC_CHANNEL_VLCD & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only /
AnnaBridge	157:e7ca05fa8600	665	#endif
AnnaBridge	157:e7ca05fa8600	666	/**
AnnaBridge	157:e7ca05fa8600	667	* @}
AnnaBridge	157:e7ca05fa8600	668	*/
AnnaBridge	157:e7ca05fa8600	669
AnnaBridge	157:e7ca05fa8600	670	/** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
AnnaBridge	157:e7ca05fa8600	671	* @{
AnnaBridge	157:e7ca05fa8600	672	*/
AnnaBridge	157:e7ca05fa8600	673	#define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR_HT ) /!< ADC analog watchdog threshold high /
AnnaBridge	157:e7ca05fa8600	674	#define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR_LT) /!< ADC analog watchdog threshold low /
AnnaBridge	157:e7ca05fa8600	675	#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR_HT \| ADC_TR_LT) /!< ADC analog watchdog both thresholds high and low concatenated into the same data /
AnnaBridge	157:e7ca05fa8600	676	/**
AnnaBridge	157:e7ca05fa8600	677	* @}
AnnaBridge	157:e7ca05fa8600	678	*/
AnnaBridge	157:e7ca05fa8600	679
AnnaBridge	157:e7ca05fa8600	680	/** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope
AnnaBridge	157:e7ca05fa8600	681	* @{
AnnaBridge	157:e7ca05fa8600	682	*/
AnnaBridge	157:e7ca05fa8600	683	#define LL_ADC_OVS_DISABLE ((uint32_t)0x00000000U) /!< ADC oversampling disabled. /
AnnaBridge	157:e7ca05fa8600	684	#define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_OVSE) /!< ADC oversampling on conversions of ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices featuring ADC group injected, in this case other oversampling scope parameters are available. /
AnnaBridge	157:e7ca05fa8600	685	/**
AnnaBridge	157:e7ca05fa8600	686	* @}
AnnaBridge	157:e7ca05fa8600	687	*/
AnnaBridge	157:e7ca05fa8600	688
AnnaBridge	157:e7ca05fa8600	689	/** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode
AnnaBridge	157:e7ca05fa8600	690	* @{
AnnaBridge	157:e7ca05fa8600	691	*/
AnnaBridge	157:e7ca05fa8600	692	#define LL_ADC_OVS_REG_CONT ((uint32_t)0x00000000U)/!< ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done from 1 trigger) /
AnnaBridge	157:e7ca05fa8600	693	#define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TOVS) /!< ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs a trigger) /
AnnaBridge	157:e7ca05fa8600	694	/**
AnnaBridge	157:e7ca05fa8600	695	* @}
AnnaBridge	157:e7ca05fa8600	696	*/
AnnaBridge	157:e7ca05fa8600	697
AnnaBridge	157:e7ca05fa8600	698	/** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio
AnnaBridge	157:e7ca05fa8600	699	* @{
AnnaBridge	157:e7ca05fa8600	700	*/
AnnaBridge	157:e7ca05fa8600	701	#define LL_ADC_OVS_RATIO_2 ((uint32_t)0x00000000U) /!< ADC oversampling ratio of 2 (2 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	702	#define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 4 (4 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	703	#define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 8 (8 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	704	#define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 16 (16 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	705	#define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) /!< ADC oversampling ratio of 32 (32 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	706	#define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 64 (64 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	707	#define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 128 (128 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	708	#define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 256 (256 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	157:e7ca05fa8600	709	/**
AnnaBridge	157:e7ca05fa8600	710	* @}
AnnaBridge	157:e7ca05fa8600	711	*/
AnnaBridge	157:e7ca05fa8600	712
AnnaBridge	157:e7ca05fa8600	713	/** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift
AnnaBridge	157:e7ca05fa8600	714	* @{
AnnaBridge	157:e7ca05fa8600	715	*/
AnnaBridge	157:e7ca05fa8600	716	#define LL_ADC_OVS_SHIFT_NONE ((uint32_t)0x00000000U) /!< ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	717	#define LL_ADC_OVS_SHIFT_RIGHT_1 ( ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	718	#define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	719	#define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	720	#define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 ) /!< ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	721	#define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	722	#define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	723	#define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	724	#define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 ) /!< ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC oversampling conversion data) /
AnnaBridge	157:e7ca05fa8600	725	/**
AnnaBridge	157:e7ca05fa8600	726	* @}
AnnaBridge	157:e7ca05fa8600	727	*/
AnnaBridge	157:e7ca05fa8600	728
AnnaBridge	157:e7ca05fa8600	729
AnnaBridge	157:e7ca05fa8600	730	/** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
AnnaBridge	157:e7ca05fa8600	731	* @note Only ADC IP HW delays are defined in ADC LL driver driver,
AnnaBridge	157:e7ca05fa8600	732	* not timeout values.
AnnaBridge	157:e7ca05fa8600	733	* For details on delays values, refer to descriptions in source code
AnnaBridge	157:e7ca05fa8600	734	* above each literal definition.
AnnaBridge	157:e7ca05fa8600	735	* @{
AnnaBridge	157:e7ca05fa8600	736	*/
AnnaBridge	157:e7ca05fa8600	737
AnnaBridge	157:e7ca05fa8600	738	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
AnnaBridge	157:e7ca05fa8600	739	/* not timeout values. */
AnnaBridge	157:e7ca05fa8600	740	/* Timeout values for ADC operations are dependent to device clock */
AnnaBridge	157:e7ca05fa8600	741	/* configuration (system clock versus ADC clock), */
AnnaBridge	157:e7ca05fa8600	742	/* and therefore must be defined in user application. */
AnnaBridge	157:e7ca05fa8600	743	/* Indications for estimation of ADC timeout delays, for this */
AnnaBridge	157:e7ca05fa8600	744	/* STM32 serie: */
AnnaBridge	157:e7ca05fa8600	745	/* - ADC calibration time: maximum delay is 83/fADC. */
AnnaBridge	157:e7ca05fa8600	746	/* (refer to device datasheet, parameter "tCAL") */
AnnaBridge	157:e7ca05fa8600	747	/* - ADC enable time: maximum delay is 1 conversion cycle. */
AnnaBridge	157:e7ca05fa8600	748	/* (refer to device datasheet, parameter "tSTAB") */
AnnaBridge	157:e7ca05fa8600	749	/* - ADC disable time: maximum delay should be a few ADC clock cycles */
AnnaBridge	157:e7ca05fa8600	750	/* - ADC stop conversion time: maximum delay should be a few ADC clock */
AnnaBridge	157:e7ca05fa8600	751	/* cycles */
AnnaBridge	157:e7ca05fa8600	752	/* - ADC conversion time: duration depending on ADC clock and ADC */
AnnaBridge	157:e7ca05fa8600	753	/* configuration. */
AnnaBridge	157:e7ca05fa8600	754	/* (refer to device reference manual, section "Timing") */
AnnaBridge	157:e7ca05fa8600	755
AnnaBridge	157:e7ca05fa8600	756	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
AnnaBridge	157:e7ca05fa8600	757	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	157:e7ca05fa8600	758	/* parameter "tUP_LDO"). */
AnnaBridge	157:e7ca05fa8600	759	#define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ((uint32_t) 10U) /!< Delay for ADC stabilization time (ADC voltage regulator start-up time) /
AnnaBridge	157:e7ca05fa8600	760
AnnaBridge	157:e7ca05fa8600	761	/* Delay for internal voltage reference stabilization time. */
AnnaBridge	157:e7ca05fa8600	762	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	157:e7ca05fa8600	763	/* parameter "TADC_BUF"). */
AnnaBridge	157:e7ca05fa8600	764	/* Unit: us */
AnnaBridge	157:e7ca05fa8600	765	#define LL_ADC_DELAY_VREFINT_STAB_US ((uint32_t) 10U) /!< Delay for internal voltage reference stabilization time /
AnnaBridge	157:e7ca05fa8600	766
AnnaBridge	157:e7ca05fa8600	767	/* Delay for temperature sensor stabilization time. */
AnnaBridge	157:e7ca05fa8600	768	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	157:e7ca05fa8600	769	/* parameter "tSTART"). */
AnnaBridge	157:e7ca05fa8600	770	/* Unit: us */
AnnaBridge	157:e7ca05fa8600	771	#define LL_ADC_DELAY_TEMPSENSOR_STAB_US ((uint32_t) 10U) /!< Delay for temperature sensor stabilization time /
AnnaBridge	157:e7ca05fa8600	772
AnnaBridge	157:e7ca05fa8600	773	/* Delay required between ADC end of calibration and ADC enable. */
AnnaBridge	157:e7ca05fa8600	774	/* Note: On this STM32 serie, a minimum number of ADC clock cycles */
AnnaBridge	157:e7ca05fa8600	775	/* are required between ADC end of calibration and ADC enable. */
AnnaBridge	157:e7ca05fa8600	776	/* Wait time can be computed in user application by waiting for the */
AnnaBridge	157:e7ca05fa8600	777	/* equivalent number of CPU cycles, by taking into account */
AnnaBridge	157:e7ca05fa8600	778	/* ratio of CPU clock versus ADC clock prescalers. */
AnnaBridge	157:e7ca05fa8600	779	/* Unit: ADC clock cycles. */
AnnaBridge	157:e7ca05fa8600	780	#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ((uint32_t) 2U) /!< Delay required between ADC end of calibration and ADC enable /
AnnaBridge	157:e7ca05fa8600	781
AnnaBridge	157:e7ca05fa8600	782	/**
AnnaBridge	157:e7ca05fa8600	783	* @}
AnnaBridge	157:e7ca05fa8600	784	*/
AnnaBridge	157:e7ca05fa8600	785
AnnaBridge	157:e7ca05fa8600	786	/**
AnnaBridge	157:e7ca05fa8600	787	* @}
AnnaBridge	157:e7ca05fa8600	788	*/
AnnaBridge	157:e7ca05fa8600	789
AnnaBridge	157:e7ca05fa8600	790
AnnaBridge	157:e7ca05fa8600	791	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	792	/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
AnnaBridge	157:e7ca05fa8600	793	* @{
AnnaBridge	157:e7ca05fa8600	794	*/
AnnaBridge	157:e7ca05fa8600	795
AnnaBridge	157:e7ca05fa8600	796	/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge	157:e7ca05fa8600	797	* @{
AnnaBridge	157:e7ca05fa8600	798	*/
AnnaBridge	157:e7ca05fa8600	799
AnnaBridge	157:e7ca05fa8600	800	/**
AnnaBridge	157:e7ca05fa8600	801	* @brief Write a value in ADC register
AnnaBridge	157:e7ca05fa8600	802	* @param __INSTANCE__ ADC Instance
AnnaBridge	157:e7ca05fa8600	803	* @param __REG__ Register to be written
AnnaBridge	157:e7ca05fa8600	804	* @param __VALUE__ Value to be written in the register
AnnaBridge	157:e7ca05fa8600	805	* @retval None
AnnaBridge	157:e7ca05fa8600	806	*/
AnnaBridge	157:e7ca05fa8600	807	#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	157:e7ca05fa8600	808
AnnaBridge	157:e7ca05fa8600	809	/**
AnnaBridge	157:e7ca05fa8600	810	* @brief Read a value in ADC register
AnnaBridge	157:e7ca05fa8600	811	* @param __INSTANCE__ ADC Instance
AnnaBridge	157:e7ca05fa8600	812	* @param __REG__ Register to be read
AnnaBridge	157:e7ca05fa8600	813	* @retval Register value
AnnaBridge	157:e7ca05fa8600	814	*/
AnnaBridge	157:e7ca05fa8600	815	#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	157:e7ca05fa8600	816	/**
AnnaBridge	157:e7ca05fa8600	817	* @}
AnnaBridge	157:e7ca05fa8600	818	*/
AnnaBridge	157:e7ca05fa8600	819
AnnaBridge	157:e7ca05fa8600	820	/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
AnnaBridge	157:e7ca05fa8600	821	* @{
AnnaBridge	157:e7ca05fa8600	822	*/
AnnaBridge	157:e7ca05fa8600	823
AnnaBridge	157:e7ca05fa8600	824	/**
AnnaBridge	157:e7ca05fa8600	825	* @brief Helper macro to get ADC channel number in decimal format
AnnaBridge	157:e7ca05fa8600	826	* from literals LL_ADC_CHANNEL_x.
AnnaBridge	157:e7ca05fa8600	827	* @note Example:
AnnaBridge	157:e7ca05fa8600	828	* __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
AnnaBridge	157:e7ca05fa8600	829	* will return decimal number "4".
AnnaBridge	157:e7ca05fa8600	830	* @note The input can be a value from functions where a channel
AnnaBridge	157:e7ca05fa8600	831	* number is returned, either defined with number
AnnaBridge	157:e7ca05fa8600	832	* or with bitfield (only one bit must be set).
AnnaBridge	157:e7ca05fa8600	833	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	834	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	835	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	836	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	837	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	838	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	839	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	840	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	841	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	842	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	843	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	844	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	845	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	846	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	847	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	848	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	849	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	850	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	851	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	852	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	853	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	854	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	855	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	856	*
AnnaBridge	157:e7ca05fa8600	857	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	858	* @retval Value between Min_Data=0 and Max_Data=18
AnnaBridge	157:e7ca05fa8600	859	*/
AnnaBridge	157:e7ca05fa8600	860	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	861	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	862	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	157:e7ca05fa8600	863	? ( \
AnnaBridge	157:e7ca05fa8600	864	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	157:e7ca05fa8600	865	) \
AnnaBridge	157:e7ca05fa8600	866	: \
AnnaBridge	157:e7ca05fa8600	867	( \
AnnaBridge	157:e7ca05fa8600	868	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	157:e7ca05fa8600	869	( \
AnnaBridge	157:e7ca05fa8600	870	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	157:e7ca05fa8600	871	( \
AnnaBridge	157:e7ca05fa8600	872	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	157:e7ca05fa8600	873	( \
AnnaBridge	157:e7ca05fa8600	874	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	157:e7ca05fa8600	875	( \
AnnaBridge	157:e7ca05fa8600	876	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	157:e7ca05fa8600	877	( \
AnnaBridge	157:e7ca05fa8600	878	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	157:e7ca05fa8600	879	( \
AnnaBridge	157:e7ca05fa8600	880	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	157:e7ca05fa8600	881	( \
AnnaBridge	157:e7ca05fa8600	882	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	157:e7ca05fa8600	883	( \
AnnaBridge	157:e7ca05fa8600	884	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	157:e7ca05fa8600	885	( \
AnnaBridge	157:e7ca05fa8600	886	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	157:e7ca05fa8600	887	( \
AnnaBridge	157:e7ca05fa8600	888	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	157:e7ca05fa8600	889	( \
AnnaBridge	157:e7ca05fa8600	890	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	157:e7ca05fa8600	891	( \
AnnaBridge	157:e7ca05fa8600	892	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	157:e7ca05fa8600	893	( \
AnnaBridge	157:e7ca05fa8600	894	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	157:e7ca05fa8600	895	( \
AnnaBridge	157:e7ca05fa8600	896	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	157:e7ca05fa8600	897	( \
AnnaBridge	157:e7ca05fa8600	898	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	157:e7ca05fa8600	899	( \
AnnaBridge	157:e7ca05fa8600	900	(((__CHANNEL__) & ADC_CHSELR_CHSEL16) == ADC_CHSELR_CHSEL16) ? (16U) : \
AnnaBridge	157:e7ca05fa8600	901	( \
AnnaBridge	157:e7ca05fa8600	902	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	157:e7ca05fa8600	903	( \
AnnaBridge	157:e7ca05fa8600	904	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	157:e7ca05fa8600	905	(0U) \
AnnaBridge	157:e7ca05fa8600	906	) \
AnnaBridge	157:e7ca05fa8600	907	) \
AnnaBridge	157:e7ca05fa8600	908	) \
AnnaBridge	157:e7ca05fa8600	909	) \
AnnaBridge	157:e7ca05fa8600	910	) \
AnnaBridge	157:e7ca05fa8600	911	) \
AnnaBridge	157:e7ca05fa8600	912	) \
AnnaBridge	157:e7ca05fa8600	913	) \
AnnaBridge	157:e7ca05fa8600	914	) \
AnnaBridge	157:e7ca05fa8600	915	) \
AnnaBridge	157:e7ca05fa8600	916	) \
AnnaBridge	157:e7ca05fa8600	917	) \
AnnaBridge	157:e7ca05fa8600	918	) \
AnnaBridge	157:e7ca05fa8600	919	) \
AnnaBridge	157:e7ca05fa8600	920	) \
AnnaBridge	157:e7ca05fa8600	921	) \
AnnaBridge	157:e7ca05fa8600	922	) \
AnnaBridge	157:e7ca05fa8600	923	) \
AnnaBridge	157:e7ca05fa8600	924	) \
AnnaBridge	157:e7ca05fa8600	925	)
AnnaBridge	157:e7ca05fa8600	926	#else
AnnaBridge	157:e7ca05fa8600	927	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	928	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	157:e7ca05fa8600	929	? ( \
AnnaBridge	157:e7ca05fa8600	930	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	157:e7ca05fa8600	931	) \
AnnaBridge	157:e7ca05fa8600	932	: \
AnnaBridge	157:e7ca05fa8600	933	( \
AnnaBridge	157:e7ca05fa8600	934	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	157:e7ca05fa8600	935	( \
AnnaBridge	157:e7ca05fa8600	936	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	157:e7ca05fa8600	937	( \
AnnaBridge	157:e7ca05fa8600	938	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	157:e7ca05fa8600	939	( \
AnnaBridge	157:e7ca05fa8600	940	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	157:e7ca05fa8600	941	( \
AnnaBridge	157:e7ca05fa8600	942	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	157:e7ca05fa8600	943	( \
AnnaBridge	157:e7ca05fa8600	944	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	157:e7ca05fa8600	945	( \
AnnaBridge	157:e7ca05fa8600	946	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	157:e7ca05fa8600	947	( \
AnnaBridge	157:e7ca05fa8600	948	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	157:e7ca05fa8600	949	( \
AnnaBridge	157:e7ca05fa8600	950	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	157:e7ca05fa8600	951	( \
AnnaBridge	157:e7ca05fa8600	952	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	157:e7ca05fa8600	953	( \
AnnaBridge	157:e7ca05fa8600	954	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	157:e7ca05fa8600	955	( \
AnnaBridge	157:e7ca05fa8600	956	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	157:e7ca05fa8600	957	( \
AnnaBridge	157:e7ca05fa8600	958	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	157:e7ca05fa8600	959	( \
AnnaBridge	157:e7ca05fa8600	960	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	157:e7ca05fa8600	961	( \
AnnaBridge	157:e7ca05fa8600	962	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	157:e7ca05fa8600	963	( \
AnnaBridge	157:e7ca05fa8600	964	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	157:e7ca05fa8600	965	( \
AnnaBridge	157:e7ca05fa8600	966	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	157:e7ca05fa8600	967	( \
AnnaBridge	157:e7ca05fa8600	968	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	157:e7ca05fa8600	969	(0U) \
AnnaBridge	157:e7ca05fa8600	970	) \
AnnaBridge	157:e7ca05fa8600	971	) \
AnnaBridge	157:e7ca05fa8600	972	) \
AnnaBridge	157:e7ca05fa8600	973	) \
AnnaBridge	157:e7ca05fa8600	974	) \
AnnaBridge	157:e7ca05fa8600	975	) \
AnnaBridge	157:e7ca05fa8600	976	) \
AnnaBridge	157:e7ca05fa8600	977	) \
AnnaBridge	157:e7ca05fa8600	978	) \
AnnaBridge	157:e7ca05fa8600	979	) \
AnnaBridge	157:e7ca05fa8600	980	) \
AnnaBridge	157:e7ca05fa8600	981	) \
AnnaBridge	157:e7ca05fa8600	982	) \
AnnaBridge	157:e7ca05fa8600	983	) \
AnnaBridge	157:e7ca05fa8600	984	) \
AnnaBridge	157:e7ca05fa8600	985	) \
AnnaBridge	157:e7ca05fa8600	986	) \
AnnaBridge	157:e7ca05fa8600	987	) \
AnnaBridge	157:e7ca05fa8600	988	)
AnnaBridge	157:e7ca05fa8600	989	#endif
AnnaBridge	157:e7ca05fa8600	990
AnnaBridge	157:e7ca05fa8600	991	/**
AnnaBridge	157:e7ca05fa8600	992	* @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
AnnaBridge	157:e7ca05fa8600	993	* from number in decimal format.
AnnaBridge	157:e7ca05fa8600	994	* @note Example:
AnnaBridge	157:e7ca05fa8600	995	* __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
AnnaBridge	157:e7ca05fa8600	996	* will return a data equivalent to "LL_ADC_CHANNEL_4".
AnnaBridge	157:e7ca05fa8600	997	* @param __DECIMAL_NB__: Value between Min_Data=0 and Max_Data=18
AnnaBridge	157:e7ca05fa8600	998	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	999	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1000	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1001	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1002	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1003	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1004	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1005	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1006	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1007	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1008	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1009	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1010	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1011	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1012	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1013	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1014	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1015	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1016	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1017	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1018	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	157:e7ca05fa8600	1019	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	157:e7ca05fa8600	1020	* @arg @ref LL_ADC_CHANNEL_VLCD (1)(2)
AnnaBridge	157:e7ca05fa8600	1021	*
AnnaBridge	157:e7ca05fa8600	1022	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
AnnaBridge	157:e7ca05fa8600	1023	* (2) For ADC channel read back from ADC register,
AnnaBridge	157:e7ca05fa8600	1024	* comparison with internal channel parameter to be done
AnnaBridge	157:e7ca05fa8600	1025	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	157:e7ca05fa8600	1026	*/
AnnaBridge	157:e7ca05fa8600	1027	#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	157:e7ca05fa8600	1028	( \
AnnaBridge	157:e7ca05fa8600	1029	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
AnnaBridge	157:e7ca05fa8600	1030	(ADC_CHSELR_CHSEL0 << (__DECIMAL_NB__)) \
AnnaBridge	157:e7ca05fa8600	1031	)
AnnaBridge	157:e7ca05fa8600	1032
AnnaBridge	157:e7ca05fa8600	1033	/**
AnnaBridge	157:e7ca05fa8600	1034	* @brief Helper macro to determine whether the selected channel
AnnaBridge	157:e7ca05fa8600	1035	* corresponds to literal definitions of driver.
AnnaBridge	157:e7ca05fa8600	1036	* @note The different literal definitions of ADC channels are:
AnnaBridge	157:e7ca05fa8600	1037	* - ADC internal channel:
AnnaBridge	157:e7ca05fa8600	1038	* LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
AnnaBridge	157:e7ca05fa8600	1039	* - ADC external channel (channel connected to a GPIO pin):
AnnaBridge	157:e7ca05fa8600	1040	* LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
AnnaBridge	157:e7ca05fa8600	1041	* @note The channel parameter must be a value defined from literal
AnnaBridge	157:e7ca05fa8600	1042	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	157:e7ca05fa8600	1043	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1044	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
AnnaBridge	157:e7ca05fa8600	1045	* must not be a value from functions where a channel number is
AnnaBridge	157:e7ca05fa8600	1046	* returned from ADC registers,
AnnaBridge	157:e7ca05fa8600	1047	* because internal and external channels share the same channel
AnnaBridge	157:e7ca05fa8600	1048	* number in ADC registers. The differentiation is made only with
AnnaBridge	157:e7ca05fa8600	1049	* parameters definitions of driver.
AnnaBridge	157:e7ca05fa8600	1050	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1051	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1052	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1053	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1054	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1055	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1056	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1057	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1058	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1059	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1060	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1061	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1062	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1063	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1064	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1065	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1066	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1067	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1068	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1069	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1070	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	1071	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1072	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	1073	*
AnnaBridge	157:e7ca05fa8600	1074	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1075	* @retval - 0 if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin)
AnnaBridge	157:e7ca05fa8600	1076	* - 1 if the channel corresponds to a parameter definition of a ADC internal channel
AnnaBridge	157:e7ca05fa8600	1077	*/
AnnaBridge	157:e7ca05fa8600	1078	#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1079	(((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
AnnaBridge	157:e7ca05fa8600	1080
AnnaBridge	157:e7ca05fa8600	1081	/**
AnnaBridge	157:e7ca05fa8600	1082	* @brief Helper macro to convert a channel defined from parameter
AnnaBridge	157:e7ca05fa8600	1083	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	157:e7ca05fa8600	1084	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1085	* to its equivalent parameter definition of a ADC external channel
AnnaBridge	157:e7ca05fa8600	1086	* (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
AnnaBridge	157:e7ca05fa8600	1087	* @note The channel parameter can be, additionally to a value
AnnaBridge	157:e7ca05fa8600	1088	* defined from parameter definition of a ADC internal channel
AnnaBridge	157:e7ca05fa8600	1089	* (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1090	* a value defined from parameter definition of
AnnaBridge	157:e7ca05fa8600	1091	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	157:e7ca05fa8600	1092	* or a value from functions where a channel number is returned
AnnaBridge	157:e7ca05fa8600	1093	* from ADC registers.
AnnaBridge	157:e7ca05fa8600	1094	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1095	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1096	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1097	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1098	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1099	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1100	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1101	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1102	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1103	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1104	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1105	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1106	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1107	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1108	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1109	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1110	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1111	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1112	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1113	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1114	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	1115	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1116	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	1117	*
AnnaBridge	157:e7ca05fa8600	1118	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1119	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1120	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1121	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1122	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1123	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1124	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1125	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1126	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1127	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1128	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1129	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1130	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1131	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1132	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1133	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1134	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1135	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1136	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	157:e7ca05fa8600	1137	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1138	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1139	*/
AnnaBridge	157:e7ca05fa8600	1140	#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1141	((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	157:e7ca05fa8600	1142
AnnaBridge	157:e7ca05fa8600	1143	/**
AnnaBridge	157:e7ca05fa8600	1144	* @brief Helper macro to determine whether the internal channel
AnnaBridge	157:e7ca05fa8600	1145	* selected is available on the ADC instance selected.
AnnaBridge	157:e7ca05fa8600	1146	* @note The channel parameter must be a value defined from parameter
AnnaBridge	157:e7ca05fa8600	1147	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	157:e7ca05fa8600	1148	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	157:e7ca05fa8600	1149	* must not be a value defined from parameter definition of
AnnaBridge	157:e7ca05fa8600	1150	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	157:e7ca05fa8600	1151	* or a value from functions where a channel number is
AnnaBridge	157:e7ca05fa8600	1152	* returned from ADC registers,
AnnaBridge	157:e7ca05fa8600	1153	* because internal and external channels share the same channel
AnnaBridge	157:e7ca05fa8600	1154	* number in ADC registers. The differentiation is made only with
AnnaBridge	157:e7ca05fa8600	1155	* parameters definitions of driver.
AnnaBridge	157:e7ca05fa8600	1156	* @param __ADC_INSTANCE__ ADC instance
AnnaBridge	157:e7ca05fa8600	1157	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1158	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	1159	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1160	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	1161	*
AnnaBridge	157:e7ca05fa8600	1162	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1163
AnnaBridge	157:e7ca05fa8600	1164	* @retval - 0 if the internal channel selected is not available on the ADC instance selected.
AnnaBridge	157:e7ca05fa8600	1165	* - 1 if the internal channel selected is available on the ADC instance selected.
AnnaBridge	157:e7ca05fa8600	1166	*/
AnnaBridge	157:e7ca05fa8600	1167	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	1168	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1169	( \
AnnaBridge	157:e7ca05fa8600	1170	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	157:e7ca05fa8600	1171	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	157:e7ca05fa8600	1172	((__CHANNEL__) == LL_ADC_CHANNEL_VLCD) \
AnnaBridge	157:e7ca05fa8600	1173	)
AnnaBridge	157:e7ca05fa8600	1174	#else
AnnaBridge	157:e7ca05fa8600	1175	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	157:e7ca05fa8600	1176	( \
AnnaBridge	157:e7ca05fa8600	1177	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	157:e7ca05fa8600	1178	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \
AnnaBridge	157:e7ca05fa8600	1179	)
AnnaBridge	157:e7ca05fa8600	1180	#endif
AnnaBridge	157:e7ca05fa8600	1181
AnnaBridge	157:e7ca05fa8600	1182	/**
AnnaBridge	157:e7ca05fa8600	1183	* @brief Helper macro to define ADC analog watchdog parameter:
AnnaBridge	157:e7ca05fa8600	1184	* define a single channel to monitor with analog watchdog
AnnaBridge	157:e7ca05fa8600	1185	* from sequencer channel and groups definition.
AnnaBridge	157:e7ca05fa8600	1186	* @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
AnnaBridge	157:e7ca05fa8600	1187	* Example:
AnnaBridge	157:e7ca05fa8600	1188	* LL_ADC_SetAnalogWDMonitChannels(
AnnaBridge	157:e7ca05fa8600	1189	* ADC1, LL_ADC_AWD1,
AnnaBridge	157:e7ca05fa8600	1190	* __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
AnnaBridge	157:e7ca05fa8600	1191	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1192	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	1193	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	1194	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	1195	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	1196	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	1197	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	1198	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	1199	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	1200	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	1201	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	1202	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	1203	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	1204	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	1205	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	1206	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	1207	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	1208	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	1209	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	1210	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	1211	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	157:e7ca05fa8600	1212	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	157:e7ca05fa8600	1213	* @arg @ref LL_ADC_CHANNEL_VLCD (1)(2)
AnnaBridge	157:e7ca05fa8600	1214	*
AnnaBridge	157:e7ca05fa8600	1215	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
AnnaBridge	157:e7ca05fa8600	1216	* (2) For ADC channel read back from ADC register,
AnnaBridge	157:e7ca05fa8600	1217	* comparison with internal channel parameter to be done
AnnaBridge	157:e7ca05fa8600	1218	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	157:e7ca05fa8600	1219	* @param __GROUP__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1220	* @arg @ref LL_ADC_GROUP_REGULAR
AnnaBridge	157:e7ca05fa8600	1221	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1222	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	157:e7ca05fa8600	1223	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	157:e7ca05fa8600	1224	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	157:e7ca05fa8600	1225	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	157:e7ca05fa8600	1226	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	157:e7ca05fa8600	1227	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	157:e7ca05fa8600	1228	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	157:e7ca05fa8600	1229	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	157:e7ca05fa8600	1230	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	157:e7ca05fa8600	1231	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	157:e7ca05fa8600	1232	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	157:e7ca05fa8600	1233	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	157:e7ca05fa8600	1234	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	157:e7ca05fa8600	1235	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	157:e7ca05fa8600	1236	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	157:e7ca05fa8600	1237	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	157:e7ca05fa8600	1238	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	157:e7ca05fa8600	1239	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	157:e7ca05fa8600	1240	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (1)
AnnaBridge	157:e7ca05fa8600	1241	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	157:e7ca05fa8600	1242	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	157:e7ca05fa8600	1243	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	157:e7ca05fa8600	1244	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	157:e7ca05fa8600	1245	* @arg @ref LL_ADC_AWD_CH_VLCD_REG (1)
AnnaBridge	157:e7ca05fa8600	1246	*
AnnaBridge	157:e7ca05fa8600	1247	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1248	*/
AnnaBridge	157:e7ca05fa8600	1249	#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) \
AnnaBridge	157:e7ca05fa8600	1250	(((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	157:e7ca05fa8600	1251
AnnaBridge	157:e7ca05fa8600	1252	/**
AnnaBridge	157:e7ca05fa8600	1253	* @brief Helper macro to set the value of ADC analog watchdog threshold high
AnnaBridge	157:e7ca05fa8600	1254	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	157:e7ca05fa8600	1255	* different of 12 bits.
AnnaBridge	157:e7ca05fa8600	1256	* @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
AnnaBridge	157:e7ca05fa8600	1257	* or @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	1258	* Example, with a ADC resolution of 8 bits, to set the value of
AnnaBridge	157:e7ca05fa8600	1259	* analog watchdog threshold high (on 8 bits):
AnnaBridge	157:e7ca05fa8600	1260	* LL_ADC_SetAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	1261	* (< ADCx param >,
AnnaBridge	157:e7ca05fa8600	1262	* __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8_bits>)
AnnaBridge	157:e7ca05fa8600	1263	* );
AnnaBridge	157:e7ca05fa8600	1264	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1265	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1266	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1267	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1268	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1269	* @param __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1270	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1271	*/
AnnaBridge	157:e7ca05fa8600	1272	#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
AnnaBridge	157:e7ca05fa8600	1273	((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	157:e7ca05fa8600	1274
AnnaBridge	157:e7ca05fa8600	1275	/**
AnnaBridge	157:e7ca05fa8600	1276	* @brief Helper macro to get the value of ADC analog watchdog threshold high
AnnaBridge	157:e7ca05fa8600	1277	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	157:e7ca05fa8600	1278	* different of 12 bits.
AnnaBridge	157:e7ca05fa8600	1279	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	1280	* Example, with a ADC resolution of 8 bits, to get the value of
AnnaBridge	157:e7ca05fa8600	1281	* analog watchdog threshold high (on 8 bits):
AnnaBridge	157:e7ca05fa8600	1282	* < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
AnnaBridge	157:e7ca05fa8600	1283	* (LL_ADC_RESOLUTION_8B,
AnnaBridge	157:e7ca05fa8600	1284	* LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
AnnaBridge	157:e7ca05fa8600	1285	* );
AnnaBridge	157:e7ca05fa8600	1286	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1287	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1288	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1289	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1290	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1291	* @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1292	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1293	*/
AnnaBridge	157:e7ca05fa8600	1294	#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
AnnaBridge	157:e7ca05fa8600	1295	((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	157:e7ca05fa8600	1296
AnnaBridge	157:e7ca05fa8600	1297	/**
AnnaBridge	157:e7ca05fa8600	1298	* @brief Helper macro to get the ADC analog watchdog threshold high
AnnaBridge	157:e7ca05fa8600	1299	* or low from raw value containing both thresholds concatenated.
AnnaBridge	157:e7ca05fa8600	1300	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	1301	* Example, to get analog watchdog threshold high from the register raw value:
AnnaBridge	157:e7ca05fa8600	1302	* __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both_thresholds>);
AnnaBridge	157:e7ca05fa8600	1303	* @param __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1304	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	157:e7ca05fa8600	1305	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	157:e7ca05fa8600	1306	* @param __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	157:e7ca05fa8600	1307	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	1308	*/
AnnaBridge	157:e7ca05fa8600	1309	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
AnnaBridge	157:e7ca05fa8600	1310	(((__AWD_THRESHOLD_TYPE__) == LL_ADC_AWD_THRESHOLD_LOW) \
AnnaBridge	157:e7ca05fa8600	1311	? ( \
AnnaBridge	157:e7ca05fa8600	1312	(__AWD_THRESHOLDS__) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	157:e7ca05fa8600	1313	) \
AnnaBridge	157:e7ca05fa8600	1314	: \
AnnaBridge	157:e7ca05fa8600	1315	( \
AnnaBridge	157:e7ca05fa8600	1316	((__AWD_THRESHOLDS__) >> ADC_TR_HT_BITOFFSET_POS) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	157:e7ca05fa8600	1317	) \
AnnaBridge	157:e7ca05fa8600	1318	)
AnnaBridge	157:e7ca05fa8600	1319
AnnaBridge	157:e7ca05fa8600	1320	/**
AnnaBridge	157:e7ca05fa8600	1321	* @brief Helper macro to select the ADC common instance
AnnaBridge	157:e7ca05fa8600	1322	* to which is belonging the selected ADC instance.
AnnaBridge	157:e7ca05fa8600	1323	* @note ADC common register instance can be used for:
AnnaBridge	157:e7ca05fa8600	1324	* - Set parameters common to several ADC instances
AnnaBridge	157:e7ca05fa8600	1325	* - Multimode (for devices with several ADC instances)
AnnaBridge	157:e7ca05fa8600	1326	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	157:e7ca05fa8600	1327	* @param __ADCx__ ADC instance
AnnaBridge	157:e7ca05fa8600	1328	* @retval ADC common register instance
AnnaBridge	157:e7ca05fa8600	1329	*/
AnnaBridge	157:e7ca05fa8600	1330	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	157:e7ca05fa8600	1331	(ADC1_COMMON)
AnnaBridge	157:e7ca05fa8600	1332
AnnaBridge	157:e7ca05fa8600	1333	/**
AnnaBridge	157:e7ca05fa8600	1334	* @brief Helper macro to check if all ADC instances sharing the same
AnnaBridge	157:e7ca05fa8600	1335	* ADC common instance are disabled.
AnnaBridge	157:e7ca05fa8600	1336	* @note This check is required by functions with setting conditioned to
AnnaBridge	157:e7ca05fa8600	1337	* ADC state:
AnnaBridge	157:e7ca05fa8600	1338	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	157:e7ca05fa8600	1339	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	157:e7ca05fa8600	1340	* @note On devices with only 1 ADC common instance, parameter of this macro
AnnaBridge	157:e7ca05fa8600	1341	* is useless and can be ignored (parameter kept for compatibility
AnnaBridge	157:e7ca05fa8600	1342	* with devices featuring several ADC common instances).
AnnaBridge	157:e7ca05fa8600	1343	* @param __ADCXY_COMMON__ ADC common instance
AnnaBridge	157:e7ca05fa8600	1344	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1345	* @retval - 0 All ADC instances sharing the same ADC common instance
AnnaBridge	157:e7ca05fa8600	1346	* are disabled.
AnnaBridge	157:e7ca05fa8600	1347	* - 1 At least one ADC instance sharing the same ADC common instance
AnnaBridge	157:e7ca05fa8600	1348	* is enabled
AnnaBridge	157:e7ca05fa8600	1349	*/
AnnaBridge	157:e7ca05fa8600	1350	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	157:e7ca05fa8600	1351	LL_ADC_IsEnabled(ADC1)
AnnaBridge	157:e7ca05fa8600	1352
AnnaBridge	157:e7ca05fa8600	1353	/**
AnnaBridge	157:e7ca05fa8600	1354	* @brief Helper macro to define the ADC conversion data full-scale digital
AnnaBridge	157:e7ca05fa8600	1355	* value corresponding to the selected ADC resolution.
AnnaBridge	157:e7ca05fa8600	1356	* @note ADC conversion data full-scale corresponds to voltage range
AnnaBridge	157:e7ca05fa8600	1357	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	157:e7ca05fa8600	1358	* (refer to reference manual).
AnnaBridge	157:e7ca05fa8600	1359	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1360	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1361	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1362	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1363	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1364	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	157:e7ca05fa8600	1365	*/
AnnaBridge	157:e7ca05fa8600	1366	#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1367	(((uint32_t)0xFFFU) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))
AnnaBridge	157:e7ca05fa8600	1368
AnnaBridge	157:e7ca05fa8600	1369	/**
AnnaBridge	157:e7ca05fa8600	1370	* @brief Helper macro to convert the ADC conversion data from
AnnaBridge	157:e7ca05fa8600	1371	* a resolution to another resolution.
AnnaBridge	157:e7ca05fa8600	1372	* @param __DATA__ ADC conversion data to be converted
AnnaBridge	157:e7ca05fa8600	1373	* @param __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
AnnaBridge	157:e7ca05fa8600	1374	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1375	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1376	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1377	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1378	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1379	* @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
AnnaBridge	157:e7ca05fa8600	1380	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1381	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1382	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1383	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1384	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1385	* @retval ADC conversion data to the requested resolution
AnnaBridge	157:e7ca05fa8600	1386	*/
AnnaBridge	157:e7ca05fa8600	1387	#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__, __ADC_RESOLUTION_CURRENT__, __ADC_RESOLUTION_TARGET__) \
AnnaBridge	157:e7ca05fa8600	1388	(((__DATA__) \
AnnaBridge	157:e7ca05fa8600	1389	<< ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U))) \
AnnaBridge	157:e7ca05fa8600	1390	>> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)) \
AnnaBridge	157:e7ca05fa8600	1391	)
AnnaBridge	157:e7ca05fa8600	1392
AnnaBridge	157:e7ca05fa8600	1393	/**
AnnaBridge	157:e7ca05fa8600	1394	* @brief Helper macro to calculate the voltage (unit: mVolt)
AnnaBridge	157:e7ca05fa8600	1395	* corresponding to a ADC conversion data (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1396	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	157:e7ca05fa8600	1397	* user board environment or can be calculated using ADC measurement
AnnaBridge	157:e7ca05fa8600	1398	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	157:e7ca05fa8600	1399	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1400	* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	157:e7ca05fa8600	1401	* (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1402	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1403	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1404	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1405	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1406	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1407	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	157:e7ca05fa8600	1408	*/
AnnaBridge	157:e7ca05fa8600	1409	#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	157:e7ca05fa8600	1410	__ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1411	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1412	((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
AnnaBridge	157:e7ca05fa8600	1413	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1414	)
AnnaBridge	157:e7ca05fa8600	1415
AnnaBridge	157:e7ca05fa8600	1416	/**
AnnaBridge	157:e7ca05fa8600	1417	* @brief Helper macro to calculate analog reference voltage (Vref+)
AnnaBridge	157:e7ca05fa8600	1418	* (unit: mVolt) from ADC conversion data of internal voltage
AnnaBridge	157:e7ca05fa8600	1419	* reference VrefInt.
AnnaBridge	157:e7ca05fa8600	1420	* @note Computation is using VrefInt calibration value
AnnaBridge	157:e7ca05fa8600	1421	* stored in system memory for each device during production.
AnnaBridge	157:e7ca05fa8600	1422	* @note This voltage depends on user board environment: voltage level
AnnaBridge	157:e7ca05fa8600	1423	* connected to pin Vref+.
AnnaBridge	157:e7ca05fa8600	1424	* On devices with small package, the pin Vref+ is not present
AnnaBridge	157:e7ca05fa8600	1425	* and internally bonded to pin Vdda.
AnnaBridge	157:e7ca05fa8600	1426	* @note On this STM32 serie, calibration data of internal voltage reference
AnnaBridge	157:e7ca05fa8600	1427	* VrefInt corresponds to a resolution of 12 bits,
AnnaBridge	157:e7ca05fa8600	1428	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	157:e7ca05fa8600	1429	* internal voltage reference VrefInt.
AnnaBridge	157:e7ca05fa8600	1430	* Otherwise, this macro performs the processing to scale
AnnaBridge	157:e7ca05fa8600	1431	* ADC conversion data to 12 bits.
AnnaBridge	157:e7ca05fa8600	1432	* @param __VREFINT_ADC_DATA__: ADC conversion data (resolution 12 bits)
AnnaBridge	157:e7ca05fa8600	1433	* of internal voltage reference VrefInt (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1434	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1435	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1436	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1437	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1438	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1439	* @retval Analog reference voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1440	*/
AnnaBridge	157:e7ca05fa8600	1441	#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1442	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1443	(((uint32_t)(VREFINT_CAL_ADDR) VREFINT_CAL_VREF) \
AnnaBridge	157:e7ca05fa8600	1444	/ __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
AnnaBridge	157:e7ca05fa8600	1445	(__ADC_RESOLUTION__), \
AnnaBridge	157:e7ca05fa8600	1446	LL_ADC_RESOLUTION_12B) \
AnnaBridge	157:e7ca05fa8600	1447	)
AnnaBridge	157:e7ca05fa8600	1448
AnnaBridge	157:e7ca05fa8600	1449	/**
AnnaBridge	157:e7ca05fa8600	1450	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1451	* from ADC conversion data of internal temperature sensor.
AnnaBridge	157:e7ca05fa8600	1452	* @note Computation is using temperature sensor calibration values
AnnaBridge	157:e7ca05fa8600	1453	* stored in system memory for each device during production.
AnnaBridge	157:e7ca05fa8600	1454	* @note Calculation formula:
AnnaBridge	157:e7ca05fa8600	1455	* Temperature = ((TS_ADC_DATA - TS_CAL1)
AnnaBridge	157:e7ca05fa8600	1456	* * (TS_CAL2_TEMP - TS_CAL1_TEMP))
AnnaBridge	157:e7ca05fa8600	1457	* / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
AnnaBridge	157:e7ca05fa8600	1458	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	157:e7ca05fa8600	1459	* Avg_Slope = (TS_CAL2 - TS_CAL1)
AnnaBridge	157:e7ca05fa8600	1460	* / (TS_CAL2_TEMP - TS_CAL1_TEMP)
AnnaBridge	157:e7ca05fa8600	1461	* TS_CAL1 = equivalent TS_ADC_DATA at temperature
AnnaBridge	157:e7ca05fa8600	1462	* TEMP_DEGC_CAL1 (calibrated in factory)
AnnaBridge	157:e7ca05fa8600	1463	* TS_CAL2 = equivalent TS_ADC_DATA at temperature
AnnaBridge	157:e7ca05fa8600	1464	* TEMP_DEGC_CAL2 (calibrated in factory)
AnnaBridge	157:e7ca05fa8600	1465	* Caution: Calculation relevancy under reserve that calibration
AnnaBridge	157:e7ca05fa8600	1466	* parameters are correct (address and data).
AnnaBridge	157:e7ca05fa8600	1467	* To calculate temperature using temperature sensor
AnnaBridge	157:e7ca05fa8600	1468	* datasheet typical values (generic values less, therefore
AnnaBridge	157:e7ca05fa8600	1469	* less accurate than calibrated values),
AnnaBridge	157:e7ca05fa8600	1470	* use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
AnnaBridge	157:e7ca05fa8600	1471	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	157:e7ca05fa8600	1472	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	157:e7ca05fa8600	1473	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	157:e7ca05fa8600	1474	* user board environment or can be calculated using ADC measurement
AnnaBridge	157:e7ca05fa8600	1475	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	157:e7ca05fa8600	1476	* @note On this STM32 serie, calibration data of temperature sensor
AnnaBridge	157:e7ca05fa8600	1477	* corresponds to a resolution of 12 bits,
AnnaBridge	157:e7ca05fa8600	1478	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	157:e7ca05fa8600	1479	* temperature sensor.
AnnaBridge	157:e7ca05fa8600	1480	* Otherwise, this macro performs the processing to scale
AnnaBridge	157:e7ca05fa8600	1481	* ADC conversion data to 12 bits.
AnnaBridge	157:e7ca05fa8600	1482	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1483	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
AnnaBridge	157:e7ca05fa8600	1484	* temperature sensor (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1485	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
AnnaBridge	157:e7ca05fa8600	1486	* sensor voltage has been measured.
AnnaBridge	157:e7ca05fa8600	1487	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1488	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1489	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1490	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1491	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1492	* @retval Temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1493	*/
AnnaBridge	157:e7ca05fa8600	1494	#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	157:e7ca05fa8600	1495	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1496	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1497	(((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
AnnaBridge	157:e7ca05fa8600	1498	(__ADC_RESOLUTION__), \
AnnaBridge	157:e7ca05fa8600	1499	LL_ADC_RESOLUTION_12B) \
AnnaBridge	157:e7ca05fa8600	1500	* (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	157:e7ca05fa8600	1501	/ TEMPSENSOR_CAL_VREFANALOG) \
AnnaBridge	157:e7ca05fa8600	1502	- (int32_t) *TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	157:e7ca05fa8600	1503	) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
AnnaBridge	157:e7ca05fa8600	1504	) / (int32_t)((int32_t)TEMPSENSOR_CAL2_ADDR - (int32_t)TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	157:e7ca05fa8600	1505	) + TEMPSENSOR_CAL1_TEMP \
AnnaBridge	157:e7ca05fa8600	1506	)
AnnaBridge	157:e7ca05fa8600	1507
AnnaBridge	157:e7ca05fa8600	1508	/**
AnnaBridge	157:e7ca05fa8600	1509	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1510	* from ADC conversion data of internal temperature sensor.
AnnaBridge	157:e7ca05fa8600	1511	* @note Computation is using temperature sensor typical values
AnnaBridge	157:e7ca05fa8600	1512	* (refer to device datasheet).
AnnaBridge	157:e7ca05fa8600	1513	* @note Calculation formula:
AnnaBridge	157:e7ca05fa8600	1514	* Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
AnnaBridge	157:e7ca05fa8600	1515	* / Avg_Slope + CALx_TEMP
AnnaBridge	157:e7ca05fa8600	1516	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	157:e7ca05fa8600	1517	* (unit: digital value)
AnnaBridge	157:e7ca05fa8600	1518	* Avg_Slope = temperature sensor slope
AnnaBridge	157:e7ca05fa8600	1519	* (unit: uV/Degree Celsius)
AnnaBridge	157:e7ca05fa8600	1520	* TS_TYP_CALx_VOLT = temperature sensor digital value at
AnnaBridge	157:e7ca05fa8600	1521	* temperature CALx_TEMP (unit: mV)
AnnaBridge	157:e7ca05fa8600	1522	* Caution: Calculation relevancy under reserve the temperature sensor
AnnaBridge	157:e7ca05fa8600	1523	* of the current device has characteristics in line with
AnnaBridge	157:e7ca05fa8600	1524	* datasheet typical values.
AnnaBridge	157:e7ca05fa8600	1525	* If temperature sensor calibration values are available on
AnnaBridge	157:e7ca05fa8600	1526	* on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
AnnaBridge	157:e7ca05fa8600	1527	* temperature calculation will be more accurate using
AnnaBridge	157:e7ca05fa8600	1528	* helper macro @ref __LL_ADC_CALC_TEMPERATURE().
AnnaBridge	157:e7ca05fa8600	1529	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	157:e7ca05fa8600	1530	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	157:e7ca05fa8600	1531	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	157:e7ca05fa8600	1532	* user board environment or can be calculated using ADC measurement
AnnaBridge	157:e7ca05fa8600	1533	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	157:e7ca05fa8600	1534	* @note ADC measurement data must correspond to a resolution of 12bits
AnnaBridge	157:e7ca05fa8600	1535	* (full scale digital value 4095). If not the case, the data must be
AnnaBridge	157:e7ca05fa8600	1536	* preliminarily rescaled to an equivalent resolution of 12 bits.
AnnaBridge	157:e7ca05fa8600	1537	* @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
AnnaBridge	157:e7ca05fa8600	1538	* On STM32L0, refer to device datasheet parameter "Avg_Slope".
AnnaBridge	157:e7ca05fa8600	1539	* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
AnnaBridge	157:e7ca05fa8600	1540	* On STM32L0, refer to device datasheet parameter "V130" (corresponding to TS_CAL2).
AnnaBridge	157:e7ca05fa8600	1541	* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
AnnaBridge	157:e7ca05fa8600	1542	* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
AnnaBridge	157:e7ca05fa8600	1543	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
AnnaBridge	157:e7ca05fa8600	1544	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
AnnaBridge	157:e7ca05fa8600	1545	* This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1546	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1547	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1548	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1549	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1550	* @retval Temperature (unit: degree Celsius)
AnnaBridge	157:e7ca05fa8600	1551	*/
AnnaBridge	157:e7ca05fa8600	1552	#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
AnnaBridge	157:e7ca05fa8600	1553	__TEMPSENSOR_TYP_CALX_V__,\
AnnaBridge	157:e7ca05fa8600	1554	__TEMPSENSOR_CALX_TEMP__,\
AnnaBridge	157:e7ca05fa8600	1555	__VREFANALOG_VOLTAGE__,\
AnnaBridge	157:e7ca05fa8600	1556	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	157:e7ca05fa8600	1557	__ADC_RESOLUTION__) \
AnnaBridge	157:e7ca05fa8600	1558	((( ( \
AnnaBridge	157:e7ca05fa8600	1559	(int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	157:e7ca05fa8600	1560	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
AnnaBridge	157:e7ca05fa8600	1561	* 1000) \
AnnaBridge	157:e7ca05fa8600	1562	- \
AnnaBridge	157:e7ca05fa8600	1563	(int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
AnnaBridge	157:e7ca05fa8600	1564	* 1000) \
AnnaBridge	157:e7ca05fa8600	1565	) \
AnnaBridge	157:e7ca05fa8600	1566	) / (__TEMPSENSOR_TYP_AVGSLOPE__) \
AnnaBridge	157:e7ca05fa8600	1567	) + (__TEMPSENSOR_CALX_TEMP__) \
AnnaBridge	157:e7ca05fa8600	1568	)
AnnaBridge	157:e7ca05fa8600	1569
AnnaBridge	157:e7ca05fa8600	1570	/**
AnnaBridge	157:e7ca05fa8600	1571	* @}
AnnaBridge	157:e7ca05fa8600	1572	*/
AnnaBridge	157:e7ca05fa8600	1573
AnnaBridge	157:e7ca05fa8600	1574	/**
AnnaBridge	157:e7ca05fa8600	1575	* @}
AnnaBridge	157:e7ca05fa8600	1576	*/
AnnaBridge	157:e7ca05fa8600	1577
AnnaBridge	157:e7ca05fa8600	1578
AnnaBridge	157:e7ca05fa8600	1579	/* Exported functions --------------------------------------------------------*/
AnnaBridge	157:e7ca05fa8600	1580	/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
AnnaBridge	157:e7ca05fa8600	1581	* @{
AnnaBridge	157:e7ca05fa8600	1582	*/
AnnaBridge	157:e7ca05fa8600	1583
AnnaBridge	157:e7ca05fa8600	1584	/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
AnnaBridge	157:e7ca05fa8600	1585	* @{
AnnaBridge	157:e7ca05fa8600	1586	*/
AnnaBridge	157:e7ca05fa8600	1587	/* Note: LL ADC functions to set DMA transfer are located into sections of */
AnnaBridge	157:e7ca05fa8600	1588	/* configuration of ADC instance, groups and multimode (if available): */
AnnaBridge	157:e7ca05fa8600	1589	/* @ref LL_ADC_REG_SetDMATransfer(), ... */
AnnaBridge	157:e7ca05fa8600	1590
AnnaBridge	157:e7ca05fa8600	1591	/**
AnnaBridge	157:e7ca05fa8600	1592	* @brief Function to help to configure DMA transfer from ADC: retrieve the
AnnaBridge	157:e7ca05fa8600	1593	* ADC register address from ADC instance and a list of ADC registers
AnnaBridge	157:e7ca05fa8600	1594	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	157:e7ca05fa8600	1595	* @note These ADC registers are data registers:
AnnaBridge	157:e7ca05fa8600	1596	* when ADC conversion data is available in ADC data registers,
AnnaBridge	157:e7ca05fa8600	1597	* ADC generates a DMA transfer request.
AnnaBridge	157:e7ca05fa8600	1598	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	157:e7ca05fa8600	1599	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	157:e7ca05fa8600	1600	* Example:
AnnaBridge	157:e7ca05fa8600	1601	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	157:e7ca05fa8600	1602	* LL_DMA_CHANNEL_1,
AnnaBridge	157:e7ca05fa8600	1603	* LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
AnnaBridge	157:e7ca05fa8600	1604	* (uint32_t)&< array or variable >,
AnnaBridge	157:e7ca05fa8600	1605	* LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
AnnaBridge	157:e7ca05fa8600	1606	* @note For devices with several ADC: in multimode, some devices
AnnaBridge	157:e7ca05fa8600	1607	* use a different data register outside of ADC instance scope
AnnaBridge	157:e7ca05fa8600	1608	* (common data register). This macro manages this register difference,
AnnaBridge	157:e7ca05fa8600	1609	* only ADC instance has to be set as parameter.
AnnaBridge	157:e7ca05fa8600	1610	* @rmtoll DR DATA LL_ADC_DMA_GetRegAddr
AnnaBridge	157:e7ca05fa8600	1611	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1612	* @param Register This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1613	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
AnnaBridge	157:e7ca05fa8600	1614	* @retval ADC register address
AnnaBridge	157:e7ca05fa8600	1615	*/
AnnaBridge	157:e7ca05fa8600	1616	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
AnnaBridge	157:e7ca05fa8600	1617	{
AnnaBridge	157:e7ca05fa8600	1618	/* Retrieve address of register DR */
AnnaBridge	157:e7ca05fa8600	1619	return (uint32_t)&(ADCx->DR);
AnnaBridge	157:e7ca05fa8600	1620	}
AnnaBridge	157:e7ca05fa8600	1621
AnnaBridge	157:e7ca05fa8600	1622	/**
AnnaBridge	157:e7ca05fa8600	1623	* @}
AnnaBridge	157:e7ca05fa8600	1624	*/
AnnaBridge	157:e7ca05fa8600	1625
AnnaBridge	157:e7ca05fa8600	1626	/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
AnnaBridge	157:e7ca05fa8600	1627	* @{
AnnaBridge	157:e7ca05fa8600	1628	*/
AnnaBridge	157:e7ca05fa8600	1629
AnnaBridge	157:e7ca05fa8600	1630	/**
AnnaBridge	157:e7ca05fa8600	1631	* @brief Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1632	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1633	* ADC state:
AnnaBridge	157:e7ca05fa8600	1634	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	157:e7ca05fa8600	1635	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	157:e7ca05fa8600	1636	* ADC instance or by using helper macro helper macro
AnnaBridge	157:e7ca05fa8600	1637	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	157:e7ca05fa8600	1638	* @rmtoll CCR PRESC LL_ADC_SetCommonClock
AnnaBridge	157:e7ca05fa8600	1639	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1640	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1641	* @param CommonClock This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1642	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 (1)
AnnaBridge	157:e7ca05fa8600	1643	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 (1)
AnnaBridge	157:e7ca05fa8600	1644	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 (1)
AnnaBridge	157:e7ca05fa8600	1645	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 (1)
AnnaBridge	157:e7ca05fa8600	1646	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 (1)
AnnaBridge	157:e7ca05fa8600	1647	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 (1)
AnnaBridge	157:e7ca05fa8600	1648	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 (1)
AnnaBridge	157:e7ca05fa8600	1649	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 (1)
AnnaBridge	157:e7ca05fa8600	1650	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 (1)
AnnaBridge	157:e7ca05fa8600	1651	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 (1)
AnnaBridge	157:e7ca05fa8600	1652	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
AnnaBridge	157:e7ca05fa8600	1653	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
AnnaBridge	157:e7ca05fa8600	1654	*
AnnaBridge	157:e7ca05fa8600	1655	* (1) ADC common clock asynchonous prescaler is applied to
AnnaBridge	157:e7ca05fa8600	1656	* each ADC instance if the corresponding ADC instance clock
AnnaBridge	157:e7ca05fa8600	1657	* is set to clock source asynchronous.
AnnaBridge	157:e7ca05fa8600	1658	* (refer to function @ref LL_ADC_SetClock() ).
AnnaBridge	157:e7ca05fa8600	1659	* @retval None
AnnaBridge	157:e7ca05fa8600	1660	*/
AnnaBridge	157:e7ca05fa8600	1661	__STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
AnnaBridge	157:e7ca05fa8600	1662	{
AnnaBridge	157:e7ca05fa8600	1663	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_PRESC, CommonClock);
AnnaBridge	157:e7ca05fa8600	1664	}
AnnaBridge	157:e7ca05fa8600	1665
AnnaBridge	157:e7ca05fa8600	1666	/**
AnnaBridge	157:e7ca05fa8600	1667	* @brief Get parameter common to several ADC: Clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1668	* @rmtoll CCR PRESC LL_ADC_GetCommonClock
AnnaBridge	157:e7ca05fa8600	1669	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1670	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1671	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1672	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 (1)
AnnaBridge	157:e7ca05fa8600	1673	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 (1)
AnnaBridge	157:e7ca05fa8600	1674	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 (1)
AnnaBridge	157:e7ca05fa8600	1675	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 (1)
AnnaBridge	157:e7ca05fa8600	1676	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 (1)
AnnaBridge	157:e7ca05fa8600	1677	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 (1)
AnnaBridge	157:e7ca05fa8600	1678	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 (1)
AnnaBridge	157:e7ca05fa8600	1679	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 (1)
AnnaBridge	157:e7ca05fa8600	1680	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 (1)
AnnaBridge	157:e7ca05fa8600	1681	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 (1)
AnnaBridge	157:e7ca05fa8600	1682	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
AnnaBridge	157:e7ca05fa8600	1683	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
AnnaBridge	157:e7ca05fa8600	1684	*
AnnaBridge	157:e7ca05fa8600	1685	* (1) ADC common clock asynchonous prescaler is applied to
AnnaBridge	157:e7ca05fa8600	1686	* each ADC instance if the corresponding ADC instance clock
AnnaBridge	157:e7ca05fa8600	1687	* is set to clock source asynchronous.
AnnaBridge	157:e7ca05fa8600	1688	* (refer to function @ref LL_ADC_SetClock() ).
AnnaBridge	157:e7ca05fa8600	1689	*/
AnnaBridge	157:e7ca05fa8600	1690	__STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	157:e7ca05fa8600	1691	{
AnnaBridge	157:e7ca05fa8600	1692	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_PRESC));
AnnaBridge	157:e7ca05fa8600	1693	}
AnnaBridge	157:e7ca05fa8600	1694
AnnaBridge	157:e7ca05fa8600	1695	/**
AnnaBridge	157:e7ca05fa8600	1696	* @brief Set parameter common to several ADC: Clock low frequency mode.
AnnaBridge	157:e7ca05fa8600	1697	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1698	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1699	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1700	* ADC state:
AnnaBridge	157:e7ca05fa8600	1701	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	1702	* on group regular.
AnnaBridge	157:e7ca05fa8600	1703	* @rmtoll CCR LFMEN LL_ADC_SetCommonFrequencyMode
AnnaBridge	157:e7ca05fa8600	1704	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1705	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1706	* @param Resolution This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1707	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
AnnaBridge	157:e7ca05fa8600	1708	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
AnnaBridge	157:e7ca05fa8600	1709	* @retval None
AnnaBridge	157:e7ca05fa8600	1710	*/
AnnaBridge	157:e7ca05fa8600	1711	__STATIC_INLINE void LL_ADC_SetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Resolution)
AnnaBridge	157:e7ca05fa8600	1712	{
AnnaBridge	157:e7ca05fa8600	1713	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_LFMEN, Resolution);
AnnaBridge	157:e7ca05fa8600	1714
AnnaBridge	157:e7ca05fa8600	1715	}
AnnaBridge	157:e7ca05fa8600	1716
AnnaBridge	157:e7ca05fa8600	1717	/**
AnnaBridge	157:e7ca05fa8600	1718	* @brief Get parameter common to several ADC: Clock low frequency mode.
AnnaBridge	157:e7ca05fa8600	1719	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1720	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1721	* @rmtoll CCR LFMEN LL_ADC_GetCommonFrequencyMode
AnnaBridge	157:e7ca05fa8600	1722	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1723	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1724	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1725	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
AnnaBridge	157:e7ca05fa8600	1726	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
AnnaBridge	157:e7ca05fa8600	1727	*/
AnnaBridge	157:e7ca05fa8600	1728	__STATIC_INLINE uint32_t LL_ADC_GetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	157:e7ca05fa8600	1729	{
AnnaBridge	157:e7ca05fa8600	1730	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_LFMEN));
AnnaBridge	157:e7ca05fa8600	1731	}
AnnaBridge	157:e7ca05fa8600	1732
AnnaBridge	157:e7ca05fa8600	1733	/**
AnnaBridge	157:e7ca05fa8600	1734	* @brief Set parameter common to several ADC: measurement path to internal
AnnaBridge	157:e7ca05fa8600	1735	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	157:e7ca05fa8600	1736	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	1737	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	157:e7ca05fa8600	1738	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	157:e7ca05fa8600	1739	* @note Stabilization time of measurement path to internal channel:
AnnaBridge	157:e7ca05fa8600	1740	* After enabling internal paths, before starting ADC conversion,
AnnaBridge	157:e7ca05fa8600	1741	* a delay is required for internal voltage reference and
AnnaBridge	157:e7ca05fa8600	1742	* temperature sensor stabilization time.
AnnaBridge	157:e7ca05fa8600	1743	* Refer to device datasheet.
AnnaBridge	157:e7ca05fa8600	1744	* Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
AnnaBridge	157:e7ca05fa8600	1745	* Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
AnnaBridge	157:e7ca05fa8600	1746	* @note ADC internal channel sampling time constraint:
AnnaBridge	157:e7ca05fa8600	1747	* For ADC conversion of internal channels,
AnnaBridge	157:e7ca05fa8600	1748	* a sampling time minimum value is required.
AnnaBridge	157:e7ca05fa8600	1749	* Refer to device datasheet.
AnnaBridge	157:e7ca05fa8600	1750	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1751	* ADC state:
AnnaBridge	157:e7ca05fa8600	1752	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	157:e7ca05fa8600	1753	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	157:e7ca05fa8600	1754	* ADC instance or by using helper macro helper macro
AnnaBridge	157:e7ca05fa8600	1755	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	157:e7ca05fa8600	1756	* @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1757	* CCR TSEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1758	* CCR VLCDEN LL_ADC_SetCommonPathInternalCh
AnnaBridge	157:e7ca05fa8600	1759	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1760	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1761	* @param PathInternal This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	1762	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	157:e7ca05fa8600	1763	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	157:e7ca05fa8600	1764	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1765	* @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
AnnaBridge	157:e7ca05fa8600	1766	*
AnnaBridge	157:e7ca05fa8600	1767	* (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1768	* @retval None
AnnaBridge	157:e7ca05fa8600	1769	*/
AnnaBridge	157:e7ca05fa8600	1770	__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
AnnaBridge	157:e7ca05fa8600	1771	{
AnnaBridge	157:e7ca05fa8600	1772	#if defined (ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	1773	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VLCDEN, PathInternal);
AnnaBridge	157:e7ca05fa8600	1774	#else
AnnaBridge	157:e7ca05fa8600	1775	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN, PathInternal);
AnnaBridge	157:e7ca05fa8600	1776	#endif
AnnaBridge	157:e7ca05fa8600	1777	}
AnnaBridge	157:e7ca05fa8600	1778
AnnaBridge	157:e7ca05fa8600	1779	/**
AnnaBridge	157:e7ca05fa8600	1780	* @brief Get parameter common to several ADC: measurement path to internal
AnnaBridge	157:e7ca05fa8600	1781	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	157:e7ca05fa8600	1782	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	1783	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	157:e7ca05fa8600	1784	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	157:e7ca05fa8600	1785	* @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1786	* CCR TSEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	157:e7ca05fa8600	1787	* CCR VLCDEN LL_ADC_GetCommonPathInternalCh
AnnaBridge	157:e7ca05fa8600	1788	* @param ADCxy_COMMON ADC common instance
AnnaBridge	157:e7ca05fa8600	1789	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	157:e7ca05fa8600	1790	* @retval Returned value can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	1791	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	157:e7ca05fa8600	1792	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	157:e7ca05fa8600	1793	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	1794	* @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
AnnaBridge	157:e7ca05fa8600	1795	*
AnnaBridge	157:e7ca05fa8600	1796	* (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	1797	*/
AnnaBridge	157:e7ca05fa8600	1798	__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	157:e7ca05fa8600	1799	{
AnnaBridge	157:e7ca05fa8600	1800	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	1801	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VLCDEN));
AnnaBridge	157:e7ca05fa8600	1802	#else
AnnaBridge	157:e7ca05fa8600	1803	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN));
AnnaBridge	157:e7ca05fa8600	1804	#endif
AnnaBridge	157:e7ca05fa8600	1805	}
AnnaBridge	157:e7ca05fa8600	1806
AnnaBridge	157:e7ca05fa8600	1807	/**
AnnaBridge	157:e7ca05fa8600	1808	* @}
AnnaBridge	157:e7ca05fa8600	1809	*/
AnnaBridge	157:e7ca05fa8600	1810
AnnaBridge	157:e7ca05fa8600	1811	/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
AnnaBridge	157:e7ca05fa8600	1812	* @{
AnnaBridge	157:e7ca05fa8600	1813	*/
AnnaBridge	157:e7ca05fa8600	1814
AnnaBridge	157:e7ca05fa8600	1815	/**
AnnaBridge	157:e7ca05fa8600	1816	* @brief Set ADC instance clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1817	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1818	* ADC state:
AnnaBridge	157:e7ca05fa8600	1819	* ADC must be disabled.
AnnaBridge	157:e7ca05fa8600	1820	* @rmtoll CFGR2 CKMODE LL_ADC_SetClock
AnnaBridge	157:e7ca05fa8600	1821	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1822	* @param ClockSource This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1823	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	157:e7ca05fa8600	1824	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	157:e7ca05fa8600	1825	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
AnnaBridge	157:e7ca05fa8600	1826	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	157:e7ca05fa8600	1827	*
AnnaBridge	157:e7ca05fa8600	1828	* (1) Asynchronous clock prescaler can be configured using
AnnaBridge	157:e7ca05fa8600	1829	* function @ref LL_ADC_SetCommonClock().\n
AnnaBridge	157:e7ca05fa8600	1830	* (2) Caution: This parameter has some clock ratio constraints:
AnnaBridge	157:e7ca05fa8600	1831	* This configuration must be enabled only if PCLK has a 50%
AnnaBridge	157:e7ca05fa8600	1832	* duty clock cycle (APB prescaler configured inside the RCC
AnnaBridge	157:e7ca05fa8600	1833	* must be bypassed and the system clock must by 50% duty
AnnaBridge	157:e7ca05fa8600	1834	* cycle).
AnnaBridge	157:e7ca05fa8600	1835	* Refer to reference manual.
AnnaBridge	157:e7ca05fa8600	1836	* @retval None
AnnaBridge	157:e7ca05fa8600	1837	*/
AnnaBridge	157:e7ca05fa8600	1838	__STATIC_INLINE void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
AnnaBridge	157:e7ca05fa8600	1839	{
AnnaBridge	157:e7ca05fa8600	1840	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource);
AnnaBridge	157:e7ca05fa8600	1841	}
AnnaBridge	157:e7ca05fa8600	1842
AnnaBridge	157:e7ca05fa8600	1843	/**
AnnaBridge	157:e7ca05fa8600	1844	* @brief Get ADC instance clock source and prescaler.
AnnaBridge	157:e7ca05fa8600	1845	* @rmtoll CFGR2 CKMODE LL_ADC_GetClock
AnnaBridge	157:e7ca05fa8600	1846	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1847	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1848	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	157:e7ca05fa8600	1849	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	157:e7ca05fa8600	1850	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
AnnaBridge	157:e7ca05fa8600	1851	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	157:e7ca05fa8600	1852	*
AnnaBridge	157:e7ca05fa8600	1853	* (1) Asynchronous clock prescaler can be retrieved using
AnnaBridge	157:e7ca05fa8600	1854	* function @ref LL_ADC_GetCommonClock().\n
AnnaBridge	157:e7ca05fa8600	1855	* (2) Caution: This parameter has some clock ratio constraints:
AnnaBridge	157:e7ca05fa8600	1856	* This configuration must be enabled only if PCLK has a 50%
AnnaBridge	157:e7ca05fa8600	1857	* duty clock cycle (APB prescaler configured inside the RCC
AnnaBridge	157:e7ca05fa8600	1858	* must be bypassed and the system clock must by 50% duty
AnnaBridge	157:e7ca05fa8600	1859	* cycle).
AnnaBridge	157:e7ca05fa8600	1860	* Refer to reference manual.
AnnaBridge	157:e7ca05fa8600	1861	*/
AnnaBridge	157:e7ca05fa8600	1862	__STATIC_INLINE uint32_t LL_ADC_GetClock(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1863	{
AnnaBridge	157:e7ca05fa8600	1864	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE));
AnnaBridge	157:e7ca05fa8600	1865	}
AnnaBridge	157:e7ca05fa8600	1866
AnnaBridge	157:e7ca05fa8600	1867	/**
AnnaBridge	157:e7ca05fa8600	1868	* @brief Set ADC calibration factor in the mode single-ended
AnnaBridge	157:e7ca05fa8600	1869	* or differential (for devices with differential mode available).
AnnaBridge	157:e7ca05fa8600	1870	* @note This function is intended to set calibration parameters
AnnaBridge	157:e7ca05fa8600	1871	* without having to perform a new calibration using
AnnaBridge	157:e7ca05fa8600	1872	* @ref LL_ADC_StartCalibration().
AnnaBridge	157:e7ca05fa8600	1873	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1874	* ADC state:
AnnaBridge	157:e7ca05fa8600	1875	* ADC must be enabled, without calibration on going, without conversion
AnnaBridge	157:e7ca05fa8600	1876	* on going on group regular.
AnnaBridge	157:e7ca05fa8600	1877	* @rmtoll CALFACT CALFACT LL_ADC_SetCalibrationFactor
AnnaBridge	157:e7ca05fa8600	1878	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1879	* @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	157:e7ca05fa8600	1880	* @retval None
AnnaBridge	157:e7ca05fa8600	1881	*/
AnnaBridge	157:e7ca05fa8600	1882	__STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t CalibrationFactor)
AnnaBridge	157:e7ca05fa8600	1883	{
AnnaBridge	157:e7ca05fa8600	1884	MODIFY_REG(ADCx->CALFACT,
AnnaBridge	157:e7ca05fa8600	1885	ADC_CALFACT_CALFACT,
AnnaBridge	157:e7ca05fa8600	1886	CalibrationFactor);
AnnaBridge	157:e7ca05fa8600	1887	}
AnnaBridge	157:e7ca05fa8600	1888
AnnaBridge	157:e7ca05fa8600	1889	/**
AnnaBridge	157:e7ca05fa8600	1890	* @brief Get ADC calibration factor in the mode single-ended
AnnaBridge	157:e7ca05fa8600	1891	* or differential (for devices with differential mode available).
AnnaBridge	157:e7ca05fa8600	1892	* @note Calibration factors are set by hardware after performing
AnnaBridge	157:e7ca05fa8600	1893	* a calibration run using function @ref LL_ADC_StartCalibration().
AnnaBridge	157:e7ca05fa8600	1894	* @rmtoll CALFACT CALFACT LL_ADC_GetCalibrationFactor
AnnaBridge	157:e7ca05fa8600	1895	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1896	* @retval Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	157:e7ca05fa8600	1897	*/
AnnaBridge	157:e7ca05fa8600	1898	__STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1899	{
AnnaBridge	157:e7ca05fa8600	1900	return (uint32_t)(READ_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT));
AnnaBridge	157:e7ca05fa8600	1901	}
AnnaBridge	157:e7ca05fa8600	1902
AnnaBridge	157:e7ca05fa8600	1903	/**
AnnaBridge	157:e7ca05fa8600	1904	* @brief Set ADC resolution.
AnnaBridge	157:e7ca05fa8600	1905	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1906	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1907	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1908	* ADC state:
AnnaBridge	157:e7ca05fa8600	1909	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	1910	* on group regular.
AnnaBridge	157:e7ca05fa8600	1911	* @rmtoll CFGR1 RES LL_ADC_SetResolution
AnnaBridge	157:e7ca05fa8600	1912	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1913	* @param Resolution This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1914	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1915	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1916	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1917	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1918	* @retval None
AnnaBridge	157:e7ca05fa8600	1919	*/
AnnaBridge	157:e7ca05fa8600	1920	__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
AnnaBridge	157:e7ca05fa8600	1921	{
AnnaBridge	157:e7ca05fa8600	1922	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);
AnnaBridge	157:e7ca05fa8600	1923	}
AnnaBridge	157:e7ca05fa8600	1924
AnnaBridge	157:e7ca05fa8600	1925	/**
AnnaBridge	157:e7ca05fa8600	1926	* @brief Get ADC resolution.
AnnaBridge	157:e7ca05fa8600	1927	* Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1928	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1929	* @rmtoll CFGR1 RES LL_ADC_GetResolution
AnnaBridge	157:e7ca05fa8600	1930	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1931	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1932	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	157:e7ca05fa8600	1933	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	157:e7ca05fa8600	1934	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	157:e7ca05fa8600	1935	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	157:e7ca05fa8600	1936	*/
AnnaBridge	157:e7ca05fa8600	1937	__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1938	{
AnnaBridge	157:e7ca05fa8600	1939	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));
AnnaBridge	157:e7ca05fa8600	1940	}
AnnaBridge	157:e7ca05fa8600	1941
AnnaBridge	157:e7ca05fa8600	1942	/**
AnnaBridge	157:e7ca05fa8600	1943	* @brief Set ADC conversion data alignment.
AnnaBridge	157:e7ca05fa8600	1944	* @note Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1945	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1946	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	1947	* ADC state:
AnnaBridge	157:e7ca05fa8600	1948	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	1949	* on group regular.
AnnaBridge	157:e7ca05fa8600	1950	* @rmtoll CFGR1 ALIGN LL_ADC_SetDataAlignment
AnnaBridge	157:e7ca05fa8600	1951	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1952	* @param DataAlignment This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1953	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	157:e7ca05fa8600	1954	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	157:e7ca05fa8600	1955	* @retval None
AnnaBridge	157:e7ca05fa8600	1956	*/
AnnaBridge	157:e7ca05fa8600	1957	__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
AnnaBridge	157:e7ca05fa8600	1958	{
AnnaBridge	157:e7ca05fa8600	1959	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);
AnnaBridge	157:e7ca05fa8600	1960	}
AnnaBridge	157:e7ca05fa8600	1961
AnnaBridge	157:e7ca05fa8600	1962	/**
AnnaBridge	157:e7ca05fa8600	1963	* @brief Get ADC conversion data alignment.
AnnaBridge	157:e7ca05fa8600	1964	* @note Refer to reference manual for alignments formats
AnnaBridge	157:e7ca05fa8600	1965	* dependencies to ADC resolutions.
AnnaBridge	157:e7ca05fa8600	1966	* @rmtoll CFGR1 ALIGN LL_ADC_GetDataAlignment
AnnaBridge	157:e7ca05fa8600	1967	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	1968	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	1969	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	157:e7ca05fa8600	1970	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	157:e7ca05fa8600	1971	*/
AnnaBridge	157:e7ca05fa8600	1972	__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	1973	{
AnnaBridge	157:e7ca05fa8600	1974	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));
AnnaBridge	157:e7ca05fa8600	1975	}
AnnaBridge	157:e7ca05fa8600	1976
AnnaBridge	157:e7ca05fa8600	1977	/**
AnnaBridge	157:e7ca05fa8600	1978	* @brief Set ADC low power mode.
AnnaBridge	157:e7ca05fa8600	1979	* @note Description of ADC low power modes:
AnnaBridge	157:e7ca05fa8600	1980	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	157:e7ca05fa8600	1981	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	157:e7ca05fa8600	1982	* in order to reduce power consumption.
AnnaBridge	157:e7ca05fa8600	1983	* New ADC conversion starts only when the previous
AnnaBridge	157:e7ca05fa8600	1984	* unitary conversion data (for ADC group regular)
AnnaBridge	157:e7ca05fa8600	1985	* has been retrieved by user software.
AnnaBridge	157:e7ca05fa8600	1986	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	157:e7ca05fa8600	1987	* other conversion.
AnnaBridge	157:e7ca05fa8600	1988	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	157:e7ca05fa8600	1989	* triggers to the speed of the software that reads the data.
AnnaBridge	157:e7ca05fa8600	1990	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	157:e7ca05fa8600	1991	* applications.
AnnaBridge	157:e7ca05fa8600	1992	* How to use this low power mode:
AnnaBridge	157:e7ca05fa8600	1993	* - Do not use with interruption or DMA since these modes
AnnaBridge	157:e7ca05fa8600	1994	* have to clear immediately the EOC flag to free the
AnnaBridge	157:e7ca05fa8600	1995	* IRQ vector sequencer.
AnnaBridge	157:e7ca05fa8600	1996	* - Do use with polling: 1. Start conversion,
AnnaBridge	157:e7ca05fa8600	1997	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	157:e7ca05fa8600	1998	* conversion to ensure that conversion is completed and
AnnaBridge	157:e7ca05fa8600	1999	* retrieve ADC conversion data. This will trig another
AnnaBridge	157:e7ca05fa8600	2000	* ADC conversion start.
AnnaBridge	157:e7ca05fa8600	2001	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	157:e7ca05fa8600	2002	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	157:e7ca05fa8600	2003	* the ADC automatically powers-off after a conversion and
AnnaBridge	157:e7ca05fa8600	2004	* automatically wakes up when a new conversion is triggered
AnnaBridge	157:e7ca05fa8600	2005	* (with startup time between trigger and start of sampling).
AnnaBridge	157:e7ca05fa8600	2006	* This feature can be combined with low power mode "auto wait".
AnnaBridge	157:e7ca05fa8600	2007	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	157:e7ca05fa8600	2008	* is corresponding to previous ADC conversion start, independently
AnnaBridge	157:e7ca05fa8600	2009	* of delay during which ADC was idle.
AnnaBridge	157:e7ca05fa8600	2010	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	157:e7ca05fa8600	2011	* correspond to the current voltage level on the selected
AnnaBridge	157:e7ca05fa8600	2012	* ADC channel.
AnnaBridge	157:e7ca05fa8600	2013	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2014	* ADC state:
AnnaBridge	157:e7ca05fa8600	2015	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2016	* on group regular.
AnnaBridge	157:e7ca05fa8600	2017	* @rmtoll CFGR1 WAIT LL_ADC_SetLowPowerMode\n
AnnaBridge	157:e7ca05fa8600	2018	* CFGR1 AUTOFF LL_ADC_SetLowPowerMode
AnnaBridge	157:e7ca05fa8600	2019	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2020	* @param LowPowerMode This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2021	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	157:e7ca05fa8600	2022	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	157:e7ca05fa8600	2023	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2024	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2025	* @retval None
AnnaBridge	157:e7ca05fa8600	2026	*/
AnnaBridge	157:e7ca05fa8600	2027	__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
AnnaBridge	157:e7ca05fa8600	2028	{
AnnaBridge	157:e7ca05fa8600	2029	MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF), LowPowerMode);
AnnaBridge	157:e7ca05fa8600	2030	}
AnnaBridge	157:e7ca05fa8600	2031
AnnaBridge	157:e7ca05fa8600	2032	/**
AnnaBridge	157:e7ca05fa8600	2033	* @brief Get ADC low power mode:
AnnaBridge	157:e7ca05fa8600	2034	* @note Description of ADC low power modes:
AnnaBridge	157:e7ca05fa8600	2035	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	157:e7ca05fa8600	2036	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	157:e7ca05fa8600	2037	* in order to reduce power consumption.
AnnaBridge	157:e7ca05fa8600	2038	* New ADC conversion starts only when the previous
AnnaBridge	157:e7ca05fa8600	2039	* unitary conversion data (for ADC group regular)
AnnaBridge	157:e7ca05fa8600	2040	* has been retrieved by user software.
AnnaBridge	157:e7ca05fa8600	2041	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	157:e7ca05fa8600	2042	* other conversion.
AnnaBridge	157:e7ca05fa8600	2043	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	157:e7ca05fa8600	2044	* triggers to the speed of the software that reads the data.
AnnaBridge	157:e7ca05fa8600	2045	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	157:e7ca05fa8600	2046	* applications.
AnnaBridge	157:e7ca05fa8600	2047	* How to use this low power mode:
AnnaBridge	157:e7ca05fa8600	2048	* - Do not use with interruption or DMA since these modes
AnnaBridge	157:e7ca05fa8600	2049	* have to clear immediately the EOC flag to free the
AnnaBridge	157:e7ca05fa8600	2050	* IRQ vector sequencer.
AnnaBridge	157:e7ca05fa8600	2051	* - Do use with polling: 1. Start conversion,
AnnaBridge	157:e7ca05fa8600	2052	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	157:e7ca05fa8600	2053	* conversion to ensure that conversion is completed and
AnnaBridge	157:e7ca05fa8600	2054	* retrieve ADC conversion data. This will trig another
AnnaBridge	157:e7ca05fa8600	2055	* ADC conversion start.
AnnaBridge	157:e7ca05fa8600	2056	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	157:e7ca05fa8600	2057	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	157:e7ca05fa8600	2058	* the ADC automatically powers-off after a conversion and
AnnaBridge	157:e7ca05fa8600	2059	* automatically wakes up when a new conversion is triggered
AnnaBridge	157:e7ca05fa8600	2060	* (with startup time between trigger and start of sampling).
AnnaBridge	157:e7ca05fa8600	2061	* This feature can be combined with low power mode "auto wait".
AnnaBridge	157:e7ca05fa8600	2062	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	157:e7ca05fa8600	2063	* is corresponding to previous ADC conversion start, independently
AnnaBridge	157:e7ca05fa8600	2064	* of delay during which ADC was idle.
AnnaBridge	157:e7ca05fa8600	2065	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	157:e7ca05fa8600	2066	* correspond to the current voltage level on the selected
AnnaBridge	157:e7ca05fa8600	2067	* ADC channel.
AnnaBridge	157:e7ca05fa8600	2068	* @rmtoll CFGR1 WAIT LL_ADC_GetLowPowerMode\n
AnnaBridge	157:e7ca05fa8600	2069	* CFGR1 AUTOFF LL_ADC_GetLowPowerMode
AnnaBridge	157:e7ca05fa8600	2070	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2071	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2072	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	157:e7ca05fa8600	2073	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	157:e7ca05fa8600	2074	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2075	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	157:e7ca05fa8600	2076	*/
AnnaBridge	157:e7ca05fa8600	2077	__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2078	{
AnnaBridge	157:e7ca05fa8600	2079	return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF)));
AnnaBridge	157:e7ca05fa8600	2080	}
AnnaBridge	157:e7ca05fa8600	2081
AnnaBridge	157:e7ca05fa8600	2082	/**
AnnaBridge	157:e7ca05fa8600	2083	* @brief Set sampling time common to a group of channels.
AnnaBridge	157:e7ca05fa8600	2084	* @note Unit: ADC clock cycles.
AnnaBridge	157:e7ca05fa8600	2085	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	157:e7ca05fa8600	2086	* Sampling time common to all channels.
AnnaBridge	157:e7ca05fa8600	2087	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	157:e7ca05fa8600	2088	* @note In case of internal channel (VrefInt, TempSensor, ...) to be
AnnaBridge	157:e7ca05fa8600	2089	* converted:
AnnaBridge	157:e7ca05fa8600	2090	* sampling time constraints must be respected (sampling time can be
AnnaBridge	157:e7ca05fa8600	2091	* adjusted in function of ADC clock frequency and sampling time
AnnaBridge	157:e7ca05fa8600	2092	* setting).
AnnaBridge	157:e7ca05fa8600	2093	* Refer to device datasheet for timings values (parameters TS_vrefint,
AnnaBridge	157:e7ca05fa8600	2094	* TS_temp, ...).
AnnaBridge	157:e7ca05fa8600	2095	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	157:e7ca05fa8600	2096	* On this STM32 serie, ADC processing time is:
AnnaBridge	157:e7ca05fa8600	2097	* - 12.5 ADC clock cycles at ADC resolution 12 bits
AnnaBridge	157:e7ca05fa8600	2098	* - 10.5 ADC clock cycles at ADC resolution 10 bits
AnnaBridge	157:e7ca05fa8600	2099	* - 8.5 ADC clock cycles at ADC resolution 8 bits
AnnaBridge	157:e7ca05fa8600	2100	* - 6.5 ADC clock cycles at ADC resolution 6 bits
AnnaBridge	157:e7ca05fa8600	2101	* @note In case of ADC conversion of internal channel (VrefInt,
AnnaBridge	157:e7ca05fa8600	2102	* temperature sensor, ...), a sampling time minimum value
AnnaBridge	157:e7ca05fa8600	2103	* is required.
AnnaBridge	157:e7ca05fa8600	2104	* Refer to device datasheet.
AnnaBridge	157:e7ca05fa8600	2105	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2106	* ADC state:
AnnaBridge	157:e7ca05fa8600	2107	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2108	* on group regular.
AnnaBridge	157:e7ca05fa8600	2109	* @rmtoll SMPR SMP LL_ADC_SetSamplingTimeCommonChannels
AnnaBridge	157:e7ca05fa8600	2110	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2111	* @param SamplingTime This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2112	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	157:e7ca05fa8600	2113	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	157:e7ca05fa8600	2114	* @arg @ref LL_ADC_SAMPLINGTIME_13CYCLES_5
AnnaBridge	157:e7ca05fa8600	2115	* @arg @ref LL_ADC_SAMPLINGTIME_28CYCLES_5
AnnaBridge	157:e7ca05fa8600	2116	* @arg @ref LL_ADC_SAMPLINGTIME_41CYCLES_5
AnnaBridge	157:e7ca05fa8600	2117	* @arg @ref LL_ADC_SAMPLINGTIME_55CYCLES_5
AnnaBridge	157:e7ca05fa8600	2118	* @arg @ref LL_ADC_SAMPLINGTIME_71CYCLES_5
AnnaBridge	157:e7ca05fa8600	2119	* @arg @ref LL_ADC_SAMPLINGTIME_239CYCLES_5
AnnaBridge	157:e7ca05fa8600	2120	* @retval None
AnnaBridge	157:e7ca05fa8600	2121	*/
AnnaBridge	157:e7ca05fa8600	2122	__STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTime)
AnnaBridge	157:e7ca05fa8600	2123	{
AnnaBridge	157:e7ca05fa8600	2124	MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime);
AnnaBridge	157:e7ca05fa8600	2125	}
AnnaBridge	157:e7ca05fa8600	2126
AnnaBridge	157:e7ca05fa8600	2127	/**
AnnaBridge	157:e7ca05fa8600	2128	* @brief Get sampling time common to a group of channels.
AnnaBridge	157:e7ca05fa8600	2129	* @note Unit: ADC clock cycles.
AnnaBridge	157:e7ca05fa8600	2130	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	157:e7ca05fa8600	2131	* Sampling time common to all channels.
AnnaBridge	157:e7ca05fa8600	2132	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	157:e7ca05fa8600	2133	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	157:e7ca05fa8600	2134	* Refer to reference manual for ADC processing time of
AnnaBridge	157:e7ca05fa8600	2135	* this STM32 serie.
AnnaBridge	157:e7ca05fa8600	2136	* @rmtoll SMPR SMP LL_ADC_GetSamplingTimeCommonChannels
AnnaBridge	157:e7ca05fa8600	2137	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2138	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2139	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	157:e7ca05fa8600	2140	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	157:e7ca05fa8600	2141	* @arg @ref LL_ADC_SAMPLINGTIME_13CYCLES_5
AnnaBridge	157:e7ca05fa8600	2142	* @arg @ref LL_ADC_SAMPLINGTIME_28CYCLES_5
AnnaBridge	157:e7ca05fa8600	2143	* @arg @ref LL_ADC_SAMPLINGTIME_41CYCLES_5
AnnaBridge	157:e7ca05fa8600	2144	* @arg @ref LL_ADC_SAMPLINGTIME_55CYCLES_5
AnnaBridge	157:e7ca05fa8600	2145	* @arg @ref LL_ADC_SAMPLINGTIME_71CYCLES_5
AnnaBridge	157:e7ca05fa8600	2146	* @arg @ref LL_ADC_SAMPLINGTIME_239CYCLES_5
AnnaBridge	157:e7ca05fa8600	2147	*/
AnnaBridge	157:e7ca05fa8600	2148	__STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2149	{
AnnaBridge	157:e7ca05fa8600	2150	return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP));
AnnaBridge	157:e7ca05fa8600	2151	}
AnnaBridge	157:e7ca05fa8600	2152
AnnaBridge	157:e7ca05fa8600	2153	/**
AnnaBridge	157:e7ca05fa8600	2154	* @}
AnnaBridge	157:e7ca05fa8600	2155	*/
AnnaBridge	157:e7ca05fa8600	2156
AnnaBridge	157:e7ca05fa8600	2157	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
AnnaBridge	157:e7ca05fa8600	2158	* @{
AnnaBridge	157:e7ca05fa8600	2159	*/
AnnaBridge	157:e7ca05fa8600	2160
AnnaBridge	157:e7ca05fa8600	2161	/**
AnnaBridge	157:e7ca05fa8600	2162	* @brief Set ADC group regular conversion trigger source:
AnnaBridge	157:e7ca05fa8600	2163	* internal (SW start) or from external IP (timer event,
AnnaBridge	157:e7ca05fa8600	2164	* external interrupt line).
AnnaBridge	157:e7ca05fa8600	2165	* @note On this STM32 serie, setting trigger source to external trigger
AnnaBridge	157:e7ca05fa8600	2166	* also set trigger polarity to rising edge
AnnaBridge	157:e7ca05fa8600	2167	* (default setting for compatibility with some ADC on other
AnnaBridge	157:e7ca05fa8600	2168	* STM32 families having this setting set by HW default value).
AnnaBridge	157:e7ca05fa8600	2169	* In case of need to modify trigger edge, use
AnnaBridge	157:e7ca05fa8600	2170	* function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	157:e7ca05fa8600	2171	* @note Availability of parameters of trigger sources from timer
AnnaBridge	157:e7ca05fa8600	2172	* depends on timers availability on the selected device.
AnnaBridge	157:e7ca05fa8600	2173	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2174	* ADC state:
AnnaBridge	157:e7ca05fa8600	2175	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2176	* on group regular.
AnnaBridge	157:e7ca05fa8600	2177	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_SetTriggerSource\n
AnnaBridge	157:e7ca05fa8600	2178	* CFGR1 EXTEN LL_ADC_REG_SetTriggerSource
AnnaBridge	157:e7ca05fa8600	2179	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2180	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2181	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	157:e7ca05fa8600	2182	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	157:e7ca05fa8600	2183	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
AnnaBridge	157:e7ca05fa8600	2184	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	157:e7ca05fa8600	2185	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
AnnaBridge	157:e7ca05fa8600	2186	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
AnnaBridge	157:e7ca05fa8600	2187	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
AnnaBridge	157:e7ca05fa8600	2188	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	157:e7ca05fa8600	2189	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	157:e7ca05fa8600	2190	*
AnnaBridge	157:e7ca05fa8600	2191	* (*) value not defined in all devices
AnnaBridge	157:e7ca05fa8600	2192	* @retval None
AnnaBridge	157:e7ca05fa8600	2193	*/
AnnaBridge	157:e7ca05fa8600	2194	__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	157:e7ca05fa8600	2195	{
AnnaBridge	157:e7ca05fa8600	2196	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN \| ADC_CFGR1_EXTSEL, TriggerSource);
AnnaBridge	157:e7ca05fa8600	2197	}
AnnaBridge	157:e7ca05fa8600	2198
AnnaBridge	157:e7ca05fa8600	2199	/**
AnnaBridge	157:e7ca05fa8600	2200	* @brief Get ADC group regular conversion trigger source:
AnnaBridge	157:e7ca05fa8600	2201	* internal (SW start) or from external IP (timer event,
AnnaBridge	157:e7ca05fa8600	2202	* external interrupt line).
AnnaBridge	157:e7ca05fa8600	2203	* @note To determine whether group regular trigger source is
AnnaBridge	157:e7ca05fa8600	2204	* internal (SW start) or external, without detail
AnnaBridge	157:e7ca05fa8600	2205	* of which peripheral is selected as external trigger,
AnnaBridge	157:e7ca05fa8600	2206	* (equivalent to
AnnaBridge	157:e7ca05fa8600	2207	* "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
AnnaBridge	157:e7ca05fa8600	2208	* use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
AnnaBridge	157:e7ca05fa8600	2209	* @note Availability of parameters of trigger sources from timer
AnnaBridge	157:e7ca05fa8600	2210	* depends on timers availability on the selected device.
AnnaBridge	157:e7ca05fa8600	2211	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_GetTriggerSource\n
AnnaBridge	157:e7ca05fa8600	2212	* CFGR1 EXTEN LL_ADC_REG_GetTriggerSource
AnnaBridge	157:e7ca05fa8600	2213	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2214	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2215	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	157:e7ca05fa8600	2216	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	157:e7ca05fa8600	2217	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
AnnaBridge	157:e7ca05fa8600	2218	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	157:e7ca05fa8600	2219	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
AnnaBridge	157:e7ca05fa8600	2220	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
AnnaBridge	157:e7ca05fa8600	2221	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
AnnaBridge	157:e7ca05fa8600	2222	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	157:e7ca05fa8600	2223	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	157:e7ca05fa8600	2224	*
AnnaBridge	157:e7ca05fa8600	2225	* (*) value not defined in all devices
AnnaBridge	157:e7ca05fa8600	2226	*/
AnnaBridge	157:e7ca05fa8600	2227	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2228	{
AnnaBridge	157:e7ca05fa8600	2229	register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL \| ADC_CFGR1_EXTEN);
AnnaBridge	157:e7ca05fa8600	2230
AnnaBridge	157:e7ca05fa8600	2231	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
AnnaBridge	157:e7ca05fa8600	2232	/* corresponding to ADC_CFGR1_EXTEN {0; 1; 2; 3}. */
AnnaBridge	157:e7ca05fa8600	2233	register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
AnnaBridge	157:e7ca05fa8600	2234
AnnaBridge	157:e7ca05fa8600	2235	/* Set bitfield corresponding to ADC_CFGR1_EXTEN and ADC_CFGR1_EXTSEL */
AnnaBridge	157:e7ca05fa8600	2236	/* to match with triggers literals definition. */
AnnaBridge	157:e7ca05fa8600	2237	return ((TriggerSource
AnnaBridge	157:e7ca05fa8600	2238	& (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR1_EXTSEL)
AnnaBridge	157:e7ca05fa8600	2239	\| ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN)
AnnaBridge	157:e7ca05fa8600	2240	);
AnnaBridge	157:e7ca05fa8600	2241	}
AnnaBridge	157:e7ca05fa8600	2242
AnnaBridge	157:e7ca05fa8600	2243	/**
AnnaBridge	157:e7ca05fa8600	2244	* @brief Get ADC group regular conversion trigger source internal (SW start)
AnnaBridge	157:e7ca05fa8600	2245	or external.
AnnaBridge	157:e7ca05fa8600	2246	* @note In case of group regular trigger source set to external trigger,
AnnaBridge	157:e7ca05fa8600	2247	* to determine which peripheral is selected as external trigger,
AnnaBridge	157:e7ca05fa8600	2248	* use function @ref LL_ADC_REG_GetTriggerSource().
AnnaBridge	157:e7ca05fa8600	2249	* @rmtoll CFGR1 EXTEN LL_ADC_REG_IsTriggerSourceSWStart
AnnaBridge	157:e7ca05fa8600	2250	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2251	* @retval - 0 trigger source external trigger
AnnaBridge	157:e7ca05fa8600	2252	* - 1 trigger source SW start.
AnnaBridge	157:e7ca05fa8600	2253	*/
AnnaBridge	157:e7ca05fa8600	2254	__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2255	{
AnnaBridge	157:e7ca05fa8600	2256	return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN));
AnnaBridge	157:e7ca05fa8600	2257	}
AnnaBridge	157:e7ca05fa8600	2258
AnnaBridge	157:e7ca05fa8600	2259	/**
AnnaBridge	157:e7ca05fa8600	2260	* @brief Set ADC group regular conversion trigger polarity.
AnnaBridge	157:e7ca05fa8600	2261	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	157:e7ca05fa8600	2262	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2263	* ADC state:
AnnaBridge	157:e7ca05fa8600	2264	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2265	* on group regular.
AnnaBridge	157:e7ca05fa8600	2266	* @rmtoll CFGR1 EXTEN LL_ADC_REG_SetTriggerEdge
AnnaBridge	157:e7ca05fa8600	2267	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2268	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2269	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	157:e7ca05fa8600	2270	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	157:e7ca05fa8600	2271	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	157:e7ca05fa8600	2272	* @retval None
AnnaBridge	157:e7ca05fa8600	2273	*/
AnnaBridge	157:e7ca05fa8600	2274	__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
AnnaBridge	157:e7ca05fa8600	2275	{
AnnaBridge	157:e7ca05fa8600	2276	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);
AnnaBridge	157:e7ca05fa8600	2277	}
AnnaBridge	157:e7ca05fa8600	2278
AnnaBridge	157:e7ca05fa8600	2279	/**
AnnaBridge	157:e7ca05fa8600	2280	* @brief Get ADC group regular conversion trigger polarity.
AnnaBridge	157:e7ca05fa8600	2281	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	157:e7ca05fa8600	2282	* @rmtoll CFGR1 EXTEN LL_ADC_REG_GetTriggerEdge
AnnaBridge	157:e7ca05fa8600	2283	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2284	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2285	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	157:e7ca05fa8600	2286	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	157:e7ca05fa8600	2287	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	157:e7ca05fa8600	2288	*/
AnnaBridge	157:e7ca05fa8600	2289	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2290	{
AnnaBridge	157:e7ca05fa8600	2291	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));
AnnaBridge	157:e7ca05fa8600	2292	}
AnnaBridge	157:e7ca05fa8600	2293
AnnaBridge	157:e7ca05fa8600	2294
AnnaBridge	157:e7ca05fa8600	2295	/**
AnnaBridge	157:e7ca05fa8600	2296	* @brief Set ADC group regular sequencer scan direction.
AnnaBridge	157:e7ca05fa8600	2297	* @note On some other STM32 families, this setting is not available and
AnnaBridge	157:e7ca05fa8600	2298	* the default scan direction is forward.
AnnaBridge	157:e7ca05fa8600	2299	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2300	* ADC state:
AnnaBridge	157:e7ca05fa8600	2301	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2302	* on group regular.
AnnaBridge	157:e7ca05fa8600	2303	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_SetSequencerScanDirection
AnnaBridge	157:e7ca05fa8600	2304	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2305	* @param ScanDirection This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2306	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	157:e7ca05fa8600	2307	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	157:e7ca05fa8600	2308	* @retval None
AnnaBridge	157:e7ca05fa8600	2309	*/
AnnaBridge	157:e7ca05fa8600	2310	__STATIC_INLINE void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection)
AnnaBridge	157:e7ca05fa8600	2311	{
AnnaBridge	157:e7ca05fa8600	2312	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);
AnnaBridge	157:e7ca05fa8600	2313	}
AnnaBridge	157:e7ca05fa8600	2314
AnnaBridge	157:e7ca05fa8600	2315	/**
AnnaBridge	157:e7ca05fa8600	2316	* @brief Get ADC group regular sequencer scan direction.
AnnaBridge	157:e7ca05fa8600	2317	* @note On some other STM32 families, this setting is not available and
AnnaBridge	157:e7ca05fa8600	2318	* the default scan direction is forward.
AnnaBridge	157:e7ca05fa8600	2319	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_GetSequencerScanDirection
AnnaBridge	157:e7ca05fa8600	2320	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2321	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2322	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	157:e7ca05fa8600	2323	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	157:e7ca05fa8600	2324	*/
AnnaBridge	157:e7ca05fa8600	2325	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerScanDirection(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2326	{
AnnaBridge	157:e7ca05fa8600	2327	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));
AnnaBridge	157:e7ca05fa8600	2328	}
AnnaBridge	157:e7ca05fa8600	2329
AnnaBridge	157:e7ca05fa8600	2330	/**
AnnaBridge	157:e7ca05fa8600	2331	* @brief Set ADC group regular sequencer discontinuous mode:
AnnaBridge	157:e7ca05fa8600	2332	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	157:e7ca05fa8600	2333	* number of ranks.
AnnaBridge	157:e7ca05fa8600	2334	* @note It is not possible to enable both ADC group regular
AnnaBridge	157:e7ca05fa8600	2335	* continuous mode and sequencer discontinuous mode.
AnnaBridge	157:e7ca05fa8600	2336	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2337	* ADC state:
AnnaBridge	157:e7ca05fa8600	2338	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2339	* on group regular.
AnnaBridge	157:e7ca05fa8600	2340	* @rmtoll CFGR1 DISCEN LL_ADC_REG_SetSequencerDiscont\n
AnnaBridge	157:e7ca05fa8600	2341	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2342	* @param SeqDiscont This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2343	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	157:e7ca05fa8600	2344	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	157:e7ca05fa8600	2345	* @retval None
AnnaBridge	157:e7ca05fa8600	2346	*/
AnnaBridge	157:e7ca05fa8600	2347	__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
AnnaBridge	157:e7ca05fa8600	2348	{
AnnaBridge	157:e7ca05fa8600	2349	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);
AnnaBridge	157:e7ca05fa8600	2350	}
AnnaBridge	157:e7ca05fa8600	2351
AnnaBridge	157:e7ca05fa8600	2352	/**
AnnaBridge	157:e7ca05fa8600	2353	* @brief Get ADC group regular sequencer discontinuous mode:
AnnaBridge	157:e7ca05fa8600	2354	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	157:e7ca05fa8600	2355	* number of ranks.
AnnaBridge	157:e7ca05fa8600	2356	* @rmtoll CFGR1 DISCEN LL_ADC_REG_GetSequencerDiscont\n
AnnaBridge	157:e7ca05fa8600	2357	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2358	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2359	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	157:e7ca05fa8600	2360	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	157:e7ca05fa8600	2361	*/
AnnaBridge	157:e7ca05fa8600	2362	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2363	{
AnnaBridge	157:e7ca05fa8600	2364	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));
AnnaBridge	157:e7ca05fa8600	2365	}
AnnaBridge	157:e7ca05fa8600	2366
AnnaBridge	157:e7ca05fa8600	2367	/**
AnnaBridge	157:e7ca05fa8600	2368	* @brief Set ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2369	* channel number.
AnnaBridge	157:e7ca05fa8600	2370	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2371	* - Channels ordering into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2372	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2373	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2374	* - Set channels selected by overwriting the current sequencer
AnnaBridge	157:e7ca05fa8600	2375	* configuration.
AnnaBridge	157:e7ca05fa8600	2376	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2377	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2378	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2379	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2380	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2381	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2382	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2383	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2384	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2385	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2386	* ADC state:
AnnaBridge	157:e7ca05fa8600	2387	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2388	* on group regular.
AnnaBridge	157:e7ca05fa8600	2389	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	2390	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2391	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2392	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2393	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2394	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2395	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2396	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2397	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2398	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2399	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2400	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2401	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2402	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2403	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2404	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2405	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2406	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2407	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2408	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2409	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChannels
AnnaBridge	157:e7ca05fa8600	2410	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2411	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2412	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2413	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2414	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2415	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2416	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2417	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2418	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2419	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2420	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2421	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2422	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2423	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2424	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2425	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2426	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2427	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2428	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2429	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2430	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2431	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2432	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2433	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2434	*
AnnaBridge	157:e7ca05fa8600	2435	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2436	* @retval None
AnnaBridge	157:e7ca05fa8600	2437	*/
AnnaBridge	157:e7ca05fa8600	2438	__STATIC_INLINE void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	157:e7ca05fa8600	2439	{
AnnaBridge	157:e7ca05fa8600	2440	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	157:e7ca05fa8600	2441	/* other bits reserved for other purpose. */
AnnaBridge	157:e7ca05fa8600	2442	WRITE_REG(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	157:e7ca05fa8600	2443	}
AnnaBridge	157:e7ca05fa8600	2444
AnnaBridge	157:e7ca05fa8600	2445	/**
AnnaBridge	157:e7ca05fa8600	2446	* @brief Add channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2447	* channel number.
AnnaBridge	157:e7ca05fa8600	2448	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2449	* - Channels ordering into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2450	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2451	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2452	* - Set channels selected by adding them to the current sequencer
AnnaBridge	157:e7ca05fa8600	2453	* configuration.
AnnaBridge	157:e7ca05fa8600	2454	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2455	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2456	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2457	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2458	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2459	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2460	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2461	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2462	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2463	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2464	* ADC state:
AnnaBridge	157:e7ca05fa8600	2465	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2466	* on group regular.
AnnaBridge	157:e7ca05fa8600	2467	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	2468	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2469	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2470	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2471	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2472	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2473	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2474	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2475	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2476	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2477	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2478	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2479	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2480	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2481	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2482	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2483	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2484	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2485	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2486	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	157:e7ca05fa8600	2487	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChAdd
AnnaBridge	157:e7ca05fa8600	2488	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2489	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2490	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2491	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2492	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2493	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2494	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2495	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2496	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2497	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2498	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2499	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2500	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2501	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2502	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2503	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2504	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2505	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2506	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2507	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2508	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2509	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2510	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2511	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2512	*
AnnaBridge	157:e7ca05fa8600	2513	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2514	* @retval None
AnnaBridge	157:e7ca05fa8600	2515	*/
AnnaBridge	157:e7ca05fa8600	2516	__STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	157:e7ca05fa8600	2517	{
AnnaBridge	157:e7ca05fa8600	2518	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	157:e7ca05fa8600	2519	/* other bits reserved for other purpose. */
AnnaBridge	157:e7ca05fa8600	2520	SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	157:e7ca05fa8600	2521	}
AnnaBridge	157:e7ca05fa8600	2522
AnnaBridge	157:e7ca05fa8600	2523	/**
AnnaBridge	157:e7ca05fa8600	2524	* @brief Remove channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2525	* channel number.
AnnaBridge	157:e7ca05fa8600	2526	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2527	* - Channels ordering into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2528	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2529	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2530	* - Set channels selected by removing them to the current sequencer
AnnaBridge	157:e7ca05fa8600	2531	* configuration.
AnnaBridge	157:e7ca05fa8600	2532	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2533	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2534	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2535	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2536	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2537	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2538	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2539	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2540	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2541	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2542	* ADC state:
AnnaBridge	157:e7ca05fa8600	2543	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2544	* on group regular.
AnnaBridge	157:e7ca05fa8600	2545	* @note One or several values can be selected.
AnnaBridge	157:e7ca05fa8600	2546	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2547	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2548	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2549	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2550	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2551	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2552	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2553	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2554	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2555	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2556	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2557	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2558	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2559	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2560	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2561	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2562	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2563	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2564	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	157:e7ca05fa8600	2565	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChRem
AnnaBridge	157:e7ca05fa8600	2566	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2567	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2568	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2569	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2570	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2571	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2572	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2573	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2574	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2575	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2576	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2577	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2578	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2579	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2580	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2581	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2582	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2583	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2584	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2585	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2586	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2587	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2588	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2589	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2590	*
AnnaBridge	157:e7ca05fa8600	2591	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2592	* @retval None
AnnaBridge	157:e7ca05fa8600	2593	*/
AnnaBridge	157:e7ca05fa8600	2594	__STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	157:e7ca05fa8600	2595	{
AnnaBridge	157:e7ca05fa8600	2596	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	157:e7ca05fa8600	2597	/* other bits reserved for other purpose. */
AnnaBridge	157:e7ca05fa8600	2598	CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	157:e7ca05fa8600	2599	}
AnnaBridge	157:e7ca05fa8600	2600
AnnaBridge	157:e7ca05fa8600	2601	/**
AnnaBridge	157:e7ca05fa8600	2602	* @brief Get ADC group regular sequence: channel on rank corresponding to
AnnaBridge	157:e7ca05fa8600	2603	* channel number.
AnnaBridge	157:e7ca05fa8600	2604	* @note This function performs:
AnnaBridge	157:e7ca05fa8600	2605	* - Channels order reading into each rank of scan sequence:
AnnaBridge	157:e7ca05fa8600	2606	* rank of each channel is fixed by channel HW number
AnnaBridge	157:e7ca05fa8600	2607	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	157:e7ca05fa8600	2608	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	157:e7ca05fa8600	2609	* not fully configurable: sequencer length and each rank
AnnaBridge	157:e7ca05fa8600	2610	* affectation to a channel are fixed by channel HW number.
AnnaBridge	157:e7ca05fa8600	2611	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	157:e7ca05fa8600	2612	* Refer to device datasheet for channels availability.
AnnaBridge	157:e7ca05fa8600	2613	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	157:e7ca05fa8600	2614	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	157:e7ca05fa8600	2615	* enabled separately.
AnnaBridge	157:e7ca05fa8600	2616	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	157:e7ca05fa8600	2617	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2618	* ADC state:
AnnaBridge	157:e7ca05fa8600	2619	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2620	* on group regular.
AnnaBridge	157:e7ca05fa8600	2621	* @note One or several values can be retrieved.
AnnaBridge	157:e7ca05fa8600	2622	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	157:e7ca05fa8600	2623	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2624	* CHSELR CHSEL1 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2625	* CHSELR CHSEL2 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2626	* CHSELR CHSEL3 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2627	* CHSELR CHSEL4 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2628	* CHSELR CHSEL5 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2629	* CHSELR CHSEL6 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2630	* CHSELR CHSEL7 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2631	* CHSELR CHSEL8 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2632	* CHSELR CHSEL9 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2633	* CHSELR CHSEL10 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2634	* CHSELR CHSEL11 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2635	* CHSELR CHSEL12 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2636	* CHSELR CHSEL13 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2637	* CHSELR CHSEL14 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2638	* CHSELR CHSEL15 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2639	* CHSELR CHSEL16 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2640	* CHSELR CHSEL17 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	157:e7ca05fa8600	2641	* CHSELR CHSEL18 LL_ADC_REG_GetSequencerChannels
AnnaBridge	157:e7ca05fa8600	2642	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2643	* @retval Returned value can be a combination of the following values:
AnnaBridge	157:e7ca05fa8600	2644	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	157:e7ca05fa8600	2645	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	157:e7ca05fa8600	2646	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	157:e7ca05fa8600	2647	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	157:e7ca05fa8600	2648	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	157:e7ca05fa8600	2649	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	157:e7ca05fa8600	2650	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	157:e7ca05fa8600	2651	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	157:e7ca05fa8600	2652	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	157:e7ca05fa8600	2653	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	157:e7ca05fa8600	2654	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	157:e7ca05fa8600	2655	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	157:e7ca05fa8600	2656	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	157:e7ca05fa8600	2657	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	157:e7ca05fa8600	2658	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	157:e7ca05fa8600	2659	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	157:e7ca05fa8600	2660	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	157:e7ca05fa8600	2661	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	157:e7ca05fa8600	2662	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	157:e7ca05fa8600	2663	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	157:e7ca05fa8600	2664	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	157:e7ca05fa8600	2665	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	157:e7ca05fa8600	2666	*
AnnaBridge	157:e7ca05fa8600	2667	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2668	*/
AnnaBridge	157:e7ca05fa8600	2669	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerChannels(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2670	{
AnnaBridge	157:e7ca05fa8600	2671	register uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL);
AnnaBridge	157:e7ca05fa8600	2672
AnnaBridge	157:e7ca05fa8600	2673	return ( (((ChannelsBitfield & ADC_CHSELR_CHSEL0) >> ADC_CHSELR_CHSEL0_BITOFFSET_POS) * LL_ADC_CHANNEL_0)
AnnaBridge	157:e7ca05fa8600	2674	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL1) >> ADC_CHSELR_CHSEL1_BITOFFSET_POS) * LL_ADC_CHANNEL_1)
AnnaBridge	157:e7ca05fa8600	2675	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL2) >> ADC_CHSELR_CHSEL2_BITOFFSET_POS) * LL_ADC_CHANNEL_2)
AnnaBridge	157:e7ca05fa8600	2676	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL3) >> ADC_CHSELR_CHSEL3_BITOFFSET_POS) * LL_ADC_CHANNEL_3)
AnnaBridge	157:e7ca05fa8600	2677	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL4) >> ADC_CHSELR_CHSEL4_BITOFFSET_POS) * LL_ADC_CHANNEL_4)
AnnaBridge	157:e7ca05fa8600	2678	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_CHANNEL_5)
AnnaBridge	157:e7ca05fa8600	2679	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL6) >> ADC_CHSELR_CHSEL6_BITOFFSET_POS) * LL_ADC_CHANNEL_6)
AnnaBridge	157:e7ca05fa8600	2680	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL7) >> ADC_CHSELR_CHSEL7_BITOFFSET_POS) * LL_ADC_CHANNEL_7)
AnnaBridge	157:e7ca05fa8600	2681	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL8) >> ADC_CHSELR_CHSEL8_BITOFFSET_POS) * LL_ADC_CHANNEL_8)
AnnaBridge	157:e7ca05fa8600	2682	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL9) >> ADC_CHSELR_CHSEL9_BITOFFSET_POS) * LL_ADC_CHANNEL_9)
AnnaBridge	157:e7ca05fa8600	2683	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL10) >> ADC_CHSELR_CHSEL10_BITOFFSET_POS) * LL_ADC_CHANNEL_10)
AnnaBridge	157:e7ca05fa8600	2684	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL11) >> ADC_CHSELR_CHSEL11_BITOFFSET_POS) * LL_ADC_CHANNEL_11)
AnnaBridge	157:e7ca05fa8600	2685	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL12) >> ADC_CHSELR_CHSEL12_BITOFFSET_POS) * LL_ADC_CHANNEL_12)
AnnaBridge	157:e7ca05fa8600	2686	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL13) >> ADC_CHSELR_CHSEL13_BITOFFSET_POS) * LL_ADC_CHANNEL_13)
AnnaBridge	157:e7ca05fa8600	2687	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL14) >> ADC_CHSELR_CHSEL14_BITOFFSET_POS) * LL_ADC_CHANNEL_14)
AnnaBridge	157:e7ca05fa8600	2688	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL15) >> ADC_CHSELR_CHSEL15_BITOFFSET_POS) * LL_ADC_CHANNEL_15)
AnnaBridge	157:e7ca05fa8600	2689	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	157:e7ca05fa8600	2690	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL16) >> ADC_CHSELR_CHSEL16_BITOFFSET_POS) * LL_ADC_CHANNEL_16)
AnnaBridge	157:e7ca05fa8600	2691	#endif
AnnaBridge	157:e7ca05fa8600	2692	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL17) >> ADC_CHSELR_CHSEL17_BITOFFSET_POS) * LL_ADC_CHANNEL_17)
AnnaBridge	157:e7ca05fa8600	2693	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL18) >> ADC_CHSELR_CHSEL18_BITOFFSET_POS) * LL_ADC_CHANNEL_18)
AnnaBridge	157:e7ca05fa8600	2694	);
AnnaBridge	157:e7ca05fa8600	2695	}
AnnaBridge	157:e7ca05fa8600	2696	/**
AnnaBridge	157:e7ca05fa8600	2697	* @brief Set ADC continuous conversion mode on ADC group regular.
AnnaBridge	157:e7ca05fa8600	2698	* @note Description of ADC continuous conversion mode:
AnnaBridge	157:e7ca05fa8600	2699	* - single mode: one conversion per trigger
AnnaBridge	157:e7ca05fa8600	2700	* - continuous mode: after the first trigger, following
AnnaBridge	157:e7ca05fa8600	2701	* conversions launched successively automatically.
AnnaBridge	157:e7ca05fa8600	2702	* @note It is not possible to enable both ADC group regular
AnnaBridge	157:e7ca05fa8600	2703	* continuous mode and sequencer discontinuous mode.
AnnaBridge	157:e7ca05fa8600	2704	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2705	* ADC state:
AnnaBridge	157:e7ca05fa8600	2706	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2707	* on group regular.
AnnaBridge	157:e7ca05fa8600	2708	* @rmtoll CFGR1 CONT LL_ADC_REG_SetContinuousMode
AnnaBridge	157:e7ca05fa8600	2709	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2710	* @param Continuous This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2711	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	157:e7ca05fa8600	2712	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	157:e7ca05fa8600	2713	* @retval None
AnnaBridge	157:e7ca05fa8600	2714	*/
AnnaBridge	157:e7ca05fa8600	2715	__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
AnnaBridge	157:e7ca05fa8600	2716	{
AnnaBridge	157:e7ca05fa8600	2717	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);
AnnaBridge	157:e7ca05fa8600	2718	}
AnnaBridge	157:e7ca05fa8600	2719
AnnaBridge	157:e7ca05fa8600	2720	/**
AnnaBridge	157:e7ca05fa8600	2721	* @brief Get ADC continuous conversion mode on ADC group regular.
AnnaBridge	157:e7ca05fa8600	2722	* @note Description of ADC continuous conversion mode:
AnnaBridge	157:e7ca05fa8600	2723	* - single mode: one conversion per trigger
AnnaBridge	157:e7ca05fa8600	2724	* - continuous mode: after the first trigger, following
AnnaBridge	157:e7ca05fa8600	2725	* conversions launched successively automatically.
AnnaBridge	157:e7ca05fa8600	2726	* @rmtoll CFGR1 CONT LL_ADC_REG_GetContinuousMode
AnnaBridge	157:e7ca05fa8600	2727	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2728	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2729	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	157:e7ca05fa8600	2730	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	157:e7ca05fa8600	2731	*/
AnnaBridge	157:e7ca05fa8600	2732	__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2733	{
AnnaBridge	157:e7ca05fa8600	2734	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));
AnnaBridge	157:e7ca05fa8600	2735	}
AnnaBridge	157:e7ca05fa8600	2736
AnnaBridge	157:e7ca05fa8600	2737	/**
AnnaBridge	157:e7ca05fa8600	2738	* @brief Set ADC group regular conversion data transfer: no transfer or
AnnaBridge	157:e7ca05fa8600	2739	* transfer by DMA, and DMA requests mode.
AnnaBridge	157:e7ca05fa8600	2740	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	157:e7ca05fa8600	2741	* mode:
AnnaBridge	157:e7ca05fa8600	2742	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	157:e7ca05fa8600	2743	* when number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2744	* ADC conversions) is reached.
AnnaBridge	157:e7ca05fa8600	2745	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	157:e7ca05fa8600	2746	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	157:e7ca05fa8600	2747	* whatever number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2748	* ADC conversions).
AnnaBridge	157:e7ca05fa8600	2749	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	157:e7ca05fa8600	2750	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	157:e7ca05fa8600	2751	* mode non-circular:
AnnaBridge	157:e7ca05fa8600	2752	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	157:e7ca05fa8600	2753	* ADC conversions data ADC will raise an overrun error
AnnaBridge	157:e7ca05fa8600	2754	* (overrun flag and interruption if enabled).
AnnaBridge	157:e7ca05fa8600	2755	* @note To configure DMA source address (peripheral address),
AnnaBridge	157:e7ca05fa8600	2756	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	157:e7ca05fa8600	2757	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2758	* ADC state:
AnnaBridge	157:e7ca05fa8600	2759	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2760	* on group regular.
AnnaBridge	157:e7ca05fa8600	2761	* @rmtoll CFGR1 DMAEN LL_ADC_REG_SetDMATransfer\n
AnnaBridge	157:e7ca05fa8600	2762	* CFGR1 DMACFG LL_ADC_REG_SetDMATransfer
AnnaBridge	157:e7ca05fa8600	2763	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2764	* @param DMATransfer This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2765	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	157:e7ca05fa8600	2766	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	157:e7ca05fa8600	2767	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	157:e7ca05fa8600	2768	* @retval None
AnnaBridge	157:e7ca05fa8600	2769	*/
AnnaBridge	157:e7ca05fa8600	2770	__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
AnnaBridge	157:e7ca05fa8600	2771	{
AnnaBridge	157:e7ca05fa8600	2772	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG, DMATransfer);
AnnaBridge	157:e7ca05fa8600	2773	}
AnnaBridge	157:e7ca05fa8600	2774
AnnaBridge	157:e7ca05fa8600	2775	/**
AnnaBridge	157:e7ca05fa8600	2776	* @brief Get ADC group regular conversion data transfer: no transfer or
AnnaBridge	157:e7ca05fa8600	2777	* transfer by DMA, and DMA requests mode.
AnnaBridge	157:e7ca05fa8600	2778	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	157:e7ca05fa8600	2779	* mode:
AnnaBridge	157:e7ca05fa8600	2780	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	157:e7ca05fa8600	2781	* when number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2782	* ADC conversions) is reached.
AnnaBridge	157:e7ca05fa8600	2783	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	157:e7ca05fa8600	2784	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	157:e7ca05fa8600	2785	* whatever number of DMA data transfers (number of
AnnaBridge	157:e7ca05fa8600	2786	* ADC conversions).
AnnaBridge	157:e7ca05fa8600	2787	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	157:e7ca05fa8600	2788	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	157:e7ca05fa8600	2789	* mode non-circular:
AnnaBridge	157:e7ca05fa8600	2790	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	157:e7ca05fa8600	2791	* ADC conversions data ADC will raise an overrun error
AnnaBridge	157:e7ca05fa8600	2792	* (overrun flag and interruption if enabled).
AnnaBridge	157:e7ca05fa8600	2793	* @note To configure DMA source address (peripheral address),
AnnaBridge	157:e7ca05fa8600	2794	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	157:e7ca05fa8600	2795	* @rmtoll CFGR1 DMAEN LL_ADC_REG_GetDMATransfer\n
AnnaBridge	157:e7ca05fa8600	2796	* CFGR1 DMACFG LL_ADC_REG_GetDMATransfer
AnnaBridge	157:e7ca05fa8600	2797	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2798	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2799	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	157:e7ca05fa8600	2800	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	157:e7ca05fa8600	2801	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	157:e7ca05fa8600	2802	*/
AnnaBridge	157:e7ca05fa8600	2803	__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2804	{
AnnaBridge	157:e7ca05fa8600	2805	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG));
AnnaBridge	157:e7ca05fa8600	2806	}
AnnaBridge	157:e7ca05fa8600	2807
AnnaBridge	157:e7ca05fa8600	2808	/**
AnnaBridge	157:e7ca05fa8600	2809	* @brief Set ADC group regular behavior in case of overrun:
AnnaBridge	157:e7ca05fa8600	2810	* data preserved or overwritten.
AnnaBridge	157:e7ca05fa8600	2811	* @note Compatibility with devices without feature overrun:
AnnaBridge	157:e7ca05fa8600	2812	* other devices without this feature have a behavior
AnnaBridge	157:e7ca05fa8600	2813	* equivalent to data overwritten.
AnnaBridge	157:e7ca05fa8600	2814	* The default setting of overrun is data preserved.
AnnaBridge	157:e7ca05fa8600	2815	* Therefore, for compatibility with all devices, parameter
AnnaBridge	157:e7ca05fa8600	2816	* overrun should be set to data overwritten.
AnnaBridge	157:e7ca05fa8600	2817	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2818	* ADC state:
AnnaBridge	157:e7ca05fa8600	2819	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2820	* on group regular.
AnnaBridge	157:e7ca05fa8600	2821	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_SetOverrun
AnnaBridge	157:e7ca05fa8600	2822	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2823	* @param Overrun This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2824	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	157:e7ca05fa8600	2825	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	157:e7ca05fa8600	2826	* @retval None
AnnaBridge	157:e7ca05fa8600	2827	*/
AnnaBridge	157:e7ca05fa8600	2828	__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
AnnaBridge	157:e7ca05fa8600	2829	{
AnnaBridge	157:e7ca05fa8600	2830	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);
AnnaBridge	157:e7ca05fa8600	2831	}
AnnaBridge	157:e7ca05fa8600	2832
AnnaBridge	157:e7ca05fa8600	2833	/**
AnnaBridge	157:e7ca05fa8600	2834	* @brief Get ADC group regular behavior in case of overrun:
AnnaBridge	157:e7ca05fa8600	2835	* data preserved or overwritten.
AnnaBridge	157:e7ca05fa8600	2836	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_GetOverrun
AnnaBridge	157:e7ca05fa8600	2837	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2838	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2839	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	157:e7ca05fa8600	2840	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	157:e7ca05fa8600	2841	*/
AnnaBridge	157:e7ca05fa8600	2842	__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2843	{
AnnaBridge	157:e7ca05fa8600	2844	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));
AnnaBridge	157:e7ca05fa8600	2845	}
AnnaBridge	157:e7ca05fa8600	2846
AnnaBridge	157:e7ca05fa8600	2847	/**
AnnaBridge	157:e7ca05fa8600	2848	* @}
AnnaBridge	157:e7ca05fa8600	2849	*/
AnnaBridge	157:e7ca05fa8600	2850
AnnaBridge	157:e7ca05fa8600	2851
AnnaBridge	157:e7ca05fa8600	2852	/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
AnnaBridge	157:e7ca05fa8600	2853	* @{
AnnaBridge	157:e7ca05fa8600	2854	*/
AnnaBridge	157:e7ca05fa8600	2855
AnnaBridge	157:e7ca05fa8600	2856	/**
AnnaBridge	157:e7ca05fa8600	2857	* @brief Set ADC analog watchdog monitored channels:
AnnaBridge	157:e7ca05fa8600	2858	* a single channel or all channels,
AnnaBridge	157:e7ca05fa8600	2859	* on ADC group regular.
AnnaBridge	157:e7ca05fa8600	2860	* @note Once monitored channels are selected, analog watchdog
AnnaBridge	157:e7ca05fa8600	2861	* is enabled.
AnnaBridge	157:e7ca05fa8600	2862	* @note In case of need to define a single channel to monitor
AnnaBridge	157:e7ca05fa8600	2863	* with analog watchdog from sequencer channel definition,
AnnaBridge	157:e7ca05fa8600	2864	* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
AnnaBridge	157:e7ca05fa8600	2865	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	2866	* instance:
AnnaBridge	157:e7ca05fa8600	2867	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	2868	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	2869	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	2870	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	2871	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	2872	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2873	* ADC state:
AnnaBridge	157:e7ca05fa8600	2874	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2875	* on group regular.
AnnaBridge	157:e7ca05fa8600	2876	* @rmtoll CFGR1 AWDCH LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2877	* CFGR1 AWDSGL LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2878	* CFGR1 AWDEN LL_ADC_SetAnalogWDMonitChannels
AnnaBridge	157:e7ca05fa8600	2879	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2880	* @param AWDChannelGroup This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2881	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	157:e7ca05fa8600	2882	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	157:e7ca05fa8600	2883	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	157:e7ca05fa8600	2884	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	157:e7ca05fa8600	2885	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	157:e7ca05fa8600	2886	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	157:e7ca05fa8600	2887	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	157:e7ca05fa8600	2888	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	157:e7ca05fa8600	2889	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	157:e7ca05fa8600	2890	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	157:e7ca05fa8600	2891	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	157:e7ca05fa8600	2892	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	157:e7ca05fa8600	2893	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	157:e7ca05fa8600	2894	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	157:e7ca05fa8600	2895	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	157:e7ca05fa8600	2896	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	157:e7ca05fa8600	2897	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	157:e7ca05fa8600	2898	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	157:e7ca05fa8600	2899	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (1)
AnnaBridge	157:e7ca05fa8600	2900	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	157:e7ca05fa8600	2901	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	157:e7ca05fa8600	2902	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	157:e7ca05fa8600	2903	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	157:e7ca05fa8600	2904	* @arg @ref LL_ADC_AWD_CH_VLCD_REG (1)
AnnaBridge	157:e7ca05fa8600	2905	*
AnnaBridge	157:e7ca05fa8600	2906	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	157:e7ca05fa8600	2907	* @retval None
AnnaBridge	157:e7ca05fa8600	2908	*/
AnnaBridge	157:e7ca05fa8600	2909	__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDChannelGroup)
AnnaBridge	157:e7ca05fa8600	2910	{
AnnaBridge	157:e7ca05fa8600	2911	MODIFY_REG(ADCx->CFGR1,
AnnaBridge	157:e7ca05fa8600	2912	(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN),
AnnaBridge	157:e7ca05fa8600	2913	(AWDChannelGroup & ADC_AWD_CR_ALL_CHANNEL_MASK));
AnnaBridge	157:e7ca05fa8600	2914	}
AnnaBridge	157:e7ca05fa8600	2915
AnnaBridge	157:e7ca05fa8600	2916	/**
AnnaBridge	157:e7ca05fa8600	2917	* @brief Get ADC analog watchdog monitored channel.
AnnaBridge	157:e7ca05fa8600	2918	* @note Usage of the returned channel number:
AnnaBridge	157:e7ca05fa8600	2919	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	157:e7ca05fa8600	2920	* the returned channel number is only partly formatted on definition
AnnaBridge	157:e7ca05fa8600	2921	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	157:e7ca05fa8600	2922	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	157:e7ca05fa8600	2923	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	157:e7ca05fa8600	2924	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	157:e7ca05fa8600	2925	* as parameter for another function.
AnnaBridge	157:e7ca05fa8600	2926	* - To get the channel number in decimal format:
AnnaBridge	157:e7ca05fa8600	2927	* process the returned value with the helper macro
AnnaBridge	157:e7ca05fa8600	2928	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	157:e7ca05fa8600	2929	* Applicable only when the analog watchdog is set to monitor
AnnaBridge	157:e7ca05fa8600	2930	* one channel.
AnnaBridge	157:e7ca05fa8600	2931	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	2932	* instance:
AnnaBridge	157:e7ca05fa8600	2933	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	2934	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	2935	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	2936	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	2937	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	2938	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2939	* ADC state:
AnnaBridge	157:e7ca05fa8600	2940	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2941	* on group regular.
AnnaBridge	157:e7ca05fa8600	2942	* @rmtoll CFGR1 AWDCH LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2943	* CFGR1 AWDSGL LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	157:e7ca05fa8600	2944	* CFGR1 AWDEN LL_ADC_GetAnalogWDMonitChannels
AnnaBridge	157:e7ca05fa8600	2945	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	2946	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	2947	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	157:e7ca05fa8600	2948	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	157:e7ca05fa8600	2949	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	157:e7ca05fa8600	2950	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	157:e7ca05fa8600	2951	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	157:e7ca05fa8600	2952	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	157:e7ca05fa8600	2953	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	157:e7ca05fa8600	2954	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	157:e7ca05fa8600	2955	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	157:e7ca05fa8600	2956	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	157:e7ca05fa8600	2957	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	157:e7ca05fa8600	2958	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	157:e7ca05fa8600	2959	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	157:e7ca05fa8600	2960	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	157:e7ca05fa8600	2961	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	157:e7ca05fa8600	2962	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	157:e7ca05fa8600	2963	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	157:e7ca05fa8600	2964	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	157:e7ca05fa8600	2965	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG
AnnaBridge	157:e7ca05fa8600	2966	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	157:e7ca05fa8600	2967	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	157:e7ca05fa8600	2968	*/
AnnaBridge	157:e7ca05fa8600	2969	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	2970	{
AnnaBridge	157:e7ca05fa8600	2971	register uint32_t AWDChannelGroup = READ_BIT(ADCx->CFGR1, (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN));
AnnaBridge	157:e7ca05fa8600	2972
AnnaBridge	157:e7ca05fa8600	2973	/* Note: Set variable according to channel definition including channel ID */
AnnaBridge	157:e7ca05fa8600	2974	/* with bitfield. */
AnnaBridge	157:e7ca05fa8600	2975	register uint32_t AWDChannelSingle = ((AWDChannelGroup & ADC_CFGR1_AWDSGL) >> ADC_CFGR1_AWDSGL_BITOFFSET_POS);
AnnaBridge	157:e7ca05fa8600	2976	register uint32_t AWDChannelBitField = (ADC_CHANNEL_0_BITFIELD << ((AWDChannelGroup & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS));
AnnaBridge	157:e7ca05fa8600	2977
AnnaBridge	157:e7ca05fa8600	2978	return (AWDChannelGroup \| (AWDChannelBitField * AWDChannelSingle));
AnnaBridge	157:e7ca05fa8600	2979	}
AnnaBridge	157:e7ca05fa8600	2980
AnnaBridge	157:e7ca05fa8600	2981	/**
AnnaBridge	157:e7ca05fa8600	2982	* @brief Set ADC analog watchdog thresholds value of both thresholds
AnnaBridge	157:e7ca05fa8600	2983	* high and low.
AnnaBridge	157:e7ca05fa8600	2984	* @note If value of only one threshold high or low must be set,
AnnaBridge	157:e7ca05fa8600	2985	* use function @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	2986	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	157:e7ca05fa8600	2987	* analog watchdog thresholds data require a specific shift.
AnnaBridge	157:e7ca05fa8600	2988	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	157:e7ca05fa8600	2989	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	2990	* instance:
AnnaBridge	157:e7ca05fa8600	2991	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	2992	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	2993	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	2994	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	2995	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	2996	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	2997	* ADC state:
AnnaBridge	157:e7ca05fa8600	2998	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	2999	* on group regular.
AnnaBridge	157:e7ca05fa8600	3000	* @rmtoll TR HT LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	157:e7ca05fa8600	3001	* TR LT LL_ADC_ConfigAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	3002	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3003	* @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3004	* @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3005	* @retval None
AnnaBridge	157:e7ca05fa8600	3006	*/
AnnaBridge	157:e7ca05fa8600	3007	__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
AnnaBridge	157:e7ca05fa8600	3008	{
AnnaBridge	157:e7ca05fa8600	3009	MODIFY_REG(ADCx->TR,
AnnaBridge	157:e7ca05fa8600	3010	ADC_TR_HT \| ADC_TR_LT,
AnnaBridge	157:e7ca05fa8600	3011	(AWDThresholdHighValue << ADC_TR_HT_BITOFFSET_POS) \| AWDThresholdLowValue);
AnnaBridge	157:e7ca05fa8600	3012	}
AnnaBridge	157:e7ca05fa8600	3013
AnnaBridge	157:e7ca05fa8600	3014	/**
AnnaBridge	157:e7ca05fa8600	3015	* @brief Set ADC analog watchdog threshold value of threshold
AnnaBridge	157:e7ca05fa8600	3016	* high or low.
AnnaBridge	157:e7ca05fa8600	3017	* @note If values of both thresholds high or low must be set,
AnnaBridge	157:e7ca05fa8600	3018	* use function @ref LL_ADC_ConfigAnalogWDThresholds().
AnnaBridge	157:e7ca05fa8600	3019	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	157:e7ca05fa8600	3020	* analog watchdog thresholds data require a specific shift.
AnnaBridge	157:e7ca05fa8600	3021	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	157:e7ca05fa8600	3022	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	157:e7ca05fa8600	3023	* instance:
AnnaBridge	157:e7ca05fa8600	3024	* - AWD standard (instance AWD1):
AnnaBridge	157:e7ca05fa8600	3025	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	157:e7ca05fa8600	3026	* - groups monitored: ADC group regular.
AnnaBridge	157:e7ca05fa8600	3027	* - resolution: resolution is not limited (corresponds to
AnnaBridge	157:e7ca05fa8600	3028	* ADC resolution configured).
AnnaBridge	157:e7ca05fa8600	3029	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3030	* ADC state:
AnnaBridge	157:e7ca05fa8600	3031	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3032	* on group regular.
AnnaBridge	157:e7ca05fa8600	3033	* @rmtoll TR HT LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	157:e7ca05fa8600	3034	* TR LT LL_ADC_SetAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	3035	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3036	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3037	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	157:e7ca05fa8600	3038	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	157:e7ca05fa8600	3039	* @param AWDThresholdValue: Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3040	* @retval None
AnnaBridge	157:e7ca05fa8600	3041	*/
AnnaBridge	157:e7ca05fa8600	3042	__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
AnnaBridge	157:e7ca05fa8600	3043	{
AnnaBridge	157:e7ca05fa8600	3044	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	157:e7ca05fa8600	3045	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	157:e7ca05fa8600	3046	/* high is selected, then data is shifted to LSB. Else(threshold low), */
AnnaBridge	157:e7ca05fa8600	3047	/* data is not shifted. */
AnnaBridge	157:e7ca05fa8600	3048	MODIFY_REG(ADCx->TR,
AnnaBridge	157:e7ca05fa8600	3049	AWDThresholdsHighLow,
AnnaBridge	157:e7ca05fa8600	3050	AWDThresholdValue << ((AWDThresholdsHighLow >> ADC_TR_HT_BITOFFSET_POS) & ((uint32_t)0x00000010U)));
AnnaBridge	157:e7ca05fa8600	3051	}
AnnaBridge	157:e7ca05fa8600	3052
AnnaBridge	157:e7ca05fa8600	3053	/**
AnnaBridge	157:e7ca05fa8600	3054	* @brief Get ADC analog watchdog threshold value of threshold high,
AnnaBridge	157:e7ca05fa8600	3055	* threshold low or raw data with ADC thresholds high and low
AnnaBridge	157:e7ca05fa8600	3056	* concatenated.
AnnaBridge	157:e7ca05fa8600	3057	* @note If raw data with ADC thresholds high and low is retrieved,
AnnaBridge	157:e7ca05fa8600	3058	* the data of each threshold high or low can be isolated
AnnaBridge	157:e7ca05fa8600	3059	* using helper macro:
AnnaBridge	157:e7ca05fa8600	3060	* @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
AnnaBridge	157:e7ca05fa8600	3061	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	157:e7ca05fa8600	3062	* analog watchdog thresholds data require a specific shift.
AnnaBridge	157:e7ca05fa8600	3063	* Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
AnnaBridge	157:e7ca05fa8600	3064	* @rmtoll TR HT LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	157:e7ca05fa8600	3065	* TR LT LL_ADC_GetAnalogWDThresholds
AnnaBridge	157:e7ca05fa8600	3066	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3067	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3068	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	157:e7ca05fa8600	3069	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	157:e7ca05fa8600	3070	* @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
AnnaBridge	157:e7ca05fa8600	3071	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3072	*/
AnnaBridge	157:e7ca05fa8600	3073	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow)
AnnaBridge	157:e7ca05fa8600	3074	{
AnnaBridge	157:e7ca05fa8600	3075	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	157:e7ca05fa8600	3076	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	157:e7ca05fa8600	3077	/* high is selected, then data is shifted to LSB. Else(threshold low or */
AnnaBridge	157:e7ca05fa8600	3078	/* both thresholds), data is not shifted. */
AnnaBridge	157:e7ca05fa8600	3079	return (uint32_t)(READ_BIT(ADCx->TR,
AnnaBridge	157:e7ca05fa8600	3080	(AWDThresholdsHighLow \| ADC_TR_LT))
AnnaBridge	157:e7ca05fa8600	3081	>> ((~AWDThresholdsHighLow) & ((uint32_t)0x00000010U))
AnnaBridge	157:e7ca05fa8600	3082	);
AnnaBridge	157:e7ca05fa8600	3083	}
AnnaBridge	157:e7ca05fa8600	3084
AnnaBridge	157:e7ca05fa8600	3085	/**
AnnaBridge	157:e7ca05fa8600	3086	* @}
AnnaBridge	157:e7ca05fa8600	3087	*/
AnnaBridge	157:e7ca05fa8600	3088
AnnaBridge	157:e7ca05fa8600	3089	/** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: oversampling
AnnaBridge	157:e7ca05fa8600	3090	* @{
AnnaBridge	157:e7ca05fa8600	3091	*/
AnnaBridge	157:e7ca05fa8600	3092
AnnaBridge	157:e7ca05fa8600	3093	/**
AnnaBridge	157:e7ca05fa8600	3094	* @brief Set ADC oversampling scope.
AnnaBridge	157:e7ca05fa8600	3095	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3096	* ADC state:
AnnaBridge	157:e7ca05fa8600	3097	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3098	* on group regular.
AnnaBridge	157:e7ca05fa8600	3099	* @rmtoll CFGR2 OVSE LL_ADC_SetOverSamplingScope
AnnaBridge	157:e7ca05fa8600	3100	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3101	* @param OvsScope This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3102	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	157:e7ca05fa8600	3103	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	157:e7ca05fa8600	3104	* @retval None
AnnaBridge	157:e7ca05fa8600	3105	*/
AnnaBridge	157:e7ca05fa8600	3106	__STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
AnnaBridge	157:e7ca05fa8600	3107	{
AnnaBridge	157:e7ca05fa8600	3108	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSE, OvsScope);
AnnaBridge	157:e7ca05fa8600	3109	}
AnnaBridge	157:e7ca05fa8600	3110
AnnaBridge	157:e7ca05fa8600	3111	/**
AnnaBridge	157:e7ca05fa8600	3112	* @brief Get ADC oversampling scope.
AnnaBridge	157:e7ca05fa8600	3113	* @rmtoll CFGR2 OVSE LL_ADC_GetOverSamplingScope
AnnaBridge	157:e7ca05fa8600	3114	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3115	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3116	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	157:e7ca05fa8600	3117	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	157:e7ca05fa8600	3118	*/
AnnaBridge	157:e7ca05fa8600	3119	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3120	{
AnnaBridge	157:e7ca05fa8600	3121	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSE));
AnnaBridge	157:e7ca05fa8600	3122	}
AnnaBridge	157:e7ca05fa8600	3123
AnnaBridge	157:e7ca05fa8600	3124	/**
AnnaBridge	157:e7ca05fa8600	3125	* @brief Set ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	157:e7ca05fa8600	3126	* on the selected ADC group.
AnnaBridge	157:e7ca05fa8600	3127	* @note Number of oversampled conversions are done either in:
AnnaBridge	157:e7ca05fa8600	3128	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3129	* are done from 1 trigger)
AnnaBridge	157:e7ca05fa8600	3130	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3131	* needs a trigger)
AnnaBridge	157:e7ca05fa8600	3132	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3133	* ADC state:
AnnaBridge	157:e7ca05fa8600	3134	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3135	* on group regular.
AnnaBridge	157:e7ca05fa8600	3136	* @rmtoll CFGR2 TOVS LL_ADC_SetOverSamplingDiscont
AnnaBridge	157:e7ca05fa8600	3137	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3138	* @param OverSamplingDiscont This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3139	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	157:e7ca05fa8600	3140	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	157:e7ca05fa8600	3141	* @retval None
AnnaBridge	157:e7ca05fa8600	3142	*/
AnnaBridge	157:e7ca05fa8600	3143	__STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
AnnaBridge	157:e7ca05fa8600	3144	{
AnnaBridge	157:e7ca05fa8600	3145	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TOVS, OverSamplingDiscont);
AnnaBridge	157:e7ca05fa8600	3146	}
AnnaBridge	157:e7ca05fa8600	3147
AnnaBridge	157:e7ca05fa8600	3148	/**
AnnaBridge	157:e7ca05fa8600	3149	* @brief Get ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	157:e7ca05fa8600	3150	* on the selected ADC group.
AnnaBridge	157:e7ca05fa8600	3151	* @note Number of oversampled conversions are done either in:
AnnaBridge	157:e7ca05fa8600	3152	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3153	* are done from 1 trigger)
AnnaBridge	157:e7ca05fa8600	3154	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	157:e7ca05fa8600	3155	* needs a trigger)
AnnaBridge	157:e7ca05fa8600	3156	* @rmtoll CFGR2 TOVS LL_ADC_GetOverSamplingDiscont
AnnaBridge	157:e7ca05fa8600	3157	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3158	* @retval Returned value can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3159	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	157:e7ca05fa8600	3160	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	157:e7ca05fa8600	3161	*/
AnnaBridge	157:e7ca05fa8600	3162	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3163	{
AnnaBridge	157:e7ca05fa8600	3164	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TOVS));
AnnaBridge	157:e7ca05fa8600	3165	}
AnnaBridge	157:e7ca05fa8600	3166
AnnaBridge	157:e7ca05fa8600	3167	/**
AnnaBridge	157:e7ca05fa8600	3168	* @brief Set ADC oversampling
AnnaBridge	157:e7ca05fa8600	3169	* @note This function set the 2 items of oversampling configuration:
AnnaBridge	157:e7ca05fa8600	3170	* - ratio
AnnaBridge	157:e7ca05fa8600	3171	* - shift
AnnaBridge	157:e7ca05fa8600	3172	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3173	* ADC state:
AnnaBridge	157:e7ca05fa8600	3174	* ADC must be disabled or enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3175	* on group regular.
AnnaBridge	157:e7ca05fa8600	3176	* @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n
AnnaBridge	157:e7ca05fa8600	3177	* CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift
AnnaBridge	157:e7ca05fa8600	3178	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3179	* @param Ratio This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3180	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	157:e7ca05fa8600	3181	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	157:e7ca05fa8600	3182	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	157:e7ca05fa8600	3183	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	157:e7ca05fa8600	3184	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	157:e7ca05fa8600	3185	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	157:e7ca05fa8600	3186	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	157:e7ca05fa8600	3187	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	157:e7ca05fa8600	3188	* @param Shift This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3189	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	157:e7ca05fa8600	3190	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	157:e7ca05fa8600	3191	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	157:e7ca05fa8600	3192	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	157:e7ca05fa8600	3193	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	157:e7ca05fa8600	3194	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	157:e7ca05fa8600	3195	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	157:e7ca05fa8600	3196	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	157:e7ca05fa8600	3197	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	157:e7ca05fa8600	3198	* @retval None
AnnaBridge	157:e7ca05fa8600	3199	*/
AnnaBridge	157:e7ca05fa8600	3200	__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
AnnaBridge	157:e7ca05fa8600	3201	{
AnnaBridge	157:e7ca05fa8600	3202	MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR), (Shift \| Ratio));
AnnaBridge	157:e7ca05fa8600	3203	}
AnnaBridge	157:e7ca05fa8600	3204
AnnaBridge	157:e7ca05fa8600	3205	/**
AnnaBridge	157:e7ca05fa8600	3206	* @brief Get ADC oversampling ratio
AnnaBridge	157:e7ca05fa8600	3207	* @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio
AnnaBridge	157:e7ca05fa8600	3208	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3209	* @retval Ratio This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3210	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	157:e7ca05fa8600	3211	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	157:e7ca05fa8600	3212	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	157:e7ca05fa8600	3213	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	157:e7ca05fa8600	3214	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	157:e7ca05fa8600	3215	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	157:e7ca05fa8600	3216	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	157:e7ca05fa8600	3217	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	157:e7ca05fa8600	3218	*/
AnnaBridge	157:e7ca05fa8600	3219	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3220	{
AnnaBridge	157:e7ca05fa8600	3221	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
AnnaBridge	157:e7ca05fa8600	3222	}
AnnaBridge	157:e7ca05fa8600	3223
AnnaBridge	157:e7ca05fa8600	3224	/**
AnnaBridge	157:e7ca05fa8600	3225	* @brief Get ADC oversampling shift
AnnaBridge	157:e7ca05fa8600	3226	* @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift
AnnaBridge	157:e7ca05fa8600	3227	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3228	* @retval Shift This parameter can be one of the following values:
AnnaBridge	157:e7ca05fa8600	3229	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	157:e7ca05fa8600	3230	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	157:e7ca05fa8600	3231	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	157:e7ca05fa8600	3232	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	157:e7ca05fa8600	3233	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	157:e7ca05fa8600	3234	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	157:e7ca05fa8600	3235	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	157:e7ca05fa8600	3236	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	157:e7ca05fa8600	3237	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	157:e7ca05fa8600	3238	*/
AnnaBridge	157:e7ca05fa8600	3239	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3240	{
AnnaBridge	157:e7ca05fa8600	3241	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
AnnaBridge	157:e7ca05fa8600	3242	}
AnnaBridge	157:e7ca05fa8600	3243
AnnaBridge	157:e7ca05fa8600	3244	/**
AnnaBridge	157:e7ca05fa8600	3245	* @}
AnnaBridge	157:e7ca05fa8600	3246	*/
AnnaBridge	157:e7ca05fa8600	3247
AnnaBridge	157:e7ca05fa8600	3248	/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
AnnaBridge	157:e7ca05fa8600	3249	* @{
AnnaBridge	157:e7ca05fa8600	3250	*/
AnnaBridge	157:e7ca05fa8600	3251
AnnaBridge	157:e7ca05fa8600	3252	/**
AnnaBridge	157:e7ca05fa8600	3253	* @brief Enable ADC instance internal voltage regulator.
AnnaBridge	157:e7ca05fa8600	3254	* @note On this STM32 serie, there are three possibilities to enable
AnnaBridge	157:e7ca05fa8600	3255	* the voltage regulator:
AnnaBridge	157:e7ca05fa8600	3256	* - by enabling it manually
AnnaBridge	157:e7ca05fa8600	3257	* using this function (@ref LL_ADC_EnableInternalRegulator() ).
AnnaBridge	157:e7ca05fa8600	3258	* - by launching a calibration
AnnaBridge	157:e7ca05fa8600	3259	* using function @ref LL_ADC_StartCalibration().
AnnaBridge	157:e7ca05fa8600	3260	* - by enabling the ADC
AnnaBridge	157:e7ca05fa8600	3261	* using function @ref LL_ADC_Enable().
AnnaBridge	157:e7ca05fa8600	3262	* @note On this STM32 serie, after ADC internal voltage regulator enable,
AnnaBridge	157:e7ca05fa8600	3263	* a delay for ADC internal voltage regulator stabilization
AnnaBridge	157:e7ca05fa8600	3264	* is required before performing a ADC calibration or ADC enable.
AnnaBridge	157:e7ca05fa8600	3265	* Refer to device datasheet, parameter tUP_LDO.
AnnaBridge	157:e7ca05fa8600	3266	* Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
AnnaBridge	157:e7ca05fa8600	3267	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3268	* ADC state:
AnnaBridge	157:e7ca05fa8600	3269	* ADC must be ADC disabled.
AnnaBridge	157:e7ca05fa8600	3270	* @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
AnnaBridge	157:e7ca05fa8600	3271	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3272	* @retval None
AnnaBridge	157:e7ca05fa8600	3273	*/
AnnaBridge	157:e7ca05fa8600	3274	__STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3275	{
AnnaBridge	157:e7ca05fa8600	3276	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3277	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3278	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3279	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3280	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3281	ADC_CR_ADVREGEN);
AnnaBridge	157:e7ca05fa8600	3282	}
AnnaBridge	157:e7ca05fa8600	3283
AnnaBridge	157:e7ca05fa8600	3284	/**
AnnaBridge	157:e7ca05fa8600	3285	* @brief Disable ADC internal voltage regulator.
AnnaBridge	157:e7ca05fa8600	3286	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3287	* ADC state:
AnnaBridge	157:e7ca05fa8600	3288	* ADC must be ADC disabled.
AnnaBridge	157:e7ca05fa8600	3289	* @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator
AnnaBridge	157:e7ca05fa8600	3290	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3291	* @retval None
AnnaBridge	157:e7ca05fa8600	3292	*/
AnnaBridge	157:e7ca05fa8600	3293	__STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3294	{
AnnaBridge	157:e7ca05fa8600	3295	CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN \| ADC_CR_BITS_PROPERTY_RS));
AnnaBridge	157:e7ca05fa8600	3296	}
AnnaBridge	157:e7ca05fa8600	3297
AnnaBridge	157:e7ca05fa8600	3298	/**
AnnaBridge	157:e7ca05fa8600	3299	* @brief Get the selected ADC instance internal voltage regulator state.
AnnaBridge	157:e7ca05fa8600	3300	* @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
AnnaBridge	157:e7ca05fa8600	3301	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3302	* @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
AnnaBridge	157:e7ca05fa8600	3303	*/
AnnaBridge	157:e7ca05fa8600	3304	__STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3305	{
AnnaBridge	157:e7ca05fa8600	3306	return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
AnnaBridge	157:e7ca05fa8600	3307	}
AnnaBridge	157:e7ca05fa8600	3308
AnnaBridge	157:e7ca05fa8600	3309	/**
AnnaBridge	157:e7ca05fa8600	3310	* @brief Enable the selected ADC instance.
AnnaBridge	157:e7ca05fa8600	3311	* @note On this STM32 serie, after ADC enable, a delay for
AnnaBridge	157:e7ca05fa8600	3312	* ADC internal analog stabilization is required before performing a
AnnaBridge	157:e7ca05fa8600	3313	* ADC conversion start.
AnnaBridge	157:e7ca05fa8600	3314	* Refer to device datasheet, parameter tSTAB.
AnnaBridge	157:e7ca05fa8600	3315	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3316	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3317	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3318	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3319	* ADC state:
AnnaBridge	157:e7ca05fa8600	3320	* ADC must be ADC disabled and ADC internal voltage regulator enabled.
AnnaBridge	157:e7ca05fa8600	3321	* @rmtoll CR ADEN LL_ADC_Enable
AnnaBridge	157:e7ca05fa8600	3322	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3323	* @retval None
AnnaBridge	157:e7ca05fa8600	3324	*/
AnnaBridge	157:e7ca05fa8600	3325	__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3326	{
AnnaBridge	157:e7ca05fa8600	3327	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3328	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3329	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3330	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3331	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3332	ADC_CR_ADEN);
AnnaBridge	157:e7ca05fa8600	3333	}
AnnaBridge	157:e7ca05fa8600	3334
AnnaBridge	157:e7ca05fa8600	3335	/**
AnnaBridge	157:e7ca05fa8600	3336	* @brief Disable the selected ADC instance.
AnnaBridge	157:e7ca05fa8600	3337	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3338	* ADC state:
AnnaBridge	157:e7ca05fa8600	3339	* ADC must be not disabled. Must be enabled without conversion on going
AnnaBridge	157:e7ca05fa8600	3340	* on group regular.
AnnaBridge	157:e7ca05fa8600	3341	* @rmtoll CR ADDIS LL_ADC_Disable
AnnaBridge	157:e7ca05fa8600	3342	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3343	* @retval None
AnnaBridge	157:e7ca05fa8600	3344	*/
AnnaBridge	157:e7ca05fa8600	3345	__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3346	{
AnnaBridge	157:e7ca05fa8600	3347	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3348	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3349	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3350	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3351	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3352	ADC_CR_ADDIS);
AnnaBridge	157:e7ca05fa8600	3353	}
AnnaBridge	157:e7ca05fa8600	3354
AnnaBridge	157:e7ca05fa8600	3355	/**
AnnaBridge	157:e7ca05fa8600	3356	* @brief Get the selected ADC instance enable state.
AnnaBridge	157:e7ca05fa8600	3357	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3358	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3359	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3360	* @rmtoll CR ADEN LL_ADC_IsEnabled
AnnaBridge	157:e7ca05fa8600	3361	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3362	* @retval 0: ADC is disabled, 1: ADC is enabled.
AnnaBridge	157:e7ca05fa8600	3363	*/
AnnaBridge	157:e7ca05fa8600	3364	__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3365	{
AnnaBridge	157:e7ca05fa8600	3366	return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
AnnaBridge	157:e7ca05fa8600	3367	}
AnnaBridge	157:e7ca05fa8600	3368
AnnaBridge	157:e7ca05fa8600	3369	/**
AnnaBridge	157:e7ca05fa8600	3370	* @brief Get the selected ADC instance disable state.
AnnaBridge	157:e7ca05fa8600	3371	* @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
AnnaBridge	157:e7ca05fa8600	3372	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3373	* @retval 0: no ADC disable command on going.
AnnaBridge	157:e7ca05fa8600	3374	*/
AnnaBridge	157:e7ca05fa8600	3375	__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3376	{
AnnaBridge	157:e7ca05fa8600	3377	return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
AnnaBridge	157:e7ca05fa8600	3378	}
AnnaBridge	157:e7ca05fa8600	3379
AnnaBridge	157:e7ca05fa8600	3380	/**
AnnaBridge	157:e7ca05fa8600	3381	* @brief Start ADC calibration in the mode single-ended
AnnaBridge	157:e7ca05fa8600	3382	* or differential (for devices with differential mode available).
AnnaBridge	157:e7ca05fa8600	3383	* @note On this STM32 serie, a minimum number of ADC clock cycles
AnnaBridge	157:e7ca05fa8600	3384	* are required between ADC end of calibration and ADC enable.
AnnaBridge	157:e7ca05fa8600	3385	* Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
AnnaBridge	157:e7ca05fa8600	3386	* @note In case of usage of ADC with DMA transfer:
AnnaBridge	157:e7ca05fa8600	3387	* On this STM32 serie, ADC DMA transfer request should be disabled
AnnaBridge	157:e7ca05fa8600	3388	* during calibration:
AnnaBridge	157:e7ca05fa8600	3389	* Calibration factor is available in data register
AnnaBridge	157:e7ca05fa8600	3390	* and also transfered by DMA.
AnnaBridge	157:e7ca05fa8600	3391	* To not insert ADC calibration factor among ADC conversion data
AnnaBridge	157:e7ca05fa8600	3392	* in array variable, DMA transfer must be disabled during
AnnaBridge	157:e7ca05fa8600	3393	* calibration.
AnnaBridge	157:e7ca05fa8600	3394	* (DMA transfer setting backup and disable before calibration,
AnnaBridge	157:e7ca05fa8600	3395	* DMA transfer setting restore after calibration.
AnnaBridge	157:e7ca05fa8600	3396	* Refer to functions @ref LL_ADC_REG_GetDMATransfer(),
AnnaBridge	157:e7ca05fa8600	3397	* @ref LL_ADC_REG_SetDMATransfer() ).
AnnaBridge	157:e7ca05fa8600	3398	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3399	* ADC state:
AnnaBridge	157:e7ca05fa8600	3400	* ADC must be ADC disabled.
AnnaBridge	157:e7ca05fa8600	3401	* @rmtoll CR ADCAL LL_ADC_StartCalibration
AnnaBridge	157:e7ca05fa8600	3402	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3403	* @retval None
AnnaBridge	157:e7ca05fa8600	3404	*/
AnnaBridge	157:e7ca05fa8600	3405	__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3406	{
AnnaBridge	157:e7ca05fa8600	3407	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3408	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3409	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3410	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3411	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3412	ADC_CR_ADCAL);
AnnaBridge	157:e7ca05fa8600	3413	}
AnnaBridge	157:e7ca05fa8600	3414
AnnaBridge	157:e7ca05fa8600	3415	/**
AnnaBridge	157:e7ca05fa8600	3416	* @brief Get ADC calibration state.
AnnaBridge	157:e7ca05fa8600	3417	* @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
AnnaBridge	157:e7ca05fa8600	3418	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3419	* @retval 0: calibration complete, 1: calibration in progress.
AnnaBridge	157:e7ca05fa8600	3420	*/
AnnaBridge	157:e7ca05fa8600	3421	__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3422	{
AnnaBridge	157:e7ca05fa8600	3423	return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
AnnaBridge	157:e7ca05fa8600	3424	}
AnnaBridge	157:e7ca05fa8600	3425
AnnaBridge	157:e7ca05fa8600	3426	/**
AnnaBridge	157:e7ca05fa8600	3427	* @}
AnnaBridge	157:e7ca05fa8600	3428	*/
AnnaBridge	157:e7ca05fa8600	3429
AnnaBridge	157:e7ca05fa8600	3430	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
AnnaBridge	157:e7ca05fa8600	3431	* @{
AnnaBridge	157:e7ca05fa8600	3432	*/
AnnaBridge	157:e7ca05fa8600	3433
AnnaBridge	157:e7ca05fa8600	3434	/**
AnnaBridge	157:e7ca05fa8600	3435	* @brief Start ADC group regular conversion.
AnnaBridge	157:e7ca05fa8600	3436	* @note On this STM32 serie, this function is relevant for both
AnnaBridge	157:e7ca05fa8600	3437	* internal trigger (SW start) and external trigger:
AnnaBridge	157:e7ca05fa8600	3438	* - If ADC trigger has been set to software start, ADC conversion
AnnaBridge	157:e7ca05fa8600	3439	* starts immediately.
AnnaBridge	157:e7ca05fa8600	3440	* - If ADC trigger has been set to external trigger, ADC conversion
AnnaBridge	157:e7ca05fa8600	3441	* will start at next trigger event (on the selected trigger edge)
AnnaBridge	157:e7ca05fa8600	3442	* following the ADC start conversion command.
AnnaBridge	157:e7ca05fa8600	3443	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3444	* ADC state:
AnnaBridge	157:e7ca05fa8600	3445	* ADC must be enabled without conversion on going on group regular,
AnnaBridge	157:e7ca05fa8600	3446	* without conversion stop command on going on group regular.
AnnaBridge	157:e7ca05fa8600	3447	* @rmtoll CR ADSTART LL_ADC_REG_StartConversion
AnnaBridge	157:e7ca05fa8600	3448	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3449	* @retval None
AnnaBridge	157:e7ca05fa8600	3450	*/
AnnaBridge	157:e7ca05fa8600	3451	__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3452	{
AnnaBridge	157:e7ca05fa8600	3453	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3454	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3455	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3456	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3457	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3458	ADC_CR_ADSTART);
AnnaBridge	157:e7ca05fa8600	3459	}
AnnaBridge	157:e7ca05fa8600	3460
AnnaBridge	157:e7ca05fa8600	3461	/**
AnnaBridge	157:e7ca05fa8600	3462	* @brief Stop ADC group regular conversion.
AnnaBridge	157:e7ca05fa8600	3463	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	157:e7ca05fa8600	3464	* ADC state:
AnnaBridge	157:e7ca05fa8600	3465	* ADC must be enabled with conversion on going on group regular,
AnnaBridge	157:e7ca05fa8600	3466	* without ADC disable command on going.
AnnaBridge	157:e7ca05fa8600	3467	* @rmtoll CR ADSTP LL_ADC_REG_StopConversion
AnnaBridge	157:e7ca05fa8600	3468	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3469	* @retval None
AnnaBridge	157:e7ca05fa8600	3470	*/
AnnaBridge	157:e7ca05fa8600	3471	__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3472	{
AnnaBridge	157:e7ca05fa8600	3473	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	157:e7ca05fa8600	3474	/* instead of modifying only the selected bit for this function, */
AnnaBridge	157:e7ca05fa8600	3475	/* to not interfere with bits with HW property "rs". */
AnnaBridge	157:e7ca05fa8600	3476	MODIFY_REG(ADCx->CR,
AnnaBridge	157:e7ca05fa8600	3477	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	157:e7ca05fa8600	3478	ADC_CR_ADSTP);
AnnaBridge	157:e7ca05fa8600	3479	}
AnnaBridge	157:e7ca05fa8600	3480
AnnaBridge	157:e7ca05fa8600	3481	/**
AnnaBridge	157:e7ca05fa8600	3482	* @brief Get ADC group regular conversion state.
AnnaBridge	157:e7ca05fa8600	3483	* @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
AnnaBridge	157:e7ca05fa8600	3484	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3485	* @retval 0: no conversion is on going on ADC group regular.
AnnaBridge	157:e7ca05fa8600	3486	*/
AnnaBridge	157:e7ca05fa8600	3487	__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3488	{
AnnaBridge	157:e7ca05fa8600	3489	return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
AnnaBridge	157:e7ca05fa8600	3490	}
AnnaBridge	157:e7ca05fa8600	3491
AnnaBridge	157:e7ca05fa8600	3492	/**
AnnaBridge	157:e7ca05fa8600	3493	* @brief Get ADC group regular command of conversion stop state
AnnaBridge	157:e7ca05fa8600	3494	* @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
AnnaBridge	157:e7ca05fa8600	3495	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3496	* @retval 0: no command of conversion stop is on going on ADC group regular.
AnnaBridge	157:e7ca05fa8600	3497	*/
AnnaBridge	157:e7ca05fa8600	3498	__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3499	{
AnnaBridge	157:e7ca05fa8600	3500	return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
AnnaBridge	157:e7ca05fa8600	3501	}
AnnaBridge	157:e7ca05fa8600	3502
AnnaBridge	157:e7ca05fa8600	3503	/**
AnnaBridge	157:e7ca05fa8600	3504	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3505	* all ADC configurations: all ADC resolutions and
AnnaBridge	157:e7ca05fa8600	3506	* all oversampling increased data width (for devices
AnnaBridge	157:e7ca05fa8600	3507	* with feature oversampling).
AnnaBridge	157:e7ca05fa8600	3508	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData32
AnnaBridge	157:e7ca05fa8600	3509	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3510	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	157:e7ca05fa8600	3511	*/
AnnaBridge	157:e7ca05fa8600	3512	__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3513	{
AnnaBridge	157:e7ca05fa8600	3514	return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3515	}
AnnaBridge	157:e7ca05fa8600	3516
AnnaBridge	157:e7ca05fa8600	3517	/**
AnnaBridge	157:e7ca05fa8600	3518	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3519	* ADC resolution 12 bits.
AnnaBridge	157:e7ca05fa8600	3520	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3521	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3522	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3523	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData12
AnnaBridge	157:e7ca05fa8600	3524	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3525	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	157:e7ca05fa8600	3526	*/
AnnaBridge	157:e7ca05fa8600	3527	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3528	{
AnnaBridge	157:e7ca05fa8600	3529	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3530	}
AnnaBridge	157:e7ca05fa8600	3531
AnnaBridge	157:e7ca05fa8600	3532	/**
AnnaBridge	157:e7ca05fa8600	3533	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3534	* ADC resolution 10 bits.
AnnaBridge	157:e7ca05fa8600	3535	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3536	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3537	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3538	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData10
AnnaBridge	157:e7ca05fa8600	3539	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3540	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge	157:e7ca05fa8600	3541	*/
AnnaBridge	157:e7ca05fa8600	3542	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3543	{
AnnaBridge	157:e7ca05fa8600	3544	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3545	}
AnnaBridge	157:e7ca05fa8600	3546
AnnaBridge	157:e7ca05fa8600	3547	/**
AnnaBridge	157:e7ca05fa8600	3548	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3549	* ADC resolution 8 bits.
AnnaBridge	157:e7ca05fa8600	3550	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3551	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3552	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3553	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData8
AnnaBridge	157:e7ca05fa8600	3554	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3555	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	157:e7ca05fa8600	3556	*/
AnnaBridge	157:e7ca05fa8600	3557	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3558	{
AnnaBridge	157:e7ca05fa8600	3559	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3560	}
AnnaBridge	157:e7ca05fa8600	3561
AnnaBridge	157:e7ca05fa8600	3562	/**
AnnaBridge	157:e7ca05fa8600	3563	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	157:e7ca05fa8600	3564	* ADC resolution 6 bits.
AnnaBridge	157:e7ca05fa8600	3565	* @note For devices with feature oversampling: Oversampling
AnnaBridge	157:e7ca05fa8600	3566	* can increase data width, function for extended range
AnnaBridge	157:e7ca05fa8600	3567	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	157:e7ca05fa8600	3568	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData6
AnnaBridge	157:e7ca05fa8600	3569	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3570	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	157:e7ca05fa8600	3571	*/
AnnaBridge	157:e7ca05fa8600	3572	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3573	{
AnnaBridge	157:e7ca05fa8600	3574	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	157:e7ca05fa8600	3575	}
AnnaBridge	157:e7ca05fa8600	3576
AnnaBridge	157:e7ca05fa8600	3577	/**
AnnaBridge	157:e7ca05fa8600	3578	* @}
AnnaBridge	157:e7ca05fa8600	3579	*/
AnnaBridge	157:e7ca05fa8600	3580
AnnaBridge	157:e7ca05fa8600	3581	/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
AnnaBridge	157:e7ca05fa8600	3582	* @{
AnnaBridge	157:e7ca05fa8600	3583	*/
AnnaBridge	157:e7ca05fa8600	3584
AnnaBridge	157:e7ca05fa8600	3585	/**
AnnaBridge	157:e7ca05fa8600	3586	* @brief Get flag ADC ready.
AnnaBridge	157:e7ca05fa8600	3587	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3588	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3589	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3590	* @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY
AnnaBridge	157:e7ca05fa8600	3591	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3592	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3593	*/
AnnaBridge	157:e7ca05fa8600	3594	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3595	{
AnnaBridge	157:e7ca05fa8600	3596	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
AnnaBridge	157:e7ca05fa8600	3597	}
AnnaBridge	157:e7ca05fa8600	3598
AnnaBridge	157:e7ca05fa8600	3599	/**
AnnaBridge	157:e7ca05fa8600	3600	* @brief Get flag ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3601	* @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC
AnnaBridge	157:e7ca05fa8600	3602	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3603	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3604	*/
AnnaBridge	157:e7ca05fa8600	3605	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3606	{
AnnaBridge	157:e7ca05fa8600	3607	return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
AnnaBridge	157:e7ca05fa8600	3608	}
AnnaBridge	157:e7ca05fa8600	3609
AnnaBridge	157:e7ca05fa8600	3610	/**
AnnaBridge	157:e7ca05fa8600	3611	* @brief Get flag ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3612	* @rmtoll ISR EOSEQ LL_ADC_IsActiveFlag_EOS
AnnaBridge	157:e7ca05fa8600	3613	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3614	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3615	*/
AnnaBridge	157:e7ca05fa8600	3616	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3617	{
AnnaBridge	157:e7ca05fa8600	3618	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
AnnaBridge	157:e7ca05fa8600	3619	}
AnnaBridge	157:e7ca05fa8600	3620
AnnaBridge	157:e7ca05fa8600	3621	/**
AnnaBridge	157:e7ca05fa8600	3622	* @brief Get flag ADC group regular overrun.
AnnaBridge	157:e7ca05fa8600	3623	* @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR
AnnaBridge	157:e7ca05fa8600	3624	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3625	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3626	*/
AnnaBridge	157:e7ca05fa8600	3627	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3628	{
AnnaBridge	157:e7ca05fa8600	3629	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
AnnaBridge	157:e7ca05fa8600	3630	}
AnnaBridge	157:e7ca05fa8600	3631
AnnaBridge	157:e7ca05fa8600	3632	/**
AnnaBridge	157:e7ca05fa8600	3633	* @brief Get flag ADC group regular end of sampling phase.
AnnaBridge	157:e7ca05fa8600	3634	* @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP
AnnaBridge	157:e7ca05fa8600	3635	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3636	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3637	*/
AnnaBridge	157:e7ca05fa8600	3638	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3639	{
AnnaBridge	157:e7ca05fa8600	3640	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
AnnaBridge	157:e7ca05fa8600	3641	}
AnnaBridge	157:e7ca05fa8600	3642
AnnaBridge	157:e7ca05fa8600	3643	/**
AnnaBridge	157:e7ca05fa8600	3644	* @brief Get flag ADC analog watchdog 1 flag
AnnaBridge	157:e7ca05fa8600	3645	* @rmtoll ISR AWD LL_ADC_IsActiveFlag_AWD1
AnnaBridge	157:e7ca05fa8600	3646	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3647	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3648	*/
AnnaBridge	157:e7ca05fa8600	3649	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3650	{
AnnaBridge	157:e7ca05fa8600	3651	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
AnnaBridge	157:e7ca05fa8600	3652	}
AnnaBridge	157:e7ca05fa8600	3653
AnnaBridge	157:e7ca05fa8600	3654	/**
AnnaBridge	157:e7ca05fa8600	3655	* @brief Get flag ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3656	* @rmtoll ISR EOCAL LL_ADC_IsActiveFlag_EOCAL
AnnaBridge	157:e7ca05fa8600	3657	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3658	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3659	*/
AnnaBridge	157:e7ca05fa8600	3660	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3661	{
AnnaBridge	157:e7ca05fa8600	3662	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOCAL) == (LL_ADC_FLAG_EOCAL));
AnnaBridge	157:e7ca05fa8600	3663	}
AnnaBridge	157:e7ca05fa8600	3664
AnnaBridge	157:e7ca05fa8600	3665	/**
AnnaBridge	157:e7ca05fa8600	3666	* @brief Clear flag ADC ready.
AnnaBridge	157:e7ca05fa8600	3667	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	157:e7ca05fa8600	3668	* is enabled and when conversion clock is active.
AnnaBridge	157:e7ca05fa8600	3669	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	157:e7ca05fa8600	3670	* @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY
AnnaBridge	157:e7ca05fa8600	3671	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3672	* @retval None
AnnaBridge	157:e7ca05fa8600	3673	*/
AnnaBridge	157:e7ca05fa8600	3674	__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3675	{
AnnaBridge	157:e7ca05fa8600	3676	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
AnnaBridge	157:e7ca05fa8600	3677	}
AnnaBridge	157:e7ca05fa8600	3678
AnnaBridge	157:e7ca05fa8600	3679	/**
AnnaBridge	157:e7ca05fa8600	3680	* @brief Clear flag ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3681	* @rmtoll ISR EOC LL_ADC_ClearFlag_EOC
AnnaBridge	157:e7ca05fa8600	3682	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3683	* @retval None
AnnaBridge	157:e7ca05fa8600	3684	*/
AnnaBridge	157:e7ca05fa8600	3685	__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3686	{
AnnaBridge	157:e7ca05fa8600	3687	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
AnnaBridge	157:e7ca05fa8600	3688	}
AnnaBridge	157:e7ca05fa8600	3689
AnnaBridge	157:e7ca05fa8600	3690	/**
AnnaBridge	157:e7ca05fa8600	3691	* @brief Clear flag ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3692	* @rmtoll ISR EOSEQ LL_ADC_ClearFlag_EOS
AnnaBridge	157:e7ca05fa8600	3693	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3694	* @retval None
AnnaBridge	157:e7ca05fa8600	3695	*/
AnnaBridge	157:e7ca05fa8600	3696	__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3697	{
AnnaBridge	157:e7ca05fa8600	3698	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
AnnaBridge	157:e7ca05fa8600	3699	}
AnnaBridge	157:e7ca05fa8600	3700
AnnaBridge	157:e7ca05fa8600	3701	/**
AnnaBridge	157:e7ca05fa8600	3702	* @brief Clear flag ADC group regular overrun.
AnnaBridge	157:e7ca05fa8600	3703	* @rmtoll ISR OVR LL_ADC_ClearFlag_OVR
AnnaBridge	157:e7ca05fa8600	3704	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3705	* @retval None
AnnaBridge	157:e7ca05fa8600	3706	*/
AnnaBridge	157:e7ca05fa8600	3707	__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3708	{
AnnaBridge	157:e7ca05fa8600	3709	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
AnnaBridge	157:e7ca05fa8600	3710	}
AnnaBridge	157:e7ca05fa8600	3711
AnnaBridge	157:e7ca05fa8600	3712	/**
AnnaBridge	157:e7ca05fa8600	3713	* @brief Clear flag ADC group regular end of sampling phase.
AnnaBridge	157:e7ca05fa8600	3714	* @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP
AnnaBridge	157:e7ca05fa8600	3715	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3716	* @retval None
AnnaBridge	157:e7ca05fa8600	3717	*/
AnnaBridge	157:e7ca05fa8600	3718	__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3719	{
AnnaBridge	157:e7ca05fa8600	3720	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
AnnaBridge	157:e7ca05fa8600	3721	}
AnnaBridge	157:e7ca05fa8600	3722
AnnaBridge	157:e7ca05fa8600	3723	/**
AnnaBridge	157:e7ca05fa8600	3724	* @brief Clear flag ADC analog watchdog 1.
AnnaBridge	157:e7ca05fa8600	3725	* @rmtoll ISR AWD LL_ADC_ClearFlag_AWD1
AnnaBridge	157:e7ca05fa8600	3726	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3727	* @retval None
AnnaBridge	157:e7ca05fa8600	3728	*/
AnnaBridge	157:e7ca05fa8600	3729	__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3730	{
AnnaBridge	157:e7ca05fa8600	3731	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
AnnaBridge	157:e7ca05fa8600	3732	}
AnnaBridge	157:e7ca05fa8600	3733
AnnaBridge	157:e7ca05fa8600	3734	/**
AnnaBridge	157:e7ca05fa8600	3735	* @brief Clear flag ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3736	* @rmtoll ISR EOCAL LL_ADC_ClearFlag_EOCAL
AnnaBridge	157:e7ca05fa8600	3737	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3738	* @retval None
AnnaBridge	157:e7ca05fa8600	3739	*/
AnnaBridge	157:e7ca05fa8600	3740	__STATIC_INLINE void LL_ADC_ClearFlag_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3741	{
AnnaBridge	157:e7ca05fa8600	3742	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOCAL);
AnnaBridge	157:e7ca05fa8600	3743	}
AnnaBridge	157:e7ca05fa8600	3744
AnnaBridge	157:e7ca05fa8600	3745	/**
AnnaBridge	157:e7ca05fa8600	3746	* @}
AnnaBridge	157:e7ca05fa8600	3747	*/
AnnaBridge	157:e7ca05fa8600	3748
AnnaBridge	157:e7ca05fa8600	3749	/** @defgroup ADC_LL_EF_IT_Management ADC IT management
AnnaBridge	157:e7ca05fa8600	3750	* @{
AnnaBridge	157:e7ca05fa8600	3751	*/
AnnaBridge	157:e7ca05fa8600	3752
AnnaBridge	157:e7ca05fa8600	3753	/**
AnnaBridge	157:e7ca05fa8600	3754	* @brief Enable ADC ready.
AnnaBridge	157:e7ca05fa8600	3755	* @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY
AnnaBridge	157:e7ca05fa8600	3756	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3757	* @retval None
AnnaBridge	157:e7ca05fa8600	3758	*/
AnnaBridge	157:e7ca05fa8600	3759	__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3760	{
AnnaBridge	157:e7ca05fa8600	3761	SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	157:e7ca05fa8600	3762	}
AnnaBridge	157:e7ca05fa8600	3763
AnnaBridge	157:e7ca05fa8600	3764	/**
AnnaBridge	157:e7ca05fa8600	3765	* @brief Enable interruption ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3766	* @rmtoll IER EOCIE LL_ADC_EnableIT_EOC
AnnaBridge	157:e7ca05fa8600	3767	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3768	* @retval None
AnnaBridge	157:e7ca05fa8600	3769	*/
AnnaBridge	157:e7ca05fa8600	3770	__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3771	{
AnnaBridge	157:e7ca05fa8600	3772	SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	157:e7ca05fa8600	3773	}
AnnaBridge	157:e7ca05fa8600	3774
AnnaBridge	157:e7ca05fa8600	3775	/**
AnnaBridge	157:e7ca05fa8600	3776	* @brief Enable interruption ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3777	* @rmtoll IER EOSEQIE LL_ADC_EnableIT_EOS
AnnaBridge	157:e7ca05fa8600	3778	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3779	* @retval None
AnnaBridge	157:e7ca05fa8600	3780	*/
AnnaBridge	157:e7ca05fa8600	3781	__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3782	{
AnnaBridge	157:e7ca05fa8600	3783	SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	157:e7ca05fa8600	3784	}
AnnaBridge	157:e7ca05fa8600	3785
AnnaBridge	157:e7ca05fa8600	3786	/**
AnnaBridge	157:e7ca05fa8600	3787	* @brief Enable ADC group regular interruption overrun.
AnnaBridge	157:e7ca05fa8600	3788	* @rmtoll IER OVRIE LL_ADC_EnableIT_OVR
AnnaBridge	157:e7ca05fa8600	3789	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3790	* @retval None
AnnaBridge	157:e7ca05fa8600	3791	*/
AnnaBridge	157:e7ca05fa8600	3792	__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3793	{
AnnaBridge	157:e7ca05fa8600	3794	SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	157:e7ca05fa8600	3795	}
AnnaBridge	157:e7ca05fa8600	3796
AnnaBridge	157:e7ca05fa8600	3797	/**
AnnaBridge	157:e7ca05fa8600	3798	* @brief Enable interruption ADC group regular end of sampling.
AnnaBridge	157:e7ca05fa8600	3799	* @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP
AnnaBridge	157:e7ca05fa8600	3800	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3801	* @retval None
AnnaBridge	157:e7ca05fa8600	3802	*/
AnnaBridge	157:e7ca05fa8600	3803	__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3804	{
AnnaBridge	157:e7ca05fa8600	3805	SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	157:e7ca05fa8600	3806	}
AnnaBridge	157:e7ca05fa8600	3807
AnnaBridge	157:e7ca05fa8600	3808	/**
AnnaBridge	157:e7ca05fa8600	3809	* @brief Enable interruption ADC analog watchdog 1.
AnnaBridge	157:e7ca05fa8600	3810	* @rmtoll IER AWDIE LL_ADC_EnableIT_AWD1
AnnaBridge	157:e7ca05fa8600	3811	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3812	* @retval None
AnnaBridge	157:e7ca05fa8600	3813	*/
AnnaBridge	157:e7ca05fa8600	3814	__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3815	{
AnnaBridge	157:e7ca05fa8600	3816	SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	157:e7ca05fa8600	3817	}
AnnaBridge	157:e7ca05fa8600	3818
AnnaBridge	157:e7ca05fa8600	3819	/**
AnnaBridge	157:e7ca05fa8600	3820	* @brief Enable interruption ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3821	* @rmtoll IER EOCALIE LL_ADC_EnableIT_EOCAL
AnnaBridge	157:e7ca05fa8600	3822	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3823	* @retval None
AnnaBridge	157:e7ca05fa8600	3824	*/
AnnaBridge	157:e7ca05fa8600	3825	__STATIC_INLINE void LL_ADC_EnableIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3826	{
AnnaBridge	157:e7ca05fa8600	3827	SET_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
AnnaBridge	157:e7ca05fa8600	3828	}
AnnaBridge	157:e7ca05fa8600	3829
AnnaBridge	157:e7ca05fa8600	3830	/**
AnnaBridge	157:e7ca05fa8600	3831	* @brief Disable interruption ADC ready.
AnnaBridge	157:e7ca05fa8600	3832	* @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY
AnnaBridge	157:e7ca05fa8600	3833	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3834	* @retval None
AnnaBridge	157:e7ca05fa8600	3835	*/
AnnaBridge	157:e7ca05fa8600	3836	__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3837	{
AnnaBridge	157:e7ca05fa8600	3838	CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	157:e7ca05fa8600	3839	}
AnnaBridge	157:e7ca05fa8600	3840
AnnaBridge	157:e7ca05fa8600	3841	/**
AnnaBridge	157:e7ca05fa8600	3842	* @brief Disable interruption ADC group regular end of unitary conversion.
AnnaBridge	157:e7ca05fa8600	3843	* @rmtoll IER EOCIE LL_ADC_DisableIT_EOC
AnnaBridge	157:e7ca05fa8600	3844	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3845	* @retval None
AnnaBridge	157:e7ca05fa8600	3846	*/
AnnaBridge	157:e7ca05fa8600	3847	__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3848	{
AnnaBridge	157:e7ca05fa8600	3849	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	157:e7ca05fa8600	3850	}
AnnaBridge	157:e7ca05fa8600	3851
AnnaBridge	157:e7ca05fa8600	3852	/**
AnnaBridge	157:e7ca05fa8600	3853	* @brief Disable interruption ADC group regular end of sequence conversions.
AnnaBridge	157:e7ca05fa8600	3854	* @rmtoll IER EOSEQIE LL_ADC_DisableIT_EOS
AnnaBridge	157:e7ca05fa8600	3855	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3856	* @retval None
AnnaBridge	157:e7ca05fa8600	3857	*/
AnnaBridge	157:e7ca05fa8600	3858	__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3859	{
AnnaBridge	157:e7ca05fa8600	3860	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	157:e7ca05fa8600	3861	}
AnnaBridge	157:e7ca05fa8600	3862
AnnaBridge	157:e7ca05fa8600	3863	/**
AnnaBridge	157:e7ca05fa8600	3864	* @brief Disable interruption ADC group regular overrun.
AnnaBridge	157:e7ca05fa8600	3865	* @rmtoll IER OVRIE LL_ADC_DisableIT_OVR
AnnaBridge	157:e7ca05fa8600	3866	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3867	* @retval None
AnnaBridge	157:e7ca05fa8600	3868	*/
AnnaBridge	157:e7ca05fa8600	3869	__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3870	{
AnnaBridge	157:e7ca05fa8600	3871	CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	157:e7ca05fa8600	3872	}
AnnaBridge	157:e7ca05fa8600	3873
AnnaBridge	157:e7ca05fa8600	3874	/**
AnnaBridge	157:e7ca05fa8600	3875	* @brief Disable interruption ADC group regular end of sampling.
AnnaBridge	157:e7ca05fa8600	3876	* @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP
AnnaBridge	157:e7ca05fa8600	3877	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3878	* @retval None
AnnaBridge	157:e7ca05fa8600	3879	*/
AnnaBridge	157:e7ca05fa8600	3880	__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3881	{
AnnaBridge	157:e7ca05fa8600	3882	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	157:e7ca05fa8600	3883	}
AnnaBridge	157:e7ca05fa8600	3884
AnnaBridge	157:e7ca05fa8600	3885	/**
AnnaBridge	157:e7ca05fa8600	3886	* @brief Disable interruption ADC analog watchdog 1.
AnnaBridge	157:e7ca05fa8600	3887	* @rmtoll IER AWDIE LL_ADC_DisableIT_AWD1
AnnaBridge	157:e7ca05fa8600	3888	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3889	* @retval None
AnnaBridge	157:e7ca05fa8600	3890	*/
AnnaBridge	157:e7ca05fa8600	3891	__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3892	{
AnnaBridge	157:e7ca05fa8600	3893	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	157:e7ca05fa8600	3894	}
AnnaBridge	157:e7ca05fa8600	3895
AnnaBridge	157:e7ca05fa8600	3896	/**
AnnaBridge	157:e7ca05fa8600	3897	* @brief Disable interruption ADC end of calibration.
AnnaBridge	157:e7ca05fa8600	3898	* @rmtoll IER EOCALIE LL_ADC_DisableIT_EOCAL
AnnaBridge	157:e7ca05fa8600	3899	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3900	* @retval None
AnnaBridge	157:e7ca05fa8600	3901	*/
AnnaBridge	157:e7ca05fa8600	3902	__STATIC_INLINE void LL_ADC_DisableIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3903	{
AnnaBridge	157:e7ca05fa8600	3904	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
AnnaBridge	157:e7ca05fa8600	3905	}
AnnaBridge	157:e7ca05fa8600	3906
AnnaBridge	157:e7ca05fa8600	3907	/**
AnnaBridge	157:e7ca05fa8600	3908	* @brief Get state of interruption ADC ready
AnnaBridge	157:e7ca05fa8600	3909	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3910	* @rmtoll IER ADRDYIE LL_ADC_IsEnabledIT_ADRDY
AnnaBridge	157:e7ca05fa8600	3911	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3912	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3913	*/
AnnaBridge	157:e7ca05fa8600	3914	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3915	{
AnnaBridge	157:e7ca05fa8600	3916	return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
AnnaBridge	157:e7ca05fa8600	3917	}
AnnaBridge	157:e7ca05fa8600	3918
AnnaBridge	157:e7ca05fa8600	3919	/**
AnnaBridge	157:e7ca05fa8600	3920	* @brief Get state of interruption ADC group regular end of unitary conversion
AnnaBridge	157:e7ca05fa8600	3921	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3922	* @rmtoll IER EOCIE LL_ADC_IsEnabledIT_EOC
AnnaBridge	157:e7ca05fa8600	3923	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3924	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3925	*/
AnnaBridge	157:e7ca05fa8600	3926	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3927	{
AnnaBridge	157:e7ca05fa8600	3928	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
AnnaBridge	157:e7ca05fa8600	3929	}
AnnaBridge	157:e7ca05fa8600	3930
AnnaBridge	157:e7ca05fa8600	3931	/**
AnnaBridge	157:e7ca05fa8600	3932	* @brief Get state of interruption ADC group regular end of sequence conversions
AnnaBridge	157:e7ca05fa8600	3933	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3934	* @rmtoll IER EOSEQIE LL_ADC_IsEnabledIT_EOS
AnnaBridge	157:e7ca05fa8600	3935	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3936	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3937	*/
AnnaBridge	157:e7ca05fa8600	3938	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3939	{
AnnaBridge	157:e7ca05fa8600	3940	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
AnnaBridge	157:e7ca05fa8600	3941	}
AnnaBridge	157:e7ca05fa8600	3942
AnnaBridge	157:e7ca05fa8600	3943	/**
AnnaBridge	157:e7ca05fa8600	3944	* @brief Get state of interruption ADC group regular overrun
AnnaBridge	157:e7ca05fa8600	3945	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3946	* @rmtoll IER OVRIE LL_ADC_IsEnabledIT_OVR
AnnaBridge	157:e7ca05fa8600	3947	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3948	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3949	*/
AnnaBridge	157:e7ca05fa8600	3950	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3951	{
AnnaBridge	157:e7ca05fa8600	3952	return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
AnnaBridge	157:e7ca05fa8600	3953	}
AnnaBridge	157:e7ca05fa8600	3954
AnnaBridge	157:e7ca05fa8600	3955	/**
AnnaBridge	157:e7ca05fa8600	3956	* @brief Get state of interruption ADC group regular end of sampling
AnnaBridge	157:e7ca05fa8600	3957	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3958	* @rmtoll IER EOSMPIE LL_ADC_IsEnabledIT_EOSMP
AnnaBridge	157:e7ca05fa8600	3959	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3960	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3961	*/
AnnaBridge	157:e7ca05fa8600	3962	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3963	{
AnnaBridge	157:e7ca05fa8600	3964	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
AnnaBridge	157:e7ca05fa8600	3965	}
AnnaBridge	157:e7ca05fa8600	3966
AnnaBridge	157:e7ca05fa8600	3967	/**
AnnaBridge	157:e7ca05fa8600	3968	* @brief Get state of interruption ADC analog watchdog 1
AnnaBridge	157:e7ca05fa8600	3969	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3970	* @rmtoll IER AWDIE LL_ADC_IsEnabledIT_AWD1
AnnaBridge	157:e7ca05fa8600	3971	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3972	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3973	*/
AnnaBridge	157:e7ca05fa8600	3974	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3975	{
AnnaBridge	157:e7ca05fa8600	3976	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
AnnaBridge	157:e7ca05fa8600	3977	}
AnnaBridge	157:e7ca05fa8600	3978
AnnaBridge	157:e7ca05fa8600	3979	/**
AnnaBridge	157:e7ca05fa8600	3980	* @brief Get state of interruption ADC end of calibration
AnnaBridge	157:e7ca05fa8600	3981	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	157:e7ca05fa8600	3982	* @rmtoll IER EOCALIE LL_ADC_IsEnabledIT_EOCAL
AnnaBridge	157:e7ca05fa8600	3983	* @param ADCx ADC instance
AnnaBridge	157:e7ca05fa8600	3984	* @retval State of bit (1 or 0).
AnnaBridge	157:e7ca05fa8600	3985	*/
AnnaBridge	157:e7ca05fa8600	3986	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	157:e7ca05fa8600	3987	{
AnnaBridge	157:e7ca05fa8600	3988	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOCAL) == (LL_ADC_IT_EOCAL));
AnnaBridge	157:e7ca05fa8600	3989	}
AnnaBridge	157:e7ca05fa8600	3990
AnnaBridge	157:e7ca05fa8600	3991	/**
AnnaBridge	157:e7ca05fa8600	3992	* @}
AnnaBridge	157:e7ca05fa8600	3993	*/
AnnaBridge	157:e7ca05fa8600	3994
AnnaBridge	157:e7ca05fa8600	3995	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	157:e7ca05fa8600	3996	/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	157:e7ca05fa8600	3997	* @{
AnnaBridge	157:e7ca05fa8600	3998	*/
AnnaBridge	157:e7ca05fa8600	3999
AnnaBridge	157:e7ca05fa8600	4000	/* Initialization of some features of ADC common parameters and multimode */
AnnaBridge	157:e7ca05fa8600	4001	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
AnnaBridge	157:e7ca05fa8600	4002	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct);
AnnaBridge	157:e7ca05fa8600	4003	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
AnnaBridge	157:e7ca05fa8600	4004
AnnaBridge	157:e7ca05fa8600	4005	/* De-initialization of ADC instance */
AnnaBridge	157:e7ca05fa8600	4006	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
AnnaBridge	157:e7ca05fa8600	4007
AnnaBridge	157:e7ca05fa8600	4008	/* Initialization of some features of ADC instance */
AnnaBridge	157:e7ca05fa8600	4009	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct);
AnnaBridge	157:e7ca05fa8600	4010	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
AnnaBridge	157:e7ca05fa8600	4011
AnnaBridge	157:e7ca05fa8600	4012	/* Initialization of some features of ADC instance and ADC group regular */
AnnaBridge	157:e7ca05fa8600	4013	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct);
AnnaBridge	157:e7ca05fa8600	4014	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
AnnaBridge	157:e7ca05fa8600	4015
AnnaBridge	157:e7ca05fa8600	4016	/**
AnnaBridge	157:e7ca05fa8600	4017	* @}
AnnaBridge	157:e7ca05fa8600	4018	*/
AnnaBridge	157:e7ca05fa8600	4019	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	157:e7ca05fa8600	4020
AnnaBridge	157:e7ca05fa8600	4021	/**
AnnaBridge	157:e7ca05fa8600	4022	* @}
AnnaBridge	157:e7ca05fa8600	4023	*/
AnnaBridge	157:e7ca05fa8600	4024
AnnaBridge	157:e7ca05fa8600	4025	/**
AnnaBridge	157:e7ca05fa8600	4026	* @}
AnnaBridge	157:e7ca05fa8600	4027	*/
AnnaBridge	157:e7ca05fa8600	4028
AnnaBridge	157:e7ca05fa8600	4029	#endif /* ADC1 */
AnnaBridge	157:e7ca05fa8600	4030
AnnaBridge	157:e7ca05fa8600	4031	/**
AnnaBridge	157:e7ca05fa8600	4032	* @}
AnnaBridge	157:e7ca05fa8600	4033	*/
AnnaBridge	157:e7ca05fa8600	4034
AnnaBridge	157:e7ca05fa8600	4035	#ifdef __cplusplus
AnnaBridge	157:e7ca05fa8600	4036	}
AnnaBridge	157:e7ca05fa8600	4037	#endif
AnnaBridge	157:e7ca05fa8600	4038
AnnaBridge	157:e7ca05fa8600	4039	#endif /* __STM32L0xx_LL_ADC_H */
AnnaBridge	157:e7ca05fa8600	4040
AnnaBridge	157:e7ca05fa8600	4041	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/