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TARGET_NUCLEO_F412ZG/TOOLCHAIN_IAR/stm32f4xx_ll_dac.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:: AnnaBridge
Date:: Thu Nov 08 11:45:42 2018 +0000
Revision:: 171:3a7713b1edbc
Parent:: TARGET_NUCLEO_F412ZG/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dac.h@163:e59c8e839560

mbed library. Release version 164

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	145:64910690c574	1	/**
AnnaBridge	145:64910690c574	2	******************************************************************************
AnnaBridge	145:64910690c574	3	* @file stm32f4xx_ll_dac.h
AnnaBridge	145:64910690c574	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @brief Header file of DAC LL module.
AnnaBridge	145:64910690c574	6	******************************************************************************
AnnaBridge	145:64910690c574	7	* @attention
AnnaBridge	145:64910690c574	8	*
AnnaBridge	145:64910690c574	9	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	145:64910690c574	10	*
AnnaBridge	145:64910690c574	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	145:64910690c574	12	* are permitted provided that the following conditions are met:
AnnaBridge	145:64910690c574	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	145:64910690c574	14	* this list of conditions and the following disclaimer.
AnnaBridge	145:64910690c574	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	145:64910690c574	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	145:64910690c574	17	* and/or other materials provided with the distribution.
AnnaBridge	145:64910690c574	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	145:64910690c574	19	* may be used to endorse or promote products derived from this software
AnnaBridge	145:64910690c574	20	* without specific prior written permission.
AnnaBridge	145:64910690c574	21	*
AnnaBridge	145:64910690c574	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	145:64910690c574	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	145:64910690c574	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	145:64910690c574	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	145:64910690c574	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	145:64910690c574	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	145:64910690c574	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	145:64910690c574	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	145:64910690c574	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	145:64910690c574	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	145:64910690c574	32	*
AnnaBridge	145:64910690c574	33	******************************************************************************
AnnaBridge	145:64910690c574	34	*/
AnnaBridge	145:64910690c574	35
AnnaBridge	145:64910690c574	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	145:64910690c574	37	#ifndef __STM32F4xx_LL_DAC_H
AnnaBridge	145:64910690c574	38	#define __STM32F4xx_LL_DAC_H
AnnaBridge	145:64910690c574	39
AnnaBridge	145:64910690c574	40	#ifdef __cplusplus
AnnaBridge	145:64910690c574	41	extern "C" {
AnnaBridge	145:64910690c574	42	#endif
AnnaBridge	145:64910690c574	43
AnnaBridge	145:64910690c574	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	145:64910690c574	45	#include "stm32f4xx.h"
AnnaBridge	145:64910690c574	46
AnnaBridge	145:64910690c574	47	/** @addtogroup STM32F4xx_LL_Driver
AnnaBridge	145:64910690c574	48	* @{
AnnaBridge	145:64910690c574	49	*/
AnnaBridge	145:64910690c574	50
AnnaBridge	145:64910690c574	51	#if defined(DAC)
AnnaBridge	145:64910690c574	52
AnnaBridge	145:64910690c574	53	/** @defgroup DAC_LL DAC
AnnaBridge	145:64910690c574	54	* @{
AnnaBridge	145:64910690c574	55	*/
AnnaBridge	145:64910690c574	56
AnnaBridge	145:64910690c574	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	145:64910690c574	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	59
AnnaBridge	145:64910690c574	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	61	/** @defgroup DAC_LL_Private_Constants DAC Private Constants
AnnaBridge	145:64910690c574	62	* @{
AnnaBridge	145:64910690c574	63	*/
AnnaBridge	145:64910690c574	64
AnnaBridge	145:64910690c574	65	/* Internal masks for DAC channels definition */
AnnaBridge	145:64910690c574	66	/* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */
AnnaBridge	145:64910690c574	67	/* - channel bits position into register CR */
AnnaBridge	145:64910690c574	68	/* - channel bits position into register SWTRIG */
AnnaBridge	145:64910690c574	69	/* - channel register offset of data holding register DHRx */
AnnaBridge	145:64910690c574	70	/* - channel register offset of data output register DORx */
AnnaBridge	145:64910690c574	71	#define DAC_CR_CH1_BITOFFSET 0U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */
AnnaBridge	145:64910690c574	72	#define DAC_CR_CH2_BITOFFSET 16U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */
AnnaBridge	145:64910690c574	73	#define DAC_CR_CHX_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET \| DAC_CR_CH2_BITOFFSET)
AnnaBridge	145:64910690c574	74
AnnaBridge	145:64910690c574	75	#define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
AnnaBridge	145:64910690c574	76	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	77	#define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
AnnaBridge	145:64910690c574	78	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 \| DAC_SWTR_CH2)
AnnaBridge	145:64910690c574	79	#else
AnnaBridge	145:64910690c574	80	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1)
AnnaBridge	145:64910690c574	81	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	82
AnnaBridge	145:64910690c574	83	#define DAC_REG_DHR12R1_REGOFFSET 0x00000000U /* Register DHR12Rx channel 1 taken as reference */
AnnaBridge	145:64910690c574	84	#define DAC_REG_DHR12L1_REGOFFSET 0x00100000U /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */
AnnaBridge	145:64910690c574	85	#define DAC_REG_DHR8R1_REGOFFSET 0x02000000U /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */
AnnaBridge	145:64910690c574	86	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	87	#define DAC_REG_DHR12R2_REGOFFSET 0x00030000U /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
AnnaBridge	145:64910690c574	88	#define DAC_REG_DHR12L2_REGOFFSET 0x00400000U /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
AnnaBridge	145:64910690c574	89	#define DAC_REG_DHR8R2_REGOFFSET 0x05000000U /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
AnnaBridge	145:64910690c574	90	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	91	#define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U
AnnaBridge	145:64910690c574	92	#define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U
AnnaBridge	145:64910690c574	93	#define DAC_REG_DHR8RX_REGOFFSET_MASK 0x0F000000U
AnnaBridge	145:64910690c574	94	#define DAC_REG_DHRX_REGOFFSET_MASK (DAC_REG_DHR12RX_REGOFFSET_MASK \| DAC_REG_DHR12LX_REGOFFSET_MASK \| DAC_REG_DHR8RX_REGOFFSET_MASK)
AnnaBridge	145:64910690c574	95
AnnaBridge	145:64910690c574	96	#define DAC_REG_DOR1_REGOFFSET 0x00000000U /* Register DORx channel 1 taken as reference */
AnnaBridge	145:64910690c574	97	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	98	#define DAC_REG_DOR2_REGOFFSET 0x10000000U /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */
AnnaBridge	145:64910690c574	99	#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DOR2_REGOFFSET)
AnnaBridge	145:64910690c574	100	#else
AnnaBridge	145:64910690c574	101	#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET)
AnnaBridge	145:64910690c574	102	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	103
AnnaBridge	145:64910690c574	104	/* DAC registers bits positions */
AnnaBridge	145:64910690c574	105	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	106	#define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS 16U /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */
AnnaBridge	145:64910690c574	107	#define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS 20U /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */
AnnaBridge	145:64910690c574	108	#define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS 8U /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */
AnnaBridge	145:64910690c574	109	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	110
AnnaBridge	145:64910690c574	111	/* Miscellaneous data */
AnnaBridge	145:64910690c574	112	#define DAC_DIGITAL_SCALE_12BITS 4095U /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */
AnnaBridge	145:64910690c574	113
AnnaBridge	145:64910690c574	114	/**
AnnaBridge	145:64910690c574	115	* @}
AnnaBridge	145:64910690c574	116	*/
AnnaBridge	145:64910690c574	117
AnnaBridge	145:64910690c574	118
AnnaBridge	145:64910690c574	119	/* Private macros ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	120	/** @defgroup DAC_LL_Private_Macros DAC Private Macros
AnnaBridge	145:64910690c574	121	* @{
AnnaBridge	145:64910690c574	122	*/
AnnaBridge	145:64910690c574	123
AnnaBridge	145:64910690c574	124	/**
AnnaBridge	145:64910690c574	125	* @brief Driver macro reserved for internal use: isolate bits with the
AnnaBridge	145:64910690c574	126	* selected mask and shift them to the register LSB
AnnaBridge	145:64910690c574	127	* (shift mask on register position bit 0).
AnnaBridge	145:64910690c574	128	* @param __BITS__ Bits in register 32 bits
AnnaBridge	145:64910690c574	129	* @param __MASK__ Mask in register 32 bits
AnnaBridge	145:64910690c574	130	* @retval Bits in register 32 bits
AnnaBridge	145:64910690c574	131	*/
AnnaBridge	145:64910690c574	132	#define __DAC_MASK_SHIFT(__BITS__, __MASK__) \
AnnaBridge	145:64910690c574	133	(((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
AnnaBridge	145:64910690c574	134
AnnaBridge	145:64910690c574	135	/**
AnnaBridge	145:64910690c574	136	* @brief Driver macro reserved for internal use: set a pointer to
AnnaBridge	145:64910690c574	137	* a register from a register basis from which an offset
AnnaBridge	145:64910690c574	138	* is applied.
AnnaBridge	145:64910690c574	139	* @param __REG__ Register basis from which the offset is applied.
AnnaBridge	163:e59c8e839560	140	* @param __REG_OFFFSET__ Offset to be applied (unit number of registers).
AnnaBridge	145:64910690c574	141	* @retval Pointer to register address
AnnaBridge	145:64910690c574	142	*/
AnnaBridge	145:64910690c574	143	#define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
AnnaBridge	145:64910690c574	144	((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
AnnaBridge	145:64910690c574	145
AnnaBridge	145:64910690c574	146	/**
AnnaBridge	145:64910690c574	147	* @}
AnnaBridge	145:64910690c574	148	*/
AnnaBridge	145:64910690c574	149
AnnaBridge	145:64910690c574	150
AnnaBridge	145:64910690c574	151	/* Exported types ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	152	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	153	/** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
AnnaBridge	145:64910690c574	154	* @{
AnnaBridge	145:64910690c574	155	*/
AnnaBridge	145:64910690c574	156
AnnaBridge	145:64910690c574	157	/**
AnnaBridge	145:64910690c574	158	* @brief Structure definition of some features of DAC instance.
AnnaBridge	145:64910690c574	159	*/
AnnaBridge	145:64910690c574	160	typedef struct
AnnaBridge	145:64910690c574	161	{
AnnaBridge	145:64910690c574	162	uint32_t TriggerSource; /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	145:64910690c574	163	This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
AnnaBridge	145:64910690c574	164
AnnaBridge	145:64910690c574	165	This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */
AnnaBridge	145:64910690c574	166
AnnaBridge	145:64910690c574	167	uint32_t WaveAutoGeneration; /*!< Set the waveform automatic generation mode for the selected DAC channel.
AnnaBridge	145:64910690c574	168	This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
AnnaBridge	145:64910690c574	169
AnnaBridge	145:64910690c574	170	This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */
AnnaBridge	145:64910690c574	171
AnnaBridge	145:64910690c574	172	uint32_t WaveAutoGenerationConfig; /*!< Set the waveform automatic generation mode for the selected DAC channel.
AnnaBridge	145:64910690c574	173	If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
AnnaBridge	145:64910690c574	174	If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
AnnaBridge	145:64910690c574	175	@note If waveform automatic generation mode is disabled, this parameter is discarded.
AnnaBridge	145:64910690c574	176
AnnaBridge	145:64910690c574	177	This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */
AnnaBridge	145:64910690c574	178
AnnaBridge	145:64910690c574	179	uint32_t OutputBuffer; /*!< Set the output buffer for the selected DAC channel.
AnnaBridge	145:64910690c574	180	This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
AnnaBridge	145:64910690c574	181
AnnaBridge	145:64910690c574	182	This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */
AnnaBridge	145:64910690c574	183
AnnaBridge	145:64910690c574	184	} LL_DAC_InitTypeDef;
AnnaBridge	145:64910690c574	185
AnnaBridge	145:64910690c574	186	/**
AnnaBridge	145:64910690c574	187	* @}
AnnaBridge	145:64910690c574	188	*/
AnnaBridge	145:64910690c574	189	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	190
AnnaBridge	145:64910690c574	191	/* Exported constants --------------------------------------------------------*/
AnnaBridge	145:64910690c574	192	/** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
AnnaBridge	145:64910690c574	193	* @{
AnnaBridge	145:64910690c574	194	*/
AnnaBridge	145:64910690c574	195
AnnaBridge	145:64910690c574	196	/** @defgroup DAC_LL_EC_GET_FLAG DAC flags
AnnaBridge	145:64910690c574	197	* @brief Flags defines which can be used with LL_DAC_ReadReg function
AnnaBridge	145:64910690c574	198	* @{
AnnaBridge	145:64910690c574	199	*/
AnnaBridge	145:64910690c574	200	/* DAC channel 1 flags */
AnnaBridge	145:64910690c574	201	#define LL_DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) /!< DAC channel 1 flag DMA underrun /
AnnaBridge	145:64910690c574	202
AnnaBridge	145:64910690c574	203	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	204	/* DAC channel 2 flags */
AnnaBridge	145:64910690c574	205	#define LL_DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) /!< DAC channel 2 flag DMA underrun /
AnnaBridge	145:64910690c574	206	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	207	/**
AnnaBridge	145:64910690c574	208	* @}
AnnaBridge	145:64910690c574	209	*/
AnnaBridge	145:64910690c574	210
AnnaBridge	145:64910690c574	211	/** @defgroup DAC_LL_EC_IT DAC interruptions
AnnaBridge	145:64910690c574	212	* @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions
AnnaBridge	145:64910690c574	213	* @{
AnnaBridge	145:64910690c574	214	*/
AnnaBridge	145:64910690c574	215	#define LL_DAC_IT_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /!< DAC channel 1 interruption DMA underrun /
AnnaBridge	145:64910690c574	216	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	217	#define LL_DAC_IT_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /!< DAC channel 2 interruption DMA underrun /
AnnaBridge	145:64910690c574	218	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	219	/**
AnnaBridge	145:64910690c574	220	* @}
AnnaBridge	145:64910690c574	221	*/
AnnaBridge	145:64910690c574	222
AnnaBridge	145:64910690c574	223	/** @defgroup DAC_LL_EC_CHANNEL DAC channels
AnnaBridge	145:64910690c574	224	* @{
AnnaBridge	145:64910690c574	225	*/
AnnaBridge	145:64910690c574	226	#define LL_DAC_CHANNEL_1 (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DHR12R1_REGOFFSET \| DAC_REG_DHR12L1_REGOFFSET \| DAC_REG_DHR8R1_REGOFFSET \| DAC_CR_CH1_BITOFFSET \| DAC_SWTR_CH1) /!< DAC channel 1 /
AnnaBridge	145:64910690c574	227	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	228	#define LL_DAC_CHANNEL_2 (DAC_REG_DOR2_REGOFFSET \| DAC_REG_DHR12R2_REGOFFSET \| DAC_REG_DHR12L2_REGOFFSET \| DAC_REG_DHR8R2_REGOFFSET \| DAC_CR_CH2_BITOFFSET \| DAC_SWTR_CH2) /!< DAC channel 2 /
AnnaBridge	145:64910690c574	229	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	230	/**
AnnaBridge	145:64910690c574	231	* @}
AnnaBridge	145:64910690c574	232	*/
AnnaBridge	145:64910690c574	233
AnnaBridge	145:64910690c574	234	/** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
AnnaBridge	145:64910690c574	235	* @{
AnnaBridge	145:64910690c574	236	*/
AnnaBridge	145:64910690c574	237	#define LL_DAC_TRIG_SOFTWARE (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger internal (SW start) /
AnnaBridge	145:64910690c574	238	#define LL_DAC_TRIG_EXT_TIM2_TRGO (DAC_CR_TSEL1_2 ) /!< DAC channel conversion trigger from external IP: TIM2 TRGO. /
AnnaBridge	145:64910690c574	239	#define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM8 TRGO. /
AnnaBridge	145:64910690c574	240	#define LL_DAC_TRIG_EXT_TIM4_TRGO (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM4 TRGO. /
AnnaBridge	145:64910690c574	241	#define LL_DAC_TRIG_EXT_TIM6_TRGO 0x00000000U /!< DAC channel conversion trigger from external IP: TIM6 TRGO. /
AnnaBridge	145:64910690c574	242	#define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /!< DAC channel conversion trigger from external IP: TIM7 TRGO. /
AnnaBridge	145:64910690c574	243	#define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM5 TRGO. /
AnnaBridge	145:64910690c574	244	#define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 ) /!< DAC channel conversion trigger from external IP: external interrupt line 9. /
AnnaBridge	145:64910690c574	245	/**
AnnaBridge	145:64910690c574	246	* @}
AnnaBridge	145:64910690c574	247	*/
AnnaBridge	145:64910690c574	248
AnnaBridge	145:64910690c574	249	/** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
AnnaBridge	145:64910690c574	250	* @{
AnnaBridge	145:64910690c574	251	*/
AnnaBridge	145:64910690c574	252	#define LL_DAC_WAVE_AUTO_GENERATION_NONE 0x00000000U /!< DAC channel wave auto generation mode disabled. /
AnnaBridge	145:64910690c574	253	#define LL_DAC_WAVE_AUTO_GENERATION_NOISE (DAC_CR_WAVE1_0) /!< DAC channel wave auto generation mode enabled, set generated noise waveform. /
AnnaBridge	145:64910690c574	254	#define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1) /!< DAC channel wave auto generation mode enabled, set generated triangle waveform. /
AnnaBridge	145:64910690c574	255	/**
AnnaBridge	145:64910690c574	256	* @}
AnnaBridge	145:64910690c574	257	*/
AnnaBridge	145:64910690c574	258
AnnaBridge	145:64910690c574	259	/** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
AnnaBridge	145:64910690c574	260	* @{
AnnaBridge	145:64910690c574	261	*/
AnnaBridge	145:64910690c574	262	#define LL_DAC_NOISE_LFSR_UNMASK_BIT0 0x00000000U /!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel /
AnnaBridge	145:64910690c574	263	#define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	264	#define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	265	#define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	266	#define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	267	#define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	268	#define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	269	#define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	270	#define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	271	#define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	272	#define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	273	#define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	274	/**
AnnaBridge	145:64910690c574	275	* @}
AnnaBridge	145:64910690c574	276	*/
AnnaBridge	145:64910690c574	277
AnnaBridge	145:64910690c574	278	/** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
AnnaBridge	145:64910690c574	279	* @{
AnnaBridge	145:64910690c574	280	*/
AnnaBridge	145:64910690c574	281	#define LL_DAC_TRIANGLE_AMPLITUDE_1 0x00000000U /!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	282	#define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	283	#define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	284	#define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	285	#define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	286	#define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	287	#define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	288	#define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	289	#define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	290	#define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	291	#define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	292	#define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	293	/**
AnnaBridge	145:64910690c574	294	* @}
AnnaBridge	145:64910690c574	295	*/
AnnaBridge	145:64910690c574	296
AnnaBridge	145:64910690c574	297	/** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
AnnaBridge	145:64910690c574	298	* @{
AnnaBridge	145:64910690c574	299	*/
AnnaBridge	145:64910690c574	300	#define LL_DAC_OUTPUT_BUFFER_ENABLE 0x00000000U /!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption /
AnnaBridge	145:64910690c574	301	#define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_CR_BOFF1) /!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption /
AnnaBridge	145:64910690c574	302	/**
AnnaBridge	145:64910690c574	303	* @}
AnnaBridge	145:64910690c574	304	*/
AnnaBridge	145:64910690c574	305
AnnaBridge	145:64910690c574	306
AnnaBridge	145:64910690c574	307	/** @defgroup DAC_LL_EC_RESOLUTION DAC channel output resolution
AnnaBridge	145:64910690c574	308	* @{
AnnaBridge	145:64910690c574	309	*/
AnnaBridge	145:64910690c574	310	#define LL_DAC_RESOLUTION_12B 0x00000000U /!< DAC channel resolution 12 bits /
AnnaBridge	145:64910690c574	311	#define LL_DAC_RESOLUTION_8B 0x00000002U /!< DAC channel resolution 8 bits /
AnnaBridge	145:64910690c574	312	/**
AnnaBridge	145:64910690c574	313	* @}
AnnaBridge	145:64910690c574	314	*/
AnnaBridge	145:64910690c574	315
AnnaBridge	145:64910690c574	316	/** @defgroup DAC_LL_EC_REGISTERS DAC registers compliant with specific purpose
AnnaBridge	145:64910690c574	317	* @{
AnnaBridge	145:64910690c574	318	*/
AnnaBridge	145:64910690c574	319	/* List of DAC registers intended to be used (most commonly) with */
AnnaBridge	145:64910690c574	320	/* DMA transfer. */
AnnaBridge	145:64910690c574	321	/* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */
AnnaBridge	145:64910690c574	322	#define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12RX_REGOFFSET_MASK /!< DAC channel data holding register 12 bits right aligned /
AnnaBridge	145:64910690c574	323	#define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12LX_REGOFFSET_MASK /!< DAC channel data holding register 12 bits left aligned /
AnnaBridge	145:64910690c574	324	#define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8RX_REGOFFSET_MASK /!< DAC channel data holding register 8 bits right aligned /
AnnaBridge	145:64910690c574	325	/**
AnnaBridge	145:64910690c574	326	* @}
AnnaBridge	145:64910690c574	327	*/
AnnaBridge	145:64910690c574	328
AnnaBridge	145:64910690c574	329	/** @defgroup DAC_LL_EC_HW_DELAYS Definitions of DAC hardware constraints delays
AnnaBridge	145:64910690c574	330	* @note Only DAC IP HW delays are defined in DAC LL driver driver,
AnnaBridge	145:64910690c574	331	* not timeout values.
AnnaBridge	145:64910690c574	332	* For details on delays values, refer to descriptions in source code
AnnaBridge	145:64910690c574	333	* above each literal definition.
AnnaBridge	145:64910690c574	334	* @{
AnnaBridge	145:64910690c574	335	*/
AnnaBridge	145:64910690c574	336
AnnaBridge	145:64910690c574	337	/* Delay for DAC channel voltage settling time from DAC channel startup */
AnnaBridge	145:64910690c574	338	/* (transition from disable to enable). */
AnnaBridge	145:64910690c574	339	/* Note: DAC channel startup time depends on board application environment: */
AnnaBridge	145:64910690c574	340	/* impedance connected to DAC channel output. */
AnnaBridge	145:64910690c574	341	/* The delay below is specified under conditions: */
AnnaBridge	145:64910690c574	342	/* - voltage maximum transition (lowest to highest value) */
AnnaBridge	145:64910690c574	343	/* - until voltage reaches final value +-1LSB */
AnnaBridge	145:64910690c574	344	/* - DAC channel output buffer enabled */
AnnaBridge	145:64910690c574	345	/* - load impedance of 5kOhm (min), 50pF (max) */
AnnaBridge	145:64910690c574	346	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	145:64910690c574	347	/* parameter "tWAKEUP"). */
AnnaBridge	145:64910690c574	348	/* Unit: us */
AnnaBridge	145:64910690c574	349	#define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US 15U /!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) /
AnnaBridge	145:64910690c574	350
AnnaBridge	145:64910690c574	351	/* Delay for DAC channel voltage settling time. */
AnnaBridge	145:64910690c574	352	/* Note: DAC channel startup time depends on board application environment: */
AnnaBridge	145:64910690c574	353	/* impedance connected to DAC channel output. */
AnnaBridge	145:64910690c574	354	/* The delay below is specified under conditions: */
AnnaBridge	145:64910690c574	355	/* - voltage maximum transition (lowest to highest value) */
AnnaBridge	145:64910690c574	356	/* - until voltage reaches final value +-1LSB */
AnnaBridge	145:64910690c574	357	/* - DAC channel output buffer enabled */
AnnaBridge	145:64910690c574	358	/* - load impedance of 5kOhm min, 50pF max */
AnnaBridge	145:64910690c574	359	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	145:64910690c574	360	/* parameter "tSETTLING"). */
AnnaBridge	145:64910690c574	361	/* Unit: us */
AnnaBridge	145:64910690c574	362	#define LL_DAC_DELAY_VOLTAGE_SETTLING_US 12U /!< Delay for DAC channel voltage settling time /
AnnaBridge	145:64910690c574	363	/**
AnnaBridge	145:64910690c574	364	* @}
AnnaBridge	145:64910690c574	365	*/
AnnaBridge	145:64910690c574	366
AnnaBridge	145:64910690c574	367	/**
AnnaBridge	145:64910690c574	368	* @}
AnnaBridge	145:64910690c574	369	*/
AnnaBridge	145:64910690c574	370
AnnaBridge	145:64910690c574	371	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	372	/** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
AnnaBridge	145:64910690c574	373	* @{
AnnaBridge	145:64910690c574	374	*/
AnnaBridge	145:64910690c574	375
AnnaBridge	145:64910690c574	376	/** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
AnnaBridge	145:64910690c574	377	* @{
AnnaBridge	145:64910690c574	378	*/
AnnaBridge	145:64910690c574	379
AnnaBridge	145:64910690c574	380	/**
AnnaBridge	145:64910690c574	381	* @brief Write a value in DAC register
AnnaBridge	145:64910690c574	382	* @param __INSTANCE__ DAC Instance
AnnaBridge	145:64910690c574	383	* @param __REG__ Register to be written
AnnaBridge	145:64910690c574	384	* @param __VALUE__ Value to be written in the register
AnnaBridge	145:64910690c574	385	* @retval None
AnnaBridge	145:64910690c574	386	*/
AnnaBridge	145:64910690c574	387	#define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	145:64910690c574	388
AnnaBridge	145:64910690c574	389	/**
AnnaBridge	145:64910690c574	390	* @brief Read a value in DAC register
AnnaBridge	145:64910690c574	391	* @param __INSTANCE__ DAC Instance
AnnaBridge	145:64910690c574	392	* @param __REG__ Register to be read
AnnaBridge	145:64910690c574	393	* @retval Register value
AnnaBridge	145:64910690c574	394	*/
AnnaBridge	145:64910690c574	395	#define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	145:64910690c574	396
AnnaBridge	145:64910690c574	397	/**
AnnaBridge	145:64910690c574	398	* @}
AnnaBridge	145:64910690c574	399	*/
AnnaBridge	145:64910690c574	400
AnnaBridge	145:64910690c574	401	/** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
AnnaBridge	145:64910690c574	402	* @{
AnnaBridge	145:64910690c574	403	*/
AnnaBridge	145:64910690c574	404
AnnaBridge	145:64910690c574	405	/**
AnnaBridge	145:64910690c574	406	* @brief Helper macro to get DAC channel number in decimal format
AnnaBridge	145:64910690c574	407	* from literals LL_DAC_CHANNEL_x.
AnnaBridge	145:64910690c574	408	* Example:
AnnaBridge	145:64910690c574	409	* __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
AnnaBridge	145:64910690c574	410	* will return decimal number "1".
AnnaBridge	145:64910690c574	411	* @note The input can be a value from functions where a channel
AnnaBridge	145:64910690c574	412	* number is returned.
AnnaBridge	145:64910690c574	413	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	414	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	415	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	416	*
AnnaBridge	145:64910690c574	417	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	418	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	419	* @retval 1...2 (value "2" depending on DAC channel 2 availability)
AnnaBridge	145:64910690c574	420	*/
AnnaBridge	145:64910690c574	421	#define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	145:64910690c574	422	((__CHANNEL__) & DAC_SWTR_CHX_MASK)
AnnaBridge	145:64910690c574	423
AnnaBridge	145:64910690c574	424	/**
AnnaBridge	145:64910690c574	425	* @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
AnnaBridge	145:64910690c574	426	* from number in decimal format.
AnnaBridge	145:64910690c574	427	* Example:
AnnaBridge	145:64910690c574	428	* __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
AnnaBridge	145:64910690c574	429	* will return a data equivalent to "LL_DAC_CHANNEL_1".
AnnaBridge	145:64910690c574	430	* @note If the input parameter does not correspond to a DAC channel,
AnnaBridge	145:64910690c574	431	* this macro returns value '0'.
AnnaBridge	145:64910690c574	432	* @param __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability)
AnnaBridge	145:64910690c574	433	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	434	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	435	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	436	*
AnnaBridge	145:64910690c574	437	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	438	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	439	*/
AnnaBridge	145:64910690c574	440	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	441	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	145:64910690c574	442	(((__DECIMAL_NB__) == 1U) \
AnnaBridge	145:64910690c574	443	? ( \
AnnaBridge	145:64910690c574	444	LL_DAC_CHANNEL_1 \
AnnaBridge	145:64910690c574	445	) \
AnnaBridge	145:64910690c574	446	: \
AnnaBridge	145:64910690c574	447	(((__DECIMAL_NB__) == 2U) \
AnnaBridge	145:64910690c574	448	? ( \
AnnaBridge	145:64910690c574	449	LL_DAC_CHANNEL_2 \
AnnaBridge	145:64910690c574	450	) \
AnnaBridge	145:64910690c574	451	: \
AnnaBridge	145:64910690c574	452	( \
AnnaBridge	145:64910690c574	453	0 \
AnnaBridge	145:64910690c574	454	) \
AnnaBridge	145:64910690c574	455	) \
AnnaBridge	145:64910690c574	456	)
AnnaBridge	145:64910690c574	457	#else
AnnaBridge	145:64910690c574	458	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	145:64910690c574	459	(((__DECIMAL_NB__) == 1U) \
AnnaBridge	145:64910690c574	460	? ( \
AnnaBridge	145:64910690c574	461	LL_DAC_CHANNEL_1 \
AnnaBridge	145:64910690c574	462	) \
AnnaBridge	145:64910690c574	463	: \
AnnaBridge	145:64910690c574	464	( \
AnnaBridge	145:64910690c574	465	0 \
AnnaBridge	145:64910690c574	466	) \
AnnaBridge	145:64910690c574	467	)
AnnaBridge	145:64910690c574	468	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	469
AnnaBridge	145:64910690c574	470	/**
AnnaBridge	145:64910690c574	471	* @brief Helper macro to define the DAC conversion data full-scale digital
AnnaBridge	145:64910690c574	472	* value corresponding to the selected DAC resolution.
AnnaBridge	145:64910690c574	473	* @note DAC conversion data full-scale corresponds to voltage range
AnnaBridge	145:64910690c574	474	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	145:64910690c574	475	* (refer to reference manual).
AnnaBridge	145:64910690c574	476	* @param __DAC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	477	* @arg @ref LL_DAC_RESOLUTION_12B
AnnaBridge	145:64910690c574	478	* @arg @ref LL_DAC_RESOLUTION_8B
AnnaBridge	145:64910690c574	479	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	145:64910690c574	480	*/
AnnaBridge	145:64910690c574	481	#define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
AnnaBridge	145:64910690c574	482	((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U))
AnnaBridge	145:64910690c574	483
AnnaBridge	145:64910690c574	484	/**
AnnaBridge	145:64910690c574	485	* @brief Helper macro to calculate the DAC conversion data (unit: digital
AnnaBridge	145:64910690c574	486	* value) corresponding to a voltage (unit: mVolt).
AnnaBridge	145:64910690c574	487	* @note This helper macro is intended to provide input data in voltage
AnnaBridge	145:64910690c574	488	* rather than digital value,
AnnaBridge	145:64910690c574	489	* to be used with LL DAC functions such as
AnnaBridge	145:64910690c574	490	* @ref LL_DAC_ConvertData12RightAligned().
AnnaBridge	145:64910690c574	491	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	145:64910690c574	492	* user board environment or can be calculated using ADC measurement
AnnaBridge	145:64910690c574	493	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	163:e59c8e839560	494	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit mV)
AnnaBridge	145:64910690c574	495	* @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel
AnnaBridge	145:64910690c574	496	* (unit: mVolt).
AnnaBridge	145:64910690c574	497	* @param __DAC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	498	* @arg @ref LL_DAC_RESOLUTION_12B
AnnaBridge	145:64910690c574	499	* @arg @ref LL_DAC_RESOLUTION_8B
AnnaBridge	145:64910690c574	500	* @retval DAC conversion data (unit: digital value)
AnnaBridge	145:64910690c574	501	*/
AnnaBridge	145:64910690c574	502	#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
AnnaBridge	145:64910690c574	503	__DAC_VOLTAGE__,\
AnnaBridge	145:64910690c574	504	__DAC_RESOLUTION__) \
AnnaBridge	145:64910690c574	505	((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
AnnaBridge	145:64910690c574	506	/ (__VREFANALOG_VOLTAGE__) \
AnnaBridge	145:64910690c574	507	)
AnnaBridge	145:64910690c574	508
AnnaBridge	145:64910690c574	509	/**
AnnaBridge	145:64910690c574	510	* @}
AnnaBridge	145:64910690c574	511	*/
AnnaBridge	145:64910690c574	512
AnnaBridge	145:64910690c574	513	/**
AnnaBridge	145:64910690c574	514	* @}
AnnaBridge	145:64910690c574	515	*/
AnnaBridge	145:64910690c574	516
AnnaBridge	145:64910690c574	517
AnnaBridge	145:64910690c574	518	/* Exported functions --------------------------------------------------------*/
AnnaBridge	145:64910690c574	519	/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
AnnaBridge	145:64910690c574	520	* @{
AnnaBridge	145:64910690c574	521	*/
AnnaBridge	145:64910690c574	522	/** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels
AnnaBridge	145:64910690c574	523	* @{
AnnaBridge	145:64910690c574	524	*/
AnnaBridge	145:64910690c574	525
AnnaBridge	145:64910690c574	526	/**
AnnaBridge	145:64910690c574	527	* @brief Set the conversion trigger source for the selected DAC channel.
AnnaBridge	145:64910690c574	528	* @note For conversion trigger source to be effective, DAC trigger
AnnaBridge	145:64910690c574	529	* must be enabled using function @ref LL_DAC_EnableTrigger().
AnnaBridge	145:64910690c574	530	* @note To set conversion trigger source, DAC channel must be disabled.
AnnaBridge	145:64910690c574	531	* Otherwise, the setting is discarded.
AnnaBridge	145:64910690c574	532	* @note Availability of parameters of trigger sources from timer
AnnaBridge	145:64910690c574	533	* depends on timers availability on the selected device.
AnnaBridge	145:64910690c574	534	* @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n
AnnaBridge	145:64910690c574	535	* CR TSEL2 LL_DAC_SetTriggerSource
AnnaBridge	145:64910690c574	536	* @param DACx DAC instance
AnnaBridge	145:64910690c574	537	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	538	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	539	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	540	*
AnnaBridge	145:64910690c574	541	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	542	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	543	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	145:64910690c574	544	* @arg @ref LL_DAC_TRIG_SOFTWARE
AnnaBridge	145:64910690c574	545	* @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
AnnaBridge	145:64910690c574	546	* @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
AnnaBridge	145:64910690c574	547	* @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
AnnaBridge	145:64910690c574	548	* @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
AnnaBridge	145:64910690c574	549	* @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
AnnaBridge	145:64910690c574	550	* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
AnnaBridge	145:64910690c574	551	* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
AnnaBridge	145:64910690c574	552	* @retval None
AnnaBridge	145:64910690c574	553	*/
AnnaBridge	145:64910690c574	554	__STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
AnnaBridge	145:64910690c574	555	{
AnnaBridge	145:64910690c574	556	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	557	DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	558	TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	559	}
AnnaBridge	145:64910690c574	560
AnnaBridge	145:64910690c574	561	/**
AnnaBridge	145:64910690c574	562	* @brief Get the conversion trigger source for the selected DAC channel.
AnnaBridge	145:64910690c574	563	* @note For conversion trigger source to be effective, DAC trigger
AnnaBridge	145:64910690c574	564	* must be enabled using function @ref LL_DAC_EnableTrigger().
AnnaBridge	145:64910690c574	565	* @note Availability of parameters of trigger sources from timer
AnnaBridge	145:64910690c574	566	* depends on timers availability on the selected device.
AnnaBridge	145:64910690c574	567	* @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n
AnnaBridge	145:64910690c574	568	* CR TSEL2 LL_DAC_GetTriggerSource
AnnaBridge	145:64910690c574	569	* @param DACx DAC instance
AnnaBridge	145:64910690c574	570	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	571	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	572	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	573	*
AnnaBridge	145:64910690c574	574	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	575	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	576	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	577	* @arg @ref LL_DAC_TRIG_SOFTWARE
AnnaBridge	145:64910690c574	578	* @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
AnnaBridge	145:64910690c574	579	* @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
AnnaBridge	145:64910690c574	580	* @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
AnnaBridge	145:64910690c574	581	* @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
AnnaBridge	145:64910690c574	582	* @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
AnnaBridge	145:64910690c574	583	* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
AnnaBridge	145:64910690c574	584	* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
AnnaBridge	145:64910690c574	585	*/
AnnaBridge	145:64910690c574	586	__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	587	{
AnnaBridge	145:64910690c574	588	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	589	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	590	);
AnnaBridge	145:64910690c574	591	}
AnnaBridge	145:64910690c574	592
AnnaBridge	145:64910690c574	593	/**
AnnaBridge	145:64910690c574	594	* @brief Set the waveform automatic generation mode
AnnaBridge	145:64910690c574	595	* for the selected DAC channel.
AnnaBridge	145:64910690c574	596	* @rmtoll CR WAVE1 LL_DAC_SetWaveAutoGeneration\n
AnnaBridge	145:64910690c574	597	* CR WAVE2 LL_DAC_SetWaveAutoGeneration
AnnaBridge	145:64910690c574	598	* @param DACx DAC instance
AnnaBridge	145:64910690c574	599	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	600	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	601	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	602	*
AnnaBridge	145:64910690c574	603	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	604	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	605	* @param WaveAutoGeneration This parameter can be one of the following values:
AnnaBridge	145:64910690c574	606	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
AnnaBridge	145:64910690c574	607	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
AnnaBridge	145:64910690c574	608	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
AnnaBridge	145:64910690c574	609	* @retval None
AnnaBridge	145:64910690c574	610	*/
AnnaBridge	145:64910690c574	611	__STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
AnnaBridge	145:64910690c574	612	{
AnnaBridge	145:64910690c574	613	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	614	DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	615	WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	616	}
AnnaBridge	145:64910690c574	617
AnnaBridge	145:64910690c574	618	/**
AnnaBridge	145:64910690c574	619	* @brief Get the waveform automatic generation mode
AnnaBridge	145:64910690c574	620	* for the selected DAC channel.
AnnaBridge	145:64910690c574	621	* @rmtoll CR WAVE1 LL_DAC_GetWaveAutoGeneration\n
AnnaBridge	145:64910690c574	622	* CR WAVE2 LL_DAC_GetWaveAutoGeneration
AnnaBridge	145:64910690c574	623	* @param DACx DAC instance
AnnaBridge	145:64910690c574	624	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	625	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	626	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	627	*
AnnaBridge	145:64910690c574	628	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	629	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	630	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	631	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
AnnaBridge	145:64910690c574	632	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
AnnaBridge	145:64910690c574	633	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
AnnaBridge	145:64910690c574	634	*/
AnnaBridge	145:64910690c574	635	__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	636	{
AnnaBridge	145:64910690c574	637	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	638	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	639	);
AnnaBridge	145:64910690c574	640	}
AnnaBridge	145:64910690c574	641
AnnaBridge	145:64910690c574	642	/**
AnnaBridge	145:64910690c574	643	* @brief Set the noise waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	644	* Noise mode and parameters LFSR (linear feedback shift register).
AnnaBridge	145:64910690c574	645	* @note For wave generation to be effective, DAC channel
AnnaBridge	145:64910690c574	646	* wave generation mode must be enabled using
AnnaBridge	145:64910690c574	647	* function @ref LL_DAC_SetWaveAutoGeneration().
AnnaBridge	145:64910690c574	648	* @note This setting can be set when the selected DAC channel is disabled
AnnaBridge	145:64910690c574	649	* (otherwise, the setting operation is ignored).
AnnaBridge	145:64910690c574	650	* @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n
AnnaBridge	145:64910690c574	651	* CR MAMP2 LL_DAC_SetWaveNoiseLFSR
AnnaBridge	145:64910690c574	652	* @param DACx DAC instance
AnnaBridge	145:64910690c574	653	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	654	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	655	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	656	*
AnnaBridge	145:64910690c574	657	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	658	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	659	* @param NoiseLFSRMask This parameter can be one of the following values:
AnnaBridge	145:64910690c574	660	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
AnnaBridge	145:64910690c574	661	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
AnnaBridge	145:64910690c574	662	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
AnnaBridge	145:64910690c574	663	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
AnnaBridge	145:64910690c574	664	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
AnnaBridge	145:64910690c574	665	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
AnnaBridge	145:64910690c574	666	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
AnnaBridge	145:64910690c574	667	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
AnnaBridge	145:64910690c574	668	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
AnnaBridge	145:64910690c574	669	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
AnnaBridge	145:64910690c574	670	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
AnnaBridge	145:64910690c574	671	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
AnnaBridge	145:64910690c574	672	* @retval None
AnnaBridge	145:64910690c574	673	*/
AnnaBridge	145:64910690c574	674	__STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
AnnaBridge	145:64910690c574	675	{
AnnaBridge	145:64910690c574	676	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	677	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	678	NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	679	}
AnnaBridge	145:64910690c574	680
AnnaBridge	145:64910690c574	681	/**
AnnaBridge	145:64910690c574	682	* @brief Set the noise waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	683	* Noise mode and parameters LFSR (linear feedback shift register).
AnnaBridge	145:64910690c574	684	* @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n
AnnaBridge	145:64910690c574	685	* CR MAMP2 LL_DAC_GetWaveNoiseLFSR
AnnaBridge	145:64910690c574	686	* @param DACx DAC instance
AnnaBridge	145:64910690c574	687	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	688	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	689	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	690	*
AnnaBridge	145:64910690c574	691	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	692	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	693	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	694	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
AnnaBridge	145:64910690c574	695	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
AnnaBridge	145:64910690c574	696	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
AnnaBridge	145:64910690c574	697	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
AnnaBridge	145:64910690c574	698	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
AnnaBridge	145:64910690c574	699	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
AnnaBridge	145:64910690c574	700	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
AnnaBridge	145:64910690c574	701	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
AnnaBridge	145:64910690c574	702	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
AnnaBridge	145:64910690c574	703	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
AnnaBridge	145:64910690c574	704	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
AnnaBridge	145:64910690c574	705	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
AnnaBridge	145:64910690c574	706	*/
AnnaBridge	145:64910690c574	707	__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	708	{
AnnaBridge	145:64910690c574	709	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	710	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	711	);
AnnaBridge	145:64910690c574	712	}
AnnaBridge	145:64910690c574	713
AnnaBridge	145:64910690c574	714	/**
AnnaBridge	145:64910690c574	715	* @brief Set the triangle waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	716	* triangle mode and amplitude.
AnnaBridge	145:64910690c574	717	* @note For wave generation to be effective, DAC channel
AnnaBridge	145:64910690c574	718	* wave generation mode must be enabled using
AnnaBridge	145:64910690c574	719	* function @ref LL_DAC_SetWaveAutoGeneration().
AnnaBridge	145:64910690c574	720	* @note This setting can be set when the selected DAC channel is disabled
AnnaBridge	145:64910690c574	721	* (otherwise, the setting operation is ignored).
AnnaBridge	145:64910690c574	722	* @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n
AnnaBridge	145:64910690c574	723	* CR MAMP2 LL_DAC_SetWaveTriangleAmplitude
AnnaBridge	145:64910690c574	724	* @param DACx DAC instance
AnnaBridge	145:64910690c574	725	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	726	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	727	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	728	*
AnnaBridge	145:64910690c574	729	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	730	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	731	* @param TriangleAmplitude This parameter can be one of the following values:
AnnaBridge	145:64910690c574	732	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
AnnaBridge	145:64910690c574	733	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
AnnaBridge	145:64910690c574	734	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
AnnaBridge	145:64910690c574	735	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
AnnaBridge	145:64910690c574	736	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
AnnaBridge	145:64910690c574	737	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
AnnaBridge	145:64910690c574	738	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
AnnaBridge	145:64910690c574	739	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
AnnaBridge	145:64910690c574	740	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
AnnaBridge	145:64910690c574	741	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
AnnaBridge	145:64910690c574	742	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
AnnaBridge	145:64910690c574	743	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
AnnaBridge	145:64910690c574	744	* @retval None
AnnaBridge	145:64910690c574	745	*/
AnnaBridge	145:64910690c574	746	__STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude)
AnnaBridge	145:64910690c574	747	{
AnnaBridge	145:64910690c574	748	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	749	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	750	TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	751	}
AnnaBridge	145:64910690c574	752
AnnaBridge	145:64910690c574	753	/**
AnnaBridge	145:64910690c574	754	* @brief Set the triangle waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	755	* triangle mode and amplitude.
AnnaBridge	145:64910690c574	756	* @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n
AnnaBridge	145:64910690c574	757	* CR MAMP2 LL_DAC_GetWaveTriangleAmplitude
AnnaBridge	145:64910690c574	758	* @param DACx DAC instance
AnnaBridge	145:64910690c574	759	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	760	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	761	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	762	*
AnnaBridge	145:64910690c574	763	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	764	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	765	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	766	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
AnnaBridge	145:64910690c574	767	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
AnnaBridge	145:64910690c574	768	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
AnnaBridge	145:64910690c574	769	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
AnnaBridge	145:64910690c574	770	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
AnnaBridge	145:64910690c574	771	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
AnnaBridge	145:64910690c574	772	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
AnnaBridge	145:64910690c574	773	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
AnnaBridge	145:64910690c574	774	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
AnnaBridge	145:64910690c574	775	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
AnnaBridge	145:64910690c574	776	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
AnnaBridge	145:64910690c574	777	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
AnnaBridge	145:64910690c574	778	*/
AnnaBridge	145:64910690c574	779	__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	780	{
AnnaBridge	145:64910690c574	781	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	782	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	783	);
AnnaBridge	145:64910690c574	784	}
AnnaBridge	145:64910690c574	785
AnnaBridge	145:64910690c574	786	/**
AnnaBridge	145:64910690c574	787	* @brief Set the output buffer for the selected DAC channel.
AnnaBridge	145:64910690c574	788	* @rmtoll CR BOFF1 LL_DAC_SetOutputBuffer\n
AnnaBridge	145:64910690c574	789	* CR BOFF2 LL_DAC_SetOutputBuffer
AnnaBridge	145:64910690c574	790	* @param DACx DAC instance
AnnaBridge	145:64910690c574	791	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	792	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	793	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	794	*
AnnaBridge	145:64910690c574	795	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	796	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	797	* @param OutputBuffer This parameter can be one of the following values:
AnnaBridge	145:64910690c574	798	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge	145:64910690c574	799	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge	145:64910690c574	800	* @retval None
AnnaBridge	145:64910690c574	801	*/
AnnaBridge	145:64910690c574	802	__STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
AnnaBridge	145:64910690c574	803	{
AnnaBridge	145:64910690c574	804	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	805	DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	806	OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	807	}
AnnaBridge	145:64910690c574	808
AnnaBridge	145:64910690c574	809	/**
AnnaBridge	145:64910690c574	810	* @brief Get the output buffer state for the selected DAC channel.
AnnaBridge	145:64910690c574	811	* @rmtoll CR BOFF1 LL_DAC_GetOutputBuffer\n
AnnaBridge	145:64910690c574	812	* CR BOFF2 LL_DAC_GetOutputBuffer
AnnaBridge	145:64910690c574	813	* @param DACx DAC instance
AnnaBridge	145:64910690c574	814	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	815	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	816	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	817	*
AnnaBridge	145:64910690c574	818	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	819	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	820	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	821	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge	145:64910690c574	822	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge	145:64910690c574	823	*/
AnnaBridge	145:64910690c574	824	__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	825	{
AnnaBridge	145:64910690c574	826	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	827	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	828	);
AnnaBridge	145:64910690c574	829	}
AnnaBridge	145:64910690c574	830
AnnaBridge	145:64910690c574	831	/**
AnnaBridge	145:64910690c574	832	* @}
AnnaBridge	145:64910690c574	833	*/
AnnaBridge	145:64910690c574	834
AnnaBridge	145:64910690c574	835	/** @defgroup DAC_LL_EF_DMA_Management DMA Management
AnnaBridge	145:64910690c574	836	* @{
AnnaBridge	145:64910690c574	837	*/
AnnaBridge	145:64910690c574	838
AnnaBridge	145:64910690c574	839	/**
AnnaBridge	145:64910690c574	840	* @brief Enable DAC DMA transfer request of the selected channel.
AnnaBridge	145:64910690c574	841	* @note To configure DMA source address (peripheral address),
AnnaBridge	145:64910690c574	842	* use function @ref LL_DAC_DMA_GetRegAddr().
AnnaBridge	145:64910690c574	843	* @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n
AnnaBridge	145:64910690c574	844	* CR DMAEN2 LL_DAC_EnableDMAReq
AnnaBridge	145:64910690c574	845	* @param DACx DAC instance
AnnaBridge	145:64910690c574	846	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	847	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	848	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	849	*
AnnaBridge	145:64910690c574	850	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	851	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	852	* @retval None
AnnaBridge	145:64910690c574	853	*/
AnnaBridge	145:64910690c574	854	__STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	855	{
AnnaBridge	145:64910690c574	856	SET_BIT(DACx->CR,
AnnaBridge	145:64910690c574	857	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	858	}
AnnaBridge	145:64910690c574	859
AnnaBridge	145:64910690c574	860	/**
AnnaBridge	145:64910690c574	861	* @brief Disable DAC DMA transfer request of the selected channel.
AnnaBridge	145:64910690c574	862	* @note To configure DMA source address (peripheral address),
AnnaBridge	145:64910690c574	863	* use function @ref LL_DAC_DMA_GetRegAddr().
AnnaBridge	145:64910690c574	864	* @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n
AnnaBridge	145:64910690c574	865	* CR DMAEN2 LL_DAC_DisableDMAReq
AnnaBridge	145:64910690c574	866	* @param DACx DAC instance
AnnaBridge	145:64910690c574	867	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	868	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	869	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	870	*
AnnaBridge	145:64910690c574	871	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	872	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	873	* @retval None
AnnaBridge	145:64910690c574	874	*/
AnnaBridge	145:64910690c574	875	__STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	876	{
AnnaBridge	145:64910690c574	877	CLEAR_BIT(DACx->CR,
AnnaBridge	145:64910690c574	878	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	879	}
AnnaBridge	145:64910690c574	880
AnnaBridge	145:64910690c574	881	/**
AnnaBridge	145:64910690c574	882	* @brief Get DAC DMA transfer request state of the selected channel.
AnnaBridge	145:64910690c574	883	* (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
AnnaBridge	145:64910690c574	884	* @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n
AnnaBridge	145:64910690c574	885	* CR DMAEN2 LL_DAC_IsDMAReqEnabled
AnnaBridge	145:64910690c574	886	* @param DACx DAC instance
AnnaBridge	145:64910690c574	887	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	888	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	889	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	890	*
AnnaBridge	145:64910690c574	891	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	892	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	893	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	894	*/
AnnaBridge	145:64910690c574	895	__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	896	{
AnnaBridge	145:64910690c574	897	return (READ_BIT(DACx->CR,
AnnaBridge	145:64910690c574	898	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	899	== (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge	145:64910690c574	900	}
AnnaBridge	145:64910690c574	901
AnnaBridge	145:64910690c574	902	/**
AnnaBridge	145:64910690c574	903	* @brief Function to help to configure DMA transfer to DAC: retrieve the
AnnaBridge	145:64910690c574	904	* DAC register address from DAC instance and a list of DAC registers
AnnaBridge	145:64910690c574	905	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	145:64910690c574	906	* @note These DAC registers are data holding registers:
AnnaBridge	145:64910690c574	907	* when DAC conversion is requested, DAC generates a DMA transfer
AnnaBridge	145:64910690c574	908	* request to have data available in DAC data holding registers.
AnnaBridge	145:64910690c574	909	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	145:64910690c574	910	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	145:64910690c574	911	* Example:
AnnaBridge	145:64910690c574	912	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	145:64910690c574	913	* LL_DMA_CHANNEL_1,
AnnaBridge	145:64910690c574	914	* (uint32_t)&< array or variable >,
AnnaBridge	145:64910690c574	915	* LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
AnnaBridge	145:64910690c574	916	* LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
AnnaBridge	145:64910690c574	917	* @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	918	* DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	919	* DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	920	* DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	921	* DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	922	* DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr
AnnaBridge	145:64910690c574	923	* @param DACx DAC instance
AnnaBridge	145:64910690c574	924	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	925	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	926	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	927	*
AnnaBridge	145:64910690c574	928	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	929	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	930	* @param Register This parameter can be one of the following values:
AnnaBridge	145:64910690c574	931	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
AnnaBridge	145:64910690c574	932	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
AnnaBridge	145:64910690c574	933	* @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
AnnaBridge	145:64910690c574	934	* @retval DAC register address
AnnaBridge	145:64910690c574	935	*/
AnnaBridge	145:64910690c574	936	__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
AnnaBridge	145:64910690c574	937	{
AnnaBridge	145:64910690c574	938	/* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
AnnaBridge	145:64910690c574	939	/* DAC channel selected. */
AnnaBridge	145:64910690c574	940	return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register))));
AnnaBridge	145:64910690c574	941	}
AnnaBridge	145:64910690c574	942	/**
AnnaBridge	145:64910690c574	943	* @}
AnnaBridge	145:64910690c574	944	*/
AnnaBridge	145:64910690c574	945
AnnaBridge	145:64910690c574	946	/** @defgroup DAC_LL_EF_Operation Operation on DAC channels
AnnaBridge	145:64910690c574	947	* @{
AnnaBridge	145:64910690c574	948	*/
AnnaBridge	145:64910690c574	949
AnnaBridge	145:64910690c574	950	/**
AnnaBridge	145:64910690c574	951	* @brief Enable DAC selected channel.
AnnaBridge	145:64910690c574	952	* @rmtoll CR EN1 LL_DAC_Enable\n
AnnaBridge	145:64910690c574	953	* CR EN2 LL_DAC_Enable
AnnaBridge	145:64910690c574	954	* @note After enable from off state, DAC channel requires a delay
AnnaBridge	145:64910690c574	955	* for output voltage to reach accuracy +/- 1 LSB.
AnnaBridge	145:64910690c574	956	* Refer to device datasheet, parameter "tWAKEUP".
AnnaBridge	145:64910690c574	957	* @param DACx DAC instance
AnnaBridge	145:64910690c574	958	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	959	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	960	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	961	*
AnnaBridge	145:64910690c574	962	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	963	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	964	* @retval None
AnnaBridge	145:64910690c574	965	*/
AnnaBridge	145:64910690c574	966	__STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	967	{
AnnaBridge	145:64910690c574	968	SET_BIT(DACx->CR,
AnnaBridge	145:64910690c574	969	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	970	}
AnnaBridge	145:64910690c574	971
AnnaBridge	145:64910690c574	972	/**
AnnaBridge	145:64910690c574	973	* @brief Disable DAC selected channel.
AnnaBridge	145:64910690c574	974	* @rmtoll CR EN1 LL_DAC_Disable\n
AnnaBridge	145:64910690c574	975	* CR EN2 LL_DAC_Disable
AnnaBridge	145:64910690c574	976	* @param DACx DAC instance
AnnaBridge	145:64910690c574	977	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	978	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	979	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	980	*
AnnaBridge	145:64910690c574	981	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	982	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	983	* @retval None
AnnaBridge	145:64910690c574	984	*/
AnnaBridge	145:64910690c574	985	__STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	986	{
AnnaBridge	145:64910690c574	987	CLEAR_BIT(DACx->CR,
AnnaBridge	145:64910690c574	988	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	989	}
AnnaBridge	145:64910690c574	990
AnnaBridge	145:64910690c574	991	/**
AnnaBridge	145:64910690c574	992	* @brief Get DAC enable state of the selected channel.
AnnaBridge	145:64910690c574	993	* (0: DAC channel is disabled, 1: DAC channel is enabled)
AnnaBridge	145:64910690c574	994	* @rmtoll CR EN1 LL_DAC_IsEnabled\n
AnnaBridge	145:64910690c574	995	* CR EN2 LL_DAC_IsEnabled
AnnaBridge	145:64910690c574	996	* @param DACx DAC instance
AnnaBridge	145:64910690c574	997	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	998	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	999	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1000	*
AnnaBridge	145:64910690c574	1001	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1002	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1003	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1004	*/
AnnaBridge	145:64910690c574	1005	__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1006	{
AnnaBridge	145:64910690c574	1007	return (READ_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1008	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	1009	== (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge	145:64910690c574	1010	}
AnnaBridge	145:64910690c574	1011
AnnaBridge	145:64910690c574	1012	/**
AnnaBridge	145:64910690c574	1013	* @brief Enable DAC trigger of the selected channel.
AnnaBridge	145:64910690c574	1014	* @note - If DAC trigger is disabled, DAC conversion is performed
AnnaBridge	145:64910690c574	1015	* automatically once the data holding register is updated,
AnnaBridge	145:64910690c574	1016	* using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
AnnaBridge	145:64910690c574	1017	* @ref LL_DAC_ConvertData12RightAligned(), ...
AnnaBridge	145:64910690c574	1018	* - If DAC trigger is enabled, DAC conversion is performed
AnnaBridge	145:64910690c574	1019	* only when a hardware of software trigger event is occurring.
AnnaBridge	145:64910690c574	1020	* Select trigger source using
AnnaBridge	145:64910690c574	1021	* function @ref LL_DAC_SetTriggerSource().
AnnaBridge	145:64910690c574	1022	* @rmtoll CR TEN1 LL_DAC_EnableTrigger\n
AnnaBridge	145:64910690c574	1023	* CR TEN2 LL_DAC_EnableTrigger
AnnaBridge	145:64910690c574	1024	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1025	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1026	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1027	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1028	*
AnnaBridge	145:64910690c574	1029	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1030	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1031	* @retval None
AnnaBridge	145:64910690c574	1032	*/
AnnaBridge	145:64910690c574	1033	__STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1034	{
AnnaBridge	145:64910690c574	1035	SET_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1036	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	1037	}
AnnaBridge	145:64910690c574	1038
AnnaBridge	145:64910690c574	1039	/**
AnnaBridge	145:64910690c574	1040	* @brief Disable DAC trigger of the selected channel.
AnnaBridge	145:64910690c574	1041	* @rmtoll CR TEN1 LL_DAC_DisableTrigger\n
AnnaBridge	145:64910690c574	1042	* CR TEN2 LL_DAC_DisableTrigger
AnnaBridge	145:64910690c574	1043	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1044	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1045	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1046	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1047	*
AnnaBridge	145:64910690c574	1048	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1049	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1050	* @retval None
AnnaBridge	145:64910690c574	1051	*/
AnnaBridge	145:64910690c574	1052	__STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1053	{
AnnaBridge	145:64910690c574	1054	CLEAR_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1055	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	1056	}
AnnaBridge	145:64910690c574	1057
AnnaBridge	145:64910690c574	1058	/**
AnnaBridge	145:64910690c574	1059	* @brief Get DAC trigger state of the selected channel.
AnnaBridge	145:64910690c574	1060	* (0: DAC trigger is disabled, 1: DAC trigger is enabled)
AnnaBridge	145:64910690c574	1061	* @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n
AnnaBridge	145:64910690c574	1062	* CR TEN2 LL_DAC_IsTriggerEnabled
AnnaBridge	145:64910690c574	1063	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1064	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1065	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1066	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1067	*
AnnaBridge	145:64910690c574	1068	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1069	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1070	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1071	*/
AnnaBridge	145:64910690c574	1072	__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1073	{
AnnaBridge	145:64910690c574	1074	return (READ_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1075	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	1076	== (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge	145:64910690c574	1077	}
AnnaBridge	145:64910690c574	1078
AnnaBridge	145:64910690c574	1079	/**
AnnaBridge	145:64910690c574	1080	* @brief Trig DAC conversion by software for the selected DAC channel.
AnnaBridge	145:64910690c574	1081	* @note Preliminarily, DAC trigger must be set to software trigger
AnnaBridge	145:64910690c574	1082	* using function @ref LL_DAC_SetTriggerSource()
AnnaBridge	145:64910690c574	1083	* with parameter "LL_DAC_TRIGGER_SOFTWARE".
AnnaBridge	145:64910690c574	1084	* and DAC trigger must be enabled using
AnnaBridge	145:64910690c574	1085	* function @ref LL_DAC_EnableTrigger().
AnnaBridge	145:64910690c574	1086	* @note For devices featuring DAC with 2 channels: this function
AnnaBridge	145:64910690c574	1087	* can perform a SW start of both DAC channels simultaneously.
AnnaBridge	145:64910690c574	1088	* Two channels can be selected as parameter.
AnnaBridge	145:64910690c574	1089	* Example: (LL_DAC_CHANNEL_1 \| LL_DAC_CHANNEL_2)
AnnaBridge	145:64910690c574	1090	* @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n
AnnaBridge	145:64910690c574	1091	* SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion
AnnaBridge	145:64910690c574	1092	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1093	* @param DAC_Channel This parameter can a combination of the following values:
AnnaBridge	145:64910690c574	1094	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1095	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1096	*
AnnaBridge	145:64910690c574	1097	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1098	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1099	* @retval None
AnnaBridge	145:64910690c574	1100	*/
AnnaBridge	145:64910690c574	1101	__STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1102	{
AnnaBridge	145:64910690c574	1103	SET_BIT(DACx->SWTRIGR,
AnnaBridge	145:64910690c574	1104	(DAC_Channel & DAC_SWTR_CHX_MASK));
AnnaBridge	145:64910690c574	1105	}
AnnaBridge	145:64910690c574	1106
AnnaBridge	145:64910690c574	1107	/**
AnnaBridge	145:64910690c574	1108	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1109	* in format 12 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1110	* for the selected DAC channel.
AnnaBridge	145:64910690c574	1111	* @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n
AnnaBridge	145:64910690c574	1112	* DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned
AnnaBridge	145:64910690c574	1113	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1114	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1115	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1116	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1117	*
AnnaBridge	145:64910690c574	1118	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1119	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1120	* @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1121	* @retval None
AnnaBridge	145:64910690c574	1122	*/
AnnaBridge	145:64910690c574	1123	__STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge	145:64910690c574	1124	{
AnnaBridge	145:64910690c574	1125	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12RX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1126
AnnaBridge	145:64910690c574	1127	MODIFY_REG(*preg,
AnnaBridge	145:64910690c574	1128	DAC_DHR12R1_DACC1DHR,
AnnaBridge	145:64910690c574	1129	Data);
AnnaBridge	145:64910690c574	1130	}
AnnaBridge	145:64910690c574	1131
AnnaBridge	145:64910690c574	1132	/**
AnnaBridge	145:64910690c574	1133	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1134	* in format 12 bits left alignment (MSB aligned on bit 15),
AnnaBridge	145:64910690c574	1135	* for the selected DAC channel.
AnnaBridge	145:64910690c574	1136	* @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n
AnnaBridge	145:64910690c574	1137	* DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned
AnnaBridge	145:64910690c574	1138	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1139	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1140	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1141	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1142	*
AnnaBridge	145:64910690c574	1143	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1144	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1145	* @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1146	* @retval None
AnnaBridge	145:64910690c574	1147	*/
AnnaBridge	145:64910690c574	1148	__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge	145:64910690c574	1149	{
AnnaBridge	145:64910690c574	1150	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12LX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1151
AnnaBridge	145:64910690c574	1152	MODIFY_REG(*preg,
AnnaBridge	145:64910690c574	1153	DAC_DHR12L1_DACC1DHR,
AnnaBridge	145:64910690c574	1154	Data);
AnnaBridge	145:64910690c574	1155	}
AnnaBridge	145:64910690c574	1156
AnnaBridge	145:64910690c574	1157	/**
AnnaBridge	145:64910690c574	1158	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1159	* in format 8 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1160	* for the selected DAC channel.
AnnaBridge	145:64910690c574	1161	* @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n
AnnaBridge	145:64910690c574	1162	* DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned
AnnaBridge	145:64910690c574	1163	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1164	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1165	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1166	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1167	*
AnnaBridge	145:64910690c574	1168	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1169	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1170	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1171	* @retval None
AnnaBridge	145:64910690c574	1172	*/
AnnaBridge	145:64910690c574	1173	__STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge	145:64910690c574	1174	{
AnnaBridge	145:64910690c574	1175	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8RX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1176
AnnaBridge	145:64910690c574	1177	MODIFY_REG(*preg,
AnnaBridge	145:64910690c574	1178	DAC_DHR8R1_DACC1DHR,
AnnaBridge	145:64910690c574	1179	Data);
AnnaBridge	145:64910690c574	1180	}
AnnaBridge	145:64910690c574	1181
AnnaBridge	145:64910690c574	1182	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1183	/**
AnnaBridge	145:64910690c574	1184	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1185	* in format 12 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1186	* for both DAC channels.
AnnaBridge	145:64910690c574	1187	* @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n
AnnaBridge	145:64910690c574	1188	* DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned
AnnaBridge	145:64910690c574	1189	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1190	* @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1191	* @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1192	* @retval None
AnnaBridge	145:64910690c574	1193	*/
AnnaBridge	145:64910690c574	1194	__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge	145:64910690c574	1195	{
AnnaBridge	145:64910690c574	1196	MODIFY_REG(DACx->DHR12RD,
AnnaBridge	145:64910690c574	1197	(DAC_DHR12RD_DACC2DHR \| DAC_DHR12RD_DACC1DHR),
AnnaBridge	145:64910690c574	1198	((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) \| DataChannel1));
AnnaBridge	145:64910690c574	1199	}
AnnaBridge	145:64910690c574	1200
AnnaBridge	145:64910690c574	1201	/**
AnnaBridge	145:64910690c574	1202	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1203	* in format 12 bits left alignment (MSB aligned on bit 15),
AnnaBridge	145:64910690c574	1204	* for both DAC channels.
AnnaBridge	145:64910690c574	1205	* @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n
AnnaBridge	145:64910690c574	1206	* DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned
AnnaBridge	145:64910690c574	1207	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1208	* @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1209	* @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1210	* @retval None
AnnaBridge	145:64910690c574	1211	*/
AnnaBridge	145:64910690c574	1212	__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge	145:64910690c574	1213	{
AnnaBridge	145:64910690c574	1214	/* Note: Data of DAC channel 2 shift value subtracted of 4 because */
AnnaBridge	145:64910690c574	1215	/* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */
AnnaBridge	145:64910690c574	1216	/* the 4 LSB must be taken into account for the shift value. */
AnnaBridge	145:64910690c574	1217	MODIFY_REG(DACx->DHR12LD,
AnnaBridge	145:64910690c574	1218	(DAC_DHR12LD_DACC2DHR \| DAC_DHR12LD_DACC1DHR),
AnnaBridge	145:64910690c574	1219	((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) \| DataChannel1));
AnnaBridge	145:64910690c574	1220	}
AnnaBridge	145:64910690c574	1221
AnnaBridge	145:64910690c574	1222	/**
AnnaBridge	145:64910690c574	1223	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1224	* in format 8 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1225	* for both DAC channels.
AnnaBridge	145:64910690c574	1226	* @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n
AnnaBridge	145:64910690c574	1227	* DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned
AnnaBridge	145:64910690c574	1228	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1229	* @param DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1230	* @param DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1231	* @retval None
AnnaBridge	145:64910690c574	1232	*/
AnnaBridge	145:64910690c574	1233	__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge	145:64910690c574	1234	{
AnnaBridge	145:64910690c574	1235	MODIFY_REG(DACx->DHR8RD,
AnnaBridge	145:64910690c574	1236	(DAC_DHR8RD_DACC2DHR \| DAC_DHR8RD_DACC1DHR),
AnnaBridge	145:64910690c574	1237	((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) \| DataChannel1));
AnnaBridge	145:64910690c574	1238	}
AnnaBridge	145:64910690c574	1239
AnnaBridge	145:64910690c574	1240	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1241	/**
AnnaBridge	145:64910690c574	1242	* @brief Retrieve output data currently generated for the selected DAC channel.
AnnaBridge	145:64910690c574	1243	* @note Whatever alignment and resolution settings
AnnaBridge	145:64910690c574	1244	* (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
AnnaBridge	145:64910690c574	1245	* @ref LL_DAC_ConvertData12RightAligned(), ...),
AnnaBridge	145:64910690c574	1246	* output data format is 12 bits right aligned (LSB aligned on bit 0).
AnnaBridge	145:64910690c574	1247	* @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n
AnnaBridge	145:64910690c574	1248	* DOR2 DACC2DOR LL_DAC_RetrieveOutputData
AnnaBridge	145:64910690c574	1249	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1250	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1251	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1252	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1253	*
AnnaBridge	145:64910690c574	1254	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1255	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1256	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1257	*/
AnnaBridge	145:64910690c574	1258	__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1259	{
AnnaBridge	145:64910690c574	1260	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DORX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1261
AnnaBridge	145:64910690c574	1262	return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
AnnaBridge	145:64910690c574	1263	}
AnnaBridge	145:64910690c574	1264
AnnaBridge	145:64910690c574	1265	/**
AnnaBridge	145:64910690c574	1266	* @}
AnnaBridge	145:64910690c574	1267	*/
AnnaBridge	145:64910690c574	1268
AnnaBridge	145:64910690c574	1269	/** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
AnnaBridge	145:64910690c574	1270	* @{
AnnaBridge	145:64910690c574	1271	*/
AnnaBridge	145:64910690c574	1272	/**
AnnaBridge	145:64910690c574	1273	* @brief Get DAC underrun flag for DAC channel 1
AnnaBridge	145:64910690c574	1274	* @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1
AnnaBridge	145:64910690c574	1275	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1276	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1277	*/
AnnaBridge	145:64910690c574	1278	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1279	{
AnnaBridge	145:64910690c574	1280	return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1));
AnnaBridge	145:64910690c574	1281	}
AnnaBridge	145:64910690c574	1282
AnnaBridge	145:64910690c574	1283	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1284	/**
AnnaBridge	145:64910690c574	1285	* @brief Get DAC underrun flag for DAC channel 2
AnnaBridge	145:64910690c574	1286	* @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2
AnnaBridge	145:64910690c574	1287	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1288	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1289	*/
AnnaBridge	145:64910690c574	1290	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1291	{
AnnaBridge	145:64910690c574	1292	return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2));
AnnaBridge	145:64910690c574	1293	}
AnnaBridge	145:64910690c574	1294	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1295
AnnaBridge	145:64910690c574	1296	/**
AnnaBridge	145:64910690c574	1297	* @brief Clear DAC underrun flag for DAC channel 1
AnnaBridge	145:64910690c574	1298	* @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1
AnnaBridge	145:64910690c574	1299	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1300	* @retval None
AnnaBridge	145:64910690c574	1301	*/
AnnaBridge	145:64910690c574	1302	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1303	{
AnnaBridge	145:64910690c574	1304	WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
AnnaBridge	145:64910690c574	1305	}
AnnaBridge	145:64910690c574	1306
AnnaBridge	145:64910690c574	1307	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1308	/**
AnnaBridge	145:64910690c574	1309	* @brief Clear DAC underrun flag for DAC channel 2
AnnaBridge	145:64910690c574	1310	* @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2
AnnaBridge	145:64910690c574	1311	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1312	* @retval None
AnnaBridge	145:64910690c574	1313	*/
AnnaBridge	145:64910690c574	1314	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1315	{
AnnaBridge	145:64910690c574	1316	WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
AnnaBridge	145:64910690c574	1317	}
AnnaBridge	145:64910690c574	1318	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1319
AnnaBridge	145:64910690c574	1320	/**
AnnaBridge	145:64910690c574	1321	* @}
AnnaBridge	145:64910690c574	1322	*/
AnnaBridge	145:64910690c574	1323
AnnaBridge	145:64910690c574	1324	/** @defgroup DAC_LL_EF_IT_Management IT management
AnnaBridge	145:64910690c574	1325	* @{
AnnaBridge	145:64910690c574	1326	*/
AnnaBridge	145:64910690c574	1327
AnnaBridge	145:64910690c574	1328	/**
AnnaBridge	145:64910690c574	1329	* @brief Enable DMA underrun interrupt for DAC channel 1
AnnaBridge	145:64910690c574	1330	* @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1
AnnaBridge	145:64910690c574	1331	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1332	* @retval None
AnnaBridge	145:64910690c574	1333	*/
AnnaBridge	145:64910690c574	1334	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1335	{
AnnaBridge	145:64910690c574	1336	SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
AnnaBridge	145:64910690c574	1337	}
AnnaBridge	145:64910690c574	1338
AnnaBridge	145:64910690c574	1339	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1340	/**
AnnaBridge	145:64910690c574	1341	* @brief Enable DMA underrun interrupt for DAC channel 2
AnnaBridge	145:64910690c574	1342	* @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2
AnnaBridge	145:64910690c574	1343	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1344	* @retval None
AnnaBridge	145:64910690c574	1345	*/
AnnaBridge	145:64910690c574	1346	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1347	{
AnnaBridge	145:64910690c574	1348	SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
AnnaBridge	145:64910690c574	1349	}
AnnaBridge	145:64910690c574	1350	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1351
AnnaBridge	145:64910690c574	1352	/**
AnnaBridge	145:64910690c574	1353	* @brief Disable DMA underrun interrupt for DAC channel 1
AnnaBridge	145:64910690c574	1354	* @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1
AnnaBridge	145:64910690c574	1355	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1356	* @retval None
AnnaBridge	145:64910690c574	1357	*/
AnnaBridge	145:64910690c574	1358	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1359	{
AnnaBridge	145:64910690c574	1360	CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
AnnaBridge	145:64910690c574	1361	}
AnnaBridge	145:64910690c574	1362
AnnaBridge	145:64910690c574	1363	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1364	/**
AnnaBridge	145:64910690c574	1365	* @brief Disable DMA underrun interrupt for DAC channel 2
AnnaBridge	145:64910690c574	1366	* @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2
AnnaBridge	145:64910690c574	1367	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1368	* @retval None
AnnaBridge	145:64910690c574	1369	*/
AnnaBridge	145:64910690c574	1370	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1371	{
AnnaBridge	145:64910690c574	1372	CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
AnnaBridge	145:64910690c574	1373	}
AnnaBridge	145:64910690c574	1374	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1375
AnnaBridge	145:64910690c574	1376	/**
AnnaBridge	145:64910690c574	1377	* @brief Get DMA underrun interrupt for DAC channel 1
AnnaBridge	145:64910690c574	1378	* @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1
AnnaBridge	145:64910690c574	1379	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1380	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1381	*/
AnnaBridge	145:64910690c574	1382	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1383	{
AnnaBridge	145:64910690c574	1384	return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1));
AnnaBridge	145:64910690c574	1385	}
AnnaBridge	145:64910690c574	1386
AnnaBridge	145:64910690c574	1387	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1388	/**
AnnaBridge	145:64910690c574	1389	* @brief Get DMA underrun interrupt for DAC channel 2
AnnaBridge	145:64910690c574	1390	* @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2
AnnaBridge	145:64910690c574	1391	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1392	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1393	*/
AnnaBridge	145:64910690c574	1394	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1395	{
AnnaBridge	145:64910690c574	1396	return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2));
AnnaBridge	145:64910690c574	1397	}
AnnaBridge	145:64910690c574	1398	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1399
AnnaBridge	145:64910690c574	1400	/**
AnnaBridge	145:64910690c574	1401	* @}
AnnaBridge	145:64910690c574	1402	*/
AnnaBridge	145:64910690c574	1403
AnnaBridge	145:64910690c574	1404	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	1405	/** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	145:64910690c574	1406	* @{
AnnaBridge	145:64910690c574	1407	*/
AnnaBridge	145:64910690c574	1408
AnnaBridge	145:64910690c574	1409	ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx);
AnnaBridge	145:64910690c574	1410	ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct);
AnnaBridge	145:64910690c574	1411	void LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct);
AnnaBridge	145:64910690c574	1412
AnnaBridge	145:64910690c574	1413	/**
AnnaBridge	145:64910690c574	1414	* @}
AnnaBridge	145:64910690c574	1415	*/
AnnaBridge	145:64910690c574	1416	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	1417
AnnaBridge	145:64910690c574	1418	/**
AnnaBridge	145:64910690c574	1419	* @}
AnnaBridge	145:64910690c574	1420	*/
AnnaBridge	145:64910690c574	1421
AnnaBridge	145:64910690c574	1422	/**
AnnaBridge	145:64910690c574	1423	* @}
AnnaBridge	145:64910690c574	1424	*/
AnnaBridge	145:64910690c574	1425
AnnaBridge	145:64910690c574	1426	#endif /* DAC */
AnnaBridge	145:64910690c574	1427
AnnaBridge	145:64910690c574	1428	/**
AnnaBridge	145:64910690c574	1429	* @}
AnnaBridge	145:64910690c574	1430	*/
AnnaBridge	145:64910690c574	1431
AnnaBridge	145:64910690c574	1432	#ifdef __cplusplus
AnnaBridge	145:64910690c574	1433	}
AnnaBridge	145:64910690c574	1434	#endif
AnnaBridge	145:64910690c574	1435
AnnaBridge	145:64910690c574	1436	#endif /* __STM32F4xx_LL_DAC_H */
AnnaBridge	145:64910690c574	1437
AnnaBridge	145:64910690c574	1438	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/