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TARGET_NUCLEO_F412ZG/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_ll_dac.h@145:64910690c574, 2017-06-21 (annotated)

Committer:: AnnaBridge
Date:: Wed Jun 21 17:31:38 2017 +0100
Revision:: 145:64910690c574
Child:: 163:e59c8e839560

Release 145 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	145:64910690c574	1	/**
AnnaBridge	145:64910690c574	2	******************************************************************************
AnnaBridge	145:64910690c574	3	* @file stm32f4xx_ll_dac.h
AnnaBridge	145:64910690c574	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @version V1.7.1
AnnaBridge	145:64910690c574	6	* @date 14-April-2017
AnnaBridge	145:64910690c574	7	* @brief Header file of DAC LL module.
AnnaBridge	145:64910690c574	8	******************************************************************************
AnnaBridge	145:64910690c574	9	* @attention
AnnaBridge	145:64910690c574	10	*
AnnaBridge	145:64910690c574	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	145:64910690c574	12	*
AnnaBridge	145:64910690c574	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	145:64910690c574	14	* are permitted provided that the following conditions are met:
AnnaBridge	145:64910690c574	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	145:64910690c574	16	* this list of conditions and the following disclaimer.
AnnaBridge	145:64910690c574	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	145:64910690c574	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	145:64910690c574	19	* and/or other materials provided with the distribution.
AnnaBridge	145:64910690c574	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	145:64910690c574	21	* may be used to endorse or promote products derived from this software
AnnaBridge	145:64910690c574	22	* without specific prior written permission.
AnnaBridge	145:64910690c574	23	*
AnnaBridge	145:64910690c574	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	145:64910690c574	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	145:64910690c574	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	145:64910690c574	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	145:64910690c574	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	145:64910690c574	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	145:64910690c574	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	145:64910690c574	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	145:64910690c574	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	145:64910690c574	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	145:64910690c574	34	*
AnnaBridge	145:64910690c574	35	******************************************************************************
AnnaBridge	145:64910690c574	36	*/
AnnaBridge	145:64910690c574	37
AnnaBridge	145:64910690c574	38	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	145:64910690c574	39	#ifndef __STM32F4xx_LL_DAC_H
AnnaBridge	145:64910690c574	40	#define __STM32F4xx_LL_DAC_H
AnnaBridge	145:64910690c574	41
AnnaBridge	145:64910690c574	42	#ifdef __cplusplus
AnnaBridge	145:64910690c574	43	extern "C" {
AnnaBridge	145:64910690c574	44	#endif
AnnaBridge	145:64910690c574	45
AnnaBridge	145:64910690c574	46	/* Includes ------------------------------------------------------------------*/
AnnaBridge	145:64910690c574	47	#include "stm32f4xx.h"
AnnaBridge	145:64910690c574	48
AnnaBridge	145:64910690c574	49	/** @addtogroup STM32F4xx_LL_Driver
AnnaBridge	145:64910690c574	50	* @{
AnnaBridge	145:64910690c574	51	*/
AnnaBridge	145:64910690c574	52
AnnaBridge	145:64910690c574	53	#if defined(DAC)
AnnaBridge	145:64910690c574	54
AnnaBridge	145:64910690c574	55	/** @defgroup DAC_LL DAC
AnnaBridge	145:64910690c574	56	* @{
AnnaBridge	145:64910690c574	57	*/
AnnaBridge	145:64910690c574	58
AnnaBridge	145:64910690c574	59	/* Private types -------------------------------------------------------------*/
AnnaBridge	145:64910690c574	60	/* Private variables ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	61
AnnaBridge	145:64910690c574	62	/* Private constants ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	63	/** @defgroup DAC_LL_Private_Constants DAC Private Constants
AnnaBridge	145:64910690c574	64	* @{
AnnaBridge	145:64910690c574	65	*/
AnnaBridge	145:64910690c574	66
AnnaBridge	145:64910690c574	67	/* Internal masks for DAC channels definition */
AnnaBridge	145:64910690c574	68	/* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */
AnnaBridge	145:64910690c574	69	/* - channel bits position into register CR */
AnnaBridge	145:64910690c574	70	/* - channel bits position into register SWTRIG */
AnnaBridge	145:64910690c574	71	/* - channel register offset of data holding register DHRx */
AnnaBridge	145:64910690c574	72	/* - channel register offset of data output register DORx */
AnnaBridge	145:64910690c574	73	#define DAC_CR_CH1_BITOFFSET 0U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */
AnnaBridge	145:64910690c574	74	#define DAC_CR_CH2_BITOFFSET 16U /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */
AnnaBridge	145:64910690c574	75	#define DAC_CR_CHX_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET \| DAC_CR_CH2_BITOFFSET)
AnnaBridge	145:64910690c574	76
AnnaBridge	145:64910690c574	77	#define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
AnnaBridge	145:64910690c574	78	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	79	#define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHX_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
AnnaBridge	145:64910690c574	80	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 \| DAC_SWTR_CH2)
AnnaBridge	145:64910690c574	81	#else
AnnaBridge	145:64910690c574	82	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1)
AnnaBridge	145:64910690c574	83	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	84
AnnaBridge	145:64910690c574	85	#define DAC_REG_DHR12R1_REGOFFSET 0x00000000U /* Register DHR12Rx channel 1 taken as reference */
AnnaBridge	145:64910690c574	86	#define DAC_REG_DHR12L1_REGOFFSET 0x00100000U /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */
AnnaBridge	145:64910690c574	87	#define DAC_REG_DHR8R1_REGOFFSET 0x02000000U /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */
AnnaBridge	145:64910690c574	88	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	89	#define DAC_REG_DHR12R2_REGOFFSET 0x00030000U /* Register offset of DHR12Rx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
AnnaBridge	145:64910690c574	90	#define DAC_REG_DHR12L2_REGOFFSET 0x00400000U /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
AnnaBridge	145:64910690c574	91	#define DAC_REG_DHR8R2_REGOFFSET 0x05000000U /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
AnnaBridge	145:64910690c574	92	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	93	#define DAC_REG_DHR12RX_REGOFFSET_MASK 0x000F0000U
AnnaBridge	145:64910690c574	94	#define DAC_REG_DHR12LX_REGOFFSET_MASK 0x00F00000U
AnnaBridge	145:64910690c574	95	#define DAC_REG_DHR8RX_REGOFFSET_MASK 0x0F000000U
AnnaBridge	145:64910690c574	96	#define DAC_REG_DHRX_REGOFFSET_MASK (DAC_REG_DHR12RX_REGOFFSET_MASK \| DAC_REG_DHR12LX_REGOFFSET_MASK \| DAC_REG_DHR8RX_REGOFFSET_MASK)
AnnaBridge	145:64910690c574	97
AnnaBridge	145:64910690c574	98	#define DAC_REG_DOR1_REGOFFSET 0x00000000U /* Register DORx channel 1 taken as reference */
AnnaBridge	145:64910690c574	99	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	100	#define DAC_REG_DOR2_REGOFFSET 0x10000000U /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */
AnnaBridge	145:64910690c574	101	#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DOR2_REGOFFSET)
AnnaBridge	145:64910690c574	102	#else
AnnaBridge	145:64910690c574	103	#define DAC_REG_DORX_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET)
AnnaBridge	145:64910690c574	104	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	105
AnnaBridge	145:64910690c574	106	/* DAC registers bits positions */
AnnaBridge	145:64910690c574	107	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	108	#define DAC_DHR12RD_DACC2DHR_BITOFFSET_POS 16U /* Value equivalent to POSITION_VAL(DAC_DHR12RD_DACC2DHR) */
AnnaBridge	145:64910690c574	109	#define DAC_DHR12LD_DACC2DHR_BITOFFSET_POS 20U /* Value equivalent to POSITION_VAL(DAC_DHR12LD_DACC2DHR) */
AnnaBridge	145:64910690c574	110	#define DAC_DHR8RD_DACC2DHR_BITOFFSET_POS 8U /* Value equivalent to POSITION_VAL(DAC_DHR8RD_DACC2DHR) */
AnnaBridge	145:64910690c574	111	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	112
AnnaBridge	145:64910690c574	113	/* Miscellaneous data */
AnnaBridge	145:64910690c574	114	#define DAC_DIGITAL_SCALE_12BITS 4095U /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */
AnnaBridge	145:64910690c574	115
AnnaBridge	145:64910690c574	116	/**
AnnaBridge	145:64910690c574	117	* @}
AnnaBridge	145:64910690c574	118	*/
AnnaBridge	145:64910690c574	119
AnnaBridge	145:64910690c574	120
AnnaBridge	145:64910690c574	121	/* Private macros ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	122	/** @defgroup DAC_LL_Private_Macros DAC Private Macros
AnnaBridge	145:64910690c574	123	* @{
AnnaBridge	145:64910690c574	124	*/
AnnaBridge	145:64910690c574	125
AnnaBridge	145:64910690c574	126	/**
AnnaBridge	145:64910690c574	127	* @brief Driver macro reserved for internal use: isolate bits with the
AnnaBridge	145:64910690c574	128	* selected mask and shift them to the register LSB
AnnaBridge	145:64910690c574	129	* (shift mask on register position bit 0).
AnnaBridge	145:64910690c574	130	* @param __BITS__ Bits in register 32 bits
AnnaBridge	145:64910690c574	131	* @param __MASK__ Mask in register 32 bits
AnnaBridge	145:64910690c574	132	* @retval Bits in register 32 bits
AnnaBridge	145:64910690c574	133	*/
AnnaBridge	145:64910690c574	134	#define __DAC_MASK_SHIFT(__BITS__, __MASK__) \
AnnaBridge	145:64910690c574	135	(((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
AnnaBridge	145:64910690c574	136
AnnaBridge	145:64910690c574	137	/**
AnnaBridge	145:64910690c574	138	* @brief Driver macro reserved for internal use: set a pointer to
AnnaBridge	145:64910690c574	139	* a register from a register basis from which an offset
AnnaBridge	145:64910690c574	140	* is applied.
AnnaBridge	145:64910690c574	141	* @param __REG__ Register basis from which the offset is applied.
AnnaBridge	145:64910690c574	142	* @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
AnnaBridge	145:64910690c574	143	* @retval Pointer to register address
AnnaBridge	145:64910690c574	144	*/
AnnaBridge	145:64910690c574	145	#define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
AnnaBridge	145:64910690c574	146	((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2U))))
AnnaBridge	145:64910690c574	147
AnnaBridge	145:64910690c574	148	/**
AnnaBridge	145:64910690c574	149	* @}
AnnaBridge	145:64910690c574	150	*/
AnnaBridge	145:64910690c574	151
AnnaBridge	145:64910690c574	152
AnnaBridge	145:64910690c574	153	/* Exported types ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	154	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	155	/** @defgroup DAC_LL_ES_INIT DAC Exported Init structure
AnnaBridge	145:64910690c574	156	* @{
AnnaBridge	145:64910690c574	157	*/
AnnaBridge	145:64910690c574	158
AnnaBridge	145:64910690c574	159	/**
AnnaBridge	145:64910690c574	160	* @brief Structure definition of some features of DAC instance.
AnnaBridge	145:64910690c574	161	*/
AnnaBridge	145:64910690c574	162	typedef struct
AnnaBridge	145:64910690c574	163	{
AnnaBridge	145:64910690c574	164	uint32_t TriggerSource; /*!< Set the conversion trigger source for the selected DAC channel: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	145:64910690c574	165	This parameter can be a value of @ref DAC_LL_EC_TRIGGER_SOURCE
AnnaBridge	145:64910690c574	166
AnnaBridge	145:64910690c574	167	This feature can be modified afterwards using unitary function @ref LL_DAC_SetTriggerSource(). */
AnnaBridge	145:64910690c574	168
AnnaBridge	145:64910690c574	169	uint32_t WaveAutoGeneration; /*!< Set the waveform automatic generation mode for the selected DAC channel.
AnnaBridge	145:64910690c574	170	This parameter can be a value of @ref DAC_LL_EC_WAVE_AUTO_GENERATION_MODE
AnnaBridge	145:64910690c574	171
AnnaBridge	145:64910690c574	172	This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveAutoGeneration(). */
AnnaBridge	145:64910690c574	173
AnnaBridge	145:64910690c574	174	uint32_t WaveAutoGenerationConfig; /*!< Set the waveform automatic generation mode for the selected DAC channel.
AnnaBridge	145:64910690c574	175	If waveform automatic generation mode is set to noise, this parameter can be a value of @ref DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS
AnnaBridge	145:64910690c574	176	If waveform automatic generation mode is set to triangle, this parameter can be a value of @ref DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE
AnnaBridge	145:64910690c574	177	@note If waveform automatic generation mode is disabled, this parameter is discarded.
AnnaBridge	145:64910690c574	178
AnnaBridge	145:64910690c574	179	This feature can be modified afterwards using unitary function @ref LL_DAC_SetWaveNoiseLFSR() or @ref LL_DAC_SetWaveTriangleAmplitude(), depending on the wave automatic generation selected. */
AnnaBridge	145:64910690c574	180
AnnaBridge	145:64910690c574	181	uint32_t OutputBuffer; /*!< Set the output buffer for the selected DAC channel.
AnnaBridge	145:64910690c574	182	This parameter can be a value of @ref DAC_LL_EC_OUTPUT_BUFFER
AnnaBridge	145:64910690c574	183
AnnaBridge	145:64910690c574	184	This feature can be modified afterwards using unitary function @ref LL_DAC_SetOutputBuffer(). */
AnnaBridge	145:64910690c574	185
AnnaBridge	145:64910690c574	186	} LL_DAC_InitTypeDef;
AnnaBridge	145:64910690c574	187
AnnaBridge	145:64910690c574	188	/**
AnnaBridge	145:64910690c574	189	* @}
AnnaBridge	145:64910690c574	190	*/
AnnaBridge	145:64910690c574	191	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	192
AnnaBridge	145:64910690c574	193	/* Exported constants --------------------------------------------------------*/
AnnaBridge	145:64910690c574	194	/** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
AnnaBridge	145:64910690c574	195	* @{
AnnaBridge	145:64910690c574	196	*/
AnnaBridge	145:64910690c574	197
AnnaBridge	145:64910690c574	198	/** @defgroup DAC_LL_EC_GET_FLAG DAC flags
AnnaBridge	145:64910690c574	199	* @brief Flags defines which can be used with LL_DAC_ReadReg function
AnnaBridge	145:64910690c574	200	* @{
AnnaBridge	145:64910690c574	201	*/
AnnaBridge	145:64910690c574	202	/* DAC channel 1 flags */
AnnaBridge	145:64910690c574	203	#define LL_DAC_FLAG_DMAUDR1 (DAC_SR_DMAUDR1) /!< DAC channel 1 flag DMA underrun /
AnnaBridge	145:64910690c574	204
AnnaBridge	145:64910690c574	205	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	206	/* DAC channel 2 flags */
AnnaBridge	145:64910690c574	207	#define LL_DAC_FLAG_DMAUDR2 (DAC_SR_DMAUDR2) /!< DAC channel 2 flag DMA underrun /
AnnaBridge	145:64910690c574	208	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	209	/**
AnnaBridge	145:64910690c574	210	* @}
AnnaBridge	145:64910690c574	211	*/
AnnaBridge	145:64910690c574	212
AnnaBridge	145:64910690c574	213	/** @defgroup DAC_LL_EC_IT DAC interruptions
AnnaBridge	145:64910690c574	214	* @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions
AnnaBridge	145:64910690c574	215	* @{
AnnaBridge	145:64910690c574	216	*/
AnnaBridge	145:64910690c574	217	#define LL_DAC_IT_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /!< DAC channel 1 interruption DMA underrun /
AnnaBridge	145:64910690c574	218	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	219	#define LL_DAC_IT_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /!< DAC channel 2 interruption DMA underrun /
AnnaBridge	145:64910690c574	220	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	221	/**
AnnaBridge	145:64910690c574	222	* @}
AnnaBridge	145:64910690c574	223	*/
AnnaBridge	145:64910690c574	224
AnnaBridge	145:64910690c574	225	/** @defgroup DAC_LL_EC_CHANNEL DAC channels
AnnaBridge	145:64910690c574	226	* @{
AnnaBridge	145:64910690c574	227	*/
AnnaBridge	145:64910690c574	228	#define LL_DAC_CHANNEL_1 (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DHR12R1_REGOFFSET \| DAC_REG_DHR12L1_REGOFFSET \| DAC_REG_DHR8R1_REGOFFSET \| DAC_CR_CH1_BITOFFSET \| DAC_SWTR_CH1) /!< DAC channel 1 /
AnnaBridge	145:64910690c574	229	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	230	#define LL_DAC_CHANNEL_2 (DAC_REG_DOR2_REGOFFSET \| DAC_REG_DHR12R2_REGOFFSET \| DAC_REG_DHR12L2_REGOFFSET \| DAC_REG_DHR8R2_REGOFFSET \| DAC_CR_CH2_BITOFFSET \| DAC_SWTR_CH2) /!< DAC channel 2 /
AnnaBridge	145:64910690c574	231	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	232	/**
AnnaBridge	145:64910690c574	233	* @}
AnnaBridge	145:64910690c574	234	*/
AnnaBridge	145:64910690c574	235
AnnaBridge	145:64910690c574	236	/** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
AnnaBridge	145:64910690c574	237	* @{
AnnaBridge	145:64910690c574	238	*/
AnnaBridge	145:64910690c574	239	#define LL_DAC_TRIG_SOFTWARE (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger internal (SW start) /
AnnaBridge	145:64910690c574	240	#define LL_DAC_TRIG_EXT_TIM2_TRGO (DAC_CR_TSEL1_2 ) /!< DAC channel conversion trigger from external IP: TIM2 TRGO. /
AnnaBridge	145:64910690c574	241	#define LL_DAC_TRIG_EXT_TIM8_TRGO ( DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM8 TRGO. /
AnnaBridge	145:64910690c574	242	#define LL_DAC_TRIG_EXT_TIM4_TRGO (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM4 TRGO. /
AnnaBridge	145:64910690c574	243	#define LL_DAC_TRIG_EXT_TIM6_TRGO 0x00000000U /!< DAC channel conversion trigger from external IP: TIM6 TRGO. /
AnnaBridge	145:64910690c574	244	#define LL_DAC_TRIG_EXT_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /!< DAC channel conversion trigger from external IP: TIM7 TRGO. /
AnnaBridge	145:64910690c574	245	#define LL_DAC_TRIG_EXT_TIM5_TRGO ( DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< DAC channel conversion trigger from external IP: TIM5 TRGO. /
AnnaBridge	145:64910690c574	246	#define LL_DAC_TRIG_EXT_EXTI_LINE9 (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 ) /!< DAC channel conversion trigger from external IP: external interrupt line 9. /
AnnaBridge	145:64910690c574	247	/**
AnnaBridge	145:64910690c574	248	* @}
AnnaBridge	145:64910690c574	249	*/
AnnaBridge	145:64910690c574	250
AnnaBridge	145:64910690c574	251	/** @defgroup DAC_LL_EC_WAVE_AUTO_GENERATION_MODE DAC waveform automatic generation mode
AnnaBridge	145:64910690c574	252	* @{
AnnaBridge	145:64910690c574	253	*/
AnnaBridge	145:64910690c574	254	#define LL_DAC_WAVE_AUTO_GENERATION_NONE 0x00000000U /!< DAC channel wave auto generation mode disabled. /
AnnaBridge	145:64910690c574	255	#define LL_DAC_WAVE_AUTO_GENERATION_NOISE (DAC_CR_WAVE1_0) /!< DAC channel wave auto generation mode enabled, set generated noise waveform. /
AnnaBridge	145:64910690c574	256	#define LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE (DAC_CR_WAVE1_1) /!< DAC channel wave auto generation mode enabled, set generated triangle waveform. /
AnnaBridge	145:64910690c574	257	/**
AnnaBridge	145:64910690c574	258	* @}
AnnaBridge	145:64910690c574	259	*/
AnnaBridge	145:64910690c574	260
AnnaBridge	145:64910690c574	261	/** @defgroup DAC_LL_EC_WAVE_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
AnnaBridge	145:64910690c574	262	* @{
AnnaBridge	145:64910690c574	263	*/
AnnaBridge	145:64910690c574	264	#define LL_DAC_NOISE_LFSR_UNMASK_BIT0 0x00000000U /!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel /
AnnaBridge	145:64910690c574	265	#define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	266	#define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	267	#define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	268	#define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	269	#define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	270	#define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	271	#define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	272	#define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	273	#define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	274	#define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	275	#define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel /
AnnaBridge	145:64910690c574	276	/**
AnnaBridge	145:64910690c574	277	* @}
AnnaBridge	145:64910690c574	278	*/
AnnaBridge	145:64910690c574	279
AnnaBridge	145:64910690c574	280	/** @defgroup DAC_LL_EC_WAVE_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
AnnaBridge	145:64910690c574	281	* @{
AnnaBridge	145:64910690c574	282	*/
AnnaBridge	145:64910690c574	283	#define LL_DAC_TRIANGLE_AMPLITUDE_1 0x00000000U /!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	284	#define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	285	#define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	286	#define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	287	#define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	288	#define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	289	#define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	290	#define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	291	#define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	292	#define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	293	#define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	294	#define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel /
AnnaBridge	145:64910690c574	295	/**
AnnaBridge	145:64910690c574	296	* @}
AnnaBridge	145:64910690c574	297	*/
AnnaBridge	145:64910690c574	298
AnnaBridge	145:64910690c574	299	/** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
AnnaBridge	145:64910690c574	300	* @{
AnnaBridge	145:64910690c574	301	*/
AnnaBridge	145:64910690c574	302	#define LL_DAC_OUTPUT_BUFFER_ENABLE 0x00000000U /!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption /
AnnaBridge	145:64910690c574	303	#define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_CR_BOFF1) /!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption /
AnnaBridge	145:64910690c574	304	/**
AnnaBridge	145:64910690c574	305	* @}
AnnaBridge	145:64910690c574	306	*/
AnnaBridge	145:64910690c574	307
AnnaBridge	145:64910690c574	308
AnnaBridge	145:64910690c574	309	/** @defgroup DAC_LL_EC_RESOLUTION DAC channel output resolution
AnnaBridge	145:64910690c574	310	* @{
AnnaBridge	145:64910690c574	311	*/
AnnaBridge	145:64910690c574	312	#define LL_DAC_RESOLUTION_12B 0x00000000U /!< DAC channel resolution 12 bits /
AnnaBridge	145:64910690c574	313	#define LL_DAC_RESOLUTION_8B 0x00000002U /!< DAC channel resolution 8 bits /
AnnaBridge	145:64910690c574	314	/**
AnnaBridge	145:64910690c574	315	* @}
AnnaBridge	145:64910690c574	316	*/
AnnaBridge	145:64910690c574	317
AnnaBridge	145:64910690c574	318	/** @defgroup DAC_LL_EC_REGISTERS DAC registers compliant with specific purpose
AnnaBridge	145:64910690c574	319	* @{
AnnaBridge	145:64910690c574	320	*/
AnnaBridge	145:64910690c574	321	/* List of DAC registers intended to be used (most commonly) with */
AnnaBridge	145:64910690c574	322	/* DMA transfer. */
AnnaBridge	145:64910690c574	323	/* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */
AnnaBridge	145:64910690c574	324	#define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12RX_REGOFFSET_MASK /!< DAC channel data holding register 12 bits right aligned /
AnnaBridge	145:64910690c574	325	#define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12LX_REGOFFSET_MASK /!< DAC channel data holding register 12 bits left aligned /
AnnaBridge	145:64910690c574	326	#define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8RX_REGOFFSET_MASK /!< DAC channel data holding register 8 bits right aligned /
AnnaBridge	145:64910690c574	327	/**
AnnaBridge	145:64910690c574	328	* @}
AnnaBridge	145:64910690c574	329	*/
AnnaBridge	145:64910690c574	330
AnnaBridge	145:64910690c574	331	/** @defgroup DAC_LL_EC_HW_DELAYS Definitions of DAC hardware constraints delays
AnnaBridge	145:64910690c574	332	* @note Only DAC IP HW delays are defined in DAC LL driver driver,
AnnaBridge	145:64910690c574	333	* not timeout values.
AnnaBridge	145:64910690c574	334	* For details on delays values, refer to descriptions in source code
AnnaBridge	145:64910690c574	335	* above each literal definition.
AnnaBridge	145:64910690c574	336	* @{
AnnaBridge	145:64910690c574	337	*/
AnnaBridge	145:64910690c574	338
AnnaBridge	145:64910690c574	339	/* Delay for DAC channel voltage settling time from DAC channel startup */
AnnaBridge	145:64910690c574	340	/* (transition from disable to enable). */
AnnaBridge	145:64910690c574	341	/* Note: DAC channel startup time depends on board application environment: */
AnnaBridge	145:64910690c574	342	/* impedance connected to DAC channel output. */
AnnaBridge	145:64910690c574	343	/* The delay below is specified under conditions: */
AnnaBridge	145:64910690c574	344	/* - voltage maximum transition (lowest to highest value) */
AnnaBridge	145:64910690c574	345	/* - until voltage reaches final value +-1LSB */
AnnaBridge	145:64910690c574	346	/* - DAC channel output buffer enabled */
AnnaBridge	145:64910690c574	347	/* - load impedance of 5kOhm (min), 50pF (max) */
AnnaBridge	145:64910690c574	348	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	145:64910690c574	349	/* parameter "tWAKEUP"). */
AnnaBridge	145:64910690c574	350	/* Unit: us */
AnnaBridge	145:64910690c574	351	#define LL_DAC_DELAY_STARTUP_VOLTAGE_SETTLING_US 15U /!< Delay for DAC channel voltage settling time from DAC channel startup (transition from disable to enable) /
AnnaBridge	145:64910690c574	352
AnnaBridge	145:64910690c574	353	/* Delay for DAC channel voltage settling time. */
AnnaBridge	145:64910690c574	354	/* Note: DAC channel startup time depends on board application environment: */
AnnaBridge	145:64910690c574	355	/* impedance connected to DAC channel output. */
AnnaBridge	145:64910690c574	356	/* The delay below is specified under conditions: */
AnnaBridge	145:64910690c574	357	/* - voltage maximum transition (lowest to highest value) */
AnnaBridge	145:64910690c574	358	/* - until voltage reaches final value +-1LSB */
AnnaBridge	145:64910690c574	359	/* - DAC channel output buffer enabled */
AnnaBridge	145:64910690c574	360	/* - load impedance of 5kOhm min, 50pF max */
AnnaBridge	145:64910690c574	361	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	145:64910690c574	362	/* parameter "tSETTLING"). */
AnnaBridge	145:64910690c574	363	/* Unit: us */
AnnaBridge	145:64910690c574	364	#define LL_DAC_DELAY_VOLTAGE_SETTLING_US 12U /!< Delay for DAC channel voltage settling time /
AnnaBridge	145:64910690c574	365	/**
AnnaBridge	145:64910690c574	366	* @}
AnnaBridge	145:64910690c574	367	*/
AnnaBridge	145:64910690c574	368
AnnaBridge	145:64910690c574	369	/**
AnnaBridge	145:64910690c574	370	* @}
AnnaBridge	145:64910690c574	371	*/
AnnaBridge	145:64910690c574	372
AnnaBridge	145:64910690c574	373	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	374	/** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
AnnaBridge	145:64910690c574	375	* @{
AnnaBridge	145:64910690c574	376	*/
AnnaBridge	145:64910690c574	377
AnnaBridge	145:64910690c574	378	/** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
AnnaBridge	145:64910690c574	379	* @{
AnnaBridge	145:64910690c574	380	*/
AnnaBridge	145:64910690c574	381
AnnaBridge	145:64910690c574	382	/**
AnnaBridge	145:64910690c574	383	* @brief Write a value in DAC register
AnnaBridge	145:64910690c574	384	* @param __INSTANCE__ DAC Instance
AnnaBridge	145:64910690c574	385	* @param __REG__ Register to be written
AnnaBridge	145:64910690c574	386	* @param __VALUE__ Value to be written in the register
AnnaBridge	145:64910690c574	387	* @retval None
AnnaBridge	145:64910690c574	388	*/
AnnaBridge	145:64910690c574	389	#define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	145:64910690c574	390
AnnaBridge	145:64910690c574	391	/**
AnnaBridge	145:64910690c574	392	* @brief Read a value in DAC register
AnnaBridge	145:64910690c574	393	* @param __INSTANCE__ DAC Instance
AnnaBridge	145:64910690c574	394	* @param __REG__ Register to be read
AnnaBridge	145:64910690c574	395	* @retval Register value
AnnaBridge	145:64910690c574	396	*/
AnnaBridge	145:64910690c574	397	#define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	145:64910690c574	398
AnnaBridge	145:64910690c574	399	/**
AnnaBridge	145:64910690c574	400	* @}
AnnaBridge	145:64910690c574	401	*/
AnnaBridge	145:64910690c574	402
AnnaBridge	145:64910690c574	403	/** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
AnnaBridge	145:64910690c574	404	* @{
AnnaBridge	145:64910690c574	405	*/
AnnaBridge	145:64910690c574	406
AnnaBridge	145:64910690c574	407	/**
AnnaBridge	145:64910690c574	408	* @brief Helper macro to get DAC channel number in decimal format
AnnaBridge	145:64910690c574	409	* from literals LL_DAC_CHANNEL_x.
AnnaBridge	145:64910690c574	410	* Example:
AnnaBridge	145:64910690c574	411	* __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
AnnaBridge	145:64910690c574	412	* will return decimal number "1".
AnnaBridge	145:64910690c574	413	* @note The input can be a value from functions where a channel
AnnaBridge	145:64910690c574	414	* number is returned.
AnnaBridge	145:64910690c574	415	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	416	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	417	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	418	*
AnnaBridge	145:64910690c574	419	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	420	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	421	* @retval 1...2 (value "2" depending on DAC channel 2 availability)
AnnaBridge	145:64910690c574	422	*/
AnnaBridge	145:64910690c574	423	#define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	145:64910690c574	424	((__CHANNEL__) & DAC_SWTR_CHX_MASK)
AnnaBridge	145:64910690c574	425
AnnaBridge	145:64910690c574	426	/**
AnnaBridge	145:64910690c574	427	* @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
AnnaBridge	145:64910690c574	428	* from number in decimal format.
AnnaBridge	145:64910690c574	429	* Example:
AnnaBridge	145:64910690c574	430	* __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
AnnaBridge	145:64910690c574	431	* will return a data equivalent to "LL_DAC_CHANNEL_1".
AnnaBridge	145:64910690c574	432	* @note If the input parameter does not correspond to a DAC channel,
AnnaBridge	145:64910690c574	433	* this macro returns value '0'.
AnnaBridge	145:64910690c574	434	* @param __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability)
AnnaBridge	145:64910690c574	435	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	436	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	437	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	438	*
AnnaBridge	145:64910690c574	439	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	440	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	441	*/
AnnaBridge	145:64910690c574	442	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	443	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	145:64910690c574	444	(((__DECIMAL_NB__) == 1U) \
AnnaBridge	145:64910690c574	445	? ( \
AnnaBridge	145:64910690c574	446	LL_DAC_CHANNEL_1 \
AnnaBridge	145:64910690c574	447	) \
AnnaBridge	145:64910690c574	448	: \
AnnaBridge	145:64910690c574	449	(((__DECIMAL_NB__) == 2U) \
AnnaBridge	145:64910690c574	450	? ( \
AnnaBridge	145:64910690c574	451	LL_DAC_CHANNEL_2 \
AnnaBridge	145:64910690c574	452	) \
AnnaBridge	145:64910690c574	453	: \
AnnaBridge	145:64910690c574	454	( \
AnnaBridge	145:64910690c574	455	0 \
AnnaBridge	145:64910690c574	456	) \
AnnaBridge	145:64910690c574	457	) \
AnnaBridge	145:64910690c574	458	)
AnnaBridge	145:64910690c574	459	#else
AnnaBridge	145:64910690c574	460	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	145:64910690c574	461	(((__DECIMAL_NB__) == 1U) \
AnnaBridge	145:64910690c574	462	? ( \
AnnaBridge	145:64910690c574	463	LL_DAC_CHANNEL_1 \
AnnaBridge	145:64910690c574	464	) \
AnnaBridge	145:64910690c574	465	: \
AnnaBridge	145:64910690c574	466	( \
AnnaBridge	145:64910690c574	467	0 \
AnnaBridge	145:64910690c574	468	) \
AnnaBridge	145:64910690c574	469	)
AnnaBridge	145:64910690c574	470	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	471
AnnaBridge	145:64910690c574	472	/**
AnnaBridge	145:64910690c574	473	* @brief Helper macro to define the DAC conversion data full-scale digital
AnnaBridge	145:64910690c574	474	* value corresponding to the selected DAC resolution.
AnnaBridge	145:64910690c574	475	* @note DAC conversion data full-scale corresponds to voltage range
AnnaBridge	145:64910690c574	476	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	145:64910690c574	477	* (refer to reference manual).
AnnaBridge	145:64910690c574	478	* @param __DAC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	479	* @arg @ref LL_DAC_RESOLUTION_12B
AnnaBridge	145:64910690c574	480	* @arg @ref LL_DAC_RESOLUTION_8B
AnnaBridge	145:64910690c574	481	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	145:64910690c574	482	*/
AnnaBridge	145:64910690c574	483	#define __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
AnnaBridge	145:64910690c574	484	((0x00000FFFU) >> ((__DAC_RESOLUTION__) << 1U))
AnnaBridge	145:64910690c574	485
AnnaBridge	145:64910690c574	486	/**
AnnaBridge	145:64910690c574	487	* @brief Helper macro to calculate the DAC conversion data (unit: digital
AnnaBridge	145:64910690c574	488	* value) corresponding to a voltage (unit: mVolt).
AnnaBridge	145:64910690c574	489	* @note This helper macro is intended to provide input data in voltage
AnnaBridge	145:64910690c574	490	* rather than digital value,
AnnaBridge	145:64910690c574	491	* to be used with LL DAC functions such as
AnnaBridge	145:64910690c574	492	* @ref LL_DAC_ConvertData12RightAligned().
AnnaBridge	145:64910690c574	493	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	145:64910690c574	494	* user board environment or can be calculated using ADC measurement
AnnaBridge	145:64910690c574	495	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	145:64910690c574	496	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	145:64910690c574	497	* @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel
AnnaBridge	145:64910690c574	498	* (unit: mVolt).
AnnaBridge	145:64910690c574	499	* @param __DAC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	500	* @arg @ref LL_DAC_RESOLUTION_12B
AnnaBridge	145:64910690c574	501	* @arg @ref LL_DAC_RESOLUTION_8B
AnnaBridge	145:64910690c574	502	* @retval DAC conversion data (unit: digital value)
AnnaBridge	145:64910690c574	503	*/
AnnaBridge	145:64910690c574	504	#define __LL_DAC_CALC_VOLTAGE_TO_DATA(__VREFANALOG_VOLTAGE__,\
AnnaBridge	145:64910690c574	505	__DAC_VOLTAGE__,\
AnnaBridge	145:64910690c574	506	__DAC_RESOLUTION__) \
AnnaBridge	145:64910690c574	507	((__DAC_VOLTAGE__) * __LL_DAC_DIGITAL_SCALE(__DAC_RESOLUTION__) \
AnnaBridge	145:64910690c574	508	/ (__VREFANALOG_VOLTAGE__) \
AnnaBridge	145:64910690c574	509	)
AnnaBridge	145:64910690c574	510
AnnaBridge	145:64910690c574	511	/**
AnnaBridge	145:64910690c574	512	* @}
AnnaBridge	145:64910690c574	513	*/
AnnaBridge	145:64910690c574	514
AnnaBridge	145:64910690c574	515	/**
AnnaBridge	145:64910690c574	516	* @}
AnnaBridge	145:64910690c574	517	*/
AnnaBridge	145:64910690c574	518
AnnaBridge	145:64910690c574	519
AnnaBridge	145:64910690c574	520	/* Exported functions --------------------------------------------------------*/
AnnaBridge	145:64910690c574	521	/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
AnnaBridge	145:64910690c574	522	* @{
AnnaBridge	145:64910690c574	523	*/
AnnaBridge	145:64910690c574	524	/** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels
AnnaBridge	145:64910690c574	525	* @{
AnnaBridge	145:64910690c574	526	*/
AnnaBridge	145:64910690c574	527
AnnaBridge	145:64910690c574	528	/**
AnnaBridge	145:64910690c574	529	* @brief Set the conversion trigger source for the selected DAC channel.
AnnaBridge	145:64910690c574	530	* @note For conversion trigger source to be effective, DAC trigger
AnnaBridge	145:64910690c574	531	* must be enabled using function @ref LL_DAC_EnableTrigger().
AnnaBridge	145:64910690c574	532	* @note To set conversion trigger source, DAC channel must be disabled.
AnnaBridge	145:64910690c574	533	* Otherwise, the setting is discarded.
AnnaBridge	145:64910690c574	534	* @note Availability of parameters of trigger sources from timer
AnnaBridge	145:64910690c574	535	* depends on timers availability on the selected device.
AnnaBridge	145:64910690c574	536	* @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n
AnnaBridge	145:64910690c574	537	* CR TSEL2 LL_DAC_SetTriggerSource
AnnaBridge	145:64910690c574	538	* @param DACx DAC instance
AnnaBridge	145:64910690c574	539	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	540	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	541	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	542	*
AnnaBridge	145:64910690c574	543	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	544	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	545	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	145:64910690c574	546	* @arg @ref LL_DAC_TRIG_SOFTWARE
AnnaBridge	145:64910690c574	547	* @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
AnnaBridge	145:64910690c574	548	* @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
AnnaBridge	145:64910690c574	549	* @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
AnnaBridge	145:64910690c574	550	* @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
AnnaBridge	145:64910690c574	551	* @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
AnnaBridge	145:64910690c574	552	* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
AnnaBridge	145:64910690c574	553	* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
AnnaBridge	145:64910690c574	554	* @retval None
AnnaBridge	145:64910690c574	555	*/
AnnaBridge	145:64910690c574	556	__STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriggerSource)
AnnaBridge	145:64910690c574	557	{
AnnaBridge	145:64910690c574	558	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	559	DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	560	TriggerSource << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	561	}
AnnaBridge	145:64910690c574	562
AnnaBridge	145:64910690c574	563	/**
AnnaBridge	145:64910690c574	564	* @brief Get the conversion trigger source for the selected DAC channel.
AnnaBridge	145:64910690c574	565	* @note For conversion trigger source to be effective, DAC trigger
AnnaBridge	145:64910690c574	566	* must be enabled using function @ref LL_DAC_EnableTrigger().
AnnaBridge	145:64910690c574	567	* @note Availability of parameters of trigger sources from timer
AnnaBridge	145:64910690c574	568	* depends on timers availability on the selected device.
AnnaBridge	145:64910690c574	569	* @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n
AnnaBridge	145:64910690c574	570	* CR TSEL2 LL_DAC_GetTriggerSource
AnnaBridge	145:64910690c574	571	* @param DACx DAC instance
AnnaBridge	145:64910690c574	572	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	573	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	574	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	575	*
AnnaBridge	145:64910690c574	576	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	577	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	578	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	579	* @arg @ref LL_DAC_TRIG_SOFTWARE
AnnaBridge	145:64910690c574	580	* @arg @ref LL_DAC_TRIG_EXT_TIM8_TRGO
AnnaBridge	145:64910690c574	581	* @arg @ref LL_DAC_TRIG_EXT_TIM7_TRGO
AnnaBridge	145:64910690c574	582	* @arg @ref LL_DAC_TRIG_EXT_TIM6_TRGO
AnnaBridge	145:64910690c574	583	* @arg @ref LL_DAC_TRIG_EXT_TIM5_TRGO
AnnaBridge	145:64910690c574	584	* @arg @ref LL_DAC_TRIG_EXT_TIM4_TRGO
AnnaBridge	145:64910690c574	585	* @arg @ref LL_DAC_TRIG_EXT_TIM2_TRGO
AnnaBridge	145:64910690c574	586	* @arg @ref LL_DAC_TRIG_EXT_EXTI_LINE9
AnnaBridge	145:64910690c574	587	*/
AnnaBridge	145:64910690c574	588	__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	589	{
AnnaBridge	145:64910690c574	590	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	591	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	592	);
AnnaBridge	145:64910690c574	593	}
AnnaBridge	145:64910690c574	594
AnnaBridge	145:64910690c574	595	/**
AnnaBridge	145:64910690c574	596	* @brief Set the waveform automatic generation mode
AnnaBridge	145:64910690c574	597	* for the selected DAC channel.
AnnaBridge	145:64910690c574	598	* @rmtoll CR WAVE1 LL_DAC_SetWaveAutoGeneration\n
AnnaBridge	145:64910690c574	599	* CR WAVE2 LL_DAC_SetWaveAutoGeneration
AnnaBridge	145:64910690c574	600	* @param DACx DAC instance
AnnaBridge	145:64910690c574	601	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	602	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	603	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	604	*
AnnaBridge	145:64910690c574	605	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	606	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	607	* @param WaveAutoGeneration This parameter can be one of the following values:
AnnaBridge	145:64910690c574	608	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
AnnaBridge	145:64910690c574	609	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
AnnaBridge	145:64910690c574	610	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
AnnaBridge	145:64910690c574	611	* @retval None
AnnaBridge	145:64910690c574	612	*/
AnnaBridge	145:64910690c574	613	__STATIC_INLINE void LL_DAC_SetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveAutoGeneration)
AnnaBridge	145:64910690c574	614	{
AnnaBridge	145:64910690c574	615	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	616	DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	617	WaveAutoGeneration << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	618	}
AnnaBridge	145:64910690c574	619
AnnaBridge	145:64910690c574	620	/**
AnnaBridge	145:64910690c574	621	* @brief Get the waveform automatic generation mode
AnnaBridge	145:64910690c574	622	* for the selected DAC channel.
AnnaBridge	145:64910690c574	623	* @rmtoll CR WAVE1 LL_DAC_GetWaveAutoGeneration\n
AnnaBridge	145:64910690c574	624	* CR WAVE2 LL_DAC_GetWaveAutoGeneration
AnnaBridge	145:64910690c574	625	* @param DACx DAC instance
AnnaBridge	145:64910690c574	626	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	627	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	628	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	629	*
AnnaBridge	145:64910690c574	630	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	631	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	632	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	633	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NONE
AnnaBridge	145:64910690c574	634	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_NOISE
AnnaBridge	145:64910690c574	635	* @arg @ref LL_DAC_WAVE_AUTO_GENERATION_TRIANGLE
AnnaBridge	145:64910690c574	636	*/
AnnaBridge	145:64910690c574	637	__STATIC_INLINE uint32_t LL_DAC_GetWaveAutoGeneration(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	638	{
AnnaBridge	145:64910690c574	639	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	640	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	641	);
AnnaBridge	145:64910690c574	642	}
AnnaBridge	145:64910690c574	643
AnnaBridge	145:64910690c574	644	/**
AnnaBridge	145:64910690c574	645	* @brief Set the noise waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	646	* Noise mode and parameters LFSR (linear feedback shift register).
AnnaBridge	145:64910690c574	647	* @note For wave generation to be effective, DAC channel
AnnaBridge	145:64910690c574	648	* wave generation mode must be enabled using
AnnaBridge	145:64910690c574	649	* function @ref LL_DAC_SetWaveAutoGeneration().
AnnaBridge	145:64910690c574	650	* @note This setting can be set when the selected DAC channel is disabled
AnnaBridge	145:64910690c574	651	* (otherwise, the setting operation is ignored).
AnnaBridge	145:64910690c574	652	* @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n
AnnaBridge	145:64910690c574	653	* CR MAMP2 LL_DAC_SetWaveNoiseLFSR
AnnaBridge	145:64910690c574	654	* @param DACx DAC instance
AnnaBridge	145:64910690c574	655	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	656	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	657	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	658	*
AnnaBridge	145:64910690c574	659	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	660	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	661	* @param NoiseLFSRMask This parameter can be one of the following values:
AnnaBridge	145:64910690c574	662	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
AnnaBridge	145:64910690c574	663	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
AnnaBridge	145:64910690c574	664	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
AnnaBridge	145:64910690c574	665	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
AnnaBridge	145:64910690c574	666	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
AnnaBridge	145:64910690c574	667	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
AnnaBridge	145:64910690c574	668	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
AnnaBridge	145:64910690c574	669	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
AnnaBridge	145:64910690c574	670	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
AnnaBridge	145:64910690c574	671	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
AnnaBridge	145:64910690c574	672	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
AnnaBridge	145:64910690c574	673	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
AnnaBridge	145:64910690c574	674	* @retval None
AnnaBridge	145:64910690c574	675	*/
AnnaBridge	145:64910690c574	676	__STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
AnnaBridge	145:64910690c574	677	{
AnnaBridge	145:64910690c574	678	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	679	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	680	NoiseLFSRMask << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	681	}
AnnaBridge	145:64910690c574	682
AnnaBridge	145:64910690c574	683	/**
AnnaBridge	145:64910690c574	684	* @brief Set the noise waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	685	* Noise mode and parameters LFSR (linear feedback shift register).
AnnaBridge	145:64910690c574	686	* @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n
AnnaBridge	145:64910690c574	687	* CR MAMP2 LL_DAC_GetWaveNoiseLFSR
AnnaBridge	145:64910690c574	688	* @param DACx DAC instance
AnnaBridge	145:64910690c574	689	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	690	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	691	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	692	*
AnnaBridge	145:64910690c574	693	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	694	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	695	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	696	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
AnnaBridge	145:64910690c574	697	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
AnnaBridge	145:64910690c574	698	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
AnnaBridge	145:64910690c574	699	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
AnnaBridge	145:64910690c574	700	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
AnnaBridge	145:64910690c574	701	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
AnnaBridge	145:64910690c574	702	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
AnnaBridge	145:64910690c574	703	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
AnnaBridge	145:64910690c574	704	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
AnnaBridge	145:64910690c574	705	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
AnnaBridge	145:64910690c574	706	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
AnnaBridge	145:64910690c574	707	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
AnnaBridge	145:64910690c574	708	*/
AnnaBridge	145:64910690c574	709	__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	710	{
AnnaBridge	145:64910690c574	711	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	712	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	713	);
AnnaBridge	145:64910690c574	714	}
AnnaBridge	145:64910690c574	715
AnnaBridge	145:64910690c574	716	/**
AnnaBridge	145:64910690c574	717	* @brief Set the triangle waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	718	* triangle mode and amplitude.
AnnaBridge	145:64910690c574	719	* @note For wave generation to be effective, DAC channel
AnnaBridge	145:64910690c574	720	* wave generation mode must be enabled using
AnnaBridge	145:64910690c574	721	* function @ref LL_DAC_SetWaveAutoGeneration().
AnnaBridge	145:64910690c574	722	* @note This setting can be set when the selected DAC channel is disabled
AnnaBridge	145:64910690c574	723	* (otherwise, the setting operation is ignored).
AnnaBridge	145:64910690c574	724	* @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n
AnnaBridge	145:64910690c574	725	* CR MAMP2 LL_DAC_SetWaveTriangleAmplitude
AnnaBridge	145:64910690c574	726	* @param DACx DAC instance
AnnaBridge	145:64910690c574	727	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	728	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	729	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	730	*
AnnaBridge	145:64910690c574	731	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	732	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	733	* @param TriangleAmplitude This parameter can be one of the following values:
AnnaBridge	145:64910690c574	734	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
AnnaBridge	145:64910690c574	735	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
AnnaBridge	145:64910690c574	736	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
AnnaBridge	145:64910690c574	737	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
AnnaBridge	145:64910690c574	738	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
AnnaBridge	145:64910690c574	739	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
AnnaBridge	145:64910690c574	740	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
AnnaBridge	145:64910690c574	741	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
AnnaBridge	145:64910690c574	742	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
AnnaBridge	145:64910690c574	743	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
AnnaBridge	145:64910690c574	744	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
AnnaBridge	145:64910690c574	745	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
AnnaBridge	145:64910690c574	746	* @retval None
AnnaBridge	145:64910690c574	747	*/
AnnaBridge	145:64910690c574	748	__STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude)
AnnaBridge	145:64910690c574	749	{
AnnaBridge	145:64910690c574	750	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	751	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	752	TriangleAmplitude << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	753	}
AnnaBridge	145:64910690c574	754
AnnaBridge	145:64910690c574	755	/**
AnnaBridge	145:64910690c574	756	* @brief Set the triangle waveform generation for the selected DAC channel:
AnnaBridge	145:64910690c574	757	* triangle mode and amplitude.
AnnaBridge	145:64910690c574	758	* @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n
AnnaBridge	145:64910690c574	759	* CR MAMP2 LL_DAC_GetWaveTriangleAmplitude
AnnaBridge	145:64910690c574	760	* @param DACx DAC instance
AnnaBridge	145:64910690c574	761	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	762	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	763	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	764	*
AnnaBridge	145:64910690c574	765	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	766	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	767	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	768	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
AnnaBridge	145:64910690c574	769	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
AnnaBridge	145:64910690c574	770	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
AnnaBridge	145:64910690c574	771	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
AnnaBridge	145:64910690c574	772	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
AnnaBridge	145:64910690c574	773	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
AnnaBridge	145:64910690c574	774	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
AnnaBridge	145:64910690c574	775	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
AnnaBridge	145:64910690c574	776	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
AnnaBridge	145:64910690c574	777	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
AnnaBridge	145:64910690c574	778	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
AnnaBridge	145:64910690c574	779	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
AnnaBridge	145:64910690c574	780	*/
AnnaBridge	145:64910690c574	781	__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	782	{
AnnaBridge	145:64910690c574	783	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	784	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	785	);
AnnaBridge	145:64910690c574	786	}
AnnaBridge	145:64910690c574	787
AnnaBridge	145:64910690c574	788	/**
AnnaBridge	145:64910690c574	789	* @brief Set the output buffer for the selected DAC channel.
AnnaBridge	145:64910690c574	790	* @rmtoll CR BOFF1 LL_DAC_SetOutputBuffer\n
AnnaBridge	145:64910690c574	791	* CR BOFF2 LL_DAC_SetOutputBuffer
AnnaBridge	145:64910690c574	792	* @param DACx DAC instance
AnnaBridge	145:64910690c574	793	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	794	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	795	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	796	*
AnnaBridge	145:64910690c574	797	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	798	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	799	* @param OutputBuffer This parameter can be one of the following values:
AnnaBridge	145:64910690c574	800	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge	145:64910690c574	801	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge	145:64910690c574	802	* @retval None
AnnaBridge	145:64910690c574	803	*/
AnnaBridge	145:64910690c574	804	__STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
AnnaBridge	145:64910690c574	805	{
AnnaBridge	145:64910690c574	806	MODIFY_REG(DACx->CR,
AnnaBridge	145:64910690c574	807	DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK),
AnnaBridge	145:64910690c574	808	OutputBuffer << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	809	}
AnnaBridge	145:64910690c574	810
AnnaBridge	145:64910690c574	811	/**
AnnaBridge	145:64910690c574	812	* @brief Get the output buffer state for the selected DAC channel.
AnnaBridge	145:64910690c574	813	* @rmtoll CR BOFF1 LL_DAC_GetOutputBuffer\n
AnnaBridge	145:64910690c574	814	* CR BOFF2 LL_DAC_GetOutputBuffer
AnnaBridge	145:64910690c574	815	* @param DACx DAC instance
AnnaBridge	145:64910690c574	816	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	817	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	818	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	819	*
AnnaBridge	145:64910690c574	820	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	821	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	822	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	823	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
AnnaBridge	145:64910690c574	824	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
AnnaBridge	145:64910690c574	825	*/
AnnaBridge	145:64910690c574	826	__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	827	{
AnnaBridge	145:64910690c574	828	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_BOFF1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	829	>> (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)
AnnaBridge	145:64910690c574	830	);
AnnaBridge	145:64910690c574	831	}
AnnaBridge	145:64910690c574	832
AnnaBridge	145:64910690c574	833	/**
AnnaBridge	145:64910690c574	834	* @}
AnnaBridge	145:64910690c574	835	*/
AnnaBridge	145:64910690c574	836
AnnaBridge	145:64910690c574	837	/** @defgroup DAC_LL_EF_DMA_Management DMA Management
AnnaBridge	145:64910690c574	838	* @{
AnnaBridge	145:64910690c574	839	*/
AnnaBridge	145:64910690c574	840
AnnaBridge	145:64910690c574	841	/**
AnnaBridge	145:64910690c574	842	* @brief Enable DAC DMA transfer request of the selected channel.
AnnaBridge	145:64910690c574	843	* @note To configure DMA source address (peripheral address),
AnnaBridge	145:64910690c574	844	* use function @ref LL_DAC_DMA_GetRegAddr().
AnnaBridge	145:64910690c574	845	* @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n
AnnaBridge	145:64910690c574	846	* CR DMAEN2 LL_DAC_EnableDMAReq
AnnaBridge	145:64910690c574	847	* @param DACx DAC instance
AnnaBridge	145:64910690c574	848	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	849	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	850	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	851	*
AnnaBridge	145:64910690c574	852	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	853	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	854	* @retval None
AnnaBridge	145:64910690c574	855	*/
AnnaBridge	145:64910690c574	856	__STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	857	{
AnnaBridge	145:64910690c574	858	SET_BIT(DACx->CR,
AnnaBridge	145:64910690c574	859	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	860	}
AnnaBridge	145:64910690c574	861
AnnaBridge	145:64910690c574	862	/**
AnnaBridge	145:64910690c574	863	* @brief Disable DAC DMA transfer request of the selected channel.
AnnaBridge	145:64910690c574	864	* @note To configure DMA source address (peripheral address),
AnnaBridge	145:64910690c574	865	* use function @ref LL_DAC_DMA_GetRegAddr().
AnnaBridge	145:64910690c574	866	* @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n
AnnaBridge	145:64910690c574	867	* CR DMAEN2 LL_DAC_DisableDMAReq
AnnaBridge	145:64910690c574	868	* @param DACx DAC instance
AnnaBridge	145:64910690c574	869	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	870	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	871	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	872	*
AnnaBridge	145:64910690c574	873	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	874	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	875	* @retval None
AnnaBridge	145:64910690c574	876	*/
AnnaBridge	145:64910690c574	877	__STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	878	{
AnnaBridge	145:64910690c574	879	CLEAR_BIT(DACx->CR,
AnnaBridge	145:64910690c574	880	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	881	}
AnnaBridge	145:64910690c574	882
AnnaBridge	145:64910690c574	883	/**
AnnaBridge	145:64910690c574	884	* @brief Get DAC DMA transfer request state of the selected channel.
AnnaBridge	145:64910690c574	885	* (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
AnnaBridge	145:64910690c574	886	* @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n
AnnaBridge	145:64910690c574	887	* CR DMAEN2 LL_DAC_IsDMAReqEnabled
AnnaBridge	145:64910690c574	888	* @param DACx DAC instance
AnnaBridge	145:64910690c574	889	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	890	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	891	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	892	*
AnnaBridge	145:64910690c574	893	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	894	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	895	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	896	*/
AnnaBridge	145:64910690c574	897	__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	898	{
AnnaBridge	145:64910690c574	899	return (READ_BIT(DACx->CR,
AnnaBridge	145:64910690c574	900	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	901	== (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge	145:64910690c574	902	}
AnnaBridge	145:64910690c574	903
AnnaBridge	145:64910690c574	904	/**
AnnaBridge	145:64910690c574	905	* @brief Function to help to configure DMA transfer to DAC: retrieve the
AnnaBridge	145:64910690c574	906	* DAC register address from DAC instance and a list of DAC registers
AnnaBridge	145:64910690c574	907	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	145:64910690c574	908	* @note These DAC registers are data holding registers:
AnnaBridge	145:64910690c574	909	* when DAC conversion is requested, DAC generates a DMA transfer
AnnaBridge	145:64910690c574	910	* request to have data available in DAC data holding registers.
AnnaBridge	145:64910690c574	911	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	145:64910690c574	912	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	145:64910690c574	913	* Example:
AnnaBridge	145:64910690c574	914	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	145:64910690c574	915	* LL_DMA_CHANNEL_1,
AnnaBridge	145:64910690c574	916	* (uint32_t)&< array or variable >,
AnnaBridge	145:64910690c574	917	* LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
AnnaBridge	145:64910690c574	918	* LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
AnnaBridge	145:64910690c574	919	* @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	920	* DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	921	* DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	922	* DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	923	* DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
AnnaBridge	145:64910690c574	924	* DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr
AnnaBridge	145:64910690c574	925	* @param DACx DAC instance
AnnaBridge	145:64910690c574	926	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	927	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	928	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	929	*
AnnaBridge	145:64910690c574	930	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	931	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	932	* @param Register This parameter can be one of the following values:
AnnaBridge	145:64910690c574	933	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
AnnaBridge	145:64910690c574	934	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
AnnaBridge	145:64910690c574	935	* @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
AnnaBridge	145:64910690c574	936	* @retval DAC register address
AnnaBridge	145:64910690c574	937	*/
AnnaBridge	145:64910690c574	938	__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
AnnaBridge	145:64910690c574	939	{
AnnaBridge	145:64910690c574	940	/* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
AnnaBridge	145:64910690c574	941	/* DAC channel selected. */
AnnaBridge	145:64910690c574	942	return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register))));
AnnaBridge	145:64910690c574	943	}
AnnaBridge	145:64910690c574	944	/**
AnnaBridge	145:64910690c574	945	* @}
AnnaBridge	145:64910690c574	946	*/
AnnaBridge	145:64910690c574	947
AnnaBridge	145:64910690c574	948	/** @defgroup DAC_LL_EF_Operation Operation on DAC channels
AnnaBridge	145:64910690c574	949	* @{
AnnaBridge	145:64910690c574	950	*/
AnnaBridge	145:64910690c574	951
AnnaBridge	145:64910690c574	952	/**
AnnaBridge	145:64910690c574	953	* @brief Enable DAC selected channel.
AnnaBridge	145:64910690c574	954	* @rmtoll CR EN1 LL_DAC_Enable\n
AnnaBridge	145:64910690c574	955	* CR EN2 LL_DAC_Enable
AnnaBridge	145:64910690c574	956	* @note After enable from off state, DAC channel requires a delay
AnnaBridge	145:64910690c574	957	* for output voltage to reach accuracy +/- 1 LSB.
AnnaBridge	145:64910690c574	958	* Refer to device datasheet, parameter "tWAKEUP".
AnnaBridge	145:64910690c574	959	* @param DACx DAC instance
AnnaBridge	145:64910690c574	960	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	961	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	962	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	963	*
AnnaBridge	145:64910690c574	964	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	965	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	966	* @retval None
AnnaBridge	145:64910690c574	967	*/
AnnaBridge	145:64910690c574	968	__STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	969	{
AnnaBridge	145:64910690c574	970	SET_BIT(DACx->CR,
AnnaBridge	145:64910690c574	971	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	972	}
AnnaBridge	145:64910690c574	973
AnnaBridge	145:64910690c574	974	/**
AnnaBridge	145:64910690c574	975	* @brief Disable DAC selected channel.
AnnaBridge	145:64910690c574	976	* @rmtoll CR EN1 LL_DAC_Disable\n
AnnaBridge	145:64910690c574	977	* CR EN2 LL_DAC_Disable
AnnaBridge	145:64910690c574	978	* @param DACx DAC instance
AnnaBridge	145:64910690c574	979	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	980	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	981	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	982	*
AnnaBridge	145:64910690c574	983	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	984	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	985	* @retval None
AnnaBridge	145:64910690c574	986	*/
AnnaBridge	145:64910690c574	987	__STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	988	{
AnnaBridge	145:64910690c574	989	CLEAR_BIT(DACx->CR,
AnnaBridge	145:64910690c574	990	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	991	}
AnnaBridge	145:64910690c574	992
AnnaBridge	145:64910690c574	993	/**
AnnaBridge	145:64910690c574	994	* @brief Get DAC enable state of the selected channel.
AnnaBridge	145:64910690c574	995	* (0: DAC channel is disabled, 1: DAC channel is enabled)
AnnaBridge	145:64910690c574	996	* @rmtoll CR EN1 LL_DAC_IsEnabled\n
AnnaBridge	145:64910690c574	997	* CR EN2 LL_DAC_IsEnabled
AnnaBridge	145:64910690c574	998	* @param DACx DAC instance
AnnaBridge	145:64910690c574	999	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1000	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1001	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1002	*
AnnaBridge	145:64910690c574	1003	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1004	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1005	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1006	*/
AnnaBridge	145:64910690c574	1007	__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1008	{
AnnaBridge	145:64910690c574	1009	return (READ_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1010	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	1011	== (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge	145:64910690c574	1012	}
AnnaBridge	145:64910690c574	1013
AnnaBridge	145:64910690c574	1014	/**
AnnaBridge	145:64910690c574	1015	* @brief Enable DAC trigger of the selected channel.
AnnaBridge	145:64910690c574	1016	* @note - If DAC trigger is disabled, DAC conversion is performed
AnnaBridge	145:64910690c574	1017	* automatically once the data holding register is updated,
AnnaBridge	145:64910690c574	1018	* using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
AnnaBridge	145:64910690c574	1019	* @ref LL_DAC_ConvertData12RightAligned(), ...
AnnaBridge	145:64910690c574	1020	* - If DAC trigger is enabled, DAC conversion is performed
AnnaBridge	145:64910690c574	1021	* only when a hardware of software trigger event is occurring.
AnnaBridge	145:64910690c574	1022	* Select trigger source using
AnnaBridge	145:64910690c574	1023	* function @ref LL_DAC_SetTriggerSource().
AnnaBridge	145:64910690c574	1024	* @rmtoll CR TEN1 LL_DAC_EnableTrigger\n
AnnaBridge	145:64910690c574	1025	* CR TEN2 LL_DAC_EnableTrigger
AnnaBridge	145:64910690c574	1026	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1027	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1028	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1029	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1030	*
AnnaBridge	145:64910690c574	1031	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1032	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1033	* @retval None
AnnaBridge	145:64910690c574	1034	*/
AnnaBridge	145:64910690c574	1035	__STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1036	{
AnnaBridge	145:64910690c574	1037	SET_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1038	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	1039	}
AnnaBridge	145:64910690c574	1040
AnnaBridge	145:64910690c574	1041	/**
AnnaBridge	145:64910690c574	1042	* @brief Disable DAC trigger of the selected channel.
AnnaBridge	145:64910690c574	1043	* @rmtoll CR TEN1 LL_DAC_DisableTrigger\n
AnnaBridge	145:64910690c574	1044	* CR TEN2 LL_DAC_DisableTrigger
AnnaBridge	145:64910690c574	1045	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1046	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1047	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1048	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1049	*
AnnaBridge	145:64910690c574	1050	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1051	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1052	* @retval None
AnnaBridge	145:64910690c574	1053	*/
AnnaBridge	145:64910690c574	1054	__STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1055	{
AnnaBridge	145:64910690c574	1056	CLEAR_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1057	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK));
AnnaBridge	145:64910690c574	1058	}
AnnaBridge	145:64910690c574	1059
AnnaBridge	145:64910690c574	1060	/**
AnnaBridge	145:64910690c574	1061	* @brief Get DAC trigger state of the selected channel.
AnnaBridge	145:64910690c574	1062	* (0: DAC trigger is disabled, 1: DAC trigger is enabled)
AnnaBridge	145:64910690c574	1063	* @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n
AnnaBridge	145:64910690c574	1064	* CR TEN2 LL_DAC_IsTriggerEnabled
AnnaBridge	145:64910690c574	1065	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1066	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1067	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1068	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1069	*
AnnaBridge	145:64910690c574	1070	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1071	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1072	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1073	*/
AnnaBridge	145:64910690c574	1074	__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1075	{
AnnaBridge	145:64910690c574	1076	return (READ_BIT(DACx->CR,
AnnaBridge	145:64910690c574	1077	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK))
AnnaBridge	145:64910690c574	1078	== (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHX_BITOFFSET_MASK)));
AnnaBridge	145:64910690c574	1079	}
AnnaBridge	145:64910690c574	1080
AnnaBridge	145:64910690c574	1081	/**
AnnaBridge	145:64910690c574	1082	* @brief Trig DAC conversion by software for the selected DAC channel.
AnnaBridge	145:64910690c574	1083	* @note Preliminarily, DAC trigger must be set to software trigger
AnnaBridge	145:64910690c574	1084	* using function @ref LL_DAC_SetTriggerSource()
AnnaBridge	145:64910690c574	1085	* with parameter "LL_DAC_TRIGGER_SOFTWARE".
AnnaBridge	145:64910690c574	1086	* and DAC trigger must be enabled using
AnnaBridge	145:64910690c574	1087	* function @ref LL_DAC_EnableTrigger().
AnnaBridge	145:64910690c574	1088	* @note For devices featuring DAC with 2 channels: this function
AnnaBridge	145:64910690c574	1089	* can perform a SW start of both DAC channels simultaneously.
AnnaBridge	145:64910690c574	1090	* Two channels can be selected as parameter.
AnnaBridge	145:64910690c574	1091	* Example: (LL_DAC_CHANNEL_1 \| LL_DAC_CHANNEL_2)
AnnaBridge	145:64910690c574	1092	* @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n
AnnaBridge	145:64910690c574	1093	* SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion
AnnaBridge	145:64910690c574	1094	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1095	* @param DAC_Channel This parameter can a combination of the following values:
AnnaBridge	145:64910690c574	1096	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1097	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1098	*
AnnaBridge	145:64910690c574	1099	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1100	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1101	* @retval None
AnnaBridge	145:64910690c574	1102	*/
AnnaBridge	145:64910690c574	1103	__STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1104	{
AnnaBridge	145:64910690c574	1105	SET_BIT(DACx->SWTRIGR,
AnnaBridge	145:64910690c574	1106	(DAC_Channel & DAC_SWTR_CHX_MASK));
AnnaBridge	145:64910690c574	1107	}
AnnaBridge	145:64910690c574	1108
AnnaBridge	145:64910690c574	1109	/**
AnnaBridge	145:64910690c574	1110	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1111	* in format 12 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1112	* for the selected DAC channel.
AnnaBridge	145:64910690c574	1113	* @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n
AnnaBridge	145:64910690c574	1114	* DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned
AnnaBridge	145:64910690c574	1115	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1116	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1117	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1118	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1119	*
AnnaBridge	145:64910690c574	1120	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1121	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1122	* @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1123	* @retval None
AnnaBridge	145:64910690c574	1124	*/
AnnaBridge	145:64910690c574	1125	__STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge	145:64910690c574	1126	{
AnnaBridge	145:64910690c574	1127	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12RX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1128
AnnaBridge	145:64910690c574	1129	MODIFY_REG(*preg,
AnnaBridge	145:64910690c574	1130	DAC_DHR12R1_DACC1DHR,
AnnaBridge	145:64910690c574	1131	Data);
AnnaBridge	145:64910690c574	1132	}
AnnaBridge	145:64910690c574	1133
AnnaBridge	145:64910690c574	1134	/**
AnnaBridge	145:64910690c574	1135	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1136	* in format 12 bits left alignment (MSB aligned on bit 15),
AnnaBridge	145:64910690c574	1137	* for the selected DAC channel.
AnnaBridge	145:64910690c574	1138	* @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n
AnnaBridge	145:64910690c574	1139	* DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned
AnnaBridge	145:64910690c574	1140	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1141	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1142	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1143	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1144	*
AnnaBridge	145:64910690c574	1145	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1146	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1147	* @param Data Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1148	* @retval None
AnnaBridge	145:64910690c574	1149	*/
AnnaBridge	145:64910690c574	1150	__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge	145:64910690c574	1151	{
AnnaBridge	145:64910690c574	1152	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12LX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1153
AnnaBridge	145:64910690c574	1154	MODIFY_REG(*preg,
AnnaBridge	145:64910690c574	1155	DAC_DHR12L1_DACC1DHR,
AnnaBridge	145:64910690c574	1156	Data);
AnnaBridge	145:64910690c574	1157	}
AnnaBridge	145:64910690c574	1158
AnnaBridge	145:64910690c574	1159	/**
AnnaBridge	145:64910690c574	1160	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1161	* in format 8 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1162	* for the selected DAC channel.
AnnaBridge	145:64910690c574	1163	* @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n
AnnaBridge	145:64910690c574	1164	* DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned
AnnaBridge	145:64910690c574	1165	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1166	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1167	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1168	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1169	*
AnnaBridge	145:64910690c574	1170	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1171	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1172	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1173	* @retval None
AnnaBridge	145:64910690c574	1174	*/
AnnaBridge	145:64910690c574	1175	__STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
AnnaBridge	145:64910690c574	1176	{
AnnaBridge	145:64910690c574	1177	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8RX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1178
AnnaBridge	145:64910690c574	1179	MODIFY_REG(*preg,
AnnaBridge	145:64910690c574	1180	DAC_DHR8R1_DACC1DHR,
AnnaBridge	145:64910690c574	1181	Data);
AnnaBridge	145:64910690c574	1182	}
AnnaBridge	145:64910690c574	1183
AnnaBridge	145:64910690c574	1184	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1185	/**
AnnaBridge	145:64910690c574	1186	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1187	* in format 12 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1188	* for both DAC channels.
AnnaBridge	145:64910690c574	1189	* @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n
AnnaBridge	145:64910690c574	1190	* DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned
AnnaBridge	145:64910690c574	1191	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1192	* @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1193	* @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1194	* @retval None
AnnaBridge	145:64910690c574	1195	*/
AnnaBridge	145:64910690c574	1196	__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge	145:64910690c574	1197	{
AnnaBridge	145:64910690c574	1198	MODIFY_REG(DACx->DHR12RD,
AnnaBridge	145:64910690c574	1199	(DAC_DHR12RD_DACC2DHR \| DAC_DHR12RD_DACC1DHR),
AnnaBridge	145:64910690c574	1200	((DataChannel2 << DAC_DHR12RD_DACC2DHR_BITOFFSET_POS) \| DataChannel1));
AnnaBridge	145:64910690c574	1201	}
AnnaBridge	145:64910690c574	1202
AnnaBridge	145:64910690c574	1203	/**
AnnaBridge	145:64910690c574	1204	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1205	* in format 12 bits left alignment (MSB aligned on bit 15),
AnnaBridge	145:64910690c574	1206	* for both DAC channels.
AnnaBridge	145:64910690c574	1207	* @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n
AnnaBridge	145:64910690c574	1208	* DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned
AnnaBridge	145:64910690c574	1209	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1210	* @param DataChannel1 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1211	* @param DataChannel2 Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1212	* @retval None
AnnaBridge	145:64910690c574	1213	*/
AnnaBridge	145:64910690c574	1214	__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge	145:64910690c574	1215	{
AnnaBridge	145:64910690c574	1216	/* Note: Data of DAC channel 2 shift value subtracted of 4 because */
AnnaBridge	145:64910690c574	1217	/* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */
AnnaBridge	145:64910690c574	1218	/* the 4 LSB must be taken into account for the shift value. */
AnnaBridge	145:64910690c574	1219	MODIFY_REG(DACx->DHR12LD,
AnnaBridge	145:64910690c574	1220	(DAC_DHR12LD_DACC2DHR \| DAC_DHR12LD_DACC1DHR),
AnnaBridge	145:64910690c574	1221	((DataChannel2 << (DAC_DHR12LD_DACC2DHR_BITOFFSET_POS - 4U)) \| DataChannel1));
AnnaBridge	145:64910690c574	1222	}
AnnaBridge	145:64910690c574	1223
AnnaBridge	145:64910690c574	1224	/**
AnnaBridge	145:64910690c574	1225	* @brief Set the data to be loaded in the data holding register
AnnaBridge	145:64910690c574	1226	* in format 8 bits left alignment (LSB aligned on bit 0),
AnnaBridge	145:64910690c574	1227	* for both DAC channels.
AnnaBridge	145:64910690c574	1228	* @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n
AnnaBridge	145:64910690c574	1229	* DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned
AnnaBridge	145:64910690c574	1230	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1231	* @param DataChannel1 Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1232	* @param DataChannel2 Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1233	* @retval None
AnnaBridge	145:64910690c574	1234	*/
AnnaBridge	145:64910690c574	1235	__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
AnnaBridge	145:64910690c574	1236	{
AnnaBridge	145:64910690c574	1237	MODIFY_REG(DACx->DHR8RD,
AnnaBridge	145:64910690c574	1238	(DAC_DHR8RD_DACC2DHR \| DAC_DHR8RD_DACC1DHR),
AnnaBridge	145:64910690c574	1239	((DataChannel2 << DAC_DHR8RD_DACC2DHR_BITOFFSET_POS) \| DataChannel1));
AnnaBridge	145:64910690c574	1240	}
AnnaBridge	145:64910690c574	1241
AnnaBridge	145:64910690c574	1242	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1243	/**
AnnaBridge	145:64910690c574	1244	* @brief Retrieve output data currently generated for the selected DAC channel.
AnnaBridge	145:64910690c574	1245	* @note Whatever alignment and resolution settings
AnnaBridge	145:64910690c574	1246	* (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
AnnaBridge	145:64910690c574	1247	* @ref LL_DAC_ConvertData12RightAligned(), ...),
AnnaBridge	145:64910690c574	1248	* output data format is 12 bits right aligned (LSB aligned on bit 0).
AnnaBridge	145:64910690c574	1249	* @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n
AnnaBridge	145:64910690c574	1250	* DOR2 DACC2DOR LL_DAC_RetrieveOutputData
AnnaBridge	145:64910690c574	1251	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1252	* @param DAC_Channel This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1253	* @arg @ref LL_DAC_CHANNEL_1
AnnaBridge	145:64910690c574	1254	* @arg @ref LL_DAC_CHANNEL_2 (1)
AnnaBridge	145:64910690c574	1255	*
AnnaBridge	145:64910690c574	1256	* (1) On this STM32 serie, parameter not available on all devices.
AnnaBridge	145:64910690c574	1257	* Refer to device datasheet for channels availability.
AnnaBridge	145:64910690c574	1258	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	1259	*/
AnnaBridge	145:64910690c574	1260	__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
AnnaBridge	145:64910690c574	1261	{
AnnaBridge	145:64910690c574	1262	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DORX_REGOFFSET_MASK));
AnnaBridge	145:64910690c574	1263
AnnaBridge	145:64910690c574	1264	return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
AnnaBridge	145:64910690c574	1265	}
AnnaBridge	145:64910690c574	1266
AnnaBridge	145:64910690c574	1267	/**
AnnaBridge	145:64910690c574	1268	* @}
AnnaBridge	145:64910690c574	1269	*/
AnnaBridge	145:64910690c574	1270
AnnaBridge	145:64910690c574	1271	/** @defgroup DAC_LL_EF_FLAG_Management FLAG Management
AnnaBridge	145:64910690c574	1272	* @{
AnnaBridge	145:64910690c574	1273	*/
AnnaBridge	145:64910690c574	1274	/**
AnnaBridge	145:64910690c574	1275	* @brief Get DAC underrun flag for DAC channel 1
AnnaBridge	145:64910690c574	1276	* @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1
AnnaBridge	145:64910690c574	1277	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1278	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1279	*/
AnnaBridge	145:64910690c574	1280	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1281	{
AnnaBridge	145:64910690c574	1282	return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR1) == (LL_DAC_FLAG_DMAUDR1));
AnnaBridge	145:64910690c574	1283	}
AnnaBridge	145:64910690c574	1284
AnnaBridge	145:64910690c574	1285	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1286	/**
AnnaBridge	145:64910690c574	1287	* @brief Get DAC underrun flag for DAC channel 2
AnnaBridge	145:64910690c574	1288	* @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2
AnnaBridge	145:64910690c574	1289	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1290	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1291	*/
AnnaBridge	145:64910690c574	1292	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1293	{
AnnaBridge	145:64910690c574	1294	return (READ_BIT(DACx->SR, LL_DAC_FLAG_DMAUDR2) == (LL_DAC_FLAG_DMAUDR2));
AnnaBridge	145:64910690c574	1295	}
AnnaBridge	145:64910690c574	1296	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1297
AnnaBridge	145:64910690c574	1298	/**
AnnaBridge	145:64910690c574	1299	* @brief Clear DAC underrun flag for DAC channel 1
AnnaBridge	145:64910690c574	1300	* @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1
AnnaBridge	145:64910690c574	1301	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1302	* @retval None
AnnaBridge	145:64910690c574	1303	*/
AnnaBridge	145:64910690c574	1304	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1305	{
AnnaBridge	145:64910690c574	1306	WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR1);
AnnaBridge	145:64910690c574	1307	}
AnnaBridge	145:64910690c574	1308
AnnaBridge	145:64910690c574	1309	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1310	/**
AnnaBridge	145:64910690c574	1311	* @brief Clear DAC underrun flag for DAC channel 2
AnnaBridge	145:64910690c574	1312	* @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2
AnnaBridge	145:64910690c574	1313	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1314	* @retval None
AnnaBridge	145:64910690c574	1315	*/
AnnaBridge	145:64910690c574	1316	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1317	{
AnnaBridge	145:64910690c574	1318	WRITE_REG(DACx->SR, LL_DAC_FLAG_DMAUDR2);
AnnaBridge	145:64910690c574	1319	}
AnnaBridge	145:64910690c574	1320	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1321
AnnaBridge	145:64910690c574	1322	/**
AnnaBridge	145:64910690c574	1323	* @}
AnnaBridge	145:64910690c574	1324	*/
AnnaBridge	145:64910690c574	1325
AnnaBridge	145:64910690c574	1326	/** @defgroup DAC_LL_EF_IT_Management IT management
AnnaBridge	145:64910690c574	1327	* @{
AnnaBridge	145:64910690c574	1328	*/
AnnaBridge	145:64910690c574	1329
AnnaBridge	145:64910690c574	1330	/**
AnnaBridge	145:64910690c574	1331	* @brief Enable DMA underrun interrupt for DAC channel 1
AnnaBridge	145:64910690c574	1332	* @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1
AnnaBridge	145:64910690c574	1333	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1334	* @retval None
AnnaBridge	145:64910690c574	1335	*/
AnnaBridge	145:64910690c574	1336	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1337	{
AnnaBridge	145:64910690c574	1338	SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
AnnaBridge	145:64910690c574	1339	}
AnnaBridge	145:64910690c574	1340
AnnaBridge	145:64910690c574	1341	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1342	/**
AnnaBridge	145:64910690c574	1343	* @brief Enable DMA underrun interrupt for DAC channel 2
AnnaBridge	145:64910690c574	1344	* @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2
AnnaBridge	145:64910690c574	1345	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1346	* @retval None
AnnaBridge	145:64910690c574	1347	*/
AnnaBridge	145:64910690c574	1348	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1349	{
AnnaBridge	145:64910690c574	1350	SET_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
AnnaBridge	145:64910690c574	1351	}
AnnaBridge	145:64910690c574	1352	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1353
AnnaBridge	145:64910690c574	1354	/**
AnnaBridge	145:64910690c574	1355	* @brief Disable DMA underrun interrupt for DAC channel 1
AnnaBridge	145:64910690c574	1356	* @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1
AnnaBridge	145:64910690c574	1357	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1358	* @retval None
AnnaBridge	145:64910690c574	1359	*/
AnnaBridge	145:64910690c574	1360	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1361	{
AnnaBridge	145:64910690c574	1362	CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1);
AnnaBridge	145:64910690c574	1363	}
AnnaBridge	145:64910690c574	1364
AnnaBridge	145:64910690c574	1365	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1366	/**
AnnaBridge	145:64910690c574	1367	* @brief Disable DMA underrun interrupt for DAC channel 2
AnnaBridge	145:64910690c574	1368	* @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2
AnnaBridge	145:64910690c574	1369	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1370	* @retval None
AnnaBridge	145:64910690c574	1371	*/
AnnaBridge	145:64910690c574	1372	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1373	{
AnnaBridge	145:64910690c574	1374	CLEAR_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2);
AnnaBridge	145:64910690c574	1375	}
AnnaBridge	145:64910690c574	1376	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1377
AnnaBridge	145:64910690c574	1378	/**
AnnaBridge	145:64910690c574	1379	* @brief Get DMA underrun interrupt for DAC channel 1
AnnaBridge	145:64910690c574	1380	* @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1
AnnaBridge	145:64910690c574	1381	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1382	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1383	*/
AnnaBridge	145:64910690c574	1384	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1385	{
AnnaBridge	145:64910690c574	1386	return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE1) == (LL_DAC_IT_DMAUDRIE1));
AnnaBridge	145:64910690c574	1387	}
AnnaBridge	145:64910690c574	1388
AnnaBridge	145:64910690c574	1389	#if defined(DAC_CHANNEL2_SUPPORT)
AnnaBridge	145:64910690c574	1390	/**
AnnaBridge	145:64910690c574	1391	* @brief Get DMA underrun interrupt for DAC channel 2
AnnaBridge	145:64910690c574	1392	* @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2
AnnaBridge	145:64910690c574	1393	* @param DACx DAC instance
AnnaBridge	145:64910690c574	1394	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1395	*/
AnnaBridge	145:64910690c574	1396	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
AnnaBridge	145:64910690c574	1397	{
AnnaBridge	145:64910690c574	1398	return (READ_BIT(DACx->CR, LL_DAC_IT_DMAUDRIE2) == (LL_DAC_IT_DMAUDRIE2));
AnnaBridge	145:64910690c574	1399	}
AnnaBridge	145:64910690c574	1400	#endif /* DAC_CHANNEL2_SUPPORT */
AnnaBridge	145:64910690c574	1401
AnnaBridge	145:64910690c574	1402	/**
AnnaBridge	145:64910690c574	1403	* @}
AnnaBridge	145:64910690c574	1404	*/
AnnaBridge	145:64910690c574	1405
AnnaBridge	145:64910690c574	1406	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	1407	/** @defgroup DAC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	145:64910690c574	1408	* @{
AnnaBridge	145:64910690c574	1409	*/
AnnaBridge	145:64910690c574	1410
AnnaBridge	145:64910690c574	1411	ErrorStatus LL_DAC_DeInit(DAC_TypeDef* DACx);
AnnaBridge	145:64910690c574	1412	ErrorStatus LL_DAC_Init(DAC_TypeDef* DACx, uint32_t DAC_Channel, LL_DAC_InitTypeDef* DAC_InitStruct);
AnnaBridge	145:64910690c574	1413	void LL_DAC_StructInit(LL_DAC_InitTypeDef* DAC_InitStruct);
AnnaBridge	145:64910690c574	1414
AnnaBridge	145:64910690c574	1415	/**
AnnaBridge	145:64910690c574	1416	* @}
AnnaBridge	145:64910690c574	1417	*/
AnnaBridge	145:64910690c574	1418	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	1419
AnnaBridge	145:64910690c574	1420	/**
AnnaBridge	145:64910690c574	1421	* @}
AnnaBridge	145:64910690c574	1422	*/
AnnaBridge	145:64910690c574	1423
AnnaBridge	145:64910690c574	1424	/**
AnnaBridge	145:64910690c574	1425	* @}
AnnaBridge	145:64910690c574	1426	*/
AnnaBridge	145:64910690c574	1427
AnnaBridge	145:64910690c574	1428	#endif /* DAC */
AnnaBridge	145:64910690c574	1429
AnnaBridge	145:64910690c574	1430	/**
AnnaBridge	145:64910690c574	1431	* @}
AnnaBridge	145:64910690c574	1432	*/
AnnaBridge	145:64910690c574	1433
AnnaBridge	145:64910690c574	1434	#ifdef __cplusplus
AnnaBridge	145:64910690c574	1435	}
AnnaBridge	145:64910690c574	1436	#endif
AnnaBridge	145:64910690c574	1437
AnnaBridge	145:64910690c574	1438	#endif /* __STM32F4xx_LL_DAC_H */
AnnaBridge	145:64910690c574	1439
AnnaBridge	145:64910690c574	1440	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/