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TARGET_NUCLEO_F303RE/TOOLCHAIN_ARM_MICRO/stm32f3xx_ll_i2c.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_DISCO_F303VC/TARGET_STM/TARGET_STM32F3/device/stm32f3xx_ll_i2c.h@168:b9e159c1930a 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 163:e59c8e839560 1 /**
AnnaBridge 163:e59c8e839560 2 ******************************************************************************
AnnaBridge 163:e59c8e839560 3 * @file stm32f3xx_ll_i2c.h
AnnaBridge 163:e59c8e839560 4 * @author MCD Application Team
AnnaBridge 163:e59c8e839560 5 * @brief Header file of I2C LL module.
AnnaBridge 163:e59c8e839560 6 ******************************************************************************
AnnaBridge 163:e59c8e839560 7 * @attention
AnnaBridge 163:e59c8e839560 8 *
AnnaBridge 163:e59c8e839560 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 163:e59c8e839560 10 *
AnnaBridge 163:e59c8e839560 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 163:e59c8e839560 12 * are permitted provided that the following conditions are met:
AnnaBridge 163:e59c8e839560 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 163:e59c8e839560 14 * this list of conditions and the following disclaimer.
AnnaBridge 163:e59c8e839560 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 163:e59c8e839560 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 163:e59c8e839560 17 * and/or other materials provided with the distribution.
AnnaBridge 163:e59c8e839560 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 163:e59c8e839560 19 * may be used to endorse or promote products derived from this software
AnnaBridge 163:e59c8e839560 20 * without specific prior written permission.
AnnaBridge 163:e59c8e839560 21 *
AnnaBridge 163:e59c8e839560 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 163:e59c8e839560 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 163:e59c8e839560 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 163:e59c8e839560 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 163:e59c8e839560 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 163:e59c8e839560 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 163:e59c8e839560 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 163:e59c8e839560 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 163:e59c8e839560 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 163:e59c8e839560 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 163:e59c8e839560 32 *
AnnaBridge 163:e59c8e839560 33 ******************************************************************************
AnnaBridge 163:e59c8e839560 34 */
AnnaBridge 163:e59c8e839560 35
AnnaBridge 163:e59c8e839560 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 163:e59c8e839560 37 #ifndef __STM32F3xx_LL_I2C_H
AnnaBridge 163:e59c8e839560 38 #define __STM32F3xx_LL_I2C_H
AnnaBridge 163:e59c8e839560 39
AnnaBridge 163:e59c8e839560 40 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 41 extern "C" {
AnnaBridge 163:e59c8e839560 42 #endif
AnnaBridge 163:e59c8e839560 43
AnnaBridge 163:e59c8e839560 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 45 #include "stm32f3xx.h"
AnnaBridge 163:e59c8e839560 46
AnnaBridge 163:e59c8e839560 47 /** @addtogroup STM32F3xx_LL_Driver
AnnaBridge 163:e59c8e839560 48 * @{
AnnaBridge 163:e59c8e839560 49 */
AnnaBridge 163:e59c8e839560 50
AnnaBridge 163:e59c8e839560 51 #if defined (I2C1) || defined (I2C2) || defined (I2C3)
AnnaBridge 163:e59c8e839560 52
AnnaBridge 163:e59c8e839560 53 /** @defgroup I2C_LL I2C
AnnaBridge 163:e59c8e839560 54 * @{
AnnaBridge 163:e59c8e839560 55 */
AnnaBridge 163:e59c8e839560 56
AnnaBridge 163:e59c8e839560 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 59
AnnaBridge 163:e59c8e839560 60 /* Private constants ---------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 61 /** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge 163:e59c8e839560 62 * @{
AnnaBridge 163:e59c8e839560 63 */
AnnaBridge 163:e59c8e839560 64 /**
AnnaBridge 163:e59c8e839560 65 * @}
AnnaBridge 163:e59c8e839560 66 */
AnnaBridge 163:e59c8e839560 67
AnnaBridge 163:e59c8e839560 68 /* Private macros ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 69 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 163:e59c8e839560 70 /** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge 163:e59c8e839560 71 * @{
AnnaBridge 163:e59c8e839560 72 */
AnnaBridge 163:e59c8e839560 73 /**
AnnaBridge 163:e59c8e839560 74 * @}
AnnaBridge 163:e59c8e839560 75 */
AnnaBridge 163:e59c8e839560 76 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 163:e59c8e839560 77
AnnaBridge 163:e59c8e839560 78 /* Exported types ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 79 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 163:e59c8e839560 80 /** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge 163:e59c8e839560 81 * @{
AnnaBridge 163:e59c8e839560 82 */
AnnaBridge 163:e59c8e839560 83 typedef struct
AnnaBridge 163:e59c8e839560 84 {
AnnaBridge 163:e59c8e839560 85 uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge 163:e59c8e839560 86 This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge 163:e59c8e839560 87
AnnaBridge 163:e59c8e839560 88 This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge 163:e59c8e839560 89
AnnaBridge 163:e59c8e839560 90 uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge 163:e59c8e839560 91 This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge 163:e59c8e839560 92 the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge 163:e59c8e839560 93
AnnaBridge 163:e59c8e839560 94 This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge 163:e59c8e839560 95
AnnaBridge 163:e59c8e839560 96 uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge 163:e59c8e839560 97 This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge 163:e59c8e839560 98
AnnaBridge 163:e59c8e839560 99 This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge 163:e59c8e839560 100
AnnaBridge 163:e59c8e839560 101 uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge 163:e59c8e839560 102 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge 163:e59c8e839560 103
AnnaBridge 163:e59c8e839560 104 This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge 163:e59c8e839560 105
AnnaBridge 163:e59c8e839560 106 uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge 163:e59c8e839560 107 This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge 163:e59c8e839560 108
AnnaBridge 163:e59c8e839560 109 This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge 163:e59c8e839560 110
AnnaBridge 163:e59c8e839560 111 uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge 163:e59c8e839560 112 This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge 163:e59c8e839560 113
AnnaBridge 163:e59c8e839560 114 This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge 163:e59c8e839560 115
AnnaBridge 163:e59c8e839560 116 uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge 163:e59c8e839560 117 This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge 163:e59c8e839560 118
AnnaBridge 163:e59c8e839560 119 This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge 163:e59c8e839560 120 } LL_I2C_InitTypeDef;
AnnaBridge 163:e59c8e839560 121 /**
AnnaBridge 163:e59c8e839560 122 * @}
AnnaBridge 163:e59c8e839560 123 */
AnnaBridge 163:e59c8e839560 124 #endif /*USE_FULL_LL_DRIVER*/
AnnaBridge 163:e59c8e839560 125
AnnaBridge 163:e59c8e839560 126 /* Exported constants --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 127 /** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge 163:e59c8e839560 128 * @{
AnnaBridge 163:e59c8e839560 129 */
AnnaBridge 163:e59c8e839560 130
AnnaBridge 163:e59c8e839560 131 /** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge 163:e59c8e839560 132 * @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge 163:e59c8e839560 133 * @{
AnnaBridge 163:e59c8e839560 134 */
AnnaBridge 163:e59c8e839560 135 #define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /*!< Address Matched flag */
AnnaBridge 163:e59c8e839560 136 #define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /*!< Not Acknowledge flag */
AnnaBridge 163:e59c8e839560 137 #define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /*!< Stop detection flag */
AnnaBridge 163:e59c8e839560 138 #define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /*!< Bus error flag */
AnnaBridge 163:e59c8e839560 139 #define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /*!< Arbitration Lost flag */
AnnaBridge 163:e59c8e839560 140 #define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /*!< Overrun/Underrun flag */
AnnaBridge 163:e59c8e839560 141 #define LL_I2C_ICR_PECCF I2C_ICR_PECCF /*!< PEC error flag */
AnnaBridge 163:e59c8e839560 142 #define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /*!< Timeout detection flag */
AnnaBridge 163:e59c8e839560 143 #define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /*!< Alert flag */
AnnaBridge 163:e59c8e839560 144 /**
AnnaBridge 163:e59c8e839560 145 * @}
AnnaBridge 163:e59c8e839560 146 */
AnnaBridge 163:e59c8e839560 147
AnnaBridge 163:e59c8e839560 148 /** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge 163:e59c8e839560 149 * @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge 163:e59c8e839560 150 * @{
AnnaBridge 163:e59c8e839560 151 */
AnnaBridge 163:e59c8e839560 152 #define LL_I2C_ISR_TXE I2C_ISR_TXE /*!< Transmit data register empty */
AnnaBridge 163:e59c8e839560 153 #define LL_I2C_ISR_TXIS I2C_ISR_TXIS /*!< Transmit interrupt status */
AnnaBridge 163:e59c8e839560 154 #define LL_I2C_ISR_RXNE I2C_ISR_RXNE /*!< Receive data register not empty */
AnnaBridge 163:e59c8e839560 155 #define LL_I2C_ISR_ADDR I2C_ISR_ADDR /*!< Address matched (slave mode) */
AnnaBridge 163:e59c8e839560 156 #define LL_I2C_ISR_NACKF I2C_ISR_NACKF /*!< Not Acknowledge received flag */
AnnaBridge 163:e59c8e839560 157 #define LL_I2C_ISR_STOPF I2C_ISR_STOPF /*!< Stop detection flag */
AnnaBridge 163:e59c8e839560 158 #define LL_I2C_ISR_TC I2C_ISR_TC /*!< Transfer Complete (master mode) */
AnnaBridge 163:e59c8e839560 159 #define LL_I2C_ISR_TCR I2C_ISR_TCR /*!< Transfer Complete Reload */
AnnaBridge 163:e59c8e839560 160 #define LL_I2C_ISR_BERR I2C_ISR_BERR /*!< Bus error */
AnnaBridge 163:e59c8e839560 161 #define LL_I2C_ISR_ARLO I2C_ISR_ARLO /*!< Arbitration lost */
AnnaBridge 163:e59c8e839560 162 #define LL_I2C_ISR_OVR I2C_ISR_OVR /*!< Overrun/Underrun (slave mode) */
AnnaBridge 163:e59c8e839560 163 #define LL_I2C_ISR_PECERR I2C_ISR_PECERR /*!< PEC Error in reception (SMBus mode) */
AnnaBridge 163:e59c8e839560 164 #define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /*!< Timeout detection flag (SMBus mode) */
AnnaBridge 163:e59c8e839560 165 #define LL_I2C_ISR_ALERT I2C_ISR_ALERT /*!< SMBus alert (SMBus mode) */
AnnaBridge 163:e59c8e839560 166 #define LL_I2C_ISR_BUSY I2C_ISR_BUSY /*!< Bus busy */
AnnaBridge 163:e59c8e839560 167 /**
AnnaBridge 163:e59c8e839560 168 * @}
AnnaBridge 163:e59c8e839560 169 */
AnnaBridge 163:e59c8e839560 170
AnnaBridge 163:e59c8e839560 171 /** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge 163:e59c8e839560 172 * @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge 163:e59c8e839560 173 * @{
AnnaBridge 163:e59c8e839560 174 */
AnnaBridge 163:e59c8e839560 175 #define LL_I2C_CR1_TXIE I2C_CR1_TXIE /*!< TX Interrupt enable */
AnnaBridge 163:e59c8e839560 176 #define LL_I2C_CR1_RXIE I2C_CR1_RXIE /*!< RX Interrupt enable */
AnnaBridge 163:e59c8e839560 177 #define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /*!< Address match Interrupt enable (slave only) */
AnnaBridge 163:e59c8e839560 178 #define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /*!< Not acknowledge received Interrupt enable */
AnnaBridge 163:e59c8e839560 179 #define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /*!< STOP detection Interrupt enable */
AnnaBridge 163:e59c8e839560 180 #define LL_I2C_CR1_TCIE I2C_CR1_TCIE /*!< Transfer Complete interrupt enable */
AnnaBridge 163:e59c8e839560 181 #define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /*!< Error interrupts enable */
AnnaBridge 163:e59c8e839560 182 /**
AnnaBridge 163:e59c8e839560 183 * @}
AnnaBridge 163:e59c8e839560 184 */
AnnaBridge 163:e59c8e839560 185
AnnaBridge 163:e59c8e839560 186 /** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge 163:e59c8e839560 187 * @{
AnnaBridge 163:e59c8e839560 188 */
AnnaBridge 168:b9e159c1930a 189 #define LL_I2C_MODE_I2C 0x00000000U /*!< I2C Master or Slave mode */
AnnaBridge 163:e59c8e839560 190 #define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /*!< SMBus Host address acknowledge */
AnnaBridge 168:b9e159c1930a 191 #define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /*!< SMBus Device default mode (Default address not acknowledge) */
AnnaBridge 163:e59c8e839560 192 #define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /*!< SMBus Device Default address acknowledge */
AnnaBridge 163:e59c8e839560 193 /**
AnnaBridge 163:e59c8e839560 194 * @}
AnnaBridge 163:e59c8e839560 195 */
AnnaBridge 163:e59c8e839560 196
AnnaBridge 163:e59c8e839560 197 /** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge 163:e59c8e839560 198 * @{
AnnaBridge 163:e59c8e839560 199 */
AnnaBridge 168:b9e159c1930a 200 #define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /*!< Analog filter is enabled. */
AnnaBridge 163:e59c8e839560 201 #define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /*!< Analog filter is disabled. */
AnnaBridge 163:e59c8e839560 202 /**
AnnaBridge 163:e59c8e839560 203 * @}
AnnaBridge 163:e59c8e839560 204 */
AnnaBridge 163:e59c8e839560 205
AnnaBridge 163:e59c8e839560 206 /** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge 163:e59c8e839560 207 * @{
AnnaBridge 163:e59c8e839560 208 */
AnnaBridge 168:b9e159c1930a 209 #define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /*!< Master operates in 7-bit addressing mode. */
AnnaBridge 163:e59c8e839560 210 #define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /*!< Master operates in 10-bit addressing mode.*/
AnnaBridge 163:e59c8e839560 211 /**
AnnaBridge 163:e59c8e839560 212 * @}
AnnaBridge 163:e59c8e839560 213 */
AnnaBridge 163:e59c8e839560 214
AnnaBridge 163:e59c8e839560 215 /** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge 163:e59c8e839560 216 * @{
AnnaBridge 163:e59c8e839560 217 */
AnnaBridge 168:b9e159c1930a 218 #define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /*!< Own address 1 is a 7-bit address. */
AnnaBridge 163:e59c8e839560 219 #define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /*!< Own address 1 is a 10-bit address.*/
AnnaBridge 163:e59c8e839560 220 /**
AnnaBridge 163:e59c8e839560 221 * @}
AnnaBridge 163:e59c8e839560 222 */
AnnaBridge 163:e59c8e839560 223
AnnaBridge 163:e59c8e839560 224 /** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge 163:e59c8e839560 225 * @{
AnnaBridge 163:e59c8e839560 226 */
AnnaBridge 163:e59c8e839560 227 #define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /*!< Own Address2 No mask. */
AnnaBridge 163:e59c8e839560 228 #define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /*!< Only Address2 bits[7:2] are compared. */
AnnaBridge 163:e59c8e839560 229 #define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /*!< Only Address2 bits[7:3] are compared. */
AnnaBridge 163:e59c8e839560 230 #define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /*!< Only Address2 bits[7:4] are compared. */
AnnaBridge 163:e59c8e839560 231 #define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /*!< Only Address2 bits[7:5] are compared. */
AnnaBridge 163:e59c8e839560 232 #define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /*!< Only Address2 bits[7:6] are compared. */
AnnaBridge 163:e59c8e839560 233 #define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /*!< Only Address2 bits[7] are compared. */
AnnaBridge 163:e59c8e839560 234 #define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /*!< No comparison is done. All Address2 are acknowledged.*/
AnnaBridge 163:e59c8e839560 235 /**
AnnaBridge 163:e59c8e839560 236 * @}
AnnaBridge 163:e59c8e839560 237 */
AnnaBridge 163:e59c8e839560 238
AnnaBridge 163:e59c8e839560 239 /** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge 163:e59c8e839560 240 * @{
AnnaBridge 163:e59c8e839560 241 */
AnnaBridge 168:b9e159c1930a 242 #define LL_I2C_ACK 0x00000000U /*!< ACK is sent after current received byte. */
AnnaBridge 163:e59c8e839560 243 #define LL_I2C_NACK I2C_CR2_NACK /*!< NACK is sent after current received byte.*/
AnnaBridge 163:e59c8e839560 244 /**
AnnaBridge 163:e59c8e839560 245 * @}
AnnaBridge 163:e59c8e839560 246 */
AnnaBridge 163:e59c8e839560 247
AnnaBridge 163:e59c8e839560 248 /** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge 163:e59c8e839560 249 * @{
AnnaBridge 163:e59c8e839560 250 */
AnnaBridge 168:b9e159c1930a 251 #define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /*!< Slave Address in 7-bit. */
AnnaBridge 163:e59c8e839560 252 #define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /*!< Slave Address in 10-bit.*/
AnnaBridge 163:e59c8e839560 253 /**
AnnaBridge 163:e59c8e839560 254 * @}
AnnaBridge 163:e59c8e839560 255 */
AnnaBridge 163:e59c8e839560 256
AnnaBridge 163:e59c8e839560 257 /** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge 163:e59c8e839560 258 * @{
AnnaBridge 163:e59c8e839560 259 */
AnnaBridge 168:b9e159c1930a 260 #define LL_I2C_REQUEST_WRITE 0x00000000U /*!< Master request a write transfer. */
AnnaBridge 163:e59c8e839560 261 #define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /*!< Master request a read transfer. */
AnnaBridge 163:e59c8e839560 262 /**
AnnaBridge 163:e59c8e839560 263 * @}
AnnaBridge 163:e59c8e839560 264 */
AnnaBridge 163:e59c8e839560 265
AnnaBridge 163:e59c8e839560 266 /** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge 163:e59c8e839560 267 * @{
AnnaBridge 163:e59c8e839560 268 */
AnnaBridge 163:e59c8e839560 269 #define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /*!< Enable I2C Reload mode. */
AnnaBridge 163:e59c8e839560 270 #define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /*!< Enable I2C Automatic end mode with no HW PEC comparison. */
AnnaBridge 168:b9e159c1930a 271 #define LL_I2C_MODE_SOFTEND 0x00000000U /*!< Enable I2C Software end mode with no HW PEC comparison. */
AnnaBridge 163:e59c8e839560 272 #define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
AnnaBridge 163:e59c8e839560 273 #define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
AnnaBridge 163:e59c8e839560 274 #define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /*!< Enable SMBUS Software end mode with HW PEC comparison. */
AnnaBridge 163:e59c8e839560 275 #define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Automatic end mode with HW PEC comparison. */
AnnaBridge 163:e59c8e839560 276 #define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND | I2C_CR2_PECBYTE) /*!< Enable SMBUS Software end mode with HW PEC comparison. */
AnnaBridge 163:e59c8e839560 277 /**
AnnaBridge 163:e59c8e839560 278 * @}
AnnaBridge 163:e59c8e839560 279 */
AnnaBridge 163:e59c8e839560 280
AnnaBridge 163:e59c8e839560 281 /** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge 163:e59c8e839560 282 * @{
AnnaBridge 163:e59c8e839560 283 */
AnnaBridge 168:b9e159c1930a 284 #define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /*!< Don't Generate Stop and Start condition. */
AnnaBridge 163:e59c8e839560 285 #define LL_I2C_GENERATE_STOP I2C_CR2_STOP /*!< Generate Stop condition (Size should be set to 0). */
AnnaBridge 163:e59c8e839560 286 #define LL_I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Start for read request. */
AnnaBridge 163:e59c8e839560 287 #define LL_I2C_GENERATE_START_WRITE I2C_CR2_START /*!< Generate Start for write request. */
AnnaBridge 163:e59c8e839560 288 #define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) /*!< Generate Restart for read request, slave 7Bit address. */
AnnaBridge 163:e59c8e839560 289 #define LL_I2C_GENERATE_RESTART_7BIT_WRITE I2C_CR2_START /*!< Generate Restart for write request, slave 7Bit address. */
AnnaBridge 163:e59c8e839560 290 #define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN | I2C_CR2_HEAD10R) /*!< Generate Restart for read request, slave 10Bit address. */
AnnaBridge 163:e59c8e839560 291 #define LL_I2C_GENERATE_RESTART_10BIT_WRITE I2C_CR2_START /*!< Generate Restart for write request, slave 10Bit address.*/
AnnaBridge 163:e59c8e839560 292 /**
AnnaBridge 163:e59c8e839560 293 * @}
AnnaBridge 163:e59c8e839560 294 */
AnnaBridge 163:e59c8e839560 295
AnnaBridge 163:e59c8e839560 296 /** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge 163:e59c8e839560 297 * @{
AnnaBridge 163:e59c8e839560 298 */
AnnaBridge 168:b9e159c1930a 299 #define LL_I2C_DIRECTION_WRITE 0x00000000U /*!< Write transfer request by master, slave enters receiver mode. */
AnnaBridge 163:e59c8e839560 300 #define LL_I2C_DIRECTION_READ I2C_ISR_DIR /*!< Read transfer request by master, slave enters transmitter mode.*/
AnnaBridge 163:e59c8e839560 301 /**
AnnaBridge 163:e59c8e839560 302 * @}
AnnaBridge 163:e59c8e839560 303 */
AnnaBridge 163:e59c8e839560 304
AnnaBridge 163:e59c8e839560 305 /** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge 163:e59c8e839560 306 * @{
AnnaBridge 163:e59c8e839560 307 */
AnnaBridge 168:b9e159c1930a 308 #define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /*!< Get address of data register used for transmission */
AnnaBridge 168:b9e159c1930a 309 #define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /*!< Get address of data register used for reception */
AnnaBridge 163:e59c8e839560 310 /**
AnnaBridge 163:e59c8e839560 311 * @}
AnnaBridge 163:e59c8e839560 312 */
AnnaBridge 163:e59c8e839560 313
AnnaBridge 163:e59c8e839560 314 /** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge 163:e59c8e839560 315 * @{
AnnaBridge 163:e59c8e839560 316 */
AnnaBridge 168:b9e159c1930a 317 #define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /*!< TimeoutA is used to detect SCL low level timeout. */
AnnaBridge 163:e59c8e839560 318 #define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /*!< TimeoutA is used to detect both SCL and SDA high level timeout.*/
AnnaBridge 163:e59c8e839560 319 /**
AnnaBridge 163:e59c8e839560 320 * @}
AnnaBridge 163:e59c8e839560 321 */
AnnaBridge 163:e59c8e839560 322
AnnaBridge 163:e59c8e839560 323 /** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge 163:e59c8e839560 324 * @{
AnnaBridge 163:e59c8e839560 325 */
AnnaBridge 163:e59c8e839560 326 #define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /*!< TimeoutA enable bit */
AnnaBridge 163:e59c8e839560 327 #define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /*!< TimeoutB (extended clock) enable bit */
AnnaBridge 163:e59c8e839560 328 #define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN) /*!< TimeoutA and TimeoutB (extended clock) enable bits */
AnnaBridge 163:e59c8e839560 329 /**
AnnaBridge 163:e59c8e839560 330 * @}
AnnaBridge 163:e59c8e839560 331 */
AnnaBridge 163:e59c8e839560 332
AnnaBridge 163:e59c8e839560 333 /**
AnnaBridge 163:e59c8e839560 334 * @}
AnnaBridge 163:e59c8e839560 335 */
AnnaBridge 163:e59c8e839560 336
AnnaBridge 163:e59c8e839560 337 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 338 /** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge 163:e59c8e839560 339 * @{
AnnaBridge 163:e59c8e839560 340 */
AnnaBridge 163:e59c8e839560 341
AnnaBridge 163:e59c8e839560 342 /** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge 163:e59c8e839560 343 * @{
AnnaBridge 163:e59c8e839560 344 */
AnnaBridge 163:e59c8e839560 345
AnnaBridge 163:e59c8e839560 346 /**
AnnaBridge 163:e59c8e839560 347 * @brief Write a value in I2C register
AnnaBridge 163:e59c8e839560 348 * @param __INSTANCE__ I2C Instance
AnnaBridge 163:e59c8e839560 349 * @param __REG__ Register to be written
AnnaBridge 163:e59c8e839560 350 * @param __VALUE__ Value to be written in the register
AnnaBridge 163:e59c8e839560 351 * @retval None
AnnaBridge 163:e59c8e839560 352 */
AnnaBridge 163:e59c8e839560 353 #define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 163:e59c8e839560 354
AnnaBridge 163:e59c8e839560 355 /**
AnnaBridge 163:e59c8e839560 356 * @brief Read a value in I2C register
AnnaBridge 163:e59c8e839560 357 * @param __INSTANCE__ I2C Instance
AnnaBridge 163:e59c8e839560 358 * @param __REG__ Register to be read
AnnaBridge 163:e59c8e839560 359 * @retval Register value
AnnaBridge 163:e59c8e839560 360 */
AnnaBridge 163:e59c8e839560 361 #define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 163:e59c8e839560 362 /**
AnnaBridge 163:e59c8e839560 363 * @}
AnnaBridge 163:e59c8e839560 364 */
AnnaBridge 163:e59c8e839560 365
AnnaBridge 163:e59c8e839560 366 /** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge 163:e59c8e839560 367 * @{
AnnaBridge 163:e59c8e839560 368 */
AnnaBridge 163:e59c8e839560 369 /**
AnnaBridge 163:e59c8e839560 370 * @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge 163:e59c8e839560 371 * @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge 163:e59c8e839560 372 * @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge 163:e59c8e839560 373 * @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge 163:e59c8e839560 374 * @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge 163:e59c8e839560 375 * @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge 163:e59c8e839560 376 * @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge 163:e59c8e839560 377 */
AnnaBridge 163:e59c8e839560 378 #define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge 163:e59c8e839560 379 ((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) | \
AnnaBridge 163:e59c8e839560 380 (((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) | \
AnnaBridge 163:e59c8e839560 381 (((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) | \
AnnaBridge 163:e59c8e839560 382 (((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) | \
AnnaBridge 163:e59c8e839560 383 (((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge 163:e59c8e839560 384 /**
AnnaBridge 163:e59c8e839560 385 * @}
AnnaBridge 163:e59c8e839560 386 */
AnnaBridge 163:e59c8e839560 387
AnnaBridge 163:e59c8e839560 388 /**
AnnaBridge 163:e59c8e839560 389 * @}
AnnaBridge 163:e59c8e839560 390 */
AnnaBridge 163:e59c8e839560 391
AnnaBridge 163:e59c8e839560 392 /* Exported functions --------------------------------------------------------*/
AnnaBridge 163:e59c8e839560 393 /** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge 163:e59c8e839560 394 * @{
AnnaBridge 163:e59c8e839560 395 */
AnnaBridge 163:e59c8e839560 396
AnnaBridge 163:e59c8e839560 397 /** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge 163:e59c8e839560 398 * @{
AnnaBridge 163:e59c8e839560 399 */
AnnaBridge 163:e59c8e839560 400
AnnaBridge 163:e59c8e839560 401 /**
AnnaBridge 163:e59c8e839560 402 * @brief Enable I2C peripheral (PE = 1).
AnnaBridge 163:e59c8e839560 403 * @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge 163:e59c8e839560 404 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 405 * @retval None
AnnaBridge 163:e59c8e839560 406 */
AnnaBridge 163:e59c8e839560 407 __STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 408 {
AnnaBridge 163:e59c8e839560 409 SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge 163:e59c8e839560 410 }
AnnaBridge 163:e59c8e839560 411
AnnaBridge 163:e59c8e839560 412 /**
AnnaBridge 163:e59c8e839560 413 * @brief Disable I2C peripheral (PE = 0).
AnnaBridge 163:e59c8e839560 414 * @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge 163:e59c8e839560 415 * Internal state machines and status bits are put back to their reset value.
AnnaBridge 163:e59c8e839560 416 * When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge 163:e59c8e839560 417 * @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge 163:e59c8e839560 418 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 419 * @retval None
AnnaBridge 163:e59c8e839560 420 */
AnnaBridge 163:e59c8e839560 421 __STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 422 {
AnnaBridge 163:e59c8e839560 423 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge 163:e59c8e839560 424 }
AnnaBridge 163:e59c8e839560 425
AnnaBridge 163:e59c8e839560 426 /**
AnnaBridge 163:e59c8e839560 427 * @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge 163:e59c8e839560 428 * @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge 163:e59c8e839560 429 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 430 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 431 */
AnnaBridge 163:e59c8e839560 432 __STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 433 {
AnnaBridge 163:e59c8e839560 434 return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
AnnaBridge 163:e59c8e839560 435 }
AnnaBridge 163:e59c8e839560 436
AnnaBridge 163:e59c8e839560 437 /**
AnnaBridge 163:e59c8e839560 438 * @brief Configure Noise Filters (Analog and Digital).
AnnaBridge 163:e59c8e839560 439 * @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge 163:e59c8e839560 440 * The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 441 * @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge 163:e59c8e839560 442 * CR1 DNF LL_I2C_ConfigFilters
AnnaBridge 163:e59c8e839560 443 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 444 * @param AnalogFilter This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 445 * @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge 163:e59c8e839560 446 * @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge 163:e59c8e839560 447 * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge 163:e59c8e839560 448 * This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge 163:e59c8e839560 449 * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge 163:e59c8e839560 450 * @retval None
AnnaBridge 163:e59c8e839560 451 */
AnnaBridge 163:e59c8e839560 452 __STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge 163:e59c8e839560 453 {
AnnaBridge 163:e59c8e839560 454 MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF | I2C_CR1_DNF, AnalogFilter | (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge 163:e59c8e839560 455 }
AnnaBridge 163:e59c8e839560 456
AnnaBridge 163:e59c8e839560 457 /**
AnnaBridge 163:e59c8e839560 458 * @brief Configure Digital Noise Filter.
AnnaBridge 163:e59c8e839560 459 * @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge 163:e59c8e839560 460 * This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 461 * @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge 163:e59c8e839560 462 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 463 * @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge 163:e59c8e839560 464 * This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge 163:e59c8e839560 465 * The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge 163:e59c8e839560 466 * @retval None
AnnaBridge 163:e59c8e839560 467 */
AnnaBridge 163:e59c8e839560 468 __STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge 163:e59c8e839560 469 {
AnnaBridge 163:e59c8e839560 470 MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge 163:e59c8e839560 471 }
AnnaBridge 163:e59c8e839560 472
AnnaBridge 163:e59c8e839560 473 /**
AnnaBridge 163:e59c8e839560 474 * @brief Get the current Digital Noise Filter configuration.
AnnaBridge 163:e59c8e839560 475 * @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge 163:e59c8e839560 476 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 477 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 163:e59c8e839560 478 */
AnnaBridge 163:e59c8e839560 479 __STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 480 {
AnnaBridge 163:e59c8e839560 481 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge 163:e59c8e839560 482 }
AnnaBridge 163:e59c8e839560 483
AnnaBridge 163:e59c8e839560 484 /**
AnnaBridge 163:e59c8e839560 485 * @brief Enable Analog Noise Filter.
AnnaBridge 163:e59c8e839560 486 * @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 487 * @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge 163:e59c8e839560 488 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 489 * @retval None
AnnaBridge 163:e59c8e839560 490 */
AnnaBridge 163:e59c8e839560 491 __STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 492 {
AnnaBridge 163:e59c8e839560 493 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge 163:e59c8e839560 494 }
AnnaBridge 163:e59c8e839560 495
AnnaBridge 163:e59c8e839560 496 /**
AnnaBridge 163:e59c8e839560 497 * @brief Disable Analog Noise Filter.
AnnaBridge 163:e59c8e839560 498 * @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 499 * @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge 163:e59c8e839560 500 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 501 * @retval None
AnnaBridge 163:e59c8e839560 502 */
AnnaBridge 163:e59c8e839560 503 __STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 504 {
AnnaBridge 163:e59c8e839560 505 SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge 163:e59c8e839560 506 }
AnnaBridge 163:e59c8e839560 507
AnnaBridge 163:e59c8e839560 508 /**
AnnaBridge 163:e59c8e839560 509 * @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge 163:e59c8e839560 510 * @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge 163:e59c8e839560 511 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 512 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 513 */
AnnaBridge 163:e59c8e839560 514 __STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 515 {
AnnaBridge 163:e59c8e839560 516 return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
AnnaBridge 163:e59c8e839560 517 }
AnnaBridge 163:e59c8e839560 518
AnnaBridge 163:e59c8e839560 519 /**
AnnaBridge 163:e59c8e839560 520 * @brief Enable DMA transmission requests.
AnnaBridge 163:e59c8e839560 521 * @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge 163:e59c8e839560 522 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 523 * @retval None
AnnaBridge 163:e59c8e839560 524 */
AnnaBridge 163:e59c8e839560 525 __STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 526 {
AnnaBridge 163:e59c8e839560 527 SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge 163:e59c8e839560 528 }
AnnaBridge 163:e59c8e839560 529
AnnaBridge 163:e59c8e839560 530 /**
AnnaBridge 163:e59c8e839560 531 * @brief Disable DMA transmission requests.
AnnaBridge 163:e59c8e839560 532 * @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge 163:e59c8e839560 533 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 534 * @retval None
AnnaBridge 163:e59c8e839560 535 */
AnnaBridge 163:e59c8e839560 536 __STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 537 {
AnnaBridge 163:e59c8e839560 538 CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge 163:e59c8e839560 539 }
AnnaBridge 163:e59c8e839560 540
AnnaBridge 163:e59c8e839560 541 /**
AnnaBridge 163:e59c8e839560 542 * @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge 163:e59c8e839560 543 * @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge 163:e59c8e839560 544 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 545 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 546 */
AnnaBridge 163:e59c8e839560 547 __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 548 {
AnnaBridge 163:e59c8e839560 549 return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
AnnaBridge 163:e59c8e839560 550 }
AnnaBridge 163:e59c8e839560 551
AnnaBridge 163:e59c8e839560 552 /**
AnnaBridge 163:e59c8e839560 553 * @brief Enable DMA reception requests.
AnnaBridge 163:e59c8e839560 554 * @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge 163:e59c8e839560 555 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 556 * @retval None
AnnaBridge 163:e59c8e839560 557 */
AnnaBridge 163:e59c8e839560 558 __STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 559 {
AnnaBridge 163:e59c8e839560 560 SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge 163:e59c8e839560 561 }
AnnaBridge 163:e59c8e839560 562
AnnaBridge 163:e59c8e839560 563 /**
AnnaBridge 163:e59c8e839560 564 * @brief Disable DMA reception requests.
AnnaBridge 163:e59c8e839560 565 * @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge 163:e59c8e839560 566 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 567 * @retval None
AnnaBridge 163:e59c8e839560 568 */
AnnaBridge 163:e59c8e839560 569 __STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 570 {
AnnaBridge 163:e59c8e839560 571 CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge 163:e59c8e839560 572 }
AnnaBridge 163:e59c8e839560 573
AnnaBridge 163:e59c8e839560 574 /**
AnnaBridge 163:e59c8e839560 575 * @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge 163:e59c8e839560 576 * @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge 163:e59c8e839560 577 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 578 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 579 */
AnnaBridge 163:e59c8e839560 580 __STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 581 {
AnnaBridge 163:e59c8e839560 582 return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
AnnaBridge 163:e59c8e839560 583 }
AnnaBridge 163:e59c8e839560 584
AnnaBridge 163:e59c8e839560 585 /**
AnnaBridge 163:e59c8e839560 586 * @brief Get the data register address used for DMA transfer
AnnaBridge 163:e59c8e839560 587 * @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge 163:e59c8e839560 588 * RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge 163:e59c8e839560 589 * @param I2Cx I2C Instance
AnnaBridge 163:e59c8e839560 590 * @param Direction This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 591 * @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge 163:e59c8e839560 592 * @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge 163:e59c8e839560 593 * @retval Address of data register
AnnaBridge 163:e59c8e839560 594 */
AnnaBridge 163:e59c8e839560 595 __STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge 163:e59c8e839560 596 {
AnnaBridge 163:e59c8e839560 597 register uint32_t data_reg_addr = 0U;
AnnaBridge 163:e59c8e839560 598
AnnaBridge 163:e59c8e839560 599 if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge 163:e59c8e839560 600 {
AnnaBridge 163:e59c8e839560 601 /* return address of TXDR register */
AnnaBridge 163:e59c8e839560 602 data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge 163:e59c8e839560 603 }
AnnaBridge 163:e59c8e839560 604 else
AnnaBridge 163:e59c8e839560 605 {
AnnaBridge 163:e59c8e839560 606 /* return address of RXDR register */
AnnaBridge 163:e59c8e839560 607 data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge 163:e59c8e839560 608 }
AnnaBridge 163:e59c8e839560 609
AnnaBridge 163:e59c8e839560 610 return data_reg_addr;
AnnaBridge 163:e59c8e839560 611 }
AnnaBridge 163:e59c8e839560 612
AnnaBridge 163:e59c8e839560 613 /**
AnnaBridge 163:e59c8e839560 614 * @brief Enable Clock stretching.
AnnaBridge 163:e59c8e839560 615 * @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 616 * @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge 163:e59c8e839560 617 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 618 * @retval None
AnnaBridge 163:e59c8e839560 619 */
AnnaBridge 163:e59c8e839560 620 __STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 621 {
AnnaBridge 163:e59c8e839560 622 CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge 163:e59c8e839560 623 }
AnnaBridge 163:e59c8e839560 624
AnnaBridge 163:e59c8e839560 625 /**
AnnaBridge 163:e59c8e839560 626 * @brief Disable Clock stretching.
AnnaBridge 163:e59c8e839560 627 * @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 628 * @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge 163:e59c8e839560 629 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 630 * @retval None
AnnaBridge 163:e59c8e839560 631 */
AnnaBridge 163:e59c8e839560 632 __STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 633 {
AnnaBridge 163:e59c8e839560 634 SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge 163:e59c8e839560 635 }
AnnaBridge 163:e59c8e839560 636
AnnaBridge 163:e59c8e839560 637 /**
AnnaBridge 163:e59c8e839560 638 * @brief Check if Clock stretching is enabled or disabled.
AnnaBridge 163:e59c8e839560 639 * @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge 163:e59c8e839560 640 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 641 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 642 */
AnnaBridge 163:e59c8e839560 643 __STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 644 {
AnnaBridge 163:e59c8e839560 645 return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
AnnaBridge 163:e59c8e839560 646 }
AnnaBridge 163:e59c8e839560 647
AnnaBridge 163:e59c8e839560 648 /**
AnnaBridge 163:e59c8e839560 649 * @brief Enable hardware byte control in slave mode.
AnnaBridge 163:e59c8e839560 650 * @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge 163:e59c8e839560 651 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 652 * @retval None
AnnaBridge 163:e59c8e839560 653 */
AnnaBridge 163:e59c8e839560 654 __STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 655 {
AnnaBridge 163:e59c8e839560 656 SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge 163:e59c8e839560 657 }
AnnaBridge 163:e59c8e839560 658
AnnaBridge 163:e59c8e839560 659 /**
AnnaBridge 163:e59c8e839560 660 * @brief Disable hardware byte control in slave mode.
AnnaBridge 163:e59c8e839560 661 * @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge 163:e59c8e839560 662 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 663 * @retval None
AnnaBridge 163:e59c8e839560 664 */
AnnaBridge 163:e59c8e839560 665 __STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 666 {
AnnaBridge 163:e59c8e839560 667 CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge 163:e59c8e839560 668 }
AnnaBridge 163:e59c8e839560 669
AnnaBridge 163:e59c8e839560 670 /**
AnnaBridge 163:e59c8e839560 671 * @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge 163:e59c8e839560 672 * @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge 163:e59c8e839560 673 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 674 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 675 */
AnnaBridge 163:e59c8e839560 676 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 677 {
AnnaBridge 163:e59c8e839560 678 return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
AnnaBridge 163:e59c8e839560 679 }
AnnaBridge 163:e59c8e839560 680
AnnaBridge 163:e59c8e839560 681 /**
AnnaBridge 163:e59c8e839560 682 * @brief Enable Wakeup from STOP.
AnnaBridge 163:e59c8e839560 683 * @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 684 * WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 685 * @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge 163:e59c8e839560 686 * @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge 163:e59c8e839560 687 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 688 * @retval None
AnnaBridge 163:e59c8e839560 689 */
AnnaBridge 163:e59c8e839560 690 __STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 691 {
AnnaBridge 163:e59c8e839560 692 SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge 163:e59c8e839560 693 }
AnnaBridge 163:e59c8e839560 694
AnnaBridge 163:e59c8e839560 695 /**
AnnaBridge 163:e59c8e839560 696 * @brief Disable Wakeup from STOP.
AnnaBridge 163:e59c8e839560 697 * @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 698 * WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 699 * @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge 163:e59c8e839560 700 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 701 * @retval None
AnnaBridge 163:e59c8e839560 702 */
AnnaBridge 163:e59c8e839560 703 __STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 704 {
AnnaBridge 163:e59c8e839560 705 CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge 163:e59c8e839560 706 }
AnnaBridge 163:e59c8e839560 707
AnnaBridge 163:e59c8e839560 708 /**
AnnaBridge 163:e59c8e839560 709 * @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge 163:e59c8e839560 710 * @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 711 * WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 712 * @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge 163:e59c8e839560 713 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 714 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 715 */
AnnaBridge 163:e59c8e839560 716 __STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 717 {
AnnaBridge 163:e59c8e839560 718 return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
AnnaBridge 163:e59c8e839560 719 }
AnnaBridge 163:e59c8e839560 720
AnnaBridge 163:e59c8e839560 721 /**
AnnaBridge 163:e59c8e839560 722 * @brief Enable General Call.
AnnaBridge 163:e59c8e839560 723 * @note When enabled the Address 0x00 is ACKed.
AnnaBridge 163:e59c8e839560 724 * @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge 163:e59c8e839560 725 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 726 * @retval None
AnnaBridge 163:e59c8e839560 727 */
AnnaBridge 163:e59c8e839560 728 __STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 729 {
AnnaBridge 163:e59c8e839560 730 SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge 163:e59c8e839560 731 }
AnnaBridge 163:e59c8e839560 732
AnnaBridge 163:e59c8e839560 733 /**
AnnaBridge 163:e59c8e839560 734 * @brief Disable General Call.
AnnaBridge 163:e59c8e839560 735 * @note When disabled the Address 0x00 is NACKed.
AnnaBridge 163:e59c8e839560 736 * @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge 163:e59c8e839560 737 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 738 * @retval None
AnnaBridge 163:e59c8e839560 739 */
AnnaBridge 163:e59c8e839560 740 __STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 741 {
AnnaBridge 163:e59c8e839560 742 CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge 163:e59c8e839560 743 }
AnnaBridge 163:e59c8e839560 744
AnnaBridge 163:e59c8e839560 745 /**
AnnaBridge 163:e59c8e839560 746 * @brief Check if General Call is enabled or disabled.
AnnaBridge 163:e59c8e839560 747 * @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge 163:e59c8e839560 748 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 749 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 750 */
AnnaBridge 163:e59c8e839560 751 __STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 752 {
AnnaBridge 163:e59c8e839560 753 return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
AnnaBridge 163:e59c8e839560 754 }
AnnaBridge 163:e59c8e839560 755
AnnaBridge 163:e59c8e839560 756 /**
AnnaBridge 163:e59c8e839560 757 * @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge 163:e59c8e839560 758 * @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge 163:e59c8e839560 759 * @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge 163:e59c8e839560 760 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 761 * @param AddressingMode This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 762 * @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge 163:e59c8e839560 763 * @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge 163:e59c8e839560 764 * @retval None
AnnaBridge 163:e59c8e839560 765 */
AnnaBridge 163:e59c8e839560 766 __STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge 163:e59c8e839560 767 {
AnnaBridge 163:e59c8e839560 768 MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge 163:e59c8e839560 769 }
AnnaBridge 163:e59c8e839560 770
AnnaBridge 163:e59c8e839560 771 /**
AnnaBridge 163:e59c8e839560 772 * @brief Get the Master addressing mode.
AnnaBridge 163:e59c8e839560 773 * @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge 163:e59c8e839560 774 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 775 * @retval Returned value can be one of the following values:
AnnaBridge 163:e59c8e839560 776 * @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge 163:e59c8e839560 777 * @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge 163:e59c8e839560 778 */
AnnaBridge 163:e59c8e839560 779 __STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 780 {
AnnaBridge 163:e59c8e839560 781 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge 163:e59c8e839560 782 }
AnnaBridge 163:e59c8e839560 783
AnnaBridge 163:e59c8e839560 784 /**
AnnaBridge 163:e59c8e839560 785 * @brief Set the Own Address1.
AnnaBridge 163:e59c8e839560 786 * @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge 163:e59c8e839560 787 * OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge 163:e59c8e839560 788 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 789 * @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge 163:e59c8e839560 790 * @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 791 * @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge 163:e59c8e839560 792 * @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge 163:e59c8e839560 793 * @retval None
AnnaBridge 163:e59c8e839560 794 */
AnnaBridge 163:e59c8e839560 795 __STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge 163:e59c8e839560 796 {
AnnaBridge 163:e59c8e839560 797 MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 | I2C_OAR1_OA1MODE, OwnAddress1 | OwnAddrSize);
AnnaBridge 163:e59c8e839560 798 }
AnnaBridge 163:e59c8e839560 799
AnnaBridge 163:e59c8e839560 800 /**
AnnaBridge 163:e59c8e839560 801 * @brief Enable acknowledge on Own Address1 match address.
AnnaBridge 163:e59c8e839560 802 * @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge 163:e59c8e839560 803 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 804 * @retval None
AnnaBridge 163:e59c8e839560 805 */
AnnaBridge 163:e59c8e839560 806 __STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 807 {
AnnaBridge 163:e59c8e839560 808 SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge 163:e59c8e839560 809 }
AnnaBridge 163:e59c8e839560 810
AnnaBridge 163:e59c8e839560 811 /**
AnnaBridge 163:e59c8e839560 812 * @brief Disable acknowledge on Own Address1 match address.
AnnaBridge 163:e59c8e839560 813 * @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge 163:e59c8e839560 814 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 815 * @retval None
AnnaBridge 163:e59c8e839560 816 */
AnnaBridge 163:e59c8e839560 817 __STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 818 {
AnnaBridge 163:e59c8e839560 819 CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge 163:e59c8e839560 820 }
AnnaBridge 163:e59c8e839560 821
AnnaBridge 163:e59c8e839560 822 /**
AnnaBridge 163:e59c8e839560 823 * @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge 163:e59c8e839560 824 * @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge 163:e59c8e839560 825 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 826 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 827 */
AnnaBridge 163:e59c8e839560 828 __STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 829 {
AnnaBridge 163:e59c8e839560 830 return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
AnnaBridge 163:e59c8e839560 831 }
AnnaBridge 163:e59c8e839560 832
AnnaBridge 163:e59c8e839560 833 /**
AnnaBridge 163:e59c8e839560 834 * @brief Set the 7bits Own Address2.
AnnaBridge 163:e59c8e839560 835 * @note This action has no effect if own address2 is enabled.
AnnaBridge 163:e59c8e839560 836 * @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge 163:e59c8e839560 837 * OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge 163:e59c8e839560 838 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 839 * @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge 163:e59c8e839560 840 * @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 841 * @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge 163:e59c8e839560 842 * @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge 163:e59c8e839560 843 * @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge 163:e59c8e839560 844 * @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge 163:e59c8e839560 845 * @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge 163:e59c8e839560 846 * @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge 163:e59c8e839560 847 * @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge 163:e59c8e839560 848 * @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge 163:e59c8e839560 849 * @retval None
AnnaBridge 163:e59c8e839560 850 */
AnnaBridge 163:e59c8e839560 851 __STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge 163:e59c8e839560 852 {
AnnaBridge 163:e59c8e839560 853 MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 | I2C_OAR2_OA2MSK, OwnAddress2 | OwnAddrMask);
AnnaBridge 163:e59c8e839560 854 }
AnnaBridge 163:e59c8e839560 855
AnnaBridge 163:e59c8e839560 856 /**
AnnaBridge 163:e59c8e839560 857 * @brief Enable acknowledge on Own Address2 match address.
AnnaBridge 163:e59c8e839560 858 * @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge 163:e59c8e839560 859 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 860 * @retval None
AnnaBridge 163:e59c8e839560 861 */
AnnaBridge 163:e59c8e839560 862 __STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 863 {
AnnaBridge 163:e59c8e839560 864 SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge 163:e59c8e839560 865 }
AnnaBridge 163:e59c8e839560 866
AnnaBridge 163:e59c8e839560 867 /**
AnnaBridge 163:e59c8e839560 868 * @brief Disable acknowledge on Own Address2 match address.
AnnaBridge 163:e59c8e839560 869 * @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge 163:e59c8e839560 870 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 871 * @retval None
AnnaBridge 163:e59c8e839560 872 */
AnnaBridge 163:e59c8e839560 873 __STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 874 {
AnnaBridge 163:e59c8e839560 875 CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge 163:e59c8e839560 876 }
AnnaBridge 163:e59c8e839560 877
AnnaBridge 163:e59c8e839560 878 /**
AnnaBridge 163:e59c8e839560 879 * @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge 163:e59c8e839560 880 * @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge 163:e59c8e839560 881 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 882 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 883 */
AnnaBridge 163:e59c8e839560 884 __STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 885 {
AnnaBridge 163:e59c8e839560 886 return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
AnnaBridge 163:e59c8e839560 887 }
AnnaBridge 163:e59c8e839560 888
AnnaBridge 163:e59c8e839560 889 /**
AnnaBridge 163:e59c8e839560 890 * @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge 163:e59c8e839560 891 * @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge 163:e59c8e839560 892 * @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge 163:e59c8e839560 893 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 894 * @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge 163:e59c8e839560 895 * @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge 163:e59c8e839560 896 * @retval None
AnnaBridge 163:e59c8e839560 897 */
AnnaBridge 163:e59c8e839560 898 __STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge 163:e59c8e839560 899 {
AnnaBridge 163:e59c8e839560 900 WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge 163:e59c8e839560 901 }
AnnaBridge 163:e59c8e839560 902
AnnaBridge 163:e59c8e839560 903 /**
AnnaBridge 163:e59c8e839560 904 * @brief Get the Timing Prescaler setting.
AnnaBridge 163:e59c8e839560 905 * @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge 163:e59c8e839560 906 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 907 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 163:e59c8e839560 908 */
AnnaBridge 163:e59c8e839560 909 __STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 910 {
AnnaBridge 163:e59c8e839560 911 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge 163:e59c8e839560 912 }
AnnaBridge 163:e59c8e839560 913
AnnaBridge 163:e59c8e839560 914 /**
AnnaBridge 163:e59c8e839560 915 * @brief Get the SCL low period setting.
AnnaBridge 163:e59c8e839560 916 * @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge 163:e59c8e839560 917 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 918 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 163:e59c8e839560 919 */
AnnaBridge 163:e59c8e839560 920 __STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 921 {
AnnaBridge 163:e59c8e839560 922 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge 163:e59c8e839560 923 }
AnnaBridge 163:e59c8e839560 924
AnnaBridge 163:e59c8e839560 925 /**
AnnaBridge 163:e59c8e839560 926 * @brief Get the SCL high period setting.
AnnaBridge 163:e59c8e839560 927 * @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge 163:e59c8e839560 928 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 929 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 163:e59c8e839560 930 */
AnnaBridge 163:e59c8e839560 931 __STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 932 {
AnnaBridge 163:e59c8e839560 933 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge 163:e59c8e839560 934 }
AnnaBridge 163:e59c8e839560 935
AnnaBridge 163:e59c8e839560 936 /**
AnnaBridge 163:e59c8e839560 937 * @brief Get the SDA hold time.
AnnaBridge 163:e59c8e839560 938 * @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge 163:e59c8e839560 939 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 940 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 163:e59c8e839560 941 */
AnnaBridge 163:e59c8e839560 942 __STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 943 {
AnnaBridge 163:e59c8e839560 944 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge 163:e59c8e839560 945 }
AnnaBridge 163:e59c8e839560 946
AnnaBridge 163:e59c8e839560 947 /**
AnnaBridge 163:e59c8e839560 948 * @brief Get the SDA setup time.
AnnaBridge 163:e59c8e839560 949 * @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge 163:e59c8e839560 950 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 951 * @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge 163:e59c8e839560 952 */
AnnaBridge 163:e59c8e839560 953 __STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 954 {
AnnaBridge 163:e59c8e839560 955 return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge 163:e59c8e839560 956 }
AnnaBridge 163:e59c8e839560 957
AnnaBridge 163:e59c8e839560 958 /**
AnnaBridge 163:e59c8e839560 959 * @brief Configure peripheral mode.
AnnaBridge 163:e59c8e839560 960 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 961 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 962 * @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge 163:e59c8e839560 963 * CR1 SMBDEN LL_I2C_SetMode
AnnaBridge 163:e59c8e839560 964 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 965 * @param PeripheralMode This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 966 * @arg @ref LL_I2C_MODE_I2C
AnnaBridge 163:e59c8e839560 967 * @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge 163:e59c8e839560 968 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge 163:e59c8e839560 969 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge 163:e59c8e839560 970 * @retval None
AnnaBridge 163:e59c8e839560 971 */
AnnaBridge 163:e59c8e839560 972 __STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge 163:e59c8e839560 973 {
AnnaBridge 163:e59c8e839560 974 MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge 163:e59c8e839560 975 }
AnnaBridge 163:e59c8e839560 976
AnnaBridge 163:e59c8e839560 977 /**
AnnaBridge 163:e59c8e839560 978 * @brief Get peripheral mode.
AnnaBridge 163:e59c8e839560 979 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 980 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 981 * @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge 163:e59c8e839560 982 * CR1 SMBDEN LL_I2C_GetMode
AnnaBridge 163:e59c8e839560 983 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 984 * @retval Returned value can be one of the following values:
AnnaBridge 163:e59c8e839560 985 * @arg @ref LL_I2C_MODE_I2C
AnnaBridge 163:e59c8e839560 986 * @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge 163:e59c8e839560 987 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge 163:e59c8e839560 988 * @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge 163:e59c8e839560 989 */
AnnaBridge 163:e59c8e839560 990 __STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 991 {
AnnaBridge 163:e59c8e839560 992 return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN | I2C_CR1_SMBDEN));
AnnaBridge 163:e59c8e839560 993 }
AnnaBridge 163:e59c8e839560 994
AnnaBridge 163:e59c8e839560 995 /**
AnnaBridge 163:e59c8e839560 996 * @brief Enable SMBus alert (Host or Device mode)
AnnaBridge 163:e59c8e839560 997 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 998 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 999 * @note SMBus Device mode:
AnnaBridge 163:e59c8e839560 1000 * - SMBus Alert pin is drived low and
AnnaBridge 163:e59c8e839560 1001 * Alert Response Address Header acknowledge is enabled.
AnnaBridge 163:e59c8e839560 1002 * SMBus Host mode:
AnnaBridge 163:e59c8e839560 1003 * - SMBus Alert pin management is supported.
AnnaBridge 163:e59c8e839560 1004 * @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge 163:e59c8e839560 1005 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1006 * @retval None
AnnaBridge 163:e59c8e839560 1007 */
AnnaBridge 163:e59c8e839560 1008 __STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1009 {
AnnaBridge 163:e59c8e839560 1010 SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge 163:e59c8e839560 1011 }
AnnaBridge 163:e59c8e839560 1012
AnnaBridge 163:e59c8e839560 1013 /**
AnnaBridge 163:e59c8e839560 1014 * @brief Disable SMBus alert (Host or Device mode)
AnnaBridge 163:e59c8e839560 1015 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1016 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1017 * @note SMBus Device mode:
AnnaBridge 163:e59c8e839560 1018 * - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge 163:e59c8e839560 1019 * Alert Response Address Header acknowledge is disabled.
AnnaBridge 163:e59c8e839560 1020 * SMBus Host mode:
AnnaBridge 163:e59c8e839560 1021 * - SMBus Alert pin management is not supported.
AnnaBridge 163:e59c8e839560 1022 * @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge 163:e59c8e839560 1023 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1024 * @retval None
AnnaBridge 163:e59c8e839560 1025 */
AnnaBridge 163:e59c8e839560 1026 __STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1027 {
AnnaBridge 163:e59c8e839560 1028 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge 163:e59c8e839560 1029 }
AnnaBridge 163:e59c8e839560 1030
AnnaBridge 163:e59c8e839560 1031 /**
AnnaBridge 163:e59c8e839560 1032 * @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge 163:e59c8e839560 1033 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1034 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1035 * @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge 163:e59c8e839560 1036 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1037 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1038 */
AnnaBridge 163:e59c8e839560 1039 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1040 {
AnnaBridge 163:e59c8e839560 1041 return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
AnnaBridge 163:e59c8e839560 1042 }
AnnaBridge 163:e59c8e839560 1043
AnnaBridge 163:e59c8e839560 1044 /**
AnnaBridge 163:e59c8e839560 1045 * @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge 163:e59c8e839560 1046 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1047 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1048 * @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge 163:e59c8e839560 1049 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1050 * @retval None
AnnaBridge 163:e59c8e839560 1051 */
AnnaBridge 163:e59c8e839560 1052 __STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1053 {
AnnaBridge 163:e59c8e839560 1054 SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge 163:e59c8e839560 1055 }
AnnaBridge 163:e59c8e839560 1056
AnnaBridge 163:e59c8e839560 1057 /**
AnnaBridge 163:e59c8e839560 1058 * @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge 163:e59c8e839560 1059 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1060 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1061 * @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge 163:e59c8e839560 1062 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1063 * @retval None
AnnaBridge 163:e59c8e839560 1064 */
AnnaBridge 163:e59c8e839560 1065 __STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1066 {
AnnaBridge 163:e59c8e839560 1067 CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge 163:e59c8e839560 1068 }
AnnaBridge 163:e59c8e839560 1069
AnnaBridge 163:e59c8e839560 1070 /**
AnnaBridge 163:e59c8e839560 1071 * @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge 163:e59c8e839560 1072 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1073 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1074 * @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge 163:e59c8e839560 1075 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1076 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1077 */
AnnaBridge 163:e59c8e839560 1078 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1079 {
AnnaBridge 163:e59c8e839560 1080 return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
AnnaBridge 163:e59c8e839560 1081 }
AnnaBridge 163:e59c8e839560 1082
AnnaBridge 163:e59c8e839560 1083 /**
AnnaBridge 163:e59c8e839560 1084 * @brief Configure the SMBus Clock Timeout.
AnnaBridge 163:e59c8e839560 1085 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1086 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1087 * @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge 163:e59c8e839560 1088 * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge 163:e59c8e839560 1089 * TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge 163:e59c8e839560 1090 * TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge 163:e59c8e839560 1091 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1092 * @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge 163:e59c8e839560 1093 * @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 1094 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge 163:e59c8e839560 1095 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge 163:e59c8e839560 1096 * @param TimeoutB
AnnaBridge 163:e59c8e839560 1097 * @retval None
AnnaBridge 163:e59c8e839560 1098 */
AnnaBridge 163:e59c8e839560 1099 __STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge 163:e59c8e839560 1100 uint32_t TimeoutB)
AnnaBridge 163:e59c8e839560 1101 {
AnnaBridge 163:e59c8e839560 1102 MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA | I2C_TIMEOUTR_TIDLE | I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge 163:e59c8e839560 1103 TimeoutA | TimeoutAMode | (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge 163:e59c8e839560 1104 }
AnnaBridge 163:e59c8e839560 1105
AnnaBridge 163:e59c8e839560 1106 /**
AnnaBridge 163:e59c8e839560 1107 * @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge 163:e59c8e839560 1108 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1109 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1110 * @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge 163:e59c8e839560 1111 * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge 163:e59c8e839560 1112 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1113 * @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge 163:e59c8e839560 1114 * @retval None
AnnaBridge 163:e59c8e839560 1115 */
AnnaBridge 163:e59c8e839560 1116 __STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge 163:e59c8e839560 1117 {
AnnaBridge 163:e59c8e839560 1118 WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge 163:e59c8e839560 1119 }
AnnaBridge 163:e59c8e839560 1120
AnnaBridge 163:e59c8e839560 1121 /**
AnnaBridge 163:e59c8e839560 1122 * @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge 163:e59c8e839560 1123 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1124 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1125 * @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge 163:e59c8e839560 1126 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1127 * @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge 163:e59c8e839560 1128 */
AnnaBridge 163:e59c8e839560 1129 __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1130 {
AnnaBridge 163:e59c8e839560 1131 return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge 163:e59c8e839560 1132 }
AnnaBridge 163:e59c8e839560 1133
AnnaBridge 163:e59c8e839560 1134 /**
AnnaBridge 163:e59c8e839560 1135 * @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge 163:e59c8e839560 1136 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1137 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1138 * @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge 163:e59c8e839560 1139 * @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge 163:e59c8e839560 1140 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1141 * @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 1142 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge 163:e59c8e839560 1143 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge 163:e59c8e839560 1144 * @retval None
AnnaBridge 163:e59c8e839560 1145 */
AnnaBridge 163:e59c8e839560 1146 __STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge 163:e59c8e839560 1147 {
AnnaBridge 163:e59c8e839560 1148 WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge 163:e59c8e839560 1149 }
AnnaBridge 163:e59c8e839560 1150
AnnaBridge 163:e59c8e839560 1151 /**
AnnaBridge 163:e59c8e839560 1152 * @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge 163:e59c8e839560 1153 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1154 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1155 * @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge 163:e59c8e839560 1156 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1157 * @retval Returned value can be one of the following values:
AnnaBridge 163:e59c8e839560 1158 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge 163:e59c8e839560 1159 * @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge 163:e59c8e839560 1160 */
AnnaBridge 163:e59c8e839560 1161 __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1162 {
AnnaBridge 163:e59c8e839560 1163 return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge 163:e59c8e839560 1164 }
AnnaBridge 163:e59c8e839560 1165
AnnaBridge 163:e59c8e839560 1166 /**
AnnaBridge 163:e59c8e839560 1167 * @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge 163:e59c8e839560 1168 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1169 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1170 * @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge 163:e59c8e839560 1171 * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge 163:e59c8e839560 1172 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1173 * @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge 163:e59c8e839560 1174 * @retval None
AnnaBridge 163:e59c8e839560 1175 */
AnnaBridge 163:e59c8e839560 1176 __STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge 163:e59c8e839560 1177 {
AnnaBridge 163:e59c8e839560 1178 WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge 163:e59c8e839560 1179 }
AnnaBridge 163:e59c8e839560 1180
AnnaBridge 163:e59c8e839560 1181 /**
AnnaBridge 163:e59c8e839560 1182 * @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge 163:e59c8e839560 1183 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1184 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1185 * @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge 163:e59c8e839560 1186 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1187 * @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge 163:e59c8e839560 1188 */
AnnaBridge 163:e59c8e839560 1189 __STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1190 {
AnnaBridge 163:e59c8e839560 1191 return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge 163:e59c8e839560 1192 }
AnnaBridge 163:e59c8e839560 1193
AnnaBridge 163:e59c8e839560 1194 /**
AnnaBridge 163:e59c8e839560 1195 * @brief Enable the SMBus Clock Timeout.
AnnaBridge 163:e59c8e839560 1196 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1197 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1198 * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge 163:e59c8e839560 1199 * TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge 163:e59c8e839560 1200 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1201 * @param ClockTimeout This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 1202 * @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge 163:e59c8e839560 1203 * @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge 163:e59c8e839560 1204 * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge 163:e59c8e839560 1205 * @retval None
AnnaBridge 163:e59c8e839560 1206 */
AnnaBridge 163:e59c8e839560 1207 __STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge 163:e59c8e839560 1208 {
AnnaBridge 163:e59c8e839560 1209 SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge 163:e59c8e839560 1210 }
AnnaBridge 163:e59c8e839560 1211
AnnaBridge 163:e59c8e839560 1212 /**
AnnaBridge 163:e59c8e839560 1213 * @brief Disable the SMBus Clock Timeout.
AnnaBridge 163:e59c8e839560 1214 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1215 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1216 * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge 163:e59c8e839560 1217 * TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge 163:e59c8e839560 1218 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1219 * @param ClockTimeout This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 1220 * @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge 163:e59c8e839560 1221 * @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge 163:e59c8e839560 1222 * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge 163:e59c8e839560 1223 * @retval None
AnnaBridge 163:e59c8e839560 1224 */
AnnaBridge 163:e59c8e839560 1225 __STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge 163:e59c8e839560 1226 {
AnnaBridge 163:e59c8e839560 1227 CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge 163:e59c8e839560 1228 }
AnnaBridge 163:e59c8e839560 1229
AnnaBridge 163:e59c8e839560 1230 /**
AnnaBridge 163:e59c8e839560 1231 * @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge 163:e59c8e839560 1232 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1233 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1234 * @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge 163:e59c8e839560 1235 * TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge 163:e59c8e839560 1236 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1237 * @param ClockTimeout This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 1238 * @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge 163:e59c8e839560 1239 * @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge 163:e59c8e839560 1240 * @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge 163:e59c8e839560 1241 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1242 */
AnnaBridge 163:e59c8e839560 1243 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge 163:e59c8e839560 1244 {
AnnaBridge 163:e59c8e839560 1245 return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN | I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
AnnaBridge 163:e59c8e839560 1246 }
AnnaBridge 163:e59c8e839560 1247
AnnaBridge 163:e59c8e839560 1248 /**
AnnaBridge 163:e59c8e839560 1249 * @}
AnnaBridge 163:e59c8e839560 1250 */
AnnaBridge 163:e59c8e839560 1251
AnnaBridge 163:e59c8e839560 1252 /** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge 163:e59c8e839560 1253 * @{
AnnaBridge 163:e59c8e839560 1254 */
AnnaBridge 163:e59c8e839560 1255
AnnaBridge 163:e59c8e839560 1256 /**
AnnaBridge 163:e59c8e839560 1257 * @brief Enable TXIS interrupt.
AnnaBridge 163:e59c8e839560 1258 * @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge 163:e59c8e839560 1259 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1260 * @retval None
AnnaBridge 163:e59c8e839560 1261 */
AnnaBridge 163:e59c8e839560 1262 __STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1263 {
AnnaBridge 163:e59c8e839560 1264 SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge 163:e59c8e839560 1265 }
AnnaBridge 163:e59c8e839560 1266
AnnaBridge 163:e59c8e839560 1267 /**
AnnaBridge 163:e59c8e839560 1268 * @brief Disable TXIS interrupt.
AnnaBridge 163:e59c8e839560 1269 * @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge 163:e59c8e839560 1270 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1271 * @retval None
AnnaBridge 163:e59c8e839560 1272 */
AnnaBridge 163:e59c8e839560 1273 __STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1274 {
AnnaBridge 163:e59c8e839560 1275 CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge 163:e59c8e839560 1276 }
AnnaBridge 163:e59c8e839560 1277
AnnaBridge 163:e59c8e839560 1278 /**
AnnaBridge 163:e59c8e839560 1279 * @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge 163:e59c8e839560 1280 * @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge 163:e59c8e839560 1281 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1282 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1283 */
AnnaBridge 163:e59c8e839560 1284 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1285 {
AnnaBridge 163:e59c8e839560 1286 return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
AnnaBridge 163:e59c8e839560 1287 }
AnnaBridge 163:e59c8e839560 1288
AnnaBridge 163:e59c8e839560 1289 /**
AnnaBridge 163:e59c8e839560 1290 * @brief Enable RXNE interrupt.
AnnaBridge 163:e59c8e839560 1291 * @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge 163:e59c8e839560 1292 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1293 * @retval None
AnnaBridge 163:e59c8e839560 1294 */
AnnaBridge 163:e59c8e839560 1295 __STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1296 {
AnnaBridge 163:e59c8e839560 1297 SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge 163:e59c8e839560 1298 }
AnnaBridge 163:e59c8e839560 1299
AnnaBridge 163:e59c8e839560 1300 /**
AnnaBridge 163:e59c8e839560 1301 * @brief Disable RXNE interrupt.
AnnaBridge 163:e59c8e839560 1302 * @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge 163:e59c8e839560 1303 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1304 * @retval None
AnnaBridge 163:e59c8e839560 1305 */
AnnaBridge 163:e59c8e839560 1306 __STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1307 {
AnnaBridge 163:e59c8e839560 1308 CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge 163:e59c8e839560 1309 }
AnnaBridge 163:e59c8e839560 1310
AnnaBridge 163:e59c8e839560 1311 /**
AnnaBridge 163:e59c8e839560 1312 * @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge 163:e59c8e839560 1313 * @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge 163:e59c8e839560 1314 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1315 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1316 */
AnnaBridge 163:e59c8e839560 1317 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1318 {
AnnaBridge 163:e59c8e839560 1319 return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
AnnaBridge 163:e59c8e839560 1320 }
AnnaBridge 163:e59c8e839560 1321
AnnaBridge 163:e59c8e839560 1322 /**
AnnaBridge 163:e59c8e839560 1323 * @brief Enable Address match interrupt (slave mode only).
AnnaBridge 163:e59c8e839560 1324 * @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge 163:e59c8e839560 1325 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1326 * @retval None
AnnaBridge 163:e59c8e839560 1327 */
AnnaBridge 163:e59c8e839560 1328 __STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1329 {
AnnaBridge 163:e59c8e839560 1330 SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge 163:e59c8e839560 1331 }
AnnaBridge 163:e59c8e839560 1332
AnnaBridge 163:e59c8e839560 1333 /**
AnnaBridge 163:e59c8e839560 1334 * @brief Disable Address match interrupt (slave mode only).
AnnaBridge 163:e59c8e839560 1335 * @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge 163:e59c8e839560 1336 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1337 * @retval None
AnnaBridge 163:e59c8e839560 1338 */
AnnaBridge 163:e59c8e839560 1339 __STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1340 {
AnnaBridge 163:e59c8e839560 1341 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge 163:e59c8e839560 1342 }
AnnaBridge 163:e59c8e839560 1343
AnnaBridge 163:e59c8e839560 1344 /**
AnnaBridge 163:e59c8e839560 1345 * @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge 163:e59c8e839560 1346 * @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge 163:e59c8e839560 1347 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1348 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1349 */
AnnaBridge 163:e59c8e839560 1350 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1351 {
AnnaBridge 163:e59c8e839560 1352 return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
AnnaBridge 163:e59c8e839560 1353 }
AnnaBridge 163:e59c8e839560 1354
AnnaBridge 163:e59c8e839560 1355 /**
AnnaBridge 163:e59c8e839560 1356 * @brief Enable Not acknowledge received interrupt.
AnnaBridge 163:e59c8e839560 1357 * @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge 163:e59c8e839560 1358 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1359 * @retval None
AnnaBridge 163:e59c8e839560 1360 */
AnnaBridge 163:e59c8e839560 1361 __STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1362 {
AnnaBridge 163:e59c8e839560 1363 SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge 163:e59c8e839560 1364 }
AnnaBridge 163:e59c8e839560 1365
AnnaBridge 163:e59c8e839560 1366 /**
AnnaBridge 163:e59c8e839560 1367 * @brief Disable Not acknowledge received interrupt.
AnnaBridge 163:e59c8e839560 1368 * @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge 163:e59c8e839560 1369 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1370 * @retval None
AnnaBridge 163:e59c8e839560 1371 */
AnnaBridge 163:e59c8e839560 1372 __STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1373 {
AnnaBridge 163:e59c8e839560 1374 CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge 163:e59c8e839560 1375 }
AnnaBridge 163:e59c8e839560 1376
AnnaBridge 163:e59c8e839560 1377 /**
AnnaBridge 163:e59c8e839560 1378 * @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge 163:e59c8e839560 1379 * @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge 163:e59c8e839560 1380 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1381 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1382 */
AnnaBridge 163:e59c8e839560 1383 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1384 {
AnnaBridge 163:e59c8e839560 1385 return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
AnnaBridge 163:e59c8e839560 1386 }
AnnaBridge 163:e59c8e839560 1387
AnnaBridge 163:e59c8e839560 1388 /**
AnnaBridge 163:e59c8e839560 1389 * @brief Enable STOP detection interrupt.
AnnaBridge 163:e59c8e839560 1390 * @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge 163:e59c8e839560 1391 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1392 * @retval None
AnnaBridge 163:e59c8e839560 1393 */
AnnaBridge 163:e59c8e839560 1394 __STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1395 {
AnnaBridge 163:e59c8e839560 1396 SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge 163:e59c8e839560 1397 }
AnnaBridge 163:e59c8e839560 1398
AnnaBridge 163:e59c8e839560 1399 /**
AnnaBridge 163:e59c8e839560 1400 * @brief Disable STOP detection interrupt.
AnnaBridge 163:e59c8e839560 1401 * @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge 163:e59c8e839560 1402 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1403 * @retval None
AnnaBridge 163:e59c8e839560 1404 */
AnnaBridge 163:e59c8e839560 1405 __STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1406 {
AnnaBridge 163:e59c8e839560 1407 CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge 163:e59c8e839560 1408 }
AnnaBridge 163:e59c8e839560 1409
AnnaBridge 163:e59c8e839560 1410 /**
AnnaBridge 163:e59c8e839560 1411 * @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge 163:e59c8e839560 1412 * @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge 163:e59c8e839560 1413 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1414 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1415 */
AnnaBridge 163:e59c8e839560 1416 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1417 {
AnnaBridge 163:e59c8e839560 1418 return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
AnnaBridge 163:e59c8e839560 1419 }
AnnaBridge 163:e59c8e839560 1420
AnnaBridge 163:e59c8e839560 1421 /**
AnnaBridge 163:e59c8e839560 1422 * @brief Enable Transfer Complete interrupt.
AnnaBridge 163:e59c8e839560 1423 * @note Any of these events will generate interrupt :
AnnaBridge 163:e59c8e839560 1424 * Transfer Complete (TC)
AnnaBridge 163:e59c8e839560 1425 * Transfer Complete Reload (TCR)
AnnaBridge 163:e59c8e839560 1426 * @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge 163:e59c8e839560 1427 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1428 * @retval None
AnnaBridge 163:e59c8e839560 1429 */
AnnaBridge 163:e59c8e839560 1430 __STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1431 {
AnnaBridge 163:e59c8e839560 1432 SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge 163:e59c8e839560 1433 }
AnnaBridge 163:e59c8e839560 1434
AnnaBridge 163:e59c8e839560 1435 /**
AnnaBridge 163:e59c8e839560 1436 * @brief Disable Transfer Complete interrupt.
AnnaBridge 163:e59c8e839560 1437 * @note Any of these events will generate interrupt :
AnnaBridge 163:e59c8e839560 1438 * Transfer Complete (TC)
AnnaBridge 163:e59c8e839560 1439 * Transfer Complete Reload (TCR)
AnnaBridge 163:e59c8e839560 1440 * @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge 163:e59c8e839560 1441 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1442 * @retval None
AnnaBridge 163:e59c8e839560 1443 */
AnnaBridge 163:e59c8e839560 1444 __STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1445 {
AnnaBridge 163:e59c8e839560 1446 CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge 163:e59c8e839560 1447 }
AnnaBridge 163:e59c8e839560 1448
AnnaBridge 163:e59c8e839560 1449 /**
AnnaBridge 163:e59c8e839560 1450 * @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge 163:e59c8e839560 1451 * @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge 163:e59c8e839560 1452 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1453 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1454 */
AnnaBridge 163:e59c8e839560 1455 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1456 {
AnnaBridge 163:e59c8e839560 1457 return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
AnnaBridge 163:e59c8e839560 1458 }
AnnaBridge 163:e59c8e839560 1459
AnnaBridge 163:e59c8e839560 1460 /**
AnnaBridge 163:e59c8e839560 1461 * @brief Enable Error interrupts.
AnnaBridge 163:e59c8e839560 1462 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1463 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1464 * @note Any of these errors will generate interrupt :
AnnaBridge 163:e59c8e839560 1465 * Arbitration Loss (ARLO)
AnnaBridge 163:e59c8e839560 1466 * Bus Error detection (BERR)
AnnaBridge 163:e59c8e839560 1467 * Overrun/Underrun (OVR)
AnnaBridge 163:e59c8e839560 1468 * SMBus Timeout detection (TIMEOUT)
AnnaBridge 163:e59c8e839560 1469 * SMBus PEC error detection (PECERR)
AnnaBridge 163:e59c8e839560 1470 * SMBus Alert pin event detection (ALERT)
AnnaBridge 163:e59c8e839560 1471 * @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge 163:e59c8e839560 1472 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1473 * @retval None
AnnaBridge 163:e59c8e839560 1474 */
AnnaBridge 163:e59c8e839560 1475 __STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1476 {
AnnaBridge 163:e59c8e839560 1477 SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge 163:e59c8e839560 1478 }
AnnaBridge 163:e59c8e839560 1479
AnnaBridge 163:e59c8e839560 1480 /**
AnnaBridge 163:e59c8e839560 1481 * @brief Disable Error interrupts.
AnnaBridge 163:e59c8e839560 1482 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1483 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1484 * @note Any of these errors will generate interrupt :
AnnaBridge 163:e59c8e839560 1485 * Arbitration Loss (ARLO)
AnnaBridge 163:e59c8e839560 1486 * Bus Error detection (BERR)
AnnaBridge 163:e59c8e839560 1487 * Overrun/Underrun (OVR)
AnnaBridge 163:e59c8e839560 1488 * SMBus Timeout detection (TIMEOUT)
AnnaBridge 163:e59c8e839560 1489 * SMBus PEC error detection (PECERR)
AnnaBridge 163:e59c8e839560 1490 * SMBus Alert pin event detection (ALERT)
AnnaBridge 163:e59c8e839560 1491 * @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge 163:e59c8e839560 1492 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1493 * @retval None
AnnaBridge 163:e59c8e839560 1494 */
AnnaBridge 163:e59c8e839560 1495 __STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1496 {
AnnaBridge 163:e59c8e839560 1497 CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge 163:e59c8e839560 1498 }
AnnaBridge 163:e59c8e839560 1499
AnnaBridge 163:e59c8e839560 1500 /**
AnnaBridge 163:e59c8e839560 1501 * @brief Check if Error interrupts are enabled or disabled.
AnnaBridge 163:e59c8e839560 1502 * @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge 163:e59c8e839560 1503 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1504 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1505 */
AnnaBridge 163:e59c8e839560 1506 __STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1507 {
AnnaBridge 163:e59c8e839560 1508 return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
AnnaBridge 163:e59c8e839560 1509 }
AnnaBridge 163:e59c8e839560 1510
AnnaBridge 163:e59c8e839560 1511 /**
AnnaBridge 163:e59c8e839560 1512 * @}
AnnaBridge 163:e59c8e839560 1513 */
AnnaBridge 163:e59c8e839560 1514
AnnaBridge 163:e59c8e839560 1515 /** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge 163:e59c8e839560 1516 * @{
AnnaBridge 163:e59c8e839560 1517 */
AnnaBridge 163:e59c8e839560 1518
AnnaBridge 163:e59c8e839560 1519 /**
AnnaBridge 163:e59c8e839560 1520 * @brief Indicate the status of Transmit data register empty flag.
AnnaBridge 163:e59c8e839560 1521 * @note RESET: When next data is written in Transmit data register.
AnnaBridge 163:e59c8e839560 1522 * SET: When Transmit data register is empty.
AnnaBridge 163:e59c8e839560 1523 * @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge 163:e59c8e839560 1524 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1525 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1526 */
AnnaBridge 163:e59c8e839560 1527 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1528 {
AnnaBridge 163:e59c8e839560 1529 return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
AnnaBridge 163:e59c8e839560 1530 }
AnnaBridge 163:e59c8e839560 1531
AnnaBridge 163:e59c8e839560 1532 /**
AnnaBridge 163:e59c8e839560 1533 * @brief Indicate the status of Transmit interrupt flag.
AnnaBridge 163:e59c8e839560 1534 * @note RESET: When next data is written in Transmit data register.
AnnaBridge 163:e59c8e839560 1535 * SET: When Transmit data register is empty.
AnnaBridge 163:e59c8e839560 1536 * @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge 163:e59c8e839560 1537 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1538 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1539 */
AnnaBridge 163:e59c8e839560 1540 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1541 {
AnnaBridge 163:e59c8e839560 1542 return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
AnnaBridge 163:e59c8e839560 1543 }
AnnaBridge 163:e59c8e839560 1544
AnnaBridge 163:e59c8e839560 1545 /**
AnnaBridge 163:e59c8e839560 1546 * @brief Indicate the status of Receive data register not empty flag.
AnnaBridge 163:e59c8e839560 1547 * @note RESET: When Receive data register is read.
AnnaBridge 163:e59c8e839560 1548 * SET: When the received data is copied in Receive data register.
AnnaBridge 163:e59c8e839560 1549 * @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge 163:e59c8e839560 1550 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1551 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1552 */
AnnaBridge 163:e59c8e839560 1553 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1554 {
AnnaBridge 163:e59c8e839560 1555 return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
AnnaBridge 163:e59c8e839560 1556 }
AnnaBridge 163:e59c8e839560 1557
AnnaBridge 163:e59c8e839560 1558 /**
AnnaBridge 163:e59c8e839560 1559 * @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge 163:e59c8e839560 1560 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1561 * SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge 163:e59c8e839560 1562 * @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge 163:e59c8e839560 1563 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1564 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1565 */
AnnaBridge 163:e59c8e839560 1566 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1567 {
AnnaBridge 163:e59c8e839560 1568 return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
AnnaBridge 163:e59c8e839560 1569 }
AnnaBridge 163:e59c8e839560 1570
AnnaBridge 163:e59c8e839560 1571 /**
AnnaBridge 163:e59c8e839560 1572 * @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge 163:e59c8e839560 1573 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1574 * SET: When a NACK is received after a byte transmission.
AnnaBridge 163:e59c8e839560 1575 * @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge 163:e59c8e839560 1576 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1577 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1578 */
AnnaBridge 163:e59c8e839560 1579 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1580 {
AnnaBridge 163:e59c8e839560 1581 return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
AnnaBridge 163:e59c8e839560 1582 }
AnnaBridge 163:e59c8e839560 1583
AnnaBridge 163:e59c8e839560 1584 /**
AnnaBridge 163:e59c8e839560 1585 * @brief Indicate the status of Stop detection flag.
AnnaBridge 163:e59c8e839560 1586 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1587 * SET: When a Stop condition is detected.
AnnaBridge 163:e59c8e839560 1588 * @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge 163:e59c8e839560 1589 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1590 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1591 */
AnnaBridge 163:e59c8e839560 1592 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1593 {
AnnaBridge 163:e59c8e839560 1594 return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
AnnaBridge 163:e59c8e839560 1595 }
AnnaBridge 163:e59c8e839560 1596
AnnaBridge 163:e59c8e839560 1597 /**
AnnaBridge 163:e59c8e839560 1598 * @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge 163:e59c8e839560 1599 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1600 * SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge 163:e59c8e839560 1601 * @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge 163:e59c8e839560 1602 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1603 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1604 */
AnnaBridge 163:e59c8e839560 1605 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1606 {
AnnaBridge 163:e59c8e839560 1607 return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
AnnaBridge 163:e59c8e839560 1608 }
AnnaBridge 163:e59c8e839560 1609
AnnaBridge 163:e59c8e839560 1610 /**
AnnaBridge 163:e59c8e839560 1611 * @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge 163:e59c8e839560 1612 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1613 * SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge 163:e59c8e839560 1614 * @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge 163:e59c8e839560 1615 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1616 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1617 */
AnnaBridge 163:e59c8e839560 1618 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1619 {
AnnaBridge 163:e59c8e839560 1620 return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
AnnaBridge 163:e59c8e839560 1621 }
AnnaBridge 163:e59c8e839560 1622
AnnaBridge 163:e59c8e839560 1623 /**
AnnaBridge 163:e59c8e839560 1624 * @brief Indicate the status of Bus error flag.
AnnaBridge 163:e59c8e839560 1625 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1626 * SET: When a misplaced Start or Stop condition is detected.
AnnaBridge 163:e59c8e839560 1627 * @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge 163:e59c8e839560 1628 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1629 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1630 */
AnnaBridge 163:e59c8e839560 1631 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1632 {
AnnaBridge 163:e59c8e839560 1633 return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
AnnaBridge 163:e59c8e839560 1634 }
AnnaBridge 163:e59c8e839560 1635
AnnaBridge 163:e59c8e839560 1636 /**
AnnaBridge 163:e59c8e839560 1637 * @brief Indicate the status of Arbitration lost flag.
AnnaBridge 163:e59c8e839560 1638 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1639 * SET: When arbitration lost.
AnnaBridge 163:e59c8e839560 1640 * @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge 163:e59c8e839560 1641 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1642 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1643 */
AnnaBridge 163:e59c8e839560 1644 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1645 {
AnnaBridge 163:e59c8e839560 1646 return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
AnnaBridge 163:e59c8e839560 1647 }
AnnaBridge 163:e59c8e839560 1648
AnnaBridge 163:e59c8e839560 1649 /**
AnnaBridge 163:e59c8e839560 1650 * @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge 163:e59c8e839560 1651 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1652 * SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge 163:e59c8e839560 1653 * @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge 163:e59c8e839560 1654 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1655 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1656 */
AnnaBridge 163:e59c8e839560 1657 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1658 {
AnnaBridge 163:e59c8e839560 1659 return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
AnnaBridge 163:e59c8e839560 1660 }
AnnaBridge 163:e59c8e839560 1661
AnnaBridge 163:e59c8e839560 1662 /**
AnnaBridge 163:e59c8e839560 1663 * @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge 163:e59c8e839560 1664 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1665 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1666 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1667 * SET: When the received PEC does not match with the PEC register content.
AnnaBridge 163:e59c8e839560 1668 * @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge 163:e59c8e839560 1669 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1670 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1671 */
AnnaBridge 163:e59c8e839560 1672 __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1673 {
AnnaBridge 163:e59c8e839560 1674 return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
AnnaBridge 163:e59c8e839560 1675 }
AnnaBridge 163:e59c8e839560 1676
AnnaBridge 163:e59c8e839560 1677 /**
AnnaBridge 163:e59c8e839560 1678 * @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge 163:e59c8e839560 1679 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1680 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1681 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1682 * SET: When a timeout or extended clock timeout occurs.
AnnaBridge 163:e59c8e839560 1683 * @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge 163:e59c8e839560 1684 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1685 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1686 */
AnnaBridge 163:e59c8e839560 1687 __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1688 {
AnnaBridge 163:e59c8e839560 1689 return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
AnnaBridge 163:e59c8e839560 1690 }
AnnaBridge 163:e59c8e839560 1691
AnnaBridge 163:e59c8e839560 1692 /**
AnnaBridge 163:e59c8e839560 1693 * @brief Indicate the status of SMBus alert flag.
AnnaBridge 163:e59c8e839560 1694 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1695 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1696 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1697 * SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge 163:e59c8e839560 1698 * a falling edge event occurs on SMBA pin.
AnnaBridge 163:e59c8e839560 1699 * @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge 163:e59c8e839560 1700 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1701 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1702 */
AnnaBridge 163:e59c8e839560 1703 __STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1704 {
AnnaBridge 163:e59c8e839560 1705 return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
AnnaBridge 163:e59c8e839560 1706 }
AnnaBridge 163:e59c8e839560 1707
AnnaBridge 163:e59c8e839560 1708 /**
AnnaBridge 163:e59c8e839560 1709 * @brief Indicate the status of Bus Busy flag.
AnnaBridge 163:e59c8e839560 1710 * @note RESET: Clear default value.
AnnaBridge 163:e59c8e839560 1711 * SET: When a Start condition is detected.
AnnaBridge 163:e59c8e839560 1712 * @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge 163:e59c8e839560 1713 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1714 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1715 */
AnnaBridge 163:e59c8e839560 1716 __STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1717 {
AnnaBridge 163:e59c8e839560 1718 return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
AnnaBridge 163:e59c8e839560 1719 }
AnnaBridge 163:e59c8e839560 1720
AnnaBridge 163:e59c8e839560 1721 /**
AnnaBridge 163:e59c8e839560 1722 * @brief Clear Address Matched flag.
AnnaBridge 163:e59c8e839560 1723 * @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge 163:e59c8e839560 1724 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1725 * @retval None
AnnaBridge 163:e59c8e839560 1726 */
AnnaBridge 163:e59c8e839560 1727 __STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1728 {
AnnaBridge 163:e59c8e839560 1729 SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge 163:e59c8e839560 1730 }
AnnaBridge 163:e59c8e839560 1731
AnnaBridge 163:e59c8e839560 1732 /**
AnnaBridge 163:e59c8e839560 1733 * @brief Clear Not Acknowledge flag.
AnnaBridge 163:e59c8e839560 1734 * @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge 163:e59c8e839560 1735 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1736 * @retval None
AnnaBridge 163:e59c8e839560 1737 */
AnnaBridge 163:e59c8e839560 1738 __STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1739 {
AnnaBridge 163:e59c8e839560 1740 SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge 163:e59c8e839560 1741 }
AnnaBridge 163:e59c8e839560 1742
AnnaBridge 163:e59c8e839560 1743 /**
AnnaBridge 163:e59c8e839560 1744 * @brief Clear Stop detection flag.
AnnaBridge 163:e59c8e839560 1745 * @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge 163:e59c8e839560 1746 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1747 * @retval None
AnnaBridge 163:e59c8e839560 1748 */
AnnaBridge 163:e59c8e839560 1749 __STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1750 {
AnnaBridge 163:e59c8e839560 1751 SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge 163:e59c8e839560 1752 }
AnnaBridge 163:e59c8e839560 1753
AnnaBridge 163:e59c8e839560 1754 /**
AnnaBridge 163:e59c8e839560 1755 * @brief Clear Transmit data register empty flag (TXE).
AnnaBridge 163:e59c8e839560 1756 * @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge 163:e59c8e839560 1757 * @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge 163:e59c8e839560 1758 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1759 * @retval None
AnnaBridge 163:e59c8e839560 1760 */
AnnaBridge 163:e59c8e839560 1761 __STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1762 {
AnnaBridge 163:e59c8e839560 1763 WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge 163:e59c8e839560 1764 }
AnnaBridge 163:e59c8e839560 1765
AnnaBridge 163:e59c8e839560 1766 /**
AnnaBridge 163:e59c8e839560 1767 * @brief Clear Bus error flag.
AnnaBridge 163:e59c8e839560 1768 * @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge 163:e59c8e839560 1769 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1770 * @retval None
AnnaBridge 163:e59c8e839560 1771 */
AnnaBridge 163:e59c8e839560 1772 __STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1773 {
AnnaBridge 163:e59c8e839560 1774 SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge 163:e59c8e839560 1775 }
AnnaBridge 163:e59c8e839560 1776
AnnaBridge 163:e59c8e839560 1777 /**
AnnaBridge 163:e59c8e839560 1778 * @brief Clear Arbitration lost flag.
AnnaBridge 163:e59c8e839560 1779 * @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge 163:e59c8e839560 1780 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1781 * @retval None
AnnaBridge 163:e59c8e839560 1782 */
AnnaBridge 163:e59c8e839560 1783 __STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1784 {
AnnaBridge 163:e59c8e839560 1785 SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge 163:e59c8e839560 1786 }
AnnaBridge 163:e59c8e839560 1787
AnnaBridge 163:e59c8e839560 1788 /**
AnnaBridge 163:e59c8e839560 1789 * @brief Clear Overrun/Underrun flag.
AnnaBridge 163:e59c8e839560 1790 * @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge 163:e59c8e839560 1791 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1792 * @retval None
AnnaBridge 163:e59c8e839560 1793 */
AnnaBridge 163:e59c8e839560 1794 __STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1795 {
AnnaBridge 163:e59c8e839560 1796 SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge 163:e59c8e839560 1797 }
AnnaBridge 163:e59c8e839560 1798
AnnaBridge 163:e59c8e839560 1799 /**
AnnaBridge 163:e59c8e839560 1800 * @brief Clear SMBus PEC error flag.
AnnaBridge 163:e59c8e839560 1801 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1802 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1803 * @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge 163:e59c8e839560 1804 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1805 * @retval None
AnnaBridge 163:e59c8e839560 1806 */
AnnaBridge 163:e59c8e839560 1807 __STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1808 {
AnnaBridge 163:e59c8e839560 1809 SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge 163:e59c8e839560 1810 }
AnnaBridge 163:e59c8e839560 1811
AnnaBridge 163:e59c8e839560 1812 /**
AnnaBridge 163:e59c8e839560 1813 * @brief Clear SMBus Timeout detection flag.
AnnaBridge 163:e59c8e839560 1814 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1815 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1816 * @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge 163:e59c8e839560 1817 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1818 * @retval None
AnnaBridge 163:e59c8e839560 1819 */
AnnaBridge 163:e59c8e839560 1820 __STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1821 {
AnnaBridge 163:e59c8e839560 1822 SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge 163:e59c8e839560 1823 }
AnnaBridge 163:e59c8e839560 1824
AnnaBridge 163:e59c8e839560 1825 /**
AnnaBridge 163:e59c8e839560 1826 * @brief Clear SMBus Alert flag.
AnnaBridge 163:e59c8e839560 1827 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 1828 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 1829 * @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge 163:e59c8e839560 1830 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1831 * @retval None
AnnaBridge 163:e59c8e839560 1832 */
AnnaBridge 163:e59c8e839560 1833 __STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1834 {
AnnaBridge 163:e59c8e839560 1835 SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge 163:e59c8e839560 1836 }
AnnaBridge 163:e59c8e839560 1837
AnnaBridge 163:e59c8e839560 1838 /**
AnnaBridge 163:e59c8e839560 1839 * @}
AnnaBridge 163:e59c8e839560 1840 */
AnnaBridge 163:e59c8e839560 1841
AnnaBridge 163:e59c8e839560 1842 /** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge 163:e59c8e839560 1843 * @{
AnnaBridge 163:e59c8e839560 1844 */
AnnaBridge 163:e59c8e839560 1845
AnnaBridge 163:e59c8e839560 1846 /**
AnnaBridge 163:e59c8e839560 1847 * @brief Enable automatic STOP condition generation (master mode).
AnnaBridge 163:e59c8e839560 1848 * @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge 163:e59c8e839560 1849 * This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge 163:e59c8e839560 1850 * @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge 163:e59c8e839560 1851 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1852 * @retval None
AnnaBridge 163:e59c8e839560 1853 */
AnnaBridge 163:e59c8e839560 1854 __STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1855 {
AnnaBridge 163:e59c8e839560 1856 SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge 163:e59c8e839560 1857 }
AnnaBridge 163:e59c8e839560 1858
AnnaBridge 163:e59c8e839560 1859 /**
AnnaBridge 163:e59c8e839560 1860 * @brief Disable automatic STOP condition generation (master mode).
AnnaBridge 163:e59c8e839560 1861 * @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge 163:e59c8e839560 1862 * @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge 163:e59c8e839560 1863 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1864 * @retval None
AnnaBridge 163:e59c8e839560 1865 */
AnnaBridge 163:e59c8e839560 1866 __STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1867 {
AnnaBridge 163:e59c8e839560 1868 CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge 163:e59c8e839560 1869 }
AnnaBridge 163:e59c8e839560 1870
AnnaBridge 163:e59c8e839560 1871 /**
AnnaBridge 163:e59c8e839560 1872 * @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge 163:e59c8e839560 1873 * @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge 163:e59c8e839560 1874 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1875 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1876 */
AnnaBridge 163:e59c8e839560 1877 __STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1878 {
AnnaBridge 163:e59c8e839560 1879 return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
AnnaBridge 163:e59c8e839560 1880 }
AnnaBridge 163:e59c8e839560 1881
AnnaBridge 163:e59c8e839560 1882 /**
AnnaBridge 163:e59c8e839560 1883 * @brief Enable reload mode (master mode).
AnnaBridge 163:e59c8e839560 1884 * @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge 163:e59c8e839560 1885 * @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge 163:e59c8e839560 1886 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1887 * @retval None
AnnaBridge 163:e59c8e839560 1888 */
AnnaBridge 163:e59c8e839560 1889 __STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1890 {
AnnaBridge 163:e59c8e839560 1891 SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge 163:e59c8e839560 1892 }
AnnaBridge 163:e59c8e839560 1893
AnnaBridge 163:e59c8e839560 1894 /**
AnnaBridge 163:e59c8e839560 1895 * @brief Disable reload mode (master mode).
AnnaBridge 163:e59c8e839560 1896 * @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge 163:e59c8e839560 1897 * @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge 163:e59c8e839560 1898 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1899 * @retval None
AnnaBridge 163:e59c8e839560 1900 */
AnnaBridge 163:e59c8e839560 1901 __STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1902 {
AnnaBridge 163:e59c8e839560 1903 CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge 163:e59c8e839560 1904 }
AnnaBridge 163:e59c8e839560 1905
AnnaBridge 163:e59c8e839560 1906 /**
AnnaBridge 163:e59c8e839560 1907 * @brief Check if reload mode is enabled or disabled.
AnnaBridge 163:e59c8e839560 1908 * @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge 163:e59c8e839560 1909 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1910 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 1911 */
AnnaBridge 163:e59c8e839560 1912 __STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1913 {
AnnaBridge 163:e59c8e839560 1914 return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
AnnaBridge 163:e59c8e839560 1915 }
AnnaBridge 163:e59c8e839560 1916
AnnaBridge 163:e59c8e839560 1917 /**
AnnaBridge 163:e59c8e839560 1918 * @brief Configure the number of bytes for transfer.
AnnaBridge 163:e59c8e839560 1919 * @note Changing these bits when START bit is set is not allowed.
AnnaBridge 163:e59c8e839560 1920 * @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge 163:e59c8e839560 1921 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1922 * @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge 163:e59c8e839560 1923 * @retval None
AnnaBridge 163:e59c8e839560 1924 */
AnnaBridge 163:e59c8e839560 1925 __STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge 163:e59c8e839560 1926 {
AnnaBridge 163:e59c8e839560 1927 MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge 163:e59c8e839560 1928 }
AnnaBridge 163:e59c8e839560 1929
AnnaBridge 163:e59c8e839560 1930 /**
AnnaBridge 163:e59c8e839560 1931 * @brief Get the number of bytes configured for transfer.
AnnaBridge 163:e59c8e839560 1932 * @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge 163:e59c8e839560 1933 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1934 * @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge 163:e59c8e839560 1935 */
AnnaBridge 163:e59c8e839560 1936 __STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1937 {
AnnaBridge 163:e59c8e839560 1938 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge 163:e59c8e839560 1939 }
AnnaBridge 163:e59c8e839560 1940
AnnaBridge 163:e59c8e839560 1941 /**
AnnaBridge 163:e59c8e839560 1942 * @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge 163:e59c8e839560 1943 * @note Usage in Slave mode only.
AnnaBridge 163:e59c8e839560 1944 * @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge 163:e59c8e839560 1945 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1946 * @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 1947 * @arg @ref LL_I2C_ACK
AnnaBridge 163:e59c8e839560 1948 * @arg @ref LL_I2C_NACK
AnnaBridge 163:e59c8e839560 1949 * @retval None
AnnaBridge 163:e59c8e839560 1950 */
AnnaBridge 163:e59c8e839560 1951 __STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge 163:e59c8e839560 1952 {
AnnaBridge 163:e59c8e839560 1953 MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge 163:e59c8e839560 1954 }
AnnaBridge 163:e59c8e839560 1955
AnnaBridge 163:e59c8e839560 1956 /**
AnnaBridge 163:e59c8e839560 1957 * @brief Generate a START or RESTART condition
AnnaBridge 163:e59c8e839560 1958 * @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge 163:e59c8e839560 1959 * This action has no effect when RELOAD is set.
AnnaBridge 163:e59c8e839560 1960 * @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge 163:e59c8e839560 1961 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1962 * @retval None
AnnaBridge 163:e59c8e839560 1963 */
AnnaBridge 163:e59c8e839560 1964 __STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1965 {
AnnaBridge 163:e59c8e839560 1966 SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge 163:e59c8e839560 1967 }
AnnaBridge 163:e59c8e839560 1968
AnnaBridge 163:e59c8e839560 1969 /**
AnnaBridge 163:e59c8e839560 1970 * @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge 163:e59c8e839560 1971 * @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge 163:e59c8e839560 1972 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1973 * @retval None
AnnaBridge 163:e59c8e839560 1974 */
AnnaBridge 163:e59c8e839560 1975 __STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1976 {
AnnaBridge 163:e59c8e839560 1977 SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge 163:e59c8e839560 1978 }
AnnaBridge 163:e59c8e839560 1979
AnnaBridge 163:e59c8e839560 1980 /**
AnnaBridge 163:e59c8e839560 1981 * @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge 163:e59c8e839560 1982 * @note The master sends the complete 10bit slave address read sequence :
AnnaBridge 163:e59c8e839560 1983 * Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge 163:e59c8e839560 1984 * @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge 163:e59c8e839560 1985 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1986 * @retval None
AnnaBridge 163:e59c8e839560 1987 */
AnnaBridge 163:e59c8e839560 1988 __STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 1989 {
AnnaBridge 163:e59c8e839560 1990 CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge 163:e59c8e839560 1991 }
AnnaBridge 163:e59c8e839560 1992
AnnaBridge 163:e59c8e839560 1993 /**
AnnaBridge 163:e59c8e839560 1994 * @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge 163:e59c8e839560 1995 * @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge 163:e59c8e839560 1996 * @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge 163:e59c8e839560 1997 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 1998 * @retval None
AnnaBridge 163:e59c8e839560 1999 */
AnnaBridge 163:e59c8e839560 2000 __STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2001 {
AnnaBridge 163:e59c8e839560 2002 SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge 163:e59c8e839560 2003 }
AnnaBridge 163:e59c8e839560 2004
AnnaBridge 163:e59c8e839560 2005 /**
AnnaBridge 163:e59c8e839560 2006 * @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge 163:e59c8e839560 2007 * @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge 163:e59c8e839560 2008 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2009 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 2010 */
AnnaBridge 163:e59c8e839560 2011 __STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2012 {
AnnaBridge 163:e59c8e839560 2013 return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
AnnaBridge 163:e59c8e839560 2014 }
AnnaBridge 163:e59c8e839560 2015
AnnaBridge 163:e59c8e839560 2016 /**
AnnaBridge 163:e59c8e839560 2017 * @brief Configure the transfer direction (master mode).
AnnaBridge 163:e59c8e839560 2018 * @note Changing these bits when START bit is set is not allowed.
AnnaBridge 163:e59c8e839560 2019 * @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge 163:e59c8e839560 2020 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2021 * @param TransferRequest This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 2022 * @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge 163:e59c8e839560 2023 * @arg @ref LL_I2C_REQUEST_READ
AnnaBridge 163:e59c8e839560 2024 * @retval None
AnnaBridge 163:e59c8e839560 2025 */
AnnaBridge 163:e59c8e839560 2026 __STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge 163:e59c8e839560 2027 {
AnnaBridge 163:e59c8e839560 2028 MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge 163:e59c8e839560 2029 }
AnnaBridge 163:e59c8e839560 2030
AnnaBridge 163:e59c8e839560 2031 /**
AnnaBridge 163:e59c8e839560 2032 * @brief Get the transfer direction requested (master mode).
AnnaBridge 163:e59c8e839560 2033 * @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge 163:e59c8e839560 2034 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2035 * @retval Returned value can be one of the following values:
AnnaBridge 163:e59c8e839560 2036 * @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge 163:e59c8e839560 2037 * @arg @ref LL_I2C_REQUEST_READ
AnnaBridge 163:e59c8e839560 2038 */
AnnaBridge 163:e59c8e839560 2039 __STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2040 {
AnnaBridge 163:e59c8e839560 2041 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge 163:e59c8e839560 2042 }
AnnaBridge 163:e59c8e839560 2043
AnnaBridge 163:e59c8e839560 2044 /**
AnnaBridge 163:e59c8e839560 2045 * @brief Configure the slave address for transfer (master mode).
AnnaBridge 163:e59c8e839560 2046 * @note Changing these bits when START bit is set is not allowed.
AnnaBridge 163:e59c8e839560 2047 * @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge 163:e59c8e839560 2048 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2049 * @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge 163:e59c8e839560 2050 * @retval None
AnnaBridge 163:e59c8e839560 2051 */
AnnaBridge 163:e59c8e839560 2052 __STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge 163:e59c8e839560 2053 {
AnnaBridge 163:e59c8e839560 2054 MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge 163:e59c8e839560 2055 }
AnnaBridge 163:e59c8e839560 2056
AnnaBridge 163:e59c8e839560 2057 /**
AnnaBridge 163:e59c8e839560 2058 * @brief Get the slave address programmed for transfer.
AnnaBridge 163:e59c8e839560 2059 * @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge 163:e59c8e839560 2060 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2061 * @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge 163:e59c8e839560 2062 */
AnnaBridge 163:e59c8e839560 2063 __STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2064 {
AnnaBridge 163:e59c8e839560 2065 return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge 163:e59c8e839560 2066 }
AnnaBridge 163:e59c8e839560 2067
AnnaBridge 163:e59c8e839560 2068 /**
AnnaBridge 163:e59c8e839560 2069 * @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge 163:e59c8e839560 2070 * @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2071 * CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2072 * CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2073 * CR2 START LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2074 * CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2075 * CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2076 * CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2077 * CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge 163:e59c8e839560 2078 * CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge 163:e59c8e839560 2079 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2080 * @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge 163:e59c8e839560 2081 * @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 2082 * @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge 163:e59c8e839560 2083 * @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge 163:e59c8e839560 2084 * @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge 163:e59c8e839560 2085 * This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge 163:e59c8e839560 2086 * @param EndMode This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 2087 * @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge 163:e59c8e839560 2088 * @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge 163:e59c8e839560 2089 * @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge 163:e59c8e839560 2090 * @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge 163:e59c8e839560 2091 * @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge 163:e59c8e839560 2092 * @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge 163:e59c8e839560 2093 * @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge 163:e59c8e839560 2094 * @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge 163:e59c8e839560 2095 * @param Request This parameter can be one of the following values:
AnnaBridge 163:e59c8e839560 2096 * @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge 163:e59c8e839560 2097 * @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge 163:e59c8e839560 2098 * @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge 163:e59c8e839560 2099 * @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge 163:e59c8e839560 2100 * @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge 163:e59c8e839560 2101 * @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge 163:e59c8e839560 2102 * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge 163:e59c8e839560 2103 * @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge 163:e59c8e839560 2104 * @retval None
AnnaBridge 163:e59c8e839560 2105 */
AnnaBridge 163:e59c8e839560 2106 __STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge 163:e59c8e839560 2107 uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge 163:e59c8e839560 2108 {
AnnaBridge 163:e59c8e839560 2109 MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD | I2C_CR2_ADD10 | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_RELOAD |
AnnaBridge 163:e59c8e839560 2110 I2C_CR2_NBYTES | I2C_CR2_AUTOEND | I2C_CR2_HEAD10R,
AnnaBridge 163:e59c8e839560 2111 SlaveAddr | SlaveAddrSize | TransferSize << I2C_CR2_NBYTES_Pos | EndMode | Request);
AnnaBridge 163:e59c8e839560 2112 }
AnnaBridge 163:e59c8e839560 2113
AnnaBridge 163:e59c8e839560 2114 /**
AnnaBridge 163:e59c8e839560 2115 * @brief Indicate the value of transfer direction (slave mode).
AnnaBridge 163:e59c8e839560 2116 * @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge 163:e59c8e839560 2117 * SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge 163:e59c8e839560 2118 * @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge 163:e59c8e839560 2119 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2120 * @retval Returned value can be one of the following values:
AnnaBridge 163:e59c8e839560 2121 * @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge 163:e59c8e839560 2122 * @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge 163:e59c8e839560 2123 */
AnnaBridge 163:e59c8e839560 2124 __STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2125 {
AnnaBridge 163:e59c8e839560 2126 return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge 163:e59c8e839560 2127 }
AnnaBridge 163:e59c8e839560 2128
AnnaBridge 163:e59c8e839560 2129 /**
AnnaBridge 163:e59c8e839560 2130 * @brief Return the slave matched address.
AnnaBridge 163:e59c8e839560 2131 * @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge 163:e59c8e839560 2132 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2133 * @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge 163:e59c8e839560 2134 */
AnnaBridge 163:e59c8e839560 2135 __STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2136 {
AnnaBridge 163:e59c8e839560 2137 return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge 163:e59c8e839560 2138 }
AnnaBridge 163:e59c8e839560 2139
AnnaBridge 163:e59c8e839560 2140 /**
AnnaBridge 163:e59c8e839560 2141 * @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge 163:e59c8e839560 2142 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 2143 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 2144 * @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge 163:e59c8e839560 2145 * This bit has no effect when RELOAD bit is set.
AnnaBridge 163:e59c8e839560 2146 * This bit has no effect in device mode when SBC bit is not set.
AnnaBridge 163:e59c8e839560 2147 * @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge 163:e59c8e839560 2148 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2149 * @retval None
AnnaBridge 163:e59c8e839560 2150 */
AnnaBridge 163:e59c8e839560 2151 __STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2152 {
AnnaBridge 163:e59c8e839560 2153 SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge 163:e59c8e839560 2154 }
AnnaBridge 163:e59c8e839560 2155
AnnaBridge 163:e59c8e839560 2156 /**
AnnaBridge 163:e59c8e839560 2157 * @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge 163:e59c8e839560 2158 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 2159 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 2160 * @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge 163:e59c8e839560 2161 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2162 * @retval State of bit (1 or 0).
AnnaBridge 163:e59c8e839560 2163 */
AnnaBridge 163:e59c8e839560 2164 __STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2165 {
AnnaBridge 163:e59c8e839560 2166 return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
AnnaBridge 163:e59c8e839560 2167 }
AnnaBridge 163:e59c8e839560 2168
AnnaBridge 163:e59c8e839560 2169 /**
AnnaBridge 163:e59c8e839560 2170 * @brief Get the SMBus Packet Error byte calculated.
AnnaBridge 163:e59c8e839560 2171 * @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge 163:e59c8e839560 2172 * SMBus feature is supported by the I2Cx Instance.
AnnaBridge 163:e59c8e839560 2173 * @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge 163:e59c8e839560 2174 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2175 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 163:e59c8e839560 2176 */
AnnaBridge 163:e59c8e839560 2177 __STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2178 {
AnnaBridge 163:e59c8e839560 2179 return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge 163:e59c8e839560 2180 }
AnnaBridge 163:e59c8e839560 2181
AnnaBridge 163:e59c8e839560 2182 /**
AnnaBridge 163:e59c8e839560 2183 * @brief Read Receive Data register.
AnnaBridge 163:e59c8e839560 2184 * @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge 163:e59c8e839560 2185 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2186 * @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 163:e59c8e839560 2187 */
AnnaBridge 163:e59c8e839560 2188 __STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge 163:e59c8e839560 2189 {
AnnaBridge 163:e59c8e839560 2190 return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge 163:e59c8e839560 2191 }
AnnaBridge 163:e59c8e839560 2192
AnnaBridge 163:e59c8e839560 2193 /**
AnnaBridge 163:e59c8e839560 2194 * @brief Write in Transmit Data Register .
AnnaBridge 163:e59c8e839560 2195 * @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge 163:e59c8e839560 2196 * @param I2Cx I2C Instance.
AnnaBridge 163:e59c8e839560 2197 * @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge 163:e59c8e839560 2198 * @retval None
AnnaBridge 163:e59c8e839560 2199 */
AnnaBridge 163:e59c8e839560 2200 __STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge 163:e59c8e839560 2201 {
AnnaBridge 163:e59c8e839560 2202 WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge 163:e59c8e839560 2203 }
AnnaBridge 163:e59c8e839560 2204
AnnaBridge 163:e59c8e839560 2205 /**
AnnaBridge 163:e59c8e839560 2206 * @}
AnnaBridge 163:e59c8e839560 2207 */
AnnaBridge 163:e59c8e839560 2208
AnnaBridge 163:e59c8e839560 2209 #if defined(USE_FULL_LL_DRIVER)
AnnaBridge 163:e59c8e839560 2210 /** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge 163:e59c8e839560 2211 * @{
AnnaBridge 163:e59c8e839560 2212 */
AnnaBridge 163:e59c8e839560 2213
AnnaBridge 163:e59c8e839560 2214 uint32_t LL_I2C_Init(I2C_TypeDef *I2Cx, LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge 163:e59c8e839560 2215 uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge 163:e59c8e839560 2216 void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge 163:e59c8e839560 2217
AnnaBridge 163:e59c8e839560 2218
AnnaBridge 163:e59c8e839560 2219 /**
AnnaBridge 163:e59c8e839560 2220 * @}
AnnaBridge 163:e59c8e839560 2221 */
AnnaBridge 163:e59c8e839560 2222 #endif /* USE_FULL_LL_DRIVER */
AnnaBridge 163:e59c8e839560 2223
AnnaBridge 163:e59c8e839560 2224 /**
AnnaBridge 163:e59c8e839560 2225 * @}
AnnaBridge 163:e59c8e839560 2226 */
AnnaBridge 163:e59c8e839560 2227
AnnaBridge 163:e59c8e839560 2228 /**
AnnaBridge 163:e59c8e839560 2229 * @}
AnnaBridge 163:e59c8e839560 2230 */
AnnaBridge 163:e59c8e839560 2231
AnnaBridge 163:e59c8e839560 2232 #endif /* I2C1 || I2C2 || I2C3 */
AnnaBridge 163:e59c8e839560 2233
AnnaBridge 163:e59c8e839560 2234 /**
AnnaBridge 163:e59c8e839560 2235 * @}
AnnaBridge 163:e59c8e839560 2236 */
AnnaBridge 163:e59c8e839560 2237
AnnaBridge 163:e59c8e839560 2238 #ifdef __cplusplus
AnnaBridge 163:e59c8e839560 2239 }
AnnaBridge 163:e59c8e839560 2240 #endif
AnnaBridge 163:e59c8e839560 2241
AnnaBridge 163:e59c8e839560 2242 #endif /* __STM32F3xx_LL_I2C_H */
AnnaBridge 163:e59c8e839560 2243
AnnaBridge 163:e59c8e839560 2244 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/