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TARGET_NCS36510/TOOLCHAIN_IAR/i2c.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file i2c.h
AnnaBridge 171:3a7713b1edbc 4 * @brief (API) Public header of i2c driver
AnnaBridge 171:3a7713b1edbc 5 * @internal
AnnaBridge 171:3a7713b1edbc 6 * @author ON Semiconductor
AnnaBridge 171:3a7713b1edbc 7 * $Rev: $
AnnaBridge 171:3a7713b1edbc 8 * $Date: 2016-04-20 $
AnnaBridge 171:3a7713b1edbc 9 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
AnnaBridge 171:3a7713b1edbc 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
AnnaBridge 171:3a7713b1edbc 12 * under limited terms and conditions. The terms and conditions pertaining to the software
AnnaBridge 171:3a7713b1edbc 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
AnnaBridge 171:3a7713b1edbc 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
AnnaBridge 171:3a7713b1edbc 15 * if applicable the software license agreement. Do not use this software and/or
AnnaBridge 171:3a7713b1edbc 16 * documentation unless you have carefully read and you agree to the limited terms and
AnnaBridge 171:3a7713b1edbc 17 * conditions. By using this software and/or documentation, you agree to the limited
AnnaBridge 171:3a7713b1edbc 18 * terms and conditions.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
AnnaBridge 171:3a7713b1edbc 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
AnnaBridge 171:3a7713b1edbc 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
AnnaBridge 171:3a7713b1edbc 25 * @endinternal
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * @ingroup i2c
AnnaBridge 171:3a7713b1edbc 28 */
AnnaBridge 171:3a7713b1edbc 29
AnnaBridge 171:3a7713b1edbc 30 #include "mbed_assert.h"
AnnaBridge 171:3a7713b1edbc 31 #include "i2c_api.h"
AnnaBridge 171:3a7713b1edbc 32 #include "clock.h"
AnnaBridge 171:3a7713b1edbc 33 #include "i2c_ipc7208_map.h"
AnnaBridge 171:3a7713b1edbc 34 #include "memory_map.h"
AnnaBridge 171:3a7713b1edbc 35 #include "PeripheralPins.h"
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #ifndef I2C_H_
AnnaBridge 171:3a7713b1edbc 38 #define I2C_H_
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /* Miscellaneous I/O and control operations codes */
AnnaBridge 171:3a7713b1edbc 41 #define I2C_IPC7208_IOCTL_NOT_ACK 0x03
AnnaBridge 171:3a7713b1edbc 42 #define I2C_IPC7208_IOCTL_NULL_CMD 0x04
AnnaBridge 171:3a7713b1edbc 43 #define I2C_IPC7208_IOCTL_ACK 0x05
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /* Definitions for the clock speed. */
AnnaBridge 171:3a7713b1edbc 46 #define I2C_SPEED_100K_AT_8MHZ (uint8_t)0x12
AnnaBridge 171:3a7713b1edbc 47 #define I2C_SPEED_100K_AT_16MHZ (uint8_t)0x26
AnnaBridge 171:3a7713b1edbc 48 #define I2C_SPEED_400K_AT_8MHZ (uint8_t)0x03
AnnaBridge 171:3a7713b1edbc 49 #define I2C_SPEED_400K_AT_16MHZ (uint8_t)0x08
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /* I2C commands */
AnnaBridge 171:3a7713b1edbc 52 #define I2C_CMD_NULL 0x00
AnnaBridge 171:3a7713b1edbc 53 #define I2C_CMD_WDAT0 0x10
AnnaBridge 171:3a7713b1edbc 54 #define I2C_CMD_WDAT1 0x11
AnnaBridge 171:3a7713b1edbc 55 #define I2C_CMD_WDAT8 0x12
AnnaBridge 171:3a7713b1edbc 56 #define I2C_CMD_RDAT8 0x13
AnnaBridge 171:3a7713b1edbc 57 #define I2C_CMD_STOP 0x14
AnnaBridge 171:3a7713b1edbc 58 #define I2C_CMD_START 0x15
AnnaBridge 171:3a7713b1edbc 59 #define I2C_CMD_VRFY_ACK 0x16
AnnaBridge 171:3a7713b1edbc 60 #define I2C_CMD_VRFY_VACK 0x17
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /* Status register bits */
AnnaBridge 171:3a7713b1edbc 63 #define I2C_STATUS_CMD_FIFO_MPTY_BIT 0x01
AnnaBridge 171:3a7713b1edbc 64 #define I2C_STATUS_RD_DATA_RDY_BIT 0x02
AnnaBridge 171:3a7713b1edbc 65 #define I2C_STATUS_BUS_ERR_BIT 0x04
AnnaBridge 171:3a7713b1edbc 66 #define I2C_STATUS_RD_DATA_UFL_BIT 0x08
AnnaBridge 171:3a7713b1edbc 67 #define I2C_STATUS_CMD_FIFO_OFL_BIT 0x10
AnnaBridge 171:3a7713b1edbc 68 #define I2C_STATUS_CMD_FIFO_FULL_BIT 0x20
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70 /* I2C return status */
AnnaBridge 171:3a7713b1edbc 71 #define I2C_STATUS_INVALID 0xFF
AnnaBridge 171:3a7713b1edbc 72 #define I2C_STATUS_SUCCESS 0x00
AnnaBridge 171:3a7713b1edbc 73 #define I2C_STATUS_FAIL 0x01
AnnaBridge 171:3a7713b1edbc 74 #define I2C_STATUS_BUS_ERROR 0x02
AnnaBridge 171:3a7713b1edbc 75 #define I2C_STATUS_RD_DATA_UFL 0x03
AnnaBridge 171:3a7713b1edbc 76 #define I2C_STATUS_CMD_FIFO_OFL 0x04
AnnaBridge 171:3a7713b1edbc 77 #define I2C_STATUS_INTERRUPT_ERROR 0x05
AnnaBridge 171:3a7713b1edbc 78 #define I2C_STATUS_CMD_FIFO_EMPTY 0x06
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /* I2C clock divider position */
AnnaBridge 171:3a7713b1edbc 81 #define I2C_CLOCKDIVEDER_VAL_MASK 0x1F
AnnaBridge 171:3a7713b1edbc 82 #define I2C_APB_CLK_DIVIDER_VAL_MASK 0x1FE0
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 /* Error check */
AnnaBridge 171:3a7713b1edbc 85 #define I2C_UFL_CHECK (obj->membase->STATUS.WORD & 0x80)
AnnaBridge 171:3a7713b1edbc 86 #define I2C_FIFO_FULL (obj->membase->STATUS.WORD & 0x20)
AnnaBridge 171:3a7713b1edbc 87 #define FIFO_OFL_CHECK (obj->membase->STATUS.WORD & 0x10)
AnnaBridge 171:3a7713b1edbc 88 #define I2C_BUS_ERR_CHECK (obj->membase->STATUS.WORD & 0x04)
AnnaBridge 171:3a7713b1edbc 89 #define RD_DATA_READY (obj->membase->STATUS.WORD & 0x02)
AnnaBridge 171:3a7713b1edbc 90 #define I2C_FIFO_EMPTY (obj->membase->STATUS.WORD & 0x01)
AnnaBridge 171:3a7713b1edbc 91
AnnaBridge 171:3a7713b1edbc 92 #define I2C_API_STATUS_SUCCESS 0
AnnaBridge 171:3a7713b1edbc 93 #define PAD_REG_ADRS_BYTE_SIZE 4
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 // The wait_us(0) command is needed so the I2C state machines have enough
AnnaBridge 171:3a7713b1edbc 96 // time for data to settle across all clock domain crossings in their
AnnaBridge 171:3a7713b1edbc 97 // synchronizers, both directions.
AnnaBridge 171:3a7713b1edbc 98 #define SEND_COMMAND(cmd) wait_us(0); obj->membase->CMD_REG = cmd; wait_us(0);
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 /** Init I2C device.
AnnaBridge 171:3a7713b1edbc 101 * @details
AnnaBridge 171:3a7713b1edbc 102 * Sets the necessary registers. The baud rate is set default to 100K
AnnaBridge 171:3a7713b1edbc 103 *
AnnaBridge 171:3a7713b1edbc 104 * @param obj A I2C device instance.
AnnaBridge 171:3a7713b1edbc 105 * @param sda GPIO number for SDA line
AnnaBridge 171:3a7713b1edbc 106 * @param scl GPIO number for SCL line
AnnaBridge 171:3a7713b1edbc 107 * @return None
AnnaBridge 171:3a7713b1edbc 108 */
AnnaBridge 171:3a7713b1edbc 109 extern void fI2cInit(i2c_t *obj,PinName sda,PinName scl);
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 /** Set baud rate or frequency
AnnaBridge 171:3a7713b1edbc 112 * @details
AnnaBridge 171:3a7713b1edbc 113 * Sets user baudrate
AnnaBridge 171:3a7713b1edbc 114 *
AnnaBridge 171:3a7713b1edbc 115 * @param obj A I2C device instance.
AnnaBridge 171:3a7713b1edbc 116 * @param hz User desired baud rate/frequency
AnnaBridge 171:3a7713b1edbc 117 * @return None
AnnaBridge 171:3a7713b1edbc 118 */
AnnaBridge 171:3a7713b1edbc 119 extern void fI2cFrequency(i2c_t *obj, uint32_t hz);
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 /** Sends start bit
AnnaBridge 171:3a7713b1edbc 122 * @details
AnnaBridge 171:3a7713b1edbc 123 * Sends start bit on i2c pins
AnnaBridge 171:3a7713b1edbc 124 *
AnnaBridge 171:3a7713b1edbc 125 * @param obj A I2C device instance.
AnnaBridge 171:3a7713b1edbc 126 * @return status
AnnaBridge 171:3a7713b1edbc 127 */
AnnaBridge 171:3a7713b1edbc 128 extern int32_t fI2cStart(i2c_t *obj);
AnnaBridge 171:3a7713b1edbc 129
AnnaBridge 171:3a7713b1edbc 130 /** Sends stop bit
AnnaBridge 171:3a7713b1edbc 131 * @details
AnnaBridge 171:3a7713b1edbc 132 * Sends stop bit on i2c pins
AnnaBridge 171:3a7713b1edbc 133 *
AnnaBridge 171:3a7713b1edbc 134 * @param obj A I2C device instance.
AnnaBridge 171:3a7713b1edbc 135 * @return status
AnnaBridge 171:3a7713b1edbc 136 */
AnnaBridge 171:3a7713b1edbc 137 extern int32_t fI2cStop(i2c_t *obj);
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 /** Reads data from a I2C device in blocking fashion.
AnnaBridge 171:3a7713b1edbc 140 * @details
AnnaBridge 171:3a7713b1edbc 141 * The data is read from the receive queue into the buffer. The receive queue is
AnnaBridge 171:3a7713b1edbc 142 * filled by the interrupt handler. If not enough data is available,
AnnaBridge 171:3a7713b1edbc 143 *
AnnaBridge 171:3a7713b1edbc 144 * @param d The device to read from.
AnnaBridge 171:3a7713b1edbc 145 * @param buf The buffer to read into (only the contents of the buffer may be modified, not the buffer itself).
AnnaBridge 171:3a7713b1edbc 146 * @param len The maximum number of bytes to read, typically the buffer length.
AnnaBridge 171:3a7713b1edbc 147 * @return On Success: The actual number of bytes read. On Failure: Failure code.
AnnaBridge 171:3a7713b1edbc 148 */
AnnaBridge 171:3a7713b1edbc 149 extern int32_t fI2cReadB(i2c_t *d, char *buf, int len);
AnnaBridge 171:3a7713b1edbc 150
AnnaBridge 171:3a7713b1edbc 151 /** Write data to an I2C device.
AnnaBridge 171:3a7713b1edbc 152 * @details
AnnaBridge 171:3a7713b1edbc 153 * The commands(I2C instructions) and data arrive at the I2C Engine via the Command FIFO.
AnnaBridge 171:3a7713b1edbc 154 * The command to write the data & data to be written is sent to command FIFO by writing it into command register.
AnnaBridge 171:3a7713b1edbc 155 *
AnnaBridge 171:3a7713b1edbc 156 * @param d The device to write to.
AnnaBridge 171:3a7713b1edbc 157 * @param buf The buffer to write from (the contents of the buffer may not be modified).
AnnaBridge 171:3a7713b1edbc 158 * @param len The number of bytes to write.
AnnaBridge 171:3a7713b1edbc 159 * @return On success: The actual number of bytes written. On Failure: Failure code
AnnaBridge 171:3a7713b1edbc 160 */
AnnaBridge 171:3a7713b1edbc 161 extern int32_t fI2cWriteB(i2c_t *d, const char *buf, int len);
AnnaBridge 171:3a7713b1edbc 162
AnnaBridge 171:3a7713b1edbc 163 #endif /* I2C_H_ */