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TARGET_NCS36510/TOOLCHAIN_GCC_ARM/spi.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file spi.h
AnnaBridge 171:3a7713b1edbc 4 * @brief Inlcude file of a SPI master driver
AnnaBridge 171:3a7713b1edbc 5 * @internal
AnnaBridge 171:3a7713b1edbc 6 * @author ON Semiconductor
AnnaBridge 171:3a7713b1edbc 7 * @version $Rev: $
AnnaBridge 171:3a7713b1edbc 8 * @date $Date: 2016-02-05 $
AnnaBridge 171:3a7713b1edbc 9 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 10 * Copyright 2016 Semiconductor Components Industries LLC (d/b/a “ON Semiconductor”).
AnnaBridge 171:3a7713b1edbc 11 * All rights reserved. This software and/or documentation is licensed by ON Semiconductor
AnnaBridge 171:3a7713b1edbc 12 * under limited terms and conditions. The terms and conditions pertaining to the software
AnnaBridge 171:3a7713b1edbc 13 * and/or documentation are available at http://www.onsemi.com/site/pdf/ONSEMI_T&C.pdf
AnnaBridge 171:3a7713b1edbc 14 * (“ON Semiconductor Standard Terms and Conditions of Sale, Section 8 Software”) and
AnnaBridge 171:3a7713b1edbc 15 * if applicable the software license agreement. Do not use this software and/or
AnnaBridge 171:3a7713b1edbc 16 * documentation unless you have carefully read and you agree to the limited terms and
AnnaBridge 171:3a7713b1edbc 17 * conditions. By using this software and/or documentation, you agree to the limited
AnnaBridge 171:3a7713b1edbc 18 * terms and conditions.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
AnnaBridge 171:3a7713b1edbc 22 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
AnnaBridge 171:3a7713b1edbc 23 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
AnnaBridge 171:3a7713b1edbc 24 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
AnnaBridge 171:3a7713b1edbc 25 * @endinternal
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * @ingroup spi_h
AnnaBridge 171:3a7713b1edbc 28 *
AnnaBridge 171:3a7713b1edbc 29 * @details
AnnaBridge 171:3a7713b1edbc 30 *
AnnaBridge 171:3a7713b1edbc 31 */
AnnaBridge 171:3a7713b1edbc 32 #ifndef SPI_H_
AnnaBridge 171:3a7713b1edbc 33 #define SPI_H_
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 #include "device.h"
AnnaBridge 171:3a7713b1edbc 36 #include "spi_api.h"
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 #if DEVICE_SPI
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Miscellaneous I/O and control operations codes */
AnnaBridge 171:3a7713b1edbc 45 #define SPI_IPC7207_IOCTL_GET_SLAVE_SELECT (0x1) /**< <b>Ioctl request code</b>: Reading slaveSelect register */
AnnaBridge 171:3a7713b1edbc 46 #define SPI_IPC7207_IOCTL_SET_SLAVE_SELECT (0x2) /**< <b>Ioctl request code</b>: Setting slaveSelect register */
AnnaBridge 171:3a7713b1edbc 47 #define SPI_IPC7207_IOCTL_FLUSH (0x3) /**< <b>Ioctl request code</b>: Flushin FIFOs and serial shift registers */
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /* Control register bit positions */
AnnaBridge 171:3a7713b1edbc 50 #define SPI_WORD_WIDTH_BIT_POS 6
AnnaBridge 171:3a7713b1edbc 51 #define SPI_SLAVE_MASTER_BIT_POS 5
AnnaBridge 171:3a7713b1edbc 52 #define SPI_CPOL_BIT_POS 4
AnnaBridge 171:3a7713b1edbc 53 #define SPI_CPHA_BIT_POS 3
AnnaBridge 171:3a7713b1edbc 54 #define SPI_ENDIAN_BIT_POS 2
AnnaBridge 171:3a7713b1edbc 55 #define SPI_SAMPLE_EDGE_BIT_POS 1
AnnaBridge 171:3a7713b1edbc 56 #define SPI_PORT_ENABLE_BIT_POS 0
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /* COntrol register bits */
AnnaBridge 171:3a7713b1edbc 59 #define SPI_ENDIAN_MSB_FIRST 1
AnnaBridge 171:3a7713b1edbc 60 #define SPI_CPOL_IDLE_LOW 0
AnnaBridge 171:3a7713b1edbc 61 #define SPI_CPHA_BEFORE_1ST_EDGE 0
AnnaBridge 171:3a7713b1edbc 62 #define SPI_MASTER_MODE 1
AnnaBridge 171:3a7713b1edbc 63 #define SPI_WORD_WIDTH_8_BITS 0
AnnaBridge 171:3a7713b1edbc 64 #define SPI_SAMPLE_OPP_CLK_EDGE_DATA 0
AnnaBridge 171:3a7713b1edbc 65 #define SPI_SLAVE_SELECT_NORM_BEHAVE 0
AnnaBridge 171:3a7713b1edbc 66 #define SPI_PORT_ENABLE 1
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 #define SPI_SLAVE_SELECT_DEFAULT 0x10
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70 #define SPI_DEFAULT_CONFIG 0x25
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 #define SPI_DEFAULT_SPEED 1000000
AnnaBridge 171:3a7713b1edbc 73 #define SPI_BYTE_MASK 0xFF
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 extern void fSpiInit(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
AnnaBridge 171:3a7713b1edbc 76 extern void fSpiClose(spi_t *obj);
AnnaBridge 171:3a7713b1edbc 77 extern int fSpiWriteB(spi_t *obj, uint32_t const buf);
AnnaBridge 171:3a7713b1edbc 78
AnnaBridge 171:3a7713b1edbc 79 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 80 }
AnnaBridge 171:3a7713b1edbc 81 #endif /* __cplusplus */
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 #endif /* DEVICE_SPI */
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 #endif /* SPI_H_ */