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TARGET_KL82Z/TOOLCHAIN_IAR/fsl_tpm.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_UBRIDGE/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/drivers/fsl_tpm.h@145:64910690c574 
mbed library. Release version 164

Who changed what in which revision?

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AnnaBridge 145:64910690c574 1 /*
AnnaBridge 145:64910690c574 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 145:64910690c574 3 * All rights reserved.
AnnaBridge 145:64910690c574 4 *
AnnaBridge 145:64910690c574 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 145:64910690c574 6 * are permitted provided that the following conditions are met:
AnnaBridge 145:64910690c574 7 *
AnnaBridge 145:64910690c574 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 145:64910690c574 9 * of conditions and the following disclaimer.
AnnaBridge 145:64910690c574 10 *
AnnaBridge 145:64910690c574 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 145:64910690c574 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 145:64910690c574 13 * other materials provided with the distribution.
AnnaBridge 145:64910690c574 14 *
AnnaBridge 145:64910690c574 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 145:64910690c574 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 145:64910690c574 17 * software without specific prior written permission.
AnnaBridge 145:64910690c574 18 *
AnnaBridge 145:64910690c574 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 145:64910690c574 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 145:64910690c574 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 145:64910690c574 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 145:64910690c574 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 145:64910690c574 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 145:64910690c574 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 145:64910690c574 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 145:64910690c574 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 145:64910690c574 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 145:64910690c574 29 */
AnnaBridge 145:64910690c574 30 #ifndef _FSL_TPM_H_
AnnaBridge 145:64910690c574 31 #define _FSL_TPM_H_
AnnaBridge 145:64910690c574 32
AnnaBridge 145:64910690c574 33 #include "fsl_common.h"
AnnaBridge 145:64910690c574 34
AnnaBridge 145:64910690c574 35 /*!
AnnaBridge 145:64910690c574 36 * @addtogroup tpm
AnnaBridge 145:64910690c574 37 * @{
AnnaBridge 145:64910690c574 38 */
AnnaBridge 145:64910690c574 39
AnnaBridge 145:64910690c574 40
AnnaBridge 145:64910690c574 41 /*******************************************************************************
AnnaBridge 145:64910690c574 42 * Definitions
AnnaBridge 145:64910690c574 43 ******************************************************************************/
AnnaBridge 145:64910690c574 44
AnnaBridge 145:64910690c574 45 /*! @name Driver version */
AnnaBridge 145:64910690c574 46 /*@{*/
AnnaBridge 145:64910690c574 47 #define FSL_TPM_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*!< Version 2.0.2 */
AnnaBridge 145:64910690c574 48 /*@}*/
AnnaBridge 145:64910690c574 49
AnnaBridge 145:64910690c574 50 /*!
AnnaBridge 145:64910690c574 51 * @brief List of TPM channels.
AnnaBridge 145:64910690c574 52 * @note Actual number of available channels is SoC dependent
AnnaBridge 145:64910690c574 53 */
AnnaBridge 145:64910690c574 54 typedef enum _tpm_chnl
AnnaBridge 145:64910690c574 55 {
AnnaBridge 145:64910690c574 56 kTPM_Chnl_0 = 0U, /*!< TPM channel number 0*/
AnnaBridge 145:64910690c574 57 kTPM_Chnl_1, /*!< TPM channel number 1 */
AnnaBridge 145:64910690c574 58 kTPM_Chnl_2, /*!< TPM channel number 2 */
AnnaBridge 145:64910690c574 59 kTPM_Chnl_3, /*!< TPM channel number 3 */
AnnaBridge 145:64910690c574 60 kTPM_Chnl_4, /*!< TPM channel number 4 */
AnnaBridge 145:64910690c574 61 kTPM_Chnl_5, /*!< TPM channel number 5 */
AnnaBridge 145:64910690c574 62 kTPM_Chnl_6, /*!< TPM channel number 6 */
AnnaBridge 145:64910690c574 63 kTPM_Chnl_7 /*!< TPM channel number 7 */
AnnaBridge 145:64910690c574 64 } tpm_chnl_t;
AnnaBridge 145:64910690c574 65
AnnaBridge 145:64910690c574 66 /*! @brief TPM PWM operation modes */
AnnaBridge 145:64910690c574 67 typedef enum _tpm_pwm_mode
AnnaBridge 145:64910690c574 68 {
AnnaBridge 145:64910690c574 69 kTPM_EdgeAlignedPwm = 0U, /*!< Edge aligned PWM */
AnnaBridge 145:64910690c574 70 kTPM_CenterAlignedPwm, /*!< Center aligned PWM */
AnnaBridge 145:64910690c574 71 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 145:64910690c574 72 kTPM_CombinedPwm /*!< Combined PWM */
AnnaBridge 145:64910690c574 73 #endif
AnnaBridge 145:64910690c574 74 } tpm_pwm_mode_t;
AnnaBridge 145:64910690c574 75
AnnaBridge 145:64910690c574 76 /*! @brief TPM PWM output pulse mode: high-true, low-true or no output */
AnnaBridge 145:64910690c574 77 typedef enum _tpm_pwm_level_select
AnnaBridge 145:64910690c574 78 {
AnnaBridge 145:64910690c574 79 kTPM_NoPwmSignal = 0U, /*!< No PWM output on pin */
AnnaBridge 145:64910690c574 80 kTPM_LowTrue, /*!< Low true pulses */
AnnaBridge 145:64910690c574 81 kTPM_HighTrue /*!< High true pulses */
AnnaBridge 145:64910690c574 82 } tpm_pwm_level_select_t;
AnnaBridge 145:64910690c574 83
AnnaBridge 145:64910690c574 84 /*! @brief Options to configure a TPM channel's PWM signal */
AnnaBridge 145:64910690c574 85 typedef struct _tpm_chnl_pwm_signal_param
AnnaBridge 145:64910690c574 86 {
AnnaBridge 145:64910690c574 87 tpm_chnl_t chnlNumber; /*!< TPM channel to configure.
AnnaBridge 145:64910690c574 88 In combined mode (available in some SoC's, this represents the
AnnaBridge 145:64910690c574 89 channel pair number */
AnnaBridge 145:64910690c574 90 tpm_pwm_level_select_t level; /*!< PWM output active level select */
AnnaBridge 145:64910690c574 91 uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100
AnnaBridge 145:64910690c574 92 0=inactive signal(0% duty cycle)...
AnnaBridge 145:64910690c574 93 100=always active signal (100% duty cycle)*/
AnnaBridge 145:64910690c574 94 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 145:64910690c574 95 uint8_t firstEdgeDelayPercent; /*!< Used only in combined PWM mode to generate asymmetrical PWM.
AnnaBridge 145:64910690c574 96 Specifies the delay to the first edge in a PWM period.
AnnaBridge 145:64910690c574 97 If unsure, leave as 0; Should be specified as
AnnaBridge 145:64910690c574 98 percentage of the PWM period */
AnnaBridge 145:64910690c574 99 #endif
AnnaBridge 145:64910690c574 100 } tpm_chnl_pwm_signal_param_t;
AnnaBridge 145:64910690c574 101
AnnaBridge 145:64910690c574 102 /*!
AnnaBridge 145:64910690c574 103 * @brief Trigger options available.
AnnaBridge 145:64910690c574 104 *
AnnaBridge 145:64910690c574 105 * This is used for both internal & external trigger sources (external option available in certain SoC's)
AnnaBridge 145:64910690c574 106 *
AnnaBridge 145:64910690c574 107 * @note The actual trigger options available is SoC-specific.
AnnaBridge 145:64910690c574 108 */
AnnaBridge 145:64910690c574 109 typedef enum _tpm_trigger_select
AnnaBridge 145:64910690c574 110 {
AnnaBridge 145:64910690c574 111 kTPM_Trigger_Select_0 = 0U,
AnnaBridge 145:64910690c574 112 kTPM_Trigger_Select_1,
AnnaBridge 145:64910690c574 113 kTPM_Trigger_Select_2,
AnnaBridge 145:64910690c574 114 kTPM_Trigger_Select_3,
AnnaBridge 145:64910690c574 115 kTPM_Trigger_Select_4,
AnnaBridge 145:64910690c574 116 kTPM_Trigger_Select_5,
AnnaBridge 145:64910690c574 117 kTPM_Trigger_Select_6,
AnnaBridge 145:64910690c574 118 kTPM_Trigger_Select_7,
AnnaBridge 145:64910690c574 119 kTPM_Trigger_Select_8,
AnnaBridge 145:64910690c574 120 kTPM_Trigger_Select_9,
AnnaBridge 145:64910690c574 121 kTPM_Trigger_Select_10,
AnnaBridge 145:64910690c574 122 kTPM_Trigger_Select_11,
AnnaBridge 145:64910690c574 123 kTPM_Trigger_Select_12,
AnnaBridge 145:64910690c574 124 kTPM_Trigger_Select_13,
AnnaBridge 145:64910690c574 125 kTPM_Trigger_Select_14,
AnnaBridge 145:64910690c574 126 kTPM_Trigger_Select_15
AnnaBridge 145:64910690c574 127 } tpm_trigger_select_t;
AnnaBridge 145:64910690c574 128
AnnaBridge 145:64910690c574 129 #if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
AnnaBridge 145:64910690c574 130 /*!
AnnaBridge 145:64910690c574 131 * @brief Trigger source options available
AnnaBridge 145:64910690c574 132 *
AnnaBridge 145:64910690c574 133 * @note This selection is available only on some SoC's. For SoC's without this selection, the only
AnnaBridge 145:64910690c574 134 * trigger source available is internal triger.
AnnaBridge 145:64910690c574 135 */
AnnaBridge 145:64910690c574 136 typedef enum _tpm_trigger_source
AnnaBridge 145:64910690c574 137 {
AnnaBridge 145:64910690c574 138 kTPM_TriggerSource_External = 0U, /*!< Use external trigger input */
AnnaBridge 145:64910690c574 139 kTPM_TriggerSource_Internal /*!< Use internal trigger */
AnnaBridge 145:64910690c574 140 } tpm_trigger_source_t;
AnnaBridge 145:64910690c574 141 #endif
AnnaBridge 145:64910690c574 142
AnnaBridge 145:64910690c574 143 /*! @brief TPM output compare modes */
AnnaBridge 145:64910690c574 144 typedef enum _tpm_output_compare_mode
AnnaBridge 145:64910690c574 145 {
AnnaBridge 145:64910690c574 146 kTPM_NoOutputSignal = (1U << TPM_CnSC_MSA_SHIFT), /*!< No channel output when counter reaches CnV */
AnnaBridge 145:64910690c574 147 kTPM_ToggleOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Toggle output */
AnnaBridge 145:64910690c574 148 kTPM_ClearOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)), /*!< Clear output */
AnnaBridge 145:64910690c574 149 kTPM_SetOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (3U << TPM_CnSC_ELSA_SHIFT)), /*!< Set output */
AnnaBridge 145:64910690c574 150 kTPM_HighPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Pulse output high */
AnnaBridge 145:64910690c574 151 kTPM_LowPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)) /*!< Pulse output low */
AnnaBridge 145:64910690c574 152 } tpm_output_compare_mode_t;
AnnaBridge 145:64910690c574 153
AnnaBridge 145:64910690c574 154 /*! @brief TPM input capture edge */
AnnaBridge 145:64910690c574 155 typedef enum _tpm_input_capture_edge
AnnaBridge 145:64910690c574 156 {
AnnaBridge 145:64910690c574 157 kTPM_RisingEdge = (1U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on rising edge only */
AnnaBridge 145:64910690c574 158 kTPM_FallingEdge = (2U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on falling edge only */
AnnaBridge 145:64910690c574 159 kTPM_RiseAndFallEdge = (3U << TPM_CnSC_ELSA_SHIFT) /*!< Capture on rising or falling edge */
AnnaBridge 145:64910690c574 160 } tpm_input_capture_edge_t;
AnnaBridge 145:64910690c574 161
AnnaBridge 145:64910690c574 162 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 145:64910690c574 163 /*!
AnnaBridge 145:64910690c574 164 * @brief TPM dual edge capture parameters
AnnaBridge 145:64910690c574 165 *
AnnaBridge 145:64910690c574 166 * @note This mode is available only on some SoC's.
AnnaBridge 145:64910690c574 167 */
AnnaBridge 145:64910690c574 168 typedef struct _tpm_dual_edge_capture_param
AnnaBridge 145:64910690c574 169 {
AnnaBridge 145:64910690c574 170 bool enableSwap; /*!< true: Use channel n+1 input, channel n input is ignored;
AnnaBridge 145:64910690c574 171 false: Use channel n input, channel n+1 input is ignored */
AnnaBridge 145:64910690c574 172 tpm_input_capture_edge_t currChanEdgeMode; /*!< Input capture edge select for channel n */
AnnaBridge 145:64910690c574 173 tpm_input_capture_edge_t nextChanEdgeMode; /*!< Input capture edge select for channel n+1 */
AnnaBridge 145:64910690c574 174 } tpm_dual_edge_capture_param_t;
AnnaBridge 145:64910690c574 175 #endif
AnnaBridge 145:64910690c574 176
AnnaBridge 145:64910690c574 177 #if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
AnnaBridge 145:64910690c574 178 /*!
AnnaBridge 145:64910690c574 179 * @brief TPM quadrature decode modes
AnnaBridge 145:64910690c574 180 *
AnnaBridge 145:64910690c574 181 * @note This mode is available only on some SoC's.
AnnaBridge 145:64910690c574 182 */
AnnaBridge 145:64910690c574 183 typedef enum _tpm_quad_decode_mode
AnnaBridge 145:64910690c574 184 {
AnnaBridge 145:64910690c574 185 kTPM_QuadPhaseEncode = 0U, /*!< Phase A and Phase B encoding mode */
AnnaBridge 145:64910690c574 186 kTPM_QuadCountAndDir /*!< Count and direction encoding mode */
AnnaBridge 145:64910690c574 187 } tpm_quad_decode_mode_t;
AnnaBridge 145:64910690c574 188
AnnaBridge 145:64910690c574 189 /*! @brief TPM quadrature phase polarities */
AnnaBridge 145:64910690c574 190 typedef enum _tpm_phase_polarity
AnnaBridge 145:64910690c574 191 {
AnnaBridge 145:64910690c574 192 kTPM_QuadPhaseNormal = 0U, /*!< Phase input signal is not inverted */
AnnaBridge 145:64910690c574 193 kTPM_QuadPhaseInvert /*!< Phase input signal is inverted */
AnnaBridge 145:64910690c574 194 } tpm_phase_polarity_t;
AnnaBridge 145:64910690c574 195
AnnaBridge 145:64910690c574 196 /*! @brief TPM quadrature decode phase parameters */
AnnaBridge 145:64910690c574 197 typedef struct _tpm_phase_param
AnnaBridge 145:64910690c574 198 {
AnnaBridge 145:64910690c574 199 uint32_t phaseFilterVal; /*!< Filter value, filter is disabled when the value is zero */
AnnaBridge 145:64910690c574 200 tpm_phase_polarity_t phasePolarity; /*!< Phase polarity */
AnnaBridge 145:64910690c574 201 } tpm_phase_params_t;
AnnaBridge 145:64910690c574 202 #endif
AnnaBridge 145:64910690c574 203
AnnaBridge 145:64910690c574 204 /*! @brief TPM clock source selection*/
AnnaBridge 145:64910690c574 205 typedef enum _tpm_clock_source
AnnaBridge 145:64910690c574 206 {
AnnaBridge 145:64910690c574 207 kTPM_SystemClock = 1U, /*!< System clock */
AnnaBridge 145:64910690c574 208 kTPM_ExternalClock /*!< External clock */
AnnaBridge 145:64910690c574 209 } tpm_clock_source_t;
AnnaBridge 145:64910690c574 210
AnnaBridge 145:64910690c574 211 /*! @brief TPM prescale value selection for the clock source*/
AnnaBridge 145:64910690c574 212 typedef enum _tpm_clock_prescale
AnnaBridge 145:64910690c574 213 {
AnnaBridge 145:64910690c574 214 kTPM_Prescale_Divide_1 = 0U, /*!< Divide by 1 */
AnnaBridge 145:64910690c574 215 kTPM_Prescale_Divide_2, /*!< Divide by 2 */
AnnaBridge 145:64910690c574 216 kTPM_Prescale_Divide_4, /*!< Divide by 4 */
AnnaBridge 145:64910690c574 217 kTPM_Prescale_Divide_8, /*!< Divide by 8 */
AnnaBridge 145:64910690c574 218 kTPM_Prescale_Divide_16, /*!< Divide by 16 */
AnnaBridge 145:64910690c574 219 kTPM_Prescale_Divide_32, /*!< Divide by 32 */
AnnaBridge 145:64910690c574 220 kTPM_Prescale_Divide_64, /*!< Divide by 64 */
AnnaBridge 145:64910690c574 221 kTPM_Prescale_Divide_128 /*!< Divide by 128 */
AnnaBridge 145:64910690c574 222 } tpm_clock_prescale_t;
AnnaBridge 145:64910690c574 223
AnnaBridge 145:64910690c574 224 /*!
AnnaBridge 145:64910690c574 225 * @brief TPM config structure
AnnaBridge 145:64910690c574 226 *
AnnaBridge 145:64910690c574 227 * This structure holds the configuration settings for the TPM peripheral. To initialize this
AnnaBridge 145:64910690c574 228 * structure to reasonable defaults, call the TPM_GetDefaultConfig() function and pass a
AnnaBridge 145:64910690c574 229 * pointer to your config structure instance.
AnnaBridge 145:64910690c574 230 *
AnnaBridge 145:64910690c574 231 * The config struct can be made const so it resides in flash
AnnaBridge 145:64910690c574 232 */
AnnaBridge 145:64910690c574 233 typedef struct _tpm_config
AnnaBridge 145:64910690c574 234 {
AnnaBridge 145:64910690c574 235 tpm_clock_prescale_t prescale; /*!< Select TPM clock prescale value */
AnnaBridge 145:64910690c574 236 bool useGlobalTimeBase; /*!< true: Use of an external global time base is enabled;
AnnaBridge 145:64910690c574 237 false: disabled */
AnnaBridge 145:64910690c574 238 tpm_trigger_select_t triggerSelect; /*!< Input trigger to use for controlling the counter operation */
AnnaBridge 145:64910690c574 239 #if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
AnnaBridge 145:64910690c574 240 tpm_trigger_source_t triggerSource; /*!< Decides if we use external or internal trigger. */
AnnaBridge 145:64910690c574 241 #endif
AnnaBridge 145:64910690c574 242 bool enableDoze; /*!< true: TPM counter is paused in doze mode;
AnnaBridge 145:64910690c574 243 false: TPM counter continues in doze mode */
AnnaBridge 145:64910690c574 244 bool enableDebugMode; /*!< true: TPM counter continues in debug mode;
AnnaBridge 145:64910690c574 245 false: TPM counter is paused in debug mode */
AnnaBridge 145:64910690c574 246 bool enableReloadOnTrigger; /*!< true: TPM counter is reloaded on trigger;
AnnaBridge 145:64910690c574 247 false: TPM counter not reloaded */
AnnaBridge 145:64910690c574 248 bool enableStopOnOverflow; /*!< true: TPM counter stops after overflow;
AnnaBridge 145:64910690c574 249 false: TPM counter continues running after overflow */
AnnaBridge 145:64910690c574 250 bool enableStartOnTrigger; /*!< true: TPM counter only starts when a trigger is detected;
AnnaBridge 145:64910690c574 251 false: TPM counter starts immediately */
AnnaBridge 145:64910690c574 252 #if defined(FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER) && FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
AnnaBridge 145:64910690c574 253 bool enablePauseOnTrigger; /*!< true: TPM counter will pause while trigger remains asserted;
AnnaBridge 145:64910690c574 254 false: TPM counter continues running */
AnnaBridge 145:64910690c574 255 #endif
AnnaBridge 145:64910690c574 256 } tpm_config_t;
AnnaBridge 145:64910690c574 257
AnnaBridge 145:64910690c574 258 /*! @brief List of TPM interrupts */
AnnaBridge 145:64910690c574 259 typedef enum _tpm_interrupt_enable
AnnaBridge 145:64910690c574 260 {
AnnaBridge 145:64910690c574 261 kTPM_Chnl0InterruptEnable = (1U << 0), /*!< Channel 0 interrupt.*/
AnnaBridge 145:64910690c574 262 kTPM_Chnl1InterruptEnable = (1U << 1), /*!< Channel 1 interrupt.*/
AnnaBridge 145:64910690c574 263 kTPM_Chnl2InterruptEnable = (1U << 2), /*!< Channel 2 interrupt.*/
AnnaBridge 145:64910690c574 264 kTPM_Chnl3InterruptEnable = (1U << 3), /*!< Channel 3 interrupt.*/
AnnaBridge 145:64910690c574 265 kTPM_Chnl4InterruptEnable = (1U << 4), /*!< Channel 4 interrupt.*/
AnnaBridge 145:64910690c574 266 kTPM_Chnl5InterruptEnable = (1U << 5), /*!< Channel 5 interrupt.*/
AnnaBridge 145:64910690c574 267 kTPM_Chnl6InterruptEnable = (1U << 6), /*!< Channel 6 interrupt.*/
AnnaBridge 145:64910690c574 268 kTPM_Chnl7InterruptEnable = (1U << 7), /*!< Channel 7 interrupt.*/
AnnaBridge 145:64910690c574 269 kTPM_TimeOverflowInterruptEnable = (1U << 8) /*!< Time overflow interrupt.*/
AnnaBridge 145:64910690c574 270 } tpm_interrupt_enable_t;
AnnaBridge 145:64910690c574 271
AnnaBridge 145:64910690c574 272 /*! @brief List of TPM flags */
AnnaBridge 145:64910690c574 273 typedef enum _tpm_status_flags
AnnaBridge 145:64910690c574 274 {
AnnaBridge 145:64910690c574 275 kTPM_Chnl0Flag = (1U << 0), /*!< Channel 0 flag */
AnnaBridge 145:64910690c574 276 kTPM_Chnl1Flag = (1U << 1), /*!< Channel 1 flag */
AnnaBridge 145:64910690c574 277 kTPM_Chnl2Flag = (1U << 2), /*!< Channel 2 flag */
AnnaBridge 145:64910690c574 278 kTPM_Chnl3Flag = (1U << 3), /*!< Channel 3 flag */
AnnaBridge 145:64910690c574 279 kTPM_Chnl4Flag = (1U << 4), /*!< Channel 4 flag */
AnnaBridge 145:64910690c574 280 kTPM_Chnl5Flag = (1U << 5), /*!< Channel 5 flag */
AnnaBridge 145:64910690c574 281 kTPM_Chnl6Flag = (1U << 6), /*!< Channel 6 flag */
AnnaBridge 145:64910690c574 282 kTPM_Chnl7Flag = (1U << 7), /*!< Channel 7 flag */
AnnaBridge 145:64910690c574 283 kTPM_TimeOverflowFlag = (1U << 8) /*!< Time overflow flag */
AnnaBridge 145:64910690c574 284 } tpm_status_flags_t;
AnnaBridge 145:64910690c574 285
AnnaBridge 145:64910690c574 286 /*******************************************************************************
AnnaBridge 145:64910690c574 287 * API
AnnaBridge 145:64910690c574 288 ******************************************************************************/
AnnaBridge 145:64910690c574 289
AnnaBridge 145:64910690c574 290 #if defined(__cplusplus)
AnnaBridge 145:64910690c574 291 extern "C" {
AnnaBridge 145:64910690c574 292 #endif
AnnaBridge 145:64910690c574 293
AnnaBridge 145:64910690c574 294 /*!
AnnaBridge 145:64910690c574 295 * @name Initialization and deinitialization
AnnaBridge 145:64910690c574 296 * @{
AnnaBridge 145:64910690c574 297 */
AnnaBridge 145:64910690c574 298
AnnaBridge 145:64910690c574 299 /*!
AnnaBridge 145:64910690c574 300 * @brief Ungates the TPM clock and configures the peripheral for basic operation.
AnnaBridge 145:64910690c574 301 *
AnnaBridge 145:64910690c574 302 * @note This API should be called at the beginning of the application using the TPM driver.
AnnaBridge 145:64910690c574 303 *
AnnaBridge 145:64910690c574 304 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 305 * @param config Pointer to user's TPM config structure.
AnnaBridge 145:64910690c574 306 */
AnnaBridge 145:64910690c574 307 void TPM_Init(TPM_Type *base, const tpm_config_t *config);
AnnaBridge 145:64910690c574 308
AnnaBridge 145:64910690c574 309 /*!
AnnaBridge 145:64910690c574 310 * @brief Stops the counter and gates the TPM clock
AnnaBridge 145:64910690c574 311 *
AnnaBridge 145:64910690c574 312 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 313 */
AnnaBridge 145:64910690c574 314 void TPM_Deinit(TPM_Type *base);
AnnaBridge 145:64910690c574 315
AnnaBridge 145:64910690c574 316 /*!
AnnaBridge 145:64910690c574 317 * @brief Fill in the TPM config struct with the default settings
AnnaBridge 145:64910690c574 318 *
AnnaBridge 145:64910690c574 319 * The default values are:
AnnaBridge 145:64910690c574 320 * @code
AnnaBridge 145:64910690c574 321 * config->prescale = kTPM_Prescale_Divide_1;
AnnaBridge 145:64910690c574 322 * config->useGlobalTimeBase = false;
AnnaBridge 145:64910690c574 323 * config->dozeEnable = false;
AnnaBridge 145:64910690c574 324 * config->dbgMode = false;
AnnaBridge 145:64910690c574 325 * config->enableReloadOnTrigger = false;
AnnaBridge 145:64910690c574 326 * config->enableStopOnOverflow = false;
AnnaBridge 145:64910690c574 327 * config->enableStartOnTrigger = false;
AnnaBridge 145:64910690c574 328 *#if FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
AnnaBridge 145:64910690c574 329 * config->enablePauseOnTrigger = false;
AnnaBridge 145:64910690c574 330 *#endif
AnnaBridge 145:64910690c574 331 * config->triggerSelect = kTPM_Trigger_Select_0;
AnnaBridge 145:64910690c574 332 *#if FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
AnnaBridge 145:64910690c574 333 * config->triggerSource = kTPM_TriggerSource_External;
AnnaBridge 145:64910690c574 334 *#endif
AnnaBridge 145:64910690c574 335 * @endcode
AnnaBridge 145:64910690c574 336 * @param config Pointer to user's TPM config structure.
AnnaBridge 145:64910690c574 337 */
AnnaBridge 145:64910690c574 338 void TPM_GetDefaultConfig(tpm_config_t *config);
AnnaBridge 145:64910690c574 339
AnnaBridge 145:64910690c574 340 /*! @}*/
AnnaBridge 145:64910690c574 341
AnnaBridge 145:64910690c574 342 /*!
AnnaBridge 145:64910690c574 343 * @name Channel mode operations
AnnaBridge 145:64910690c574 344 * @{
AnnaBridge 145:64910690c574 345 */
AnnaBridge 145:64910690c574 346
AnnaBridge 145:64910690c574 347 /*!
AnnaBridge 145:64910690c574 348 * @brief Configures the PWM signal parameters
AnnaBridge 145:64910690c574 349 *
AnnaBridge 145:64910690c574 350 * User calls this function to configure the PWM signals period, mode, dutycycle and edge. Use this
AnnaBridge 145:64910690c574 351 * function to configure all the TPM channels that will be used to output a PWM signal
AnnaBridge 145:64910690c574 352 *
AnnaBridge 145:64910690c574 353 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 354 * @param chnlParams Array of PWM channel parameters to configure the channel(s)
AnnaBridge 145:64910690c574 355 * @param numOfChnls Number of channels to configure, this should be the size of the array passed in
AnnaBridge 145:64910690c574 356 * @param mode PWM operation mode, options available in enumeration ::tpm_pwm_mode_t
AnnaBridge 145:64910690c574 357 * @param pwmFreq_Hz PWM signal frequency in Hz
AnnaBridge 145:64910690c574 358 * @param srcClock_Hz TPM counter clock in Hz
AnnaBridge 145:64910690c574 359 *
AnnaBridge 145:64910690c574 360 * @return kStatus_Success if the PWM setup was successful,
AnnaBridge 145:64910690c574 361 * kStatus_Error on failure
AnnaBridge 145:64910690c574 362 */
AnnaBridge 145:64910690c574 363 status_t TPM_SetupPwm(TPM_Type *base,
AnnaBridge 145:64910690c574 364 const tpm_chnl_pwm_signal_param_t *chnlParams,
AnnaBridge 145:64910690c574 365 uint8_t numOfChnls,
AnnaBridge 145:64910690c574 366 tpm_pwm_mode_t mode,
AnnaBridge 145:64910690c574 367 uint32_t pwmFreq_Hz,
AnnaBridge 145:64910690c574 368 uint32_t srcClock_Hz);
AnnaBridge 145:64910690c574 369
AnnaBridge 145:64910690c574 370 /*!
AnnaBridge 145:64910690c574 371 * @brief Update the duty cycle of an active PWM signal
AnnaBridge 145:64910690c574 372 *
AnnaBridge 145:64910690c574 373 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 374 * @param chnlNumber The channel number. In combined mode, this represents
AnnaBridge 145:64910690c574 375 * the channel pair number
AnnaBridge 145:64910690c574 376 * @param currentPwmMode The current PWM mode set during PWM setup
AnnaBridge 145:64910690c574 377 * @param dutyCyclePercent New PWM pulse width, value should be between 0 to 100
AnnaBridge 145:64910690c574 378 * 0=inactive signal(0% duty cycle)...
AnnaBridge 145:64910690c574 379 * 100=active signal (100% duty cycle)
AnnaBridge 145:64910690c574 380 */
AnnaBridge 145:64910690c574 381 void TPM_UpdatePwmDutycycle(TPM_Type *base,
AnnaBridge 145:64910690c574 382 tpm_chnl_t chnlNumber,
AnnaBridge 145:64910690c574 383 tpm_pwm_mode_t currentPwmMode,
AnnaBridge 145:64910690c574 384 uint8_t dutyCyclePercent);
AnnaBridge 145:64910690c574 385
AnnaBridge 145:64910690c574 386 /*!
AnnaBridge 145:64910690c574 387 * @brief Update the edge level selection for a channel
AnnaBridge 145:64910690c574 388 *
AnnaBridge 145:64910690c574 389 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 390 * @param chnlNumber The channel number
AnnaBridge 145:64910690c574 391 * @param level The level to be set to the ELSnB:ELSnA field; valid values are 00, 01, 10, 11.
AnnaBridge 145:64910690c574 392 * See the appropriate SoC reference manual for details about this field.
AnnaBridge 145:64910690c574 393 */
AnnaBridge 145:64910690c574 394 void TPM_UpdateChnlEdgeLevelSelect(TPM_Type *base, tpm_chnl_t chnlNumber, uint8_t level);
AnnaBridge 145:64910690c574 395
AnnaBridge 145:64910690c574 396 /*!
AnnaBridge 145:64910690c574 397 * @brief Enables capturing an input signal on the channel using the function parameters.
AnnaBridge 145:64910690c574 398 *
AnnaBridge 145:64910690c574 399 * When the edge specified in the captureMode argument occurs on the channel, the TPM counter is captured into
AnnaBridge 145:64910690c574 400 * the CnV register. The user has to read the CnV register separately to get this value.
AnnaBridge 145:64910690c574 401 *
AnnaBridge 145:64910690c574 402 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 403 * @param chnlNumber The channel number
AnnaBridge 145:64910690c574 404 * @param captureMode Specifies which edge to capture
AnnaBridge 145:64910690c574 405 */
AnnaBridge 145:64910690c574 406 void TPM_SetupInputCapture(TPM_Type *base, tpm_chnl_t chnlNumber, tpm_input_capture_edge_t captureMode);
AnnaBridge 145:64910690c574 407
AnnaBridge 145:64910690c574 408 /*!
AnnaBridge 145:64910690c574 409 * @brief Configures the TPM to generate timed pulses.
AnnaBridge 145:64910690c574 410 *
AnnaBridge 145:64910690c574 411 * When the TPM counter matches the value of compareVal argument (this is written into CnV reg), the channel
AnnaBridge 145:64910690c574 412 * output is changed based on what is specified in the compareMode argument.
AnnaBridge 145:64910690c574 413 *
AnnaBridge 145:64910690c574 414 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 415 * @param chnlNumber The channel number
AnnaBridge 145:64910690c574 416 * @param compareMode Action to take on the channel output when the compare condition is met
AnnaBridge 145:64910690c574 417 * @param compareValue Value to be programmed in the CnV register.
AnnaBridge 145:64910690c574 418 */
AnnaBridge 145:64910690c574 419 void TPM_SetupOutputCompare(TPM_Type *base,
AnnaBridge 145:64910690c574 420 tpm_chnl_t chnlNumber,
AnnaBridge 145:64910690c574 421 tpm_output_compare_mode_t compareMode,
AnnaBridge 145:64910690c574 422 uint32_t compareValue);
AnnaBridge 145:64910690c574 423
AnnaBridge 145:64910690c574 424 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 145:64910690c574 425 /*!
AnnaBridge 145:64910690c574 426 * @brief Configures the dual edge capture mode of the TPM.
AnnaBridge 145:64910690c574 427 *
AnnaBridge 145:64910690c574 428 * This function allows to measure a pulse width of the signal on the input of channel of a
AnnaBridge 145:64910690c574 429 * channel pair. The filter function is disabled if the filterVal argument passed is zero.
AnnaBridge 145:64910690c574 430 *
AnnaBridge 145:64910690c574 431 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 432 * @param chnlPairNumber The TPM channel pair number; options are 0, 1, 2, 3
AnnaBridge 145:64910690c574 433 * @param edgeParam Sets up the dual edge capture function
AnnaBridge 145:64910690c574 434 * @param filterValue Filter value, specify 0 to disable filter.
AnnaBridge 145:64910690c574 435 */
AnnaBridge 145:64910690c574 436 void TPM_SetupDualEdgeCapture(TPM_Type *base,
AnnaBridge 145:64910690c574 437 tpm_chnl_t chnlPairNumber,
AnnaBridge 145:64910690c574 438 const tpm_dual_edge_capture_param_t *edgeParam,
AnnaBridge 145:64910690c574 439 uint32_t filterValue);
AnnaBridge 145:64910690c574 440 #endif
AnnaBridge 145:64910690c574 441
AnnaBridge 145:64910690c574 442 #if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
AnnaBridge 145:64910690c574 443 /*!
AnnaBridge 145:64910690c574 444 * @brief Configures the parameters and activates the quadrature decode mode.
AnnaBridge 145:64910690c574 445 *
AnnaBridge 145:64910690c574 446 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 447 * @param phaseAParams Phase A configuration parameters
AnnaBridge 145:64910690c574 448 * @param phaseBParams Phase B configuration parameters
AnnaBridge 145:64910690c574 449 * @param quadMode Selects encoding mode used in quadrature decoder mode
AnnaBridge 145:64910690c574 450 */
AnnaBridge 145:64910690c574 451 void TPM_SetupQuadDecode(TPM_Type *base,
AnnaBridge 145:64910690c574 452 const tpm_phase_params_t *phaseAParams,
AnnaBridge 145:64910690c574 453 const tpm_phase_params_t *phaseBParams,
AnnaBridge 145:64910690c574 454 tpm_quad_decode_mode_t quadMode);
AnnaBridge 145:64910690c574 455 #endif
AnnaBridge 145:64910690c574 456
AnnaBridge 145:64910690c574 457 /*! @}*/
AnnaBridge 145:64910690c574 458
AnnaBridge 145:64910690c574 459 /*!
AnnaBridge 145:64910690c574 460 * @name Interrupt Interface
AnnaBridge 145:64910690c574 461 * @{
AnnaBridge 145:64910690c574 462 */
AnnaBridge 145:64910690c574 463
AnnaBridge 145:64910690c574 464 /*!
AnnaBridge 145:64910690c574 465 * @brief Enables the selected TPM interrupts.
AnnaBridge 145:64910690c574 466 *
AnnaBridge 145:64910690c574 467 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 468 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 145:64910690c574 469 * enumeration ::tpm_interrupt_enable_t
AnnaBridge 145:64910690c574 470 */
AnnaBridge 145:64910690c574 471 void TPM_EnableInterrupts(TPM_Type *base, uint32_t mask);
AnnaBridge 145:64910690c574 472
AnnaBridge 145:64910690c574 473 /*!
AnnaBridge 145:64910690c574 474 * @brief Disables the selected TPM interrupts.
AnnaBridge 145:64910690c574 475 *
AnnaBridge 145:64910690c574 476 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 477 * @param mask The interrupts to disable. This is a logical OR of members of the
AnnaBridge 145:64910690c574 478 * enumeration ::tpm_interrupt_enable_t
AnnaBridge 145:64910690c574 479 */
AnnaBridge 145:64910690c574 480 void TPM_DisableInterrupts(TPM_Type *base, uint32_t mask);
AnnaBridge 145:64910690c574 481
AnnaBridge 145:64910690c574 482 /*!
AnnaBridge 145:64910690c574 483 * @brief Gets the enabled TPM interrupts.
AnnaBridge 145:64910690c574 484 *
AnnaBridge 145:64910690c574 485 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 486 *
AnnaBridge 145:64910690c574 487 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 145:64910690c574 488 * enumeration ::tpm_interrupt_enable_t
AnnaBridge 145:64910690c574 489 */
AnnaBridge 145:64910690c574 490 uint32_t TPM_GetEnabledInterrupts(TPM_Type *base);
AnnaBridge 145:64910690c574 491
AnnaBridge 145:64910690c574 492 /*! @}*/
AnnaBridge 145:64910690c574 493
AnnaBridge 145:64910690c574 494 /*!
AnnaBridge 145:64910690c574 495 * @name Status Interface
AnnaBridge 145:64910690c574 496 * @{
AnnaBridge 145:64910690c574 497 */
AnnaBridge 145:64910690c574 498
AnnaBridge 145:64910690c574 499 /*!
AnnaBridge 145:64910690c574 500 * @brief Gets the TPM status flags
AnnaBridge 145:64910690c574 501 *
AnnaBridge 145:64910690c574 502 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 503 *
AnnaBridge 145:64910690c574 504 * @return The status flags. This is the logical OR of members of the
AnnaBridge 145:64910690c574 505 * enumeration ::tpm_status_flags_t
AnnaBridge 145:64910690c574 506 */
AnnaBridge 145:64910690c574 507 static inline uint32_t TPM_GetStatusFlags(TPM_Type *base)
AnnaBridge 145:64910690c574 508 {
AnnaBridge 145:64910690c574 509 return base->STATUS;
AnnaBridge 145:64910690c574 510 }
AnnaBridge 145:64910690c574 511
AnnaBridge 145:64910690c574 512 /*!
AnnaBridge 145:64910690c574 513 * @brief Clears the TPM status flags
AnnaBridge 145:64910690c574 514 *
AnnaBridge 145:64910690c574 515 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 516 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 145:64910690c574 517 * enumeration ::tpm_status_flags_t
AnnaBridge 145:64910690c574 518 */
AnnaBridge 145:64910690c574 519 static inline void TPM_ClearStatusFlags(TPM_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 520 {
AnnaBridge 145:64910690c574 521 /* Clear the status flags */
AnnaBridge 145:64910690c574 522 base->STATUS = mask;
AnnaBridge 145:64910690c574 523 }
AnnaBridge 145:64910690c574 524
AnnaBridge 145:64910690c574 525 /*! @}*/
AnnaBridge 145:64910690c574 526
AnnaBridge 145:64910690c574 527 /*!
AnnaBridge 145:64910690c574 528 * @name Timer Start and Stop
AnnaBridge 145:64910690c574 529 * @{
AnnaBridge 145:64910690c574 530 */
AnnaBridge 145:64910690c574 531
AnnaBridge 145:64910690c574 532 /*!
AnnaBridge 145:64910690c574 533 * @brief Starts the TPM counter.
AnnaBridge 145:64910690c574 534 *
AnnaBridge 145:64910690c574 535 *
AnnaBridge 145:64910690c574 536 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 537 * @param clockSource TPM clock source; once clock source is set the counter will start running
AnnaBridge 145:64910690c574 538 */
AnnaBridge 145:64910690c574 539 static inline void TPM_StartTimer(TPM_Type *base, tpm_clock_source_t clockSource)
AnnaBridge 145:64910690c574 540 {
AnnaBridge 145:64910690c574 541 uint32_t reg = base->SC;
AnnaBridge 145:64910690c574 542
AnnaBridge 145:64910690c574 543 reg &= ~(TPM_SC_CMOD_MASK);
AnnaBridge 145:64910690c574 544 reg |= TPM_SC_CMOD(clockSource);
AnnaBridge 145:64910690c574 545 base->SC = reg;
AnnaBridge 145:64910690c574 546 }
AnnaBridge 145:64910690c574 547
AnnaBridge 145:64910690c574 548 /*!
AnnaBridge 145:64910690c574 549 * @brief Stops the TPM counter.
AnnaBridge 145:64910690c574 550 *
AnnaBridge 145:64910690c574 551 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 552 */
AnnaBridge 145:64910690c574 553 static inline void TPM_StopTimer(TPM_Type *base)
AnnaBridge 145:64910690c574 554 {
AnnaBridge 145:64910690c574 555 /* Set clock source to none to disable counter */
AnnaBridge 145:64910690c574 556 base->SC &= ~(TPM_SC_CMOD_MASK);
AnnaBridge 145:64910690c574 557
AnnaBridge 145:64910690c574 558 /* Wait till this reads as zero acknowledging the counter is disabled */
AnnaBridge 145:64910690c574 559 while (base->SC & TPM_SC_CMOD_MASK)
AnnaBridge 145:64910690c574 560 {
AnnaBridge 145:64910690c574 561 }
AnnaBridge 145:64910690c574 562 }
AnnaBridge 145:64910690c574 563
AnnaBridge 145:64910690c574 564 /*! @}*/
AnnaBridge 145:64910690c574 565
AnnaBridge 145:64910690c574 566 #if defined(FSL_FEATURE_TPM_HAS_GLOBAL) && FSL_FEATURE_TPM_HAS_GLOBAL
AnnaBridge 145:64910690c574 567 /*!
AnnaBridge 145:64910690c574 568 * @brief Performs a software reset on the TPM module.
AnnaBridge 145:64910690c574 569 *
AnnaBridge 145:64910690c574 570 * Reset all internal logic and registers, except the Global Register. Remains set until cleared by software..
AnnaBridge 145:64910690c574 571 *
AnnaBridge 145:64910690c574 572 * @note TPM software reset is available on certain SoC's only
AnnaBridge 145:64910690c574 573 *
AnnaBridge 145:64910690c574 574 * @param base TPM peripheral base address
AnnaBridge 145:64910690c574 575 */
AnnaBridge 145:64910690c574 576 static inline void TPM_Reset(TPM_Type *base)
AnnaBridge 145:64910690c574 577 {
AnnaBridge 145:64910690c574 578 base->GLOBAL |= TPM_GLOBAL_RST_MASK;
AnnaBridge 145:64910690c574 579 base->GLOBAL &= ~TPM_GLOBAL_RST_MASK;
AnnaBridge 145:64910690c574 580 }
AnnaBridge 145:64910690c574 581 #endif
AnnaBridge 145:64910690c574 582
AnnaBridge 145:64910690c574 583 #if defined(__cplusplus)
AnnaBridge 145:64910690c574 584 }
AnnaBridge 145:64910690c574 585 #endif
AnnaBridge 145:64910690c574 586
AnnaBridge 145:64910690c574 587 /*! @}*/
AnnaBridge 145:64910690c574 588
AnnaBridge 145:64910690c574 589 #endif /* _FSL_TPM_H_ */