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TARGET_KL82Z/TOOLCHAIN_IAR/fsl_gpio.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_USENSE/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/drivers/fsl_gpio.h@145:64910690c574 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 145:64910690c574 1 /*
AnnaBridge 145:64910690c574 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 145:64910690c574 3 * All rights reserved.
AnnaBridge 145:64910690c574 4 *
AnnaBridge 145:64910690c574 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 145:64910690c574 6 * are permitted provided that the following conditions are met:
AnnaBridge 145:64910690c574 7 *
AnnaBridge 145:64910690c574 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 145:64910690c574 9 * of conditions and the following disclaimer.
AnnaBridge 145:64910690c574 10 *
AnnaBridge 145:64910690c574 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 145:64910690c574 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 145:64910690c574 13 * other materials provided with the distribution.
AnnaBridge 145:64910690c574 14 *
AnnaBridge 145:64910690c574 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 145:64910690c574 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 145:64910690c574 17 * software without specific prior written permission.
AnnaBridge 145:64910690c574 18 *
AnnaBridge 145:64910690c574 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 145:64910690c574 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 145:64910690c574 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 145:64910690c574 22 * DISCLAIMED. IN NO EVENT SDRVL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 145:64910690c574 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 145:64910690c574 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 145:64910690c574 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 145:64910690c574 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 145:64910690c574 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 145:64910690c574 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 145:64910690c574 29 */
AnnaBridge 145:64910690c574 30
AnnaBridge 145:64910690c574 31 #ifndef _FSL_GPIO_H_
AnnaBridge 145:64910690c574 32 #define _FSL_GPIO_H_
AnnaBridge 145:64910690c574 33
AnnaBridge 145:64910690c574 34 #include "fsl_common.h"
AnnaBridge 145:64910690c574 35
AnnaBridge 145:64910690c574 36 /*!
AnnaBridge 145:64910690c574 37 * @addtogroup gpio
AnnaBridge 145:64910690c574 38 * @{
AnnaBridge 145:64910690c574 39 */
AnnaBridge 145:64910690c574 40
AnnaBridge 145:64910690c574 41
AnnaBridge 145:64910690c574 42 /*******************************************************************************
AnnaBridge 145:64910690c574 43 * Definitions
AnnaBridge 145:64910690c574 44 ******************************************************************************/
AnnaBridge 145:64910690c574 45
AnnaBridge 145:64910690c574 46 /*! @name Driver version */
AnnaBridge 145:64910690c574 47 /*@{*/
AnnaBridge 145:64910690c574 48 /*! @brief GPIO driver version 2.1.0. */
AnnaBridge 145:64910690c574 49 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
AnnaBridge 145:64910690c574 50 /*@}*/
AnnaBridge 145:64910690c574 51
AnnaBridge 145:64910690c574 52 /*! @brief GPIO direction definition*/
AnnaBridge 145:64910690c574 53 typedef enum _gpio_pin_direction
AnnaBridge 145:64910690c574 54 {
AnnaBridge 145:64910690c574 55 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
AnnaBridge 145:64910690c574 56 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
AnnaBridge 145:64910690c574 57 } gpio_pin_direction_t;
AnnaBridge 145:64910690c574 58
AnnaBridge 145:64910690c574 59 /*!
AnnaBridge 145:64910690c574 60 * @brief The GPIO pin configuration structure.
AnnaBridge 145:64910690c574 61 *
AnnaBridge 145:64910690c574 62 * Every pin can only be configured as either output pin or input pin at a time.
AnnaBridge 145:64910690c574 63 * If configured as a input pin, then leave the outputConfig unused
AnnaBridge 145:64910690c574 64 * Note : In some use cases, the corresponding port property should be configured in advance
AnnaBridge 145:64910690c574 65 * with the PORT_SetPinConfig()
AnnaBridge 145:64910690c574 66 */
AnnaBridge 145:64910690c574 67 typedef struct _gpio_pin_config
AnnaBridge 145:64910690c574 68 {
AnnaBridge 145:64910690c574 69 gpio_pin_direction_t pinDirection; /*!< GPIO direction, input or output */
AnnaBridge 145:64910690c574 70 /* Output configurations, please ignore if configured as a input one */
AnnaBridge 145:64910690c574 71 uint8_t outputLogic; /*!< Set default output logic, no use in input */
AnnaBridge 145:64910690c574 72 } gpio_pin_config_t;
AnnaBridge 145:64910690c574 73
AnnaBridge 145:64910690c574 74 /*! @} */
AnnaBridge 145:64910690c574 75
AnnaBridge 145:64910690c574 76 /*******************************************************************************
AnnaBridge 145:64910690c574 77 * API
AnnaBridge 145:64910690c574 78 ******************************************************************************/
AnnaBridge 145:64910690c574 79
AnnaBridge 145:64910690c574 80 #if defined(__cplusplus)
AnnaBridge 145:64910690c574 81 extern "C" {
AnnaBridge 145:64910690c574 82 #endif
AnnaBridge 145:64910690c574 83
AnnaBridge 145:64910690c574 84 /*!
AnnaBridge 145:64910690c574 85 * @addtogroup gpio_driver
AnnaBridge 145:64910690c574 86 * @{
AnnaBridge 145:64910690c574 87 */
AnnaBridge 145:64910690c574 88
AnnaBridge 145:64910690c574 89 /*! @name GPIO Configuration */
AnnaBridge 145:64910690c574 90 /*@{*/
AnnaBridge 145:64910690c574 91
AnnaBridge 145:64910690c574 92 /*!
AnnaBridge 145:64910690c574 93 * @brief Initializes a GPIO pin used by the board.
AnnaBridge 145:64910690c574 94 *
AnnaBridge 145:64910690c574 95 * To initialize the GPIO, define a pin configuration, either input or output, in the user file.
AnnaBridge 145:64910690c574 96 * Then, call the GPIO_PinInit() function.
AnnaBridge 145:64910690c574 97 *
AnnaBridge 145:64910690c574 98 * This is an example to define an input pin or output pin configuration:
AnnaBridge 145:64910690c574 99 * @code
AnnaBridge 145:64910690c574 100 * // Define a digital input pin configuration,
AnnaBridge 145:64910690c574 101 * gpio_pin_config_t config =
AnnaBridge 145:64910690c574 102 * {
AnnaBridge 145:64910690c574 103 * kGPIO_DigitalInput,
AnnaBridge 145:64910690c574 104 * 0,
AnnaBridge 145:64910690c574 105 * }
AnnaBridge 145:64910690c574 106 * //Define a digital output pin configuration,
AnnaBridge 145:64910690c574 107 * gpio_pin_config_t config =
AnnaBridge 145:64910690c574 108 * {
AnnaBridge 145:64910690c574 109 * kGPIO_DigitalOutput,
AnnaBridge 145:64910690c574 110 * 0,
AnnaBridge 145:64910690c574 111 * }
AnnaBridge 145:64910690c574 112 * @endcode
AnnaBridge 145:64910690c574 113 *
AnnaBridge 145:64910690c574 114 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 115 * @param pin GPIO port pin number
AnnaBridge 145:64910690c574 116 * @param config GPIO pin configuration pointer
AnnaBridge 145:64910690c574 117 */
AnnaBridge 145:64910690c574 118 void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
AnnaBridge 145:64910690c574 119
AnnaBridge 145:64910690c574 120 /*@}*/
AnnaBridge 145:64910690c574 121
AnnaBridge 145:64910690c574 122 /*! @name GPIO Output Operations */
AnnaBridge 145:64910690c574 123 /*@{*/
AnnaBridge 145:64910690c574 124
AnnaBridge 145:64910690c574 125 /*!
AnnaBridge 145:64910690c574 126 * @brief Sets the output level of the multiple GPIO pins to the logic 1 or 0.
AnnaBridge 145:64910690c574 127 *
AnnaBridge 145:64910690c574 128 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 129 * @param pin GPIO pin number
AnnaBridge 145:64910690c574 130 * @param output GPIO pin output logic level.
AnnaBridge 145:64910690c574 131 * - 0: corresponding pin output low-logic level.
AnnaBridge 145:64910690c574 132 * - 1: corresponding pin output high-logic level.
AnnaBridge 145:64910690c574 133 */
AnnaBridge 145:64910690c574 134 static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
AnnaBridge 145:64910690c574 135 {
AnnaBridge 145:64910690c574 136 if (output == 0U)
AnnaBridge 145:64910690c574 137 {
AnnaBridge 145:64910690c574 138 base->PCOR = 1 << pin;
AnnaBridge 145:64910690c574 139 }
AnnaBridge 145:64910690c574 140 else
AnnaBridge 145:64910690c574 141 {
AnnaBridge 145:64910690c574 142 base->PSOR = 1 << pin;
AnnaBridge 145:64910690c574 143 }
AnnaBridge 145:64910690c574 144 }
AnnaBridge 145:64910690c574 145
AnnaBridge 145:64910690c574 146 /*!
AnnaBridge 145:64910690c574 147 * @brief Sets the output level of the multiple GPIO pins to the logic 1.
AnnaBridge 145:64910690c574 148 *
AnnaBridge 145:64910690c574 149 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 150 * @param mask GPIO pin number macro
AnnaBridge 145:64910690c574 151 */
AnnaBridge 145:64910690c574 152 static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 153 {
AnnaBridge 145:64910690c574 154 base->PSOR = mask;
AnnaBridge 145:64910690c574 155 }
AnnaBridge 145:64910690c574 156
AnnaBridge 145:64910690c574 157 /*!
AnnaBridge 145:64910690c574 158 * @brief Sets the output level of the multiple GPIO pins to the logic 0.
AnnaBridge 145:64910690c574 159 *
AnnaBridge 145:64910690c574 160 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 161 * @param mask GPIO pin number macro
AnnaBridge 145:64910690c574 162 */
AnnaBridge 145:64910690c574 163 static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 164 {
AnnaBridge 145:64910690c574 165 base->PCOR = mask;
AnnaBridge 145:64910690c574 166 }
AnnaBridge 145:64910690c574 167
AnnaBridge 145:64910690c574 168 /*!
AnnaBridge 145:64910690c574 169 * @brief Reverses current output logic of the multiple GPIO pins.
AnnaBridge 145:64910690c574 170 *
AnnaBridge 145:64910690c574 171 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 172 * @param mask GPIO pin number macro
AnnaBridge 145:64910690c574 173 */
AnnaBridge 145:64910690c574 174 static inline void GPIO_TogglePinsOutput(GPIO_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 175 {
AnnaBridge 145:64910690c574 176 base->PTOR = mask;
AnnaBridge 145:64910690c574 177 }
AnnaBridge 145:64910690c574 178 /*@}*/
AnnaBridge 145:64910690c574 179
AnnaBridge 145:64910690c574 180 /*! @name GPIO Input Operations */
AnnaBridge 145:64910690c574 181 /*@{*/
AnnaBridge 145:64910690c574 182
AnnaBridge 145:64910690c574 183 /*!
AnnaBridge 145:64910690c574 184 * @brief Reads the current input value of the whole GPIO port.
AnnaBridge 145:64910690c574 185 *
AnnaBridge 145:64910690c574 186 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 187 * @param pin GPIO pin number
AnnaBridge 145:64910690c574 188 * @retval GPIO port input value
AnnaBridge 145:64910690c574 189 * - 0: corresponding pin input low-logic level.
AnnaBridge 145:64910690c574 190 * - 1: corresponding pin input high-logic level.
AnnaBridge 145:64910690c574 191 */
AnnaBridge 145:64910690c574 192 static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
AnnaBridge 145:64910690c574 193 {
AnnaBridge 145:64910690c574 194 return (((base->PDIR) >> pin) & 0x01U);
AnnaBridge 145:64910690c574 195 }
AnnaBridge 145:64910690c574 196 /*@}*/
AnnaBridge 145:64910690c574 197
AnnaBridge 145:64910690c574 198 /*! @name GPIO Interrupt */
AnnaBridge 145:64910690c574 199 /*@{*/
AnnaBridge 145:64910690c574 200
AnnaBridge 145:64910690c574 201 /*!
AnnaBridge 145:64910690c574 202 * @brief Reads whole GPIO port interrupt status flag.
AnnaBridge 145:64910690c574 203 *
AnnaBridge 145:64910690c574 204 * If a pin is configured to generate the DMA request, the corresponding flag
AnnaBridge 145:64910690c574 205 * is cleared automatically at the completion of the requested DMA transfer.
AnnaBridge 145:64910690c574 206 * Otherwise, the flag remains set until a logic one is written to that flag.
AnnaBridge 145:64910690c574 207 * If configured for a level sensitive interrupt that remains asserted, the flag
AnnaBridge 145:64910690c574 208 * is set again immediately.
AnnaBridge 145:64910690c574 209 *
AnnaBridge 145:64910690c574 210 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 211 * @retval Current GPIO port interrupt status flag, for example, 0x00010001 means the
AnnaBridge 145:64910690c574 212 * pin 0 and 17 have the interrupt.
AnnaBridge 145:64910690c574 213 */
AnnaBridge 145:64910690c574 214 uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base);
AnnaBridge 145:64910690c574 215
AnnaBridge 145:64910690c574 216 /*!
AnnaBridge 145:64910690c574 217 * @brief Clears multiple GPIO pin interrupt status flag.
AnnaBridge 145:64910690c574 218 *
AnnaBridge 145:64910690c574 219 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 220 * @param mask GPIO pin number macro
AnnaBridge 145:64910690c574 221 */
AnnaBridge 145:64910690c574 222 void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask);
AnnaBridge 145:64910690c574 223
AnnaBridge 145:64910690c574 224 /*@}*/
AnnaBridge 145:64910690c574 225 /*! @} */
AnnaBridge 145:64910690c574 226
AnnaBridge 145:64910690c574 227 /*!
AnnaBridge 145:64910690c574 228 * @addtogroup fgpio_driver
AnnaBridge 145:64910690c574 229 * @{
AnnaBridge 145:64910690c574 230 */
AnnaBridge 145:64910690c574 231
AnnaBridge 145:64910690c574 232 /*
AnnaBridge 145:64910690c574 233 * Introduce the FGPIO feature.
AnnaBridge 145:64910690c574 234 *
AnnaBridge 145:64910690c574 235 * The FGPIO features are only support on some of Kinetis chips. The FGPIO registers are aliased to the IOPORT
AnnaBridge 145:64910690c574 236 * interface. Accesses via the IOPORT interface occur in parallel with any instruction fetches and will therefore
AnnaBridge 145:64910690c574 237 * complete in a single cycle. This aliased Fast GPIO memory map is called FGPIO.
AnnaBridge 145:64910690c574 238 */
AnnaBridge 145:64910690c574 239
AnnaBridge 145:64910690c574 240 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
AnnaBridge 145:64910690c574 241
AnnaBridge 145:64910690c574 242 /*! @name FGPIO Configuration */
AnnaBridge 145:64910690c574 243 /*@{*/
AnnaBridge 145:64910690c574 244
AnnaBridge 145:64910690c574 245 /*!
AnnaBridge 145:64910690c574 246 * @brief Initializes a FGPIO pin used by the board.
AnnaBridge 145:64910690c574 247 *
AnnaBridge 145:64910690c574 248 * To initialize the FGPIO driver, define a pin configuration, either input or output, in the user file.
AnnaBridge 145:64910690c574 249 * Then, call the FGPIO_PinInit() function.
AnnaBridge 145:64910690c574 250 *
AnnaBridge 145:64910690c574 251 * This is an example to define an input pin or output pin configuration:
AnnaBridge 145:64910690c574 252 * @code
AnnaBridge 145:64910690c574 253 * // Define a digital input pin configuration,
AnnaBridge 145:64910690c574 254 * gpio_pin_config_t config =
AnnaBridge 145:64910690c574 255 * {
AnnaBridge 145:64910690c574 256 * kGPIO_DigitalInput,
AnnaBridge 145:64910690c574 257 * 0,
AnnaBridge 145:64910690c574 258 * }
AnnaBridge 145:64910690c574 259 * //Define a digital output pin configuration,
AnnaBridge 145:64910690c574 260 * gpio_pin_config_t config =
AnnaBridge 145:64910690c574 261 * {
AnnaBridge 145:64910690c574 262 * kGPIO_DigitalOutput,
AnnaBridge 145:64910690c574 263 * 0,
AnnaBridge 145:64910690c574 264 * }
AnnaBridge 145:64910690c574 265 * @endcode
AnnaBridge 145:64910690c574 266 *
AnnaBridge 145:64910690c574 267 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 268 * @param pin FGPIO port pin number
AnnaBridge 145:64910690c574 269 * @param config FGPIO pin configuration pointer
AnnaBridge 145:64910690c574 270 */
AnnaBridge 145:64910690c574 271 void FGPIO_PinInit(FGPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
AnnaBridge 145:64910690c574 272
AnnaBridge 145:64910690c574 273 /*@}*/
AnnaBridge 145:64910690c574 274
AnnaBridge 145:64910690c574 275 /*! @name FGPIO Output Operations */
AnnaBridge 145:64910690c574 276 /*@{*/
AnnaBridge 145:64910690c574 277
AnnaBridge 145:64910690c574 278 /*!
AnnaBridge 145:64910690c574 279 * @brief Sets the output level of the multiple FGPIO pins to the logic 1 or 0.
AnnaBridge 145:64910690c574 280 *
AnnaBridge 145:64910690c574 281 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 282 * @param pin FGPIO pin number
AnnaBridge 145:64910690c574 283 * @param output FGPIOpin output logic level.
AnnaBridge 145:64910690c574 284 * - 0: corresponding pin output low-logic level.
AnnaBridge 145:64910690c574 285 * - 1: corresponding pin output high-logic level.
AnnaBridge 145:64910690c574 286 */
AnnaBridge 145:64910690c574 287 static inline void FGPIO_WritePinOutput(FGPIO_Type *base, uint32_t pin, uint8_t output)
AnnaBridge 145:64910690c574 288 {
AnnaBridge 145:64910690c574 289 if (output == 0U)
AnnaBridge 145:64910690c574 290 {
AnnaBridge 145:64910690c574 291 base->PCOR = 1 << pin;
AnnaBridge 145:64910690c574 292 }
AnnaBridge 145:64910690c574 293 else
AnnaBridge 145:64910690c574 294 {
AnnaBridge 145:64910690c574 295 base->PSOR = 1 << pin;
AnnaBridge 145:64910690c574 296 }
AnnaBridge 145:64910690c574 297 }
AnnaBridge 145:64910690c574 298
AnnaBridge 145:64910690c574 299 /*!
AnnaBridge 145:64910690c574 300 * @brief Sets the output level of the multiple FGPIO pins to the logic 1.
AnnaBridge 145:64910690c574 301 *
AnnaBridge 145:64910690c574 302 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 303 * @param mask FGPIO pin number macro
AnnaBridge 145:64910690c574 304 */
AnnaBridge 145:64910690c574 305 static inline void FGPIO_SetPinsOutput(FGPIO_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 306 {
AnnaBridge 145:64910690c574 307 base->PSOR = mask;
AnnaBridge 145:64910690c574 308 }
AnnaBridge 145:64910690c574 309
AnnaBridge 145:64910690c574 310 /*!
AnnaBridge 145:64910690c574 311 * @brief Sets the output level of the multiple FGPIO pins to the logic 0.
AnnaBridge 145:64910690c574 312 *
AnnaBridge 145:64910690c574 313 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 314 * @param mask FGPIO pin number macro
AnnaBridge 145:64910690c574 315 */
AnnaBridge 145:64910690c574 316 static inline void FGPIO_ClearPinsOutput(FGPIO_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 317 {
AnnaBridge 145:64910690c574 318 base->PCOR = mask;
AnnaBridge 145:64910690c574 319 }
AnnaBridge 145:64910690c574 320
AnnaBridge 145:64910690c574 321 /*!
AnnaBridge 145:64910690c574 322 * @brief Reverses current output logic of the multiple FGPIO pins.
AnnaBridge 145:64910690c574 323 *
AnnaBridge 145:64910690c574 324 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 325 * @param mask FGPIO pin number macro
AnnaBridge 145:64910690c574 326 */
AnnaBridge 145:64910690c574 327 static inline void FGPIO_TogglePinsOutput(FGPIO_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 328 {
AnnaBridge 145:64910690c574 329 base->PTOR = mask;
AnnaBridge 145:64910690c574 330 }
AnnaBridge 145:64910690c574 331 /*@}*/
AnnaBridge 145:64910690c574 332
AnnaBridge 145:64910690c574 333 /*! @name FGPIO Input Operations */
AnnaBridge 145:64910690c574 334 /*@{*/
AnnaBridge 145:64910690c574 335
AnnaBridge 145:64910690c574 336 /*!
AnnaBridge 145:64910690c574 337 * @brief Reads the current input value of the whole FGPIO port.
AnnaBridge 145:64910690c574 338 *
AnnaBridge 145:64910690c574 339 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 340 * @param pin FGPIO pin number
AnnaBridge 145:64910690c574 341 * @retval FGPIO port input value
AnnaBridge 145:64910690c574 342 * - 0: corresponding pin input low-logic level.
AnnaBridge 145:64910690c574 343 * - 1: corresponding pin input high-logic level.
AnnaBridge 145:64910690c574 344 */
AnnaBridge 145:64910690c574 345 static inline uint32_t FGPIO_ReadPinInput(FGPIO_Type *base, uint32_t pin)
AnnaBridge 145:64910690c574 346 {
AnnaBridge 145:64910690c574 347 return (((base->PDIR) >> pin) & 0x01U);
AnnaBridge 145:64910690c574 348 }
AnnaBridge 145:64910690c574 349 /*@}*/
AnnaBridge 145:64910690c574 350
AnnaBridge 145:64910690c574 351 /*! @name FGPIO Interrupt */
AnnaBridge 145:64910690c574 352 /*@{*/
AnnaBridge 145:64910690c574 353
AnnaBridge 145:64910690c574 354 /*!
AnnaBridge 145:64910690c574 355 * @brief Reads the whole FGPIO port interrupt status flag.
AnnaBridge 145:64910690c574 356 *
AnnaBridge 145:64910690c574 357 * If a pin is configured to generate the DMA request, the corresponding flag
AnnaBridge 145:64910690c574 358 * is cleared automatically at the completion of the requested DMA transfer.
AnnaBridge 145:64910690c574 359 * Otherwise, the flag remains set until a logic one is written to that flag.
AnnaBridge 145:64910690c574 360 * If configured for a level sensitive interrupt that remains asserted, the flag
AnnaBridge 145:64910690c574 361 * is set again immediately.
AnnaBridge 145:64910690c574 362 *
AnnaBridge 145:64910690c574 363 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 364 * @retval Current FGPIO port interrupt status flags, for example, 0x00010001 means the
AnnaBridge 145:64910690c574 365 * pin 0 and 17 have the interrupt.
AnnaBridge 145:64910690c574 366 */
AnnaBridge 145:64910690c574 367 uint32_t FGPIO_GetPinsInterruptFlags(FGPIO_Type *base);
AnnaBridge 145:64910690c574 368
AnnaBridge 145:64910690c574 369 /*!
AnnaBridge 145:64910690c574 370 * @brief Clears the multiple FGPIO pin interrupt status flag.
AnnaBridge 145:64910690c574 371 *
AnnaBridge 145:64910690c574 372 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 145:64910690c574 373 * @param mask FGPIO pin number macro
AnnaBridge 145:64910690c574 374 */
AnnaBridge 145:64910690c574 375 void FGPIO_ClearPinsInterruptFlags(FGPIO_Type *base, uint32_t mask);
AnnaBridge 145:64910690c574 376
AnnaBridge 145:64910690c574 377 /*@}*/
AnnaBridge 145:64910690c574 378
AnnaBridge 145:64910690c574 379 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */
AnnaBridge 145:64910690c574 380
AnnaBridge 145:64910690c574 381 #if defined(__cplusplus)
AnnaBridge 145:64910690c574 382 }
AnnaBridge 145:64910690c574 383 #endif
AnnaBridge 145:64910690c574 384
AnnaBridge 145:64910690c574 385 /*!
AnnaBridge 145:64910690c574 386 * @}
AnnaBridge 145:64910690c574 387 */
AnnaBridge 145:64910690c574 388
AnnaBridge 145:64910690c574 389 #endif /* _FSL_GPIO_H_*/