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TARGET_K66F/TOOLCHAIN_IAR/fsl_sdhc.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_RO359B/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_sdhc.h@143:86740a56073b 
mbed library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 143:86740a56073b 1 /*
AnnaBridge 143:86740a56073b 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 143:86740a56073b 3 * Copyright 2016-2017 NXP
AnnaBridge 143:86740a56073b 4 *
AnnaBridge 143:86740a56073b 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 143:86740a56073b 6 * are permitted provided that the following conditions are met:
AnnaBridge 143:86740a56073b 7 *
AnnaBridge 143:86740a56073b 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 143:86740a56073b 9 * of conditions and the following disclaimer.
AnnaBridge 143:86740a56073b 10 *
AnnaBridge 143:86740a56073b 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 143:86740a56073b 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 143:86740a56073b 13 * other materials provided with the distribution.
AnnaBridge 143:86740a56073b 14 *
AnnaBridge 143:86740a56073b 15 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 143:86740a56073b 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 143:86740a56073b 17 * software without specific prior written permission.
AnnaBridge 143:86740a56073b 18 *
AnnaBridge 143:86740a56073b 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 143:86740a56073b 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 143:86740a56073b 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 143:86740a56073b 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 143:86740a56073b 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 143:86740a56073b 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 143:86740a56073b 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 143:86740a56073b 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 143:86740a56073b 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 143:86740a56073b 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 143:86740a56073b 29 */
AnnaBridge 143:86740a56073b 30 #ifndef _FSL_SDHC_H_
AnnaBridge 143:86740a56073b 31 #define _FSL_SDHC_H_
AnnaBridge 143:86740a56073b 32
AnnaBridge 143:86740a56073b 33 #include "fsl_common.h"
AnnaBridge 143:86740a56073b 34
AnnaBridge 143:86740a56073b 35 /*!
AnnaBridge 143:86740a56073b 36 * @addtogroup sdhc
AnnaBridge 143:86740a56073b 37 * @{
AnnaBridge 143:86740a56073b 38 */
AnnaBridge 143:86740a56073b 39
AnnaBridge 143:86740a56073b 40 /******************************************************************************
AnnaBridge 143:86740a56073b 41 * Definitions.
AnnaBridge 143:86740a56073b 42 *****************************************************************************/
AnnaBridge 143:86740a56073b 43
AnnaBridge 143:86740a56073b 44 /*! @name Driver version */
AnnaBridge 143:86740a56073b 45 /*@{*/
AnnaBridge 143:86740a56073b 46 /*! @brief Driver version 2.1.5. */
AnnaBridge 143:86740a56073b 47 #define FSL_SDHC_DRIVER_VERSION (MAKE_VERSION(2U, 1U, 5U))
AnnaBridge 143:86740a56073b 48 /*@}*/
AnnaBridge 143:86740a56073b 49
AnnaBridge 143:86740a56073b 50 /*! @brief Maximum block count can be set one time */
AnnaBridge 143:86740a56073b 51 #define SDHC_MAX_BLOCK_COUNT (SDHC_BLKATTR_BLKCNT_MASK >> SDHC_BLKATTR_BLKCNT_SHIFT)
AnnaBridge 143:86740a56073b 52
AnnaBridge 143:86740a56073b 53 /*! @brief SDHC status */
AnnaBridge 143:86740a56073b 54 enum _sdhc_status
AnnaBridge 143:86740a56073b 55 {
AnnaBridge 143:86740a56073b 56 kStatus_SDHC_BusyTransferring = MAKE_STATUS(kStatusGroup_SDHC, 0U), /*!< Transfer is on-going */
AnnaBridge 143:86740a56073b 57 kStatus_SDHC_PrepareAdmaDescriptorFailed = MAKE_STATUS(kStatusGroup_SDHC, 1U), /*!< Set DMA descriptor failed */
AnnaBridge 143:86740a56073b 58 kStatus_SDHC_SendCommandFailed = MAKE_STATUS(kStatusGroup_SDHC, 2U), /*!< Send command failed */
AnnaBridge 143:86740a56073b 59 kStatus_SDHC_TransferDataFailed = MAKE_STATUS(kStatusGroup_SDHC, 3U), /*!< Transfer data failed */
AnnaBridge 143:86740a56073b 60 kStatus_SDHC_DMADataBufferAddrNotAlign =
AnnaBridge 143:86740a56073b 61 MAKE_STATUS(kStatusGroup_SDHC, 4U), /*!< data buffer addr not align in DMA mode */
AnnaBridge 143:86740a56073b 62 };
AnnaBridge 143:86740a56073b 63
AnnaBridge 143:86740a56073b 64 /*! @brief Host controller capabilities flag mask */
AnnaBridge 143:86740a56073b 65 enum _sdhc_capability_flag
AnnaBridge 143:86740a56073b 66 {
AnnaBridge 143:86740a56073b 67 kSDHC_SupportAdmaFlag = SDHC_HTCAPBLT_ADMAS_MASK, /*!< Support ADMA */
AnnaBridge 143:86740a56073b 68 kSDHC_SupportHighSpeedFlag = SDHC_HTCAPBLT_HSS_MASK, /*!< Support high-speed */
AnnaBridge 143:86740a56073b 69 kSDHC_SupportDmaFlag = SDHC_HTCAPBLT_DMAS_MASK, /*!< Support DMA */
AnnaBridge 143:86740a56073b 70 kSDHC_SupportSuspendResumeFlag = SDHC_HTCAPBLT_SRS_MASK, /*!< Support suspend/resume */
AnnaBridge 143:86740a56073b 71 kSDHC_SupportV330Flag = SDHC_HTCAPBLT_VS33_MASK, /*!< Support voltage 3.3V */
AnnaBridge 143:86740a56073b 72 #if defined FSL_FEATURE_SDHC_HAS_V300_SUPPORT && FSL_FEATURE_SDHC_HAS_V300_SUPPORT
AnnaBridge 143:86740a56073b 73 kSDHC_SupportV300Flag = SDHC_HTCAPBLT_VS30_MASK, /*!< Support voltage 3.0V */
AnnaBridge 143:86740a56073b 74 #endif
AnnaBridge 143:86740a56073b 75 #if defined FSL_FEATURE_SDHC_HAS_V180_SUPPORT && FSL_FEATURE_SDHC_HAS_V180_SUPPORT
AnnaBridge 143:86740a56073b 76 kSDHC_SupportV180Flag = SDHC_HTCAPBLT_VS18_MASK, /*!< Support voltage 1.8V */
AnnaBridge 143:86740a56073b 77 #endif
AnnaBridge 143:86740a56073b 78 /* Put additional two flags in HTCAPBLT_MBL's position. */
AnnaBridge 143:86740a56073b 79 kSDHC_Support4BitFlag = (SDHC_HTCAPBLT_MBL_SHIFT << 0U), /*!< Support 4 bit mode */
AnnaBridge 143:86740a56073b 80 kSDHC_Support8BitFlag = (SDHC_HTCAPBLT_MBL_SHIFT << 1U), /*!< Support 8 bit mode */
AnnaBridge 143:86740a56073b 81 };
AnnaBridge 143:86740a56073b 82
AnnaBridge 143:86740a56073b 83 /*! @brief Wakeup event mask */
AnnaBridge 143:86740a56073b 84 enum _sdhc_wakeup_event
AnnaBridge 143:86740a56073b 85 {
AnnaBridge 143:86740a56073b 86 kSDHC_WakeupEventOnCardInt = SDHC_PROCTL_WECINT_MASK, /*!< Wakeup on card interrupt */
AnnaBridge 143:86740a56073b 87 kSDHC_WakeupEventOnCardInsert = SDHC_PROCTL_WECINS_MASK, /*!< Wakeup on card insertion */
AnnaBridge 143:86740a56073b 88 kSDHC_WakeupEventOnCardRemove = SDHC_PROCTL_WECRM_MASK, /*!< Wakeup on card removal */
AnnaBridge 143:86740a56073b 89
AnnaBridge 143:86740a56073b 90 kSDHC_WakeupEventsAll = (kSDHC_WakeupEventOnCardInt | kSDHC_WakeupEventOnCardInsert |
AnnaBridge 143:86740a56073b 91 kSDHC_WakeupEventOnCardRemove), /*!< All wakeup events */
AnnaBridge 143:86740a56073b 92 };
AnnaBridge 143:86740a56073b 93
AnnaBridge 143:86740a56073b 94 /*! @brief Reset type mask */
AnnaBridge 143:86740a56073b 95 enum _sdhc_reset
AnnaBridge 143:86740a56073b 96 {
AnnaBridge 143:86740a56073b 97 kSDHC_ResetAll = SDHC_SYSCTL_RSTA_MASK, /*!< Reset all except card detection */
AnnaBridge 143:86740a56073b 98 kSDHC_ResetCommand = SDHC_SYSCTL_RSTC_MASK, /*!< Reset command line */
AnnaBridge 143:86740a56073b 99 kSDHC_ResetData = SDHC_SYSCTL_RSTD_MASK, /*!< Reset data line */
AnnaBridge 143:86740a56073b 100
AnnaBridge 143:86740a56073b 101 kSDHC_ResetsAll = (kSDHC_ResetAll | kSDHC_ResetCommand | kSDHC_ResetData), /*!< All reset types */
AnnaBridge 143:86740a56073b 102 };
AnnaBridge 143:86740a56073b 103
AnnaBridge 143:86740a56073b 104 /*! @brief Transfer flag mask */
AnnaBridge 143:86740a56073b 105 enum _sdhc_transfer_flag
AnnaBridge 143:86740a56073b 106 {
AnnaBridge 143:86740a56073b 107 kSDHC_EnableDmaFlag = SDHC_XFERTYP_DMAEN_MASK, /*!< Enable DMA */
AnnaBridge 143:86740a56073b 108
AnnaBridge 143:86740a56073b 109 kSDHC_CommandTypeSuspendFlag = (SDHC_XFERTYP_CMDTYP(1U)), /*!< Suspend command */
AnnaBridge 143:86740a56073b 110 kSDHC_CommandTypeResumeFlag = (SDHC_XFERTYP_CMDTYP(2U)), /*!< Resume command */
AnnaBridge 143:86740a56073b 111 kSDHC_CommandTypeAbortFlag = (SDHC_XFERTYP_CMDTYP(3U)), /*!< Abort command */
AnnaBridge 143:86740a56073b 112
AnnaBridge 143:86740a56073b 113 kSDHC_EnableBlockCountFlag = SDHC_XFERTYP_BCEN_MASK, /*!< Enable block count */
AnnaBridge 143:86740a56073b 114 kSDHC_EnableAutoCommand12Flag = SDHC_XFERTYP_AC12EN_MASK, /*!< Enable auto CMD12 */
AnnaBridge 143:86740a56073b 115 kSDHC_DataReadFlag = SDHC_XFERTYP_DTDSEL_MASK, /*!< Enable data read */
AnnaBridge 143:86740a56073b 116 kSDHC_MultipleBlockFlag = SDHC_XFERTYP_MSBSEL_MASK, /*!< Multiple block data read/write */
AnnaBridge 143:86740a56073b 117
AnnaBridge 143:86740a56073b 118 kSDHC_ResponseLength136Flag = SDHC_XFERTYP_RSPTYP(1U), /*!< 136 bit response length */
AnnaBridge 143:86740a56073b 119 kSDHC_ResponseLength48Flag = SDHC_XFERTYP_RSPTYP(2U), /*!< 48 bit response length */
AnnaBridge 143:86740a56073b 120 kSDHC_ResponseLength48BusyFlag = SDHC_XFERTYP_RSPTYP(3U), /*!< 48 bit response length with busy status */
AnnaBridge 143:86740a56073b 121
AnnaBridge 143:86740a56073b 122 kSDHC_EnableCrcCheckFlag = SDHC_XFERTYP_CCCEN_MASK, /*!< Enable CRC check */
AnnaBridge 143:86740a56073b 123 kSDHC_EnableIndexCheckFlag = SDHC_XFERTYP_CICEN_MASK, /*!< Enable index check */
AnnaBridge 143:86740a56073b 124 kSDHC_DataPresentFlag = SDHC_XFERTYP_DPSEL_MASK, /*!< Data present flag */
AnnaBridge 143:86740a56073b 125 };
AnnaBridge 143:86740a56073b 126
AnnaBridge 143:86740a56073b 127 /*! @brief Present status flag mask */
AnnaBridge 143:86740a56073b 128 enum _sdhc_present_status_flag
AnnaBridge 143:86740a56073b 129 {
AnnaBridge 143:86740a56073b 130 kSDHC_CommandInhibitFlag = SDHC_PRSSTAT_CIHB_MASK, /*!< Command inhibit */
AnnaBridge 143:86740a56073b 131 kSDHC_DataInhibitFlag = SDHC_PRSSTAT_CDIHB_MASK, /*!< Data inhibit */
AnnaBridge 143:86740a56073b 132 kSDHC_DataLineActiveFlag = SDHC_PRSSTAT_DLA_MASK, /*!< Data line active */
AnnaBridge 143:86740a56073b 133 kSDHC_SdClockStableFlag = SDHC_PRSSTAT_SDSTB_MASK, /*!< SD bus clock stable */
AnnaBridge 143:86740a56073b 134 kSDHC_WriteTransferActiveFlag = SDHC_PRSSTAT_WTA_MASK, /*!< Write transfer active */
AnnaBridge 143:86740a56073b 135 kSDHC_ReadTransferActiveFlag = SDHC_PRSSTAT_RTA_MASK, /*!< Read transfer active */
AnnaBridge 143:86740a56073b 136 kSDHC_BufferWriteEnableFlag = SDHC_PRSSTAT_BWEN_MASK, /*!< Buffer write enable */
AnnaBridge 143:86740a56073b 137 kSDHC_BufferReadEnableFlag = SDHC_PRSSTAT_BREN_MASK, /*!< Buffer read enable */
AnnaBridge 143:86740a56073b 138 kSDHC_CardInsertedFlag = SDHC_PRSSTAT_CINS_MASK, /*!< Card inserted */
AnnaBridge 143:86740a56073b 139 kSDHC_CommandLineLevelFlag = SDHC_PRSSTAT_CLSL_MASK, /*!< Command line signal level */
AnnaBridge 143:86740a56073b 140 kSDHC_Data0LineLevelFlag = (1U << 24U), /*!< Data0 line signal level */
AnnaBridge 143:86740a56073b 141 kSDHC_Data1LineLevelFlag = (1U << 25U), /*!< Data1 line signal level */
AnnaBridge 143:86740a56073b 142 kSDHC_Data2LineLevelFlag = (1U << 26U), /*!< Data2 line signal level */
AnnaBridge 143:86740a56073b 143 kSDHC_Data3LineLevelFlag = (1U << 27U), /*!< Data3 line signal level */
AnnaBridge 143:86740a56073b 144 kSDHC_Data4LineLevelFlag = (1U << 28U), /*!< Data4 line signal level */
AnnaBridge 143:86740a56073b 145 kSDHC_Data5LineLevelFlag = (1U << 29U), /*!< Data5 line signal level */
AnnaBridge 143:86740a56073b 146 kSDHC_Data6LineLevelFlag = (1U << 30U), /*!< Data6 line signal level */
AnnaBridge 143:86740a56073b 147 kSDHC_Data7LineLevelFlag = (1U << 31U), /*!< Data7 line signal level */
AnnaBridge 143:86740a56073b 148 };
AnnaBridge 143:86740a56073b 149
AnnaBridge 143:86740a56073b 150 /*! @brief Interrupt status flag mask */
AnnaBridge 143:86740a56073b 151 enum _sdhc_interrupt_status_flag
AnnaBridge 143:86740a56073b 152 {
AnnaBridge 143:86740a56073b 153 kSDHC_CommandCompleteFlag = SDHC_IRQSTAT_CC_MASK, /*!< Command complete */
AnnaBridge 143:86740a56073b 154 kSDHC_DataCompleteFlag = SDHC_IRQSTAT_TC_MASK, /*!< Data complete */
AnnaBridge 143:86740a56073b 155 kSDHC_BlockGapEventFlag = SDHC_IRQSTAT_BGE_MASK, /*!< Block gap event */
AnnaBridge 143:86740a56073b 156 kSDHC_DmaCompleteFlag = SDHC_IRQSTAT_DINT_MASK, /*!< DMA interrupt */
AnnaBridge 143:86740a56073b 157 kSDHC_BufferWriteReadyFlag = SDHC_IRQSTAT_BWR_MASK, /*!< Buffer write ready */
AnnaBridge 143:86740a56073b 158 kSDHC_BufferReadReadyFlag = SDHC_IRQSTAT_BRR_MASK, /*!< Buffer read ready */
AnnaBridge 143:86740a56073b 159 kSDHC_CardInsertionFlag = SDHC_IRQSTAT_CINS_MASK, /*!< Card inserted */
AnnaBridge 143:86740a56073b 160 kSDHC_CardRemovalFlag = SDHC_IRQSTAT_CRM_MASK, /*!< Card removed */
AnnaBridge 143:86740a56073b 161 kSDHC_CardInterruptFlag = SDHC_IRQSTAT_CINT_MASK, /*!< Card interrupt */
AnnaBridge 143:86740a56073b 162 kSDHC_CommandTimeoutFlag = SDHC_IRQSTAT_CTOE_MASK, /*!< Command timeout error */
AnnaBridge 143:86740a56073b 163 kSDHC_CommandCrcErrorFlag = SDHC_IRQSTAT_CCE_MASK, /*!< Command CRC error */
AnnaBridge 143:86740a56073b 164 kSDHC_CommandEndBitErrorFlag = SDHC_IRQSTAT_CEBE_MASK, /*!< Command end bit error */
AnnaBridge 143:86740a56073b 165 kSDHC_CommandIndexErrorFlag = SDHC_IRQSTAT_CIE_MASK, /*!< Command index error */
AnnaBridge 143:86740a56073b 166 kSDHC_DataTimeoutFlag = SDHC_IRQSTAT_DTOE_MASK, /*!< Data timeout error */
AnnaBridge 143:86740a56073b 167 kSDHC_DataCrcErrorFlag = SDHC_IRQSTAT_DCE_MASK, /*!< Data CRC error */
AnnaBridge 143:86740a56073b 168 kSDHC_DataEndBitErrorFlag = SDHC_IRQSTAT_DEBE_MASK, /*!< Data end bit error */
AnnaBridge 143:86740a56073b 169 kSDHC_AutoCommand12ErrorFlag = SDHC_IRQSTAT_AC12E_MASK, /*!< Auto CMD12 error */
AnnaBridge 143:86740a56073b 170 kSDHC_DmaErrorFlag = SDHC_IRQSTAT_DMAE_MASK, /*!< DMA error */
AnnaBridge 143:86740a56073b 171
AnnaBridge 143:86740a56073b 172 kSDHC_CommandErrorFlag = (kSDHC_CommandTimeoutFlag | kSDHC_CommandCrcErrorFlag | kSDHC_CommandEndBitErrorFlag |
AnnaBridge 143:86740a56073b 173 kSDHC_CommandIndexErrorFlag), /*!< Command error */
AnnaBridge 143:86740a56073b 174 kSDHC_DataErrorFlag = (kSDHC_DataTimeoutFlag | kSDHC_DataCrcErrorFlag | kSDHC_DataEndBitErrorFlag |
AnnaBridge 143:86740a56073b 175 kSDHC_AutoCommand12ErrorFlag), /*!< Data error */
AnnaBridge 143:86740a56073b 176 kSDHC_ErrorFlag = (kSDHC_CommandErrorFlag | kSDHC_DataErrorFlag | kSDHC_DmaErrorFlag), /*!< All error */
AnnaBridge 143:86740a56073b 177 kSDHC_DataFlag = (kSDHC_DataCompleteFlag | kSDHC_DmaCompleteFlag | kSDHC_BufferWriteReadyFlag |
AnnaBridge 143:86740a56073b 178 kSDHC_BufferReadReadyFlag | kSDHC_DataErrorFlag | kSDHC_DmaErrorFlag), /*!< Data interrupts */
AnnaBridge 143:86740a56073b 179 kSDHC_CommandFlag = (kSDHC_CommandErrorFlag | kSDHC_CommandCompleteFlag), /*!< Command interrupts */
AnnaBridge 143:86740a56073b 180 kSDHC_CardDetectFlag = (kSDHC_CardInsertionFlag | kSDHC_CardRemovalFlag), /*!< Card detection interrupts */
AnnaBridge 143:86740a56073b 181
AnnaBridge 143:86740a56073b 182 kSDHC_AllInterruptFlags = (kSDHC_BlockGapEventFlag | kSDHC_CardInterruptFlag | kSDHC_CommandFlag | kSDHC_DataFlag |
AnnaBridge 143:86740a56073b 183 kSDHC_ErrorFlag), /*!< All flags mask */
AnnaBridge 143:86740a56073b 184 };
AnnaBridge 143:86740a56073b 185
AnnaBridge 143:86740a56073b 186 /*! @brief Auto CMD12 error status flag mask */
AnnaBridge 143:86740a56073b 187 enum _sdhc_auto_command12_error_status_flag
AnnaBridge 143:86740a56073b 188 {
AnnaBridge 143:86740a56073b 189 kSDHC_AutoCommand12NotExecutedFlag = SDHC_AC12ERR_AC12NE_MASK, /*!< Not executed error */
AnnaBridge 143:86740a56073b 190 kSDHC_AutoCommand12TimeoutFlag = SDHC_AC12ERR_AC12TOE_MASK, /*!< Timeout error */
AnnaBridge 143:86740a56073b 191 kSDHC_AutoCommand12EndBitErrorFlag = SDHC_AC12ERR_AC12EBE_MASK, /*!< End bit error */
AnnaBridge 143:86740a56073b 192 kSDHC_AutoCommand12CrcErrorFlag = SDHC_AC12ERR_AC12CE_MASK, /*!< CRC error */
AnnaBridge 143:86740a56073b 193 kSDHC_AutoCommand12IndexErrorFlag = SDHC_AC12ERR_AC12IE_MASK, /*!< Index error */
AnnaBridge 143:86740a56073b 194 kSDHC_AutoCommand12NotIssuedFlag = SDHC_AC12ERR_CNIBAC12E_MASK, /*!< Not issued error */
AnnaBridge 143:86740a56073b 195 };
AnnaBridge 143:86740a56073b 196
AnnaBridge 143:86740a56073b 197 /*! @brief ADMA error status flag mask */
AnnaBridge 143:86740a56073b 198 enum _sdhc_adma_error_status_flag
AnnaBridge 143:86740a56073b 199 {
AnnaBridge 143:86740a56073b 200 kSDHC_AdmaLenghMismatchFlag = SDHC_ADMAES_ADMALME_MASK, /*!< Length mismatch error */
AnnaBridge 143:86740a56073b 201 kSDHC_AdmaDescriptorErrorFlag = SDHC_ADMAES_ADMADCE_MASK, /*!< Descriptor error */
AnnaBridge 143:86740a56073b 202 };
AnnaBridge 143:86740a56073b 203
AnnaBridge 143:86740a56073b 204 /*!
AnnaBridge 143:86740a56073b 205 * @brief ADMA error state
AnnaBridge 143:86740a56073b 206 *
AnnaBridge 143:86740a56073b 207 * This state is the detail state when ADMA error has occurred.
AnnaBridge 143:86740a56073b 208 */
AnnaBridge 143:86740a56073b 209 typedef enum _sdhc_adma_error_state
AnnaBridge 143:86740a56073b 210 {
AnnaBridge 143:86740a56073b 211 kSDHC_AdmaErrorStateStopDma = 0x00U, /*!< Stop DMA */
AnnaBridge 143:86740a56073b 212 kSDHC_AdmaErrorStateFetchDescriptor = 0x01U, /*!< Fetch descriptor */
AnnaBridge 143:86740a56073b 213 kSDHC_AdmaErrorStateChangeAddress = 0x02U, /*!< Change address */
AnnaBridge 143:86740a56073b 214 kSDHC_AdmaErrorStateTransferData = 0x03U, /*!< Transfer data */
AnnaBridge 143:86740a56073b 215 } sdhc_adma_error_state_t;
AnnaBridge 143:86740a56073b 216
AnnaBridge 143:86740a56073b 217 /*! @brief Force event mask */
AnnaBridge 143:86740a56073b 218 enum _sdhc_force_event
AnnaBridge 143:86740a56073b 219 {
AnnaBridge 143:86740a56073b 220 kSDHC_ForceEventAutoCommand12NotExecuted = SDHC_FEVT_AC12NE_MASK, /*!< Auto CMD12 not executed error */
AnnaBridge 143:86740a56073b 221 kSDHC_ForceEventAutoCommand12Timeout = SDHC_FEVT_AC12TOE_MASK, /*!< Auto CMD12 timeout error */
AnnaBridge 143:86740a56073b 222 kSDHC_ForceEventAutoCommand12CrcError = SDHC_FEVT_AC12CE_MASK, /*!< Auto CMD12 CRC error */
AnnaBridge 143:86740a56073b 223 kSDHC_ForceEventEndBitError = SDHC_FEVT_AC12EBE_MASK, /*!< Auto CMD12 end bit error */
AnnaBridge 143:86740a56073b 224 kSDHC_ForceEventAutoCommand12IndexError = SDHC_FEVT_AC12IE_MASK, /*!< Auto CMD12 index error */
AnnaBridge 143:86740a56073b 225 kSDHC_ForceEventAutoCommand12NotIssued = SDHC_FEVT_CNIBAC12E_MASK, /*!< Auto CMD12 not issued error */
AnnaBridge 143:86740a56073b 226 kSDHC_ForceEventCommandTimeout = SDHC_FEVT_CTOE_MASK, /*!< Command timeout error */
AnnaBridge 143:86740a56073b 227 kSDHC_ForceEventCommandCrcError = SDHC_FEVT_CCE_MASK, /*!< Command CRC error */
AnnaBridge 143:86740a56073b 228 kSDHC_ForceEventCommandEndBitError = SDHC_FEVT_CEBE_MASK, /*!< Command end bit error */
AnnaBridge 143:86740a56073b 229 kSDHC_ForceEventCommandIndexError = SDHC_FEVT_CIE_MASK, /*!< Command index error */
AnnaBridge 143:86740a56073b 230 kSDHC_ForceEventDataTimeout = SDHC_FEVT_DTOE_MASK, /*!< Data timeout error */
AnnaBridge 143:86740a56073b 231 kSDHC_ForceEventDataCrcError = SDHC_FEVT_DCE_MASK, /*!< Data CRC error */
AnnaBridge 143:86740a56073b 232 kSDHC_ForceEventDataEndBitError = SDHC_FEVT_DEBE_MASK, /*!< Data end bit error */
AnnaBridge 143:86740a56073b 233 kSDHC_ForceEventAutoCommand12Error = SDHC_FEVT_AC12E_MASK, /*!< Auto CMD12 error */
AnnaBridge 143:86740a56073b 234 kSDHC_ForceEventCardInt = SDHC_FEVT_CINT_MASK, /*!< Card interrupt */
AnnaBridge 143:86740a56073b 235 kSDHC_ForceEventDmaError = SDHC_FEVT_DMAE_MASK, /*!< Dma error */
AnnaBridge 143:86740a56073b 236
AnnaBridge 143:86740a56073b 237 kSDHC_ForceEventsAll =
AnnaBridge 143:86740a56073b 238 (kSDHC_ForceEventAutoCommand12NotExecuted | kSDHC_ForceEventAutoCommand12Timeout |
AnnaBridge 143:86740a56073b 239 kSDHC_ForceEventAutoCommand12CrcError | kSDHC_ForceEventEndBitError | kSDHC_ForceEventAutoCommand12IndexError |
AnnaBridge 143:86740a56073b 240 kSDHC_ForceEventAutoCommand12NotIssued | kSDHC_ForceEventCommandTimeout | kSDHC_ForceEventCommandCrcError |
AnnaBridge 143:86740a56073b 241 kSDHC_ForceEventCommandEndBitError | kSDHC_ForceEventCommandIndexError | kSDHC_ForceEventDataTimeout |
AnnaBridge 143:86740a56073b 242 kSDHC_ForceEventDataCrcError | kSDHC_ForceEventDataEndBitError | kSDHC_ForceEventAutoCommand12Error |
AnnaBridge 143:86740a56073b 243 kSDHC_ForceEventCardInt | kSDHC_ForceEventDmaError), /*!< All force event flags mask */
AnnaBridge 143:86740a56073b 244 };
AnnaBridge 143:86740a56073b 245
AnnaBridge 143:86740a56073b 246 /*! @brief Data transfer width */
AnnaBridge 143:86740a56073b 247 typedef enum _sdhc_data_bus_width
AnnaBridge 143:86740a56073b 248 {
AnnaBridge 143:86740a56073b 249 kSDHC_DataBusWidth1Bit = 0U, /*!< 1-bit mode */
AnnaBridge 143:86740a56073b 250 kSDHC_DataBusWidth4Bit = 1U, /*!< 4-bit mode */
AnnaBridge 143:86740a56073b 251 kSDHC_DataBusWidth8Bit = 2U, /*!< 8-bit mode */
AnnaBridge 143:86740a56073b 252 } sdhc_data_bus_width_t;
AnnaBridge 143:86740a56073b 253
AnnaBridge 143:86740a56073b 254 /*! @brief Endian mode */
AnnaBridge 143:86740a56073b 255 typedef enum _sdhc_endian_mode
AnnaBridge 143:86740a56073b 256 {
AnnaBridge 143:86740a56073b 257 kSDHC_EndianModeBig = 0U, /*!< Big endian mode */
AnnaBridge 143:86740a56073b 258 kSDHC_EndianModeHalfWordBig = 1U, /*!< Half word big endian mode */
AnnaBridge 143:86740a56073b 259 kSDHC_EndianModeLittle = 2U, /*!< Little endian mode */
AnnaBridge 143:86740a56073b 260 } sdhc_endian_mode_t;
AnnaBridge 143:86740a56073b 261
AnnaBridge 143:86740a56073b 262 /*! @brief DMA mode */
AnnaBridge 143:86740a56073b 263 typedef enum _sdhc_dma_mode
AnnaBridge 143:86740a56073b 264 {
AnnaBridge 143:86740a56073b 265 kSDHC_DmaModeNo = 0U, /*!< No DMA */
AnnaBridge 143:86740a56073b 266 kSDHC_DmaModeAdma1 = 1U, /*!< ADMA1 is selected */
AnnaBridge 143:86740a56073b 267 kSDHC_DmaModeAdma2 = 2U, /*!< ADMA2 is selected */
AnnaBridge 143:86740a56073b 268 } sdhc_dma_mode_t;
AnnaBridge 143:86740a56073b 269
AnnaBridge 143:86740a56073b 270 /*! @brief SDIO control flag mask */
AnnaBridge 143:86740a56073b 271 enum _sdhc_sdio_control_flag
AnnaBridge 143:86740a56073b 272 {
AnnaBridge 143:86740a56073b 273 kSDHC_StopAtBlockGapFlag = 0x01, /*!< Stop at block gap */
AnnaBridge 143:86740a56073b 274 kSDHC_ReadWaitControlFlag = 0x02, /*!< Read wait control */
AnnaBridge 143:86740a56073b 275 kSDHC_InterruptAtBlockGapFlag = 0x04, /*!< Interrupt at block gap */
AnnaBridge 143:86740a56073b 276 kSDHC_ExactBlockNumberReadFlag = 0x08, /*!< Exact block number read */
AnnaBridge 143:86740a56073b 277 };
AnnaBridge 143:86740a56073b 278
AnnaBridge 143:86740a56073b 279 /*! @brief MMC card boot mode */
AnnaBridge 143:86740a56073b 280 typedef enum _sdhc_boot_mode
AnnaBridge 143:86740a56073b 281 {
AnnaBridge 143:86740a56073b 282 kSDHC_BootModeNormal = 0U, /*!< Normal boot */
AnnaBridge 143:86740a56073b 283 kSDHC_BootModeAlternative = 1U, /*!< Alternative boot */
AnnaBridge 143:86740a56073b 284 } sdhc_boot_mode_t;
AnnaBridge 143:86740a56073b 285
AnnaBridge 143:86740a56073b 286 /*! @brief The command type */
AnnaBridge 143:86740a56073b 287 typedef enum _sdhc_card_command_type
AnnaBridge 143:86740a56073b 288 {
AnnaBridge 143:86740a56073b 289 kCARD_CommandTypeNormal = 0U, /*!< Normal command */
AnnaBridge 143:86740a56073b 290 kCARD_CommandTypeSuspend = 1U, /*!< Suspend command */
AnnaBridge 143:86740a56073b 291 kCARD_CommandTypeResume = 2U, /*!< Resume command */
AnnaBridge 143:86740a56073b 292 kCARD_CommandTypeAbort = 3U, /*!< Abort command */
AnnaBridge 143:86740a56073b 293 } sdhc_card_command_type_t;
AnnaBridge 143:86740a56073b 294
AnnaBridge 143:86740a56073b 295 /*!
AnnaBridge 143:86740a56073b 296 * @brief The command response type.
AnnaBridge 143:86740a56073b 297 *
AnnaBridge 143:86740a56073b 298 * Define the command response type from card to host controller.
AnnaBridge 143:86740a56073b 299 */
AnnaBridge 143:86740a56073b 300 typedef enum _sdhc_card_response_type
AnnaBridge 143:86740a56073b 301 {
AnnaBridge 143:86740a56073b 302 kCARD_ResponseTypeNone = 0U, /*!< Response type: none */
AnnaBridge 143:86740a56073b 303 kCARD_ResponseTypeR1 = 1U, /*!< Response type: R1 */
AnnaBridge 143:86740a56073b 304 kCARD_ResponseTypeR1b = 2U, /*!< Response type: R1b */
AnnaBridge 143:86740a56073b 305 kCARD_ResponseTypeR2 = 3U, /*!< Response type: R2 */
AnnaBridge 143:86740a56073b 306 kCARD_ResponseTypeR3 = 4U, /*!< Response type: R3 */
AnnaBridge 143:86740a56073b 307 kCARD_ResponseTypeR4 = 5U, /*!< Response type: R4 */
AnnaBridge 143:86740a56073b 308 kCARD_ResponseTypeR5 = 6U, /*!< Response type: R5 */
AnnaBridge 143:86740a56073b 309 kCARD_ResponseTypeR5b = 7U, /*!< Response type: R5b */
AnnaBridge 143:86740a56073b 310 kCARD_ResponseTypeR6 = 8U, /*!< Response type: R6 */
AnnaBridge 143:86740a56073b 311 kCARD_ResponseTypeR7 = 9U, /*!< Response type: R7 */
AnnaBridge 143:86740a56073b 312 } sdhc_card_response_type_t;
AnnaBridge 143:86740a56073b 313
AnnaBridge 143:86740a56073b 314 /*! @brief The alignment size for ADDRESS filed in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 315 #define SDHC_ADMA1_ADDRESS_ALIGN (4096U)
AnnaBridge 143:86740a56073b 316 /*! @brief The alignment size for LENGTH field in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 317 #define SDHC_ADMA1_LENGTH_ALIGN (4096U)
AnnaBridge 143:86740a56073b 318 /*! @brief The alignment size for ADDRESS field in ADMA2's descriptor */
AnnaBridge 143:86740a56073b 319 #define SDHC_ADMA2_ADDRESS_ALIGN (4U)
AnnaBridge 143:86740a56073b 320 /*! @brief The alignment size for LENGTH filed in ADMA2's descriptor */
AnnaBridge 143:86740a56073b 321 #define SDHC_ADMA2_LENGTH_ALIGN (4U)
AnnaBridge 143:86740a56073b 322
AnnaBridge 143:86740a56073b 323 /* ADMA1 descriptor table
AnnaBridge 143:86740a56073b 324 * |------------------------|---------|--------------------------|
AnnaBridge 143:86740a56073b 325 * | Address/page field |Reserved | Attribute |
AnnaBridge 143:86740a56073b 326 * |------------------------|---------|--------------------------|
AnnaBridge 143:86740a56073b 327 * |31 12|11 6|05 |04 |03|02 |01 |00 |
AnnaBridge 143:86740a56073b 328 * |------------------------|---------|----|----|--|---|---|-----|
AnnaBridge 143:86740a56073b 329 * | address or data length | 000000 |Act2|Act1| 0|Int|End|Valid|
AnnaBridge 143:86740a56073b 330 * |------------------------|---------|----|----|--|---|---|-----|
AnnaBridge 143:86740a56073b 331 *
AnnaBridge 143:86740a56073b 332 *
AnnaBridge 143:86740a56073b 333 * |------|------|-----------------|-------|-------------|
AnnaBridge 143:86740a56073b 334 * | Act2 | Act1 | Comment | 31-28 | 27 - 12 |
AnnaBridge 143:86740a56073b 335 * |------|------|-----------------|---------------------|
AnnaBridge 143:86740a56073b 336 * | 0 | 0 | No op | Don't care |
AnnaBridge 143:86740a56073b 337 * |------|------|-----------------|-------|-------------|
AnnaBridge 143:86740a56073b 338 * | 0 | 1 | Set data length | 0000 | Data Length |
AnnaBridge 143:86740a56073b 339 * |------|------|-----------------|-------|-------------|
AnnaBridge 143:86740a56073b 340 * | 1 | 0 | Transfer data | Data address |
AnnaBridge 143:86740a56073b 341 * |------|------|-----------------|---------------------|
AnnaBridge 143:86740a56073b 342 * | 1 | 1 | Link descriptor | Descriptor address |
AnnaBridge 143:86740a56073b 343 * |------|------|-----------------|---------------------|
AnnaBridge 143:86740a56073b 344 */
AnnaBridge 143:86740a56073b 345 /*! @brief The bit shift for ADDRESS filed in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 346 #define SDHC_ADMA1_DESCRIPTOR_ADDRESS_SHIFT (12U)
AnnaBridge 143:86740a56073b 347 /*! @brief The bit mask for ADDRESS field in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 348 #define SDHC_ADMA1_DESCRIPTOR_ADDRESS_MASK (0xFFFFFU)
AnnaBridge 143:86740a56073b 349 /*! @brief The bit shift for LENGTH filed in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 350 #define SDHC_ADMA1_DESCRIPTOR_LENGTH_SHIFT (12U)
AnnaBridge 143:86740a56073b 351 /*! @brief The mask for LENGTH field in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 352 #define SDHC_ADMA1_DESCRIPTOR_LENGTH_MASK (0xFFFFU)
AnnaBridge 143:86740a56073b 353 /*! @brief The maximum value of LENGTH filed in ADMA1's descriptor */
AnnaBridge 143:86740a56073b 354 #define SDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY (SDHC_ADMA1_DESCRIPTOR_LENGTH_MASK + 1U)
AnnaBridge 143:86740a56073b 355
AnnaBridge 143:86740a56073b 356 /*! @brief The mask for the control/status field in ADMA1 descriptor */
AnnaBridge 143:86740a56073b 357 enum _sdhc_adma1_descriptor_flag
AnnaBridge 143:86740a56073b 358 {
AnnaBridge 143:86740a56073b 359 kSDHC_Adma1DescriptorValidFlag = (1U << 0U), /*!< Valid flag */
AnnaBridge 143:86740a56073b 360 kSDHC_Adma1DescriptorEndFlag = (1U << 1U), /*!< End flag */
AnnaBridge 143:86740a56073b 361 kSDHC_Adma1DescriptorInterrupFlag = (1U << 2U), /*!< Interrupt flag */
AnnaBridge 143:86740a56073b 362 kSDHC_Adma1DescriptorActivity1Flag = (1U << 4U), /*!< Activity 1 flag */
AnnaBridge 143:86740a56073b 363 kSDHC_Adma1DescriptorActivity2Flag = (1U << 5U), /*!< Activity 2 flag */
AnnaBridge 143:86740a56073b 364 kSDHC_Adma1DescriptorTypeNop = (kSDHC_Adma1DescriptorValidFlag), /*!< No operation */
AnnaBridge 143:86740a56073b 365 kSDHC_Adma1DescriptorTypeTransfer =
AnnaBridge 143:86740a56073b 366 (kSDHC_Adma1DescriptorActivity2Flag | kSDHC_Adma1DescriptorValidFlag), /*!< Transfer data */
AnnaBridge 143:86740a56073b 367 kSDHC_Adma1DescriptorTypeLink = (kSDHC_Adma1DescriptorActivity1Flag | kSDHC_Adma1DescriptorActivity2Flag |
AnnaBridge 143:86740a56073b 368 kSDHC_Adma1DescriptorValidFlag), /*!< Link descriptor */
AnnaBridge 143:86740a56073b 369 kSDHC_Adma1DescriptorTypeSetLength =
AnnaBridge 143:86740a56073b 370 (kSDHC_Adma1DescriptorActivity1Flag | kSDHC_Adma1DescriptorValidFlag), /*!< Set data length */
AnnaBridge 143:86740a56073b 371 };
AnnaBridge 143:86740a56073b 372
AnnaBridge 143:86740a56073b 373 /* ADMA2 descriptor table
AnnaBridge 143:86740a56073b 374 * |----------------|---------------|-------------|--------------------------|
AnnaBridge 143:86740a56073b 375 * | Address field | Length | Reserved | Attribute |
AnnaBridge 143:86740a56073b 376 * |----------------|---------------|-------------|--------------------------|
AnnaBridge 143:86740a56073b 377 * |63 32|31 16|15 06|05 |04 |03|02 |01 |00 |
AnnaBridge 143:86740a56073b 378 * |----------------|---------------|-------------|----|----|--|---|---|-----|
AnnaBridge 143:86740a56073b 379 * | 32-bit address | 16-bit length | 0000000000 |Act2|Act1| 0|Int|End|Valid|
AnnaBridge 143:86740a56073b 380 * |----------------|---------------|-------------|----|----|--|---|---|-----|
AnnaBridge 143:86740a56073b 381 *
AnnaBridge 143:86740a56073b 382 *
AnnaBridge 143:86740a56073b 383 * | Act2 | Act1 | Comment | Operation |
AnnaBridge 143:86740a56073b 384 * |------|------|-----------------|-------------------------------------------------------------------|
AnnaBridge 143:86740a56073b 385 * | 0 | 0 | No op | Don't care |
AnnaBridge 143:86740a56073b 386 * |------|------|-----------------|-------------------------------------------------------------------|
AnnaBridge 143:86740a56073b 387 * | 0 | 1 | Reserved | Read this line and go to next one |
AnnaBridge 143:86740a56073b 388 * |------|------|-----------------|-------------------------------------------------------------------|
AnnaBridge 143:86740a56073b 389 * | 1 | 0 | Transfer data | Transfer data with address and length set in this descriptor line |
AnnaBridge 143:86740a56073b 390 * |------|------|-----------------|-------------------------------------------------------------------|
AnnaBridge 143:86740a56073b 391 * | 1 | 1 | Link descriptor | Link to another descriptor |
AnnaBridge 143:86740a56073b 392 * |------|------|-----------------|-------------------------------------------------------------------|
AnnaBridge 143:86740a56073b 393 */
AnnaBridge 143:86740a56073b 394 /*! @brief The bit shift for LENGTH field in ADMA2's descriptor */
AnnaBridge 143:86740a56073b 395 #define SDHC_ADMA2_DESCRIPTOR_LENGTH_SHIFT (16U)
AnnaBridge 143:86740a56073b 396 /*! @brief The bit mask for LENGTH field in ADMA2's descriptor */
AnnaBridge 143:86740a56073b 397 #define SDHC_ADMA2_DESCRIPTOR_LENGTH_MASK (0xFFFFU)
AnnaBridge 143:86740a56073b 398 /*! @brief The maximum value of LENGTH field in ADMA2's descriptor */
AnnaBridge 143:86740a56073b 399 #define SDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY (SDHC_ADMA2_DESCRIPTOR_LENGTH_MASK)
AnnaBridge 143:86740a56073b 400
AnnaBridge 143:86740a56073b 401 /*! @brief ADMA1 descriptor control and status mask */
AnnaBridge 143:86740a56073b 402 enum _sdhc_adma2_descriptor_flag
AnnaBridge 143:86740a56073b 403 {
AnnaBridge 143:86740a56073b 404 kSDHC_Adma2DescriptorValidFlag = (1U << 0U), /*!< Valid flag */
AnnaBridge 143:86740a56073b 405 kSDHC_Adma2DescriptorEndFlag = (1U << 1U), /*!< End flag */
AnnaBridge 143:86740a56073b 406 kSDHC_Adma2DescriptorInterruptFlag = (1U << 2U), /*!< Interrupt flag */
AnnaBridge 143:86740a56073b 407 kSDHC_Adma2DescriptorActivity1Flag = (1U << 4U), /*!< Activity 1 mask */
AnnaBridge 143:86740a56073b 408 kSDHC_Adma2DescriptorActivity2Flag = (1U << 5U), /*!< Activity 2 mask */
AnnaBridge 143:86740a56073b 409
AnnaBridge 143:86740a56073b 410 kSDHC_Adma2DescriptorTypeNop = (kSDHC_Adma2DescriptorValidFlag), /*!< No operation */
AnnaBridge 143:86740a56073b 411 kSDHC_Adma2DescriptorTypeReserved =
AnnaBridge 143:86740a56073b 412 (kSDHC_Adma2DescriptorActivity1Flag | kSDHC_Adma2DescriptorValidFlag), /*!< Reserved */
AnnaBridge 143:86740a56073b 413 kSDHC_Adma2DescriptorTypeTransfer =
AnnaBridge 143:86740a56073b 414 (kSDHC_Adma2DescriptorActivity2Flag | kSDHC_Adma2DescriptorValidFlag), /*!< Transfer type */
AnnaBridge 143:86740a56073b 415 kSDHC_Adma2DescriptorTypeLink = (kSDHC_Adma2DescriptorActivity1Flag | kSDHC_Adma2DescriptorActivity2Flag |
AnnaBridge 143:86740a56073b 416 kSDHC_Adma2DescriptorValidFlag), /*!< Link type */
AnnaBridge 143:86740a56073b 417 };
AnnaBridge 143:86740a56073b 418
AnnaBridge 143:86740a56073b 419 /*! @brief Defines the adma1 descriptor structure. */
AnnaBridge 143:86740a56073b 420 typedef uint32_t sdhc_adma1_descriptor_t;
AnnaBridge 143:86740a56073b 421
AnnaBridge 143:86740a56073b 422 /*! @brief Defines the ADMA2 descriptor structure. */
AnnaBridge 143:86740a56073b 423 typedef struct _sdhc_adma2_descriptor
AnnaBridge 143:86740a56073b 424 {
AnnaBridge 143:86740a56073b 425 uint32_t attribute; /*!< The control and status field */
AnnaBridge 143:86740a56073b 426 const uint32_t *address; /*!< The address field */
AnnaBridge 143:86740a56073b 427 } sdhc_adma2_descriptor_t;
AnnaBridge 143:86740a56073b 428
AnnaBridge 143:86740a56073b 429 /*!
AnnaBridge 143:86740a56073b 430 * @brief SDHC capability information.
AnnaBridge 143:86740a56073b 431 *
AnnaBridge 143:86740a56073b 432 * Defines a structure to save the capability information of SDHC.
AnnaBridge 143:86740a56073b 433 */
AnnaBridge 143:86740a56073b 434 typedef struct _sdhc_capability
AnnaBridge 143:86740a56073b 435 {
AnnaBridge 143:86740a56073b 436 uint32_t specVersion; /*!< Specification version */
AnnaBridge 143:86740a56073b 437 uint32_t vendorVersion; /*!< Vendor version */
AnnaBridge 143:86740a56073b 438 uint32_t maxBlockLength; /*!< Maximum block length united as byte */
AnnaBridge 143:86740a56073b 439 uint32_t maxBlockCount; /*!< Maximum block count can be set one time */
AnnaBridge 143:86740a56073b 440 uint32_t flags; /*!< Capability flags to indicate the support information(_sdhc_capability_flag) */
AnnaBridge 143:86740a56073b 441 } sdhc_capability_t;
AnnaBridge 143:86740a56073b 442
AnnaBridge 143:86740a56073b 443 /*! @brief Card transfer configuration.
AnnaBridge 143:86740a56073b 444 *
AnnaBridge 143:86740a56073b 445 * Define structure to configure the transfer-related command index/argument/flags and data block
AnnaBridge 143:86740a56073b 446 * size/data block numbers. This structure needs to be filled each time a command is sent to the card.
AnnaBridge 143:86740a56073b 447 */
AnnaBridge 143:86740a56073b 448 typedef struct _sdhc_transfer_config
AnnaBridge 143:86740a56073b 449 {
AnnaBridge 143:86740a56073b 450 size_t dataBlockSize; /*!< Data block size */
AnnaBridge 143:86740a56073b 451 uint32_t dataBlockCount; /*!< Data block count */
AnnaBridge 143:86740a56073b 452 uint32_t commandArgument; /*!< Command argument */
AnnaBridge 143:86740a56073b 453 uint32_t commandIndex; /*!< Command index */
AnnaBridge 143:86740a56073b 454 uint32_t flags; /*!< Transfer flags(_sdhc_transfer_flag) */
AnnaBridge 143:86740a56073b 455 } sdhc_transfer_config_t;
AnnaBridge 143:86740a56073b 456
AnnaBridge 143:86740a56073b 457 /*! @brief Data structure to configure the MMC boot feature */
AnnaBridge 143:86740a56073b 458 typedef struct _sdhc_boot_config
AnnaBridge 143:86740a56073b 459 {
AnnaBridge 143:86740a56073b 460 uint32_t ackTimeoutCount; /*!< Timeout value for the boot ACK. The available range is 0 ~ 15. */
AnnaBridge 143:86740a56073b 461 sdhc_boot_mode_t bootMode; /*!< Boot mode selection. */
AnnaBridge 143:86740a56073b 462 uint32_t blockCount; /*!< Stop at block gap value of automatic mode. Available range is 0 ~ 65535. */
AnnaBridge 143:86740a56073b 463 bool enableBootAck; /*!< Enable or disable boot ACK */
AnnaBridge 143:86740a56073b 464 bool enableBoot; /*!< Enable or disable fast boot */
AnnaBridge 143:86740a56073b 465 bool enableAutoStopAtBlockGap; /*!< Enable or disable auto stop at block gap function in boot period */
AnnaBridge 143:86740a56073b 466 } sdhc_boot_config_t;
AnnaBridge 143:86740a56073b 467
AnnaBridge 143:86740a56073b 468 /*! @brief Data structure to initialize the SDHC */
AnnaBridge 143:86740a56073b 469 typedef struct _sdhc_config
AnnaBridge 143:86740a56073b 470 {
AnnaBridge 143:86740a56073b 471 bool cardDetectDat3; /*!< Enable DAT3 as card detection pin */
AnnaBridge 143:86740a56073b 472 sdhc_endian_mode_t endianMode; /*!< Endian mode */
AnnaBridge 143:86740a56073b 473 sdhc_dma_mode_t dmaMode; /*!< DMA mode */
AnnaBridge 143:86740a56073b 474 uint32_t readWatermarkLevel; /*!< Watermark level for DMA read operation. Available range is 1 ~ 128. */
AnnaBridge 143:86740a56073b 475 uint32_t writeWatermarkLevel; /*!< Watermark level for DMA write operation. Available range is 1 ~ 128. */
AnnaBridge 143:86740a56073b 476 } sdhc_config_t;
AnnaBridge 143:86740a56073b 477
AnnaBridge 143:86740a56073b 478 /*!
AnnaBridge 143:86740a56073b 479 * @brief Card data descriptor
AnnaBridge 143:86740a56073b 480 *
AnnaBridge 143:86740a56073b 481 * Defines a structure to contain data-related attribute. 'enableIgnoreError' is used for the case that upper card
AnnaBridge 143:86740a56073b 482 * driver
AnnaBridge 143:86740a56073b 483 * want to ignore the error event to read/write all the data not to stop read/write immediately when error event
AnnaBridge 143:86740a56073b 484 * happen for example bus testing procedure for MMC card.
AnnaBridge 143:86740a56073b 485 */
AnnaBridge 143:86740a56073b 486 typedef struct _sdhc_data
AnnaBridge 143:86740a56073b 487 {
AnnaBridge 143:86740a56073b 488 bool enableAutoCommand12; /*!< Enable auto CMD12 */
AnnaBridge 143:86740a56073b 489 bool enableIgnoreError; /*!< Enable to ignore error event to read/write all the data */
AnnaBridge 143:86740a56073b 490 size_t blockSize; /*!< Block size */
AnnaBridge 143:86740a56073b 491 uint32_t blockCount; /*!< Block count */
AnnaBridge 143:86740a56073b 492 uint32_t *rxData; /*!< Buffer to save data read */
AnnaBridge 143:86740a56073b 493 const uint32_t *txData; /*!< Data buffer to write */
AnnaBridge 143:86740a56073b 494 } sdhc_data_t;
AnnaBridge 143:86740a56073b 495
AnnaBridge 143:86740a56073b 496 /*!
AnnaBridge 143:86740a56073b 497 * @brief Card command descriptor
AnnaBridge 143:86740a56073b 498 *
AnnaBridge 143:86740a56073b 499 * Define card command-related attribute.
AnnaBridge 143:86740a56073b 500 */
AnnaBridge 143:86740a56073b 501 typedef struct _sdhc_command
AnnaBridge 143:86740a56073b 502 {
AnnaBridge 143:86740a56073b 503 uint32_t index; /*!< Command index */
AnnaBridge 143:86740a56073b 504 uint32_t argument; /*!< Command argument */
AnnaBridge 143:86740a56073b 505 sdhc_card_command_type_t type; /*!< Command type */
AnnaBridge 143:86740a56073b 506 sdhc_card_response_type_t responseType; /*!< Command response type */
AnnaBridge 143:86740a56073b 507 uint32_t response[4U]; /*!< Response for this command */
AnnaBridge 143:86740a56073b 508 uint32_t responseErrorFlags; /*!< response error flag, the flag which need to check
AnnaBridge 143:86740a56073b 509 the command reponse*/
AnnaBridge 143:86740a56073b 510 } sdhc_command_t;
AnnaBridge 143:86740a56073b 511
AnnaBridge 143:86740a56073b 512 /*! @brief Transfer state */
AnnaBridge 143:86740a56073b 513 typedef struct _sdhc_transfer
AnnaBridge 143:86740a56073b 514 {
AnnaBridge 143:86740a56073b 515 sdhc_data_t *data; /*!< Data to transfer */
AnnaBridge 143:86740a56073b 516 sdhc_command_t *command; /*!< Command to send */
AnnaBridge 143:86740a56073b 517 } sdhc_transfer_t;
AnnaBridge 143:86740a56073b 518
AnnaBridge 143:86740a56073b 519 /*! @brief SDHC handle typedef */
AnnaBridge 143:86740a56073b 520 typedef struct _sdhc_handle sdhc_handle_t;
AnnaBridge 143:86740a56073b 521
AnnaBridge 143:86740a56073b 522 /*! @brief SDHC callback functions. */
AnnaBridge 143:86740a56073b 523 typedef struct _sdhc_transfer_callback
AnnaBridge 143:86740a56073b 524 {
AnnaBridge 143:86740a56073b 525 void (*CardInserted)(void); /*!< Card inserted occurs when DAT3/CD pin is for card detect */
AnnaBridge 143:86740a56073b 526 void (*CardRemoved)(void); /*!< Card removed occurs */
AnnaBridge 143:86740a56073b 527 void (*SdioInterrupt)(void); /*!< SDIO card interrupt occurs */
AnnaBridge 143:86740a56073b 528 void (*SdioBlockGap)(void); /*!< SDIO card stopped at block gap occurs */
AnnaBridge 143:86740a56073b 529 void (*TransferComplete)(SDHC_Type *base,
AnnaBridge 143:86740a56073b 530 sdhc_handle_t *handle,
AnnaBridge 143:86740a56073b 531 status_t status,
AnnaBridge 143:86740a56073b 532 void *userData); /*!< Transfer complete callback */
AnnaBridge 143:86740a56073b 533 } sdhc_transfer_callback_t;
AnnaBridge 143:86740a56073b 534
AnnaBridge 143:86740a56073b 535 /*!
AnnaBridge 143:86740a56073b 536 * @brief SDHC handle
AnnaBridge 143:86740a56073b 537 *
AnnaBridge 143:86740a56073b 538 * Defines the structure to save the SDHC state information and callback function. The detailed interrupt status when
AnnaBridge 143:86740a56073b 539 * sending a command or transfering data can be obtained from the interruptFlags field by using the mask defined in
AnnaBridge 143:86740a56073b 540 * sdhc_interrupt_flag_t.
AnnaBridge 143:86740a56073b 541 *
AnnaBridge 143:86740a56073b 542 * @note All the fields except interruptFlags and transferredWords must be allocated by the user.
AnnaBridge 143:86740a56073b 543 */
AnnaBridge 143:86740a56073b 544 struct _sdhc_handle
AnnaBridge 143:86740a56073b 545 {
AnnaBridge 143:86740a56073b 546 /* Transfer parameter */
AnnaBridge 143:86740a56073b 547 sdhc_data_t *volatile data; /*!< Data to transfer */
AnnaBridge 143:86740a56073b 548 sdhc_command_t *volatile command; /*!< Command to send */
AnnaBridge 143:86740a56073b 549
AnnaBridge 143:86740a56073b 550 /* Transfer status */
AnnaBridge 143:86740a56073b 551 volatile uint32_t interruptFlags; /*!< Interrupt flags of last transaction */
AnnaBridge 143:86740a56073b 552 volatile uint32_t transferredWords; /*!< Words transferred by DATAPORT way */
AnnaBridge 143:86740a56073b 553
AnnaBridge 143:86740a56073b 554 /* Callback functions */
AnnaBridge 143:86740a56073b 555 sdhc_transfer_callback_t callback; /*!< Callback function */
AnnaBridge 143:86740a56073b 556 void *userData; /*!< Parameter for transfer complete callback */
AnnaBridge 143:86740a56073b 557 };
AnnaBridge 143:86740a56073b 558
AnnaBridge 143:86740a56073b 559 /*! @brief SDHC transfer function. */
AnnaBridge 143:86740a56073b 560 typedef status_t (*sdhc_transfer_function_t)(SDHC_Type *base, sdhc_transfer_t *content);
AnnaBridge 143:86740a56073b 561
AnnaBridge 143:86740a56073b 562 /*! @brief SDHC host descriptor */
AnnaBridge 143:86740a56073b 563 typedef struct _sdhc_host
AnnaBridge 143:86740a56073b 564 {
AnnaBridge 143:86740a56073b 565 SDHC_Type *base; /*!< SDHC peripheral base address */
AnnaBridge 143:86740a56073b 566 uint32_t sourceClock_Hz; /*!< SDHC source clock frequency united in Hz */
AnnaBridge 143:86740a56073b 567 sdhc_config_t config; /*!< SDHC configuration */
AnnaBridge 143:86740a56073b 568 sdhc_capability_t capability; /*!< SDHC capability information */
AnnaBridge 143:86740a56073b 569 sdhc_transfer_function_t transfer; /*!< SDHC transfer function */
AnnaBridge 143:86740a56073b 570 } sdhc_host_t;
AnnaBridge 143:86740a56073b 571
AnnaBridge 143:86740a56073b 572 /*************************************************************************************************
AnnaBridge 143:86740a56073b 573 * API
AnnaBridge 143:86740a56073b 574 ************************************************************************************************/
AnnaBridge 143:86740a56073b 575 #if defined(__cplusplus)
AnnaBridge 143:86740a56073b 576 extern "C" {
AnnaBridge 143:86740a56073b 577 #endif
AnnaBridge 143:86740a56073b 578
AnnaBridge 143:86740a56073b 579 /*!
AnnaBridge 143:86740a56073b 580 * @name Initialization and deinitialization
AnnaBridge 143:86740a56073b 581 * @{
AnnaBridge 143:86740a56073b 582 */
AnnaBridge 143:86740a56073b 583
AnnaBridge 143:86740a56073b 584 /*!
AnnaBridge 143:86740a56073b 585 * @brief SDHC module initialization function.
AnnaBridge 143:86740a56073b 586 *
AnnaBridge 143:86740a56073b 587 * Configures the SDHC according to the user configuration.
AnnaBridge 143:86740a56073b 588 *
AnnaBridge 143:86740a56073b 589 * Example:
AnnaBridge 143:86740a56073b 590 @code
AnnaBridge 143:86740a56073b 591 sdhc_config_t config;
AnnaBridge 143:86740a56073b 592 config.cardDetectDat3 = false;
AnnaBridge 143:86740a56073b 593 config.endianMode = kSDHC_EndianModeLittle;
AnnaBridge 143:86740a56073b 594 config.dmaMode = kSDHC_DmaModeAdma2;
AnnaBridge 143:86740a56073b 595 config.readWatermarkLevel = 128U;
AnnaBridge 143:86740a56073b 596 config.writeWatermarkLevel = 128U;
AnnaBridge 143:86740a56073b 597 SDHC_Init(SDHC, &config);
AnnaBridge 143:86740a56073b 598 @endcode
AnnaBridge 143:86740a56073b 599 *
AnnaBridge 143:86740a56073b 600 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 601 * @param config SDHC configuration information.
AnnaBridge 143:86740a56073b 602 * @retval kStatus_Success Operate successfully.
AnnaBridge 143:86740a56073b 603 */
AnnaBridge 143:86740a56073b 604 void SDHC_Init(SDHC_Type *base, const sdhc_config_t *config);
AnnaBridge 143:86740a56073b 605
AnnaBridge 143:86740a56073b 606 /*!
AnnaBridge 143:86740a56073b 607 * @brief Deinitializes the SDHC.
AnnaBridge 143:86740a56073b 608 *
AnnaBridge 143:86740a56073b 609 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 610 */
AnnaBridge 143:86740a56073b 611 void SDHC_Deinit(SDHC_Type *base);
AnnaBridge 143:86740a56073b 612
AnnaBridge 143:86740a56073b 613 /*!
AnnaBridge 143:86740a56073b 614 * @brief Resets the SDHC.
AnnaBridge 143:86740a56073b 615 *
AnnaBridge 143:86740a56073b 616 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 617 * @param mask The reset type mask(_sdhc_reset).
AnnaBridge 143:86740a56073b 618 * @param timeout Timeout for reset.
AnnaBridge 143:86740a56073b 619 * @retval true Reset successfully.
AnnaBridge 143:86740a56073b 620 * @retval false Reset failed.
AnnaBridge 143:86740a56073b 621 */
AnnaBridge 143:86740a56073b 622 bool SDHC_Reset(SDHC_Type *base, uint32_t mask, uint32_t timeout);
AnnaBridge 143:86740a56073b 623
AnnaBridge 143:86740a56073b 624 /* @} */
AnnaBridge 143:86740a56073b 625
AnnaBridge 143:86740a56073b 626 /*!
AnnaBridge 143:86740a56073b 627 * @name DMA Control
AnnaBridge 143:86740a56073b 628 * @{
AnnaBridge 143:86740a56073b 629 */
AnnaBridge 143:86740a56073b 630
AnnaBridge 143:86740a56073b 631 /*!
AnnaBridge 143:86740a56073b 632 * @brief Sets the ADMA descriptor table configuration.
AnnaBridge 143:86740a56073b 633 *
AnnaBridge 143:86740a56073b 634 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 635 * @param dmaMode DMA mode.
AnnaBridge 143:86740a56073b 636 * @param table ADMA table address.
AnnaBridge 143:86740a56073b 637 * @param tableWords ADMA table buffer length united as Words.
AnnaBridge 143:86740a56073b 638 * @param data Data buffer address.
AnnaBridge 143:86740a56073b 639 * @param dataBytes Data length united as bytes.
AnnaBridge 143:86740a56073b 640 * @retval kStatus_OutOfRange ADMA descriptor table length isn't enough to describe data.
AnnaBridge 143:86740a56073b 641 * @retval kStatus_Success Operate successfully.
AnnaBridge 143:86740a56073b 642 */
AnnaBridge 143:86740a56073b 643 status_t SDHC_SetAdmaTableConfig(SDHC_Type *base,
AnnaBridge 143:86740a56073b 644 sdhc_dma_mode_t dmaMode,
AnnaBridge 143:86740a56073b 645 uint32_t *table,
AnnaBridge 143:86740a56073b 646 uint32_t tableWords,
AnnaBridge 143:86740a56073b 647 const uint32_t *data,
AnnaBridge 143:86740a56073b 648 uint32_t dataBytes);
AnnaBridge 143:86740a56073b 649
AnnaBridge 143:86740a56073b 650 /* @} */
AnnaBridge 143:86740a56073b 651
AnnaBridge 143:86740a56073b 652 /*!
AnnaBridge 143:86740a56073b 653 * @name Interrupts
AnnaBridge 143:86740a56073b 654 * @{
AnnaBridge 143:86740a56073b 655 */
AnnaBridge 143:86740a56073b 656
AnnaBridge 143:86740a56073b 657 /*!
AnnaBridge 143:86740a56073b 658 * @brief Enables the interrupt status.
AnnaBridge 143:86740a56073b 659 *
AnnaBridge 143:86740a56073b 660 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 661 * @param mask Interrupt status flags mask(_sdhc_interrupt_status_flag).
AnnaBridge 143:86740a56073b 662 */
AnnaBridge 143:86740a56073b 663 static inline void SDHC_EnableInterruptStatus(SDHC_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 664 {
AnnaBridge 143:86740a56073b 665 base->IRQSTATEN |= mask;
AnnaBridge 143:86740a56073b 666 }
AnnaBridge 143:86740a56073b 667
AnnaBridge 143:86740a56073b 668 /*!
AnnaBridge 143:86740a56073b 669 * @brief Disables the interrupt status.
AnnaBridge 143:86740a56073b 670 *
AnnaBridge 143:86740a56073b 671 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 672 * @param mask The interrupt status flags mask(_sdhc_interrupt_status_flag).
AnnaBridge 143:86740a56073b 673 */
AnnaBridge 143:86740a56073b 674 static inline void SDHC_DisableInterruptStatus(SDHC_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 675 {
AnnaBridge 143:86740a56073b 676 base->IRQSTATEN &= ~mask;
AnnaBridge 143:86740a56073b 677 }
AnnaBridge 143:86740a56073b 678
AnnaBridge 143:86740a56073b 679 /*!
AnnaBridge 143:86740a56073b 680 * @brief Enables the interrupt signal corresponding to the interrupt status flag.
AnnaBridge 143:86740a56073b 681 *
AnnaBridge 143:86740a56073b 682 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 683 * @param mask The interrupt status flags mask(_sdhc_interrupt_status_flag).
AnnaBridge 143:86740a56073b 684 */
AnnaBridge 143:86740a56073b 685 static inline void SDHC_EnableInterruptSignal(SDHC_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 686 {
AnnaBridge 143:86740a56073b 687 base->IRQSIGEN |= mask;
AnnaBridge 143:86740a56073b 688 }
AnnaBridge 143:86740a56073b 689
AnnaBridge 143:86740a56073b 690 /*!
AnnaBridge 143:86740a56073b 691 * @brief Disables the interrupt signal corresponding to the interrupt status flag.
AnnaBridge 143:86740a56073b 692 *
AnnaBridge 143:86740a56073b 693 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 694 * @param mask The interrupt status flags mask(_sdhc_interrupt_status_flag).
AnnaBridge 143:86740a56073b 695 */
AnnaBridge 143:86740a56073b 696 static inline void SDHC_DisableInterruptSignal(SDHC_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 697 {
AnnaBridge 143:86740a56073b 698 base->IRQSIGEN &= ~mask;
AnnaBridge 143:86740a56073b 699 }
AnnaBridge 143:86740a56073b 700
AnnaBridge 143:86740a56073b 701 /* @} */
AnnaBridge 143:86740a56073b 702
AnnaBridge 143:86740a56073b 703 /*!
AnnaBridge 143:86740a56073b 704 * @name Status
AnnaBridge 143:86740a56073b 705 * @{
AnnaBridge 143:86740a56073b 706 */
AnnaBridge 143:86740a56073b 707
AnnaBridge 143:86740a56073b 708 /*!
AnnaBridge 143:86740a56073b 709 * @brief Gets the current interrupt status.
AnnaBridge 143:86740a56073b 710 *
AnnaBridge 143:86740a56073b 711 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 712 * @return Current interrupt status flags mask(_sdhc_interrupt_status_flag).
AnnaBridge 143:86740a56073b 713 */
AnnaBridge 143:86740a56073b 714 static inline uint32_t SDHC_GetInterruptStatusFlags(SDHC_Type *base)
AnnaBridge 143:86740a56073b 715 {
AnnaBridge 143:86740a56073b 716 return base->IRQSTAT;
AnnaBridge 143:86740a56073b 717 }
AnnaBridge 143:86740a56073b 718
AnnaBridge 143:86740a56073b 719 /*!
AnnaBridge 143:86740a56073b 720 * @brief Clears a specified interrupt status.
AnnaBridge 143:86740a56073b 721 *
AnnaBridge 143:86740a56073b 722 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 723 * @param mask The interrupt status flags mask(_sdhc_interrupt_status_flag).
AnnaBridge 143:86740a56073b 724 */
AnnaBridge 143:86740a56073b 725 static inline void SDHC_ClearInterruptStatusFlags(SDHC_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 726 {
AnnaBridge 143:86740a56073b 727 base->IRQSTAT = mask;
AnnaBridge 143:86740a56073b 728 }
AnnaBridge 143:86740a56073b 729
AnnaBridge 143:86740a56073b 730 /*!
AnnaBridge 143:86740a56073b 731 * @brief Gets the status of auto command 12 error.
AnnaBridge 143:86740a56073b 732 *
AnnaBridge 143:86740a56073b 733 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 734 * @return Auto command 12 error status flags mask(_sdhc_auto_command12_error_status_flag).
AnnaBridge 143:86740a56073b 735 */
AnnaBridge 143:86740a56073b 736 static inline uint32_t SDHC_GetAutoCommand12ErrorStatusFlags(SDHC_Type *base)
AnnaBridge 143:86740a56073b 737 {
AnnaBridge 143:86740a56073b 738 return base->AC12ERR;
AnnaBridge 143:86740a56073b 739 }
AnnaBridge 143:86740a56073b 740
AnnaBridge 143:86740a56073b 741 /*!
AnnaBridge 143:86740a56073b 742 * @brief Gets the status of the ADMA error.
AnnaBridge 143:86740a56073b 743 *
AnnaBridge 143:86740a56073b 744 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 745 * @return ADMA error status flags mask(_sdhc_adma_error_status_flag).
AnnaBridge 143:86740a56073b 746 */
AnnaBridge 143:86740a56073b 747 static inline uint32_t SDHC_GetAdmaErrorStatusFlags(SDHC_Type *base)
AnnaBridge 143:86740a56073b 748 {
AnnaBridge 143:86740a56073b 749 return base->ADMAES;
AnnaBridge 143:86740a56073b 750 }
AnnaBridge 143:86740a56073b 751
AnnaBridge 143:86740a56073b 752 /*!
AnnaBridge 143:86740a56073b 753 * @brief Gets a present status.
AnnaBridge 143:86740a56073b 754 *
AnnaBridge 143:86740a56073b 755 * This function gets the present SDHC's status except for an interrupt status and an error status.
AnnaBridge 143:86740a56073b 756 *
AnnaBridge 143:86740a56073b 757 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 758 * @return Present SDHC's status flags mask(_sdhc_present_status_flag).
AnnaBridge 143:86740a56073b 759 */
AnnaBridge 143:86740a56073b 760 static inline uint32_t SDHC_GetPresentStatusFlags(SDHC_Type *base)
AnnaBridge 143:86740a56073b 761 {
AnnaBridge 143:86740a56073b 762 return base->PRSSTAT;
AnnaBridge 143:86740a56073b 763 }
AnnaBridge 143:86740a56073b 764
AnnaBridge 143:86740a56073b 765 /* @} */
AnnaBridge 143:86740a56073b 766
AnnaBridge 143:86740a56073b 767 /*!
AnnaBridge 143:86740a56073b 768 * @name Bus Operations
AnnaBridge 143:86740a56073b 769 * @{
AnnaBridge 143:86740a56073b 770 */
AnnaBridge 143:86740a56073b 771
AnnaBridge 143:86740a56073b 772 /*!
AnnaBridge 143:86740a56073b 773 * @brief Gets the capability information.
AnnaBridge 143:86740a56073b 774 *
AnnaBridge 143:86740a56073b 775 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 776 * @param capability Structure to save capability information.
AnnaBridge 143:86740a56073b 777 */
AnnaBridge 143:86740a56073b 778 void SDHC_GetCapability(SDHC_Type *base, sdhc_capability_t *capability);
AnnaBridge 143:86740a56073b 779
AnnaBridge 143:86740a56073b 780 /*!
AnnaBridge 143:86740a56073b 781 * @brief Enables or disables the SD bus clock.
AnnaBridge 143:86740a56073b 782 *
AnnaBridge 143:86740a56073b 783 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 784 * @param enable True to enable, false to disable.
AnnaBridge 143:86740a56073b 785 */
AnnaBridge 143:86740a56073b 786 static inline void SDHC_EnableSdClock(SDHC_Type *base, bool enable)
AnnaBridge 143:86740a56073b 787 {
AnnaBridge 143:86740a56073b 788 if (enable)
AnnaBridge 143:86740a56073b 789 {
AnnaBridge 143:86740a56073b 790 base->SYSCTL |= SDHC_SYSCTL_SDCLKEN_MASK;
AnnaBridge 143:86740a56073b 791 }
AnnaBridge 143:86740a56073b 792 else
AnnaBridge 143:86740a56073b 793 {
AnnaBridge 143:86740a56073b 794 base->SYSCTL &= ~SDHC_SYSCTL_SDCLKEN_MASK;
AnnaBridge 143:86740a56073b 795 }
AnnaBridge 143:86740a56073b 796 }
AnnaBridge 143:86740a56073b 797
AnnaBridge 143:86740a56073b 798 /*!
AnnaBridge 143:86740a56073b 799 * @brief Sets the SD bus clock frequency.
AnnaBridge 143:86740a56073b 800 *
AnnaBridge 143:86740a56073b 801 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 802 * @param srcClock_Hz SDHC source clock frequency united in Hz.
AnnaBridge 143:86740a56073b 803 * @param busClock_Hz SD bus clock frequency united in Hz.
AnnaBridge 143:86740a56073b 804 *
AnnaBridge 143:86740a56073b 805 * @return The nearest frequency of busClock_Hz configured to SD bus.
AnnaBridge 143:86740a56073b 806 */
AnnaBridge 143:86740a56073b 807 uint32_t SDHC_SetSdClock(SDHC_Type *base, uint32_t srcClock_Hz, uint32_t busClock_Hz);
AnnaBridge 143:86740a56073b 808
AnnaBridge 143:86740a56073b 809 /*!
AnnaBridge 143:86740a56073b 810 * @brief Sends 80 clocks to the card to set it to the active state.
AnnaBridge 143:86740a56073b 811 *
AnnaBridge 143:86740a56073b 812 * This function must be called each time the card is inserted to ensure that the card can receive the command
AnnaBridge 143:86740a56073b 813 * correctly.
AnnaBridge 143:86740a56073b 814 *
AnnaBridge 143:86740a56073b 815 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 816 * @param timeout Timeout to initialize card.
AnnaBridge 143:86740a56073b 817 * @retval true Set card active successfully.
AnnaBridge 143:86740a56073b 818 * @retval false Set card active failed.
AnnaBridge 143:86740a56073b 819 */
AnnaBridge 143:86740a56073b 820 bool SDHC_SetCardActive(SDHC_Type *base, uint32_t timeout);
AnnaBridge 143:86740a56073b 821
AnnaBridge 143:86740a56073b 822 /*!
AnnaBridge 143:86740a56073b 823 * @brief Sets the data transfer width.
AnnaBridge 143:86740a56073b 824 *
AnnaBridge 143:86740a56073b 825 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 826 * @param width Data transfer width.
AnnaBridge 143:86740a56073b 827 */
AnnaBridge 143:86740a56073b 828 static inline void SDHC_SetDataBusWidth(SDHC_Type *base, sdhc_data_bus_width_t width)
AnnaBridge 143:86740a56073b 829 {
AnnaBridge 143:86740a56073b 830 base->PROCTL = ((base->PROCTL & ~SDHC_PROCTL_DTW_MASK) | SDHC_PROCTL_DTW(width));
AnnaBridge 143:86740a56073b 831 }
AnnaBridge 143:86740a56073b 832
AnnaBridge 143:86740a56073b 833 /*!
AnnaBridge 143:86740a56073b 834 * @brief Sets the card transfer-related configuration.
AnnaBridge 143:86740a56073b 835 *
AnnaBridge 143:86740a56073b 836 * This function fills the card transfer-related command argument/transfer flag/data size. The command and data are sent
AnnaBridge 143:86740a56073b 837 by
AnnaBridge 143:86740a56073b 838 * SDHC after calling this function.
AnnaBridge 143:86740a56073b 839 *
AnnaBridge 143:86740a56073b 840 * Example:
AnnaBridge 143:86740a56073b 841 @code
AnnaBridge 143:86740a56073b 842 sdhc_transfer_config_t transferConfig;
AnnaBridge 143:86740a56073b 843 transferConfig.dataBlockSize = 512U;
AnnaBridge 143:86740a56073b 844 transferConfig.dataBlockCount = 2U;
AnnaBridge 143:86740a56073b 845 transferConfig.commandArgument = 0x01AAU;
AnnaBridge 143:86740a56073b 846 transferConfig.commandIndex = 8U;
AnnaBridge 143:86740a56073b 847 transferConfig.flags |= (kSDHC_EnableDmaFlag | kSDHC_EnableAutoCommand12Flag | kSDHC_MultipleBlockFlag);
AnnaBridge 143:86740a56073b 848 SDHC_SetTransferConfig(SDHC, &transferConfig);
AnnaBridge 143:86740a56073b 849 @endcode
AnnaBridge 143:86740a56073b 850 *
AnnaBridge 143:86740a56073b 851 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 852 * @param config Command configuration structure.
AnnaBridge 143:86740a56073b 853 */
AnnaBridge 143:86740a56073b 854 void SDHC_SetTransferConfig(SDHC_Type *base, const sdhc_transfer_config_t *config);
AnnaBridge 143:86740a56073b 855
AnnaBridge 143:86740a56073b 856 /*!
AnnaBridge 143:86740a56073b 857 * @brief Gets the command response.
AnnaBridge 143:86740a56073b 858 *
AnnaBridge 143:86740a56073b 859 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 860 * @param index The index of response register, range from 0 to 3.
AnnaBridge 143:86740a56073b 861 * @return Response register transfer.
AnnaBridge 143:86740a56073b 862 */
AnnaBridge 143:86740a56073b 863 static inline uint32_t SDHC_GetCommandResponse(SDHC_Type *base, uint32_t index)
AnnaBridge 143:86740a56073b 864 {
AnnaBridge 143:86740a56073b 865 assert(index < 4U);
AnnaBridge 143:86740a56073b 866
AnnaBridge 143:86740a56073b 867 return base->CMDRSP[index];
AnnaBridge 143:86740a56073b 868 }
AnnaBridge 143:86740a56073b 869
AnnaBridge 143:86740a56073b 870 /*!
AnnaBridge 143:86740a56073b 871 * @brief Fills the the data port.
AnnaBridge 143:86740a56073b 872 *
AnnaBridge 143:86740a56073b 873 * This function is used to implement the data transfer by Data Port instead of DMA.
AnnaBridge 143:86740a56073b 874 *
AnnaBridge 143:86740a56073b 875 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 876 * @param data The data about to be sent.
AnnaBridge 143:86740a56073b 877 */
AnnaBridge 143:86740a56073b 878 static inline void SDHC_WriteData(SDHC_Type *base, uint32_t data)
AnnaBridge 143:86740a56073b 879 {
AnnaBridge 143:86740a56073b 880 base->DATPORT = data;
AnnaBridge 143:86740a56073b 881 }
AnnaBridge 143:86740a56073b 882
AnnaBridge 143:86740a56073b 883 /*!
AnnaBridge 143:86740a56073b 884 * @brief Retrieves the data from the data port.
AnnaBridge 143:86740a56073b 885 *
AnnaBridge 143:86740a56073b 886 * This function is used to implement the data transfer by Data Port instead of DMA.
AnnaBridge 143:86740a56073b 887 *
AnnaBridge 143:86740a56073b 888 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 889 * @return The data has been read.
AnnaBridge 143:86740a56073b 890 */
AnnaBridge 143:86740a56073b 891 static inline uint32_t SDHC_ReadData(SDHC_Type *base)
AnnaBridge 143:86740a56073b 892 {
AnnaBridge 143:86740a56073b 893 return base->DATPORT;
AnnaBridge 143:86740a56073b 894 }
AnnaBridge 143:86740a56073b 895
AnnaBridge 143:86740a56073b 896 /*!
AnnaBridge 143:86740a56073b 897 * @brief Enables or disables a wakeup event in low-power mode.
AnnaBridge 143:86740a56073b 898 *
AnnaBridge 143:86740a56073b 899 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 900 * @param mask Wakeup events mask(_sdhc_wakeup_event).
AnnaBridge 143:86740a56073b 901 * @param enable True to enable, false to disable.
AnnaBridge 143:86740a56073b 902 */
AnnaBridge 143:86740a56073b 903 static inline void SDHC_EnableWakeupEvent(SDHC_Type *base, uint32_t mask, bool enable)
AnnaBridge 143:86740a56073b 904 {
AnnaBridge 143:86740a56073b 905 if (enable)
AnnaBridge 143:86740a56073b 906 {
AnnaBridge 143:86740a56073b 907 base->PROCTL |= mask;
AnnaBridge 143:86740a56073b 908 }
AnnaBridge 143:86740a56073b 909 else
AnnaBridge 143:86740a56073b 910 {
AnnaBridge 143:86740a56073b 911 base->PROCTL &= ~mask;
AnnaBridge 143:86740a56073b 912 }
AnnaBridge 143:86740a56073b 913 }
AnnaBridge 143:86740a56073b 914
AnnaBridge 143:86740a56073b 915 /*!
AnnaBridge 143:86740a56073b 916 * @brief Enables or disables the card detection level for testing.
AnnaBridge 143:86740a56073b 917 *
AnnaBridge 143:86740a56073b 918 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 919 * @param enable True to enable, false to disable.
AnnaBridge 143:86740a56073b 920 */
AnnaBridge 143:86740a56073b 921 static inline void SDHC_EnableCardDetectTest(SDHC_Type *base, bool enable)
AnnaBridge 143:86740a56073b 922 {
AnnaBridge 143:86740a56073b 923 if (enable)
AnnaBridge 143:86740a56073b 924 {
AnnaBridge 143:86740a56073b 925 base->PROCTL |= SDHC_PROCTL_CDSS_MASK;
AnnaBridge 143:86740a56073b 926 }
AnnaBridge 143:86740a56073b 927 else
AnnaBridge 143:86740a56073b 928 {
AnnaBridge 143:86740a56073b 929 base->PROCTL &= ~SDHC_PROCTL_CDSS_MASK;
AnnaBridge 143:86740a56073b 930 }
AnnaBridge 143:86740a56073b 931 }
AnnaBridge 143:86740a56073b 932
AnnaBridge 143:86740a56073b 933 /*!
AnnaBridge 143:86740a56073b 934 * @brief Sets the card detection test level.
AnnaBridge 143:86740a56073b 935 *
AnnaBridge 143:86740a56073b 936 * This function sets the card detection test level to indicate whether the card is inserted into the SDHC when DAT[3]/
AnnaBridge 143:86740a56073b 937 * CD pin is selected as a card detection pin. This function can also assert the pin logic when DAT[3]/CD pin is
AnnaBridge 143:86740a56073b 938 * selected
AnnaBridge 143:86740a56073b 939 * as the card detection pin.
AnnaBridge 143:86740a56073b 940 *
AnnaBridge 143:86740a56073b 941 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 942 * @param high True to set the card detect level to high.
AnnaBridge 143:86740a56073b 943 */
AnnaBridge 143:86740a56073b 944 static inline void SDHC_SetCardDetectTestLevel(SDHC_Type *base, bool high)
AnnaBridge 143:86740a56073b 945 {
AnnaBridge 143:86740a56073b 946 if (high)
AnnaBridge 143:86740a56073b 947 {
AnnaBridge 143:86740a56073b 948 base->PROCTL |= SDHC_PROCTL_CDTL_MASK;
AnnaBridge 143:86740a56073b 949 }
AnnaBridge 143:86740a56073b 950 else
AnnaBridge 143:86740a56073b 951 {
AnnaBridge 143:86740a56073b 952 base->PROCTL &= ~SDHC_PROCTL_CDTL_MASK;
AnnaBridge 143:86740a56073b 953 }
AnnaBridge 143:86740a56073b 954 }
AnnaBridge 143:86740a56073b 955
AnnaBridge 143:86740a56073b 956 /*!
AnnaBridge 143:86740a56073b 957 * @brief Enables or disables the SDIO card control.
AnnaBridge 143:86740a56073b 958 *
AnnaBridge 143:86740a56073b 959 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 960 * @param mask SDIO card control flags mask(_sdhc_sdio_control_flag).
AnnaBridge 143:86740a56073b 961 * @param enable True to enable, false to disable.
AnnaBridge 143:86740a56073b 962 */
AnnaBridge 143:86740a56073b 963 void SDHC_EnableSdioControl(SDHC_Type *base, uint32_t mask, bool enable);
AnnaBridge 143:86740a56073b 964
AnnaBridge 143:86740a56073b 965 /*!
AnnaBridge 143:86740a56073b 966 * @brief Restarts a transaction which has stopped at the block GAP for the SDIO card.
AnnaBridge 143:86740a56073b 967 *
AnnaBridge 143:86740a56073b 968 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 969 */
AnnaBridge 143:86740a56073b 970 static inline void SDHC_SetContinueRequest(SDHC_Type *base)
AnnaBridge 143:86740a56073b 971 {
AnnaBridge 143:86740a56073b 972 base->PROCTL |= SDHC_PROCTL_CREQ_MASK;
AnnaBridge 143:86740a56073b 973 }
AnnaBridge 143:86740a56073b 974
AnnaBridge 143:86740a56073b 975 /*!
AnnaBridge 143:86740a56073b 976 * @brief Configures the MMC boot feature.
AnnaBridge 143:86740a56073b 977 *
AnnaBridge 143:86740a56073b 978 * Example:
AnnaBridge 143:86740a56073b 979 @code
AnnaBridge 143:86740a56073b 980 sdhc_boot_config_t config;
AnnaBridge 143:86740a56073b 981 config.ackTimeoutCount = 4;
AnnaBridge 143:86740a56073b 982 config.bootMode = kSDHC_BootModeNormal;
AnnaBridge 143:86740a56073b 983 config.blockCount = 5;
AnnaBridge 143:86740a56073b 984 config.enableBootAck = true;
AnnaBridge 143:86740a56073b 985 config.enableBoot = true;
AnnaBridge 143:86740a56073b 986 config.enableAutoStopAtBlockGap = true;
AnnaBridge 143:86740a56073b 987 SDHC_SetMmcBootConfig(SDHC, &config);
AnnaBridge 143:86740a56073b 988 @endcode
AnnaBridge 143:86740a56073b 989 *
AnnaBridge 143:86740a56073b 990 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 991 * @param config The MMC boot configuration information.
AnnaBridge 143:86740a56073b 992 */
AnnaBridge 143:86740a56073b 993 void SDHC_SetMmcBootConfig(SDHC_Type *base, const sdhc_boot_config_t *config);
AnnaBridge 143:86740a56073b 994
AnnaBridge 143:86740a56073b 995 /*!
AnnaBridge 143:86740a56073b 996 * @brief Forces generating events according to the given mask.
AnnaBridge 143:86740a56073b 997 *
AnnaBridge 143:86740a56073b 998 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 999 * @param mask The force events mask(_sdhc_force_event).
AnnaBridge 143:86740a56073b 1000 */
AnnaBridge 143:86740a56073b 1001 static inline void SDHC_SetForceEvent(SDHC_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 1002 {
AnnaBridge 143:86740a56073b 1003 base->FEVT = mask;
AnnaBridge 143:86740a56073b 1004 }
AnnaBridge 143:86740a56073b 1005
AnnaBridge 143:86740a56073b 1006 /* @} */
AnnaBridge 143:86740a56073b 1007
AnnaBridge 143:86740a56073b 1008 /*!
AnnaBridge 143:86740a56073b 1009 * @name Transactional
AnnaBridge 143:86740a56073b 1010 * @{
AnnaBridge 143:86740a56073b 1011 */
AnnaBridge 143:86740a56073b 1012
AnnaBridge 143:86740a56073b 1013 /*!
AnnaBridge 143:86740a56073b 1014 * @brief Transfers the command/data using a blocking method.
AnnaBridge 143:86740a56073b 1015 *
AnnaBridge 143:86740a56073b 1016 * This function waits until the command response/data is received or the SDHC encounters an error by polling the status
AnnaBridge 143:86740a56073b 1017 * flag.
AnnaBridge 143:86740a56073b 1018 * This function support non word align data addr transfer support, if data buffer addr is not align in DMA mode,
AnnaBridge 143:86740a56073b 1019 * the API will continue finish the transfer by polling IO directly
AnnaBridge 143:86740a56073b 1020 * The application must not call this API in multiple threads at the same time. Because of that this API doesn't support
AnnaBridge 143:86740a56073b 1021 * the re-entry mechanism.
AnnaBridge 143:86740a56073b 1022 *
AnnaBridge 143:86740a56073b 1023 * @note There is no need to call the API 'SDHC_TransferCreateHandle' when calling this API.
AnnaBridge 143:86740a56073b 1024 *
AnnaBridge 143:86740a56073b 1025 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 1026 * @param admaTable ADMA table address, can't be null if transfer way is ADMA1/ADMA2.
AnnaBridge 143:86740a56073b 1027 * @param admaTableWords ADMA table length united as words, can't be 0 if transfer way is ADMA1/ADMA2.
AnnaBridge 143:86740a56073b 1028 * @param transfer Transfer content.
AnnaBridge 143:86740a56073b 1029 * @retval kStatus_InvalidArgument Argument is invalid.
AnnaBridge 143:86740a56073b 1030 * @retval kStatus_SDHC_PrepareAdmaDescriptorFailed Prepare ADMA descriptor failed.
AnnaBridge 143:86740a56073b 1031 * @retval kStatus_SDHC_SendCommandFailed Send command failed.
AnnaBridge 143:86740a56073b 1032 * @retval kStatus_SDHC_TransferDataFailed Transfer data failed.
AnnaBridge 143:86740a56073b 1033 * @retval kStatus_Success Operate successfully.
AnnaBridge 143:86740a56073b 1034 */
AnnaBridge 143:86740a56073b 1035 status_t SDHC_TransferBlocking(SDHC_Type *base,
AnnaBridge 143:86740a56073b 1036 uint32_t *admaTable,
AnnaBridge 143:86740a56073b 1037 uint32_t admaTableWords,
AnnaBridge 143:86740a56073b 1038 sdhc_transfer_t *transfer);
AnnaBridge 143:86740a56073b 1039
AnnaBridge 143:86740a56073b 1040 /*!
AnnaBridge 143:86740a56073b 1041 * @brief Creates the SDHC handle.
AnnaBridge 143:86740a56073b 1042 *
AnnaBridge 143:86740a56073b 1043 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 1044 * @param handle SDHC handle pointer.
AnnaBridge 143:86740a56073b 1045 * @param callback Structure pointer to contain all callback functions.
AnnaBridge 143:86740a56073b 1046 * @param userData Callback function parameter.
AnnaBridge 143:86740a56073b 1047 */
AnnaBridge 143:86740a56073b 1048 void SDHC_TransferCreateHandle(SDHC_Type *base,
AnnaBridge 143:86740a56073b 1049 sdhc_handle_t *handle,
AnnaBridge 143:86740a56073b 1050 const sdhc_transfer_callback_t *callback,
AnnaBridge 143:86740a56073b 1051 void *userData);
AnnaBridge 143:86740a56073b 1052
AnnaBridge 143:86740a56073b 1053 /*!
AnnaBridge 143:86740a56073b 1054 * @brief Transfers the command/data using an interrupt and an asynchronous method.
AnnaBridge 143:86740a56073b 1055 *
AnnaBridge 143:86740a56073b 1056 * This function sends a command and data and returns immediately. It doesn't wait the transfer complete or encounter an
AnnaBridge 143:86740a56073b 1057 * error.
AnnaBridge 143:86740a56073b 1058 * This function support non word align data addr transfer support, if data buffer addr is not align in DMA mode,
AnnaBridge 143:86740a56073b 1059 * the API will continue finish the transfer by polling IO directly
AnnaBridge 143:86740a56073b 1060 * The application must not call this API in multiple threads at the same time. Because of that this API doesn't support
AnnaBridge 143:86740a56073b 1061 * the re-entry mechanism.
AnnaBridge 143:86740a56073b 1062 *
AnnaBridge 143:86740a56073b 1063 * @note Call the API 'SDHC_TransferCreateHandle' when calling this API.
AnnaBridge 143:86740a56073b 1064 *
AnnaBridge 143:86740a56073b 1065 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 1066 * @param handle SDHC handle.
AnnaBridge 143:86740a56073b 1067 * @param admaTable ADMA table address, can't be null if transfer way is ADMA1/ADMA2.
AnnaBridge 143:86740a56073b 1068 * @param admaTableWords ADMA table length united as words, can't be 0 if transfer way is ADMA1/ADMA2.
AnnaBridge 143:86740a56073b 1069 * @param transfer Transfer content.
AnnaBridge 143:86740a56073b 1070 * @retval kStatus_InvalidArgument Argument is invalid.
AnnaBridge 143:86740a56073b 1071 * @retval kStatus_SDHC_BusyTransferring Busy transferring.
AnnaBridge 143:86740a56073b 1072 * @retval kStatus_SDHC_PrepareAdmaDescriptorFailed Prepare ADMA descriptor failed.
AnnaBridge 143:86740a56073b 1073 * @retval kStatus_Success Operate successfully.
AnnaBridge 143:86740a56073b 1074 */
AnnaBridge 143:86740a56073b 1075 status_t SDHC_TransferNonBlocking(
AnnaBridge 143:86740a56073b 1076 SDHC_Type *base, sdhc_handle_t *handle, uint32_t *admaTable, uint32_t admaTableWords, sdhc_transfer_t *transfer);
AnnaBridge 143:86740a56073b 1077
AnnaBridge 143:86740a56073b 1078 /*!
AnnaBridge 143:86740a56073b 1079 * @brief IRQ handler for the SDHC.
AnnaBridge 143:86740a56073b 1080 *
AnnaBridge 143:86740a56073b 1081 * This function deals with the IRQs on the given host controller.
AnnaBridge 143:86740a56073b 1082 *
AnnaBridge 143:86740a56073b 1083 * @param base SDHC peripheral base address.
AnnaBridge 143:86740a56073b 1084 * @param handle SDHC handle.
AnnaBridge 143:86740a56073b 1085 */
AnnaBridge 143:86740a56073b 1086 void SDHC_TransferHandleIRQ(SDHC_Type *base, sdhc_handle_t *handle);
AnnaBridge 143:86740a56073b 1087
AnnaBridge 143:86740a56073b 1088 /* @} */
AnnaBridge 143:86740a56073b 1089
AnnaBridge 143:86740a56073b 1090 #if defined(__cplusplus)
AnnaBridge 143:86740a56073b 1091 }
AnnaBridge 143:86740a56073b 1092 #endif
AnnaBridge 143:86740a56073b 1093 /*! @} */
AnnaBridge 143:86740a56073b 1094
AnnaBridge 143:86740a56073b 1095 #endif /* _FSL_SDHC_H_*/