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TARGET_K66F/TOOLCHAIN_IAR/fsl_lptmr.h@171:3a7713b1edbc, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:45:42 2018 +0000
Revision:
171:3a7713b1edbc
Parent:
TARGET_RO359B/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/drivers/fsl_lptmr.h@143:86740a56073b 
mbed library. Release version 164

Who changed what in which revision?

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AnnaBridge 143:86740a56073b 1 /*
AnnaBridge 143:86740a56073b 2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
AnnaBridge 143:86740a56073b 3 * Copyright 2016-2017 NXP
AnnaBridge 143:86740a56073b 4 *
AnnaBridge 143:86740a56073b 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 143:86740a56073b 6 * are permitted provided that the following conditions are met:
AnnaBridge 143:86740a56073b 7 *
AnnaBridge 143:86740a56073b 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 143:86740a56073b 9 * of conditions and the following disclaimer.
AnnaBridge 143:86740a56073b 10 *
AnnaBridge 143:86740a56073b 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 143:86740a56073b 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 143:86740a56073b 13 * other materials provided with the distribution.
AnnaBridge 143:86740a56073b 14 *
AnnaBridge 143:86740a56073b 15 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 143:86740a56073b 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 143:86740a56073b 17 * software without specific prior written permission.
AnnaBridge 143:86740a56073b 18 *
AnnaBridge 143:86740a56073b 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 143:86740a56073b 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 143:86740a56073b 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 143:86740a56073b 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 143:86740a56073b 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 143:86740a56073b 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 143:86740a56073b 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 143:86740a56073b 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 143:86740a56073b 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 143:86740a56073b 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 143:86740a56073b 29 */
AnnaBridge 143:86740a56073b 30 #ifndef _FSL_LPTMR_H_
AnnaBridge 143:86740a56073b 31 #define _FSL_LPTMR_H_
AnnaBridge 143:86740a56073b 32
AnnaBridge 143:86740a56073b 33 #include "fsl_common.h"
AnnaBridge 143:86740a56073b 34
AnnaBridge 143:86740a56073b 35 /*!
AnnaBridge 143:86740a56073b 36 * @addtogroup lptmr
AnnaBridge 143:86740a56073b 37 * @{
AnnaBridge 143:86740a56073b 38 */
AnnaBridge 143:86740a56073b 39
AnnaBridge 143:86740a56073b 40 /*******************************************************************************
AnnaBridge 143:86740a56073b 41 * Definitions
AnnaBridge 143:86740a56073b 42 ******************************************************************************/
AnnaBridge 143:86740a56073b 43
AnnaBridge 143:86740a56073b 44 /*! @name Driver version */
AnnaBridge 143:86740a56073b 45 /*@{*/
AnnaBridge 143:86740a56073b 46 #define FSL_LPTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) /*!< Version 2.0.1 */
AnnaBridge 143:86740a56073b 47 /*@}*/
AnnaBridge 143:86740a56073b 48
AnnaBridge 143:86740a56073b 49 /*! @brief LPTMR pin selection used in pulse counter mode.*/
AnnaBridge 143:86740a56073b 50 typedef enum _lptmr_pin_select
AnnaBridge 143:86740a56073b 51 {
AnnaBridge 143:86740a56073b 52 kLPTMR_PinSelectInput_0 = 0x0U, /*!< Pulse counter input 0 is selected */
AnnaBridge 143:86740a56073b 53 kLPTMR_PinSelectInput_1 = 0x1U, /*!< Pulse counter input 1 is selected */
AnnaBridge 143:86740a56073b 54 kLPTMR_PinSelectInput_2 = 0x2U, /*!< Pulse counter input 2 is selected */
AnnaBridge 143:86740a56073b 55 kLPTMR_PinSelectInput_3 = 0x3U /*!< Pulse counter input 3 is selected */
AnnaBridge 143:86740a56073b 56 } lptmr_pin_select_t;
AnnaBridge 143:86740a56073b 57
AnnaBridge 143:86740a56073b 58 /*! @brief LPTMR pin polarity used in pulse counter mode.*/
AnnaBridge 143:86740a56073b 59 typedef enum _lptmr_pin_polarity
AnnaBridge 143:86740a56073b 60 {
AnnaBridge 143:86740a56073b 61 kLPTMR_PinPolarityActiveHigh = 0x0U, /*!< Pulse Counter input source is active-high */
AnnaBridge 143:86740a56073b 62 kLPTMR_PinPolarityActiveLow = 0x1U /*!< Pulse Counter input source is active-low */
AnnaBridge 143:86740a56073b 63 } lptmr_pin_polarity_t;
AnnaBridge 143:86740a56073b 64
AnnaBridge 143:86740a56073b 65 /*! @brief LPTMR timer mode selection.*/
AnnaBridge 143:86740a56073b 66 typedef enum _lptmr_timer_mode
AnnaBridge 143:86740a56073b 67 {
AnnaBridge 143:86740a56073b 68 kLPTMR_TimerModeTimeCounter = 0x0U, /*!< Time Counter mode */
AnnaBridge 143:86740a56073b 69 kLPTMR_TimerModePulseCounter = 0x1U /*!< Pulse Counter mode */
AnnaBridge 143:86740a56073b 70 } lptmr_timer_mode_t;
AnnaBridge 143:86740a56073b 71
AnnaBridge 143:86740a56073b 72 /*! @brief LPTMR prescaler/glitch filter values*/
AnnaBridge 143:86740a56073b 73 typedef enum _lptmr_prescaler_glitch_value
AnnaBridge 143:86740a56073b 74 {
AnnaBridge 143:86740a56073b 75 kLPTMR_Prescale_Glitch_0 = 0x0U, /*!< Prescaler divide 2, glitch filter does not support this setting */
AnnaBridge 143:86740a56073b 76 kLPTMR_Prescale_Glitch_1 = 0x1U, /*!< Prescaler divide 4, glitch filter 2 */
AnnaBridge 143:86740a56073b 77 kLPTMR_Prescale_Glitch_2 = 0x2U, /*!< Prescaler divide 8, glitch filter 4 */
AnnaBridge 143:86740a56073b 78 kLPTMR_Prescale_Glitch_3 = 0x3U, /*!< Prescaler divide 16, glitch filter 8 */
AnnaBridge 143:86740a56073b 79 kLPTMR_Prescale_Glitch_4 = 0x4U, /*!< Prescaler divide 32, glitch filter 16 */
AnnaBridge 143:86740a56073b 80 kLPTMR_Prescale_Glitch_5 = 0x5U, /*!< Prescaler divide 64, glitch filter 32 */
AnnaBridge 143:86740a56073b 81 kLPTMR_Prescale_Glitch_6 = 0x6U, /*!< Prescaler divide 128, glitch filter 64 */
AnnaBridge 143:86740a56073b 82 kLPTMR_Prescale_Glitch_7 = 0x7U, /*!< Prescaler divide 256, glitch filter 128 */
AnnaBridge 143:86740a56073b 83 kLPTMR_Prescale_Glitch_8 = 0x8U, /*!< Prescaler divide 512, glitch filter 256 */
AnnaBridge 143:86740a56073b 84 kLPTMR_Prescale_Glitch_9 = 0x9U, /*!< Prescaler divide 1024, glitch filter 512*/
AnnaBridge 143:86740a56073b 85 kLPTMR_Prescale_Glitch_10 = 0xAU, /*!< Prescaler divide 2048 glitch filter 1024 */
AnnaBridge 143:86740a56073b 86 kLPTMR_Prescale_Glitch_11 = 0xBU, /*!< Prescaler divide 4096, glitch filter 2048 */
AnnaBridge 143:86740a56073b 87 kLPTMR_Prescale_Glitch_12 = 0xCU, /*!< Prescaler divide 8192, glitch filter 4096 */
AnnaBridge 143:86740a56073b 88 kLPTMR_Prescale_Glitch_13 = 0xDU, /*!< Prescaler divide 16384, glitch filter 8192 */
AnnaBridge 143:86740a56073b 89 kLPTMR_Prescale_Glitch_14 = 0xEU, /*!< Prescaler divide 32768, glitch filter 16384 */
AnnaBridge 143:86740a56073b 90 kLPTMR_Prescale_Glitch_15 = 0xFU /*!< Prescaler divide 65536, glitch filter 32768 */
AnnaBridge 143:86740a56073b 91 } lptmr_prescaler_glitch_value_t;
AnnaBridge 143:86740a56073b 92
AnnaBridge 143:86740a56073b 93 /*!
AnnaBridge 143:86740a56073b 94 * @brief LPTMR prescaler/glitch filter clock select.
AnnaBridge 143:86740a56073b 95 * @note Clock connections are SoC-specific
AnnaBridge 143:86740a56073b 96 */
AnnaBridge 143:86740a56073b 97 typedef enum _lptmr_prescaler_clock_select
AnnaBridge 143:86740a56073b 98 {
AnnaBridge 143:86740a56073b 99 kLPTMR_PrescalerClock_0 = 0x0U, /*!< Prescaler/glitch filter clock 0 selected. */
AnnaBridge 143:86740a56073b 100 kLPTMR_PrescalerClock_1 = 0x1U, /*!< Prescaler/glitch filter clock 1 selected. */
AnnaBridge 143:86740a56073b 101 kLPTMR_PrescalerClock_2 = 0x2U, /*!< Prescaler/glitch filter clock 2 selected. */
AnnaBridge 143:86740a56073b 102 kLPTMR_PrescalerClock_3 = 0x3U, /*!< Prescaler/glitch filter clock 3 selected. */
AnnaBridge 143:86740a56073b 103 } lptmr_prescaler_clock_select_t;
AnnaBridge 143:86740a56073b 104
AnnaBridge 143:86740a56073b 105 /*! @brief List of the LPTMR interrupts */
AnnaBridge 143:86740a56073b 106 typedef enum _lptmr_interrupt_enable
AnnaBridge 143:86740a56073b 107 {
AnnaBridge 143:86740a56073b 108 kLPTMR_TimerInterruptEnable = LPTMR_CSR_TIE_MASK, /*!< Timer interrupt enable */
AnnaBridge 143:86740a56073b 109 } lptmr_interrupt_enable_t;
AnnaBridge 143:86740a56073b 110
AnnaBridge 143:86740a56073b 111 /*! @brief List of the LPTMR status flags */
AnnaBridge 143:86740a56073b 112 typedef enum _lptmr_status_flags
AnnaBridge 143:86740a56073b 113 {
AnnaBridge 143:86740a56073b 114 kLPTMR_TimerCompareFlag = LPTMR_CSR_TCF_MASK, /*!< Timer compare flag */
AnnaBridge 143:86740a56073b 115 } lptmr_status_flags_t;
AnnaBridge 143:86740a56073b 116
AnnaBridge 143:86740a56073b 117 /*!
AnnaBridge 143:86740a56073b 118 * @brief LPTMR config structure
AnnaBridge 143:86740a56073b 119 *
AnnaBridge 143:86740a56073b 120 * This structure holds the configuration settings for the LPTMR peripheral. To initialize this
AnnaBridge 143:86740a56073b 121 * structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a
AnnaBridge 143:86740a56073b 122 * pointer to your configuration structure instance.
AnnaBridge 143:86740a56073b 123 *
AnnaBridge 143:86740a56073b 124 * The configuration struct can be made constant so it resides in flash.
AnnaBridge 143:86740a56073b 125 */
AnnaBridge 143:86740a56073b 126 typedef struct _lptmr_config
AnnaBridge 143:86740a56073b 127 {
AnnaBridge 143:86740a56073b 128 lptmr_timer_mode_t timerMode; /*!< Time counter mode or pulse counter mode */
AnnaBridge 143:86740a56073b 129 lptmr_pin_select_t pinSelect; /*!< LPTMR pulse input pin select; used only in pulse counter mode */
AnnaBridge 143:86740a56073b 130 lptmr_pin_polarity_t pinPolarity; /*!< LPTMR pulse input pin polarity; used only in pulse counter mode */
AnnaBridge 143:86740a56073b 131 bool enableFreeRunning; /*!< True: enable free running, counter is reset on overflow
AnnaBridge 143:86740a56073b 132 False: counter is reset when the compare flag is set */
AnnaBridge 143:86740a56073b 133 bool bypassPrescaler; /*!< True: bypass prescaler; false: use clock from prescaler */
AnnaBridge 143:86740a56073b 134 lptmr_prescaler_clock_select_t prescalerClockSource; /*!< LPTMR clock source */
AnnaBridge 143:86740a56073b 135 lptmr_prescaler_glitch_value_t value; /*!< Prescaler or glitch filter value */
AnnaBridge 143:86740a56073b 136 } lptmr_config_t;
AnnaBridge 143:86740a56073b 137
AnnaBridge 143:86740a56073b 138 /*******************************************************************************
AnnaBridge 143:86740a56073b 139 * API
AnnaBridge 143:86740a56073b 140 ******************************************************************************/
AnnaBridge 143:86740a56073b 141
AnnaBridge 143:86740a56073b 142 #if defined(__cplusplus)
AnnaBridge 143:86740a56073b 143 extern "C" {
AnnaBridge 143:86740a56073b 144 #endif
AnnaBridge 143:86740a56073b 145
AnnaBridge 143:86740a56073b 146 /*!
AnnaBridge 143:86740a56073b 147 * @name Initialization and deinitialization
AnnaBridge 143:86740a56073b 148 * @{
AnnaBridge 143:86740a56073b 149 */
AnnaBridge 143:86740a56073b 150
AnnaBridge 143:86740a56073b 151 /*!
AnnaBridge 143:86740a56073b 152 * @brief Ungates the LPTMR clock and configures the peripheral for a basic operation.
AnnaBridge 143:86740a56073b 153 *
AnnaBridge 143:86740a56073b 154 * @note This API should be called at the beginning of the application using the LPTMR driver.
AnnaBridge 143:86740a56073b 155 *
AnnaBridge 143:86740a56073b 156 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 157 * @param config A pointer to the LPTMR configuration structure.
AnnaBridge 143:86740a56073b 158 */
AnnaBridge 143:86740a56073b 159 void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config);
AnnaBridge 143:86740a56073b 160
AnnaBridge 143:86740a56073b 161 /*!
AnnaBridge 143:86740a56073b 162 * @brief Gates the LPTMR clock.
AnnaBridge 143:86740a56073b 163 *
AnnaBridge 143:86740a56073b 164 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 165 */
AnnaBridge 143:86740a56073b 166 void LPTMR_Deinit(LPTMR_Type *base);
AnnaBridge 143:86740a56073b 167
AnnaBridge 143:86740a56073b 168 /*!
AnnaBridge 143:86740a56073b 169 * @brief Fills in the LPTMR configuration structure with default settings.
AnnaBridge 143:86740a56073b 170 *
AnnaBridge 143:86740a56073b 171 * The default values are as follows.
AnnaBridge 143:86740a56073b 172 * @code
AnnaBridge 143:86740a56073b 173 * config->timerMode = kLPTMR_TimerModeTimeCounter;
AnnaBridge 143:86740a56073b 174 * config->pinSelect = kLPTMR_PinSelectInput_0;
AnnaBridge 143:86740a56073b 175 * config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
AnnaBridge 143:86740a56073b 176 * config->enableFreeRunning = false;
AnnaBridge 143:86740a56073b 177 * config->bypassPrescaler = true;
AnnaBridge 143:86740a56073b 178 * config->prescalerClockSource = kLPTMR_PrescalerClock_1;
AnnaBridge 143:86740a56073b 179 * config->value = kLPTMR_Prescale_Glitch_0;
AnnaBridge 143:86740a56073b 180 * @endcode
AnnaBridge 143:86740a56073b 181 * @param config A pointer to the LPTMR configuration structure.
AnnaBridge 143:86740a56073b 182 */
AnnaBridge 143:86740a56073b 183 void LPTMR_GetDefaultConfig(lptmr_config_t *config);
AnnaBridge 143:86740a56073b 184
AnnaBridge 143:86740a56073b 185 /*! @}*/
AnnaBridge 143:86740a56073b 186
AnnaBridge 143:86740a56073b 187 /*!
AnnaBridge 143:86740a56073b 188 * @name Interrupt Interface
AnnaBridge 143:86740a56073b 189 * @{
AnnaBridge 143:86740a56073b 190 */
AnnaBridge 143:86740a56073b 191
AnnaBridge 143:86740a56073b 192 /*!
AnnaBridge 143:86740a56073b 193 * @brief Enables the selected LPTMR interrupts.
AnnaBridge 143:86740a56073b 194 *
AnnaBridge 143:86740a56073b 195 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 196 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 143:86740a56073b 197 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 143:86740a56073b 198 */
AnnaBridge 143:86740a56073b 199 static inline void LPTMR_EnableInterrupts(LPTMR_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 200 {
AnnaBridge 143:86740a56073b 201 uint32_t reg = base->CSR;
AnnaBridge 143:86740a56073b 202
AnnaBridge 143:86740a56073b 203 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 143:86740a56073b 204 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 143:86740a56073b 205 reg |= mask;
AnnaBridge 143:86740a56073b 206 base->CSR = reg;
AnnaBridge 143:86740a56073b 207 }
AnnaBridge 143:86740a56073b 208
AnnaBridge 143:86740a56073b 209 /*!
AnnaBridge 143:86740a56073b 210 * @brief Disables the selected LPTMR interrupts.
AnnaBridge 143:86740a56073b 211 *
AnnaBridge 143:86740a56073b 212 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 213 * @param mask The interrupts to disable. This is a logical OR of members of the
AnnaBridge 143:86740a56073b 214 * enumeration ::lptmr_interrupt_enable_t.
AnnaBridge 143:86740a56073b 215 */
AnnaBridge 143:86740a56073b 216 static inline void LPTMR_DisableInterrupts(LPTMR_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 217 {
AnnaBridge 143:86740a56073b 218 uint32_t reg = base->CSR;
AnnaBridge 143:86740a56073b 219
AnnaBridge 143:86740a56073b 220 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 143:86740a56073b 221 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 143:86740a56073b 222 reg &= ~mask;
AnnaBridge 143:86740a56073b 223 base->CSR = reg;
AnnaBridge 143:86740a56073b 224 }
AnnaBridge 143:86740a56073b 225
AnnaBridge 143:86740a56073b 226 /*!
AnnaBridge 143:86740a56073b 227 * @brief Gets the enabled LPTMR interrupts.
AnnaBridge 143:86740a56073b 228 *
AnnaBridge 143:86740a56073b 229 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 230 *
AnnaBridge 143:86740a56073b 231 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 143:86740a56073b 232 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 143:86740a56073b 233 */
AnnaBridge 143:86740a56073b 234 static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type *base)
AnnaBridge 143:86740a56073b 235 {
AnnaBridge 143:86740a56073b 236 return (base->CSR & LPTMR_CSR_TIE_MASK);
AnnaBridge 143:86740a56073b 237 }
AnnaBridge 143:86740a56073b 238
AnnaBridge 143:86740a56073b 239 /*! @}*/
AnnaBridge 143:86740a56073b 240
AnnaBridge 143:86740a56073b 241 /*!
AnnaBridge 143:86740a56073b 242 * @name Status Interface
AnnaBridge 143:86740a56073b 243 * @{
AnnaBridge 143:86740a56073b 244 */
AnnaBridge 143:86740a56073b 245
AnnaBridge 143:86740a56073b 246 /*!
AnnaBridge 143:86740a56073b 247 * @brief Gets the LPTMR status flags.
AnnaBridge 143:86740a56073b 248 *
AnnaBridge 143:86740a56073b 249 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 250 *
AnnaBridge 143:86740a56073b 251 * @return The status flags. This is the logical OR of members of the
AnnaBridge 143:86740a56073b 252 * enumeration ::lptmr_status_flags_t
AnnaBridge 143:86740a56073b 253 */
AnnaBridge 143:86740a56073b 254 static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type *base)
AnnaBridge 143:86740a56073b 255 {
AnnaBridge 143:86740a56073b 256 return (base->CSR & LPTMR_CSR_TCF_MASK);
AnnaBridge 143:86740a56073b 257 }
AnnaBridge 143:86740a56073b 258
AnnaBridge 143:86740a56073b 259 /*!
AnnaBridge 143:86740a56073b 260 * @brief Clears the LPTMR status flags.
AnnaBridge 143:86740a56073b 261 *
AnnaBridge 143:86740a56073b 262 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 263 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 143:86740a56073b 264 * enumeration ::lptmr_status_flags_t.
AnnaBridge 143:86740a56073b 265 */
AnnaBridge 143:86740a56073b 266 static inline void LPTMR_ClearStatusFlags(LPTMR_Type *base, uint32_t mask)
AnnaBridge 143:86740a56073b 267 {
AnnaBridge 143:86740a56073b 268 base->CSR |= mask;
AnnaBridge 143:86740a56073b 269 }
AnnaBridge 143:86740a56073b 270
AnnaBridge 143:86740a56073b 271 /*! @}*/
AnnaBridge 143:86740a56073b 272
AnnaBridge 143:86740a56073b 273 /*!
AnnaBridge 143:86740a56073b 274 * @name Read and write the timer period
AnnaBridge 143:86740a56073b 275 * @{
AnnaBridge 143:86740a56073b 276 */
AnnaBridge 143:86740a56073b 277
AnnaBridge 143:86740a56073b 278 /*!
AnnaBridge 143:86740a56073b 279 * @brief Sets the timer period in units of count.
AnnaBridge 143:86740a56073b 280 *
AnnaBridge 143:86740a56073b 281 * Timers counts from 0 until it equals the count value set here. The count value is written to
AnnaBridge 143:86740a56073b 282 * the CMR register.
AnnaBridge 143:86740a56073b 283 *
AnnaBridge 143:86740a56073b 284 * @note
AnnaBridge 143:86740a56073b 285 * 1. The TCF flag is set with the CNR equals the count provided here and then increments.
AnnaBridge 143:86740a56073b 286 * 2. Call the utility macros provided in the fsl_common.h to convert to ticks.
AnnaBridge 143:86740a56073b 287 *
AnnaBridge 143:86740a56073b 288 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 289 * @param ticks A timer period in units of ticks, which should be equal or greater than 1.
AnnaBridge 143:86740a56073b 290 */
AnnaBridge 143:86740a56073b 291 static inline void LPTMR_SetTimerPeriod(LPTMR_Type *base, uint32_t ticks)
AnnaBridge 143:86740a56073b 292 {
AnnaBridge 143:86740a56073b 293 assert(ticks > 0);
AnnaBridge 143:86740a56073b 294 base->CMR = ticks - 1;
AnnaBridge 143:86740a56073b 295 }
AnnaBridge 143:86740a56073b 296
AnnaBridge 143:86740a56073b 297 /*!
AnnaBridge 143:86740a56073b 298 * @brief Reads the current timer counting value.
AnnaBridge 143:86740a56073b 299 *
AnnaBridge 143:86740a56073b 300 * This function returns the real-time timer counting value in a range from 0 to a
AnnaBridge 143:86740a56073b 301 * timer period.
AnnaBridge 143:86740a56073b 302 *
AnnaBridge 143:86740a56073b 303 * @note Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.
AnnaBridge 143:86740a56073b 304 *
AnnaBridge 143:86740a56073b 305 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 306 *
AnnaBridge 143:86740a56073b 307 * @return The current counter value in ticks
AnnaBridge 143:86740a56073b 308 */
AnnaBridge 143:86740a56073b 309 static inline uint32_t LPTMR_GetCurrentTimerCount(LPTMR_Type *base)
AnnaBridge 143:86740a56073b 310 {
AnnaBridge 143:86740a56073b 311 /* Must first write any value to the CNR. This synchronizes and registers the current value
AnnaBridge 143:86740a56073b 312 * of the CNR into a temporary register which can then be read
AnnaBridge 143:86740a56073b 313 */
AnnaBridge 143:86740a56073b 314 base->CNR = 0U;
AnnaBridge 143:86740a56073b 315 return (uint32_t)((base->CNR & LPTMR_CNR_COUNTER_MASK) >> LPTMR_CNR_COUNTER_SHIFT);
AnnaBridge 143:86740a56073b 316 }
AnnaBridge 143:86740a56073b 317
AnnaBridge 143:86740a56073b 318 /*! @}*/
AnnaBridge 143:86740a56073b 319
AnnaBridge 143:86740a56073b 320 /*!
AnnaBridge 143:86740a56073b 321 * @name Timer Start and Stop
AnnaBridge 143:86740a56073b 322 * @{
AnnaBridge 143:86740a56073b 323 */
AnnaBridge 143:86740a56073b 324
AnnaBridge 143:86740a56073b 325 /*!
AnnaBridge 143:86740a56073b 326 * @brief Starts the timer.
AnnaBridge 143:86740a56073b 327 *
AnnaBridge 143:86740a56073b 328 * After calling this function, the timer counts up to the CMR register value.
AnnaBridge 143:86740a56073b 329 * Each time the timer reaches the CMR value and then increments, it generates a
AnnaBridge 143:86740a56073b 330 * trigger pulse and sets the timeout interrupt flag. An interrupt is also
AnnaBridge 143:86740a56073b 331 * triggered if the timer interrupt is enabled.
AnnaBridge 143:86740a56073b 332 *
AnnaBridge 143:86740a56073b 333 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 334 */
AnnaBridge 143:86740a56073b 335 static inline void LPTMR_StartTimer(LPTMR_Type *base)
AnnaBridge 143:86740a56073b 336 {
AnnaBridge 143:86740a56073b 337 uint32_t reg = base->CSR;
AnnaBridge 143:86740a56073b 338
AnnaBridge 143:86740a56073b 339 /* Clear the TCF bit to avoid clearing the w1c bit when writing back. */
AnnaBridge 143:86740a56073b 340 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 143:86740a56073b 341 reg |= LPTMR_CSR_TEN_MASK;
AnnaBridge 143:86740a56073b 342 base->CSR = reg;
AnnaBridge 143:86740a56073b 343 }
AnnaBridge 143:86740a56073b 344
AnnaBridge 143:86740a56073b 345 /*!
AnnaBridge 143:86740a56073b 346 * @brief Stops the timer.
AnnaBridge 143:86740a56073b 347 *
AnnaBridge 143:86740a56073b 348 * This function stops the timer and resets the timer's counter register.
AnnaBridge 143:86740a56073b 349 *
AnnaBridge 143:86740a56073b 350 * @param base LPTMR peripheral base address
AnnaBridge 143:86740a56073b 351 */
AnnaBridge 143:86740a56073b 352 static inline void LPTMR_StopTimer(LPTMR_Type *base)
AnnaBridge 143:86740a56073b 353 {
AnnaBridge 143:86740a56073b 354 uint32_t reg = base->CSR;
AnnaBridge 143:86740a56073b 355
AnnaBridge 143:86740a56073b 356 /* Clear the TCF bit to avoid clearing the w1c bit when writing back. */
AnnaBridge 143:86740a56073b 357 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 143:86740a56073b 358 reg &= ~LPTMR_CSR_TEN_MASK;
AnnaBridge 143:86740a56073b 359 base->CSR = reg;
AnnaBridge 143:86740a56073b 360 }
AnnaBridge 143:86740a56073b 361
AnnaBridge 143:86740a56073b 362 /*! @}*/
AnnaBridge 143:86740a56073b 363
AnnaBridge 143:86740a56073b 364 #if defined(__cplusplus)
AnnaBridge 143:86740a56073b 365 }
AnnaBridge 143:86740a56073b 366 #endif
AnnaBridge 143:86740a56073b 367
AnnaBridge 143:86740a56073b 368 /*! @}*/
AnnaBridge 143:86740a56073b 369
AnnaBridge 143:86740a56073b 370 #endif /* _FSL_LPTMR_H_ */