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TARGET_EFM32PG12_STK3402/TOOLCHAIN_IAR/device_peripherals.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /***************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 2 | * @file device_peripherals.h |
AnnaBridge | 171:3a7713b1edbc | 3 | ******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 4 | * @section License |
AnnaBridge | 171:3a7713b1edbc | 5 | * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b> |
AnnaBridge | 171:3a7713b1edbc | 6 | ******************************************************************************* |
AnnaBridge | 171:3a7713b1edbc | 7 | * |
AnnaBridge | 171:3a7713b1edbc | 8 | * SPDX-License-Identifier: Apache-2.0 |
AnnaBridge | 171:3a7713b1edbc | 9 | * |
AnnaBridge | 171:3a7713b1edbc | 10 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
AnnaBridge | 171:3a7713b1edbc | 11 | * not use this file except in compliance with the License. |
AnnaBridge | 171:3a7713b1edbc | 12 | * You may obtain a copy of the License at |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 171:3a7713b1edbc | 15 | * |
AnnaBridge | 171:3a7713b1edbc | 16 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 171:3a7713b1edbc | 17 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
AnnaBridge | 171:3a7713b1edbc | 18 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 171:3a7713b1edbc | 19 | * See the License for the specific language governing permissions and |
AnnaBridge | 171:3a7713b1edbc | 20 | * limitations under the License. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 23 | #ifndef MBED_DEVICE_PERIPHERALS_H |
AnnaBridge | 171:3a7713b1edbc | 24 | #define MBED_DEVICE_PERIPHERALS_H |
AnnaBridge | 171:3a7713b1edbc | 25 | |
AnnaBridge | 171:3a7713b1edbc | 26 | /* us ticker */ |
AnnaBridge | 171:3a7713b1edbc | 27 | #define US_TICKER_TIMER TIMER0 |
AnnaBridge | 171:3a7713b1edbc | 28 | #define US_TICKER_TIMER_CLOCK cmuClock_TIMER0 |
AnnaBridge | 171:3a7713b1edbc | 29 | #define US_TICKER_TIMER_IRQ TIMER0_IRQn |
AnnaBridge | 171:3a7713b1edbc | 30 | |
AnnaBridge | 171:3a7713b1edbc | 31 | /* PWM */ |
AnnaBridge | 171:3a7713b1edbc | 32 | #define PWM_TIMER TIMER1 |
AnnaBridge | 171:3a7713b1edbc | 33 | #define PWM_TIMER_CLOCK cmuClock_TIMER1 |
AnnaBridge | 171:3a7713b1edbc | 34 | #define PWM_ROUTE TIMER_ROUTE_LOCATION_LOC1 |
AnnaBridge | 171:3a7713b1edbc | 35 | |
AnnaBridge | 171:3a7713b1edbc | 36 | /* Crystal calibration */ |
AnnaBridge | 171:3a7713b1edbc | 37 | #if !defined(CMU_HFXOINIT_STK_DEFAULT) |
AnnaBridge | 171:3a7713b1edbc | 38 | #define CMU_HFXOINIT_STK_DEFAULT \ |
AnnaBridge | 171:3a7713b1edbc | 39 | { \ |
AnnaBridge | 171:3a7713b1edbc | 40 | true, /* Low-power mode for EFM32 */ \ |
AnnaBridge | 171:3a7713b1edbc | 41 | false, /* Disable auto-start on EM0/1 entry */ \ |
AnnaBridge | 171:3a7713b1edbc | 42 | false, /* Disable auto-select on EM0/1 entry */ \ |
AnnaBridge | 171:3a7713b1edbc | 43 | false, /* Disable auto-start and select on RAC wakeup */ \ |
AnnaBridge | 171:3a7713b1edbc | 44 | _CMU_HFXOSTARTUPCTRL_CTUNE_DEFAULT, \ |
AnnaBridge | 171:3a7713b1edbc | 45 | 0x142, /* Steady-state CTUNE for STK boards without load caps */ \ |
AnnaBridge | 171:3a7713b1edbc | 46 | _CMU_HFXOSTEADYSTATECTRL_REGISH_DEFAULT, \ |
AnnaBridge | 171:3a7713b1edbc | 47 | 0x20, /* Matching errata fix in CHIP_Init() */ \ |
AnnaBridge | 171:3a7713b1edbc | 48 | 0x7, /* Recommended steady-state osc core bias current */ \ |
AnnaBridge | 171:3a7713b1edbc | 49 | 0x6, /* Recommended peak detection threshold */ \ |
AnnaBridge | 171:3a7713b1edbc | 50 | _CMU_HFXOTIMEOUTCTRL_SHUNTOPTTIMEOUT_DEFAULT, \ |
AnnaBridge | 171:3a7713b1edbc | 51 | 0xA, /* Recommended peak detection timeout */ \ |
AnnaBridge | 171:3a7713b1edbc | 52 | 0x4, /* Recommended steady timeout */ \ |
AnnaBridge | 171:3a7713b1edbc | 53 | _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_DEFAULT, \ |
AnnaBridge | 171:3a7713b1edbc | 54 | cmuOscMode_Crystal, \ |
AnnaBridge | 171:3a7713b1edbc | 55 | } |
AnnaBridge | 171:3a7713b1edbc | 56 | #endif |
AnnaBridge | 171:3a7713b1edbc | 57 | |
AnnaBridge | 171:3a7713b1edbc | 58 | /* DCDC settings */ |
AnnaBridge | 171:3a7713b1edbc | 59 | #if !defined(EMU_DCDCINIT_STK_DEFAULT) |
AnnaBridge | 171:3a7713b1edbc | 60 | #define EMU_DCDCINIT_STK_DEFAULT EMU_DCDCINIT_DEFAULT |
AnnaBridge | 171:3a7713b1edbc | 61 | #endif |
AnnaBridge | 171:3a7713b1edbc | 62 | #endif |