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TARGET_EFM32HG_STK3400/TOOLCHAIN_IAR/efm32hg_aes.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 2 | * @file efm32hg_aes.h |
AnnaBridge | 171:3a7713b1edbc | 3 | * @brief EFM32HG_AES register and bit field definitions |
AnnaBridge | 171:3a7713b1edbc | 4 | * @version 5.1.2 |
AnnaBridge | 171:3a7713b1edbc | 5 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 6 | * @section License |
AnnaBridge | 171:3a7713b1edbc | 7 | * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b> |
AnnaBridge | 171:3a7713b1edbc | 8 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 9 | * |
AnnaBridge | 171:3a7713b1edbc | 10 | * Permission is granted to anyone to use this software for any purpose, |
AnnaBridge | 171:3a7713b1edbc | 11 | * including commercial applications, and to alter it and redistribute it |
AnnaBridge | 171:3a7713b1edbc | 12 | * freely, subject to the following restrictions: |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * 1. The origin of this software must not be misrepresented; you must not |
AnnaBridge | 171:3a7713b1edbc | 15 | * claim that you wrote the original software.@n |
AnnaBridge | 171:3a7713b1edbc | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
AnnaBridge | 171:3a7713b1edbc | 17 | * misrepresented as being the original software.@n |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. This notice may not be removed or altered from any source distribution. |
AnnaBridge | 171:3a7713b1edbc | 19 | * |
AnnaBridge | 171:3a7713b1edbc | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. |
AnnaBridge | 171:3a7713b1edbc | 21 | * has no obligation to support this Software. Silicon Laboratories, Inc. is |
AnnaBridge | 171:3a7713b1edbc | 22 | * providing the Software "AS IS", with no express or implied warranties of any |
AnnaBridge | 171:3a7713b1edbc | 23 | * kind, including, but not limited to, any implied warranties of |
AnnaBridge | 171:3a7713b1edbc | 24 | * merchantability or fitness for any particular purpose or warranties against |
AnnaBridge | 171:3a7713b1edbc | 25 | * infringement of any proprietary rights of a third party. |
AnnaBridge | 171:3a7713b1edbc | 26 | * |
AnnaBridge | 171:3a7713b1edbc | 27 | * Silicon Laboratories, Inc. will not be liable for any consequential, |
AnnaBridge | 171:3a7713b1edbc | 28 | * incidental, or special damages, or any other relief, or for any claim by |
AnnaBridge | 171:3a7713b1edbc | 29 | * any third party, arising from your use of this Software. |
AnnaBridge | 171:3a7713b1edbc | 30 | * |
AnnaBridge | 171:3a7713b1edbc | 31 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 32 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 33 | * @addtogroup Parts |
AnnaBridge | 171:3a7713b1edbc | 34 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 35 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 36 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 37 | * @defgroup EFM32HG_AES |
AnnaBridge | 171:3a7713b1edbc | 38 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 39 | * @brief EFM32HG_AES Register Declaration |
AnnaBridge | 171:3a7713b1edbc | 40 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 41 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 42 | { |
AnnaBridge | 171:3a7713b1edbc | 43 | __IOM uint32_t CTRL; /**< Control Register */ |
AnnaBridge | 171:3a7713b1edbc | 44 | __IOM uint32_t CMD; /**< Command Register */ |
AnnaBridge | 171:3a7713b1edbc | 45 | __IM uint32_t STATUS; /**< Status Register */ |
AnnaBridge | 171:3a7713b1edbc | 46 | __IOM uint32_t IEN; /**< Interrupt Enable Register */ |
AnnaBridge | 171:3a7713b1edbc | 47 | __IM uint32_t IF; /**< Interrupt Flag Register */ |
AnnaBridge | 171:3a7713b1edbc | 48 | __IOM uint32_t IFS; /**< Interrupt Flag Set Register */ |
AnnaBridge | 171:3a7713b1edbc | 49 | __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */ |
AnnaBridge | 171:3a7713b1edbc | 50 | __IOM uint32_t DATA; /**< DATA Register */ |
AnnaBridge | 171:3a7713b1edbc | 51 | __IOM uint32_t XORDATA; /**< XORDATA Register */ |
AnnaBridge | 171:3a7713b1edbc | 52 | uint32_t RESERVED0[3]; /**< Reserved for future use **/ |
AnnaBridge | 171:3a7713b1edbc | 53 | __IOM uint32_t KEYLA; /**< KEY Low Register */ |
AnnaBridge | 171:3a7713b1edbc | 54 | __IOM uint32_t KEYLB; /**< KEY Low Register */ |
AnnaBridge | 171:3a7713b1edbc | 55 | __IOM uint32_t KEYLC; /**< KEY Low Register */ |
AnnaBridge | 171:3a7713b1edbc | 56 | __IOM uint32_t KEYLD; /**< KEY Low Register */ |
AnnaBridge | 171:3a7713b1edbc | 57 | } AES_TypeDef; /** @} */ |
AnnaBridge | 171:3a7713b1edbc | 58 | |
AnnaBridge | 171:3a7713b1edbc | 59 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 60 | * @defgroup EFM32HG_AES_BitFields |
AnnaBridge | 171:3a7713b1edbc | 61 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 62 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 63 | |
AnnaBridge | 171:3a7713b1edbc | 64 | /* Bit fields for AES CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 65 | #define _AES_CTRL_RESETVALUE 0x00000000UL /**< Default value for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 66 | #define _AES_CTRL_MASK 0x00000071UL /**< Mask for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 67 | #define AES_CTRL_DECRYPT (0x1UL << 0) /**< Decryption/Encryption Mode */ |
AnnaBridge | 171:3a7713b1edbc | 68 | #define _AES_CTRL_DECRYPT_SHIFT 0 /**< Shift value for AES_DECRYPT */ |
AnnaBridge | 171:3a7713b1edbc | 69 | #define _AES_CTRL_DECRYPT_MASK 0x1UL /**< Bit mask for AES_DECRYPT */ |
AnnaBridge | 171:3a7713b1edbc | 70 | #define _AES_CTRL_DECRYPT_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 71 | #define AES_CTRL_DECRYPT_DEFAULT (_AES_CTRL_DECRYPT_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 72 | #define AES_CTRL_DATASTART (0x1UL << 4) /**< AES_DATA Write Start */ |
AnnaBridge | 171:3a7713b1edbc | 73 | #define _AES_CTRL_DATASTART_SHIFT 4 /**< Shift value for AES_DATASTART */ |
AnnaBridge | 171:3a7713b1edbc | 74 | #define _AES_CTRL_DATASTART_MASK 0x10UL /**< Bit mask for AES_DATASTART */ |
AnnaBridge | 171:3a7713b1edbc | 75 | #define _AES_CTRL_DATASTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 76 | #define AES_CTRL_DATASTART_DEFAULT (_AES_CTRL_DATASTART_DEFAULT << 4) /**< Shifted mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 77 | #define AES_CTRL_XORSTART (0x1UL << 5) /**< AES_XORDATA Write Start */ |
AnnaBridge | 171:3a7713b1edbc | 78 | #define _AES_CTRL_XORSTART_SHIFT 5 /**< Shift value for AES_XORSTART */ |
AnnaBridge | 171:3a7713b1edbc | 79 | #define _AES_CTRL_XORSTART_MASK 0x20UL /**< Bit mask for AES_XORSTART */ |
AnnaBridge | 171:3a7713b1edbc | 80 | #define _AES_CTRL_XORSTART_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 81 | #define AES_CTRL_XORSTART_DEFAULT (_AES_CTRL_XORSTART_DEFAULT << 5) /**< Shifted mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 82 | #define AES_CTRL_BYTEORDER (0x1UL << 6) /**< Configure byte order in data and key registers */ |
AnnaBridge | 171:3a7713b1edbc | 83 | #define _AES_CTRL_BYTEORDER_SHIFT 6 /**< Shift value for AES_BYTEORDER */ |
AnnaBridge | 171:3a7713b1edbc | 84 | #define _AES_CTRL_BYTEORDER_MASK 0x40UL /**< Bit mask for AES_BYTEORDER */ |
AnnaBridge | 171:3a7713b1edbc | 85 | #define _AES_CTRL_BYTEORDER_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 86 | #define AES_CTRL_BYTEORDER_DEFAULT (_AES_CTRL_BYTEORDER_DEFAULT << 6) /**< Shifted mode DEFAULT for AES_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 87 | |
AnnaBridge | 171:3a7713b1edbc | 88 | /* Bit fields for AES CMD */ |
AnnaBridge | 171:3a7713b1edbc | 89 | #define _AES_CMD_RESETVALUE 0x00000000UL /**< Default value for AES_CMD */ |
AnnaBridge | 171:3a7713b1edbc | 90 | #define _AES_CMD_MASK 0x00000003UL /**< Mask for AES_CMD */ |
AnnaBridge | 171:3a7713b1edbc | 91 | #define AES_CMD_START (0x1UL << 0) /**< Encryption/Decryption Start */ |
AnnaBridge | 171:3a7713b1edbc | 92 | #define _AES_CMD_START_SHIFT 0 /**< Shift value for AES_START */ |
AnnaBridge | 171:3a7713b1edbc | 93 | #define _AES_CMD_START_MASK 0x1UL /**< Bit mask for AES_START */ |
AnnaBridge | 171:3a7713b1edbc | 94 | #define _AES_CMD_START_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CMD */ |
AnnaBridge | 171:3a7713b1edbc | 95 | #define AES_CMD_START_DEFAULT (_AES_CMD_START_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_CMD */ |
AnnaBridge | 171:3a7713b1edbc | 96 | #define AES_CMD_STOP (0x1UL << 1) /**< Encryption/Decryption Stop */ |
AnnaBridge | 171:3a7713b1edbc | 97 | #define _AES_CMD_STOP_SHIFT 1 /**< Shift value for AES_STOP */ |
AnnaBridge | 171:3a7713b1edbc | 98 | #define _AES_CMD_STOP_MASK 0x2UL /**< Bit mask for AES_STOP */ |
AnnaBridge | 171:3a7713b1edbc | 99 | #define _AES_CMD_STOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_CMD */ |
AnnaBridge | 171:3a7713b1edbc | 100 | #define AES_CMD_STOP_DEFAULT (_AES_CMD_STOP_DEFAULT << 1) /**< Shifted mode DEFAULT for AES_CMD */ |
AnnaBridge | 171:3a7713b1edbc | 101 | |
AnnaBridge | 171:3a7713b1edbc | 102 | /* Bit fields for AES STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 103 | #define _AES_STATUS_RESETVALUE 0x00000000UL /**< Default value for AES_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 104 | #define _AES_STATUS_MASK 0x00000001UL /**< Mask for AES_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 105 | #define AES_STATUS_RUNNING (0x1UL << 0) /**< AES Running */ |
AnnaBridge | 171:3a7713b1edbc | 106 | #define _AES_STATUS_RUNNING_SHIFT 0 /**< Shift value for AES_RUNNING */ |
AnnaBridge | 171:3a7713b1edbc | 107 | #define _AES_STATUS_RUNNING_MASK 0x1UL /**< Bit mask for AES_RUNNING */ |
AnnaBridge | 171:3a7713b1edbc | 108 | #define _AES_STATUS_RUNNING_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 109 | #define AES_STATUS_RUNNING_DEFAULT (_AES_STATUS_RUNNING_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 110 | |
AnnaBridge | 171:3a7713b1edbc | 111 | /* Bit fields for AES IEN */ |
AnnaBridge | 171:3a7713b1edbc | 112 | #define _AES_IEN_RESETVALUE 0x00000000UL /**< Default value for AES_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 113 | #define _AES_IEN_MASK 0x00000001UL /**< Mask for AES_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 114 | #define AES_IEN_DONE (0x1UL << 0) /**< Encryption/Decryption Done Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 115 | #define _AES_IEN_DONE_SHIFT 0 /**< Shift value for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 116 | #define _AES_IEN_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 117 | #define _AES_IEN_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 118 | #define AES_IEN_DONE_DEFAULT (_AES_IEN_DONE_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 119 | |
AnnaBridge | 171:3a7713b1edbc | 120 | /* Bit fields for AES IF */ |
AnnaBridge | 171:3a7713b1edbc | 121 | #define _AES_IF_RESETVALUE 0x00000000UL /**< Default value for AES_IF */ |
AnnaBridge | 171:3a7713b1edbc | 122 | #define _AES_IF_MASK 0x00000001UL /**< Mask for AES_IF */ |
AnnaBridge | 171:3a7713b1edbc | 123 | #define AES_IF_DONE (0x1UL << 0) /**< Encryption/Decryption Done Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 124 | #define _AES_IF_DONE_SHIFT 0 /**< Shift value for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 125 | #define _AES_IF_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 126 | #define _AES_IF_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IF */ |
AnnaBridge | 171:3a7713b1edbc | 127 | #define AES_IF_DONE_DEFAULT (_AES_IF_DONE_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_IF */ |
AnnaBridge | 171:3a7713b1edbc | 128 | |
AnnaBridge | 171:3a7713b1edbc | 129 | /* Bit fields for AES IFS */ |
AnnaBridge | 171:3a7713b1edbc | 130 | #define _AES_IFS_RESETVALUE 0x00000000UL /**< Default value for AES_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 131 | #define _AES_IFS_MASK 0x00000001UL /**< Mask for AES_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 132 | #define AES_IFS_DONE (0x1UL << 0) /**< Encryption/Decryption Done Interrupt Flag Set */ |
AnnaBridge | 171:3a7713b1edbc | 133 | #define _AES_IFS_DONE_SHIFT 0 /**< Shift value for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 134 | #define _AES_IFS_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 135 | #define _AES_IFS_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 136 | #define AES_IFS_DONE_DEFAULT (_AES_IFS_DONE_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 137 | |
AnnaBridge | 171:3a7713b1edbc | 138 | /* Bit fields for AES IFC */ |
AnnaBridge | 171:3a7713b1edbc | 139 | #define _AES_IFC_RESETVALUE 0x00000000UL /**< Default value for AES_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 140 | #define _AES_IFC_MASK 0x00000001UL /**< Mask for AES_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 141 | #define AES_IFC_DONE (0x1UL << 0) /**< Encryption/Decryption Done Interrupt Flag Clear */ |
AnnaBridge | 171:3a7713b1edbc | 142 | #define _AES_IFC_DONE_SHIFT 0 /**< Shift value for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 143 | #define _AES_IFC_DONE_MASK 0x1UL /**< Bit mask for AES_DONE */ |
AnnaBridge | 171:3a7713b1edbc | 144 | #define _AES_IFC_DONE_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 145 | #define AES_IFC_DONE_DEFAULT (_AES_IFC_DONE_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 146 | |
AnnaBridge | 171:3a7713b1edbc | 147 | /* Bit fields for AES DATA */ |
AnnaBridge | 171:3a7713b1edbc | 148 | #define _AES_DATA_RESETVALUE 0x00000000UL /**< Default value for AES_DATA */ |
AnnaBridge | 171:3a7713b1edbc | 149 | #define _AES_DATA_MASK 0xFFFFFFFFUL /**< Mask for AES_DATA */ |
AnnaBridge | 171:3a7713b1edbc | 150 | #define _AES_DATA_DATA_SHIFT 0 /**< Shift value for AES_DATA */ |
AnnaBridge | 171:3a7713b1edbc | 151 | #define _AES_DATA_DATA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_DATA */ |
AnnaBridge | 171:3a7713b1edbc | 152 | #define _AES_DATA_DATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_DATA */ |
AnnaBridge | 171:3a7713b1edbc | 153 | #define AES_DATA_DATA_DEFAULT (_AES_DATA_DATA_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_DATA */ |
AnnaBridge | 171:3a7713b1edbc | 154 | |
AnnaBridge | 171:3a7713b1edbc | 155 | /* Bit fields for AES XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 156 | #define _AES_XORDATA_RESETVALUE 0x00000000UL /**< Default value for AES_XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 157 | #define _AES_XORDATA_MASK 0xFFFFFFFFUL /**< Mask for AES_XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 158 | #define _AES_XORDATA_XORDATA_SHIFT 0 /**< Shift value for AES_XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 159 | #define _AES_XORDATA_XORDATA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 160 | #define _AES_XORDATA_XORDATA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 161 | #define AES_XORDATA_XORDATA_DEFAULT (_AES_XORDATA_XORDATA_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_XORDATA */ |
AnnaBridge | 171:3a7713b1edbc | 162 | |
AnnaBridge | 171:3a7713b1edbc | 163 | /* Bit fields for AES KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 164 | #define _AES_KEYLA_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 165 | #define _AES_KEYLA_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 166 | #define _AES_KEYLA_KEYLA_SHIFT 0 /**< Shift value for AES_KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 167 | #define _AES_KEYLA_KEYLA_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 168 | #define _AES_KEYLA_KEYLA_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 169 | #define AES_KEYLA_KEYLA_DEFAULT (_AES_KEYLA_KEYLA_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_KEYLA */ |
AnnaBridge | 171:3a7713b1edbc | 170 | |
AnnaBridge | 171:3a7713b1edbc | 171 | /* Bit fields for AES KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 172 | #define _AES_KEYLB_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 173 | #define _AES_KEYLB_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 174 | #define _AES_KEYLB_KEYLB_SHIFT 0 /**< Shift value for AES_KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 175 | #define _AES_KEYLB_KEYLB_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 176 | #define _AES_KEYLB_KEYLB_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 177 | #define AES_KEYLB_KEYLB_DEFAULT (_AES_KEYLB_KEYLB_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_KEYLB */ |
AnnaBridge | 171:3a7713b1edbc | 178 | |
AnnaBridge | 171:3a7713b1edbc | 179 | /* Bit fields for AES KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 180 | #define _AES_KEYLC_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 181 | #define _AES_KEYLC_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 182 | #define _AES_KEYLC_KEYLC_SHIFT 0 /**< Shift value for AES_KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 183 | #define _AES_KEYLC_KEYLC_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 184 | #define _AES_KEYLC_KEYLC_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 185 | #define AES_KEYLC_KEYLC_DEFAULT (_AES_KEYLC_KEYLC_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_KEYLC */ |
AnnaBridge | 171:3a7713b1edbc | 186 | |
AnnaBridge | 171:3a7713b1edbc | 187 | /* Bit fields for AES KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 188 | #define _AES_KEYLD_RESETVALUE 0x00000000UL /**< Default value for AES_KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 189 | #define _AES_KEYLD_MASK 0xFFFFFFFFUL /**< Mask for AES_KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 190 | #define _AES_KEYLD_KEYLD_SHIFT 0 /**< Shift value for AES_KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 191 | #define _AES_KEYLD_KEYLD_MASK 0xFFFFFFFFUL /**< Bit mask for AES_KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 192 | #define _AES_KEYLD_KEYLD_DEFAULT 0x00000000UL /**< Mode DEFAULT for AES_KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 193 | #define AES_KEYLD_KEYLD_DEFAULT (_AES_KEYLD_KEYLD_DEFAULT << 0) /**< Shifted mode DEFAULT for AES_KEYLD */ |
AnnaBridge | 171:3a7713b1edbc | 194 | |
AnnaBridge | 171:3a7713b1edbc | 195 | /** @} End of group EFM32HG_AES */ |
AnnaBridge | 171:3a7713b1edbc | 196 | /** @} End of group Parts */ |
AnnaBridge | 171:3a7713b1edbc | 197 |