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TARGET_EFM32HG_STK3400/TOOLCHAIN_GCC_ARM/efm32hg_emu.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 171:3a7713b1edbc | 1 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 2 | * @file efm32hg_emu.h |
AnnaBridge | 171:3a7713b1edbc | 3 | * @brief EFM32HG_EMU register and bit field definitions |
AnnaBridge | 171:3a7713b1edbc | 4 | * @version 5.1.2 |
AnnaBridge | 171:3a7713b1edbc | 5 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 6 | * @section License |
AnnaBridge | 171:3a7713b1edbc | 7 | * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b> |
AnnaBridge | 171:3a7713b1edbc | 8 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 9 | * |
AnnaBridge | 171:3a7713b1edbc | 10 | * Permission is granted to anyone to use this software for any purpose, |
AnnaBridge | 171:3a7713b1edbc | 11 | * including commercial applications, and to alter it and redistribute it |
AnnaBridge | 171:3a7713b1edbc | 12 | * freely, subject to the following restrictions: |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * 1. The origin of this software must not be misrepresented; you must not |
AnnaBridge | 171:3a7713b1edbc | 15 | * claim that you wrote the original software.@n |
AnnaBridge | 171:3a7713b1edbc | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
AnnaBridge | 171:3a7713b1edbc | 17 | * misrepresented as being the original software.@n |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. This notice may not be removed or altered from any source distribution. |
AnnaBridge | 171:3a7713b1edbc | 19 | * |
AnnaBridge | 171:3a7713b1edbc | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. |
AnnaBridge | 171:3a7713b1edbc | 21 | * has no obligation to support this Software. Silicon Laboratories, Inc. is |
AnnaBridge | 171:3a7713b1edbc | 22 | * providing the Software "AS IS", with no express or implied warranties of any |
AnnaBridge | 171:3a7713b1edbc | 23 | * kind, including, but not limited to, any implied warranties of |
AnnaBridge | 171:3a7713b1edbc | 24 | * merchantability or fitness for any particular purpose or warranties against |
AnnaBridge | 171:3a7713b1edbc | 25 | * infringement of any proprietary rights of a third party. |
AnnaBridge | 171:3a7713b1edbc | 26 | * |
AnnaBridge | 171:3a7713b1edbc | 27 | * Silicon Laboratories, Inc. will not be liable for any consequential, |
AnnaBridge | 171:3a7713b1edbc | 28 | * incidental, or special damages, or any other relief, or for any claim by |
AnnaBridge | 171:3a7713b1edbc | 29 | * any third party, arising from your use of this Software. |
AnnaBridge | 171:3a7713b1edbc | 30 | * |
AnnaBridge | 171:3a7713b1edbc | 31 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 32 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 33 | * @addtogroup Parts |
AnnaBridge | 171:3a7713b1edbc | 34 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 35 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 36 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 37 | * @defgroup EFM32HG_EMU |
AnnaBridge | 171:3a7713b1edbc | 38 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 39 | * @brief EFM32HG_EMU Register Declaration |
AnnaBridge | 171:3a7713b1edbc | 40 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 41 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 42 | { |
AnnaBridge | 171:3a7713b1edbc | 43 | __IOM uint32_t CTRL; /**< Control Register */ |
AnnaBridge | 171:3a7713b1edbc | 44 | |
AnnaBridge | 171:3a7713b1edbc | 45 | uint32_t RESERVED0[1]; /**< Reserved for future use **/ |
AnnaBridge | 171:3a7713b1edbc | 46 | __IOM uint32_t LOCK; /**< Configuration Lock Register */ |
AnnaBridge | 171:3a7713b1edbc | 47 | |
AnnaBridge | 171:3a7713b1edbc | 48 | uint32_t RESERVED1[6]; /**< Reserved for future use **/ |
AnnaBridge | 171:3a7713b1edbc | 49 | __IOM uint32_t AUXCTRL; /**< Auxiliary Control Register */ |
AnnaBridge | 171:3a7713b1edbc | 50 | } EMU_TypeDef; /** @} */ |
AnnaBridge | 171:3a7713b1edbc | 51 | |
AnnaBridge | 171:3a7713b1edbc | 52 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 53 | * @defgroup EFM32HG_EMU_BitFields |
AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 55 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /* Bit fields for EMU CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 58 | #define _EMU_CTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 59 | #define _EMU_CTRL_MASK 0x0000000FUL /**< Mask for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 60 | #define EMU_CTRL_EMVREG (0x1UL << 0) /**< Energy Mode Voltage Regulator Control */ |
AnnaBridge | 171:3a7713b1edbc | 61 | #define _EMU_CTRL_EMVREG_SHIFT 0 /**< Shift value for EMU_EMVREG */ |
AnnaBridge | 171:3a7713b1edbc | 62 | #define _EMU_CTRL_EMVREG_MASK 0x1UL /**< Bit mask for EMU_EMVREG */ |
AnnaBridge | 171:3a7713b1edbc | 63 | #define _EMU_CTRL_EMVREG_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 64 | #define _EMU_CTRL_EMVREG_REDUCED 0x00000000UL /**< Mode REDUCED for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 65 | #define _EMU_CTRL_EMVREG_FULL 0x00000001UL /**< Mode FULL for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 66 | #define EMU_CTRL_EMVREG_DEFAULT (_EMU_CTRL_EMVREG_DEFAULT << 0) /**< Shifted mode DEFAULT for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 67 | #define EMU_CTRL_EMVREG_REDUCED (_EMU_CTRL_EMVREG_REDUCED << 0) /**< Shifted mode REDUCED for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 68 | #define EMU_CTRL_EMVREG_FULL (_EMU_CTRL_EMVREG_FULL << 0) /**< Shifted mode FULL for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 69 | #define EMU_CTRL_EM2BLOCK (0x1UL << 1) /**< Energy Mode 2 Block */ |
AnnaBridge | 171:3a7713b1edbc | 70 | #define _EMU_CTRL_EM2BLOCK_SHIFT 1 /**< Shift value for EMU_EM2BLOCK */ |
AnnaBridge | 171:3a7713b1edbc | 71 | #define _EMU_CTRL_EM2BLOCK_MASK 0x2UL /**< Bit mask for EMU_EM2BLOCK */ |
AnnaBridge | 171:3a7713b1edbc | 72 | #define _EMU_CTRL_EM2BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 73 | #define EMU_CTRL_EM2BLOCK_DEFAULT (_EMU_CTRL_EM2BLOCK_DEFAULT << 1) /**< Shifted mode DEFAULT for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 74 | #define _EMU_CTRL_EM4CTRL_SHIFT 2 /**< Shift value for EMU_EM4CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 75 | #define _EMU_CTRL_EM4CTRL_MASK 0xCUL /**< Bit mask for EMU_EM4CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 76 | #define _EMU_CTRL_EM4CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 77 | #define EMU_CTRL_EM4CTRL_DEFAULT (_EMU_CTRL_EM4CTRL_DEFAULT << 2) /**< Shifted mode DEFAULT for EMU_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 78 | |
AnnaBridge | 171:3a7713b1edbc | 79 | /* Bit fields for EMU LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 80 | #define _EMU_LOCK_RESETVALUE 0x00000000UL /**< Default value for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 81 | #define _EMU_LOCK_MASK 0x0000FFFFUL /**< Mask for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 82 | #define _EMU_LOCK_LOCKKEY_SHIFT 0 /**< Shift value for EMU_LOCKKEY */ |
AnnaBridge | 171:3a7713b1edbc | 83 | #define _EMU_LOCK_LOCKKEY_MASK 0xFFFFUL /**< Bit mask for EMU_LOCKKEY */ |
AnnaBridge | 171:3a7713b1edbc | 84 | #define _EMU_LOCK_LOCKKEY_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 85 | #define _EMU_LOCK_LOCKKEY_LOCK 0x00000000UL /**< Mode LOCK for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 86 | #define _EMU_LOCK_LOCKKEY_UNLOCKED 0x00000000UL /**< Mode UNLOCKED for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 87 | #define _EMU_LOCK_LOCKKEY_LOCKED 0x00000001UL /**< Mode LOCKED for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 88 | #define _EMU_LOCK_LOCKKEY_UNLOCK 0x0000ADE8UL /**< Mode UNLOCK for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 89 | #define EMU_LOCK_LOCKKEY_DEFAULT (_EMU_LOCK_LOCKKEY_DEFAULT << 0) /**< Shifted mode DEFAULT for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 90 | #define EMU_LOCK_LOCKKEY_LOCK (_EMU_LOCK_LOCKKEY_LOCK << 0) /**< Shifted mode LOCK for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 91 | #define EMU_LOCK_LOCKKEY_UNLOCKED (_EMU_LOCK_LOCKKEY_UNLOCKED << 0) /**< Shifted mode UNLOCKED for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 92 | #define EMU_LOCK_LOCKKEY_LOCKED (_EMU_LOCK_LOCKKEY_LOCKED << 0) /**< Shifted mode LOCKED for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 93 | #define EMU_LOCK_LOCKKEY_UNLOCK (_EMU_LOCK_LOCKKEY_UNLOCK << 0) /**< Shifted mode UNLOCK for EMU_LOCK */ |
AnnaBridge | 171:3a7713b1edbc | 94 | |
AnnaBridge | 171:3a7713b1edbc | 95 | /* Bit fields for EMU AUXCTRL */ |
AnnaBridge | 171:3a7713b1edbc | 96 | #define _EMU_AUXCTRL_RESETVALUE 0x00000000UL /**< Default value for EMU_AUXCTRL */ |
AnnaBridge | 171:3a7713b1edbc | 97 | #define _EMU_AUXCTRL_MASK 0x00000001UL /**< Mask for EMU_AUXCTRL */ |
AnnaBridge | 171:3a7713b1edbc | 98 | #define EMU_AUXCTRL_HRCCLR (0x1UL << 0) /**< Hard Reset Cause Clear */ |
AnnaBridge | 171:3a7713b1edbc | 99 | #define _EMU_AUXCTRL_HRCCLR_SHIFT 0 /**< Shift value for EMU_HRCCLR */ |
AnnaBridge | 171:3a7713b1edbc | 100 | #define _EMU_AUXCTRL_HRCCLR_MASK 0x1UL /**< Bit mask for EMU_HRCCLR */ |
AnnaBridge | 171:3a7713b1edbc | 101 | #define _EMU_AUXCTRL_HRCCLR_DEFAULT 0x00000000UL /**< Mode DEFAULT for EMU_AUXCTRL */ |
AnnaBridge | 171:3a7713b1edbc | 102 | #define EMU_AUXCTRL_HRCCLR_DEFAULT (_EMU_AUXCTRL_HRCCLR_DEFAULT << 0) /**< Shifted mode DEFAULT for EMU_AUXCTRL */ |
AnnaBridge | 171:3a7713b1edbc | 103 | |
AnnaBridge | 171:3a7713b1edbc | 104 | /** @} End of group EFM32HG_EMU */ |
AnnaBridge | 171:3a7713b1edbc | 105 | /** @} End of group Parts */ |
AnnaBridge | 171:3a7713b1edbc | 106 |