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TARGET_EFM32GG_STK3700/TOOLCHAIN_ARM_MICRO/em_csen.h@171:3a7713b1edbc, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:45:42 2018 +0000
- Revision:
- 171:3a7713b1edbc
- Parent:
- TARGET_TB_SENSE_12/TARGET_Silicon_Labs/TARGET_EFM32/emlib/inc/em_csen.h@160:5571c4ff569f
mbed library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Anna Bridge |
142:4eea097334d6 | 1 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 2 | * @file em_csen.h |
Anna Bridge |
142:4eea097334d6 | 3 | * @brief Capacitive Sense Module (CSEN) peripheral API |
Anna Bridge |
160:5571c4ff569f | 4 | * @version 5.3.3 |
Anna Bridge |
142:4eea097334d6 | 5 | ******************************************************************************* |
Anna Bridge |
160:5571c4ff569f | 6 | * # License |
Anna Bridge |
142:4eea097334d6 | 7 | * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b> |
Anna Bridge |
142:4eea097334d6 | 8 | ******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 9 | * |
Anna Bridge |
142:4eea097334d6 | 10 | * Permission is granted to anyone to use this software for any purpose, |
Anna Bridge |
142:4eea097334d6 | 11 | * including commercial applications, and to alter it and redistribute it |
Anna Bridge |
142:4eea097334d6 | 12 | * freely, subject to the following restrictions: |
Anna Bridge |
142:4eea097334d6 | 13 | * |
Anna Bridge |
142:4eea097334d6 | 14 | * 1. The origin of this software must not be misrepresented; you must not |
Anna Bridge |
142:4eea097334d6 | 15 | * claim that you wrote the original software. |
Anna Bridge |
142:4eea097334d6 | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
Anna Bridge |
142:4eea097334d6 | 17 | * misrepresented as being the original software. |
Anna Bridge |
142:4eea097334d6 | 18 | * 3. This notice may not be removed or altered from any source distribution. |
Anna Bridge |
142:4eea097334d6 | 19 | * |
Anna Bridge |
142:4eea097334d6 | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no |
Anna Bridge |
142:4eea097334d6 | 21 | * obligation to support this Software. Silicon Labs is providing the |
Anna Bridge |
142:4eea097334d6 | 22 | * Software "AS IS", with no express or implied warranties of any kind, |
Anna Bridge |
142:4eea097334d6 | 23 | * including, but not limited to, any implied warranties of merchantability |
Anna Bridge |
142:4eea097334d6 | 24 | * or fitness for any particular purpose or warranties against infringement |
Anna Bridge |
142:4eea097334d6 | 25 | * of any proprietary rights of a third party. |
Anna Bridge |
142:4eea097334d6 | 26 | * |
Anna Bridge |
142:4eea097334d6 | 27 | * Silicon Labs will not be liable for any consequential, incidental, or |
Anna Bridge |
142:4eea097334d6 | 28 | * special damages, or any other relief, or for any claim by any third party, |
Anna Bridge |
142:4eea097334d6 | 29 | * arising from your use of this Software. |
Anna Bridge |
142:4eea097334d6 | 30 | * |
Anna Bridge |
142:4eea097334d6 | 31 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 32 | |
Anna Bridge |
142:4eea097334d6 | 33 | #ifndef EM_CSEN_H |
Anna Bridge |
142:4eea097334d6 | 34 | #define EM_CSEN_H |
Anna Bridge |
142:4eea097334d6 | 35 | |
Anna Bridge |
142:4eea097334d6 | 36 | #include "em_device.h" |
Anna Bridge |
160:5571c4ff569f | 37 | #if defined(CSEN_COUNT) && (CSEN_COUNT > 0) |
Anna Bridge |
142:4eea097334d6 | 38 | |
Anna Bridge |
142:4eea097334d6 | 39 | #include <stdbool.h> |
Anna Bridge |
142:4eea097334d6 | 40 | #include "em_bus.h" |
Anna Bridge |
142:4eea097334d6 | 41 | |
Anna Bridge |
142:4eea097334d6 | 42 | #ifdef __cplusplus |
Anna Bridge |
142:4eea097334d6 | 43 | extern "C" { |
Anna Bridge |
142:4eea097334d6 | 44 | #endif |
Anna Bridge |
142:4eea097334d6 | 45 | |
Anna Bridge |
142:4eea097334d6 | 46 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 47 | * @addtogroup emlib |
Anna Bridge |
142:4eea097334d6 | 48 | * @{ |
Anna Bridge |
142:4eea097334d6 | 49 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 50 | |
Anna Bridge |
142:4eea097334d6 | 51 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 52 | * @addtogroup CSEN |
Anna Bridge |
142:4eea097334d6 | 53 | * @brief Capacitive Sense (CSEN) Peripheral API |
Anna Bridge |
142:4eea097334d6 | 54 | * |
Anna Bridge |
142:4eea097334d6 | 55 | * @details |
Anna Bridge |
160:5571c4ff569f | 56 | * This module provides functions for controlling the capacitive sense |
Anna Bridge |
160:5571c4ff569f | 57 | * peripheral of Silicon Labs 32-bit MCUs and SoCs. The CSEN includes a |
Anna Bridge |
160:5571c4ff569f | 58 | * capacitance-to-digital circuit that measures capacitance on selected |
Anna Bridge |
160:5571c4ff569f | 59 | * inputs. Measurements are performed using either a successive approximation |
Anna Bridge |
142:4eea097334d6 | 60 | * register (SAR) or a delta modulator (DM) analog to digital converter. |
Anna Bridge |
142:4eea097334d6 | 61 | * |
Anna Bridge |
160:5571c4ff569f | 62 | * The CSEN can be configured to measure capacitance on a single port pin |
Anna Bridge |
160:5571c4ff569f | 63 | * or to automatically measure multiple port pins in succession using scan |
Anna Bridge |
160:5571c4ff569f | 64 | * mode. Also several port pins can be shorted together to measure the |
Anna Bridge |
142:4eea097334d6 | 65 | * combined capacitance. |
Anna Bridge |
142:4eea097334d6 | 66 | * |
Anna Bridge |
160:5571c4ff569f | 67 | * The CSEN includes an accumulator which can be configured to average |
Anna Bridge |
160:5571c4ff569f | 68 | * multiple conversions on the selected input. Additionally, an exponential |
Anna Bridge |
160:5571c4ff569f | 69 | * moving average (EMA) calculator is included to provide data smoothing. |
Anna Bridge |
160:5571c4ff569f | 70 | * A comparator is also included and can be used to terminate a continuous |
Anna Bridge |
142:4eea097334d6 | 71 | * conversion when the configured threshold condition is met. |
Anna Bridge |
142:4eea097334d6 | 72 | * |
Anna Bridge |
160:5571c4ff569f | 73 | * The following example shows how to intialize and start a single |
Anna Bridge |
142:4eea097334d6 | 74 | * conversion on one input: |
Anna Bridge |
142:4eea097334d6 | 75 | * |
Anna Bridge |
142:4eea097334d6 | 76 | * @include em_csen_single.c |
Anna Bridge |
142:4eea097334d6 | 77 | * |
Anna Bridge |
142:4eea097334d6 | 78 | * @{ |
Anna Bridge |
142:4eea097334d6 | 79 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 80 | |
Anna Bridge |
142:4eea097334d6 | 81 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 82 | ******************************** ENUMS ************************************ |
Anna Bridge |
142:4eea097334d6 | 83 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 84 | |
Anna Bridge |
142:4eea097334d6 | 85 | /** Comparator Mode. Selects the operation of the digital comparator. */ |
Anna Bridge |
160:5571c4ff569f | 86 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 87 | /** Comparator is disabled. */ |
Anna Bridge |
142:4eea097334d6 | 88 | csenCmpModeDisabled = 0, |
Anna Bridge |
142:4eea097334d6 | 89 | |
Anna Bridge |
142:4eea097334d6 | 90 | /** Comparator trips when the result is greater than the threshold. */ |
Anna Bridge |
142:4eea097334d6 | 91 | csenCmpModeGreater = CSEN_CTRL_CMPEN | CSEN_CTRL_CMPPOL_GT, |
Anna Bridge |
142:4eea097334d6 | 92 | |
Anna Bridge |
142:4eea097334d6 | 93 | /** Comparator trips when the result is less or equal to the threshold. */ |
Anna Bridge |
142:4eea097334d6 | 94 | csenCmpModeLessOrEqual = CSEN_CTRL_CMPEN | CSEN_CTRL_CMPPOL_LTE, |
Anna Bridge |
142:4eea097334d6 | 95 | |
Anna Bridge |
142:4eea097334d6 | 96 | /** Comparator trips when the EMA is within the threshold window. */ |
Anna Bridge |
142:4eea097334d6 | 97 | csenCmpModeEMAWindow = CSEN_CTRL_EMACMPEN, |
Anna Bridge |
142:4eea097334d6 | 98 | } CSEN_CmpMode_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 99 | |
Anna Bridge |
142:4eea097334d6 | 100 | /** Converter Select. Determines the converter operational mode. */ |
Anna Bridge |
160:5571c4ff569f | 101 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 102 | /** Successive Approximation (SAR) converter. */ |
Anna Bridge |
142:4eea097334d6 | 103 | csenConvSelSAR = CSEN_CTRL_CONVSEL_SAR, |
Anna Bridge |
142:4eea097334d6 | 104 | |
Anna Bridge |
142:4eea097334d6 | 105 | /** Successive Approximation (SAR) converter with low freq attenuation. */ |
Anna Bridge |
142:4eea097334d6 | 106 | csenConvSelSARChop = CSEN_CTRL_CONVSEL_SAR | CSEN_CTRL_CHOPEN_ENABLE, |
Anna Bridge |
142:4eea097334d6 | 107 | |
Anna Bridge |
142:4eea097334d6 | 108 | /** Delta Modulation (DM) converter. */ |
Anna Bridge |
142:4eea097334d6 | 109 | csenConvSelDM = CSEN_CTRL_CONVSEL_DM, |
Anna Bridge |
142:4eea097334d6 | 110 | |
Anna Bridge |
142:4eea097334d6 | 111 | /** Delta Modulation (DM) converter with low frequency attenuation. */ |
Anna Bridge |
142:4eea097334d6 | 112 | csenConvSelDMChop = CSEN_CTRL_CONVSEL_DM | CSEN_CTRL_CHOPEN_ENABLE, |
Anna Bridge |
142:4eea097334d6 | 113 | } CSEN_ConvSel_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 114 | |
Anna Bridge |
142:4eea097334d6 | 115 | /** Sample Mode. Determines how inputs are sampled for a conversion. */ |
Anna Bridge |
160:5571c4ff569f | 116 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 117 | /** Convert multiple inputs shorted together and stop. */ |
Anna Bridge |
142:4eea097334d6 | 118 | csenSampleModeBonded = CSEN_CTRL_CM_SGL | CSEN_CTRL_MCEN_ENABLE, |
Anna Bridge |
142:4eea097334d6 | 119 | |
Anna Bridge |
142:4eea097334d6 | 120 | /** Convert one input and stop. */ |
Anna Bridge |
142:4eea097334d6 | 121 | csenSampleModeSingle = CSEN_CTRL_CM_SGL, |
Anna Bridge |
142:4eea097334d6 | 122 | |
Anna Bridge |
142:4eea097334d6 | 123 | /** Convert multiple inputs one at a time and stop. */ |
Anna Bridge |
142:4eea097334d6 | 124 | csenSampleModeScan = CSEN_CTRL_CM_SCAN, |
Anna Bridge |
142:4eea097334d6 | 125 | |
Anna Bridge |
142:4eea097334d6 | 126 | /** Continuously convert multiple inputs shorted together. */ |
Anna Bridge |
142:4eea097334d6 | 127 | csenSampleModeContBonded = CSEN_CTRL_CM_CONTSGL | CSEN_CTRL_MCEN_ENABLE, |
Anna Bridge |
142:4eea097334d6 | 128 | |
Anna Bridge |
142:4eea097334d6 | 129 | /** Continuously convert one input. */ |
Anna Bridge |
142:4eea097334d6 | 130 | csenSampleModeContSingle = CSEN_CTRL_CM_CONTSGL, |
Anna Bridge |
142:4eea097334d6 | 131 | |
Anna Bridge |
142:4eea097334d6 | 132 | /** Continuously convert multiple inputs one at a time. */ |
Anna Bridge |
142:4eea097334d6 | 133 | csenSampleModeContScan = CSEN_CTRL_CM_CONTSCAN, |
Anna Bridge |
142:4eea097334d6 | 134 | } CSEN_SampleMode_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 135 | |
Anna Bridge |
142:4eea097334d6 | 136 | /** Start Trigger Select. */ |
Anna Bridge |
160:5571c4ff569f | 137 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 138 | csenTrigSelPRS = _CSEN_CTRL_STM_PRS, /**< PRS system. */ |
Anna Bridge |
142:4eea097334d6 | 139 | csenTrigSelTimer = _CSEN_CTRL_STM_TIMER, /**< CSEN PC timer. */ |
Anna Bridge |
142:4eea097334d6 | 140 | csenTrigSelStart = _CSEN_CTRL_STM_START, /**< Start bit. */ |
Anna Bridge |
142:4eea097334d6 | 141 | } CSEN_TrigSel_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 142 | |
Anna Bridge |
142:4eea097334d6 | 143 | /** Accumulator Mode Select. */ |
Anna Bridge |
160:5571c4ff569f | 144 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 145 | csenAccMode1 = _CSEN_CTRL_ACU_ACC1, /**< Accumulate 1 sample. */ |
Anna Bridge |
142:4eea097334d6 | 146 | csenAccMode2 = _CSEN_CTRL_ACU_ACC2, /**< Accumulate 2 samples. */ |
Anna Bridge |
142:4eea097334d6 | 147 | csenAccMode4 = _CSEN_CTRL_ACU_ACC4, /**< Accumulate 4 samples. */ |
Anna Bridge |
142:4eea097334d6 | 148 | csenAccMode8 = _CSEN_CTRL_ACU_ACC8, /**< Accumulate 8 samples. */ |
Anna Bridge |
142:4eea097334d6 | 149 | csenAccMode16 = _CSEN_CTRL_ACU_ACC16, /**< Accumulate 16 samples. */ |
Anna Bridge |
142:4eea097334d6 | 150 | csenAccMode32 = _CSEN_CTRL_ACU_ACC32, /**< Accumulate 32 samples. */ |
Anna Bridge |
142:4eea097334d6 | 151 | csenAccMode64 = _CSEN_CTRL_ACU_ACC64, /**< Accumulate 64 samples. */ |
Anna Bridge |
142:4eea097334d6 | 152 | } CSEN_AccMode_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 153 | |
Anna Bridge |
142:4eea097334d6 | 154 | /** Successive Approximation (SAR) Conversion Resolution. */ |
Anna Bridge |
160:5571c4ff569f | 155 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 156 | csenSARRes10 = _CSEN_CTRL_SARCR_CLK10, /**< 10-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 157 | csenSARRes12 = _CSEN_CTRL_SARCR_CLK12, /**< 12-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 158 | csenSARRes14 = _CSEN_CTRL_SARCR_CLK14, /**< 14-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 159 | csenSARRes16 = _CSEN_CTRL_SARCR_CLK16, /**< 16-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 160 | } CSEN_SARRes_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 161 | |
Anna Bridge |
142:4eea097334d6 | 162 | /** Delta Modulator (DM) Conversion Resolution. */ |
Anna Bridge |
160:5571c4ff569f | 163 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 164 | csenDMRes10 = _CSEN_DMCFG_CRMODE_DM10, /**< 10-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 165 | csenDMRes12 = _CSEN_DMCFG_CRMODE_DM12, /**< 12-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 166 | csenDMRes14 = _CSEN_DMCFG_CRMODE_DM14, /**< 14-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 167 | csenDMRes16 = _CSEN_DMCFG_CRMODE_DM16, /**< 16-bit resolution. */ |
Anna Bridge |
142:4eea097334d6 | 168 | } CSEN_DMRes_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 169 | |
Anna Bridge |
160:5571c4ff569f | 170 | /** Period counter clock pre-scaler. See the reference manual for source clock |
Anna Bridge |
142:4eea097334d6 | 171 | * information. */ |
Anna Bridge |
160:5571c4ff569f | 172 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 173 | csenPCPrescaleDiv1 = _CSEN_TIMCTRL_PCPRESC_DIV1, /**< Divide by 1. */ |
Anna Bridge |
142:4eea097334d6 | 174 | csenPCPrescaleDiv2 = _CSEN_TIMCTRL_PCPRESC_DIV2, /**< Divide by 2. */ |
Anna Bridge |
142:4eea097334d6 | 175 | csenPCPrescaleDiv4 = _CSEN_TIMCTRL_PCPRESC_DIV4, /**< Divide by 4. */ |
Anna Bridge |
142:4eea097334d6 | 176 | csenPCPrescaleDiv8 = _CSEN_TIMCTRL_PCPRESC_DIV8, /**< Divide by 8. */ |
Anna Bridge |
142:4eea097334d6 | 177 | csenPCPrescaleDiv16 = _CSEN_TIMCTRL_PCPRESC_DIV16, /**< Divide by 16. */ |
Anna Bridge |
142:4eea097334d6 | 178 | csenPCPrescaleDiv32 = _CSEN_TIMCTRL_PCPRESC_DIV32, /**< Divide by 32. */ |
Anna Bridge |
142:4eea097334d6 | 179 | csenPCPrescaleDiv64 = _CSEN_TIMCTRL_PCPRESC_DIV64, /**< Divide by 64. */ |
Anna Bridge |
142:4eea097334d6 | 180 | csenPCPrescaleDiv128 = _CSEN_TIMCTRL_PCPRESC_DIV128, /**< Divide by 128. */ |
Anna Bridge |
142:4eea097334d6 | 181 | } CSEN_PCPrescale_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 182 | |
Anna Bridge |
142:4eea097334d6 | 183 | /** Exponential Moving Average sample weight. */ |
Anna Bridge |
160:5571c4ff569f | 184 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 185 | csenEMASampleW1 = _CSEN_EMACTRL_EMASAMPLE_W1, /**< Weight 1. */ |
Anna Bridge |
142:4eea097334d6 | 186 | csenEMASampleW2 = _CSEN_EMACTRL_EMASAMPLE_W2, /**< Weight 2. */ |
Anna Bridge |
142:4eea097334d6 | 187 | csenEMASampleW4 = _CSEN_EMACTRL_EMASAMPLE_W4, /**< Weight 4. */ |
Anna Bridge |
142:4eea097334d6 | 188 | csenEMASampleW8 = _CSEN_EMACTRL_EMASAMPLE_W8, /**< Weight 8. */ |
Anna Bridge |
142:4eea097334d6 | 189 | csenEMASampleW16 = _CSEN_EMACTRL_EMASAMPLE_W16, /**< Weight 16. */ |
Anna Bridge |
142:4eea097334d6 | 190 | csenEMASampleW32 = _CSEN_EMACTRL_EMASAMPLE_W32, /**< Weight 32. */ |
Anna Bridge |
142:4eea097334d6 | 191 | csenEMASampleW64 = _CSEN_EMACTRL_EMASAMPLE_W64, /**< Weight 64. */ |
Anna Bridge |
142:4eea097334d6 | 192 | } CSEN_EMASample_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 193 | |
Anna Bridge |
142:4eea097334d6 | 194 | /** Reset Phase Timing Select (units are microseconds). */ |
Anna Bridge |
160:5571c4ff569f | 195 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 196 | csenResetPhaseSel0 = 0, /**< Reset phase time = 0.75 usec. */ |
Anna Bridge |
142:4eea097334d6 | 197 | csenResetPhaseSel1 = 1, /**< Reset phase time = 1.00 usec. */ |
Anna Bridge |
142:4eea097334d6 | 198 | csenResetPhaseSel2 = 2, /**< Reset phase time = 1.20 usec. */ |
Anna Bridge |
142:4eea097334d6 | 199 | csenResetPhaseSel3 = 3, /**< Reset phase time = 1.50 usec. */ |
Anna Bridge |
142:4eea097334d6 | 200 | csenResetPhaseSel4 = 4, /**< Reset phase time = 2.00 usec. */ |
Anna Bridge |
142:4eea097334d6 | 201 | csenResetPhaseSel5 = 5, /**< Reset phase time = 3.00 usec. */ |
Anna Bridge |
142:4eea097334d6 | 202 | csenResetPhaseSel6 = 6, /**< Reset phase time = 6.00 usec. */ |
Anna Bridge |
142:4eea097334d6 | 203 | csenResetPhaseSel7 = 7, /**< Reset phase time = 12.0 usec. */ |
Anna Bridge |
142:4eea097334d6 | 204 | } CSEN_ResetPhaseSel_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 205 | |
Anna Bridge |
142:4eea097334d6 | 206 | /** Drive Strength Select. Scales the output current. */ |
Anna Bridge |
160:5571c4ff569f | 207 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 208 | csenDriveSelFull = 0, /**< Drive strength = fully on. */ |
Anna Bridge |
142:4eea097334d6 | 209 | csenDriveSel1 = 1, /**< Drive strength = 1/8 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 210 | csenDriveSel2 = 2, /**< Drive strength = 1/4 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 211 | csenDriveSel3 = 3, /**< Drive strength = 3/8 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 212 | csenDriveSel4 = 4, /**< Drive strength = 1/2 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 213 | csenDriveSel5 = 5, /**< Drive strength = 5/8 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 214 | csenDriveSel6 = 6, /**< Drive strength = 3/4 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 215 | csenDriveSel7 = 7, /**< Drive strength = 7/8 full scale. */ |
Anna Bridge |
142:4eea097334d6 | 216 | } CSEN_DriveSel_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 217 | |
Anna Bridge |
142:4eea097334d6 | 218 | /** Gain Select. See reference manual for information on each setting. */ |
Anna Bridge |
160:5571c4ff569f | 219 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 220 | csenGainSel1X = 0, /**< Gain = 1x. */ |
Anna Bridge |
142:4eea097334d6 | 221 | csenGainSel2X = 1, /**< Gain = 2x. */ |
Anna Bridge |
142:4eea097334d6 | 222 | csenGainSel3X = 2, /**< Gain = 3x. */ |
Anna Bridge |
142:4eea097334d6 | 223 | csenGainSel4X = 3, /**< Gain = 4x. */ |
Anna Bridge |
142:4eea097334d6 | 224 | csenGainSel5X = 4, /**< Gain = 5x. */ |
Anna Bridge |
142:4eea097334d6 | 225 | csenGainSel6X = 5, /**< Gain = 6x. */ |
Anna Bridge |
142:4eea097334d6 | 226 | csenGainSel7X = 6, /**< Gain = 7x. */ |
Anna Bridge |
142:4eea097334d6 | 227 | csenGainSel8X = 7, /**< Gain = 8x. */ |
Anna Bridge |
142:4eea097334d6 | 228 | } CSEN_GainSel_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 229 | |
Anna Bridge |
142:4eea097334d6 | 230 | /** Peripheral Reflex System signal used to trigger conversion. */ |
Anna Bridge |
160:5571c4ff569f | 231 | typedef enum { |
Anna Bridge |
142:4eea097334d6 | 232 | csenPRSSELCh0 = _CSEN_PRSSEL_PRSSEL_PRSCH0, /**< PRS channel 0. */ |
Anna Bridge |
142:4eea097334d6 | 233 | csenPRSSELCh1 = _CSEN_PRSSEL_PRSSEL_PRSCH1, /**< PRS channel 1. */ |
Anna Bridge |
142:4eea097334d6 | 234 | csenPRSSELCh2 = _CSEN_PRSSEL_PRSSEL_PRSCH2, /**< PRS channel 2. */ |
Anna Bridge |
142:4eea097334d6 | 235 | csenPRSSELCh3 = _CSEN_PRSSEL_PRSSEL_PRSCH3, /**< PRS channel 3. */ |
Anna Bridge |
142:4eea097334d6 | 236 | csenPRSSELCh4 = _CSEN_PRSSEL_PRSSEL_PRSCH4, /**< PRS channel 4. */ |
Anna Bridge |
142:4eea097334d6 | 237 | csenPRSSELCh5 = _CSEN_PRSSEL_PRSSEL_PRSCH5, /**< PRS channel 5. */ |
Anna Bridge |
142:4eea097334d6 | 238 | csenPRSSELCh6 = _CSEN_PRSSEL_PRSSEL_PRSCH6, /**< PRS channel 6. */ |
Anna Bridge |
142:4eea097334d6 | 239 | csenPRSSELCh7 = _CSEN_PRSSEL_PRSSEL_PRSCH7, /**< PRS channel 7. */ |
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160:5571c4ff569f | 240 | #if defined(_CSEN_PRSSEL_PRSSEL_PRSCH8) |
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142:4eea097334d6 | 241 | csenPRSSELCh8 = _CSEN_PRSSEL_PRSSEL_PRSCH8, /**< PRS channel 8. */ |
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160:5571c4ff569f | 242 | #endif |
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160:5571c4ff569f | 243 | #if defined(_CSEN_PRSSEL_PRSSEL_PRSCH9) |
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142:4eea097334d6 | 244 | csenPRSSELCh9 = _CSEN_PRSSEL_PRSSEL_PRSCH9, /**< PRS channel 9. */ |
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160:5571c4ff569f | 245 | #endif |
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160:5571c4ff569f | 246 | #if defined(_CSEN_PRSSEL_PRSSEL_PRSCH10) |
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142:4eea097334d6 | 247 | csenPRSSELCh10 = _CSEN_PRSSEL_PRSSEL_PRSCH10, /**< PRS channel 10. */ |
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160:5571c4ff569f | 248 | #endif |
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160:5571c4ff569f | 249 | #if defined(_CSEN_PRSSEL_PRSSEL_PRSCH11) |
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142:4eea097334d6 | 250 | csenPRSSELCh11 = _CSEN_PRSSEL_PRSSEL_PRSCH11, /**< PRS channel 11. */ |
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160:5571c4ff569f | 251 | #endif |
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142:4eea097334d6 | 252 | } CSEN_PRSSel_TypeDef; |
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142:4eea097334d6 | 253 | |
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142:4eea097334d6 | 254 | /** APORT channel to CSEN input selection. */ |
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160:5571c4ff569f | 255 | typedef enum { |
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142:4eea097334d6 | 256 | csenInputSelDefault = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_DEFAULT, |
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142:4eea097334d6 | 257 | csenInputSelAPORT1CH0TO7 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH0TO7, |
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142:4eea097334d6 | 258 | csenInputSelAPORT1CH8TO15 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH8TO15, |
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142:4eea097334d6 | 259 | csenInputSelAPORT1CH16TO23 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH16TO23, |
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142:4eea097334d6 | 260 | csenInputSelAPORT1CH24TO31 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT1CH24TO31, |
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142:4eea097334d6 | 261 | csenInputSelAPORT3CH0TO7 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH0TO7, |
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142:4eea097334d6 | 262 | csenInputSelAPORT3CH8TO15 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH8TO15, |
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142:4eea097334d6 | 263 | csenInputSelAPORT3CH16TO23 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH16TO23, |
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142:4eea097334d6 | 264 | csenInputSelAPORT3CH24TO31 = _CSEN_SCANINPUTSEL0_INPUT0TO7SEL_APORT3CH24TO31, |
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142:4eea097334d6 | 265 | } CSEN_InputSel_TypeDef; |
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142:4eea097334d6 | 266 | |
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142:4eea097334d6 | 267 | /** APORT channel to CSEN single input selection. */ |
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160:5571c4ff569f | 268 | typedef enum { |
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142:4eea097334d6 | 269 | csenSingleSelDefault = _CSEN_SINGLECTRL_SINGLESEL_DEFAULT, |
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142:4eea097334d6 | 270 | csenSingleSelAPORT1XCH0 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH0, |
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142:4eea097334d6 | 271 | csenSingleSelAPORT1YCH1 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH1, |
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142:4eea097334d6 | 272 | csenSingleSelAPORT1XCH2 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH2, |
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142:4eea097334d6 | 273 | csenSingleSelAPORT1YCH3 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH3, |
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142:4eea097334d6 | 274 | csenSingleSelAPORT1XCH4 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH4, |
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142:4eea097334d6 | 275 | csenSingleSelAPORT1YCH5 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH5, |
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142:4eea097334d6 | 276 | csenSingleSelAPORT1XCH6 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH6, |
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142:4eea097334d6 | 277 | csenSingleSelAPORT1YCH7 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH7, |
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142:4eea097334d6 | 278 | csenSingleSelAPORT1XCH8 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH8, |
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142:4eea097334d6 | 279 | csenSingleSelAPORT1YCH9 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH9, |
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142:4eea097334d6 | 280 | csenSingleSelAPORT1XCH10 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH10, |
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142:4eea097334d6 | 281 | csenSingleSelAPORT1YCH11 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH11, |
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142:4eea097334d6 | 282 | csenSingleSelAPORT1XCH12 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH12, |
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142:4eea097334d6 | 283 | csenSingleSelAPORT1YCH13 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH13, |
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142:4eea097334d6 | 284 | csenSingleSelAPORT1XCH14 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH14, |
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142:4eea097334d6 | 285 | csenSingleSelAPORT1YCH15 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH15, |
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142:4eea097334d6 | 286 | csenSingleSelAPORT1XCH16 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH16, |
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142:4eea097334d6 | 287 | csenSingleSelAPORT1YCH17 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH17, |
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142:4eea097334d6 | 288 | csenSingleSelAPORT1XCH18 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH18, |
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142:4eea097334d6 | 289 | csenSingleSelAPORT1YCH19 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH19, |
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142:4eea097334d6 | 290 | csenSingleSelAPORT1XCH20 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH20, |
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142:4eea097334d6 | 291 | csenSingleSelAPORT1YCH21 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH21, |
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142:4eea097334d6 | 292 | csenSingleSelAPORT1XCH22 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH22, |
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142:4eea097334d6 | 293 | csenSingleSelAPORT1YCH23 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH23, |
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142:4eea097334d6 | 294 | csenSingleSelAPORT1XCH24 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH24, |
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142:4eea097334d6 | 295 | csenSingleSelAPORT1YCH25 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH25, |
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142:4eea097334d6 | 296 | csenSingleSelAPORT1XCH26 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH26, |
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142:4eea097334d6 | 297 | csenSingleSelAPORT1YCH27 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH27, |
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142:4eea097334d6 | 298 | csenSingleSelAPORT1XCH28 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH28, |
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142:4eea097334d6 | 299 | csenSingleSelAPORT1YCH29 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH29, |
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142:4eea097334d6 | 300 | csenSingleSelAPORT1XCH30 = _CSEN_SINGLECTRL_SINGLESEL_APORT1XCH30, |
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142:4eea097334d6 | 301 | csenSingleSelAPORT1YCH31 = _CSEN_SINGLECTRL_SINGLESEL_APORT1YCH31, |
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142:4eea097334d6 | 302 | csenSingleSelAPORT3XCH0 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH0, |
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142:4eea097334d6 | 303 | csenSingleSelAPORT3YCH1 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH1, |
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142:4eea097334d6 | 304 | csenSingleSelAPORT3XCH2 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH2, |
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142:4eea097334d6 | 305 | csenSingleSelAPORT3YCH3 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH3, |
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142:4eea097334d6 | 306 | csenSingleSelAPORT3XCH4 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH4, |
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142:4eea097334d6 | 307 | csenSingleSelAPORT3YCH5 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH5, |
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142:4eea097334d6 | 308 | csenSingleSelAPORT3XCH6 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH6, |
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142:4eea097334d6 | 309 | csenSingleSelAPORT3YCH7 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH7, |
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142:4eea097334d6 | 310 | csenSingleSelAPORT3XCH8 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH8, |
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142:4eea097334d6 | 311 | csenSingleSelAPORT3YCH9 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH9, |
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142:4eea097334d6 | 312 | csenSingleSelAPORT3XCH10 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH10, |
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142:4eea097334d6 | 313 | csenSingleSelAPORT3YCH11 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH11, |
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142:4eea097334d6 | 314 | csenSingleSelAPORT3XCH12 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH12, |
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142:4eea097334d6 | 315 | csenSingleSelAPORT3YCH13 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH13, |
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142:4eea097334d6 | 316 | csenSingleSelAPORT3XCH14 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH14, |
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142:4eea097334d6 | 317 | csenSingleSelAPORT3YCH15 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH15, |
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142:4eea097334d6 | 318 | csenSingleSelAPORT3XCH16 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH16, |
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142:4eea097334d6 | 319 | csenSingleSelAPORT3YCH17 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH17, |
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142:4eea097334d6 | 320 | csenSingleSelAPORT3XCH18 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH18, |
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142:4eea097334d6 | 321 | csenSingleSelAPORT3YCH19 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH19, |
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142:4eea097334d6 | 322 | csenSingleSelAPORT3XCH20 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH20, |
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142:4eea097334d6 | 323 | csenSingleSelAPORT3YCH21 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH21, |
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142:4eea097334d6 | 324 | csenSingleSelAPORT3XCH22 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH22, |
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142:4eea097334d6 | 325 | csenSingleSelAPORT3YCH23 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH23, |
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142:4eea097334d6 | 326 | csenSingleSelAPORT3XCH24 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH24, |
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142:4eea097334d6 | 327 | csenSingleSelAPORT3YCH25 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH25, |
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142:4eea097334d6 | 328 | csenSingleSelAPORT3XCH26 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH26, |
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142:4eea097334d6 | 329 | csenSingleSelAPORT3YCH27 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH27, |
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142:4eea097334d6 | 330 | csenSingleSelAPORT3XCH28 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH28, |
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142:4eea097334d6 | 331 | csenSingleSelAPORT3YCH29 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH29, |
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142:4eea097334d6 | 332 | csenSingleSelAPORT3XCH30 = _CSEN_SINGLECTRL_SINGLESEL_APORT3XCH30, |
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142:4eea097334d6 | 333 | csenSingleSelAPORT3YCH31 = _CSEN_SINGLECTRL_SINGLESEL_APORT3YCH31, |
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142:4eea097334d6 | 334 | } CSEN_SingleSel_TypeDef; |
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142:4eea097334d6 | 335 | |
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142:4eea097334d6 | 336 | /******************************************************************************* |
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142:4eea097334d6 | 337 | ******************************* STRUCTS *********************************** |
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142:4eea097334d6 | 338 | ******************************************************************************/ |
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142:4eea097334d6 | 339 | |
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142:4eea097334d6 | 340 | /** CSEN init structure, common for all measurement modes. */ |
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160:5571c4ff569f | 341 | typedef struct { |
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142:4eea097334d6 | 342 | /** Requests system charge pump high accuracy mode. */ |
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142:4eea097334d6 | 343 | bool cpAccuracyHi; |
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142:4eea097334d6 | 344 | |
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142:4eea097334d6 | 345 | /** Disables external kelvin connection and senses capacitor locally. */ |
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142:4eea097334d6 | 346 | bool localSense; |
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142:4eea097334d6 | 347 | |
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142:4eea097334d6 | 348 | /** Keeps the converter warm allowing continuous conversions. */ |
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142:4eea097334d6 | 349 | bool keepWarm; |
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142:4eea097334d6 | 350 | |
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142:4eea097334d6 | 351 | /** Converter warmup time is warmUpCount + 3 converter clock cycles. */ |
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142:4eea097334d6 | 352 | uint8_t warmUpCount; |
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142:4eea097334d6 | 353 | |
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142:4eea097334d6 | 354 | /** Period counter reload value. */ |
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142:4eea097334d6 | 355 | uint8_t pcReload; |
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142:4eea097334d6 | 356 | |
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142:4eea097334d6 | 357 | /** Period counter pre-scaler. */ |
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142:4eea097334d6 | 358 | CSEN_PCPrescale_TypeDef pcPrescale; |
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142:4eea097334d6 | 359 | |
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142:4eea097334d6 | 360 | /** Peripheral reflex system trigger selection. */ |
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142:4eea097334d6 | 361 | CSEN_PRSSel_TypeDef prsSel; |
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142:4eea097334d6 | 362 | |
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142:4eea097334d6 | 363 | /** CSEN input to APORT channel mapping. */ |
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142:4eea097334d6 | 364 | CSEN_InputSel_TypeDef input0To7; |
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142:4eea097334d6 | 365 | CSEN_InputSel_TypeDef input8To15; |
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142:4eea097334d6 | 366 | CSEN_InputSel_TypeDef input16To23; |
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142:4eea097334d6 | 367 | CSEN_InputSel_TypeDef input24To31; |
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142:4eea097334d6 | 368 | CSEN_InputSel_TypeDef input32To39; |
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142:4eea097334d6 | 369 | CSEN_InputSel_TypeDef input40To47; |
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142:4eea097334d6 | 370 | CSEN_InputSel_TypeDef input48To55; |
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142:4eea097334d6 | 371 | CSEN_InputSel_TypeDef input56To63; |
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142:4eea097334d6 | 372 | } CSEN_Init_TypeDef; |
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142:4eea097334d6 | 373 | |
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160:5571c4ff569f | 374 | #define CSEN_INIT_DEFAULT \ |
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160:5571c4ff569f | 375 | { \ |
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160:5571c4ff569f | 376 | false, /* Charge pump low accuracy mode. */ \ |
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160:5571c4ff569f | 377 | false, /* Use external kelvin connection. */ \ |
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160:5571c4ff569f | 378 | false, /* Disable keep warm. */ \ |
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160:5571c4ff569f | 379 | 0, /* 0+3 cycle warmup time. */ \ |
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160:5571c4ff569f | 380 | 0, /* Period counter reload. */ \ |
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160:5571c4ff569f | 381 | csenPCPrescaleDiv1, /* Period counter prescale. */ \ |
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160:5571c4ff569f | 382 | csenPRSSELCh0, /* PRS channel 0. */ \ |
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160:5571c4ff569f | 383 | csenInputSelAPORT1CH0TO7, /* input0To7 -> aport1ch0to7 */ \ |
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160:5571c4ff569f | 384 | csenInputSelAPORT1CH8TO15, /* input8To15 -> aport1ch8to15 */ \ |
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160:5571c4ff569f | 385 | csenInputSelAPORT1CH16TO23, /* input16To23 -> aport1ch16to23 */ \ |
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160:5571c4ff569f | 386 | csenInputSelAPORT1CH24TO31, /* input24To31 -> aport1ch24to31 */ \ |
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160:5571c4ff569f | 387 | csenInputSelAPORT3CH0TO7, /* input32To39 -> aport3ch0to7 */ \ |
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160:5571c4ff569f | 388 | csenInputSelAPORT3CH8TO15, /* input40To47 -> aport3ch8to15 */ \ |
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160:5571c4ff569f | 389 | csenInputSelAPORT3CH16TO23, /* input48To55 -> aport3ch16to23 */ \ |
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160:5571c4ff569f | 390 | csenInputSelAPORT3CH24TO31, /* input56To63 -> aport3ch24to31 */ \ |
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160:5571c4ff569f | 391 | } |
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142:4eea097334d6 | 392 | |
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142:4eea097334d6 | 393 | /** Measurement mode init structure. */ |
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160:5571c4ff569f | 394 | typedef struct { |
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142:4eea097334d6 | 395 | /** Selects the conversion sample mode. */ |
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142:4eea097334d6 | 396 | CSEN_SampleMode_TypeDef sampleMode; |
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142:4eea097334d6 | 397 | |
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142:4eea097334d6 | 398 | /** Selects the conversion trigger source. */ |
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142:4eea097334d6 | 399 | CSEN_TrigSel_TypeDef trigSel; |
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142:4eea097334d6 | 400 | |
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142:4eea097334d6 | 401 | /** Enables DMA operation. */ |
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142:4eea097334d6 | 402 | bool enableDma; |
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142:4eea097334d6 | 403 | |
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142:4eea097334d6 | 404 | /** Disables dividing the accumulated result. */ |
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142:4eea097334d6 | 405 | bool sumOnly; |
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142:4eea097334d6 | 406 | |
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142:4eea097334d6 | 407 | /** Selects the number of samples to accumulate per conversion. */ |
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142:4eea097334d6 | 408 | CSEN_AccMode_TypeDef accMode; |
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142:4eea097334d6 | 409 | |
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142:4eea097334d6 | 410 | /** Selects the Exponential Moving Average sample weighting. */ |
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142:4eea097334d6 | 411 | CSEN_EMASample_TypeDef emaSample; |
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142:4eea097334d6 | 412 | |
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142:4eea097334d6 | 413 | /** Enables the comparator and selects the comparison type. */ |
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142:4eea097334d6 | 414 | CSEN_CmpMode_TypeDef cmpMode; |
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142:4eea097334d6 | 415 | |
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142:4eea097334d6 | 416 | /** Comparator threshold value. Meaning depends on @p cmpMode. */ |
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142:4eea097334d6 | 417 | uint16_t cmpThr; |
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142:4eea097334d6 | 418 | |
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142:4eea097334d6 | 419 | /** Selects an APORT channel for a single conversion. */ |
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142:4eea097334d6 | 420 | CSEN_SingleSel_TypeDef singleSel; |
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142:4eea097334d6 | 421 | |
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160:5571c4ff569f | 422 | /** |
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160:5571c4ff569f | 423 | * Mask selects inputs 0 to 31. Effect depends on @p sampleMode. If sample |
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160:5571c4ff569f | 424 | * mode is bonded, then mask selects inputs to short together. If sample |
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160:5571c4ff569f | 425 | * mode is scan, then mask selects which inputs will be scanned. If sample |
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160:5571c4ff569f | 426 | * mode is single and auto-ground is on (@p autoGnd is true), mask selects |
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142:4eea097334d6 | 427 | * which pins are grounded. |
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142:4eea097334d6 | 428 | */ |
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142:4eea097334d6 | 429 | uint32_t inputMask0; |
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142:4eea097334d6 | 430 | |
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142:4eea097334d6 | 431 | /** Mask selects inputs 32 to 63. See @p inputMask0 for more information. */ |
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142:4eea097334d6 | 432 | uint32_t inputMask1; |
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142:4eea097334d6 | 433 | |
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142:4eea097334d6 | 434 | /** Ground inactive inputs during a conversion. */ |
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142:4eea097334d6 | 435 | bool autoGnd; |
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142:4eea097334d6 | 436 | |
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142:4eea097334d6 | 437 | /** Selects the converter type. */ |
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142:4eea097334d6 | 438 | CSEN_ConvSel_TypeDef convSel; |
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142:4eea097334d6 | 439 | |
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142:4eea097334d6 | 440 | /** Selects the Successive Approximation (SAR) converter resolution. */ |
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142:4eea097334d6 | 441 | CSEN_SARRes_TypeDef sarRes; |
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142:4eea097334d6 | 442 | |
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142:4eea097334d6 | 443 | /** Selects the Delta Modulation (DM) converter resolution. */ |
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142:4eea097334d6 | 444 | CSEN_DMRes_TypeDef dmRes; |
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160:5571c4ff569f | 445 | |
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160:5571c4ff569f | 446 | /** Sets the number of DM iterations (comparisons) per cycle. Only applies |
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160:5571c4ff569f | 447 | * to the Delta Modulation converter. */ |
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142:4eea097334d6 | 448 | uint8_t dmIterPerCycle; |
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160:5571c4ff569f | 449 | |
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160:5571c4ff569f | 450 | /** Sets number of DM converter cycles. Only applies to the |
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160:5571c4ff569f | 451 | * Delta Modulation converter. */ |
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142:4eea097334d6 | 452 | uint8_t dmCycles; |
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142:4eea097334d6 | 453 | |
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160:5571c4ff569f | 454 | /** Sets the DM converter initial delta value. Only applies to the |
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160:5571c4ff569f | 455 | * Delta Modulation converter. */ |
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142:4eea097334d6 | 456 | uint8_t dmDelta; |
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142:4eea097334d6 | 457 | |
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160:5571c4ff569f | 458 | /** Disable DM automatic delta size reduction per cycle. Only applies to the |
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160:5571c4ff569f | 459 | * Delta Modulation converter. */ |
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142:4eea097334d6 | 460 | bool dmFixedDelta; |
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142:4eea097334d6 | 461 | |
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160:5571c4ff569f | 462 | /** Selects the reset phase timing. Most measurements should use the default |
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160:5571c4ff569f | 463 | * value. See reference manual for details on when to adjust. */ |
Anna Bridge |
142:4eea097334d6 | 464 | CSEN_ResetPhaseSel_TypeDef resetPhase; |
Anna Bridge |
142:4eea097334d6 | 465 | |
Anna Bridge |
160:5571c4ff569f | 466 | /** Selects the output drive strength. Most measurements should use the |
Anna Bridge |
160:5571c4ff569f | 467 | * default value. See reference manual for details on when to adjust. */ |
Anna Bridge |
142:4eea097334d6 | 468 | CSEN_DriveSel_TypeDef driveSel; |
Anna Bridge |
142:4eea097334d6 | 469 | |
Anna Bridge |
142:4eea097334d6 | 470 | /** Selects the converter gain. */ |
Anna Bridge |
142:4eea097334d6 | 471 | CSEN_GainSel_TypeDef gainSel; |
Anna Bridge |
142:4eea097334d6 | 472 | } CSEN_InitMode_TypeDef; |
Anna Bridge |
142:4eea097334d6 | 473 | |
Anna Bridge |
160:5571c4ff569f | 474 | #define CSEN_INITMODE_DEFAULT \ |
Anna Bridge |
160:5571c4ff569f | 475 | { \ |
Anna Bridge |
160:5571c4ff569f | 476 | csenSampleModeSingle, /* Sample one input and stop. */ \ |
Anna Bridge |
160:5571c4ff569f | 477 | csenTrigSelStart, /* Use start bit to trigger. */ \ |
Anna Bridge |
160:5571c4ff569f | 478 | false, /* Disable DMA. */ \ |
Anna Bridge |
160:5571c4ff569f | 479 | false, /* Average the accumulated result. */ \ |
Anna Bridge |
160:5571c4ff569f | 480 | csenAccMode1, /* Accumulate 1 sample. */ \ |
Anna Bridge |
160:5571c4ff569f | 481 | csenEMASampleW1, /* Disable the EMA. */ \ |
Anna Bridge |
160:5571c4ff569f | 482 | csenCmpModeDisabled, /* Disable the comparator. */ \ |
Anna Bridge |
160:5571c4ff569f | 483 | 0, /* Comparator threshold not used. */ \ |
Anna Bridge |
160:5571c4ff569f | 484 | csenSingleSelDefault, /* Disconnect the single input. */ \ |
Anna Bridge |
160:5571c4ff569f | 485 | 0, /* Disable inputs 0 to 31. */ \ |
Anna Bridge |
160:5571c4ff569f | 486 | 0, /* Disable inputs 32 to 63. */ \ |
Anna Bridge |
160:5571c4ff569f | 487 | false, /* Do not ground inactive inputs. */ \ |
Anna Bridge |
160:5571c4ff569f | 488 | csenConvSelSAR, /* Use the SAR converter. */ \ |
Anna Bridge |
160:5571c4ff569f | 489 | csenSARRes10, /* Set SAR resolution to 10 bits. */ \ |
Anna Bridge |
160:5571c4ff569f | 490 | csenDMRes10, /* Set DM resolution to 10 bits. */ \ |
Anna Bridge |
160:5571c4ff569f | 491 | 0, /* Set DM conv/cycle to default. */ \ |
Anna Bridge |
160:5571c4ff569f | 492 | 0, /* Set DM cycles to default. */ \ |
Anna Bridge |
160:5571c4ff569f | 493 | 0, /* Set DM initial delta to default. */ \ |
Anna Bridge |
160:5571c4ff569f | 494 | false, /* Use DM auto delta reduction. */ \ |
Anna Bridge |
160:5571c4ff569f | 495 | csenResetPhaseSel0, /* Use shortest reset phase time. */ \ |
Anna Bridge |
160:5571c4ff569f | 496 | csenDriveSelFull, /* Use full output current. */ \ |
Anna Bridge |
160:5571c4ff569f | 497 | csenGainSel8X, /* Use highest converter gain. */ \ |
Anna Bridge |
160:5571c4ff569f | 498 | } |
Anna Bridge |
142:4eea097334d6 | 499 | |
Anna Bridge |
142:4eea097334d6 | 500 | /******************************************************************************* |
Anna Bridge |
142:4eea097334d6 | 501 | ***************************** PROTOTYPES ********************************** |
Anna Bridge |
142:4eea097334d6 | 502 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 503 | |
Anna Bridge |
142:4eea097334d6 | 504 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 505 | * @brief |
Anna Bridge |
142:4eea097334d6 | 506 | * Get last conversion result. |
Anna Bridge |
142:4eea097334d6 | 507 | * |
Anna Bridge |
142:4eea097334d6 | 508 | * @note |
Anna Bridge |
160:5571c4ff569f | 509 | * Check conversion busy flag before calling this function. In addition, |
Anna Bridge |
160:5571c4ff569f | 510 | * the result width and format depend on the parameters passed to the |
Anna Bridge |
142:4eea097334d6 | 511 | * @ref CSEN_InitMode() function. |
Anna Bridge |
142:4eea097334d6 | 512 | * |
Anna Bridge |
142:4eea097334d6 | 513 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 514 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 515 | * |
Anna Bridge |
142:4eea097334d6 | 516 | * @return |
Anna Bridge |
142:4eea097334d6 | 517 | * Result data from last conversion. |
Anna Bridge |
142:4eea097334d6 | 518 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 519 | __STATIC_INLINE uint32_t CSEN_DataGet(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 520 | { |
Anna Bridge |
142:4eea097334d6 | 521 | return csen->DATA; |
Anna Bridge |
142:4eea097334d6 | 522 | } |
Anna Bridge |
142:4eea097334d6 | 523 | |
Anna Bridge |
142:4eea097334d6 | 524 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 525 | * @brief |
Anna Bridge |
142:4eea097334d6 | 526 | * Get last exponential moving average. |
Anna Bridge |
142:4eea097334d6 | 527 | * |
Anna Bridge |
142:4eea097334d6 | 528 | * @note |
Anna Bridge |
142:4eea097334d6 | 529 | * Confirm CSEN is idle before calling this function. |
Anna Bridge |
142:4eea097334d6 | 530 | * |
Anna Bridge |
142:4eea097334d6 | 531 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 532 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 533 | * |
Anna Bridge |
142:4eea097334d6 | 534 | * @return |
Anna Bridge |
142:4eea097334d6 | 535 | * Exponential moving average from last conversion. |
Anna Bridge |
142:4eea097334d6 | 536 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 537 | __STATIC_INLINE uint32_t CSEN_EMAGet(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 538 | { |
Anna Bridge |
142:4eea097334d6 | 539 | return (csen->EMA & _CSEN_EMA_EMA_MASK); |
Anna Bridge |
142:4eea097334d6 | 540 | } |
Anna Bridge |
142:4eea097334d6 | 541 | |
Anna Bridge |
142:4eea097334d6 | 542 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 543 | * @brief |
Anna Bridge |
142:4eea097334d6 | 544 | * Set exponential moving average initial value. |
Anna Bridge |
142:4eea097334d6 | 545 | * |
Anna Bridge |
142:4eea097334d6 | 546 | * @note |
Anna Bridge |
142:4eea097334d6 | 547 | * Call this function before starting a conversion. |
Anna Bridge |
142:4eea097334d6 | 548 | * |
Anna Bridge |
142:4eea097334d6 | 549 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 550 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 551 | * |
Anna Bridge |
142:4eea097334d6 | 552 | * @param[in] ema |
Anna Bridge |
142:4eea097334d6 | 553 | * Initial value for the exponential moving average. |
Anna Bridge |
142:4eea097334d6 | 554 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 555 | __STATIC_INLINE void CSEN_EMASet(CSEN_TypeDef *csen, uint32_t ema) |
Anna Bridge |
142:4eea097334d6 | 556 | { |
Anna Bridge |
142:4eea097334d6 | 557 | csen->EMA = ema & _CSEN_EMA_EMA_MASK; |
Anna Bridge |
142:4eea097334d6 | 558 | } |
Anna Bridge |
142:4eea097334d6 | 559 | |
Anna Bridge |
142:4eea097334d6 | 560 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 561 | * @brief |
Anna Bridge |
142:4eea097334d6 | 562 | * Disables the CSEN. |
Anna Bridge |
142:4eea097334d6 | 563 | * |
Anna Bridge |
142:4eea097334d6 | 564 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 565 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 566 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 567 | __STATIC_INLINE void CSEN_Disable(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 568 | { |
Anna Bridge |
142:4eea097334d6 | 569 | BUS_RegBitWrite(&csen->CTRL, _CSEN_CTRL_EN_SHIFT, 0); |
Anna Bridge |
142:4eea097334d6 | 570 | } |
Anna Bridge |
142:4eea097334d6 | 571 | |
Anna Bridge |
142:4eea097334d6 | 572 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 573 | * @brief |
Anna Bridge |
142:4eea097334d6 | 574 | * Enables the CSEN. |
Anna Bridge |
142:4eea097334d6 | 575 | * |
Anna Bridge |
142:4eea097334d6 | 576 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 577 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 578 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 579 | __STATIC_INLINE void CSEN_Enable(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 580 | { |
Anna Bridge |
142:4eea097334d6 | 581 | BUS_RegBitWrite(&csen->CTRL, _CSEN_CTRL_EN_SHIFT, 1); |
Anna Bridge |
142:4eea097334d6 | 582 | } |
Anna Bridge |
142:4eea097334d6 | 583 | |
Anna Bridge |
142:4eea097334d6 | 584 | void CSEN_DMBaselineSet(CSEN_TypeDef *csen, uint32_t up, uint32_t down); |
Anna Bridge |
142:4eea097334d6 | 585 | void CSEN_Init(CSEN_TypeDef *csen, const CSEN_Init_TypeDef *init); |
Anna Bridge |
142:4eea097334d6 | 586 | void CSEN_InitMode(CSEN_TypeDef *csen, const CSEN_InitMode_TypeDef *init); |
Anna Bridge |
142:4eea097334d6 | 587 | void CSEN_Reset(CSEN_TypeDef *csen); |
Anna Bridge |
142:4eea097334d6 | 588 | |
Anna Bridge |
142:4eea097334d6 | 589 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 590 | * @brief |
Anna Bridge |
142:4eea097334d6 | 591 | * Clear one or more pending CSEN interrupts. |
Anna Bridge |
142:4eea097334d6 | 592 | * |
Anna Bridge |
142:4eea097334d6 | 593 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 594 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 595 | * |
Anna Bridge |
142:4eea097334d6 | 596 | * @param[in] flags |
Anna Bridge |
142:4eea097334d6 | 597 | * Pending CSEN interrupt source to clear. Use a bitwise logic OR combination |
Anna Bridge |
142:4eea097334d6 | 598 | * of valid interrupt flags for the CSEN module (CSEN_IF_nnn). |
Anna Bridge |
142:4eea097334d6 | 599 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 600 | __STATIC_INLINE void CSEN_IntClear(CSEN_TypeDef *csen, uint32_t flags) |
Anna Bridge |
142:4eea097334d6 | 601 | { |
Anna Bridge |
142:4eea097334d6 | 602 | csen->IFC = flags; |
Anna Bridge |
142:4eea097334d6 | 603 | } |
Anna Bridge |
142:4eea097334d6 | 604 | |
Anna Bridge |
142:4eea097334d6 | 605 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 606 | * @brief |
Anna Bridge |
142:4eea097334d6 | 607 | * Disable one or more CSEN interrupts. |
Anna Bridge |
142:4eea097334d6 | 608 | * |
Anna Bridge |
142:4eea097334d6 | 609 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 610 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 611 | * |
Anna Bridge |
142:4eea097334d6 | 612 | * @param[in] flags |
Anna Bridge |
142:4eea097334d6 | 613 | * CSEN interrupt sources to disable. Use a bitwise logic OR combination of |
Anna Bridge |
142:4eea097334d6 | 614 | * valid interrupt flags for the CSEN module (CSEN_IF_nnn). |
Anna Bridge |
142:4eea097334d6 | 615 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 616 | __STATIC_INLINE void CSEN_IntDisable(CSEN_TypeDef *csen, uint32_t flags) |
Anna Bridge |
142:4eea097334d6 | 617 | { |
Anna Bridge |
142:4eea097334d6 | 618 | csen->IEN &= ~flags; |
Anna Bridge |
142:4eea097334d6 | 619 | } |
Anna Bridge |
142:4eea097334d6 | 620 | |
Anna Bridge |
142:4eea097334d6 | 621 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 622 | * @brief |
Anna Bridge |
142:4eea097334d6 | 623 | * Enable one or more CSEN interrupts. |
Anna Bridge |
142:4eea097334d6 | 624 | * |
Anna Bridge |
142:4eea097334d6 | 625 | * @note |
Anna Bridge |
142:4eea097334d6 | 626 | * Depending on the use, a pending interrupt may already be set prior to |
Anna Bridge |
142:4eea097334d6 | 627 | * enabling the interrupt. Consider using CSEN_IntClear() prior to enabling |
Anna Bridge |
142:4eea097334d6 | 628 | * if such a pending interrupt should be ignored. |
Anna Bridge |
142:4eea097334d6 | 629 | * |
Anna Bridge |
142:4eea097334d6 | 630 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 631 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 632 | * |
Anna Bridge |
142:4eea097334d6 | 633 | * @param[in] flags |
Anna Bridge |
142:4eea097334d6 | 634 | * CSEN interrupt sources to enable. Use a bitwise logic OR combination of |
Anna Bridge |
142:4eea097334d6 | 635 | * valid interrupt flags for the CSEN module (CSEN_IF_nnn). |
Anna Bridge |
142:4eea097334d6 | 636 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 637 | __STATIC_INLINE void CSEN_IntEnable(CSEN_TypeDef *csen, uint32_t flags) |
Anna Bridge |
142:4eea097334d6 | 638 | { |
Anna Bridge |
142:4eea097334d6 | 639 | csen->IEN |= flags; |
Anna Bridge |
142:4eea097334d6 | 640 | } |
Anna Bridge |
142:4eea097334d6 | 641 | |
Anna Bridge |
142:4eea097334d6 | 642 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 643 | * @brief |
Anna Bridge |
142:4eea097334d6 | 644 | * Get pending CSEN interrupt flags. |
Anna Bridge |
142:4eea097334d6 | 645 | * |
Anna Bridge |
142:4eea097334d6 | 646 | * @note |
Anna Bridge |
142:4eea097334d6 | 647 | * The event bits are not cleared by the use of this function. |
Anna Bridge |
142:4eea097334d6 | 648 | * |
Anna Bridge |
142:4eea097334d6 | 649 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 650 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 651 | * |
Anna Bridge |
142:4eea097334d6 | 652 | * @return |
Anna Bridge |
142:4eea097334d6 | 653 | * CSEN interrupt sources pending. A bitwise logic OR combination of valid |
Anna Bridge |
142:4eea097334d6 | 654 | * interrupt flags for the CSEN module (CSEN_IF_nnn). |
Anna Bridge |
142:4eea097334d6 | 655 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 656 | __STATIC_INLINE uint32_t CSEN_IntGet(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 657 | { |
Anna Bridge |
142:4eea097334d6 | 658 | return csen->IF; |
Anna Bridge |
142:4eea097334d6 | 659 | } |
Anna Bridge |
142:4eea097334d6 | 660 | |
Anna Bridge |
142:4eea097334d6 | 661 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 662 | * @brief |
Anna Bridge |
142:4eea097334d6 | 663 | * Get enabled and pending CSEN interrupt flags. |
Anna Bridge |
142:4eea097334d6 | 664 | * Useful for handling more interrupt sources in the same interrupt handler. |
Anna Bridge |
142:4eea097334d6 | 665 | * |
Anna Bridge |
142:4eea097334d6 | 666 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 667 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 668 | * |
Anna Bridge |
142:4eea097334d6 | 669 | * @note |
Anna Bridge |
142:4eea097334d6 | 670 | * Interrupt flags are not cleared by the use of this function. |
Anna Bridge |
142:4eea097334d6 | 671 | * |
Anna Bridge |
142:4eea097334d6 | 672 | * @return |
Anna Bridge |
142:4eea097334d6 | 673 | * Pending and enabled CSEN interrupt sources. |
Anna Bridge |
142:4eea097334d6 | 674 | * The return value is the bitwise AND combination of |
Anna Bridge |
142:4eea097334d6 | 675 | * - the OR combination of enabled interrupt sources in CSENx_IEN_nnn |
Anna Bridge |
142:4eea097334d6 | 676 | * register (CSENx_IEN_nnn) and |
Anna Bridge |
142:4eea097334d6 | 677 | * - the OR combination of valid interrupt flags of the CSEN module |
Anna Bridge |
142:4eea097334d6 | 678 | * (CSENx_IF_nnn). |
Anna Bridge |
142:4eea097334d6 | 679 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 680 | __STATIC_INLINE uint32_t CSEN_IntGetEnabled(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 681 | { |
Anna Bridge |
142:4eea097334d6 | 682 | uint32_t ien; |
Anna Bridge |
142:4eea097334d6 | 683 | |
Anna Bridge |
142:4eea097334d6 | 684 | /* Store CSENx->IEN in temporary variable in order to define explicit order |
Anna Bridge |
142:4eea097334d6 | 685 | * of volatile accesses. */ |
Anna Bridge |
142:4eea097334d6 | 686 | ien = csen->IEN; |
Anna Bridge |
142:4eea097334d6 | 687 | |
Anna Bridge |
142:4eea097334d6 | 688 | /* Bitwise AND of pending and enabled interrupts */ |
Anna Bridge |
142:4eea097334d6 | 689 | return csen->IF & ien; |
Anna Bridge |
142:4eea097334d6 | 690 | } |
Anna Bridge |
142:4eea097334d6 | 691 | |
Anna Bridge |
142:4eea097334d6 | 692 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 693 | * @brief |
Anna Bridge |
142:4eea097334d6 | 694 | * Set one or more pending CSEN interrupts from SW. |
Anna Bridge |
142:4eea097334d6 | 695 | * |
Anna Bridge |
142:4eea097334d6 | 696 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 697 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 698 | * |
Anna Bridge |
142:4eea097334d6 | 699 | * @param[in] flags |
Anna Bridge |
142:4eea097334d6 | 700 | * CSEN interrupt sources to set to pending. Use a bitwise logic OR combination |
Anna Bridge |
142:4eea097334d6 | 701 | * of valid interrupt flags for the CSEN module (CSEN_IF_nnn). |
Anna Bridge |
142:4eea097334d6 | 702 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 703 | __STATIC_INLINE void CSEN_IntSet(CSEN_TypeDef *csen, uint32_t flags) |
Anna Bridge |
142:4eea097334d6 | 704 | { |
Anna Bridge |
142:4eea097334d6 | 705 | csen->IFS = flags; |
Anna Bridge |
142:4eea097334d6 | 706 | } |
Anna Bridge |
142:4eea097334d6 | 707 | |
Anna Bridge |
142:4eea097334d6 | 708 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 709 | * @brief |
Anna Bridge |
142:4eea097334d6 | 710 | * Return CSEN conversion busy status. |
Anna Bridge |
142:4eea097334d6 | 711 | * |
Anna Bridge |
142:4eea097334d6 | 712 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 713 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 714 | * |
Anna Bridge |
142:4eea097334d6 | 715 | * @return |
Anna Bridge |
142:4eea097334d6 | 716 | * True if CSEN conversion is in progress. |
Anna Bridge |
142:4eea097334d6 | 717 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 718 | __STATIC_INLINE bool CSEN_IsBusy(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 719 | { |
Anna Bridge |
142:4eea097334d6 | 720 | return (bool)(csen->STATUS & _CSEN_STATUS_CSENBUSY_MASK); |
Anna Bridge |
142:4eea097334d6 | 721 | } |
Anna Bridge |
142:4eea097334d6 | 722 | |
Anna Bridge |
142:4eea097334d6 | 723 | /***************************************************************************//** |
Anna Bridge |
142:4eea097334d6 | 724 | * @brief |
Anna Bridge |
142:4eea097334d6 | 725 | * Start scan sequence and/or single conversion. |
Anna Bridge |
142:4eea097334d6 | 726 | * |
Anna Bridge |
142:4eea097334d6 | 727 | * @param[in] csen |
Anna Bridge |
142:4eea097334d6 | 728 | * Pointer to CSEN peripheral register block. |
Anna Bridge |
142:4eea097334d6 | 729 | ******************************************************************************/ |
Anna Bridge |
142:4eea097334d6 | 730 | __STATIC_INLINE void CSEN_Start(CSEN_TypeDef *csen) |
Anna Bridge |
142:4eea097334d6 | 731 | { |
Anna Bridge |
142:4eea097334d6 | 732 | csen->CMD = CSEN_CMD_START; |
Anna Bridge |
142:4eea097334d6 | 733 | } |
Anna Bridge |
142:4eea097334d6 | 734 | |
Anna Bridge |
142:4eea097334d6 | 735 | /** @} (end addtogroup CSEN) */ |
Anna Bridge |
142:4eea097334d6 | 736 | /** @} (end addtogroup emlib) */ |
Anna Bridge |
142:4eea097334d6 | 737 | |
Anna Bridge |
142:4eea097334d6 | 738 | #ifdef __cplusplus |
Anna Bridge |
142:4eea097334d6 | 739 | } |
Anna Bridge |
142:4eea097334d6 | 740 | #endif |
Anna Bridge |
142:4eea097334d6 | 741 | |
Anna Bridge |
142:4eea097334d6 | 742 | #endif /* defined(CSEN_COUNT) && (CSEN_COUNT > 0) */ |
Anna Bridge |
142:4eea097334d6 | 743 | #endif /* EM_CSEN_H */ |