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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_MAX32620HSP/i2cm_regs.h@125:2e9cc70d1897, 2016-08-31 (annotated)

Committer:
AnnaBridge
Date:
Wed Aug 31 18:09:46 2016 +0100
Revision:
125:2e9cc70d1897
Release 125 of the mbed library



Changes:



New target - KL27Z_IAR

New target - MAX32620HSP_ARM_STD

New target - MAX32620HSP_GCC_ARM

New target - MAX32620HSP_IAR

New target - NCS36510_ARM_STD

New target - NCS36510_GCC_ARM

New target - NCS36510_IAR



Added support for NSAPI_REUSEADDR to the lwip interface.

STM32F3 family : Add and enable asynchronous serial, plus tests.

STM32L4 family : Add and enable asynchronous serial, plus tests.

Fixing issue where GCC fails to report compile errors when non-verbose.

Add ethernet and IPV4 support for: NUCLEO_F207ZG, NUCLEO_F429ZI, NUCLEO_F767ZI, DISCO_F746NG.

RZ_A1H - Enable SPI1 on pins P6_4 to P6_7.

KL27Z : SPI driver bug fixes and Improvements, ARM linker file update.

STM32F4, STM32F7 families : Add entropy functions, documentation, code improvements, fix build issues.

HEXIWEAR: Update I2C pin mapping, Add support to create KDS projects.

LWIP - fix recv blocking send on accepted sockets.

SingletonPtr bugfixes.

Beetle: Implement sleep API.

uVisor: Update to v0.20.1-alpha, minor documentation update.

STM32F3 : fix RTOS IAR test, RTOS GCC_ARM test.

nrf5x : Introduce uart hardware flow control configuration.

K64F/K22F: Implement HAL lp_timer API.

Ticker: Move ticker initialisation to object creation time.

STM32F4 : remove printf from pwmout

NXP : Fix multiple definition errors in GCC_CR build,  fix linker errors.

Add TOOLCHAIN_GCC_CR support.

STM32L1 family : Add and enable asynchronous serial, plus tests.

mbed-client : Fix Bootstrap and Connector functionality.

NUC472 : Fix Ethernet wrong INT status in RX_Action.

RTX_CM_lib.h : fix compiler warning.

NUCLEO : Use GCC small build for 64K flash STM32.

STM32F2 family : Add and enable asynchronous serial, plus tests.

uvisor : Move page heap after uVisor private data, update page allocator.

K64F: Revert to hardcoded stack pointer in RTX .

dns-query : Internal API change , documentation, Added support for multiple results and ipv6.

Add support for implementation-provided DNS servers.

Adopted netconn_gethostbyname in the lwip interface.

Restructured nsapi_dns.h to have clear separation between C/C++ .

Tool fixes.

Tests : New ones added and some updates to existing.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 125:2e9cc70d1897 1 /*******************************************************************************
AnnaBridge 125:2e9cc70d1897 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 125:2e9cc70d1897 3 *
AnnaBridge 125:2e9cc70d1897 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 125:2e9cc70d1897 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 125:2e9cc70d1897 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 125:2e9cc70d1897 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 125:2e9cc70d1897 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 125:2e9cc70d1897 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 125:2e9cc70d1897 10 *
AnnaBridge 125:2e9cc70d1897 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 125:2e9cc70d1897 12 * in all copies or substantial portions of the Software.
AnnaBridge 125:2e9cc70d1897 13 *
AnnaBridge 125:2e9cc70d1897 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 125:2e9cc70d1897 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 125:2e9cc70d1897 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 125:2e9cc70d1897 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 125:2e9cc70d1897 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 125:2e9cc70d1897 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 125:2e9cc70d1897 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 125:2e9cc70d1897 21 *
AnnaBridge 125:2e9cc70d1897 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 125:2e9cc70d1897 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 125:2e9cc70d1897 24 * Products, Inc. Branding Policy.
AnnaBridge 125:2e9cc70d1897 25 *
AnnaBridge 125:2e9cc70d1897 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 125:2e9cc70d1897 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 125:2e9cc70d1897 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 125:2e9cc70d1897 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 125:2e9cc70d1897 30 * ownership rights.
AnnaBridge 125:2e9cc70d1897 31 *******************************************************************************
AnnaBridge 125:2e9cc70d1897 32 */
AnnaBridge 125:2e9cc70d1897 33
AnnaBridge 125:2e9cc70d1897 34 #ifndef _MXC_I2CM_REGS_H_
AnnaBridge 125:2e9cc70d1897 35 #define _MXC_I2CM_REGS_H_
AnnaBridge 125:2e9cc70d1897 36
AnnaBridge 125:2e9cc70d1897 37 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 38 extern "C" {
AnnaBridge 125:2e9cc70d1897 39 #endif
AnnaBridge 125:2e9cc70d1897 40
AnnaBridge 125:2e9cc70d1897 41 #include <stdint.h>
AnnaBridge 125:2e9cc70d1897 42
AnnaBridge 125:2e9cc70d1897 43 /*
AnnaBridge 125:2e9cc70d1897 44 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 125:2e9cc70d1897 45 */
AnnaBridge 125:2e9cc70d1897 46 #ifndef __IO
AnnaBridge 125:2e9cc70d1897 47 #define __IO volatile
AnnaBridge 125:2e9cc70d1897 48 #endif
AnnaBridge 125:2e9cc70d1897 49 #ifndef __I
AnnaBridge 125:2e9cc70d1897 50 #define __I volatile const
AnnaBridge 125:2e9cc70d1897 51 #endif
AnnaBridge 125:2e9cc70d1897 52 #ifndef __O
AnnaBridge 125:2e9cc70d1897 53 #define __O volatile
AnnaBridge 125:2e9cc70d1897 54 #endif
AnnaBridge 125:2e9cc70d1897 55
AnnaBridge 125:2e9cc70d1897 56
AnnaBridge 125:2e9cc70d1897 57 #define MXC_S_I2CM_TRANS_TAG_START 0x000
AnnaBridge 125:2e9cc70d1897 58 #define MXC_S_I2CM_TRANS_TAG_TXDATA_ACK 0x100
AnnaBridge 125:2e9cc70d1897 59 #define MXC_S_I2CM_TRANS_TAG_TXDATA_NACK 0x200
AnnaBridge 125:2e9cc70d1897 60 #define MXC_S_I2CM_TRANS_TAG_RXDATA_COUNT 0x400
AnnaBridge 125:2e9cc70d1897 61 #define MXC_S_I2CM_TRANS_TAG_RXDATA_NACK 0x500
AnnaBridge 125:2e9cc70d1897 62 #define MXC_S_I2CM_TRANS_TAG_STOP 0x700
AnnaBridge 125:2e9cc70d1897 63 #define MXC_S_I2CM_RSTLS_TAG_DATA 0x100
AnnaBridge 125:2e9cc70d1897 64 #define MXC_S_I2CM_RSTLS_TAG_EMPTY 0x200
AnnaBridge 125:2e9cc70d1897 65
AnnaBridge 125:2e9cc70d1897 66 /*
AnnaBridge 125:2e9cc70d1897 67 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
AnnaBridge 125:2e9cc70d1897 68 access to each register in module.
AnnaBridge 125:2e9cc70d1897 69 */
AnnaBridge 125:2e9cc70d1897 70
AnnaBridge 125:2e9cc70d1897 71 /* Offset Register Description
AnnaBridge 125:2e9cc70d1897 72 ============= ============================================================================ */
AnnaBridge 125:2e9cc70d1897 73 typedef struct {
AnnaBridge 125:2e9cc70d1897 74 __IO uint32_t fs_clk_div; /* 0x0000 I2C Master Full Speed SCL Clock Settings */
AnnaBridge 125:2e9cc70d1897 75 __I uint32_t rsv004[2]; /* 0x0004-0x0008 */
AnnaBridge 125:2e9cc70d1897 76 __IO uint32_t timeout; /* 0x000C I2C Master Timeout and Auto-Stop Settings */
AnnaBridge 125:2e9cc70d1897 77 __IO uint32_t ctrl; /* 0x0010 I2C Master Control Register */
AnnaBridge 125:2e9cc70d1897 78 __IO uint32_t trans; /* 0x0014 I2C Master Transaction Start and Status Flags */
AnnaBridge 125:2e9cc70d1897 79 __IO uint32_t intfl; /* 0x0018 I2C Master Interrupt Flags */
AnnaBridge 125:2e9cc70d1897 80 __IO uint32_t inten; /* 0x001C I2C Master Interrupt Enable/Disable Controls */
AnnaBridge 125:2e9cc70d1897 81 __I uint32_t rsv020[2]; /* 0x0020-0x0024 */
AnnaBridge 125:2e9cc70d1897 82 __IO uint32_t bb; /* 0x0028 I2C Master Bit-Bang Control Register */
AnnaBridge 125:2e9cc70d1897 83 } mxc_i2cm_regs_t;
AnnaBridge 125:2e9cc70d1897 84
AnnaBridge 125:2e9cc70d1897 85
AnnaBridge 125:2e9cc70d1897 86 /* Offset Register Description
AnnaBridge 125:2e9cc70d1897 87 ============= ============================================================================ */
AnnaBridge 125:2e9cc70d1897 88 typedef struct {
AnnaBridge 125:2e9cc70d1897 89 __IO uint16_t trans[1024]; /* 0x0000-0x07FC I2C Master 0 Transaction FIFO */
AnnaBridge 125:2e9cc70d1897 90 __IO uint16_t rslts[1024]; /* 0x0800-0x0FFC I2C Master 0 Results FIFO */
AnnaBridge 125:2e9cc70d1897 91 } mxc_i2cm_fifo_regs_t;
AnnaBridge 125:2e9cc70d1897 92
AnnaBridge 125:2e9cc70d1897 93
AnnaBridge 125:2e9cc70d1897 94 /*
AnnaBridge 125:2e9cc70d1897 95 Register offsets for module I2CM.
AnnaBridge 125:2e9cc70d1897 96 */
AnnaBridge 125:2e9cc70d1897 97
AnnaBridge 125:2e9cc70d1897 98 #define MXC_R_I2CM_OFFS_FS_CLK_DIV ((uint32_t)0x00000000UL)
AnnaBridge 125:2e9cc70d1897 99 #define MXC_R_I2CM_OFFS_TIMEOUT ((uint32_t)0x0000000CUL)
AnnaBridge 125:2e9cc70d1897 100 #define MXC_R_I2CM_OFFS_CTRL ((uint32_t)0x00000010UL)
AnnaBridge 125:2e9cc70d1897 101 #define MXC_R_I2CM_OFFS_TRANS ((uint32_t)0x00000014UL)
AnnaBridge 125:2e9cc70d1897 102 #define MXC_R_I2CM_OFFS_INTFL ((uint32_t)0x00000018UL)
AnnaBridge 125:2e9cc70d1897 103 #define MXC_R_I2CM_OFFS_INTEN ((uint32_t)0x0000001CUL)
AnnaBridge 125:2e9cc70d1897 104 #define MXC_R_I2CM_OFFS_BB ((uint32_t)0x00000028UL)
AnnaBridge 125:2e9cc70d1897 105 #define MXC_R_I2CM_FIFO_OFFS_TRANS ((uint32_t)0x00000000UL)
AnnaBridge 125:2e9cc70d1897 106 #define MXC_R_I2CM_FIFO_OFFS_RSLTS ((uint32_t)0x00000800UL)
AnnaBridge 125:2e9cc70d1897 107
AnnaBridge 125:2e9cc70d1897 108
AnnaBridge 125:2e9cc70d1897 109 /*
AnnaBridge 125:2e9cc70d1897 110 Field positions and masks for module I2CM.
AnnaBridge 125:2e9cc70d1897 111 */
AnnaBridge 125:2e9cc70d1897 112
AnnaBridge 125:2e9cc70d1897 113 #define MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV_POS 0
AnnaBridge 125:2e9cc70d1897 114 #define MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV ((uint32_t)(0x000000FFUL << MXC_F_I2CM_FS_CLK_DIV_FS_FILTER_CLK_DIV_POS))
AnnaBridge 125:2e9cc70d1897 115 #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT_POS 8
AnnaBridge 125:2e9cc70d1897 116 #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_FS_CLK_DIV_FS_SCL_LO_CNT_POS))
AnnaBridge 125:2e9cc70d1897 117 #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT_POS 20
AnnaBridge 125:2e9cc70d1897 118 #define MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT ((uint32_t)(0x00000FFFUL << MXC_F_I2CM_FS_CLK_DIV_FS_SCL_HI_CNT_POS))
AnnaBridge 125:2e9cc70d1897 119
AnnaBridge 125:2e9cc70d1897 120 #define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS 16
AnnaBridge 125:2e9cc70d1897 121 #define MXC_F_I2CM_TIMEOUT_TX_TIMEOUT ((uint32_t)(0x000000FFUL << MXC_F_I2CM_TIMEOUT_TX_TIMEOUT_POS))
AnnaBridge 125:2e9cc70d1897 122 #define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS 24
AnnaBridge 125:2e9cc70d1897 123 #define MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_TIMEOUT_AUTO_STOP_EN_POS))
AnnaBridge 125:2e9cc70d1897 124
AnnaBridge 125:2e9cc70d1897 125 #define MXC_F_I2CM_CTRL_TX_FIFO_EN_POS 2
AnnaBridge 125:2e9cc70d1897 126 #define MXC_F_I2CM_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_TX_FIFO_EN_POS))
AnnaBridge 125:2e9cc70d1897 127 #define MXC_F_I2CM_CTRL_RX_FIFO_EN_POS 3
AnnaBridge 125:2e9cc70d1897 128 #define MXC_F_I2CM_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_RX_FIFO_EN_POS))
AnnaBridge 125:2e9cc70d1897 129 #define MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS 7
AnnaBridge 125:2e9cc70d1897 130 #define MXC_F_I2CM_CTRL_MSTR_RESET_EN ((uint32_t)(0x00000001UL << MXC_F_I2CM_CTRL_MSTR_RESET_EN_POS))
AnnaBridge 125:2e9cc70d1897 131
AnnaBridge 125:2e9cc70d1897 132 #define MXC_F_I2CM_TRANS_TX_START_POS 0
AnnaBridge 125:2e9cc70d1897 133 #define MXC_F_I2CM_TRANS_TX_START ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_START_POS))
AnnaBridge 125:2e9cc70d1897 134 #define MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS 1
AnnaBridge 125:2e9cc70d1897 135 #define MXC_F_I2CM_TRANS_TX_IN_PROGRESS ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_IN_PROGRESS_POS))
AnnaBridge 125:2e9cc70d1897 136 #define MXC_F_I2CM_TRANS_TX_DONE_POS 2
AnnaBridge 125:2e9cc70d1897 137 #define MXC_F_I2CM_TRANS_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_DONE_POS))
AnnaBridge 125:2e9cc70d1897 138 #define MXC_F_I2CM_TRANS_TX_NACKED_POS 3
AnnaBridge 125:2e9cc70d1897 139 #define MXC_F_I2CM_TRANS_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_NACKED_POS))
AnnaBridge 125:2e9cc70d1897 140 #define MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS 4
AnnaBridge 125:2e9cc70d1897 141 #define MXC_F_I2CM_TRANS_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_LOST_ARBITR_POS))
AnnaBridge 125:2e9cc70d1897 142 #define MXC_F_I2CM_TRANS_TX_TIMEOUT_POS 5
AnnaBridge 125:2e9cc70d1897 143 #define MXC_F_I2CM_TRANS_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_TRANS_TX_TIMEOUT_POS))
AnnaBridge 125:2e9cc70d1897 144
AnnaBridge 125:2e9cc70d1897 145 #define MXC_F_I2CM_INTFL_TX_DONE_POS 0
AnnaBridge 125:2e9cc70d1897 146 #define MXC_F_I2CM_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_DONE_POS))
AnnaBridge 125:2e9cc70d1897 147 #define MXC_F_I2CM_INTFL_TX_NACKED_POS 1
AnnaBridge 125:2e9cc70d1897 148 #define MXC_F_I2CM_INTFL_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_NACKED_POS))
AnnaBridge 125:2e9cc70d1897 149 #define MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS 2
AnnaBridge 125:2e9cc70d1897 150 #define MXC_F_I2CM_INTFL_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_LOST_ARBITR_POS))
AnnaBridge 125:2e9cc70d1897 151 #define MXC_F_I2CM_INTFL_TX_TIMEOUT_POS 3
AnnaBridge 125:2e9cc70d1897 152 #define MXC_F_I2CM_INTFL_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_TIMEOUT_POS))
AnnaBridge 125:2e9cc70d1897 153 #define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS 4
AnnaBridge 125:2e9cc70d1897 154 #define MXC_F_I2CM_INTFL_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_EMPTY_POS))
AnnaBridge 125:2e9cc70d1897 155 #define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS 5
AnnaBridge 125:2e9cc70d1897 156 #define MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_TX_FIFO_3Q_EMPTY_POS))
AnnaBridge 125:2e9cc70d1897 157 #define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS 6
AnnaBridge 125:2e9cc70d1897 158 #define MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_NOT_EMPTY_POS))
AnnaBridge 125:2e9cc70d1897 159 #define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS 7
AnnaBridge 125:2e9cc70d1897 160 #define MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_2Q_FULL_POS))
AnnaBridge 125:2e9cc70d1897 161 #define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS 8
AnnaBridge 125:2e9cc70d1897 162 #define MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_3Q_FULL_POS))
AnnaBridge 125:2e9cc70d1897 163 #define MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS 9
AnnaBridge 125:2e9cc70d1897 164 #define MXC_F_I2CM_INTFL_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTFL_RX_FIFO_FULL_POS))
AnnaBridge 125:2e9cc70d1897 165
AnnaBridge 125:2e9cc70d1897 166 #define MXC_F_I2CM_INTEN_TX_DONE_POS 0
AnnaBridge 125:2e9cc70d1897 167 #define MXC_F_I2CM_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_DONE_POS))
AnnaBridge 125:2e9cc70d1897 168 #define MXC_F_I2CM_INTEN_TX_NACKED_POS 1
AnnaBridge 125:2e9cc70d1897 169 #define MXC_F_I2CM_INTEN_TX_NACKED ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_NACKED_POS))
AnnaBridge 125:2e9cc70d1897 170 #define MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS 2
AnnaBridge 125:2e9cc70d1897 171 #define MXC_F_I2CM_INTEN_TX_LOST_ARBITR ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_LOST_ARBITR_POS))
AnnaBridge 125:2e9cc70d1897 172 #define MXC_F_I2CM_INTEN_TX_TIMEOUT_POS 3
AnnaBridge 125:2e9cc70d1897 173 #define MXC_F_I2CM_INTEN_TX_TIMEOUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_TIMEOUT_POS))
AnnaBridge 125:2e9cc70d1897 174 #define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS 4
AnnaBridge 125:2e9cc70d1897 175 #define MXC_F_I2CM_INTEN_TX_FIFO_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_EMPTY_POS))
AnnaBridge 125:2e9cc70d1897 176 #define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS 5
AnnaBridge 125:2e9cc70d1897 177 #define MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_TX_FIFO_3Q_EMPTY_POS))
AnnaBridge 125:2e9cc70d1897 178 #define MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY_POS 6
AnnaBridge 125:2e9cc70d1897 179 #define MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_NOT_EMPTY_POS))
AnnaBridge 125:2e9cc70d1897 180 #define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS 7
AnnaBridge 125:2e9cc70d1897 181 #define MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_2Q_FULL_POS))
AnnaBridge 125:2e9cc70d1897 182 #define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS 8
AnnaBridge 125:2e9cc70d1897 183 #define MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_3Q_FULL_POS))
AnnaBridge 125:2e9cc70d1897 184 #define MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS 9
AnnaBridge 125:2e9cc70d1897 185 #define MXC_F_I2CM_INTEN_RX_FIFO_FULL ((uint32_t)(0x00000001UL << MXC_F_I2CM_INTEN_RX_FIFO_FULL_POS))
AnnaBridge 125:2e9cc70d1897 186
AnnaBridge 125:2e9cc70d1897 187 #define MXC_F_I2CM_BB_BB_SCL_OUT_POS 0
AnnaBridge 125:2e9cc70d1897 188 #define MXC_F_I2CM_BB_BB_SCL_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_OUT_POS))
AnnaBridge 125:2e9cc70d1897 189 #define MXC_F_I2CM_BB_BB_SDA_OUT_POS 1
AnnaBridge 125:2e9cc70d1897 190 #define MXC_F_I2CM_BB_BB_SDA_OUT ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_OUT_POS))
AnnaBridge 125:2e9cc70d1897 191 #define MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS 2
AnnaBridge 125:2e9cc70d1897 192 #define MXC_F_I2CM_BB_BB_SCL_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SCL_IN_VAL_POS))
AnnaBridge 125:2e9cc70d1897 193 #define MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS 3
AnnaBridge 125:2e9cc70d1897 194 #define MXC_F_I2CM_BB_BB_SDA_IN_VAL ((uint32_t)(0x00000001UL << MXC_F_I2CM_BB_BB_SDA_IN_VAL_POS))
AnnaBridge 125:2e9cc70d1897 195 #define MXC_F_I2CM_BB_RX_FIFO_CNT_POS 16
AnnaBridge 125:2e9cc70d1897 196 #define MXC_F_I2CM_BB_RX_FIFO_CNT ((uint32_t)(0x0000001FUL << MXC_F_I2CM_BB_RX_FIFO_CNT_POS))
AnnaBridge 125:2e9cc70d1897 197
AnnaBridge 125:2e9cc70d1897 198
AnnaBridge 125:2e9cc70d1897 199
AnnaBridge 125:2e9cc70d1897 200 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 201 }
AnnaBridge 125:2e9cc70d1897 202 #endif
AnnaBridge 125:2e9cc70d1897 203
AnnaBridge 125:2e9cc70d1897 204 #endif /* _MXC_I2CM_REGS_H_ */
AnnaBridge 125:2e9cc70d1897 205