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Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

TARGET_MAX32620HSP/adc_regs.h@125:2e9cc70d1897, 2016-08-31 (annotated)

Committer:
AnnaBridge
Date:
Wed Aug 31 18:09:46 2016 +0100
Revision:
125:2e9cc70d1897
Release 125 of the mbed library



Changes:



New target - KL27Z_IAR

New target - MAX32620HSP_ARM_STD

New target - MAX32620HSP_GCC_ARM

New target - MAX32620HSP_IAR

New target - NCS36510_ARM_STD

New target - NCS36510_GCC_ARM

New target - NCS36510_IAR



Added support for NSAPI_REUSEADDR to the lwip interface.

STM32F3 family : Add and enable asynchronous serial, plus tests.

STM32L4 family : Add and enable asynchronous serial, plus tests.

Fixing issue where GCC fails to report compile errors when non-verbose.

Add ethernet and IPV4 support for: NUCLEO_F207ZG, NUCLEO_F429ZI, NUCLEO_F767ZI, DISCO_F746NG.

RZ_A1H - Enable SPI1 on pins P6_4 to P6_7.

KL27Z : SPI driver bug fixes and Improvements, ARM linker file update.

STM32F4, STM32F7 families : Add entropy functions, documentation, code improvements, fix build issues.

HEXIWEAR: Update I2C pin mapping, Add support to create KDS projects.

LWIP - fix recv blocking send on accepted sockets.

SingletonPtr bugfixes.

Beetle: Implement sleep API.

uVisor: Update to v0.20.1-alpha, minor documentation update.

STM32F3 : fix RTOS IAR test, RTOS GCC_ARM test.

nrf5x : Introduce uart hardware flow control configuration.

K64F/K22F: Implement HAL lp_timer API.

Ticker: Move ticker initialisation to object creation time.

STM32F4 : remove printf from pwmout

NXP : Fix multiple definition errors in GCC_CR build,  fix linker errors.

Add TOOLCHAIN_GCC_CR support.

STM32L1 family : Add and enable asynchronous serial, plus tests.

mbed-client : Fix Bootstrap and Connector functionality.

NUC472 : Fix Ethernet wrong INT status in RX_Action.

RTX_CM_lib.h : fix compiler warning.

NUCLEO : Use GCC small build for 64K flash STM32.

STM32F2 family : Add and enable asynchronous serial, plus tests.

uvisor : Move page heap after uVisor private data, update page allocator.

K64F: Revert to hardcoded stack pointer in RTX .

dns-query : Internal API change , documentation, Added support for multiple results and ipv6.

Add support for implementation-provided DNS servers.

Adopted netconn_gethostbyname in the lwip interface.

Restructured nsapi_dns.h to have clear separation between C/C++ .

Tool fixes.

Tests : New ones added and some updates to existing.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 125:2e9cc70d1897 1 /*******************************************************************************
AnnaBridge 125:2e9cc70d1897 2 * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved.
AnnaBridge 125:2e9cc70d1897 3 *
AnnaBridge 125:2e9cc70d1897 4 * Permission is hereby granted, free of charge, to any person obtaining a
AnnaBridge 125:2e9cc70d1897 5 * copy of this software and associated documentation files (the "Software"),
AnnaBridge 125:2e9cc70d1897 6 * to deal in the Software without restriction, including without limitation
AnnaBridge 125:2e9cc70d1897 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
AnnaBridge 125:2e9cc70d1897 8 * and/or sell copies of the Software, and to permit persons to whom the
AnnaBridge 125:2e9cc70d1897 9 * Software is furnished to do so, subject to the following conditions:
AnnaBridge 125:2e9cc70d1897 10 *
AnnaBridge 125:2e9cc70d1897 11 * The above copyright notice and this permission notice shall be included
AnnaBridge 125:2e9cc70d1897 12 * in all copies or substantial portions of the Software.
AnnaBridge 125:2e9cc70d1897 13 *
AnnaBridge 125:2e9cc70d1897 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
AnnaBridge 125:2e9cc70d1897 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
AnnaBridge 125:2e9cc70d1897 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
AnnaBridge 125:2e9cc70d1897 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
AnnaBridge 125:2e9cc70d1897 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
AnnaBridge 125:2e9cc70d1897 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
AnnaBridge 125:2e9cc70d1897 20 * OTHER DEALINGS IN THE SOFTWARE.
AnnaBridge 125:2e9cc70d1897 21 *
AnnaBridge 125:2e9cc70d1897 22 * Except as contained in this notice, the name of Maxim Integrated
AnnaBridge 125:2e9cc70d1897 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
AnnaBridge 125:2e9cc70d1897 24 * Products, Inc. Branding Policy.
AnnaBridge 125:2e9cc70d1897 25 *
AnnaBridge 125:2e9cc70d1897 26 * The mere transfer of this software does not imply any licenses
AnnaBridge 125:2e9cc70d1897 27 * of trade secrets, proprietary technology, copyrights, patents,
AnnaBridge 125:2e9cc70d1897 28 * trademarks, maskwork rights, or any other form of intellectual
AnnaBridge 125:2e9cc70d1897 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
AnnaBridge 125:2e9cc70d1897 30 * ownership rights.
AnnaBridge 125:2e9cc70d1897 31 *******************************************************************************
AnnaBridge 125:2e9cc70d1897 32 */
AnnaBridge 125:2e9cc70d1897 33
AnnaBridge 125:2e9cc70d1897 34 #ifndef _MXC_ADC_REGS_H_
AnnaBridge 125:2e9cc70d1897 35 #define _MXC_ADC_REGS_H_
AnnaBridge 125:2e9cc70d1897 36
AnnaBridge 125:2e9cc70d1897 37 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 38 extern "C" {
AnnaBridge 125:2e9cc70d1897 39 #endif
AnnaBridge 125:2e9cc70d1897 40
AnnaBridge 125:2e9cc70d1897 41 #include <stdint.h>
AnnaBridge 125:2e9cc70d1897 42
AnnaBridge 125:2e9cc70d1897 43 /*
AnnaBridge 125:2e9cc70d1897 44 If types are not defined elsewhere (CMSIS) define them here
AnnaBridge 125:2e9cc70d1897 45 */
AnnaBridge 125:2e9cc70d1897 46 #ifndef __IO
AnnaBridge 125:2e9cc70d1897 47 #define __IO volatile
AnnaBridge 125:2e9cc70d1897 48 #endif
AnnaBridge 125:2e9cc70d1897 49 #ifndef __I
AnnaBridge 125:2e9cc70d1897 50 #define __I volatile const
AnnaBridge 125:2e9cc70d1897 51 #endif
AnnaBridge 125:2e9cc70d1897 52 #ifndef __O
AnnaBridge 125:2e9cc70d1897 53 #define __O volatile
AnnaBridge 125:2e9cc70d1897 54 #endif
AnnaBridge 125:2e9cc70d1897 55
AnnaBridge 125:2e9cc70d1897 56
AnnaBridge 125:2e9cc70d1897 57 /*
AnnaBridge 125:2e9cc70d1897 58 Typedefed structure(s) for module registers (per instance or section) with direct 32-bit
AnnaBridge 125:2e9cc70d1897 59 access to each register in module.
AnnaBridge 125:2e9cc70d1897 60 */
AnnaBridge 125:2e9cc70d1897 61
AnnaBridge 125:2e9cc70d1897 62 /* Offset Register Description
AnnaBridge 125:2e9cc70d1897 63 ============= ============================================================================ */
AnnaBridge 125:2e9cc70d1897 64 typedef struct {
AnnaBridge 125:2e9cc70d1897 65 __IO uint32_t ctrl; /* 0x0000 ADC Control */
AnnaBridge 125:2e9cc70d1897 66 __IO uint32_t status; /* 0x0004 ADC Status */
AnnaBridge 125:2e9cc70d1897 67 __IO uint32_t data; /* 0x0008 ADC Output Data */
AnnaBridge 125:2e9cc70d1897 68 __IO uint32_t intr; /* 0x000C ADC Interrupt Control Register */
AnnaBridge 125:2e9cc70d1897 69 __IO uint32_t limit[4]; /* 0x0010-0x001C ADC Limit 0..3 */
AnnaBridge 125:2e9cc70d1897 70 __IO uint32_t afe_ctrl; /* 0x0020 AFE Control Register */
AnnaBridge 125:2e9cc70d1897 71 __IO uint32_t ro_cal0; /* 0x0024 RO Trim Calibration Register 0 */
AnnaBridge 125:2e9cc70d1897 72 __IO uint32_t ro_cal1; /* 0x0028 RO Trim Calibration Register 1 */
AnnaBridge 125:2e9cc70d1897 73 __IO uint32_t ro_cal2; /* 0x002C RO Trim Calibration Register 2 */
AnnaBridge 125:2e9cc70d1897 74 } mxc_adc_regs_t;
AnnaBridge 125:2e9cc70d1897 75
AnnaBridge 125:2e9cc70d1897 76
AnnaBridge 125:2e9cc70d1897 77 /*
AnnaBridge 125:2e9cc70d1897 78 Register offsets for module ADC.
AnnaBridge 125:2e9cc70d1897 79 */
AnnaBridge 125:2e9cc70d1897 80
AnnaBridge 125:2e9cc70d1897 81 #define MXC_R_ADC_OFFS_CTRL ((uint32_t)0x00000000UL)
AnnaBridge 125:2e9cc70d1897 82 #define MXC_R_ADC_OFFS_STATUS ((uint32_t)0x00000004UL)
AnnaBridge 125:2e9cc70d1897 83 #define MXC_R_ADC_OFFS_DATA ((uint32_t)0x00000008UL)
AnnaBridge 125:2e9cc70d1897 84 #define MXC_R_ADC_OFFS_INTR ((uint32_t)0x0000000CUL)
AnnaBridge 125:2e9cc70d1897 85 #define MXC_R_ADC_OFFS_LIMIT0 ((uint32_t)0x00000010UL)
AnnaBridge 125:2e9cc70d1897 86 #define MXC_R_ADC_OFFS_LIMIT1 ((uint32_t)0x00000014UL)
AnnaBridge 125:2e9cc70d1897 87 #define MXC_R_ADC_OFFS_LIMIT2 ((uint32_t)0x00000018UL)
AnnaBridge 125:2e9cc70d1897 88 #define MXC_R_ADC_OFFS_LIMIT3 ((uint32_t)0x0000001CUL)
AnnaBridge 125:2e9cc70d1897 89 #define MXC_R_ADC_OFFS_AFE_CTRL ((uint32_t)0x00000020UL)
AnnaBridge 125:2e9cc70d1897 90 #define MXC_R_ADC_OFFS_RO_CAL0 ((uint32_t)0x00000024UL)
AnnaBridge 125:2e9cc70d1897 91 #define MXC_R_ADC_OFFS_RO_CAL1 ((uint32_t)0x00000028UL)
AnnaBridge 125:2e9cc70d1897 92 #define MXC_R_ADC_OFFS_RO_CAL2 ((uint32_t)0x0000002CUL)
AnnaBridge 125:2e9cc70d1897 93
AnnaBridge 125:2e9cc70d1897 94
AnnaBridge 125:2e9cc70d1897 95 /*
AnnaBridge 125:2e9cc70d1897 96 Field positions and masks for module ADC.
AnnaBridge 125:2e9cc70d1897 97 */
AnnaBridge 125:2e9cc70d1897 98
AnnaBridge 125:2e9cc70d1897 99 #define MXC_F_ADC_CTRL_CPU_ADC_START_POS 0
AnnaBridge 125:2e9cc70d1897 100 #define MXC_F_ADC_CTRL_CPU_ADC_START ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_CPU_ADC_START_POS))
AnnaBridge 125:2e9cc70d1897 101 #define MXC_F_ADC_CTRL_ADC_PU_POS 1
AnnaBridge 125:2e9cc70d1897 102 #define MXC_F_ADC_CTRL_ADC_PU ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_PU_POS))
AnnaBridge 125:2e9cc70d1897 103 #define MXC_F_ADC_CTRL_BUF_PU_POS 2
AnnaBridge 125:2e9cc70d1897 104 #define MXC_F_ADC_CTRL_BUF_PU ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_BUF_PU_POS))
AnnaBridge 125:2e9cc70d1897 105 #define MXC_F_ADC_CTRL_ADC_REFBUF_PU_POS 3
AnnaBridge 125:2e9cc70d1897 106 #define MXC_F_ADC_CTRL_ADC_REFBUF_PU ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_REFBUF_PU_POS))
AnnaBridge 125:2e9cc70d1897 107 #define MXC_F_ADC_CTRL_ADC_CHGPUMP_PU_POS 4
AnnaBridge 125:2e9cc70d1897 108 #define MXC_F_ADC_CTRL_ADC_CHGPUMP_PU ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_CHGPUMP_PU_POS))
AnnaBridge 125:2e9cc70d1897 109 #define MXC_F_ADC_CTRL_BUF_CHOP_DIS_POS 5
AnnaBridge 125:2e9cc70d1897 110 #define MXC_F_ADC_CTRL_BUF_CHOP_DIS ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_BUF_CHOP_DIS_POS))
AnnaBridge 125:2e9cc70d1897 111 #define MXC_F_ADC_CTRL_BUF_PUMP_DIS_POS 6
AnnaBridge 125:2e9cc70d1897 112 #define MXC_F_ADC_CTRL_BUF_PUMP_DIS ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_BUF_PUMP_DIS_POS))
AnnaBridge 125:2e9cc70d1897 113 #define MXC_F_ADC_CTRL_BUF_BYPASS_POS 7
AnnaBridge 125:2e9cc70d1897 114 #define MXC_F_ADC_CTRL_BUF_BYPASS ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_BUF_BYPASS_POS))
AnnaBridge 125:2e9cc70d1897 115 #define MXC_F_ADC_CTRL_ADC_REFSCL_POS 8
AnnaBridge 125:2e9cc70d1897 116 #define MXC_F_ADC_CTRL_ADC_REFSCL ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_REFSCL_POS))
AnnaBridge 125:2e9cc70d1897 117 #define MXC_F_ADC_CTRL_ADC_SCALE_POS 9
AnnaBridge 125:2e9cc70d1897 118 #define MXC_F_ADC_CTRL_ADC_SCALE ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_SCALE_POS))
AnnaBridge 125:2e9cc70d1897 119 #define MXC_F_ADC_CTRL_ADC_REFSEL_POS 10
AnnaBridge 125:2e9cc70d1897 120 #define MXC_F_ADC_CTRL_ADC_REFSEL ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_REFSEL_POS))
AnnaBridge 125:2e9cc70d1897 121 #define MXC_F_ADC_CTRL_ADC_CLK_EN_POS 11
AnnaBridge 125:2e9cc70d1897 122 #define MXC_F_ADC_CTRL_ADC_CLK_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_CLK_EN_POS))
AnnaBridge 125:2e9cc70d1897 123 #define MXC_F_ADC_CTRL_ADC_CHSEL_POS 12
AnnaBridge 125:2e9cc70d1897 124 #define MXC_F_ADC_CTRL_ADC_CHSEL ((uint32_t)(0x0000000FUL << MXC_F_ADC_CTRL_ADC_CHSEL_POS))
AnnaBridge 125:2e9cc70d1897 125 #define MXC_F_ADC_CTRL_ADC_XREF_POS 16
AnnaBridge 125:2e9cc70d1897 126 #define MXC_F_ADC_CTRL_ADC_XREF ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_XREF_POS))
AnnaBridge 125:2e9cc70d1897 127 #define MXC_F_ADC_CTRL_ADC_DATAALIGN_POS 17
AnnaBridge 125:2e9cc70d1897 128 #define MXC_F_ADC_CTRL_ADC_DATAALIGN ((uint32_t)(0x00000001UL << MXC_F_ADC_CTRL_ADC_DATAALIGN_POS))
AnnaBridge 125:2e9cc70d1897 129 #define MXC_F_ADC_CTRL_AFE_PWR_UP_DLY_POS 24
AnnaBridge 125:2e9cc70d1897 130 #define MXC_F_ADC_CTRL_AFE_PWR_UP_DLY ((uint32_t)(0x000000FFUL << MXC_F_ADC_CTRL_AFE_PWR_UP_DLY_POS))
AnnaBridge 125:2e9cc70d1897 131
AnnaBridge 125:2e9cc70d1897 132 #define MXC_F_ADC_STATUS_ADC_ACTIVE_POS 0
AnnaBridge 125:2e9cc70d1897 133 #define MXC_F_ADC_STATUS_ADC_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_ADC_STATUS_ADC_ACTIVE_POS))
AnnaBridge 125:2e9cc70d1897 134 #define MXC_F_ADC_STATUS_RO_CAL_ATOMIC_ACTIVE_POS 1
AnnaBridge 125:2e9cc70d1897 135 #define MXC_F_ADC_STATUS_RO_CAL_ATOMIC_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_ADC_STATUS_RO_CAL_ATOMIC_ACTIVE_POS))
AnnaBridge 125:2e9cc70d1897 136 #define MXC_F_ADC_STATUS_AFE_PWR_UP_ACTIVE_POS 2
AnnaBridge 125:2e9cc70d1897 137 #define MXC_F_ADC_STATUS_AFE_PWR_UP_ACTIVE ((uint32_t)(0x00000001UL << MXC_F_ADC_STATUS_AFE_PWR_UP_ACTIVE_POS))
AnnaBridge 125:2e9cc70d1897 138 #define MXC_F_ADC_STATUS_ADC_OVERFLOW_POS 3
AnnaBridge 125:2e9cc70d1897 139 #define MXC_F_ADC_STATUS_ADC_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_ADC_STATUS_ADC_OVERFLOW_POS))
AnnaBridge 125:2e9cc70d1897 140
AnnaBridge 125:2e9cc70d1897 141 #define MXC_F_ADC_DATA_ADC_DATA_POS 0
AnnaBridge 125:2e9cc70d1897 142 #define MXC_F_ADC_DATA_ADC_DATA ((uint32_t)(0x0000FFFFUL << MXC_F_ADC_DATA_ADC_DATA_POS))
AnnaBridge 125:2e9cc70d1897 143
AnnaBridge 125:2e9cc70d1897 144 #define MXC_F_ADC_INTR_ADC_DONE_IE_POS 0
AnnaBridge 125:2e9cc70d1897 145 #define MXC_F_ADC_INTR_ADC_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_DONE_IE_POS))
AnnaBridge 125:2e9cc70d1897 146 #define MXC_F_ADC_INTR_ADC_REF_READY_IE_POS 1
AnnaBridge 125:2e9cc70d1897 147 #define MXC_F_ADC_INTR_ADC_REF_READY_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_REF_READY_IE_POS))
AnnaBridge 125:2e9cc70d1897 148 #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IE_POS 2
AnnaBridge 125:2e9cc70d1897 149 #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_HI_LIMIT_IE_POS))
AnnaBridge 125:2e9cc70d1897 150 #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IE_POS 3
AnnaBridge 125:2e9cc70d1897 151 #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_LO_LIMIT_IE_POS))
AnnaBridge 125:2e9cc70d1897 152 #define MXC_F_ADC_INTR_ADC_OVERFLOW_IE_POS 4
AnnaBridge 125:2e9cc70d1897 153 #define MXC_F_ADC_INTR_ADC_OVERFLOW_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_OVERFLOW_IE_POS))
AnnaBridge 125:2e9cc70d1897 154 #define MXC_F_ADC_INTR_RO_CAL_DONE_IE_POS 5
AnnaBridge 125:2e9cc70d1897 155 #define MXC_F_ADC_INTR_RO_CAL_DONE_IE ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_RO_CAL_DONE_IE_POS))
AnnaBridge 125:2e9cc70d1897 156 #define MXC_F_ADC_INTR_ADC_DONE_IF_POS 16
AnnaBridge 125:2e9cc70d1897 157 #define MXC_F_ADC_INTR_ADC_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_DONE_IF_POS))
AnnaBridge 125:2e9cc70d1897 158 #define MXC_F_ADC_INTR_ADC_REF_READY_IF_POS 17
AnnaBridge 125:2e9cc70d1897 159 #define MXC_F_ADC_INTR_ADC_REF_READY_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_REF_READY_IF_POS))
AnnaBridge 125:2e9cc70d1897 160 #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IF_POS 18
AnnaBridge 125:2e9cc70d1897 161 #define MXC_F_ADC_INTR_ADC_HI_LIMIT_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_HI_LIMIT_IF_POS))
AnnaBridge 125:2e9cc70d1897 162 #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IF_POS 19
AnnaBridge 125:2e9cc70d1897 163 #define MXC_F_ADC_INTR_ADC_LO_LIMIT_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_LO_LIMIT_IF_POS))
AnnaBridge 125:2e9cc70d1897 164 #define MXC_F_ADC_INTR_ADC_OVERFLOW_IF_POS 20
AnnaBridge 125:2e9cc70d1897 165 #define MXC_F_ADC_INTR_ADC_OVERFLOW_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_OVERFLOW_IF_POS))
AnnaBridge 125:2e9cc70d1897 166 #define MXC_F_ADC_INTR_RO_CAL_DONE_IF_POS 21
AnnaBridge 125:2e9cc70d1897 167 #define MXC_F_ADC_INTR_RO_CAL_DONE_IF ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_RO_CAL_DONE_IF_POS))
AnnaBridge 125:2e9cc70d1897 168 #define MXC_F_ADC_INTR_ADC_INT_PENDING_POS 22
AnnaBridge 125:2e9cc70d1897 169 #define MXC_F_ADC_INTR_ADC_INT_PENDING ((uint32_t)(0x00000001UL << MXC_F_ADC_INTR_ADC_INT_PENDING_POS))
AnnaBridge 125:2e9cc70d1897 170
AnnaBridge 125:2e9cc70d1897 171 #define MXC_F_ADC_LIMIT0_CH_LO_LIMIT_POS 0
AnnaBridge 125:2e9cc70d1897 172 #define MXC_F_ADC_LIMIT0_CH_LO_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT0_CH_LO_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 173 #define MXC_F_ADC_LIMIT0_CH_HI_LIMIT_POS 12
AnnaBridge 125:2e9cc70d1897 174 #define MXC_F_ADC_LIMIT0_CH_HI_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT0_CH_HI_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 175 #define MXC_F_ADC_LIMIT0_CH_SEL_POS 24
AnnaBridge 125:2e9cc70d1897 176 #define MXC_F_ADC_LIMIT0_CH_SEL ((uint32_t)(0x0000000FUL << MXC_F_ADC_LIMIT0_CH_SEL_POS))
AnnaBridge 125:2e9cc70d1897 177 #define MXC_F_ADC_LIMIT0_CH_LO_LIMIT_EN_POS 28
AnnaBridge 125:2e9cc70d1897 178 #define MXC_F_ADC_LIMIT0_CH_LO_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT0_CH_LO_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 179 #define MXC_F_ADC_LIMIT0_CH_HI_LIMIT_EN_POS 29
AnnaBridge 125:2e9cc70d1897 180 #define MXC_F_ADC_LIMIT0_CH_HI_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT0_CH_HI_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 181
AnnaBridge 125:2e9cc70d1897 182 #define MXC_F_ADC_LIMIT1_CH_LO_LIMIT_POS 0
AnnaBridge 125:2e9cc70d1897 183 #define MXC_F_ADC_LIMIT1_CH_LO_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT1_CH_LO_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 184 #define MXC_F_ADC_LIMIT1_CH_HI_LIMIT_POS 12
AnnaBridge 125:2e9cc70d1897 185 #define MXC_F_ADC_LIMIT1_CH_HI_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT1_CH_HI_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 186 #define MXC_F_ADC_LIMIT1_CH_SEL_POS 24
AnnaBridge 125:2e9cc70d1897 187 #define MXC_F_ADC_LIMIT1_CH_SEL ((uint32_t)(0x0000000FUL << MXC_F_ADC_LIMIT1_CH_SEL_POS))
AnnaBridge 125:2e9cc70d1897 188 #define MXC_F_ADC_LIMIT1_CH_LO_LIMIT_EN_POS 28
AnnaBridge 125:2e9cc70d1897 189 #define MXC_F_ADC_LIMIT1_CH_LO_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT1_CH_LO_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 190 #define MXC_F_ADC_LIMIT1_CH_HI_LIMIT_EN_POS 29
AnnaBridge 125:2e9cc70d1897 191 #define MXC_F_ADC_LIMIT1_CH_HI_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT1_CH_HI_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 192
AnnaBridge 125:2e9cc70d1897 193 #define MXC_F_ADC_LIMIT2_CH_LO_LIMIT_POS 0
AnnaBridge 125:2e9cc70d1897 194 #define MXC_F_ADC_LIMIT2_CH_LO_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT2_CH_LO_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 195 #define MXC_F_ADC_LIMIT2_CH_HI_LIMIT_POS 12
AnnaBridge 125:2e9cc70d1897 196 #define MXC_F_ADC_LIMIT2_CH_HI_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT2_CH_HI_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 197 #define MXC_F_ADC_LIMIT2_CH_SEL_POS 24
AnnaBridge 125:2e9cc70d1897 198 #define MXC_F_ADC_LIMIT2_CH_SEL ((uint32_t)(0x0000000FUL << MXC_F_ADC_LIMIT2_CH_SEL_POS))
AnnaBridge 125:2e9cc70d1897 199 #define MXC_F_ADC_LIMIT2_CH_LO_LIMIT_EN_POS 28
AnnaBridge 125:2e9cc70d1897 200 #define MXC_F_ADC_LIMIT2_CH_LO_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT2_CH_LO_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 201 #define MXC_F_ADC_LIMIT2_CH_HI_LIMIT_EN_POS 29
AnnaBridge 125:2e9cc70d1897 202 #define MXC_F_ADC_LIMIT2_CH_HI_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT2_CH_HI_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 203
AnnaBridge 125:2e9cc70d1897 204 #define MXC_F_ADC_LIMIT3_CH_LO_LIMIT_POS 0
AnnaBridge 125:2e9cc70d1897 205 #define MXC_F_ADC_LIMIT3_CH_LO_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT3_CH_LO_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 206 #define MXC_F_ADC_LIMIT3_CH_HI_LIMIT_POS 12
AnnaBridge 125:2e9cc70d1897 207 #define MXC_F_ADC_LIMIT3_CH_HI_LIMIT ((uint32_t)(0x000003FFUL << MXC_F_ADC_LIMIT3_CH_HI_LIMIT_POS))
AnnaBridge 125:2e9cc70d1897 208 #define MXC_F_ADC_LIMIT3_CH_SEL_POS 24
AnnaBridge 125:2e9cc70d1897 209 #define MXC_F_ADC_LIMIT3_CH_SEL ((uint32_t)(0x0000000FUL << MXC_F_ADC_LIMIT3_CH_SEL_POS))
AnnaBridge 125:2e9cc70d1897 210 #define MXC_F_ADC_LIMIT3_CH_LO_LIMIT_EN_POS 28
AnnaBridge 125:2e9cc70d1897 211 #define MXC_F_ADC_LIMIT3_CH_LO_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT3_CH_LO_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 212 #define MXC_F_ADC_LIMIT3_CH_HI_LIMIT_EN_POS 29
AnnaBridge 125:2e9cc70d1897 213 #define MXC_F_ADC_LIMIT3_CH_HI_LIMIT_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_LIMIT3_CH_HI_LIMIT_EN_POS))
AnnaBridge 125:2e9cc70d1897 214
AnnaBridge 125:2e9cc70d1897 215 #define MXC_F_ADC_AFE_CTRL_TMON_INTBIAS_EN_POS 8
AnnaBridge 125:2e9cc70d1897 216 #define MXC_F_ADC_AFE_CTRL_TMON_INTBIAS_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_AFE_CTRL_TMON_INTBIAS_EN_POS))
AnnaBridge 125:2e9cc70d1897 217 #define MXC_F_ADC_AFE_CTRL_TMON_EXTBIAS_EN_POS 9
AnnaBridge 125:2e9cc70d1897 218 #define MXC_F_ADC_AFE_CTRL_TMON_EXTBIAS_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_AFE_CTRL_TMON_EXTBIAS_EN_POS))
AnnaBridge 125:2e9cc70d1897 219
AnnaBridge 125:2e9cc70d1897 220 #define MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS 0
AnnaBridge 125:2e9cc70d1897 221 #define MXC_F_ADC_RO_CAL0_RO_CAL_EN ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_EN_POS))
AnnaBridge 125:2e9cc70d1897 222 #define MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS 1
AnnaBridge 125:2e9cc70d1897 223 #define MXC_F_ADC_RO_CAL0_RO_CAL_RUN ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_RUN_POS))
AnnaBridge 125:2e9cc70d1897 224 #define MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS 2
AnnaBridge 125:2e9cc70d1897 225 #define MXC_F_ADC_RO_CAL0_RO_CAL_LOAD ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_LOAD_POS))
AnnaBridge 125:2e9cc70d1897 226 #define MXC_F_ADC_RO_CAL0_RO_CAL_ATOMIC_POS 4
AnnaBridge 125:2e9cc70d1897 227 #define MXC_F_ADC_RO_CAL0_RO_CAL_ATOMIC ((uint32_t)(0x00000001UL << MXC_F_ADC_RO_CAL0_RO_CAL_ATOMIC_POS))
AnnaBridge 125:2e9cc70d1897 228 #define MXC_F_ADC_RO_CAL0_DUMMY_POS 5
AnnaBridge 125:2e9cc70d1897 229 #define MXC_F_ADC_RO_CAL0_DUMMY ((uint32_t)(0x00000007UL << MXC_F_ADC_RO_CAL0_DUMMY_POS))
AnnaBridge 125:2e9cc70d1897 230 #define MXC_F_ADC_RO_CAL0_TRM_MU_POS 8
AnnaBridge 125:2e9cc70d1897 231 #define MXC_F_ADC_RO_CAL0_TRM_MU ((uint32_t)(0x00000FFFUL << MXC_F_ADC_RO_CAL0_TRM_MU_POS))
AnnaBridge 125:2e9cc70d1897 232 #define MXC_F_ADC_RO_CAL0_RO_TRM_POS 23
AnnaBridge 125:2e9cc70d1897 233 #define MXC_F_ADC_RO_CAL0_RO_TRM ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL0_RO_TRM_POS))
AnnaBridge 125:2e9cc70d1897 234
AnnaBridge 125:2e9cc70d1897 235 #define MXC_F_ADC_RO_CAL1_TRM_INIT_POS 0
AnnaBridge 125:2e9cc70d1897 236 #define MXC_F_ADC_RO_CAL1_TRM_INIT ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_INIT_POS))
AnnaBridge 125:2e9cc70d1897 237 #define MXC_F_ADC_RO_CAL1_TRM_MIN_POS 10
AnnaBridge 125:2e9cc70d1897 238 #define MXC_F_ADC_RO_CAL1_TRM_MIN ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_MIN_POS))
AnnaBridge 125:2e9cc70d1897 239 #define MXC_F_ADC_RO_CAL1_TRM_MAX_POS 20
AnnaBridge 125:2e9cc70d1897 240 #define MXC_F_ADC_RO_CAL1_TRM_MAX ((uint32_t)(0x000001FFUL << MXC_F_ADC_RO_CAL1_TRM_MAX_POS))
AnnaBridge 125:2e9cc70d1897 241
AnnaBridge 125:2e9cc70d1897 242 #define MXC_F_ADC_RO_CAL2_AUTO_CAL_DONE_CNT_POS 0
AnnaBridge 125:2e9cc70d1897 243 #define MXC_F_ADC_RO_CAL2_AUTO_CAL_DONE_CNT ((uint32_t)(0x000000FFUL << MXC_F_ADC_RO_CAL2_AUTO_CAL_DONE_CNT_POS))
AnnaBridge 125:2e9cc70d1897 244
AnnaBridge 125:2e9cc70d1897 245
AnnaBridge 125:2e9cc70d1897 246
AnnaBridge 125:2e9cc70d1897 247 #ifdef __cplusplus
AnnaBridge 125:2e9cc70d1897 248 }
AnnaBridge 125:2e9cc70d1897 249 #endif
AnnaBridge 125:2e9cc70d1897 250
AnnaBridge 125:2e9cc70d1897 251 #endif /* _MXC_ADC_REGS_H_ */
AnnaBridge 125:2e9cc70d1897 252