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TARGET_VBLUNO51/cmsis_gcc.h@146:22da6e220af6, 2017-07-06 (annotated)

Committer:: AnnaBridge
Date:: Thu Jul 06 15:30:22 2017 +0100
Revision:: 146:22da6e220af6
Child:: 160:5571c4ff569f

Release 146 of the mbed library.

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	146:22da6e220af6	1	/************************************************************************//
AnnaBridge	146:22da6e220af6	2	* @file cmsis_gcc.h
AnnaBridge	146:22da6e220af6	3	* @brief CMSIS compiler GCC header file
AnnaBridge	146:22da6e220af6	4	* @version V5.0.2
AnnaBridge	146:22da6e220af6	5	* @date 13. February 2017
AnnaBridge	146:22da6e220af6	6	******************************************************************************/
AnnaBridge	146:22da6e220af6	7	/*
AnnaBridge	146:22da6e220af6	8	* Copyright (c) 2009-2017 ARM Limited. All rights reserved.
AnnaBridge	146:22da6e220af6	9	*
AnnaBridge	146:22da6e220af6	10	* SPDX-License-Identifier: Apache-2.0
AnnaBridge	146:22da6e220af6	11	*
AnnaBridge	146:22da6e220af6	12	* Licensed under the Apache License, Version 2.0 (the License); you may
AnnaBridge	146:22da6e220af6	13	* not use this file except in compliance with the License.
AnnaBridge	146:22da6e220af6	14	* You may obtain a copy of the License at
AnnaBridge	146:22da6e220af6	15	*
AnnaBridge	146:22da6e220af6	16	* www.apache.org/licenses/LICENSE-2.0
AnnaBridge	146:22da6e220af6	17	*
AnnaBridge	146:22da6e220af6	18	* Unless required by applicable law or agreed to in writing, software
AnnaBridge	146:22da6e220af6	19	* distributed under the License is distributed on an AS IS BASIS, WITHOUT
AnnaBridge	146:22da6e220af6	20	* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge	146:22da6e220af6	21	* See the License for the specific language governing permissions and
AnnaBridge	146:22da6e220af6	22	* limitations under the License.
AnnaBridge	146:22da6e220af6	23	*/
AnnaBridge	146:22da6e220af6	24
AnnaBridge	146:22da6e220af6	25	#ifndef __CMSIS_GCC_H
AnnaBridge	146:22da6e220af6	26	#define __CMSIS_GCC_H
AnnaBridge	146:22da6e220af6	27
AnnaBridge	146:22da6e220af6	28	/* ignore some GCC warnings */
AnnaBridge	146:22da6e220af6	29	#pragma GCC diagnostic push
AnnaBridge	146:22da6e220af6	30	#pragma GCC diagnostic ignored "-Wsign-conversion"
AnnaBridge	146:22da6e220af6	31	#pragma GCC diagnostic ignored "-Wconversion"
AnnaBridge	146:22da6e220af6	32	#pragma GCC diagnostic ignored "-Wunused-parameter"
AnnaBridge	146:22da6e220af6	33
AnnaBridge	146:22da6e220af6	34	/* CMSIS compiler specific defines */
AnnaBridge	146:22da6e220af6	35	#ifndef __ASM
AnnaBridge	146:22da6e220af6	36	#define __ASM __asm
AnnaBridge	146:22da6e220af6	37	#endif
AnnaBridge	146:22da6e220af6	38	#ifndef __INLINE
AnnaBridge	146:22da6e220af6	39	#define __INLINE inline
AnnaBridge	146:22da6e220af6	40	#endif
AnnaBridge	146:22da6e220af6	41	#ifndef __STATIC_INLINE
AnnaBridge	146:22da6e220af6	42	#define __STATIC_INLINE static inline
AnnaBridge	146:22da6e220af6	43	#endif
AnnaBridge	146:22da6e220af6	44	#ifndef __NO_RETURN
AnnaBridge	146:22da6e220af6	45	#define __NO_RETURN __attribute__((noreturn))
AnnaBridge	146:22da6e220af6	46	#endif
AnnaBridge	146:22da6e220af6	47	#ifndef __USED
AnnaBridge	146:22da6e220af6	48	#define __USED __attribute__((used))
AnnaBridge	146:22da6e220af6	49	#endif
AnnaBridge	146:22da6e220af6	50	#ifndef __WEAK
AnnaBridge	146:22da6e220af6	51	#define __WEAK __attribute__((weak))
AnnaBridge	146:22da6e220af6	52	#endif
AnnaBridge	146:22da6e220af6	53	#ifndef __PACKED
AnnaBridge	146:22da6e220af6	54	#define __PACKED __attribute__((packed, aligned(1)))
AnnaBridge	146:22da6e220af6	55	#endif
AnnaBridge	146:22da6e220af6	56	#ifndef __PACKED_STRUCT
AnnaBridge	146:22da6e220af6	57	#define __PACKED_STRUCT struct __attribute__((packed, aligned(1)))
AnnaBridge	146:22da6e220af6	58	#endif
AnnaBridge	146:22da6e220af6	59	#ifndef __UNALIGNED_UINT32 /* deprecated */
AnnaBridge	146:22da6e220af6	60	#pragma GCC diagnostic push
AnnaBridge	146:22da6e220af6	61	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	146:22da6e220af6	62	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	146:22da6e220af6	63	struct __attribute__((packed)) T_UINT32 { uint32_t v; };
AnnaBridge	146:22da6e220af6	64	#pragma GCC diagnostic pop
AnnaBridge	146:22da6e220af6	65	#define __UNALIGNED_UINT32(x) (((struct T_UINT32 *)(x))->v)
AnnaBridge	146:22da6e220af6	66	#endif
AnnaBridge	146:22da6e220af6	67	#ifndef __UNALIGNED_UINT16_WRITE
AnnaBridge	146:22da6e220af6	68	#pragma GCC diagnostic push
AnnaBridge	146:22da6e220af6	69	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	146:22da6e220af6	70	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	146:22da6e220af6	71	__PACKED_STRUCT T_UINT16_WRITE { uint16_t v; };
AnnaBridge	146:22da6e220af6	72	#pragma GCC diagnostic pop
AnnaBridge	146:22da6e220af6	73	#define __UNALIGNED_UINT16_WRITE(addr, val) (void)((((struct T_UINT16_WRITE )(void )(addr))->v) = (val))
AnnaBridge	146:22da6e220af6	74	#endif
AnnaBridge	146:22da6e220af6	75	#ifndef __UNALIGNED_UINT16_READ
AnnaBridge	146:22da6e220af6	76	#pragma GCC diagnostic push
AnnaBridge	146:22da6e220af6	77	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	146:22da6e220af6	78	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	146:22da6e220af6	79	__PACKED_STRUCT T_UINT16_READ { uint16_t v; };
AnnaBridge	146:22da6e220af6	80	#pragma GCC diagnostic pop
AnnaBridge	146:22da6e220af6	81	#define __UNALIGNED_UINT16_READ(addr) (((const struct T_UINT16_READ )(const void )(addr))->v)
AnnaBridge	146:22da6e220af6	82	#endif
AnnaBridge	146:22da6e220af6	83	#ifndef __UNALIGNED_UINT32_WRITE
AnnaBridge	146:22da6e220af6	84	#pragma GCC diagnostic push
AnnaBridge	146:22da6e220af6	85	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	146:22da6e220af6	86	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	146:22da6e220af6	87	__PACKED_STRUCT T_UINT32_WRITE { uint32_t v; };
AnnaBridge	146:22da6e220af6	88	#pragma GCC diagnostic pop
AnnaBridge	146:22da6e220af6	89	#define __UNALIGNED_UINT32_WRITE(addr, val) (void)((((struct T_UINT32_WRITE )(void )(addr))->v) = (val))
AnnaBridge	146:22da6e220af6	90	#endif
AnnaBridge	146:22da6e220af6	91	#ifndef __UNALIGNED_UINT32_READ
AnnaBridge	146:22da6e220af6	92	#pragma GCC diagnostic push
AnnaBridge	146:22da6e220af6	93	#pragma GCC diagnostic ignored "-Wpacked"
AnnaBridge	146:22da6e220af6	94	#pragma GCC diagnostic ignored "-Wattributes"
AnnaBridge	146:22da6e220af6	95	__PACKED_STRUCT T_UINT32_READ { uint32_t v; };
AnnaBridge	146:22da6e220af6	96	#pragma GCC diagnostic pop
AnnaBridge	146:22da6e220af6	97	#define __UNALIGNED_UINT32_READ(addr) (((const struct T_UINT32_READ )(const void )(addr))->v)
AnnaBridge	146:22da6e220af6	98	#endif
AnnaBridge	146:22da6e220af6	99	#ifndef __ALIGNED
AnnaBridge	146:22da6e220af6	100	#define __ALIGNED(x) __attribute__((aligned(x)))
AnnaBridge	146:22da6e220af6	101	#endif
AnnaBridge	146:22da6e220af6	102
AnnaBridge	146:22da6e220af6	103
AnnaBridge	146:22da6e220af6	104	/* ########################### Core Function Access ########################### */
AnnaBridge	146:22da6e220af6	105	/** \ingroup CMSIS_Core_FunctionInterface
AnnaBridge	146:22da6e220af6	106	\defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
AnnaBridge	146:22da6e220af6	107	@{
AnnaBridge	146:22da6e220af6	108	*/
AnnaBridge	146:22da6e220af6	109
AnnaBridge	146:22da6e220af6	110	/**
AnnaBridge	146:22da6e220af6	111	\brief Enable IRQ Interrupts
AnnaBridge	146:22da6e220af6	112	\details Enables IRQ interrupts by clearing the I-bit in the CPSR.
AnnaBridge	146:22da6e220af6	113	Can only be executed in Privileged modes.
AnnaBridge	146:22da6e220af6	114	*/
AnnaBridge	146:22da6e220af6	115	__attribute__((always_inline)) __STATIC_INLINE void __enable_irq(void)
AnnaBridge	146:22da6e220af6	116	{
AnnaBridge	146:22da6e220af6	117	__ASM volatile ("cpsie i" : : : "memory");
AnnaBridge	146:22da6e220af6	118	}
AnnaBridge	146:22da6e220af6	119
AnnaBridge	146:22da6e220af6	120
AnnaBridge	146:22da6e220af6	121	/**
AnnaBridge	146:22da6e220af6	122	\brief Disable IRQ Interrupts
AnnaBridge	146:22da6e220af6	123	\details Disables IRQ interrupts by setting the I-bit in the CPSR.
AnnaBridge	146:22da6e220af6	124	Can only be executed in Privileged modes.
AnnaBridge	146:22da6e220af6	125	*/
AnnaBridge	146:22da6e220af6	126	__attribute__((always_inline)) __STATIC_INLINE void __disable_irq(void)
AnnaBridge	146:22da6e220af6	127	{
AnnaBridge	146:22da6e220af6	128	__ASM volatile ("cpsid i" : : : "memory");
AnnaBridge	146:22da6e220af6	129	}
AnnaBridge	146:22da6e220af6	130
AnnaBridge	146:22da6e220af6	131
AnnaBridge	146:22da6e220af6	132	/**
AnnaBridge	146:22da6e220af6	133	\brief Get Control Register
AnnaBridge	146:22da6e220af6	134	\details Returns the content of the Control Register.
AnnaBridge	146:22da6e220af6	135	\return Control Register value
AnnaBridge	146:22da6e220af6	136	*/
AnnaBridge	146:22da6e220af6	137	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_CONTROL(void)
AnnaBridge	146:22da6e220af6	138	{
AnnaBridge	146:22da6e220af6	139	uint32_t result;
AnnaBridge	146:22da6e220af6	140
AnnaBridge	146:22da6e220af6	141	__ASM volatile ("MRS %0, control" : "=r" (result) );
AnnaBridge	146:22da6e220af6	142	return(result);
AnnaBridge	146:22da6e220af6	143	}
AnnaBridge	146:22da6e220af6	144
AnnaBridge	146:22da6e220af6	145
AnnaBridge	146:22da6e220af6	146	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	147	/**
AnnaBridge	146:22da6e220af6	148	\brief Get Control Register (non-secure)
AnnaBridge	146:22da6e220af6	149	\details Returns the content of the non-secure Control Register when in secure mode.
AnnaBridge	146:22da6e220af6	150	\return non-secure Control Register value
AnnaBridge	146:22da6e220af6	151	*/
AnnaBridge	146:22da6e220af6	152	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_CONTROL_NS(void)
AnnaBridge	146:22da6e220af6	153	{
AnnaBridge	146:22da6e220af6	154	uint32_t result;
AnnaBridge	146:22da6e220af6	155
AnnaBridge	146:22da6e220af6	156	__ASM volatile ("MRS %0, control_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	157	return(result);
AnnaBridge	146:22da6e220af6	158	}
AnnaBridge	146:22da6e220af6	159	#endif
AnnaBridge	146:22da6e220af6	160
AnnaBridge	146:22da6e220af6	161
AnnaBridge	146:22da6e220af6	162	/**
AnnaBridge	146:22da6e220af6	163	\brief Set Control Register
AnnaBridge	146:22da6e220af6	164	\details Writes the given value to the Control Register.
AnnaBridge	146:22da6e220af6	165	\param [in] control Control Register value to set
AnnaBridge	146:22da6e220af6	166	*/
AnnaBridge	146:22da6e220af6	167	__attribute__((always_inline)) __STATIC_INLINE void __set_CONTROL(uint32_t control)
AnnaBridge	146:22da6e220af6	168	{
AnnaBridge	146:22da6e220af6	169	__ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
AnnaBridge	146:22da6e220af6	170	}
AnnaBridge	146:22da6e220af6	171
AnnaBridge	146:22da6e220af6	172
AnnaBridge	146:22da6e220af6	173	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	174	/**
AnnaBridge	146:22da6e220af6	175	\brief Set Control Register (non-secure)
AnnaBridge	146:22da6e220af6	176	\details Writes the given value to the non-secure Control Register when in secure state.
AnnaBridge	146:22da6e220af6	177	\param [in] control Control Register value to set
AnnaBridge	146:22da6e220af6	178	*/
AnnaBridge	146:22da6e220af6	179	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_CONTROL_NS(uint32_t control)
AnnaBridge	146:22da6e220af6	180	{
AnnaBridge	146:22da6e220af6	181	__ASM volatile ("MSR control_ns, %0" : : "r" (control) : "memory");
AnnaBridge	146:22da6e220af6	182	}
AnnaBridge	146:22da6e220af6	183	#endif
AnnaBridge	146:22da6e220af6	184
AnnaBridge	146:22da6e220af6	185
AnnaBridge	146:22da6e220af6	186	/**
AnnaBridge	146:22da6e220af6	187	\brief Get IPSR Register
AnnaBridge	146:22da6e220af6	188	\details Returns the content of the IPSR Register.
AnnaBridge	146:22da6e220af6	189	\return IPSR Register value
AnnaBridge	146:22da6e220af6	190	*/
AnnaBridge	146:22da6e220af6	191	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_IPSR(void)
AnnaBridge	146:22da6e220af6	192	{
AnnaBridge	146:22da6e220af6	193	uint32_t result;
AnnaBridge	146:22da6e220af6	194
AnnaBridge	146:22da6e220af6	195	__ASM volatile ("MRS %0, ipsr" : "=r" (result) );
AnnaBridge	146:22da6e220af6	196	return(result);
AnnaBridge	146:22da6e220af6	197	}
AnnaBridge	146:22da6e220af6	198
AnnaBridge	146:22da6e220af6	199
AnnaBridge	146:22da6e220af6	200	/**
AnnaBridge	146:22da6e220af6	201	\brief Get APSR Register
AnnaBridge	146:22da6e220af6	202	\details Returns the content of the APSR Register.
AnnaBridge	146:22da6e220af6	203	\return APSR Register value
AnnaBridge	146:22da6e220af6	204	*/
AnnaBridge	146:22da6e220af6	205	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_APSR(void)
AnnaBridge	146:22da6e220af6	206	{
AnnaBridge	146:22da6e220af6	207	uint32_t result;
AnnaBridge	146:22da6e220af6	208
AnnaBridge	146:22da6e220af6	209	__ASM volatile ("MRS %0, apsr" : "=r" (result) );
AnnaBridge	146:22da6e220af6	210	return(result);
AnnaBridge	146:22da6e220af6	211	}
AnnaBridge	146:22da6e220af6	212
AnnaBridge	146:22da6e220af6	213
AnnaBridge	146:22da6e220af6	214	/**
AnnaBridge	146:22da6e220af6	215	\brief Get xPSR Register
AnnaBridge	146:22da6e220af6	216	\details Returns the content of the xPSR Register.
AnnaBridge	146:22da6e220af6	217	\return xPSR Register value
AnnaBridge	146:22da6e220af6	218	*/
AnnaBridge	146:22da6e220af6	219	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_xPSR(void)
AnnaBridge	146:22da6e220af6	220	{
AnnaBridge	146:22da6e220af6	221	uint32_t result;
AnnaBridge	146:22da6e220af6	222
AnnaBridge	146:22da6e220af6	223	__ASM volatile ("MRS %0, xpsr" : "=r" (result) );
AnnaBridge	146:22da6e220af6	224	return(result);
AnnaBridge	146:22da6e220af6	225	}
AnnaBridge	146:22da6e220af6	226
AnnaBridge	146:22da6e220af6	227
AnnaBridge	146:22da6e220af6	228	/**
AnnaBridge	146:22da6e220af6	229	\brief Get Process Stack Pointer
AnnaBridge	146:22da6e220af6	230	\details Returns the current value of the Process Stack Pointer (PSP).
AnnaBridge	146:22da6e220af6	231	\return PSP Register value
AnnaBridge	146:22da6e220af6	232	*/
AnnaBridge	146:22da6e220af6	233	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSP(void)
AnnaBridge	146:22da6e220af6	234	{
AnnaBridge	146:22da6e220af6	235	register uint32_t result;
AnnaBridge	146:22da6e220af6	236
AnnaBridge	146:22da6e220af6	237	__ASM volatile ("MRS %0, psp" : "=r" (result) );
AnnaBridge	146:22da6e220af6	238	return(result);
AnnaBridge	146:22da6e220af6	239	}
AnnaBridge	146:22da6e220af6	240
AnnaBridge	146:22da6e220af6	241
AnnaBridge	146:22da6e220af6	242	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	243	/**
AnnaBridge	146:22da6e220af6	244	\brief Get Process Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	245	\details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	146:22da6e220af6	246	\return PSP Register value
AnnaBridge	146:22da6e220af6	247	*/
AnnaBridge	146:22da6e220af6	248	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSP_NS(void)
AnnaBridge	146:22da6e220af6	249	{
AnnaBridge	146:22da6e220af6	250	register uint32_t result;
AnnaBridge	146:22da6e220af6	251
AnnaBridge	146:22da6e220af6	252	__ASM volatile ("MRS %0, psp_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	253	return(result);
AnnaBridge	146:22da6e220af6	254	}
AnnaBridge	146:22da6e220af6	255	#endif
AnnaBridge	146:22da6e220af6	256
AnnaBridge	146:22da6e220af6	257
AnnaBridge	146:22da6e220af6	258	/**
AnnaBridge	146:22da6e220af6	259	\brief Set Process Stack Pointer
AnnaBridge	146:22da6e220af6	260	\details Assigns the given value to the Process Stack Pointer (PSP).
AnnaBridge	146:22da6e220af6	261	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	146:22da6e220af6	262	*/
AnnaBridge	146:22da6e220af6	263	__attribute__((always_inline)) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
AnnaBridge	146:22da6e220af6	264	{
AnnaBridge	146:22da6e220af6	265	__ASM volatile ("MSR psp, %0" : : "r" (topOfProcStack) : );
AnnaBridge	146:22da6e220af6	266	}
AnnaBridge	146:22da6e220af6	267
AnnaBridge	146:22da6e220af6	268
AnnaBridge	146:22da6e220af6	269	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	270	/**
AnnaBridge	146:22da6e220af6	271	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	272	\details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
AnnaBridge	146:22da6e220af6	273	\param [in] topOfProcStack Process Stack Pointer value to set
AnnaBridge	146:22da6e220af6	274	*/
AnnaBridge	146:22da6e220af6	275	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSP_NS(uint32_t topOfProcStack)
AnnaBridge	146:22da6e220af6	276	{
AnnaBridge	146:22da6e220af6	277	__ASM volatile ("MSR psp_ns, %0" : : "r" (topOfProcStack) : );
AnnaBridge	146:22da6e220af6	278	}
AnnaBridge	146:22da6e220af6	279	#endif
AnnaBridge	146:22da6e220af6	280
AnnaBridge	146:22da6e220af6	281
AnnaBridge	146:22da6e220af6	282	/**
AnnaBridge	146:22da6e220af6	283	\brief Get Main Stack Pointer
AnnaBridge	146:22da6e220af6	284	\details Returns the current value of the Main Stack Pointer (MSP).
AnnaBridge	146:22da6e220af6	285	\return MSP Register value
AnnaBridge	146:22da6e220af6	286	*/
AnnaBridge	146:22da6e220af6	287	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSP(void)
AnnaBridge	146:22da6e220af6	288	{
AnnaBridge	146:22da6e220af6	289	register uint32_t result;
AnnaBridge	146:22da6e220af6	290
AnnaBridge	146:22da6e220af6	291	__ASM volatile ("MRS %0, msp" : "=r" (result) );
AnnaBridge	146:22da6e220af6	292	return(result);
AnnaBridge	146:22da6e220af6	293	}
AnnaBridge	146:22da6e220af6	294
AnnaBridge	146:22da6e220af6	295
AnnaBridge	146:22da6e220af6	296	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	297	/**
AnnaBridge	146:22da6e220af6	298	\brief Get Main Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	299	\details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	146:22da6e220af6	300	\return MSP Register value
AnnaBridge	146:22da6e220af6	301	*/
AnnaBridge	146:22da6e220af6	302	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSP_NS(void)
AnnaBridge	146:22da6e220af6	303	{
AnnaBridge	146:22da6e220af6	304	register uint32_t result;
AnnaBridge	146:22da6e220af6	305
AnnaBridge	146:22da6e220af6	306	__ASM volatile ("MRS %0, msp_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	307	return(result);
AnnaBridge	146:22da6e220af6	308	}
AnnaBridge	146:22da6e220af6	309	#endif
AnnaBridge	146:22da6e220af6	310
AnnaBridge	146:22da6e220af6	311
AnnaBridge	146:22da6e220af6	312	/**
AnnaBridge	146:22da6e220af6	313	\brief Set Main Stack Pointer
AnnaBridge	146:22da6e220af6	314	\details Assigns the given value to the Main Stack Pointer (MSP).
AnnaBridge	146:22da6e220af6	315	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	146:22da6e220af6	316	*/
AnnaBridge	146:22da6e220af6	317	__attribute__((always_inline)) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
AnnaBridge	146:22da6e220af6	318	{
AnnaBridge	146:22da6e220af6	319	__ASM volatile ("MSR msp, %0" : : "r" (topOfMainStack) : );
AnnaBridge	146:22da6e220af6	320	}
AnnaBridge	146:22da6e220af6	321
AnnaBridge	146:22da6e220af6	322
AnnaBridge	146:22da6e220af6	323	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	324	/**
AnnaBridge	146:22da6e220af6	325	\brief Set Main Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	326	\details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
AnnaBridge	146:22da6e220af6	327	\param [in] topOfMainStack Main Stack Pointer value to set
AnnaBridge	146:22da6e220af6	328	*/
AnnaBridge	146:22da6e220af6	329	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
AnnaBridge	146:22da6e220af6	330	{
AnnaBridge	146:22da6e220af6	331	__ASM volatile ("MSR msp_ns, %0" : : "r" (topOfMainStack) : );
AnnaBridge	146:22da6e220af6	332	}
AnnaBridge	146:22da6e220af6	333	#endif
AnnaBridge	146:22da6e220af6	334
AnnaBridge	146:22da6e220af6	335
AnnaBridge	146:22da6e220af6	336	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	337	/**
AnnaBridge	146:22da6e220af6	338	\brief Get Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	339	\details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	146:22da6e220af6	340	\return SP Register value
AnnaBridge	146:22da6e220af6	341	*/
AnnaBridge	146:22da6e220af6	342	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_SP_NS(void)
AnnaBridge	146:22da6e220af6	343	{
AnnaBridge	146:22da6e220af6	344	register uint32_t result;
AnnaBridge	146:22da6e220af6	345
AnnaBridge	146:22da6e220af6	346	__ASM volatile ("MRS %0, sp_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	347	return(result);
AnnaBridge	146:22da6e220af6	348	}
AnnaBridge	146:22da6e220af6	349
AnnaBridge	146:22da6e220af6	350
AnnaBridge	146:22da6e220af6	351	/**
AnnaBridge	146:22da6e220af6	352	\brief Set Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	353	\details Assigns the given value to the non-secure Stack Pointer (SP) when in secure state.
AnnaBridge	146:22da6e220af6	354	\param [in] topOfStack Stack Pointer value to set
AnnaBridge	146:22da6e220af6	355	*/
AnnaBridge	146:22da6e220af6	356	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_SP_NS(uint32_t topOfStack)
AnnaBridge	146:22da6e220af6	357	{
AnnaBridge	146:22da6e220af6	358	__ASM volatile ("MSR sp_ns, %0" : : "r" (topOfStack) : );
AnnaBridge	146:22da6e220af6	359	}
AnnaBridge	146:22da6e220af6	360	#endif
AnnaBridge	146:22da6e220af6	361
AnnaBridge	146:22da6e220af6	362
AnnaBridge	146:22da6e220af6	363	/**
AnnaBridge	146:22da6e220af6	364	\brief Get Priority Mask
AnnaBridge	146:22da6e220af6	365	\details Returns the current state of the priority mask bit from the Priority Mask Register.
AnnaBridge	146:22da6e220af6	366	\return Priority Mask value
AnnaBridge	146:22da6e220af6	367	*/
AnnaBridge	146:22da6e220af6	368	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PRIMASK(void)
AnnaBridge	146:22da6e220af6	369	{
AnnaBridge	146:22da6e220af6	370	uint32_t result;
AnnaBridge	146:22da6e220af6	371
AnnaBridge	146:22da6e220af6	372	__ASM volatile ("MRS %0, primask" : "=r" (result) );
AnnaBridge	146:22da6e220af6	373	return(result);
AnnaBridge	146:22da6e220af6	374	}
AnnaBridge	146:22da6e220af6	375
AnnaBridge	146:22da6e220af6	376
AnnaBridge	146:22da6e220af6	377	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	378	/**
AnnaBridge	146:22da6e220af6	379	\brief Get Priority Mask (non-secure)
AnnaBridge	146:22da6e220af6	380	\details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
AnnaBridge	146:22da6e220af6	381	\return Priority Mask value
AnnaBridge	146:22da6e220af6	382	*/
AnnaBridge	146:22da6e220af6	383	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PRIMASK_NS(void)
AnnaBridge	146:22da6e220af6	384	{
AnnaBridge	146:22da6e220af6	385	uint32_t result;
AnnaBridge	146:22da6e220af6	386
AnnaBridge	146:22da6e220af6	387	__ASM volatile ("MRS %0, primask_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	388	return(result);
AnnaBridge	146:22da6e220af6	389	}
AnnaBridge	146:22da6e220af6	390	#endif
AnnaBridge	146:22da6e220af6	391
AnnaBridge	146:22da6e220af6	392
AnnaBridge	146:22da6e220af6	393	/**
AnnaBridge	146:22da6e220af6	394	\brief Set Priority Mask
AnnaBridge	146:22da6e220af6	395	\details Assigns the given value to the Priority Mask Register.
AnnaBridge	146:22da6e220af6	396	\param [in] priMask Priority Mask
AnnaBridge	146:22da6e220af6	397	*/
AnnaBridge	146:22da6e220af6	398	__attribute__((always_inline)) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
AnnaBridge	146:22da6e220af6	399	{
AnnaBridge	146:22da6e220af6	400	__ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
AnnaBridge	146:22da6e220af6	401	}
AnnaBridge	146:22da6e220af6	402
AnnaBridge	146:22da6e220af6	403
AnnaBridge	146:22da6e220af6	404	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	405	/**
AnnaBridge	146:22da6e220af6	406	\brief Set Priority Mask (non-secure)
AnnaBridge	146:22da6e220af6	407	\details Assigns the given value to the non-secure Priority Mask Register when in secure state.
AnnaBridge	146:22da6e220af6	408	\param [in] priMask Priority Mask
AnnaBridge	146:22da6e220af6	409	*/
AnnaBridge	146:22da6e220af6	410	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PRIMASK_NS(uint32_t priMask)
AnnaBridge	146:22da6e220af6	411	{
AnnaBridge	146:22da6e220af6	412	__ASM volatile ("MSR primask_ns, %0" : : "r" (priMask) : "memory");
AnnaBridge	146:22da6e220af6	413	}
AnnaBridge	146:22da6e220af6	414	#endif
AnnaBridge	146:22da6e220af6	415
AnnaBridge	146:22da6e220af6	416
AnnaBridge	146:22da6e220af6	417	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	418	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	419	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	420	/**
AnnaBridge	146:22da6e220af6	421	\brief Enable FIQ
AnnaBridge	146:22da6e220af6	422	\details Enables FIQ interrupts by clearing the F-bit in the CPSR.
AnnaBridge	146:22da6e220af6	423	Can only be executed in Privileged modes.
AnnaBridge	146:22da6e220af6	424	*/
AnnaBridge	146:22da6e220af6	425	__attribute__((always_inline)) __STATIC_INLINE void __enable_fault_irq(void)
AnnaBridge	146:22da6e220af6	426	{
AnnaBridge	146:22da6e220af6	427	__ASM volatile ("cpsie f" : : : "memory");
AnnaBridge	146:22da6e220af6	428	}
AnnaBridge	146:22da6e220af6	429
AnnaBridge	146:22da6e220af6	430
AnnaBridge	146:22da6e220af6	431	/**
AnnaBridge	146:22da6e220af6	432	\brief Disable FIQ
AnnaBridge	146:22da6e220af6	433	\details Disables FIQ interrupts by setting the F-bit in the CPSR.
AnnaBridge	146:22da6e220af6	434	Can only be executed in Privileged modes.
AnnaBridge	146:22da6e220af6	435	*/
AnnaBridge	146:22da6e220af6	436	__attribute__((always_inline)) __STATIC_INLINE void __disable_fault_irq(void)
AnnaBridge	146:22da6e220af6	437	{
AnnaBridge	146:22da6e220af6	438	__ASM volatile ("cpsid f" : : : "memory");
AnnaBridge	146:22da6e220af6	439	}
AnnaBridge	146:22da6e220af6	440
AnnaBridge	146:22da6e220af6	441
AnnaBridge	146:22da6e220af6	442	/**
AnnaBridge	146:22da6e220af6	443	\brief Get Base Priority
AnnaBridge	146:22da6e220af6	444	\details Returns the current value of the Base Priority register.
AnnaBridge	146:22da6e220af6	445	\return Base Priority register value
AnnaBridge	146:22da6e220af6	446	*/
AnnaBridge	146:22da6e220af6	447	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_BASEPRI(void)
AnnaBridge	146:22da6e220af6	448	{
AnnaBridge	146:22da6e220af6	449	uint32_t result;
AnnaBridge	146:22da6e220af6	450
AnnaBridge	146:22da6e220af6	451	__ASM volatile ("MRS %0, basepri" : "=r" (result) );
AnnaBridge	146:22da6e220af6	452	return(result);
AnnaBridge	146:22da6e220af6	453	}
AnnaBridge	146:22da6e220af6	454
AnnaBridge	146:22da6e220af6	455
AnnaBridge	146:22da6e220af6	456	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	457	/**
AnnaBridge	146:22da6e220af6	458	\brief Get Base Priority (non-secure)
AnnaBridge	146:22da6e220af6	459	\details Returns the current value of the non-secure Base Priority register when in secure state.
AnnaBridge	146:22da6e220af6	460	\return Base Priority register value
AnnaBridge	146:22da6e220af6	461	*/
AnnaBridge	146:22da6e220af6	462	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_BASEPRI_NS(void)
AnnaBridge	146:22da6e220af6	463	{
AnnaBridge	146:22da6e220af6	464	uint32_t result;
AnnaBridge	146:22da6e220af6	465
AnnaBridge	146:22da6e220af6	466	__ASM volatile ("MRS %0, basepri_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	467	return(result);
AnnaBridge	146:22da6e220af6	468	}
AnnaBridge	146:22da6e220af6	469	#endif
AnnaBridge	146:22da6e220af6	470
AnnaBridge	146:22da6e220af6	471
AnnaBridge	146:22da6e220af6	472	/**
AnnaBridge	146:22da6e220af6	473	\brief Set Base Priority
AnnaBridge	146:22da6e220af6	474	\details Assigns the given value to the Base Priority register.
AnnaBridge	146:22da6e220af6	475	\param [in] basePri Base Priority value to set
AnnaBridge	146:22da6e220af6	476	*/
AnnaBridge	146:22da6e220af6	477	__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
AnnaBridge	146:22da6e220af6	478	{
AnnaBridge	146:22da6e220af6	479	__ASM volatile ("MSR basepri, %0" : : "r" (basePri) : "memory");
AnnaBridge	146:22da6e220af6	480	}
AnnaBridge	146:22da6e220af6	481
AnnaBridge	146:22da6e220af6	482
AnnaBridge	146:22da6e220af6	483	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	484	/**
AnnaBridge	146:22da6e220af6	485	\brief Set Base Priority (non-secure)
AnnaBridge	146:22da6e220af6	486	\details Assigns the given value to the non-secure Base Priority register when in secure state.
AnnaBridge	146:22da6e220af6	487	\param [in] basePri Base Priority value to set
AnnaBridge	146:22da6e220af6	488	*/
AnnaBridge	146:22da6e220af6	489	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_BASEPRI_NS(uint32_t basePri)
AnnaBridge	146:22da6e220af6	490	{
AnnaBridge	146:22da6e220af6	491	__ASM volatile ("MSR basepri_ns, %0" : : "r" (basePri) : "memory");
AnnaBridge	146:22da6e220af6	492	}
AnnaBridge	146:22da6e220af6	493	#endif
AnnaBridge	146:22da6e220af6	494
AnnaBridge	146:22da6e220af6	495
AnnaBridge	146:22da6e220af6	496	/**
AnnaBridge	146:22da6e220af6	497	\brief Set Base Priority with condition
AnnaBridge	146:22da6e220af6	498	\details Assigns the given value to the Base Priority register only if BASEPRI masking is disabled,
AnnaBridge	146:22da6e220af6	499	or the new value increases the BASEPRI priority level.
AnnaBridge	146:22da6e220af6	500	\param [in] basePri Base Priority value to set
AnnaBridge	146:22da6e220af6	501	*/
AnnaBridge	146:22da6e220af6	502	__attribute__((always_inline)) __STATIC_INLINE void __set_BASEPRI_MAX(uint32_t basePri)
AnnaBridge	146:22da6e220af6	503	{
AnnaBridge	146:22da6e220af6	504	__ASM volatile ("MSR basepri_max, %0" : : "r" (basePri) : "memory");
AnnaBridge	146:22da6e220af6	505	}
AnnaBridge	146:22da6e220af6	506
AnnaBridge	146:22da6e220af6	507
AnnaBridge	146:22da6e220af6	508	/**
AnnaBridge	146:22da6e220af6	509	\brief Get Fault Mask
AnnaBridge	146:22da6e220af6	510	\details Returns the current value of the Fault Mask register.
AnnaBridge	146:22da6e220af6	511	\return Fault Mask register value
AnnaBridge	146:22da6e220af6	512	*/
AnnaBridge	146:22da6e220af6	513	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
AnnaBridge	146:22da6e220af6	514	{
AnnaBridge	146:22da6e220af6	515	uint32_t result;
AnnaBridge	146:22da6e220af6	516
AnnaBridge	146:22da6e220af6	517	__ASM volatile ("MRS %0, faultmask" : "=r" (result) );
AnnaBridge	146:22da6e220af6	518	return(result);
AnnaBridge	146:22da6e220af6	519	}
AnnaBridge	146:22da6e220af6	520
AnnaBridge	146:22da6e220af6	521
AnnaBridge	146:22da6e220af6	522	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	523	/**
AnnaBridge	146:22da6e220af6	524	\brief Get Fault Mask (non-secure)
AnnaBridge	146:22da6e220af6	525	\details Returns the current value of the non-secure Fault Mask register when in secure state.
AnnaBridge	146:22da6e220af6	526	\return Fault Mask register value
AnnaBridge	146:22da6e220af6	527	*/
AnnaBridge	146:22da6e220af6	528	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_FAULTMASK_NS(void)
AnnaBridge	146:22da6e220af6	529	{
AnnaBridge	146:22da6e220af6	530	uint32_t result;
AnnaBridge	146:22da6e220af6	531
AnnaBridge	146:22da6e220af6	532	__ASM volatile ("MRS %0, faultmask_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	533	return(result);
AnnaBridge	146:22da6e220af6	534	}
AnnaBridge	146:22da6e220af6	535	#endif
AnnaBridge	146:22da6e220af6	536
AnnaBridge	146:22da6e220af6	537
AnnaBridge	146:22da6e220af6	538	/**
AnnaBridge	146:22da6e220af6	539	\brief Set Fault Mask
AnnaBridge	146:22da6e220af6	540	\details Assigns the given value to the Fault Mask register.
AnnaBridge	146:22da6e220af6	541	\param [in] faultMask Fault Mask value to set
AnnaBridge	146:22da6e220af6	542	*/
AnnaBridge	146:22da6e220af6	543	__attribute__((always_inline)) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
AnnaBridge	146:22da6e220af6	544	{
AnnaBridge	146:22da6e220af6	545	__ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
AnnaBridge	146:22da6e220af6	546	}
AnnaBridge	146:22da6e220af6	547
AnnaBridge	146:22da6e220af6	548
AnnaBridge	146:22da6e220af6	549	#if (defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3))
AnnaBridge	146:22da6e220af6	550	/**
AnnaBridge	146:22da6e220af6	551	\brief Set Fault Mask (non-secure)
AnnaBridge	146:22da6e220af6	552	\details Assigns the given value to the non-secure Fault Mask register when in secure state.
AnnaBridge	146:22da6e220af6	553	\param [in] faultMask Fault Mask value to set
AnnaBridge	146:22da6e220af6	554	*/
AnnaBridge	146:22da6e220af6	555	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
AnnaBridge	146:22da6e220af6	556	{
AnnaBridge	146:22da6e220af6	557	__ASM volatile ("MSR faultmask_ns, %0" : : "r" (faultMask) : "memory");
AnnaBridge	146:22da6e220af6	558	}
AnnaBridge	146:22da6e220af6	559	#endif
AnnaBridge	146:22da6e220af6	560
AnnaBridge	146:22da6e220af6	561	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	562	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	563	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	146:22da6e220af6	564
AnnaBridge	146:22da6e220af6	565
AnnaBridge	146:22da6e220af6	566	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	567	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	146:22da6e220af6	568
AnnaBridge	146:22da6e220af6	569	/**
AnnaBridge	146:22da6e220af6	570	\brief Get Process Stack Pointer Limit
AnnaBridge	146:22da6e220af6	571	\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	146:22da6e220af6	572	\return PSPLIM Register value
AnnaBridge	146:22da6e220af6	573	*/
AnnaBridge	146:22da6e220af6	574	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_PSPLIM(void)
AnnaBridge	146:22da6e220af6	575	{
AnnaBridge	146:22da6e220af6	576	register uint32_t result;
AnnaBridge	146:22da6e220af6	577
AnnaBridge	146:22da6e220af6	578	__ASM volatile ("MRS %0, psplim" : "=r" (result) );
AnnaBridge	146:22da6e220af6	579	return(result);
AnnaBridge	146:22da6e220af6	580	}
AnnaBridge	146:22da6e220af6	581
AnnaBridge	146:22da6e220af6	582
AnnaBridge	146:22da6e220af6	583	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	146:22da6e220af6	584	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	585	/**
AnnaBridge	146:22da6e220af6	586	\brief Get Process Stack Pointer Limit (non-secure)
AnnaBridge	146:22da6e220af6	587	\details Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	146:22da6e220af6	588	\return PSPLIM Register value
AnnaBridge	146:22da6e220af6	589	*/
AnnaBridge	146:22da6e220af6	590	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_PSPLIM_NS(void)
AnnaBridge	146:22da6e220af6	591	{
AnnaBridge	146:22da6e220af6	592	register uint32_t result;
AnnaBridge	146:22da6e220af6	593
AnnaBridge	146:22da6e220af6	594	__ASM volatile ("MRS %0, psplim_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	595	return(result);
AnnaBridge	146:22da6e220af6	596	}
AnnaBridge	146:22da6e220af6	597	#endif
AnnaBridge	146:22da6e220af6	598
AnnaBridge	146:22da6e220af6	599
AnnaBridge	146:22da6e220af6	600	/**
AnnaBridge	146:22da6e220af6	601	\brief Set Process Stack Pointer Limit
AnnaBridge	146:22da6e220af6	602	\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
AnnaBridge	146:22da6e220af6	603	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	146:22da6e220af6	604	*/
AnnaBridge	146:22da6e220af6	605	__attribute__((always_inline)) __STATIC_INLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
AnnaBridge	146:22da6e220af6	606	{
AnnaBridge	146:22da6e220af6	607	__ASM volatile ("MSR psplim, %0" : : "r" (ProcStackPtrLimit));
AnnaBridge	146:22da6e220af6	608	}
AnnaBridge	146:22da6e220af6	609
AnnaBridge	146:22da6e220af6	610
AnnaBridge	146:22da6e220af6	611	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	146:22da6e220af6	612	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	613	/**
AnnaBridge	146:22da6e220af6	614	\brief Set Process Stack Pointer (non-secure)
AnnaBridge	146:22da6e220af6	615	\details Assigns the given value to the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state.
AnnaBridge	146:22da6e220af6	616	\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
AnnaBridge	146:22da6e220af6	617	*/
AnnaBridge	146:22da6e220af6	618	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
AnnaBridge	146:22da6e220af6	619	{
AnnaBridge	146:22da6e220af6	620	__ASM volatile ("MSR psplim_ns, %0\n" : : "r" (ProcStackPtrLimit));
AnnaBridge	146:22da6e220af6	621	}
AnnaBridge	146:22da6e220af6	622	#endif
AnnaBridge	146:22da6e220af6	623
AnnaBridge	146:22da6e220af6	624
AnnaBridge	146:22da6e220af6	625	/**
AnnaBridge	146:22da6e220af6	626	\brief Get Main Stack Pointer Limit
AnnaBridge	146:22da6e220af6	627	\details Returns the current value of the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	146:22da6e220af6	628	\return MSPLIM Register value
AnnaBridge	146:22da6e220af6	629	*/
AnnaBridge	146:22da6e220af6	630	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_MSPLIM(void)
AnnaBridge	146:22da6e220af6	631	{
AnnaBridge	146:22da6e220af6	632	register uint32_t result;
AnnaBridge	146:22da6e220af6	633
AnnaBridge	146:22da6e220af6	634	__ASM volatile ("MRS %0, msplim" : "=r" (result) );
AnnaBridge	146:22da6e220af6	635
AnnaBridge	146:22da6e220af6	636	return(result);
AnnaBridge	146:22da6e220af6	637	}
AnnaBridge	146:22da6e220af6	638
AnnaBridge	146:22da6e220af6	639
AnnaBridge	146:22da6e220af6	640	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	146:22da6e220af6	641	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	642	/**
AnnaBridge	146:22da6e220af6	643	\brief Get Main Stack Pointer Limit (non-secure)
AnnaBridge	146:22da6e220af6	644	\details Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state.
AnnaBridge	146:22da6e220af6	645	\return MSPLIM Register value
AnnaBridge	146:22da6e220af6	646	*/
AnnaBridge	146:22da6e220af6	647	__attribute__((always_inline)) __STATIC_INLINE uint32_t __TZ_get_MSPLIM_NS(void)
AnnaBridge	146:22da6e220af6	648	{
AnnaBridge	146:22da6e220af6	649	register uint32_t result;
AnnaBridge	146:22da6e220af6	650
AnnaBridge	146:22da6e220af6	651	__ASM volatile ("MRS %0, msplim_ns" : "=r" (result) );
AnnaBridge	146:22da6e220af6	652	return(result);
AnnaBridge	146:22da6e220af6	653	}
AnnaBridge	146:22da6e220af6	654	#endif
AnnaBridge	146:22da6e220af6	655
AnnaBridge	146:22da6e220af6	656
AnnaBridge	146:22da6e220af6	657	/**
AnnaBridge	146:22da6e220af6	658	\brief Set Main Stack Pointer Limit
AnnaBridge	146:22da6e220af6	659	\details Assigns the given value to the Main Stack Pointer Limit (MSPLIM).
AnnaBridge	146:22da6e220af6	660	\param [in] MainStackPtrLimit Main Stack Pointer Limit value to set
AnnaBridge	146:22da6e220af6	661	*/
AnnaBridge	146:22da6e220af6	662	__attribute__((always_inline)) __STATIC_INLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
AnnaBridge	146:22da6e220af6	663	{
AnnaBridge	146:22da6e220af6	664	__ASM volatile ("MSR msplim, %0" : : "r" (MainStackPtrLimit));
AnnaBridge	146:22da6e220af6	665	}
AnnaBridge	146:22da6e220af6	666
AnnaBridge	146:22da6e220af6	667
AnnaBridge	146:22da6e220af6	668	#if ((defined (__ARM_FEATURE_CMSE ) && (__ARM_FEATURE_CMSE == 3)) && \
AnnaBridge	146:22da6e220af6	669	(defined (__ARM_ARCH_8M_MAIN__) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	670	/**
AnnaBridge	146:22da6e220af6	671	\brief Set Main Stack Pointer Limit (non-secure)
AnnaBridge	146:22da6e220af6	672	\details Assigns the given value to the non-secure Main Stack Pointer Limit (MSPLIM) when in secure state.
AnnaBridge	146:22da6e220af6	673	\param [in] MainStackPtrLimit Main Stack Pointer value to set
AnnaBridge	146:22da6e220af6	674	*/
AnnaBridge	146:22da6e220af6	675	__attribute__((always_inline)) __STATIC_INLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
AnnaBridge	146:22da6e220af6	676	{
AnnaBridge	146:22da6e220af6	677	__ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
AnnaBridge	146:22da6e220af6	678	}
AnnaBridge	146:22da6e220af6	679	#endif
AnnaBridge	146:22da6e220af6	680
AnnaBridge	146:22da6e220af6	681	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	682	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	146:22da6e220af6	683
AnnaBridge	146:22da6e220af6	684
AnnaBridge	146:22da6e220af6	685	#if ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	686	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	687
AnnaBridge	146:22da6e220af6	688	/**
AnnaBridge	146:22da6e220af6	689	\brief Get FPSCR
AnnaBridge	146:22da6e220af6	690	\details Returns the current value of the Floating Point Status/Control register.
AnnaBridge	146:22da6e220af6	691	\return Floating Point Status/Control register value
AnnaBridge	146:22da6e220af6	692	*/
AnnaBridge	146:22da6e220af6	693	__attribute__((always_inline)) __STATIC_INLINE uint32_t __get_FPSCR(void)
AnnaBridge	146:22da6e220af6	694	{
AnnaBridge	146:22da6e220af6	695	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	146:22da6e220af6	696	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge	146:22da6e220af6	697	uint32_t result;
AnnaBridge	146:22da6e220af6	698
AnnaBridge	146:22da6e220af6	699	__ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
AnnaBridge	146:22da6e220af6	700	return(result);
AnnaBridge	146:22da6e220af6	701	#else
AnnaBridge	146:22da6e220af6	702	return(0U);
AnnaBridge	146:22da6e220af6	703	#endif
AnnaBridge	146:22da6e220af6	704	}
AnnaBridge	146:22da6e220af6	705
AnnaBridge	146:22da6e220af6	706
AnnaBridge	146:22da6e220af6	707	/**
AnnaBridge	146:22da6e220af6	708	\brief Set FPSCR
AnnaBridge	146:22da6e220af6	709	\details Assigns the given value to the Floating Point Status/Control register.
AnnaBridge	146:22da6e220af6	710	\param [in] fpscr Floating Point Status/Control value to set
AnnaBridge	146:22da6e220af6	711	*/
AnnaBridge	146:22da6e220af6	712	__attribute__((always_inline)) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
AnnaBridge	146:22da6e220af6	713	{
AnnaBridge	146:22da6e220af6	714	#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
AnnaBridge	146:22da6e220af6	715	(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
AnnaBridge	146:22da6e220af6	716	__ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc", "memory");
AnnaBridge	146:22da6e220af6	717	#else
AnnaBridge	146:22da6e220af6	718	(void)fpscr;
AnnaBridge	146:22da6e220af6	719	#endif
AnnaBridge	146:22da6e220af6	720	}
AnnaBridge	146:22da6e220af6	721
AnnaBridge	146:22da6e220af6	722	#endif /* ((defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	723	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	146:22da6e220af6	724
AnnaBridge	146:22da6e220af6	725
AnnaBridge	146:22da6e220af6	726
AnnaBridge	146:22da6e220af6	727	/@} end of CMSIS_Core_RegAccFunctions /
AnnaBridge	146:22da6e220af6	728
AnnaBridge	146:22da6e220af6	729
AnnaBridge	146:22da6e220af6	730	/* ########################## Core Instruction Access ######################### */
AnnaBridge	146:22da6e220af6	731	/** \defgroup CMSIS_Core_InstructionInterface CMSIS Core Instruction Interface
AnnaBridge	146:22da6e220af6	732	Access to dedicated instructions
AnnaBridge	146:22da6e220af6	733	@{
AnnaBridge	146:22da6e220af6	734	*/
AnnaBridge	146:22da6e220af6	735
AnnaBridge	146:22da6e220af6	736	/* Define macros for porting to both thumb1 and thumb2.
AnnaBridge	146:22da6e220af6	737	* For thumb1, use low register (r0-r7), specified by constraint "l"
AnnaBridge	146:22da6e220af6	738	* Otherwise, use general registers, specified by constraint "r" */
AnnaBridge	146:22da6e220af6	739	#if defined (__thumb__) && !defined (__thumb2__)
AnnaBridge	146:22da6e220af6	740	#define __CMSIS_GCC_OUT_REG(r) "=l" (r)
AnnaBridge	146:22da6e220af6	741	#define __CMSIS_GCC_RW_REG(r) "+l" (r)
AnnaBridge	146:22da6e220af6	742	#define __CMSIS_GCC_USE_REG(r) "l" (r)
AnnaBridge	146:22da6e220af6	743	#else
AnnaBridge	146:22da6e220af6	744	#define __CMSIS_GCC_OUT_REG(r) "=r" (r)
AnnaBridge	146:22da6e220af6	745	#define __CMSIS_GCC_RW_REG(r) "+r" (r)
AnnaBridge	146:22da6e220af6	746	#define __CMSIS_GCC_USE_REG(r) "r" (r)
AnnaBridge	146:22da6e220af6	747	#endif
AnnaBridge	146:22da6e220af6	748
AnnaBridge	146:22da6e220af6	749	/**
AnnaBridge	146:22da6e220af6	750	\brief No Operation
AnnaBridge	146:22da6e220af6	751	\details No Operation does nothing. This instruction can be used for code alignment purposes.
AnnaBridge	146:22da6e220af6	752	*/
AnnaBridge	146:22da6e220af6	753	//__attribute__((always_inline)) __STATIC_INLINE void __NOP(void)
AnnaBridge	146:22da6e220af6	754	//{
AnnaBridge	146:22da6e220af6	755	// __ASM volatile ("nop");
AnnaBridge	146:22da6e220af6	756	//}
AnnaBridge	146:22da6e220af6	757	#define __NOP() __ASM volatile ("nop") /* This implementation generates debug information */
AnnaBridge	146:22da6e220af6	758
AnnaBridge	146:22da6e220af6	759	/**
AnnaBridge	146:22da6e220af6	760	\brief Wait For Interrupt
AnnaBridge	146:22da6e220af6	761	\details Wait For Interrupt is a hint instruction that suspends execution until one of a number of events occurs.
AnnaBridge	146:22da6e220af6	762	*/
AnnaBridge	146:22da6e220af6	763	//__attribute__((always_inline)) __STATIC_INLINE void __WFI(void)
AnnaBridge	146:22da6e220af6	764	//{
AnnaBridge	146:22da6e220af6	765	// __ASM volatile ("wfi");
AnnaBridge	146:22da6e220af6	766	//}
AnnaBridge	146:22da6e220af6	767	#define __WFI() __ASM volatile ("wfi") /* This implementation generates debug information */
AnnaBridge	146:22da6e220af6	768
AnnaBridge	146:22da6e220af6	769
AnnaBridge	146:22da6e220af6	770	/**
AnnaBridge	146:22da6e220af6	771	\brief Wait For Event
AnnaBridge	146:22da6e220af6	772	\details Wait For Event is a hint instruction that permits the processor to enter
AnnaBridge	146:22da6e220af6	773	a low-power state until one of a number of events occurs.
AnnaBridge	146:22da6e220af6	774	*/
AnnaBridge	146:22da6e220af6	775	//__attribute__((always_inline)) __STATIC_INLINE void __WFE(void)
AnnaBridge	146:22da6e220af6	776	//{
AnnaBridge	146:22da6e220af6	777	// __ASM volatile ("wfe");
AnnaBridge	146:22da6e220af6	778	//}
AnnaBridge	146:22da6e220af6	779	#define __WFE() __ASM volatile ("wfe") /* This implementation generates debug information */
AnnaBridge	146:22da6e220af6	780
AnnaBridge	146:22da6e220af6	781
AnnaBridge	146:22da6e220af6	782	/**
AnnaBridge	146:22da6e220af6	783	\brief Send Event
AnnaBridge	146:22da6e220af6	784	\details Send Event is a hint instruction. It causes an event to be signaled to the CPU.
AnnaBridge	146:22da6e220af6	785	*/
AnnaBridge	146:22da6e220af6	786	//__attribute__((always_inline)) __STATIC_INLINE void __SEV(void)
AnnaBridge	146:22da6e220af6	787	//{
AnnaBridge	146:22da6e220af6	788	// __ASM volatile ("sev");
AnnaBridge	146:22da6e220af6	789	//}
AnnaBridge	146:22da6e220af6	790	#define __SEV() __ASM volatile ("sev") /* This implementation generates debug information */
AnnaBridge	146:22da6e220af6	791
AnnaBridge	146:22da6e220af6	792
AnnaBridge	146:22da6e220af6	793	/**
AnnaBridge	146:22da6e220af6	794	\brief Instruction Synchronization Barrier
AnnaBridge	146:22da6e220af6	795	\details Instruction Synchronization Barrier flushes the pipeline in the processor,
AnnaBridge	146:22da6e220af6	796	so that all instructions following the ISB are fetched from cache or memory,
AnnaBridge	146:22da6e220af6	797	after the instruction has been completed.
AnnaBridge	146:22da6e220af6	798	*/
AnnaBridge	146:22da6e220af6	799	__attribute__((always_inline)) __STATIC_INLINE void __ISB(void)
AnnaBridge	146:22da6e220af6	800	{
AnnaBridge	146:22da6e220af6	801	__ASM volatile ("isb 0xF":::"memory");
AnnaBridge	146:22da6e220af6	802	}
AnnaBridge	146:22da6e220af6	803
AnnaBridge	146:22da6e220af6	804
AnnaBridge	146:22da6e220af6	805	/**
AnnaBridge	146:22da6e220af6	806	\brief Data Synchronization Barrier
AnnaBridge	146:22da6e220af6	807	\details Acts as a special kind of Data Memory Barrier.
AnnaBridge	146:22da6e220af6	808	It completes when all explicit memory accesses before this instruction complete.
AnnaBridge	146:22da6e220af6	809	*/
AnnaBridge	146:22da6e220af6	810	__attribute__((always_inline)) __STATIC_INLINE void __DSB(void)
AnnaBridge	146:22da6e220af6	811	{
AnnaBridge	146:22da6e220af6	812	__ASM volatile ("dsb 0xF":::"memory");
AnnaBridge	146:22da6e220af6	813	}
AnnaBridge	146:22da6e220af6	814
AnnaBridge	146:22da6e220af6	815
AnnaBridge	146:22da6e220af6	816	/**
AnnaBridge	146:22da6e220af6	817	\brief Data Memory Barrier
AnnaBridge	146:22da6e220af6	818	\details Ensures the apparent order of the explicit memory operations before
AnnaBridge	146:22da6e220af6	819	and after the instruction, without ensuring their completion.
AnnaBridge	146:22da6e220af6	820	*/
AnnaBridge	146:22da6e220af6	821	__attribute__((always_inline)) __STATIC_INLINE void __DMB(void)
AnnaBridge	146:22da6e220af6	822	{
AnnaBridge	146:22da6e220af6	823	__ASM volatile ("dmb 0xF":::"memory");
AnnaBridge	146:22da6e220af6	824	}
AnnaBridge	146:22da6e220af6	825
AnnaBridge	146:22da6e220af6	826
AnnaBridge	146:22da6e220af6	827	/**
AnnaBridge	146:22da6e220af6	828	\brief Reverse byte order (32 bit)
AnnaBridge	146:22da6e220af6	829	\details Reverses the byte order in integer value.
AnnaBridge	146:22da6e220af6	830	\param [in] value Value to reverse
AnnaBridge	146:22da6e220af6	831	\return Reversed value
AnnaBridge	146:22da6e220af6	832	*/
AnnaBridge	146:22da6e220af6	833	__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV(uint32_t value)
AnnaBridge	146:22da6e220af6	834	{
AnnaBridge	146:22da6e220af6	835	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)
AnnaBridge	146:22da6e220af6	836	return __builtin_bswap32(value);
AnnaBridge	146:22da6e220af6	837	#else
AnnaBridge	146:22da6e220af6	838	uint32_t result;
AnnaBridge	146:22da6e220af6	839
AnnaBridge	146:22da6e220af6	840	__ASM volatile ("rev %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	146:22da6e220af6	841	return(result);
AnnaBridge	146:22da6e220af6	842	#endif
AnnaBridge	146:22da6e220af6	843	}
AnnaBridge	146:22da6e220af6	844
AnnaBridge	146:22da6e220af6	845
AnnaBridge	146:22da6e220af6	846	/**
AnnaBridge	146:22da6e220af6	847	\brief Reverse byte order (16 bit)
AnnaBridge	146:22da6e220af6	848	\details Reverses the byte order in two unsigned short values.
AnnaBridge	146:22da6e220af6	849	\param [in] value Value to reverse
AnnaBridge	146:22da6e220af6	850	\return Reversed value
AnnaBridge	146:22da6e220af6	851	*/
AnnaBridge	146:22da6e220af6	852	__attribute__((always_inline)) __STATIC_INLINE uint32_t __REV16(uint32_t value)
AnnaBridge	146:22da6e220af6	853	{
AnnaBridge	146:22da6e220af6	854	uint32_t result;
AnnaBridge	146:22da6e220af6	855
AnnaBridge	146:22da6e220af6	856	__ASM volatile ("rev16 %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	146:22da6e220af6	857	return(result);
AnnaBridge	146:22da6e220af6	858	}
AnnaBridge	146:22da6e220af6	859
AnnaBridge	146:22da6e220af6	860
AnnaBridge	146:22da6e220af6	861	/**
AnnaBridge	146:22da6e220af6	862	\brief Reverse byte order in signed short value
AnnaBridge	146:22da6e220af6	863	\details Reverses the byte order in a signed short value with sign extension to integer.
AnnaBridge	146:22da6e220af6	864	\param [in] value Value to reverse
AnnaBridge	146:22da6e220af6	865	\return Reversed value
AnnaBridge	146:22da6e220af6	866	*/
AnnaBridge	146:22da6e220af6	867	__attribute__((always_inline)) __STATIC_INLINE int32_t __REVSH(int32_t value)
AnnaBridge	146:22da6e220af6	868	{
AnnaBridge	146:22da6e220af6	869	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	146:22da6e220af6	870	return (short)__builtin_bswap16(value);
AnnaBridge	146:22da6e220af6	871	#else
AnnaBridge	146:22da6e220af6	872	int32_t result;
AnnaBridge	146:22da6e220af6	873
AnnaBridge	146:22da6e220af6	874	__ASM volatile ("revsh %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	146:22da6e220af6	875	return(result);
AnnaBridge	146:22da6e220af6	876	#endif
AnnaBridge	146:22da6e220af6	877	}
AnnaBridge	146:22da6e220af6	878
AnnaBridge	146:22da6e220af6	879
AnnaBridge	146:22da6e220af6	880	/**
AnnaBridge	146:22da6e220af6	881	\brief Rotate Right in unsigned value (32 bit)
AnnaBridge	146:22da6e220af6	882	\details Rotate Right (immediate) provides the value of the contents of a register rotated by a variable number of bits.
AnnaBridge	146:22da6e220af6	883	\param [in] op1 Value to rotate
AnnaBridge	146:22da6e220af6	884	\param [in] op2 Number of Bits to rotate
AnnaBridge	146:22da6e220af6	885	\return Rotated value
AnnaBridge	146:22da6e220af6	886	*/
AnnaBridge	146:22da6e220af6	887	__attribute__((always_inline)) __STATIC_INLINE uint32_t __ROR(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	888	{
AnnaBridge	146:22da6e220af6	889	return (op1 >> op2) \| (op1 << (32U - op2));
AnnaBridge	146:22da6e220af6	890	}
AnnaBridge	146:22da6e220af6	891
AnnaBridge	146:22da6e220af6	892
AnnaBridge	146:22da6e220af6	893	/**
AnnaBridge	146:22da6e220af6	894	\brief Breakpoint
AnnaBridge	146:22da6e220af6	895	\details Causes the processor to enter Debug state.
AnnaBridge	146:22da6e220af6	896	Debug tools can use this to investigate system state when the instruction at a particular address is reached.
AnnaBridge	146:22da6e220af6	897	\param [in] value is ignored by the processor.
AnnaBridge	146:22da6e220af6	898	If required, a debugger can use it to store additional information about the breakpoint.
AnnaBridge	146:22da6e220af6	899	*/
AnnaBridge	146:22da6e220af6	900	#define __BKPT(value) __ASM volatile ("bkpt "#value)
AnnaBridge	146:22da6e220af6	901
AnnaBridge	146:22da6e220af6	902
AnnaBridge	146:22da6e220af6	903	/**
AnnaBridge	146:22da6e220af6	904	\brief Reverse bit order of value
AnnaBridge	146:22da6e220af6	905	\details Reverses the bit order of the given value.
AnnaBridge	146:22da6e220af6	906	\param [in] value Value to reverse
AnnaBridge	146:22da6e220af6	907	\return Reversed value
AnnaBridge	146:22da6e220af6	908	*/
AnnaBridge	146:22da6e220af6	909	__attribute__((always_inline)) __STATIC_INLINE uint32_t __RBIT(uint32_t value)
AnnaBridge	146:22da6e220af6	910	{
AnnaBridge	146:22da6e220af6	911	uint32_t result;
AnnaBridge	146:22da6e220af6	912
AnnaBridge	146:22da6e220af6	913	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	914	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	915	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	916	__ASM volatile ("rbit %0, %1" : "=r" (result) : "r" (value) );
AnnaBridge	146:22da6e220af6	917	#else
AnnaBridge	146:22da6e220af6	918	int32_t s = (4 /sizeof(v)/ * 8) - 1; /* extra shift needed at end */
AnnaBridge	146:22da6e220af6	919
AnnaBridge	146:22da6e220af6	920	result = value; /* r will be reversed bits of v; first get LSB of v */
AnnaBridge	146:22da6e220af6	921	for (value >>= 1U; value; value >>= 1U)
AnnaBridge	146:22da6e220af6	922	{
AnnaBridge	146:22da6e220af6	923	result <<= 1U;
AnnaBridge	146:22da6e220af6	924	result \|= value & 1U;
AnnaBridge	146:22da6e220af6	925	s--;
AnnaBridge	146:22da6e220af6	926	}
AnnaBridge	146:22da6e220af6	927	result <<= s; /* shift when v's highest bits are zero */
AnnaBridge	146:22da6e220af6	928	#endif
AnnaBridge	146:22da6e220af6	929	return(result);
AnnaBridge	146:22da6e220af6	930	}
AnnaBridge	146:22da6e220af6	931
AnnaBridge	146:22da6e220af6	932
AnnaBridge	146:22da6e220af6	933	/**
AnnaBridge	146:22da6e220af6	934	\brief Count leading zeros
AnnaBridge	146:22da6e220af6	935	\details Counts the number of leading zeros of a data value.
AnnaBridge	146:22da6e220af6	936	\param [in] value Value to count the leading zeros
AnnaBridge	146:22da6e220af6	937	\return number of leading zeros in value
AnnaBridge	146:22da6e220af6	938	*/
AnnaBridge	146:22da6e220af6	939	#define __CLZ __builtin_clz
AnnaBridge	146:22da6e220af6	940
AnnaBridge	146:22da6e220af6	941
AnnaBridge	146:22da6e220af6	942	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	943	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	944	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	945	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	146:22da6e220af6	946	/**
AnnaBridge	146:22da6e220af6	947	\brief LDR Exclusive (8 bit)
AnnaBridge	146:22da6e220af6	948	\details Executes a exclusive LDR instruction for 8 bit value.
AnnaBridge	146:22da6e220af6	949	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	950	\return value of type uint8_t at (*ptr)
AnnaBridge	146:22da6e220af6	951	*/
AnnaBridge	146:22da6e220af6	952	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDREXB(volatile uint8_t *addr)
AnnaBridge	146:22da6e220af6	953	{
AnnaBridge	146:22da6e220af6	954	uint32_t result;
AnnaBridge	146:22da6e220af6	955
AnnaBridge	146:22da6e220af6	956	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	146:22da6e220af6	957	__ASM volatile ("ldrexb %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	146:22da6e220af6	958	#else
AnnaBridge	146:22da6e220af6	959	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	146:22da6e220af6	960	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	146:22da6e220af6	961	*/
AnnaBridge	146:22da6e220af6	962	__ASM volatile ("ldrexb %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge	146:22da6e220af6	963	#endif
AnnaBridge	146:22da6e220af6	964	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	146:22da6e220af6	965	}
AnnaBridge	146:22da6e220af6	966
AnnaBridge	146:22da6e220af6	967
AnnaBridge	146:22da6e220af6	968	/**
AnnaBridge	146:22da6e220af6	969	\brief LDR Exclusive (16 bit)
AnnaBridge	146:22da6e220af6	970	\details Executes a exclusive LDR instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	971	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	972	\return value of type uint16_t at (*ptr)
AnnaBridge	146:22da6e220af6	973	*/
AnnaBridge	146:22da6e220af6	974	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDREXH(volatile uint16_t *addr)
AnnaBridge	146:22da6e220af6	975	{
AnnaBridge	146:22da6e220af6	976	uint32_t result;
AnnaBridge	146:22da6e220af6	977
AnnaBridge	146:22da6e220af6	978	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	146:22da6e220af6	979	__ASM volatile ("ldrexh %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	146:22da6e220af6	980	#else
AnnaBridge	146:22da6e220af6	981	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	146:22da6e220af6	982	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	146:22da6e220af6	983	*/
AnnaBridge	146:22da6e220af6	984	__ASM volatile ("ldrexh %0, [%1]" : "=r" (result) : "r" (addr) : "memory" );
AnnaBridge	146:22da6e220af6	985	#endif
AnnaBridge	146:22da6e220af6	986	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	146:22da6e220af6	987	}
AnnaBridge	146:22da6e220af6	988
AnnaBridge	146:22da6e220af6	989
AnnaBridge	146:22da6e220af6	990	/**
AnnaBridge	146:22da6e220af6	991	\brief LDR Exclusive (32 bit)
AnnaBridge	146:22da6e220af6	992	\details Executes a exclusive LDR instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	993	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	994	\return value of type uint32_t at (*ptr)
AnnaBridge	146:22da6e220af6	995	*/
AnnaBridge	146:22da6e220af6	996	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDREXW(volatile uint32_t *addr)
AnnaBridge	146:22da6e220af6	997	{
AnnaBridge	146:22da6e220af6	998	uint32_t result;
AnnaBridge	146:22da6e220af6	999
AnnaBridge	146:22da6e220af6	1000	__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
AnnaBridge	146:22da6e220af6	1001	return(result);
AnnaBridge	146:22da6e220af6	1002	}
AnnaBridge	146:22da6e220af6	1003
AnnaBridge	146:22da6e220af6	1004
AnnaBridge	146:22da6e220af6	1005	/**
AnnaBridge	146:22da6e220af6	1006	\brief STR Exclusive (8 bit)
AnnaBridge	146:22da6e220af6	1007	\details Executes a exclusive STR instruction for 8 bit values.
AnnaBridge	146:22da6e220af6	1008	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1009	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1010	\return 0 Function succeeded
AnnaBridge	146:22da6e220af6	1011	\return 1 Function failed
AnnaBridge	146:22da6e220af6	1012	*/
AnnaBridge	146:22da6e220af6	1013	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXB(uint8_t value, volatile uint8_t *addr)
AnnaBridge	146:22da6e220af6	1014	{
AnnaBridge	146:22da6e220af6	1015	uint32_t result;
AnnaBridge	146:22da6e220af6	1016
AnnaBridge	146:22da6e220af6	1017	__ASM volatile ("strexb %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1018	return(result);
AnnaBridge	146:22da6e220af6	1019	}
AnnaBridge	146:22da6e220af6	1020
AnnaBridge	146:22da6e220af6	1021
AnnaBridge	146:22da6e220af6	1022	/**
AnnaBridge	146:22da6e220af6	1023	\brief STR Exclusive (16 bit)
AnnaBridge	146:22da6e220af6	1024	\details Executes a exclusive STR instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1025	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1026	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1027	\return 0 Function succeeded
AnnaBridge	146:22da6e220af6	1028	\return 1 Function failed
AnnaBridge	146:22da6e220af6	1029	*/
AnnaBridge	146:22da6e220af6	1030	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXH(uint16_t value, volatile uint16_t *addr)
AnnaBridge	146:22da6e220af6	1031	{
AnnaBridge	146:22da6e220af6	1032	uint32_t result;
AnnaBridge	146:22da6e220af6	1033
AnnaBridge	146:22da6e220af6	1034	__ASM volatile ("strexh %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1035	return(result);
AnnaBridge	146:22da6e220af6	1036	}
AnnaBridge	146:22da6e220af6	1037
AnnaBridge	146:22da6e220af6	1038
AnnaBridge	146:22da6e220af6	1039	/**
AnnaBridge	146:22da6e220af6	1040	\brief STR Exclusive (32 bit)
AnnaBridge	146:22da6e220af6	1041	\details Executes a exclusive STR instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1042	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1043	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1044	\return 0 Function succeeded
AnnaBridge	146:22da6e220af6	1045	\return 1 Function failed
AnnaBridge	146:22da6e220af6	1046	*/
AnnaBridge	146:22da6e220af6	1047	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
AnnaBridge	146:22da6e220af6	1048	{
AnnaBridge	146:22da6e220af6	1049	uint32_t result;
AnnaBridge	146:22da6e220af6	1050
AnnaBridge	146:22da6e220af6	1051	__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
AnnaBridge	146:22da6e220af6	1052	return(result);
AnnaBridge	146:22da6e220af6	1053	}
AnnaBridge	146:22da6e220af6	1054
AnnaBridge	146:22da6e220af6	1055
AnnaBridge	146:22da6e220af6	1056	/**
AnnaBridge	146:22da6e220af6	1057	\brief Remove the exclusive lock
AnnaBridge	146:22da6e220af6	1058	\details Removes the exclusive lock which is created by LDREX.
AnnaBridge	146:22da6e220af6	1059	*/
AnnaBridge	146:22da6e220af6	1060	__attribute__((always_inline)) __STATIC_INLINE void __CLREX(void)
AnnaBridge	146:22da6e220af6	1061	{
AnnaBridge	146:22da6e220af6	1062	__ASM volatile ("clrex" ::: "memory");
AnnaBridge	146:22da6e220af6	1063	}
AnnaBridge	146:22da6e220af6	1064
AnnaBridge	146:22da6e220af6	1065	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1066	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1067	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1068	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	146:22da6e220af6	1069
AnnaBridge	146:22da6e220af6	1070
AnnaBridge	146:22da6e220af6	1071	#if ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1072	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1073	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) )
AnnaBridge	146:22da6e220af6	1074	/**
AnnaBridge	146:22da6e220af6	1075	\brief Signed Saturate
AnnaBridge	146:22da6e220af6	1076	\details Saturates a signed value.
AnnaBridge	146:22da6e220af6	1077	\param [in] value Value to be saturated
AnnaBridge	146:22da6e220af6	1078	\param [in] sat Bit position to saturate to (1..32)
AnnaBridge	146:22da6e220af6	1079	\return Saturated value
AnnaBridge	146:22da6e220af6	1080	*/
AnnaBridge	146:22da6e220af6	1081	#define __SSAT(ARG1,ARG2) \
AnnaBridge	146:22da6e220af6	1082	({ \
AnnaBridge	146:22da6e220af6	1083	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	146:22da6e220af6	1084	__ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	146:22da6e220af6	1085	__RES; \
AnnaBridge	146:22da6e220af6	1086	})
AnnaBridge	146:22da6e220af6	1087
AnnaBridge	146:22da6e220af6	1088
AnnaBridge	146:22da6e220af6	1089	/**
AnnaBridge	146:22da6e220af6	1090	\brief Unsigned Saturate
AnnaBridge	146:22da6e220af6	1091	\details Saturates an unsigned value.
AnnaBridge	146:22da6e220af6	1092	\param [in] value Value to be saturated
AnnaBridge	146:22da6e220af6	1093	\param [in] sat Bit position to saturate to (0..31)
AnnaBridge	146:22da6e220af6	1094	\return Saturated value
AnnaBridge	146:22da6e220af6	1095	*/
AnnaBridge	146:22da6e220af6	1096	#define __USAT(ARG1,ARG2) \
AnnaBridge	146:22da6e220af6	1097	({ \
AnnaBridge	146:22da6e220af6	1098	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	146:22da6e220af6	1099	__ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	146:22da6e220af6	1100	__RES; \
AnnaBridge	146:22da6e220af6	1101	})
AnnaBridge	146:22da6e220af6	1102
AnnaBridge	146:22da6e220af6	1103
AnnaBridge	146:22da6e220af6	1104	/**
AnnaBridge	146:22da6e220af6	1105	\brief Rotate Right with Extend (32 bit)
AnnaBridge	146:22da6e220af6	1106	\details Moves each bit of a bitstring right by one bit.
AnnaBridge	146:22da6e220af6	1107	The carry input is shifted in at the left end of the bitstring.
AnnaBridge	146:22da6e220af6	1108	\param [in] value Value to rotate
AnnaBridge	146:22da6e220af6	1109	\return Rotated value
AnnaBridge	146:22da6e220af6	1110	*/
AnnaBridge	146:22da6e220af6	1111	__attribute__((always_inline)) __STATIC_INLINE uint32_t __RRX(uint32_t value)
AnnaBridge	146:22da6e220af6	1112	{
AnnaBridge	146:22da6e220af6	1113	uint32_t result;
AnnaBridge	146:22da6e220af6	1114
AnnaBridge	146:22da6e220af6	1115	__ASM volatile ("rrx %0, %1" : __CMSIS_GCC_OUT_REG (result) : __CMSIS_GCC_USE_REG (value) );
AnnaBridge	146:22da6e220af6	1116	return(result);
AnnaBridge	146:22da6e220af6	1117	}
AnnaBridge	146:22da6e220af6	1118
AnnaBridge	146:22da6e220af6	1119
AnnaBridge	146:22da6e220af6	1120	/**
AnnaBridge	146:22da6e220af6	1121	\brief LDRT Unprivileged (8 bit)
AnnaBridge	146:22da6e220af6	1122	\details Executes a Unprivileged LDRT instruction for 8 bit value.
AnnaBridge	146:22da6e220af6	1123	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1124	\return value of type uint8_t at (*ptr)
AnnaBridge	146:22da6e220af6	1125	*/
AnnaBridge	146:22da6e220af6	1126	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDRBT(volatile uint8_t *ptr)
AnnaBridge	146:22da6e220af6	1127	{
AnnaBridge	146:22da6e220af6	1128	uint32_t result;
AnnaBridge	146:22da6e220af6	1129
AnnaBridge	146:22da6e220af6	1130	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	146:22da6e220af6	1131	__ASM volatile ("ldrbt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1132	#else
AnnaBridge	146:22da6e220af6	1133	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	146:22da6e220af6	1134	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	146:22da6e220af6	1135	*/
AnnaBridge	146:22da6e220af6	1136	__ASM volatile ("ldrbt %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge	146:22da6e220af6	1137	#endif
AnnaBridge	146:22da6e220af6	1138	return ((uint8_t) result); /* Add explicit type cast here */
AnnaBridge	146:22da6e220af6	1139	}
AnnaBridge	146:22da6e220af6	1140
AnnaBridge	146:22da6e220af6	1141
AnnaBridge	146:22da6e220af6	1142	/**
AnnaBridge	146:22da6e220af6	1143	\brief LDRT Unprivileged (16 bit)
AnnaBridge	146:22da6e220af6	1144	\details Executes a Unprivileged LDRT instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1145	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1146	\return value of type uint16_t at (*ptr)
AnnaBridge	146:22da6e220af6	1147	*/
AnnaBridge	146:22da6e220af6	1148	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDRHT(volatile uint16_t *ptr)
AnnaBridge	146:22da6e220af6	1149	{
AnnaBridge	146:22da6e220af6	1150	uint32_t result;
AnnaBridge	146:22da6e220af6	1151
AnnaBridge	146:22da6e220af6	1152	#if (__GNUC__ > 4) \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)
AnnaBridge	146:22da6e220af6	1153	__ASM volatile ("ldrht %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1154	#else
AnnaBridge	146:22da6e220af6	1155	/* Prior to GCC 4.8, "Q" will be expanded to [rx, #0] which is not
AnnaBridge	146:22da6e220af6	1156	accepted by assembler. So has to use following less efficient pattern.
AnnaBridge	146:22da6e220af6	1157	*/
AnnaBridge	146:22da6e220af6	1158	__ASM volatile ("ldrht %0, [%1]" : "=r" (result) : "r" (ptr) : "memory" );
AnnaBridge	146:22da6e220af6	1159	#endif
AnnaBridge	146:22da6e220af6	1160	return ((uint16_t) result); /* Add explicit type cast here */
AnnaBridge	146:22da6e220af6	1161	}
AnnaBridge	146:22da6e220af6	1162
AnnaBridge	146:22da6e220af6	1163
AnnaBridge	146:22da6e220af6	1164	/**
AnnaBridge	146:22da6e220af6	1165	\brief LDRT Unprivileged (32 bit)
AnnaBridge	146:22da6e220af6	1166	\details Executes a Unprivileged LDRT instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1167	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1168	\return value of type uint32_t at (*ptr)
AnnaBridge	146:22da6e220af6	1169	*/
AnnaBridge	146:22da6e220af6	1170	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDRT(volatile uint32_t *ptr)
AnnaBridge	146:22da6e220af6	1171	{
AnnaBridge	146:22da6e220af6	1172	uint32_t result;
AnnaBridge	146:22da6e220af6	1173
AnnaBridge	146:22da6e220af6	1174	__ASM volatile ("ldrt %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1175	return(result);
AnnaBridge	146:22da6e220af6	1176	}
AnnaBridge	146:22da6e220af6	1177
AnnaBridge	146:22da6e220af6	1178
AnnaBridge	146:22da6e220af6	1179	/**
AnnaBridge	146:22da6e220af6	1180	\brief STRT Unprivileged (8 bit)
AnnaBridge	146:22da6e220af6	1181	\details Executes a Unprivileged STRT instruction for 8 bit values.
AnnaBridge	146:22da6e220af6	1182	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1183	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1184	*/
AnnaBridge	146:22da6e220af6	1185	__attribute__((always_inline)) __STATIC_INLINE void __STRBT(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	146:22da6e220af6	1186	{
AnnaBridge	146:22da6e220af6	1187	__ASM volatile ("strbt %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1188	}
AnnaBridge	146:22da6e220af6	1189
AnnaBridge	146:22da6e220af6	1190
AnnaBridge	146:22da6e220af6	1191	/**
AnnaBridge	146:22da6e220af6	1192	\brief STRT Unprivileged (16 bit)
AnnaBridge	146:22da6e220af6	1193	\details Executes a Unprivileged STRT instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1194	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1195	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1196	*/
AnnaBridge	146:22da6e220af6	1197	__attribute__((always_inline)) __STATIC_INLINE void __STRHT(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	146:22da6e220af6	1198	{
AnnaBridge	146:22da6e220af6	1199	__ASM volatile ("strht %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1200	}
AnnaBridge	146:22da6e220af6	1201
AnnaBridge	146:22da6e220af6	1202
AnnaBridge	146:22da6e220af6	1203	/**
AnnaBridge	146:22da6e220af6	1204	\brief STRT Unprivileged (32 bit)
AnnaBridge	146:22da6e220af6	1205	\details Executes a Unprivileged STRT instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1206	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1207	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1208	*/
AnnaBridge	146:22da6e220af6	1209	__attribute__((always_inline)) __STATIC_INLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	146:22da6e220af6	1210	{
AnnaBridge	146:22da6e220af6	1211	__ASM volatile ("strt %1, %0" : "=Q" (*ptr) : "r" (value) );
AnnaBridge	146:22da6e220af6	1212	}
AnnaBridge	146:22da6e220af6	1213
AnnaBridge	146:22da6e220af6	1214	#endif /* ((defined (__ARM_ARCH_7M__ ) && (__ARM_ARCH_7M__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1215	(defined (__ARM_ARCH_7EM__ ) && (__ARM_ARCH_7EM__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1216	(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) ) */
AnnaBridge	146:22da6e220af6	1217
AnnaBridge	146:22da6e220af6	1218
AnnaBridge	146:22da6e220af6	1219	#if ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1220	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) )
AnnaBridge	146:22da6e220af6	1221	/**
AnnaBridge	146:22da6e220af6	1222	\brief Load-Acquire (8 bit)
AnnaBridge	146:22da6e220af6	1223	\details Executes a LDAB instruction for 8 bit value.
AnnaBridge	146:22da6e220af6	1224	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1225	\return value of type uint8_t at (*ptr)
AnnaBridge	146:22da6e220af6	1226	*/
AnnaBridge	146:22da6e220af6	1227	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAB(volatile uint8_t *ptr)
AnnaBridge	146:22da6e220af6	1228	{
AnnaBridge	146:22da6e220af6	1229	uint32_t result;
AnnaBridge	146:22da6e220af6	1230
AnnaBridge	146:22da6e220af6	1231	__ASM volatile ("ldab %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1232	return ((uint8_t) result);
AnnaBridge	146:22da6e220af6	1233	}
AnnaBridge	146:22da6e220af6	1234
AnnaBridge	146:22da6e220af6	1235
AnnaBridge	146:22da6e220af6	1236	/**
AnnaBridge	146:22da6e220af6	1237	\brief Load-Acquire (16 bit)
AnnaBridge	146:22da6e220af6	1238	\details Executes a LDAH instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1239	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1240	\return value of type uint16_t at (*ptr)
AnnaBridge	146:22da6e220af6	1241	*/
AnnaBridge	146:22da6e220af6	1242	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAH(volatile uint16_t *ptr)
AnnaBridge	146:22da6e220af6	1243	{
AnnaBridge	146:22da6e220af6	1244	uint32_t result;
AnnaBridge	146:22da6e220af6	1245
AnnaBridge	146:22da6e220af6	1246	__ASM volatile ("ldah %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1247	return ((uint16_t) result);
AnnaBridge	146:22da6e220af6	1248	}
AnnaBridge	146:22da6e220af6	1249
AnnaBridge	146:22da6e220af6	1250
AnnaBridge	146:22da6e220af6	1251	/**
AnnaBridge	146:22da6e220af6	1252	\brief Load-Acquire (32 bit)
AnnaBridge	146:22da6e220af6	1253	\details Executes a LDA instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1254	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1255	\return value of type uint32_t at (*ptr)
AnnaBridge	146:22da6e220af6	1256	*/
AnnaBridge	146:22da6e220af6	1257	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDA(volatile uint32_t *ptr)
AnnaBridge	146:22da6e220af6	1258	{
AnnaBridge	146:22da6e220af6	1259	uint32_t result;
AnnaBridge	146:22da6e220af6	1260
AnnaBridge	146:22da6e220af6	1261	__ASM volatile ("lda %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1262	return(result);
AnnaBridge	146:22da6e220af6	1263	}
AnnaBridge	146:22da6e220af6	1264
AnnaBridge	146:22da6e220af6	1265
AnnaBridge	146:22da6e220af6	1266	/**
AnnaBridge	146:22da6e220af6	1267	\brief Store-Release (8 bit)
AnnaBridge	146:22da6e220af6	1268	\details Executes a STLB instruction for 8 bit values.
AnnaBridge	146:22da6e220af6	1269	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1270	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1271	*/
AnnaBridge	146:22da6e220af6	1272	__attribute__((always_inline)) __STATIC_INLINE void __STLB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	146:22da6e220af6	1273	{
AnnaBridge	146:22da6e220af6	1274	__ASM volatile ("stlb %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1275	}
AnnaBridge	146:22da6e220af6	1276
AnnaBridge	146:22da6e220af6	1277
AnnaBridge	146:22da6e220af6	1278	/**
AnnaBridge	146:22da6e220af6	1279	\brief Store-Release (16 bit)
AnnaBridge	146:22da6e220af6	1280	\details Executes a STLH instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1281	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1282	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1283	*/
AnnaBridge	146:22da6e220af6	1284	__attribute__((always_inline)) __STATIC_INLINE void __STLH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	146:22da6e220af6	1285	{
AnnaBridge	146:22da6e220af6	1286	__ASM volatile ("stlh %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1287	}
AnnaBridge	146:22da6e220af6	1288
AnnaBridge	146:22da6e220af6	1289
AnnaBridge	146:22da6e220af6	1290	/**
AnnaBridge	146:22da6e220af6	1291	\brief Store-Release (32 bit)
AnnaBridge	146:22da6e220af6	1292	\details Executes a STL instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1293	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1294	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1295	*/
AnnaBridge	146:22da6e220af6	1296	__attribute__((always_inline)) __STATIC_INLINE void __STL(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	146:22da6e220af6	1297	{
AnnaBridge	146:22da6e220af6	1298	__ASM volatile ("stl %1, %0" : "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1299	}
AnnaBridge	146:22da6e220af6	1300
AnnaBridge	146:22da6e220af6	1301
AnnaBridge	146:22da6e220af6	1302	/**
AnnaBridge	146:22da6e220af6	1303	\brief Load-Acquire Exclusive (8 bit)
AnnaBridge	146:22da6e220af6	1304	\details Executes a LDAB exclusive instruction for 8 bit value.
AnnaBridge	146:22da6e220af6	1305	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1306	\return value of type uint8_t at (*ptr)
AnnaBridge	146:22da6e220af6	1307	*/
AnnaBridge	146:22da6e220af6	1308	__attribute__((always_inline)) __STATIC_INLINE uint8_t __LDAEXB(volatile uint8_t *ptr)
AnnaBridge	146:22da6e220af6	1309	{
AnnaBridge	146:22da6e220af6	1310	uint32_t result;
AnnaBridge	146:22da6e220af6	1311
AnnaBridge	146:22da6e220af6	1312	__ASM volatile ("ldaexb %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1313	return ((uint8_t) result);
AnnaBridge	146:22da6e220af6	1314	}
AnnaBridge	146:22da6e220af6	1315
AnnaBridge	146:22da6e220af6	1316
AnnaBridge	146:22da6e220af6	1317	/**
AnnaBridge	146:22da6e220af6	1318	\brief Load-Acquire Exclusive (16 bit)
AnnaBridge	146:22da6e220af6	1319	\details Executes a LDAH exclusive instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1320	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1321	\return value of type uint16_t at (*ptr)
AnnaBridge	146:22da6e220af6	1322	*/
AnnaBridge	146:22da6e220af6	1323	__attribute__((always_inline)) __STATIC_INLINE uint16_t __LDAEXH(volatile uint16_t *ptr)
AnnaBridge	146:22da6e220af6	1324	{
AnnaBridge	146:22da6e220af6	1325	uint32_t result;
AnnaBridge	146:22da6e220af6	1326
AnnaBridge	146:22da6e220af6	1327	__ASM volatile ("ldaexh %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1328	return ((uint16_t) result);
AnnaBridge	146:22da6e220af6	1329	}
AnnaBridge	146:22da6e220af6	1330
AnnaBridge	146:22da6e220af6	1331
AnnaBridge	146:22da6e220af6	1332	/**
AnnaBridge	146:22da6e220af6	1333	\brief Load-Acquire Exclusive (32 bit)
AnnaBridge	146:22da6e220af6	1334	\details Executes a LDA exclusive instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1335	\param [in] ptr Pointer to data
AnnaBridge	146:22da6e220af6	1336	\return value of type uint32_t at (*ptr)
AnnaBridge	146:22da6e220af6	1337	*/
AnnaBridge	146:22da6e220af6	1338	__attribute__((always_inline)) __STATIC_INLINE uint32_t __LDAEX(volatile uint32_t *ptr)
AnnaBridge	146:22da6e220af6	1339	{
AnnaBridge	146:22da6e220af6	1340	uint32_t result;
AnnaBridge	146:22da6e220af6	1341
AnnaBridge	146:22da6e220af6	1342	__ASM volatile ("ldaex %0, %1" : "=r" (result) : "Q" (*ptr) );
AnnaBridge	146:22da6e220af6	1343	return(result);
AnnaBridge	146:22da6e220af6	1344	}
AnnaBridge	146:22da6e220af6	1345
AnnaBridge	146:22da6e220af6	1346
AnnaBridge	146:22da6e220af6	1347	/**
AnnaBridge	146:22da6e220af6	1348	\brief Store-Release Exclusive (8 bit)
AnnaBridge	146:22da6e220af6	1349	\details Executes a STLB exclusive instruction for 8 bit values.
AnnaBridge	146:22da6e220af6	1350	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1351	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1352	\return 0 Function succeeded
AnnaBridge	146:22da6e220af6	1353	\return 1 Function failed
AnnaBridge	146:22da6e220af6	1354	*/
AnnaBridge	146:22da6e220af6	1355	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXB(uint8_t value, volatile uint8_t *ptr)
AnnaBridge	146:22da6e220af6	1356	{
AnnaBridge	146:22da6e220af6	1357	uint32_t result;
AnnaBridge	146:22da6e220af6	1358
AnnaBridge	146:22da6e220af6	1359	__ASM volatile ("stlexb %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1360	return(result);
AnnaBridge	146:22da6e220af6	1361	}
AnnaBridge	146:22da6e220af6	1362
AnnaBridge	146:22da6e220af6	1363
AnnaBridge	146:22da6e220af6	1364	/**
AnnaBridge	146:22da6e220af6	1365	\brief Store-Release Exclusive (16 bit)
AnnaBridge	146:22da6e220af6	1366	\details Executes a STLH exclusive instruction for 16 bit values.
AnnaBridge	146:22da6e220af6	1367	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1368	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1369	\return 0 Function succeeded
AnnaBridge	146:22da6e220af6	1370	\return 1 Function failed
AnnaBridge	146:22da6e220af6	1371	*/
AnnaBridge	146:22da6e220af6	1372	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEXH(uint16_t value, volatile uint16_t *ptr)
AnnaBridge	146:22da6e220af6	1373	{
AnnaBridge	146:22da6e220af6	1374	uint32_t result;
AnnaBridge	146:22da6e220af6	1375
AnnaBridge	146:22da6e220af6	1376	__ASM volatile ("stlexh %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1377	return(result);
AnnaBridge	146:22da6e220af6	1378	}
AnnaBridge	146:22da6e220af6	1379
AnnaBridge	146:22da6e220af6	1380
AnnaBridge	146:22da6e220af6	1381	/**
AnnaBridge	146:22da6e220af6	1382	\brief Store-Release Exclusive (32 bit)
AnnaBridge	146:22da6e220af6	1383	\details Executes a STL exclusive instruction for 32 bit values.
AnnaBridge	146:22da6e220af6	1384	\param [in] value Value to store
AnnaBridge	146:22da6e220af6	1385	\param [in] ptr Pointer to location
AnnaBridge	146:22da6e220af6	1386	\return 0 Function succeeded
AnnaBridge	146:22da6e220af6	1387	\return 1 Function failed
AnnaBridge	146:22da6e220af6	1388	*/
AnnaBridge	146:22da6e220af6	1389	__attribute__((always_inline)) __STATIC_INLINE uint32_t __STLEX(uint32_t value, volatile uint32_t *ptr)
AnnaBridge	146:22da6e220af6	1390	{
AnnaBridge	146:22da6e220af6	1391	uint32_t result;
AnnaBridge	146:22da6e220af6	1392
AnnaBridge	146:22da6e220af6	1393	__ASM volatile ("stlex %0, %2, %1" : "=&r" (result), "=Q" (*ptr) : "r" ((uint32_t)value) );
AnnaBridge	146:22da6e220af6	1394	return(result);
AnnaBridge	146:22da6e220af6	1395	}
AnnaBridge	146:22da6e220af6	1396
AnnaBridge	146:22da6e220af6	1397	#endif /* ((defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) \|\| \
AnnaBridge	146:22da6e220af6	1398	(defined (__ARM_ARCH_8M_BASE__ ) && (__ARM_ARCH_8M_BASE__ == 1)) ) */
AnnaBridge	146:22da6e220af6	1399
AnnaBridge	146:22da6e220af6	1400	/@}/ /* end of group CMSIS_Core_InstructionInterface */
AnnaBridge	146:22da6e220af6	1401
AnnaBridge	146:22da6e220af6	1402
AnnaBridge	146:22da6e220af6	1403	/* ################### Compiler specific Intrinsics ########################### */
AnnaBridge	146:22da6e220af6	1404	/** \defgroup CMSIS_SIMD_intrinsics CMSIS SIMD Intrinsics
AnnaBridge	146:22da6e220af6	1405	Access to dedicated SIMD instructions
AnnaBridge	146:22da6e220af6	1406	@{
AnnaBridge	146:22da6e220af6	1407	*/
AnnaBridge	146:22da6e220af6	1408
AnnaBridge	146:22da6e220af6	1409	#if (__ARM_FEATURE_DSP == 1) /* ToDo ARMCLANG: This should be ARCH >= ARMv7-M + SIMD */
AnnaBridge	146:22da6e220af6	1410
AnnaBridge	146:22da6e220af6	1411	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1412	{
AnnaBridge	146:22da6e220af6	1413	uint32_t result;
AnnaBridge	146:22da6e220af6	1414
AnnaBridge	146:22da6e220af6	1415	__ASM volatile ("sadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1416	return(result);
AnnaBridge	146:22da6e220af6	1417	}
AnnaBridge	146:22da6e220af6	1418
AnnaBridge	146:22da6e220af6	1419	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1420	{
AnnaBridge	146:22da6e220af6	1421	uint32_t result;
AnnaBridge	146:22da6e220af6	1422
AnnaBridge	146:22da6e220af6	1423	__ASM volatile ("qadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1424	return(result);
AnnaBridge	146:22da6e220af6	1425	}
AnnaBridge	146:22da6e220af6	1426
AnnaBridge	146:22da6e220af6	1427	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1428	{
AnnaBridge	146:22da6e220af6	1429	uint32_t result;
AnnaBridge	146:22da6e220af6	1430
AnnaBridge	146:22da6e220af6	1431	__ASM volatile ("shadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1432	return(result);
AnnaBridge	146:22da6e220af6	1433	}
AnnaBridge	146:22da6e220af6	1434
AnnaBridge	146:22da6e220af6	1435	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1436	{
AnnaBridge	146:22da6e220af6	1437	uint32_t result;
AnnaBridge	146:22da6e220af6	1438
AnnaBridge	146:22da6e220af6	1439	__ASM volatile ("uadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1440	return(result);
AnnaBridge	146:22da6e220af6	1441	}
AnnaBridge	146:22da6e220af6	1442
AnnaBridge	146:22da6e220af6	1443	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1444	{
AnnaBridge	146:22da6e220af6	1445	uint32_t result;
AnnaBridge	146:22da6e220af6	1446
AnnaBridge	146:22da6e220af6	1447	__ASM volatile ("uqadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1448	return(result);
AnnaBridge	146:22da6e220af6	1449	}
AnnaBridge	146:22da6e220af6	1450
AnnaBridge	146:22da6e220af6	1451	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1452	{
AnnaBridge	146:22da6e220af6	1453	uint32_t result;
AnnaBridge	146:22da6e220af6	1454
AnnaBridge	146:22da6e220af6	1455	__ASM volatile ("uhadd8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1456	return(result);
AnnaBridge	146:22da6e220af6	1457	}
AnnaBridge	146:22da6e220af6	1458
AnnaBridge	146:22da6e220af6	1459
AnnaBridge	146:22da6e220af6	1460	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1461	{
AnnaBridge	146:22da6e220af6	1462	uint32_t result;
AnnaBridge	146:22da6e220af6	1463
AnnaBridge	146:22da6e220af6	1464	__ASM volatile ("ssub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1465	return(result);
AnnaBridge	146:22da6e220af6	1466	}
AnnaBridge	146:22da6e220af6	1467
AnnaBridge	146:22da6e220af6	1468	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1469	{
AnnaBridge	146:22da6e220af6	1470	uint32_t result;
AnnaBridge	146:22da6e220af6	1471
AnnaBridge	146:22da6e220af6	1472	__ASM volatile ("qsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1473	return(result);
AnnaBridge	146:22da6e220af6	1474	}
AnnaBridge	146:22da6e220af6	1475
AnnaBridge	146:22da6e220af6	1476	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1477	{
AnnaBridge	146:22da6e220af6	1478	uint32_t result;
AnnaBridge	146:22da6e220af6	1479
AnnaBridge	146:22da6e220af6	1480	__ASM volatile ("shsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1481	return(result);
AnnaBridge	146:22da6e220af6	1482	}
AnnaBridge	146:22da6e220af6	1483
AnnaBridge	146:22da6e220af6	1484	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1485	{
AnnaBridge	146:22da6e220af6	1486	uint32_t result;
AnnaBridge	146:22da6e220af6	1487
AnnaBridge	146:22da6e220af6	1488	__ASM volatile ("usub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1489	return(result);
AnnaBridge	146:22da6e220af6	1490	}
AnnaBridge	146:22da6e220af6	1491
AnnaBridge	146:22da6e220af6	1492	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1493	{
AnnaBridge	146:22da6e220af6	1494	uint32_t result;
AnnaBridge	146:22da6e220af6	1495
AnnaBridge	146:22da6e220af6	1496	__ASM volatile ("uqsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1497	return(result);
AnnaBridge	146:22da6e220af6	1498	}
AnnaBridge	146:22da6e220af6	1499
AnnaBridge	146:22da6e220af6	1500	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1501	{
AnnaBridge	146:22da6e220af6	1502	uint32_t result;
AnnaBridge	146:22da6e220af6	1503
AnnaBridge	146:22da6e220af6	1504	__ASM volatile ("uhsub8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1505	return(result);
AnnaBridge	146:22da6e220af6	1506	}
AnnaBridge	146:22da6e220af6	1507
AnnaBridge	146:22da6e220af6	1508
AnnaBridge	146:22da6e220af6	1509	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SADD16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1510	{
AnnaBridge	146:22da6e220af6	1511	uint32_t result;
AnnaBridge	146:22da6e220af6	1512
AnnaBridge	146:22da6e220af6	1513	__ASM volatile ("sadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1514	return(result);
AnnaBridge	146:22da6e220af6	1515	}
AnnaBridge	146:22da6e220af6	1516
AnnaBridge	146:22da6e220af6	1517	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QADD16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1518	{
AnnaBridge	146:22da6e220af6	1519	uint32_t result;
AnnaBridge	146:22da6e220af6	1520
AnnaBridge	146:22da6e220af6	1521	__ASM volatile ("qadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1522	return(result);
AnnaBridge	146:22da6e220af6	1523	}
AnnaBridge	146:22da6e220af6	1524
AnnaBridge	146:22da6e220af6	1525	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1526	{
AnnaBridge	146:22da6e220af6	1527	uint32_t result;
AnnaBridge	146:22da6e220af6	1528
AnnaBridge	146:22da6e220af6	1529	__ASM volatile ("shadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1530	return(result);
AnnaBridge	146:22da6e220af6	1531	}
AnnaBridge	146:22da6e220af6	1532
AnnaBridge	146:22da6e220af6	1533	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UADD16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1534	{
AnnaBridge	146:22da6e220af6	1535	uint32_t result;
AnnaBridge	146:22da6e220af6	1536
AnnaBridge	146:22da6e220af6	1537	__ASM volatile ("uadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1538	return(result);
AnnaBridge	146:22da6e220af6	1539	}
AnnaBridge	146:22da6e220af6	1540
AnnaBridge	146:22da6e220af6	1541	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQADD16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1542	{
AnnaBridge	146:22da6e220af6	1543	uint32_t result;
AnnaBridge	146:22da6e220af6	1544
AnnaBridge	146:22da6e220af6	1545	__ASM volatile ("uqadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1546	return(result);
AnnaBridge	146:22da6e220af6	1547	}
AnnaBridge	146:22da6e220af6	1548
AnnaBridge	146:22da6e220af6	1549	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHADD16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1550	{
AnnaBridge	146:22da6e220af6	1551	uint32_t result;
AnnaBridge	146:22da6e220af6	1552
AnnaBridge	146:22da6e220af6	1553	__ASM volatile ("uhadd16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1554	return(result);
AnnaBridge	146:22da6e220af6	1555	}
AnnaBridge	146:22da6e220af6	1556
AnnaBridge	146:22da6e220af6	1557	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1558	{
AnnaBridge	146:22da6e220af6	1559	uint32_t result;
AnnaBridge	146:22da6e220af6	1560
AnnaBridge	146:22da6e220af6	1561	__ASM volatile ("ssub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1562	return(result);
AnnaBridge	146:22da6e220af6	1563	}
AnnaBridge	146:22da6e220af6	1564
AnnaBridge	146:22da6e220af6	1565	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1566	{
AnnaBridge	146:22da6e220af6	1567	uint32_t result;
AnnaBridge	146:22da6e220af6	1568
AnnaBridge	146:22da6e220af6	1569	__ASM volatile ("qsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1570	return(result);
AnnaBridge	146:22da6e220af6	1571	}
AnnaBridge	146:22da6e220af6	1572
AnnaBridge	146:22da6e220af6	1573	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1574	{
AnnaBridge	146:22da6e220af6	1575	uint32_t result;
AnnaBridge	146:22da6e220af6	1576
AnnaBridge	146:22da6e220af6	1577	__ASM volatile ("shsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1578	return(result);
AnnaBridge	146:22da6e220af6	1579	}
AnnaBridge	146:22da6e220af6	1580
AnnaBridge	146:22da6e220af6	1581	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USUB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1582	{
AnnaBridge	146:22da6e220af6	1583	uint32_t result;
AnnaBridge	146:22da6e220af6	1584
AnnaBridge	146:22da6e220af6	1585	__ASM volatile ("usub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1586	return(result);
AnnaBridge	146:22da6e220af6	1587	}
AnnaBridge	146:22da6e220af6	1588
AnnaBridge	146:22da6e220af6	1589	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1590	{
AnnaBridge	146:22da6e220af6	1591	uint32_t result;
AnnaBridge	146:22da6e220af6	1592
AnnaBridge	146:22da6e220af6	1593	__ASM volatile ("uqsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1594	return(result);
AnnaBridge	146:22da6e220af6	1595	}
AnnaBridge	146:22da6e220af6	1596
AnnaBridge	146:22da6e220af6	1597	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSUB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1598	{
AnnaBridge	146:22da6e220af6	1599	uint32_t result;
AnnaBridge	146:22da6e220af6	1600
AnnaBridge	146:22da6e220af6	1601	__ASM volatile ("uhsub16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1602	return(result);
AnnaBridge	146:22da6e220af6	1603	}
AnnaBridge	146:22da6e220af6	1604
AnnaBridge	146:22da6e220af6	1605	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SASX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1606	{
AnnaBridge	146:22da6e220af6	1607	uint32_t result;
AnnaBridge	146:22da6e220af6	1608
AnnaBridge	146:22da6e220af6	1609	__ASM volatile ("sasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1610	return(result);
AnnaBridge	146:22da6e220af6	1611	}
AnnaBridge	146:22da6e220af6	1612
AnnaBridge	146:22da6e220af6	1613	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QASX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1614	{
AnnaBridge	146:22da6e220af6	1615	uint32_t result;
AnnaBridge	146:22da6e220af6	1616
AnnaBridge	146:22da6e220af6	1617	__ASM volatile ("qasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1618	return(result);
AnnaBridge	146:22da6e220af6	1619	}
AnnaBridge	146:22da6e220af6	1620
AnnaBridge	146:22da6e220af6	1621	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHASX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1622	{
AnnaBridge	146:22da6e220af6	1623	uint32_t result;
AnnaBridge	146:22da6e220af6	1624
AnnaBridge	146:22da6e220af6	1625	__ASM volatile ("shasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1626	return(result);
AnnaBridge	146:22da6e220af6	1627	}
AnnaBridge	146:22da6e220af6	1628
AnnaBridge	146:22da6e220af6	1629	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UASX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1630	{
AnnaBridge	146:22da6e220af6	1631	uint32_t result;
AnnaBridge	146:22da6e220af6	1632
AnnaBridge	146:22da6e220af6	1633	__ASM volatile ("uasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1634	return(result);
AnnaBridge	146:22da6e220af6	1635	}
AnnaBridge	146:22da6e220af6	1636
AnnaBridge	146:22da6e220af6	1637	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQASX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1638	{
AnnaBridge	146:22da6e220af6	1639	uint32_t result;
AnnaBridge	146:22da6e220af6	1640
AnnaBridge	146:22da6e220af6	1641	__ASM volatile ("uqasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1642	return(result);
AnnaBridge	146:22da6e220af6	1643	}
AnnaBridge	146:22da6e220af6	1644
AnnaBridge	146:22da6e220af6	1645	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHASX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1646	{
AnnaBridge	146:22da6e220af6	1647	uint32_t result;
AnnaBridge	146:22da6e220af6	1648
AnnaBridge	146:22da6e220af6	1649	__ASM volatile ("uhasx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1650	return(result);
AnnaBridge	146:22da6e220af6	1651	}
AnnaBridge	146:22da6e220af6	1652
AnnaBridge	146:22da6e220af6	1653	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SSAX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1654	{
AnnaBridge	146:22da6e220af6	1655	uint32_t result;
AnnaBridge	146:22da6e220af6	1656
AnnaBridge	146:22da6e220af6	1657	__ASM volatile ("ssax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1658	return(result);
AnnaBridge	146:22da6e220af6	1659	}
AnnaBridge	146:22da6e220af6	1660
AnnaBridge	146:22da6e220af6	1661	__attribute__((always_inline)) __STATIC_INLINE uint32_t __QSAX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1662	{
AnnaBridge	146:22da6e220af6	1663	uint32_t result;
AnnaBridge	146:22da6e220af6	1664
AnnaBridge	146:22da6e220af6	1665	__ASM volatile ("qsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1666	return(result);
AnnaBridge	146:22da6e220af6	1667	}
AnnaBridge	146:22da6e220af6	1668
AnnaBridge	146:22da6e220af6	1669	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1670	{
AnnaBridge	146:22da6e220af6	1671	uint32_t result;
AnnaBridge	146:22da6e220af6	1672
AnnaBridge	146:22da6e220af6	1673	__ASM volatile ("shsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1674	return(result);
AnnaBridge	146:22da6e220af6	1675	}
AnnaBridge	146:22da6e220af6	1676
AnnaBridge	146:22da6e220af6	1677	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1678	{
AnnaBridge	146:22da6e220af6	1679	uint32_t result;
AnnaBridge	146:22da6e220af6	1680
AnnaBridge	146:22da6e220af6	1681	__ASM volatile ("usax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1682	return(result);
AnnaBridge	146:22da6e220af6	1683	}
AnnaBridge	146:22da6e220af6	1684
AnnaBridge	146:22da6e220af6	1685	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UQSAX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1686	{
AnnaBridge	146:22da6e220af6	1687	uint32_t result;
AnnaBridge	146:22da6e220af6	1688
AnnaBridge	146:22da6e220af6	1689	__ASM volatile ("uqsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1690	return(result);
AnnaBridge	146:22da6e220af6	1691	}
AnnaBridge	146:22da6e220af6	1692
AnnaBridge	146:22da6e220af6	1693	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UHSAX(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1694	{
AnnaBridge	146:22da6e220af6	1695	uint32_t result;
AnnaBridge	146:22da6e220af6	1696
AnnaBridge	146:22da6e220af6	1697	__ASM volatile ("uhsax %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1698	return(result);
AnnaBridge	146:22da6e220af6	1699	}
AnnaBridge	146:22da6e220af6	1700
AnnaBridge	146:22da6e220af6	1701	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USAD8(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1702	{
AnnaBridge	146:22da6e220af6	1703	uint32_t result;
AnnaBridge	146:22da6e220af6	1704
AnnaBridge	146:22da6e220af6	1705	__ASM volatile ("usad8 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1706	return(result);
AnnaBridge	146:22da6e220af6	1707	}
AnnaBridge	146:22da6e220af6	1708
AnnaBridge	146:22da6e220af6	1709	__attribute__((always_inline)) __STATIC_INLINE uint32_t __USADA8(uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	146:22da6e220af6	1710	{
AnnaBridge	146:22da6e220af6	1711	uint32_t result;
AnnaBridge	146:22da6e220af6	1712
AnnaBridge	146:22da6e220af6	1713	__ASM volatile ("usada8 %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	146:22da6e220af6	1714	return(result);
AnnaBridge	146:22da6e220af6	1715	}
AnnaBridge	146:22da6e220af6	1716
AnnaBridge	146:22da6e220af6	1717	#define __SSAT16(ARG1,ARG2) \
AnnaBridge	146:22da6e220af6	1718	({ \
AnnaBridge	146:22da6e220af6	1719	int32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	146:22da6e220af6	1720	__ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	146:22da6e220af6	1721	__RES; \
AnnaBridge	146:22da6e220af6	1722	})
AnnaBridge	146:22da6e220af6	1723
AnnaBridge	146:22da6e220af6	1724	#define __USAT16(ARG1,ARG2) \
AnnaBridge	146:22da6e220af6	1725	({ \
AnnaBridge	146:22da6e220af6	1726	uint32_t __RES, __ARG1 = (ARG1); \
AnnaBridge	146:22da6e220af6	1727	__ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
AnnaBridge	146:22da6e220af6	1728	__RES; \
AnnaBridge	146:22da6e220af6	1729	})
AnnaBridge	146:22da6e220af6	1730
AnnaBridge	146:22da6e220af6	1731	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTB16(uint32_t op1)
AnnaBridge	146:22da6e220af6	1732	{
AnnaBridge	146:22da6e220af6	1733	uint32_t result;
AnnaBridge	146:22da6e220af6	1734
AnnaBridge	146:22da6e220af6	1735	__ASM volatile ("uxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	146:22da6e220af6	1736	return(result);
AnnaBridge	146:22da6e220af6	1737	}
AnnaBridge	146:22da6e220af6	1738
AnnaBridge	146:22da6e220af6	1739	__attribute__((always_inline)) __STATIC_INLINE uint32_t __UXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1740	{
AnnaBridge	146:22da6e220af6	1741	uint32_t result;
AnnaBridge	146:22da6e220af6	1742
AnnaBridge	146:22da6e220af6	1743	__ASM volatile ("uxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1744	return(result);
AnnaBridge	146:22da6e220af6	1745	}
AnnaBridge	146:22da6e220af6	1746
AnnaBridge	146:22da6e220af6	1747	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTB16(uint32_t op1)
AnnaBridge	146:22da6e220af6	1748	{
AnnaBridge	146:22da6e220af6	1749	uint32_t result;
AnnaBridge	146:22da6e220af6	1750
AnnaBridge	146:22da6e220af6	1751	__ASM volatile ("sxtb16 %0, %1" : "=r" (result) : "r" (op1));
AnnaBridge	146:22da6e220af6	1752	return(result);
AnnaBridge	146:22da6e220af6	1753	}
AnnaBridge	146:22da6e220af6	1754
AnnaBridge	146:22da6e220af6	1755	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1756	{
AnnaBridge	146:22da6e220af6	1757	uint32_t result;
AnnaBridge	146:22da6e220af6	1758
AnnaBridge	146:22da6e220af6	1759	__ASM volatile ("sxtab16 %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1760	return(result);
AnnaBridge	146:22da6e220af6	1761	}
AnnaBridge	146:22da6e220af6	1762
AnnaBridge	146:22da6e220af6	1763	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUAD (uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1764	{
AnnaBridge	146:22da6e220af6	1765	uint32_t result;
AnnaBridge	146:22da6e220af6	1766
AnnaBridge	146:22da6e220af6	1767	__ASM volatile ("smuad %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1768	return(result);
AnnaBridge	146:22da6e220af6	1769	}
AnnaBridge	146:22da6e220af6	1770
AnnaBridge	146:22da6e220af6	1771	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUADX (uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1772	{
AnnaBridge	146:22da6e220af6	1773	uint32_t result;
AnnaBridge	146:22da6e220af6	1774
AnnaBridge	146:22da6e220af6	1775	__ASM volatile ("smuadx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1776	return(result);
AnnaBridge	146:22da6e220af6	1777	}
AnnaBridge	146:22da6e220af6	1778
AnnaBridge	146:22da6e220af6	1779	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLAD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	146:22da6e220af6	1780	{
AnnaBridge	146:22da6e220af6	1781	uint32_t result;
AnnaBridge	146:22da6e220af6	1782
AnnaBridge	146:22da6e220af6	1783	__ASM volatile ("smlad %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	146:22da6e220af6	1784	return(result);
AnnaBridge	146:22da6e220af6	1785	}
AnnaBridge	146:22da6e220af6	1786
AnnaBridge	146:22da6e220af6	1787	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLADX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	146:22da6e220af6	1788	{
AnnaBridge	146:22da6e220af6	1789	uint32_t result;
AnnaBridge	146:22da6e220af6	1790
AnnaBridge	146:22da6e220af6	1791	__ASM volatile ("smladx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	146:22da6e220af6	1792	return(result);
AnnaBridge	146:22da6e220af6	1793	}
AnnaBridge	146:22da6e220af6	1794
AnnaBridge	146:22da6e220af6	1795	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	146:22da6e220af6	1796	{
AnnaBridge	146:22da6e220af6	1797	union llreg_u{
AnnaBridge	146:22da6e220af6	1798	uint32_t w32[2];
AnnaBridge	146:22da6e220af6	1799	uint64_t w64;
AnnaBridge	146:22da6e220af6	1800	} llr;
AnnaBridge	146:22da6e220af6	1801	llr.w64 = acc;
AnnaBridge	146:22da6e220af6	1802
AnnaBridge	146:22da6e220af6	1803	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	146:22da6e220af6	1804	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	146:22da6e220af6	1805	#else /* Big endian */
AnnaBridge	146:22da6e220af6	1806	__ASM volatile ("smlald %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	146:22da6e220af6	1807	#endif
AnnaBridge	146:22da6e220af6	1808
AnnaBridge	146:22da6e220af6	1809	return(llr.w64);
AnnaBridge	146:22da6e220af6	1810	}
AnnaBridge	146:22da6e220af6	1811
AnnaBridge	146:22da6e220af6	1812	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLALDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	146:22da6e220af6	1813	{
AnnaBridge	146:22da6e220af6	1814	union llreg_u{
AnnaBridge	146:22da6e220af6	1815	uint32_t w32[2];
AnnaBridge	146:22da6e220af6	1816	uint64_t w64;
AnnaBridge	146:22da6e220af6	1817	} llr;
AnnaBridge	146:22da6e220af6	1818	llr.w64 = acc;
AnnaBridge	146:22da6e220af6	1819
AnnaBridge	146:22da6e220af6	1820	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	146:22da6e220af6	1821	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	146:22da6e220af6	1822	#else /* Big endian */
AnnaBridge	146:22da6e220af6	1823	__ASM volatile ("smlaldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	146:22da6e220af6	1824	#endif
AnnaBridge	146:22da6e220af6	1825
AnnaBridge	146:22da6e220af6	1826	return(llr.w64);
AnnaBridge	146:22da6e220af6	1827	}
AnnaBridge	146:22da6e220af6	1828
AnnaBridge	146:22da6e220af6	1829	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSD (uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1830	{
AnnaBridge	146:22da6e220af6	1831	uint32_t result;
AnnaBridge	146:22da6e220af6	1832
AnnaBridge	146:22da6e220af6	1833	__ASM volatile ("smusd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1834	return(result);
AnnaBridge	146:22da6e220af6	1835	}
AnnaBridge	146:22da6e220af6	1836
AnnaBridge	146:22da6e220af6	1837	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMUSDX (uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1838	{
AnnaBridge	146:22da6e220af6	1839	uint32_t result;
AnnaBridge	146:22da6e220af6	1840
AnnaBridge	146:22da6e220af6	1841	__ASM volatile ("smusdx %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1842	return(result);
AnnaBridge	146:22da6e220af6	1843	}
AnnaBridge	146:22da6e220af6	1844
AnnaBridge	146:22da6e220af6	1845	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSD (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	146:22da6e220af6	1846	{
AnnaBridge	146:22da6e220af6	1847	uint32_t result;
AnnaBridge	146:22da6e220af6	1848
AnnaBridge	146:22da6e220af6	1849	__ASM volatile ("smlsd %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	146:22da6e220af6	1850	return(result);
AnnaBridge	146:22da6e220af6	1851	}
AnnaBridge	146:22da6e220af6	1852
AnnaBridge	146:22da6e220af6	1853	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SMLSDX (uint32_t op1, uint32_t op2, uint32_t op3)
AnnaBridge	146:22da6e220af6	1854	{
AnnaBridge	146:22da6e220af6	1855	uint32_t result;
AnnaBridge	146:22da6e220af6	1856
AnnaBridge	146:22da6e220af6	1857	__ASM volatile ("smlsdx %0, %1, %2, %3" : "=r" (result) : "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	146:22da6e220af6	1858	return(result);
AnnaBridge	146:22da6e220af6	1859	}
AnnaBridge	146:22da6e220af6	1860
AnnaBridge	146:22da6e220af6	1861	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLD (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	146:22da6e220af6	1862	{
AnnaBridge	146:22da6e220af6	1863	union llreg_u{
AnnaBridge	146:22da6e220af6	1864	uint32_t w32[2];
AnnaBridge	146:22da6e220af6	1865	uint64_t w64;
AnnaBridge	146:22da6e220af6	1866	} llr;
AnnaBridge	146:22da6e220af6	1867	llr.w64 = acc;
AnnaBridge	146:22da6e220af6	1868
AnnaBridge	146:22da6e220af6	1869	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	146:22da6e220af6	1870	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	146:22da6e220af6	1871	#else /* Big endian */
AnnaBridge	146:22da6e220af6	1872	__ASM volatile ("smlsld %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	146:22da6e220af6	1873	#endif
AnnaBridge	146:22da6e220af6	1874
AnnaBridge	146:22da6e220af6	1875	return(llr.w64);
AnnaBridge	146:22da6e220af6	1876	}
AnnaBridge	146:22da6e220af6	1877
AnnaBridge	146:22da6e220af6	1878	__attribute__((always_inline)) __STATIC_INLINE uint64_t __SMLSLDX (uint32_t op1, uint32_t op2, uint64_t acc)
AnnaBridge	146:22da6e220af6	1879	{
AnnaBridge	146:22da6e220af6	1880	union llreg_u{
AnnaBridge	146:22da6e220af6	1881	uint32_t w32[2];
AnnaBridge	146:22da6e220af6	1882	uint64_t w64;
AnnaBridge	146:22da6e220af6	1883	} llr;
AnnaBridge	146:22da6e220af6	1884	llr.w64 = acc;
AnnaBridge	146:22da6e220af6	1885
AnnaBridge	146:22da6e220af6	1886	#ifndef __ARMEB__ /* Little endian */
AnnaBridge	146:22da6e220af6	1887	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[0]), "=r" (llr.w32[1]): "r" (op1), "r" (op2) , "0" (llr.w32[0]), "1" (llr.w32[1]) );
AnnaBridge	146:22da6e220af6	1888	#else /* Big endian */
AnnaBridge	146:22da6e220af6	1889	__ASM volatile ("smlsldx %0, %1, %2, %3" : "=r" (llr.w32[1]), "=r" (llr.w32[0]): "r" (op1), "r" (op2) , "0" (llr.w32[1]), "1" (llr.w32[0]) );
AnnaBridge	146:22da6e220af6	1890	#endif
AnnaBridge	146:22da6e220af6	1891
AnnaBridge	146:22da6e220af6	1892	return(llr.w64);
AnnaBridge	146:22da6e220af6	1893	}
AnnaBridge	146:22da6e220af6	1894
AnnaBridge	146:22da6e220af6	1895	__attribute__((always_inline)) __STATIC_INLINE uint32_t __SEL (uint32_t op1, uint32_t op2)
AnnaBridge	146:22da6e220af6	1896	{
AnnaBridge	146:22da6e220af6	1897	uint32_t result;
AnnaBridge	146:22da6e220af6	1898
AnnaBridge	146:22da6e220af6	1899	__ASM volatile ("sel %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1900	return(result);
AnnaBridge	146:22da6e220af6	1901	}
AnnaBridge	146:22da6e220af6	1902
AnnaBridge	146:22da6e220af6	1903	__attribute__((always_inline)) __STATIC_INLINE int32_t __QADD( int32_t op1, int32_t op2)
AnnaBridge	146:22da6e220af6	1904	{
AnnaBridge	146:22da6e220af6	1905	int32_t result;
AnnaBridge	146:22da6e220af6	1906
AnnaBridge	146:22da6e220af6	1907	__ASM volatile ("qadd %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1908	return(result);
AnnaBridge	146:22da6e220af6	1909	}
AnnaBridge	146:22da6e220af6	1910
AnnaBridge	146:22da6e220af6	1911	__attribute__((always_inline)) __STATIC_INLINE int32_t __QSUB( int32_t op1, int32_t op2)
AnnaBridge	146:22da6e220af6	1912	{
AnnaBridge	146:22da6e220af6	1913	int32_t result;
AnnaBridge	146:22da6e220af6	1914
AnnaBridge	146:22da6e220af6	1915	__ASM volatile ("qsub %0, %1, %2" : "=r" (result) : "r" (op1), "r" (op2) );
AnnaBridge	146:22da6e220af6	1916	return(result);
AnnaBridge	146:22da6e220af6	1917	}
AnnaBridge	146:22da6e220af6	1918
AnnaBridge	146:22da6e220af6	1919	#if 0
AnnaBridge	146:22da6e220af6	1920	#define __PKHBT(ARG1,ARG2,ARG3) \
AnnaBridge	146:22da6e220af6	1921	({ \
AnnaBridge	146:22da6e220af6	1922	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	146:22da6e220af6	1923	__ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	146:22da6e220af6	1924	__RES; \
AnnaBridge	146:22da6e220af6	1925	})
AnnaBridge	146:22da6e220af6	1926
AnnaBridge	146:22da6e220af6	1927	#define __PKHTB(ARG1,ARG2,ARG3) \
AnnaBridge	146:22da6e220af6	1928	({ \
AnnaBridge	146:22da6e220af6	1929	uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
AnnaBridge	146:22da6e220af6	1930	if (ARG3 == 0) \
AnnaBridge	146:22da6e220af6	1931	__ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
AnnaBridge	146:22da6e220af6	1932	else \
AnnaBridge	146:22da6e220af6	1933	__ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
AnnaBridge	146:22da6e220af6	1934	__RES; \
AnnaBridge	146:22da6e220af6	1935	})
AnnaBridge	146:22da6e220af6	1936	#endif
AnnaBridge	146:22da6e220af6	1937
AnnaBridge	146:22da6e220af6	1938	#define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) \| \
AnnaBridge	146:22da6e220af6	1939	((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
AnnaBridge	146:22da6e220af6	1940
AnnaBridge	146:22da6e220af6	1941	#define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) \| \
AnnaBridge	146:22da6e220af6	1942	((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
AnnaBridge	146:22da6e220af6	1943
AnnaBridge	146:22da6e220af6	1944	__attribute__((always_inline)) __STATIC_INLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
AnnaBridge	146:22da6e220af6	1945	{
AnnaBridge	146:22da6e220af6	1946	int32_t result;
AnnaBridge	146:22da6e220af6	1947
AnnaBridge	146:22da6e220af6	1948	__ASM volatile ("smmla %0, %1, %2, %3" : "=r" (result): "r" (op1), "r" (op2), "r" (op3) );
AnnaBridge	146:22da6e220af6	1949	return(result);
AnnaBridge	146:22da6e220af6	1950	}
AnnaBridge	146:22da6e220af6	1951
AnnaBridge	146:22da6e220af6	1952	#endif /* (__ARM_FEATURE_DSP == 1) */
AnnaBridge	146:22da6e220af6	1953	/@} end of group CMSIS_SIMD_intrinsics /
AnnaBridge	146:22da6e220af6	1954
AnnaBridge	146:22da6e220af6	1955
AnnaBridge	146:22da6e220af6	1956	#pragma GCC diagnostic pop
AnnaBridge	146:22da6e220af6	1957
AnnaBridge	146:22da6e220af6	1958	#endif /* __CMSIS_GCC_H */