mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_DISCO_F413ZH/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_nand.h@146:22da6e220af6, 2017-07-06 (annotated)

Committer:
AnnaBridge
Date:
Thu Jul 06 15:30:22 2017 +0100
Revision:
146:22da6e220af6
Child:
163:e59c8e839560
Release 146 of the mbed library.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 146:22da6e220af6 1 /**
AnnaBridge 146:22da6e220af6 2 ******************************************************************************
AnnaBridge 146:22da6e220af6 3 * @file stm32f4xx_hal_nand.h
AnnaBridge 146:22da6e220af6 4 * @author MCD Application Team
AnnaBridge 146:22da6e220af6 5 * @version V1.7.1
AnnaBridge 146:22da6e220af6 6 * @date 14-April-2017
AnnaBridge 146:22da6e220af6 7 * @brief Header file of NAND HAL module.
AnnaBridge 146:22da6e220af6 8 ******************************************************************************
AnnaBridge 146:22da6e220af6 9 * @attention
AnnaBridge 146:22da6e220af6 10 *
AnnaBridge 146:22da6e220af6 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 146:22da6e220af6 12 *
AnnaBridge 146:22da6e220af6 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 146:22da6e220af6 14 * are permitted provided that the following conditions are met:
AnnaBridge 146:22da6e220af6 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 146:22da6e220af6 16 * this list of conditions and the following disclaimer.
AnnaBridge 146:22da6e220af6 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 146:22da6e220af6 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 146:22da6e220af6 19 * and/or other materials provided with the distribution.
AnnaBridge 146:22da6e220af6 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 146:22da6e220af6 21 * may be used to endorse or promote products derived from this software
AnnaBridge 146:22da6e220af6 22 * without specific prior written permission.
AnnaBridge 146:22da6e220af6 23 *
AnnaBridge 146:22da6e220af6 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 146:22da6e220af6 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 146:22da6e220af6 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 146:22da6e220af6 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 146:22da6e220af6 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 146:22da6e220af6 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 146:22da6e220af6 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 146:22da6e220af6 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 146:22da6e220af6 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 146:22da6e220af6 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 146:22da6e220af6 34 *
AnnaBridge 146:22da6e220af6 35 ******************************************************************************
AnnaBridge 146:22da6e220af6 36 */
AnnaBridge 146:22da6e220af6 37
AnnaBridge 146:22da6e220af6 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 146:22da6e220af6 39 #ifndef __STM32F4xx_HAL_NAND_H
AnnaBridge 146:22da6e220af6 40 #define __STM32F4xx_HAL_NAND_H
AnnaBridge 146:22da6e220af6 41
AnnaBridge 146:22da6e220af6 42 #ifdef __cplusplus
AnnaBridge 146:22da6e220af6 43 extern "C" {
AnnaBridge 146:22da6e220af6 44 #endif
AnnaBridge 146:22da6e220af6 45
AnnaBridge 146:22da6e220af6 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx)
AnnaBridge 146:22da6e220af6 48 #include "stm32f4xx_ll_fsmc.h"
AnnaBridge 146:22da6e220af6 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
AnnaBridge 146:22da6e220af6 50
AnnaBridge 146:22da6e220af6 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) ||\
AnnaBridge 146:22da6e220af6 52 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 146:22da6e220af6 53 #include "stm32f4xx_ll_fmc.h"
AnnaBridge 146:22da6e220af6 54 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx ||\
AnnaBridge 146:22da6e220af6 55 STM32F479xx */
AnnaBridge 146:22da6e220af6 56
AnnaBridge 146:22da6e220af6 57 /** @addtogroup STM32F4xx_HAL_Driver
AnnaBridge 146:22da6e220af6 58 * @{
AnnaBridge 146:22da6e220af6 59 */
AnnaBridge 146:22da6e220af6 60
AnnaBridge 146:22da6e220af6 61 /** @addtogroup NAND
AnnaBridge 146:22da6e220af6 62 * @{
AnnaBridge 146:22da6e220af6 63 */
AnnaBridge 146:22da6e220af6 64
AnnaBridge 146:22da6e220af6 65 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
AnnaBridge 146:22da6e220af6 66 defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
AnnaBridge 146:22da6e220af6 67 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx)
AnnaBridge 146:22da6e220af6 68
AnnaBridge 146:22da6e220af6 69 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 70 /* Exported types ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 71 /** @defgroup NAND_Exported_Types NAND Exported Types
AnnaBridge 146:22da6e220af6 72 * @{
AnnaBridge 146:22da6e220af6 73 */
AnnaBridge 146:22da6e220af6 74
AnnaBridge 146:22da6e220af6 75 /**
AnnaBridge 146:22da6e220af6 76 * @brief HAL NAND State structures definition
AnnaBridge 146:22da6e220af6 77 */
AnnaBridge 146:22da6e220af6 78 typedef enum
AnnaBridge 146:22da6e220af6 79 {
AnnaBridge 146:22da6e220af6 80 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
AnnaBridge 146:22da6e220af6 81 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
AnnaBridge 146:22da6e220af6 82 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
AnnaBridge 146:22da6e220af6 83 HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
AnnaBridge 146:22da6e220af6 84 }HAL_NAND_StateTypeDef;
AnnaBridge 146:22da6e220af6 85
AnnaBridge 146:22da6e220af6 86 /**
AnnaBridge 146:22da6e220af6 87 * @brief NAND Memory electronic signature Structure definition
AnnaBridge 146:22da6e220af6 88 */
AnnaBridge 146:22da6e220af6 89 typedef struct
AnnaBridge 146:22da6e220af6 90 {
AnnaBridge 146:22da6e220af6 91 /*<! NAND memory electronic signature maker and device IDs */
AnnaBridge 146:22da6e220af6 92
AnnaBridge 146:22da6e220af6 93 uint8_t Maker_Id;
AnnaBridge 146:22da6e220af6 94
AnnaBridge 146:22da6e220af6 95 uint8_t Device_Id;
AnnaBridge 146:22da6e220af6 96
AnnaBridge 146:22da6e220af6 97 uint8_t Third_Id;
AnnaBridge 146:22da6e220af6 98
AnnaBridge 146:22da6e220af6 99 uint8_t Fourth_Id;
AnnaBridge 146:22da6e220af6 100 }NAND_IDTypeDef;
AnnaBridge 146:22da6e220af6 101
AnnaBridge 146:22da6e220af6 102 /**
AnnaBridge 146:22da6e220af6 103 * @brief NAND Memory address Structure definition
AnnaBridge 146:22da6e220af6 104 */
AnnaBridge 146:22da6e220af6 105 typedef struct
AnnaBridge 146:22da6e220af6 106 {
AnnaBridge 146:22da6e220af6 107 uint16_t Page; /*!< NAND memory Page address */
AnnaBridge 146:22da6e220af6 108
AnnaBridge 146:22da6e220af6 109 uint16_t Plane; /*!< NAND memory Plane address */
AnnaBridge 146:22da6e220af6 110
AnnaBridge 146:22da6e220af6 111 uint16_t Block; /*!< NAND memory Block address */
AnnaBridge 146:22da6e220af6 112
AnnaBridge 146:22da6e220af6 113 }NAND_AddressTypeDef;
AnnaBridge 146:22da6e220af6 114
AnnaBridge 146:22da6e220af6 115 /**
AnnaBridge 146:22da6e220af6 116 * @brief NAND Memory info Structure definition
AnnaBridge 146:22da6e220af6 117 */
AnnaBridge 146:22da6e220af6 118 typedef struct
AnnaBridge 146:22da6e220af6 119 {
AnnaBridge 146:22da6e220af6 120 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
AnnaBridge 146:22da6e220af6 121 for 8 bits adressing or words for 16 bits addressing */
AnnaBridge 146:22da6e220af6 122
AnnaBridge 146:22da6e220af6 123 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
AnnaBridge 146:22da6e220af6 124 for 8 bits adressing or words for 16 bits addressing */
AnnaBridge 146:22da6e220af6 125
AnnaBridge 146:22da6e220af6 126 uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */
AnnaBridge 146:22da6e220af6 127
AnnaBridge 146:22da6e220af6 128 uint32_t BlockNbr; /*!< NAND memory number of total blocks */
AnnaBridge 146:22da6e220af6 129
AnnaBridge 146:22da6e220af6 130 uint32_t PlaneNbr; /*!< NAND memory number of planes */
AnnaBridge 146:22da6e220af6 131
AnnaBridge 146:22da6e220af6 132 uint32_t PlaneSize; /*!< NAND memory plane size measured in number of blocks */
AnnaBridge 146:22da6e220af6 133
AnnaBridge 146:22da6e220af6 134 FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
AnnaBridge 146:22da6e220af6 135 parameter is mandatory for some NAND parts after the read
AnnaBridge 146:22da6e220af6 136 command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
AnnaBridge 146:22da6e220af6 137 Example: Toshiba THTH58BYG3S0HBAI6.
AnnaBridge 146:22da6e220af6 138 This parameter could be ENABLE or DISABLE
AnnaBridge 146:22da6e220af6 139 Please check the Read Mode sequnece in the NAND device datasheet */
AnnaBridge 146:22da6e220af6 140 }NAND_DeviceConfigTypeDef;
AnnaBridge 146:22da6e220af6 141
AnnaBridge 146:22da6e220af6 142 /**
AnnaBridge 146:22da6e220af6 143 * @brief NAND handle Structure definition
AnnaBridge 146:22da6e220af6 144 */
AnnaBridge 146:22da6e220af6 145 typedef struct
AnnaBridge 146:22da6e220af6 146 {
AnnaBridge 146:22da6e220af6 147 FMC_NAND_TypeDef *Instance; /*!< Register base address */
AnnaBridge 146:22da6e220af6 148
AnnaBridge 146:22da6e220af6 149 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
AnnaBridge 146:22da6e220af6 150
AnnaBridge 146:22da6e220af6 151 HAL_LockTypeDef Lock; /*!< NAND locking object */
AnnaBridge 146:22da6e220af6 152
AnnaBridge 146:22da6e220af6 153 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
AnnaBridge 146:22da6e220af6 154
AnnaBridge 146:22da6e220af6 155 NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
AnnaBridge 146:22da6e220af6 156
AnnaBridge 146:22da6e220af6 157 }NAND_HandleTypeDef;
AnnaBridge 146:22da6e220af6 158 /**
AnnaBridge 146:22da6e220af6 159 * @}
AnnaBridge 146:22da6e220af6 160 */
AnnaBridge 146:22da6e220af6 161
AnnaBridge 146:22da6e220af6 162 /* Exported constants --------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 163 /* Exported macros ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 164 /** @defgroup NAND_Exported_Macros NAND Exported Macros
AnnaBridge 146:22da6e220af6 165 * @{
AnnaBridge 146:22da6e220af6 166 */
AnnaBridge 146:22da6e220af6 167
AnnaBridge 146:22da6e220af6 168 /** @brief Reset NAND handle state
AnnaBridge 146:22da6e220af6 169 * @param __HANDLE__: specifies the NAND handle.
AnnaBridge 146:22da6e220af6 170 * @retval None
AnnaBridge 146:22da6e220af6 171 */
AnnaBridge 146:22da6e220af6 172 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
AnnaBridge 146:22da6e220af6 173
AnnaBridge 146:22da6e220af6 174 /**
AnnaBridge 146:22da6e220af6 175 * @}
AnnaBridge 146:22da6e220af6 176 */
AnnaBridge 146:22da6e220af6 177
AnnaBridge 146:22da6e220af6 178 /* Exported functions --------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 179 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
AnnaBridge 146:22da6e220af6 180 * @{
AnnaBridge 146:22da6e220af6 181 */
AnnaBridge 146:22da6e220af6 182
AnnaBridge 146:22da6e220af6 183 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 146:22da6e220af6 184 * @{
AnnaBridge 146:22da6e220af6 185 */
AnnaBridge 146:22da6e220af6 186
AnnaBridge 146:22da6e220af6 187 /* Initialization/de-initialization functions ********************************/
AnnaBridge 146:22da6e220af6 188 /* Initialization/de-initialization functions ********************************/
AnnaBridge 146:22da6e220af6 189 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
AnnaBridge 146:22da6e220af6 190 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 191
AnnaBridge 146:22da6e220af6 192 HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
AnnaBridge 146:22da6e220af6 193
AnnaBridge 146:22da6e220af6 194 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
AnnaBridge 146:22da6e220af6 195
AnnaBridge 146:22da6e220af6 196 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 197 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 198 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 199 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 200
AnnaBridge 146:22da6e220af6 201 /**
AnnaBridge 146:22da6e220af6 202 * @}
AnnaBridge 146:22da6e220af6 203 */
AnnaBridge 146:22da6e220af6 204
AnnaBridge 146:22da6e220af6 205 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
AnnaBridge 146:22da6e220af6 206 * @{
AnnaBridge 146:22da6e220af6 207 */
AnnaBridge 146:22da6e220af6 208
AnnaBridge 146:22da6e220af6 209 /* IO operation functions ****************************************************/
AnnaBridge 146:22da6e220af6 210 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 211
AnnaBridge 146:22da6e220af6 212 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 146:22da6e220af6 213 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 146:22da6e220af6 214 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 146:22da6e220af6 215 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 146:22da6e220af6 216
AnnaBridge 146:22da6e220af6 217 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 146:22da6e220af6 218 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 146:22da6e220af6 219 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 146:22da6e220af6 220 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 146:22da6e220af6 221
AnnaBridge 146:22da6e220af6 222 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 146:22da6e220af6 223
AnnaBridge 146:22da6e220af6 224 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 225 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 146:22da6e220af6 226
AnnaBridge 146:22da6e220af6 227 /**
AnnaBridge 146:22da6e220af6 228 * @}
AnnaBridge 146:22da6e220af6 229 */
AnnaBridge 146:22da6e220af6 230
AnnaBridge 146:22da6e220af6 231 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 146:22da6e220af6 232 * @{
AnnaBridge 146:22da6e220af6 233 */
AnnaBridge 146:22da6e220af6 234
AnnaBridge 146:22da6e220af6 235 /* NAND Control functions ****************************************************/
AnnaBridge 146:22da6e220af6 236 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 237 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 238 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
AnnaBridge 146:22da6e220af6 239
AnnaBridge 146:22da6e220af6 240 /**
AnnaBridge 146:22da6e220af6 241 * @}
AnnaBridge 146:22da6e220af6 242 */
AnnaBridge 146:22da6e220af6 243
AnnaBridge 146:22da6e220af6 244 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 146:22da6e220af6 245 * @{
AnnaBridge 146:22da6e220af6 246 */
AnnaBridge 146:22da6e220af6 247 /* NAND State functions *******************************************************/
AnnaBridge 146:22da6e220af6 248 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
AnnaBridge 146:22da6e220af6 249 /**
AnnaBridge 146:22da6e220af6 250 * @}
AnnaBridge 146:22da6e220af6 251 */
AnnaBridge 146:22da6e220af6 252
AnnaBridge 146:22da6e220af6 253 /**
AnnaBridge 146:22da6e220af6 254 * @}
AnnaBridge 146:22da6e220af6 255 */
AnnaBridge 146:22da6e220af6 256
AnnaBridge 146:22da6e220af6 257 /* Private types -------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 258 /* Private variables ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 259 /* Private constants ---------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 260 /** @defgroup NAND_Private_Constants NAND Private Constants
AnnaBridge 146:22da6e220af6 261 * @{
AnnaBridge 146:22da6e220af6 262 */
AnnaBridge 146:22da6e220af6 263 #define NAND_DEVICE1 0x70000000U
AnnaBridge 146:22da6e220af6 264 #define NAND_DEVICE2 0x80000000U
AnnaBridge 146:22da6e220af6 265 #define NAND_WRITE_TIMEOUT 0x01000000U
AnnaBridge 146:22da6e220af6 266
AnnaBridge 146:22da6e220af6 267 #define CMD_AREA ((uint32_t)(1U<<16U)) /* A16 = CLE high */
AnnaBridge 146:22da6e220af6 268 #define ADDR_AREA ((uint32_t)(1U<<17U)) /* A17 = ALE high */
AnnaBridge 146:22da6e220af6 269
AnnaBridge 146:22da6e220af6 270 #define NAND_CMD_AREA_A ((uint8_t)0x00)
AnnaBridge 146:22da6e220af6 271 #define NAND_CMD_AREA_B ((uint8_t)0x01)
AnnaBridge 146:22da6e220af6 272 #define NAND_CMD_AREA_C ((uint8_t)0x50)
AnnaBridge 146:22da6e220af6 273 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30)
AnnaBridge 146:22da6e220af6 274
AnnaBridge 146:22da6e220af6 275 #define NAND_CMD_WRITE0 ((uint8_t)0x80)
AnnaBridge 146:22da6e220af6 276 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10)
AnnaBridge 146:22da6e220af6 277 #define NAND_CMD_ERASE0 ((uint8_t)0x60)
AnnaBridge 146:22da6e220af6 278 #define NAND_CMD_ERASE1 ((uint8_t)0xD0)
AnnaBridge 146:22da6e220af6 279 #define NAND_CMD_READID ((uint8_t)0x90)
AnnaBridge 146:22da6e220af6 280 #define NAND_CMD_STATUS ((uint8_t)0x70)
AnnaBridge 146:22da6e220af6 281 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A)
AnnaBridge 146:22da6e220af6 282 #define NAND_CMD_RESET ((uint8_t)0xFF)
AnnaBridge 146:22da6e220af6 283
AnnaBridge 146:22da6e220af6 284 /* NAND memory status */
AnnaBridge 146:22da6e220af6 285 #define NAND_VALID_ADDRESS 0x00000100U
AnnaBridge 146:22da6e220af6 286 #define NAND_INVALID_ADDRESS 0x00000200U
AnnaBridge 146:22da6e220af6 287 #define NAND_TIMEOUT_ERROR 0x00000400U
AnnaBridge 146:22da6e220af6 288 #define NAND_BUSY 0x00000000U
AnnaBridge 146:22da6e220af6 289 #define NAND_ERROR 0x00000001U
AnnaBridge 146:22da6e220af6 290 #define NAND_READY 0x00000040U
AnnaBridge 146:22da6e220af6 291 /**
AnnaBridge 146:22da6e220af6 292 * @}
AnnaBridge 146:22da6e220af6 293 */
AnnaBridge 146:22da6e220af6 294
AnnaBridge 146:22da6e220af6 295 /* Private macros ------------------------------------------------------------*/
AnnaBridge 146:22da6e220af6 296 /** @defgroup NAND_Private_Macros NAND Private Macros
AnnaBridge 146:22da6e220af6 297 * @{
AnnaBridge 146:22da6e220af6 298 */
AnnaBridge 146:22da6e220af6 299
AnnaBridge 146:22da6e220af6 300 /**
AnnaBridge 146:22da6e220af6 301 * @brief NAND memory address computation.
AnnaBridge 146:22da6e220af6 302 * @param __ADDRESS__: NAND memory address.
AnnaBridge 146:22da6e220af6 303 * @param __HANDLE__: NAND handle.
AnnaBridge 146:22da6e220af6 304 * @retval NAND Raw address value
AnnaBridge 146:22da6e220af6 305 */
AnnaBridge 146:22da6e220af6 306 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
AnnaBridge 146:22da6e220af6 307 (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize)))
AnnaBridge 146:22da6e220af6 308
AnnaBridge 146:22da6e220af6 309 /**
AnnaBridge 146:22da6e220af6 310 * @brief NAND memory Column address computation.
AnnaBridge 146:22da6e220af6 311 * @param __HANDLE__: NAND handle.
AnnaBridge 146:22da6e220af6 312 * @retval NAND Raw address value
AnnaBridge 146:22da6e220af6 313 */
AnnaBridge 146:22da6e220af6 314 #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
AnnaBridge 146:22da6e220af6 315
AnnaBridge 146:22da6e220af6 316 /**
AnnaBridge 146:22da6e220af6 317 * @brief NAND memory address cycling.
AnnaBridge 146:22da6e220af6 318 * @param __ADDRESS__: NAND memory address.
AnnaBridge 146:22da6e220af6 319 * @retval NAND address cycling value.
AnnaBridge 146:22da6e220af6 320 */
AnnaBridge 146:22da6e220af6 321 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
AnnaBridge 146:22da6e220af6 322 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
AnnaBridge 146:22da6e220af6 323 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
AnnaBridge 146:22da6e220af6 324 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
AnnaBridge 146:22da6e220af6 325
AnnaBridge 146:22da6e220af6 326 /**
AnnaBridge 146:22da6e220af6 327 * @brief NAND memory Columns cycling.
AnnaBridge 146:22da6e220af6 328 * @param __ADDRESS__: NAND memory address.
AnnaBridge 146:22da6e220af6 329 * @retval NAND Column address cycling value.
AnnaBridge 146:22da6e220af6 330 */
AnnaBridge 146:22da6e220af6 331 #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
AnnaBridge 146:22da6e220af6 332 #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
AnnaBridge 146:22da6e220af6 333
AnnaBridge 146:22da6e220af6 334 /**
AnnaBridge 146:22da6e220af6 335 * @}
AnnaBridge 146:22da6e220af6 336 */
AnnaBridge 146:22da6e220af6 337 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx ||\
AnnaBridge 146:22da6e220af6 338 STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||\
AnnaBridge 146:22da6e220af6 339 STM32F446xx || STM32F469xx || STM32F479xx */
AnnaBridge 146:22da6e220af6 340
AnnaBridge 146:22da6e220af6 341 /**
AnnaBridge 146:22da6e220af6 342 * @}
AnnaBridge 146:22da6e220af6 343 */
AnnaBridge 146:22da6e220af6 344 /**
AnnaBridge 146:22da6e220af6 345 * @}
AnnaBridge 146:22da6e220af6 346 */
AnnaBridge 146:22da6e220af6 347
AnnaBridge 146:22da6e220af6 348 /**
AnnaBridge 146:22da6e220af6 349 * @}
AnnaBridge 146:22da6e220af6 350 */
AnnaBridge 146:22da6e220af6 351
AnnaBridge 146:22da6e220af6 352 #ifdef __cplusplus
AnnaBridge 146:22da6e220af6 353 }
AnnaBridge 146:22da6e220af6 354 #endif
AnnaBridge 146:22da6e220af6 355
AnnaBridge 146:22da6e220af6 356 #endif /* __STM32F4xx_HAL_NAND_H */
AnnaBridge 146:22da6e220af6 357
AnnaBridge 146:22da6e220af6 358 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/