mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F756ZG/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_eth.h@138:093f2bd7b9eb, 2017-03-14 (annotated)

Committer:
<>
Date:
Tue Mar 14 16:20:51 2017 +0000
Revision:
138:093f2bd7b9eb
Parent:
135:176b8275d35d
Child:
139:856d2700e60b
Release 138 of the mbed library



Ports for Upcoming Targets





Fixes and Changes



3716: fix for issue #3715: correction in startup files for ARM and IAR, alignment of system_stm32f429xx.c files https://github.com/ARMmbed/mbed-os/pull/3716

3741: STM32 remove warning in hal_tick_32b.c file https://github.com/ARMmbed/mbed-os/pull/3741

3780: STM32L4 : Fix GPIO G port compatibility https://github.com/ARMmbed/mbed-os/pull/3780

3831: NCS36510: SPISLAVE enabled (Conflict resolved) https://github.com/ARMmbed/mbed-os/pull/3831

3836: Allow to redefine nRF's PSTORAGE_NUM_OF_PAGES outside of the mbed-os https://github.com/ARMmbed/mbed-os/pull/3836

3840: STM32: gpio SPEED - always set High Speed by default https://github.com/ARMmbed/mbed-os/pull/3840

3844: STM32 GPIO: Typo correction. Update comment (GPIO_IP_WITHOUT_BRR) https://github.com/ARMmbed/mbed-os/pull/3844

3850: STM32: change spi error to debug warning https://github.com/ARMmbed/mbed-os/pull/3850

3860: Define GPIO_IP_WITHOUT_BRR for xDot platform https://github.com/ARMmbed/mbed-os/pull/3860

3880: DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated https://github.com/ARMmbed/mbed-os/pull/3880

3795: Fix pwm period calc https://github.com/ARMmbed/mbed-os/pull/3795

3828: STM32 CAN API: correct format and type https://github.com/ARMmbed/mbed-os/pull/3828

3842: TARGET_NRF: corrected spi_init() to properly handle re-initialization https://github.com/ARMmbed/mbed-os/pull/3842

3843: STM32L476xG: set APB2 clock to 80MHz (instead of 40MHz) https://github.com/ARMmbed/mbed-os/pull/3843

3879: NUCLEO_F446ZE: Add missing AnalogIn pins on PF_3, PF_5 and PF_10. https://github.com/ARMmbed/mbed-os/pull/3879

3902: Fix heap and stack size for NUCLEO_F746ZG https://github.com/ARMmbed/mbed-os/pull/3902

3829: can_write(): return error code when no tx mailboxes are available https://github.com/ARMmbed/mbed-os/pull/3829

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 122:f9eeca106725 1 /**
Kojto 122:f9eeca106725 2 ******************************************************************************
Kojto 122:f9eeca106725 3 * @file stm32f7xx_hal_eth.h
Kojto 122:f9eeca106725 4 * @author MCD Application Team
<> 135:176b8275d35d 5 * @version V1.1.2
<> 135:176b8275d35d 6 * @date 23-September-2016
Kojto 122:f9eeca106725 7 * @brief Header file of ETH HAL module.
Kojto 122:f9eeca106725 8 ******************************************************************************
Kojto 122:f9eeca106725 9 * @attention
Kojto 122:f9eeca106725 10 *
Kojto 122:f9eeca106725 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto 122:f9eeca106725 12 *
Kojto 122:f9eeca106725 13 * Redistribution and use in source and binary forms, with or without modification,
Kojto 122:f9eeca106725 14 * are permitted provided that the following conditions are met:
Kojto 122:f9eeca106725 15 * 1. Redistributions of source code must retain the above copyright notice,
Kojto 122:f9eeca106725 16 * this list of conditions and the following disclaimer.
Kojto 122:f9eeca106725 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto 122:f9eeca106725 18 * this list of conditions and the following disclaimer in the documentation
Kojto 122:f9eeca106725 19 * and/or other materials provided with the distribution.
Kojto 122:f9eeca106725 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto 122:f9eeca106725 21 * may be used to endorse or promote products derived from this software
Kojto 122:f9eeca106725 22 * without specific prior written permission.
Kojto 122:f9eeca106725 23 *
Kojto 122:f9eeca106725 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto 122:f9eeca106725 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto 122:f9eeca106725 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 122:f9eeca106725 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto 122:f9eeca106725 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto 122:f9eeca106725 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto 122:f9eeca106725 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto 122:f9eeca106725 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto 122:f9eeca106725 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto 122:f9eeca106725 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 122:f9eeca106725 34 *
Kojto 122:f9eeca106725 35 ******************************************************************************
Kojto 122:f9eeca106725 36 */
Kojto 122:f9eeca106725 37
Kojto 122:f9eeca106725 38 /* Define to prevent recursive inclusion -------------------------------------*/
Kojto 122:f9eeca106725 39 #ifndef __STM32F7xx_HAL_ETH_H
Kojto 122:f9eeca106725 40 #define __STM32F7xx_HAL_ETH_H
Kojto 122:f9eeca106725 41
Kojto 122:f9eeca106725 42 #ifdef __cplusplus
Kojto 122:f9eeca106725 43 extern "C" {
Kojto 122:f9eeca106725 44 #endif
Kojto 122:f9eeca106725 45
<> 135:176b8275d35d 46 #if defined (ETH)
<> 135:176b8275d35d 47
Kojto 122:f9eeca106725 48 /* Includes ------------------------------------------------------------------*/
Kojto 122:f9eeca106725 49 #include "stm32f7xx_hal_def.h"
Kojto 122:f9eeca106725 50
Kojto 122:f9eeca106725 51 /** @addtogroup STM32F7xx_HAL_Driver
Kojto 122:f9eeca106725 52 * @{
Kojto 122:f9eeca106725 53 */
Kojto 122:f9eeca106725 54
Kojto 122:f9eeca106725 55 /** @addtogroup ETH
Kojto 122:f9eeca106725 56 * @{
Kojto 122:f9eeca106725 57 */
Kojto 122:f9eeca106725 58
Kojto 122:f9eeca106725 59 /** @addtogroup ETH_Private_Macros
Kojto 122:f9eeca106725 60 * @{
Kojto 122:f9eeca106725 61 */
Kojto 122:f9eeca106725 62 #define IS_ETH_PHY_ADDRESS(ADDRESS) ((ADDRESS) <= 0x20)
Kojto 122:f9eeca106725 63 #define IS_ETH_AUTONEGOTIATION(CMD) (((CMD) == ETH_AUTONEGOTIATION_ENABLE) || \
Kojto 122:f9eeca106725 64 ((CMD) == ETH_AUTONEGOTIATION_DISABLE))
Kojto 122:f9eeca106725 65 #define IS_ETH_SPEED(SPEED) (((SPEED) == ETH_SPEED_10M) || \
Kojto 122:f9eeca106725 66 ((SPEED) == ETH_SPEED_100M))
Kojto 122:f9eeca106725 67 #define IS_ETH_DUPLEX_MODE(MODE) (((MODE) == ETH_MODE_FULLDUPLEX) || \
Kojto 122:f9eeca106725 68 ((MODE) == ETH_MODE_HALFDUPLEX))
Kojto 122:f9eeca106725 69 #define IS_ETH_RX_MODE(MODE) (((MODE) == ETH_RXPOLLING_MODE) || \
Kojto 122:f9eeca106725 70 ((MODE) == ETH_RXINTERRUPT_MODE))
Kojto 122:f9eeca106725 71 #define IS_ETH_CHECKSUM_MODE(MODE) (((MODE) == ETH_CHECKSUM_BY_HARDWARE) || \
Kojto 122:f9eeca106725 72 ((MODE) == ETH_CHECKSUM_BY_SOFTWARE))
Kojto 122:f9eeca106725 73 #define IS_ETH_MEDIA_INTERFACE(MODE) (((MODE) == ETH_MEDIA_INTERFACE_MII) || \
Kojto 122:f9eeca106725 74 ((MODE) == ETH_MEDIA_INTERFACE_RMII))
Kojto 122:f9eeca106725 75 #define IS_ETH_WATCHDOG(CMD) (((CMD) == ETH_WATCHDOG_ENABLE) || \
Kojto 122:f9eeca106725 76 ((CMD) == ETH_WATCHDOG_DISABLE))
Kojto 122:f9eeca106725 77 #define IS_ETH_JABBER(CMD) (((CMD) == ETH_JABBER_ENABLE) || \
Kojto 122:f9eeca106725 78 ((CMD) == ETH_JABBER_DISABLE))
Kojto 122:f9eeca106725 79 #define IS_ETH_INTER_FRAME_GAP(GAP) (((GAP) == ETH_INTERFRAMEGAP_96BIT) || \
Kojto 122:f9eeca106725 80 ((GAP) == ETH_INTERFRAMEGAP_88BIT) || \
Kojto 122:f9eeca106725 81 ((GAP) == ETH_INTERFRAMEGAP_80BIT) || \
Kojto 122:f9eeca106725 82 ((GAP) == ETH_INTERFRAMEGAP_72BIT) || \
Kojto 122:f9eeca106725 83 ((GAP) == ETH_INTERFRAMEGAP_64BIT) || \
Kojto 122:f9eeca106725 84 ((GAP) == ETH_INTERFRAMEGAP_56BIT) || \
Kojto 122:f9eeca106725 85 ((GAP) == ETH_INTERFRAMEGAP_48BIT) || \
Kojto 122:f9eeca106725 86 ((GAP) == ETH_INTERFRAMEGAP_40BIT))
Kojto 122:f9eeca106725 87 #define IS_ETH_CARRIER_SENSE(CMD) (((CMD) == ETH_CARRIERSENCE_ENABLE) || \
Kojto 122:f9eeca106725 88 ((CMD) == ETH_CARRIERSENCE_DISABLE))
Kojto 122:f9eeca106725 89 #define IS_ETH_RECEIVE_OWN(CMD) (((CMD) == ETH_RECEIVEOWN_ENABLE) || \
Kojto 122:f9eeca106725 90 ((CMD) == ETH_RECEIVEOWN_DISABLE))
Kojto 122:f9eeca106725 91 #define IS_ETH_LOOPBACK_MODE(CMD) (((CMD) == ETH_LOOPBACKMODE_ENABLE) || \
Kojto 122:f9eeca106725 92 ((CMD) == ETH_LOOPBACKMODE_DISABLE))
Kojto 122:f9eeca106725 93 #define IS_ETH_CHECKSUM_OFFLOAD(CMD) (((CMD) == ETH_CHECKSUMOFFLAOD_ENABLE) || \
Kojto 122:f9eeca106725 94 ((CMD) == ETH_CHECKSUMOFFLAOD_DISABLE))
Kojto 122:f9eeca106725 95 #define IS_ETH_RETRY_TRANSMISSION(CMD) (((CMD) == ETH_RETRYTRANSMISSION_ENABLE) || \
Kojto 122:f9eeca106725 96 ((CMD) == ETH_RETRYTRANSMISSION_DISABLE))
Kojto 122:f9eeca106725 97 #define IS_ETH_AUTOMATIC_PADCRC_STRIP(CMD) (((CMD) == ETH_AUTOMATICPADCRCSTRIP_ENABLE) || \
Kojto 122:f9eeca106725 98 ((CMD) == ETH_AUTOMATICPADCRCSTRIP_DISABLE))
Kojto 122:f9eeca106725 99 #define IS_ETH_BACKOFF_LIMIT(LIMIT) (((LIMIT) == ETH_BACKOFFLIMIT_10) || \
Kojto 122:f9eeca106725 100 ((LIMIT) == ETH_BACKOFFLIMIT_8) || \
Kojto 122:f9eeca106725 101 ((LIMIT) == ETH_BACKOFFLIMIT_4) || \
Kojto 122:f9eeca106725 102 ((LIMIT) == ETH_BACKOFFLIMIT_1))
Kojto 122:f9eeca106725 103 #define IS_ETH_DEFERRAL_CHECK(CMD) (((CMD) == ETH_DEFFERRALCHECK_ENABLE) || \
Kojto 122:f9eeca106725 104 ((CMD) == ETH_DEFFERRALCHECK_DISABLE))
Kojto 122:f9eeca106725 105 #define IS_ETH_RECEIVE_ALL(CMD) (((CMD) == ETH_RECEIVEALL_ENABLE) || \
Kojto 122:f9eeca106725 106 ((CMD) == ETH_RECEIVEAll_DISABLE))
Kojto 122:f9eeca106725 107 #define IS_ETH_SOURCE_ADDR_FILTER(CMD) (((CMD) == ETH_SOURCEADDRFILTER_NORMAL_ENABLE) || \
Kojto 122:f9eeca106725 108 ((CMD) == ETH_SOURCEADDRFILTER_INVERSE_ENABLE) || \
Kojto 122:f9eeca106725 109 ((CMD) == ETH_SOURCEADDRFILTER_DISABLE))
Kojto 122:f9eeca106725 110 #define IS_ETH_CONTROL_FRAMES(PASS) (((PASS) == ETH_PASSCONTROLFRAMES_BLOCKALL) || \
Kojto 122:f9eeca106725 111 ((PASS) == ETH_PASSCONTROLFRAMES_FORWARDALL) || \
Kojto 122:f9eeca106725 112 ((PASS) == ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER))
Kojto 122:f9eeca106725 113 #define IS_ETH_BROADCAST_FRAMES_RECEPTION(CMD) (((CMD) == ETH_BROADCASTFRAMESRECEPTION_ENABLE) || \
Kojto 122:f9eeca106725 114 ((CMD) == ETH_BROADCASTFRAMESRECEPTION_DISABLE))
Kojto 122:f9eeca106725 115 #define IS_ETH_DESTINATION_ADDR_FILTER(FILTER) (((FILTER) == ETH_DESTINATIONADDRFILTER_NORMAL) || \
Kojto 122:f9eeca106725 116 ((FILTER) == ETH_DESTINATIONADDRFILTER_INVERSE))
Kojto 122:f9eeca106725 117 #define IS_ETH_PROMISCUOUS_MODE(CMD) (((CMD) == ETH_PROMISCUOUS_MODE_ENABLE) || \
Kojto 122:f9eeca106725 118 ((CMD) == ETH_PROMISCUOUS_MODE_DISABLE))
Kojto 122:f9eeca106725 119 #define IS_ETH_MULTICAST_FRAMES_FILTER(FILTER) (((FILTER) == ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE) || \
Kojto 122:f9eeca106725 120 ((FILTER) == ETH_MULTICASTFRAMESFILTER_HASHTABLE) || \
Kojto 122:f9eeca106725 121 ((FILTER) == ETH_MULTICASTFRAMESFILTER_PERFECT) || \
Kojto 122:f9eeca106725 122 ((FILTER) == ETH_MULTICASTFRAMESFILTER_NONE))
Kojto 122:f9eeca106725 123 #define IS_ETH_UNICAST_FRAMES_FILTER(FILTER) (((FILTER) == ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE) || \
Kojto 122:f9eeca106725 124 ((FILTER) == ETH_UNICASTFRAMESFILTER_HASHTABLE) || \
Kojto 122:f9eeca106725 125 ((FILTER) == ETH_UNICASTFRAMESFILTER_PERFECT))
Kojto 122:f9eeca106725 126 #define IS_ETH_PAUSE_TIME(TIME) ((TIME) <= 0xFFFF)
Kojto 122:f9eeca106725 127 #define IS_ETH_ZEROQUANTA_PAUSE(CMD) (((CMD) == ETH_ZEROQUANTAPAUSE_ENABLE) || \
Kojto 122:f9eeca106725 128 ((CMD) == ETH_ZEROQUANTAPAUSE_DISABLE))
Kojto 122:f9eeca106725 129 #define IS_ETH_PAUSE_LOW_THRESHOLD(THRESHOLD) (((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS4) || \
Kojto 122:f9eeca106725 130 ((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS28) || \
Kojto 122:f9eeca106725 131 ((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS144) || \
Kojto 122:f9eeca106725 132 ((THRESHOLD) == ETH_PAUSELOWTHRESHOLD_MINUS256))
Kojto 122:f9eeca106725 133 #define IS_ETH_UNICAST_PAUSE_FRAME_DETECT(CMD) (((CMD) == ETH_UNICASTPAUSEFRAMEDETECT_ENABLE) || \
Kojto 122:f9eeca106725 134 ((CMD) == ETH_UNICASTPAUSEFRAMEDETECT_DISABLE))
Kojto 122:f9eeca106725 135 #define IS_ETH_RECEIVE_FLOWCONTROL(CMD) (((CMD) == ETH_RECEIVEFLOWCONTROL_ENABLE) || \
Kojto 122:f9eeca106725 136 ((CMD) == ETH_RECEIVEFLOWCONTROL_DISABLE))
Kojto 122:f9eeca106725 137 #define IS_ETH_TRANSMIT_FLOWCONTROL(CMD) (((CMD) == ETH_TRANSMITFLOWCONTROL_ENABLE) || \
Kojto 122:f9eeca106725 138 ((CMD) == ETH_TRANSMITFLOWCONTROL_DISABLE))
Kojto 122:f9eeca106725 139 #define IS_ETH_VLAN_TAG_COMPARISON(COMPARISON) (((COMPARISON) == ETH_VLANTAGCOMPARISON_12BIT) || \
Kojto 122:f9eeca106725 140 ((COMPARISON) == ETH_VLANTAGCOMPARISON_16BIT))
Kojto 122:f9eeca106725 141 #define IS_ETH_VLAN_TAG_IDENTIFIER(IDENTIFIER) ((IDENTIFIER) <= 0xFFFF)
Kojto 122:f9eeca106725 142 #define IS_ETH_MAC_ADDRESS0123(ADDRESS) (((ADDRESS) == ETH_MAC_ADDRESS0) || \
Kojto 122:f9eeca106725 143 ((ADDRESS) == ETH_MAC_ADDRESS1) || \
Kojto 122:f9eeca106725 144 ((ADDRESS) == ETH_MAC_ADDRESS2) || \
Kojto 122:f9eeca106725 145 ((ADDRESS) == ETH_MAC_ADDRESS3))
Kojto 122:f9eeca106725 146 #define IS_ETH_MAC_ADDRESS123(ADDRESS) (((ADDRESS) == ETH_MAC_ADDRESS1) || \
Kojto 122:f9eeca106725 147 ((ADDRESS) == ETH_MAC_ADDRESS2) || \
Kojto 122:f9eeca106725 148 ((ADDRESS) == ETH_MAC_ADDRESS3))
Kojto 122:f9eeca106725 149 #define IS_ETH_MAC_ADDRESS_FILTER(FILTER) (((FILTER) == ETH_MAC_ADDRESSFILTER_SA) || \
Kojto 122:f9eeca106725 150 ((FILTER) == ETH_MAC_ADDRESSFILTER_DA))
Kojto 122:f9eeca106725 151 #define IS_ETH_MAC_ADDRESS_MASK(MASK) (((MASK) == ETH_MAC_ADDRESSMASK_BYTE6) || \
Kojto 122:f9eeca106725 152 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE5) || \
Kojto 122:f9eeca106725 153 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE4) || \
Kojto 122:f9eeca106725 154 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE3) || \
Kojto 122:f9eeca106725 155 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE2) || \
Kojto 122:f9eeca106725 156 ((MASK) == ETH_MAC_ADDRESSMASK_BYTE1))
Kojto 122:f9eeca106725 157 #define IS_ETH_DROP_TCPIP_CHECKSUM_FRAME(CMD) (((CMD) == ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE) || \
Kojto 122:f9eeca106725 158 ((CMD) == ETH_DROPTCPIPCHECKSUMERRORFRAME_DISABLE))
Kojto 122:f9eeca106725 159 #define IS_ETH_RECEIVE_STORE_FORWARD(CMD) (((CMD) == ETH_RECEIVESTOREFORWARD_ENABLE) || \
Kojto 122:f9eeca106725 160 ((CMD) == ETH_RECEIVESTOREFORWARD_DISABLE))
Kojto 122:f9eeca106725 161 #define IS_ETH_FLUSH_RECEIVE_FRAME(CMD) (((CMD) == ETH_FLUSHRECEIVEDFRAME_ENABLE) || \
Kojto 122:f9eeca106725 162 ((CMD) == ETH_FLUSHRECEIVEDFRAME_DISABLE))
Kojto 122:f9eeca106725 163 #define IS_ETH_TRANSMIT_STORE_FORWARD(CMD) (((CMD) == ETH_TRANSMITSTOREFORWARD_ENABLE) || \
Kojto 122:f9eeca106725 164 ((CMD) == ETH_TRANSMITSTOREFORWARD_DISABLE))
Kojto 122:f9eeca106725 165 #define IS_ETH_TRANSMIT_THRESHOLD_CONTROL(THRESHOLD) (((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_64BYTES) || \
Kojto 122:f9eeca106725 166 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_128BYTES) || \
Kojto 122:f9eeca106725 167 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_192BYTES) || \
Kojto 122:f9eeca106725 168 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_256BYTES) || \
Kojto 122:f9eeca106725 169 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_40BYTES) || \
Kojto 122:f9eeca106725 170 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_32BYTES) || \
Kojto 122:f9eeca106725 171 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_24BYTES) || \
Kojto 122:f9eeca106725 172 ((THRESHOLD) == ETH_TRANSMITTHRESHOLDCONTROL_16BYTES))
Kojto 122:f9eeca106725 173 #define IS_ETH_FORWARD_ERROR_FRAMES(CMD) (((CMD) == ETH_FORWARDERRORFRAMES_ENABLE) || \
Kojto 122:f9eeca106725 174 ((CMD) == ETH_FORWARDERRORFRAMES_DISABLE))
Kojto 122:f9eeca106725 175 #define IS_ETH_FORWARD_UNDERSIZED_GOOD_FRAMES(CMD) (((CMD) == ETH_FORWARDUNDERSIZEDGOODFRAMES_ENABLE) || \
Kojto 122:f9eeca106725 176 ((CMD) == ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE))
Kojto 122:f9eeca106725 177 #define IS_ETH_RECEIVE_THRESHOLD_CONTROL(THRESHOLD) (((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES) || \
Kojto 122:f9eeca106725 178 ((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES) || \
Kojto 122:f9eeca106725 179 ((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES) || \
Kojto 122:f9eeca106725 180 ((THRESHOLD) == ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES))
Kojto 122:f9eeca106725 181 #define IS_ETH_SECOND_FRAME_OPERATE(CMD) (((CMD) == ETH_SECONDFRAMEOPERARTE_ENABLE) || \
Kojto 122:f9eeca106725 182 ((CMD) == ETH_SECONDFRAMEOPERARTE_DISABLE))
Kojto 122:f9eeca106725 183 #define IS_ETH_ADDRESS_ALIGNED_BEATS(CMD) (((CMD) == ETH_ADDRESSALIGNEDBEATS_ENABLE) || \
Kojto 122:f9eeca106725 184 ((CMD) == ETH_ADDRESSALIGNEDBEATS_DISABLE))
Kojto 122:f9eeca106725 185 #define IS_ETH_FIXED_BURST(CMD) (((CMD) == ETH_FIXEDBURST_ENABLE) || \
Kojto 122:f9eeca106725 186 ((CMD) == ETH_FIXEDBURST_DISABLE))
Kojto 122:f9eeca106725 187 #define IS_ETH_RXDMA_BURST_LENGTH(LENGTH) (((LENGTH) == ETH_RXDMABURSTLENGTH_1BEAT) || \
Kojto 122:f9eeca106725 188 ((LENGTH) == ETH_RXDMABURSTLENGTH_2BEAT) || \
Kojto 122:f9eeca106725 189 ((LENGTH) == ETH_RXDMABURSTLENGTH_4BEAT) || \
Kojto 122:f9eeca106725 190 ((LENGTH) == ETH_RXDMABURSTLENGTH_8BEAT) || \
Kojto 122:f9eeca106725 191 ((LENGTH) == ETH_RXDMABURSTLENGTH_16BEAT) || \
Kojto 122:f9eeca106725 192 ((LENGTH) == ETH_RXDMABURSTLENGTH_32BEAT) || \
Kojto 122:f9eeca106725 193 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_4BEAT) || \
Kojto 122:f9eeca106725 194 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_8BEAT) || \
Kojto 122:f9eeca106725 195 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_16BEAT) || \
Kojto 122:f9eeca106725 196 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_32BEAT) || \
Kojto 122:f9eeca106725 197 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_64BEAT) || \
Kojto 122:f9eeca106725 198 ((LENGTH) == ETH_RXDMABURSTLENGTH_4XPBL_128BEAT))
Kojto 122:f9eeca106725 199 #define IS_ETH_TXDMA_BURST_LENGTH(LENGTH) (((LENGTH) == ETH_TXDMABURSTLENGTH_1BEAT) || \
Kojto 122:f9eeca106725 200 ((LENGTH) == ETH_TXDMABURSTLENGTH_2BEAT) || \
Kojto 122:f9eeca106725 201 ((LENGTH) == ETH_TXDMABURSTLENGTH_4BEAT) || \
Kojto 122:f9eeca106725 202 ((LENGTH) == ETH_TXDMABURSTLENGTH_8BEAT) || \
Kojto 122:f9eeca106725 203 ((LENGTH) == ETH_TXDMABURSTLENGTH_16BEAT) || \
Kojto 122:f9eeca106725 204 ((LENGTH) == ETH_TXDMABURSTLENGTH_32BEAT) || \
Kojto 122:f9eeca106725 205 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_4BEAT) || \
Kojto 122:f9eeca106725 206 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_8BEAT) || \
Kojto 122:f9eeca106725 207 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_16BEAT) || \
Kojto 122:f9eeca106725 208 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_32BEAT) || \
Kojto 122:f9eeca106725 209 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_64BEAT) || \
Kojto 122:f9eeca106725 210 ((LENGTH) == ETH_TXDMABURSTLENGTH_4XPBL_128BEAT))
Kojto 122:f9eeca106725 211 #define IS_ETH_DMA_DESC_SKIP_LENGTH(LENGTH) ((LENGTH) <= 0x1F)
Kojto 122:f9eeca106725 212 #define IS_ETH_DMA_ARBITRATION_ROUNDROBIN_RXTX(RATIO) (((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1) || \
Kojto 122:f9eeca106725 213 ((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1) || \
Kojto 122:f9eeca106725 214 ((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1) || \
Kojto 122:f9eeca106725 215 ((RATIO) == ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1) || \
Kojto 122:f9eeca106725 216 ((RATIO) == ETH_DMAARBITRATION_RXPRIORTX))
Kojto 122:f9eeca106725 217 #define IS_ETH_DMATXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMATXDESC_OWN) || \
Kojto 122:f9eeca106725 218 ((FLAG) == ETH_DMATXDESC_IC) || \
Kojto 122:f9eeca106725 219 ((FLAG) == ETH_DMATXDESC_LS) || \
Kojto 122:f9eeca106725 220 ((FLAG) == ETH_DMATXDESC_FS) || \
Kojto 122:f9eeca106725 221 ((FLAG) == ETH_DMATXDESC_DC) || \
Kojto 122:f9eeca106725 222 ((FLAG) == ETH_DMATXDESC_DP) || \
Kojto 122:f9eeca106725 223 ((FLAG) == ETH_DMATXDESC_TTSE) || \
Kojto 122:f9eeca106725 224 ((FLAG) == ETH_DMATXDESC_TER) || \
Kojto 122:f9eeca106725 225 ((FLAG) == ETH_DMATXDESC_TCH) || \
Kojto 122:f9eeca106725 226 ((FLAG) == ETH_DMATXDESC_TTSS) || \
Kojto 122:f9eeca106725 227 ((FLAG) == ETH_DMATXDESC_IHE) || \
Kojto 122:f9eeca106725 228 ((FLAG) == ETH_DMATXDESC_ES) || \
Kojto 122:f9eeca106725 229 ((FLAG) == ETH_DMATXDESC_JT) || \
Kojto 122:f9eeca106725 230 ((FLAG) == ETH_DMATXDESC_FF) || \
Kojto 122:f9eeca106725 231 ((FLAG) == ETH_DMATXDESC_PCE) || \
Kojto 122:f9eeca106725 232 ((FLAG) == ETH_DMATXDESC_LCA) || \
Kojto 122:f9eeca106725 233 ((FLAG) == ETH_DMATXDESC_NC) || \
Kojto 122:f9eeca106725 234 ((FLAG) == ETH_DMATXDESC_LCO) || \
Kojto 122:f9eeca106725 235 ((FLAG) == ETH_DMATXDESC_EC) || \
Kojto 122:f9eeca106725 236 ((FLAG) == ETH_DMATXDESC_VF) || \
Kojto 122:f9eeca106725 237 ((FLAG) == ETH_DMATXDESC_CC) || \
Kojto 122:f9eeca106725 238 ((FLAG) == ETH_DMATXDESC_ED) || \
Kojto 122:f9eeca106725 239 ((FLAG) == ETH_DMATXDESC_UF) || \
Kojto 122:f9eeca106725 240 ((FLAG) == ETH_DMATXDESC_DB))
Kojto 122:f9eeca106725 241 #define IS_ETH_DMA_TXDESC_SEGMENT(SEGMENT) (((SEGMENT) == ETH_DMATXDESC_LASTSEGMENTS) || \
Kojto 122:f9eeca106725 242 ((SEGMENT) == ETH_DMATXDESC_FIRSTSEGMENT))
Kojto 122:f9eeca106725 243 #define IS_ETH_DMA_TXDESC_CHECKSUM(CHECKSUM) (((CHECKSUM) == ETH_DMATXDESC_CHECKSUMBYPASS) || \
Kojto 122:f9eeca106725 244 ((CHECKSUM) == ETH_DMATXDESC_CHECKSUMIPV4HEADER) || \
Kojto 122:f9eeca106725 245 ((CHECKSUM) == ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT) || \
Kojto 122:f9eeca106725 246 ((CHECKSUM) == ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL))
Kojto 122:f9eeca106725 247 #define IS_ETH_DMATXDESC_BUFFER_SIZE(SIZE) ((SIZE) <= 0x1FFF)
Kojto 122:f9eeca106725 248 #define IS_ETH_DMARXDESC_GET_FLAG(FLAG) (((FLAG) == ETH_DMARXDESC_OWN) || \
Kojto 122:f9eeca106725 249 ((FLAG) == ETH_DMARXDESC_AFM) || \
Kojto 122:f9eeca106725 250 ((FLAG) == ETH_DMARXDESC_ES) || \
Kojto 122:f9eeca106725 251 ((FLAG) == ETH_DMARXDESC_DE) || \
Kojto 122:f9eeca106725 252 ((FLAG) == ETH_DMARXDESC_SAF) || \
Kojto 122:f9eeca106725 253 ((FLAG) == ETH_DMARXDESC_LE) || \
Kojto 122:f9eeca106725 254 ((FLAG) == ETH_DMARXDESC_OE) || \
Kojto 122:f9eeca106725 255 ((FLAG) == ETH_DMARXDESC_VLAN) || \
Kojto 122:f9eeca106725 256 ((FLAG) == ETH_DMARXDESC_FS) || \
Kojto 122:f9eeca106725 257 ((FLAG) == ETH_DMARXDESC_LS) || \
Kojto 122:f9eeca106725 258 ((FLAG) == ETH_DMARXDESC_IPV4HCE) || \
Kojto 122:f9eeca106725 259 ((FLAG) == ETH_DMARXDESC_LC) || \
Kojto 122:f9eeca106725 260 ((FLAG) == ETH_DMARXDESC_FT) || \
Kojto 122:f9eeca106725 261 ((FLAG) == ETH_DMARXDESC_RWT) || \
Kojto 122:f9eeca106725 262 ((FLAG) == ETH_DMARXDESC_RE) || \
Kojto 122:f9eeca106725 263 ((FLAG) == ETH_DMARXDESC_DBE) || \
Kojto 122:f9eeca106725 264 ((FLAG) == ETH_DMARXDESC_CE) || \
Kojto 122:f9eeca106725 265 ((FLAG) == ETH_DMARXDESC_MAMPCE))
Kojto 122:f9eeca106725 266 #define IS_ETH_DMA_RXDESC_BUFFER(BUFFER) (((BUFFER) == ETH_DMARXDESC_BUFFER1) || \
Kojto 122:f9eeca106725 267 ((BUFFER) == ETH_DMARXDESC_BUFFER2))
Kojto 122:f9eeca106725 268 #define IS_ETH_PMT_GET_FLAG(FLAG) (((FLAG) == ETH_PMT_FLAG_WUFR) || \
Kojto 122:f9eeca106725 269 ((FLAG) == ETH_PMT_FLAG_MPR))
Kojto 122:f9eeca106725 270 #define IS_ETH_DMA_FLAG(FLAG) ((((FLAG) & (uint32_t)0xC7FE1800) == 0x00) && ((FLAG) != 0x00))
Kojto 122:f9eeca106725 271 #define IS_ETH_DMA_GET_FLAG(FLAG) (((FLAG) == ETH_DMA_FLAG_TST) || ((FLAG) == ETH_DMA_FLAG_PMT) || \
Kojto 122:f9eeca106725 272 ((FLAG) == ETH_DMA_FLAG_MMC) || ((FLAG) == ETH_DMA_FLAG_DATATRANSFERERROR) || \
Kojto 122:f9eeca106725 273 ((FLAG) == ETH_DMA_FLAG_READWRITEERROR) || ((FLAG) == ETH_DMA_FLAG_ACCESSERROR) || \
Kojto 122:f9eeca106725 274 ((FLAG) == ETH_DMA_FLAG_NIS) || ((FLAG) == ETH_DMA_FLAG_AIS) || \
Kojto 122:f9eeca106725 275 ((FLAG) == ETH_DMA_FLAG_ER) || ((FLAG) == ETH_DMA_FLAG_FBE) || \
Kojto 122:f9eeca106725 276 ((FLAG) == ETH_DMA_FLAG_ET) || ((FLAG) == ETH_DMA_FLAG_RWT) || \
Kojto 122:f9eeca106725 277 ((FLAG) == ETH_DMA_FLAG_RPS) || ((FLAG) == ETH_DMA_FLAG_RBU) || \
Kojto 122:f9eeca106725 278 ((FLAG) == ETH_DMA_FLAG_R) || ((FLAG) == ETH_DMA_FLAG_TU) || \
Kojto 122:f9eeca106725 279 ((FLAG) == ETH_DMA_FLAG_RO) || ((FLAG) == ETH_DMA_FLAG_TJT) || \
Kojto 122:f9eeca106725 280 ((FLAG) == ETH_DMA_FLAG_TBU) || ((FLAG) == ETH_DMA_FLAG_TPS) || \
Kojto 122:f9eeca106725 281 ((FLAG) == ETH_DMA_FLAG_T))
Kojto 122:f9eeca106725 282 #define IS_ETH_MAC_IT(IT) ((((IT) & (uint32_t)0xFFFFFDF1) == 0x00) && ((IT) != 0x00))
Kojto 122:f9eeca106725 283 #define IS_ETH_MAC_GET_IT(IT) (((IT) == ETH_MAC_IT_TST) || ((IT) == ETH_MAC_IT_MMCT) || \
Kojto 122:f9eeca106725 284 ((IT) == ETH_MAC_IT_MMCR) || ((IT) == ETH_MAC_IT_MMC) || \
Kojto 122:f9eeca106725 285 ((IT) == ETH_MAC_IT_PMT))
Kojto 122:f9eeca106725 286 #define IS_ETH_MAC_GET_FLAG(FLAG) (((FLAG) == ETH_MAC_FLAG_TST) || ((FLAG) == ETH_MAC_FLAG_MMCT) || \
Kojto 122:f9eeca106725 287 ((FLAG) == ETH_MAC_FLAG_MMCR) || ((FLAG) == ETH_MAC_FLAG_MMC) || \
Kojto 122:f9eeca106725 288 ((FLAG) == ETH_MAC_FLAG_PMT))
Kojto 122:f9eeca106725 289 #define IS_ETH_DMA_IT(IT) ((((IT) & (uint32_t)0xC7FE1800) == 0x00) && ((IT) != 0x00))
Kojto 122:f9eeca106725 290 #define IS_ETH_DMA_GET_IT(IT) (((IT) == ETH_DMA_IT_TST) || ((IT) == ETH_DMA_IT_PMT) || \
Kojto 122:f9eeca106725 291 ((IT) == ETH_DMA_IT_MMC) || ((IT) == ETH_DMA_IT_NIS) || \
Kojto 122:f9eeca106725 292 ((IT) == ETH_DMA_IT_AIS) || ((IT) == ETH_DMA_IT_ER) || \
Kojto 122:f9eeca106725 293 ((IT) == ETH_DMA_IT_FBE) || ((IT) == ETH_DMA_IT_ET) || \
Kojto 122:f9eeca106725 294 ((IT) == ETH_DMA_IT_RWT) || ((IT) == ETH_DMA_IT_RPS) || \
Kojto 122:f9eeca106725 295 ((IT) == ETH_DMA_IT_RBU) || ((IT) == ETH_DMA_IT_R) || \
Kojto 122:f9eeca106725 296 ((IT) == ETH_DMA_IT_TU) || ((IT) == ETH_DMA_IT_RO) || \
Kojto 122:f9eeca106725 297 ((IT) == ETH_DMA_IT_TJT) || ((IT) == ETH_DMA_IT_TBU) || \
Kojto 122:f9eeca106725 298 ((IT) == ETH_DMA_IT_TPS) || ((IT) == ETH_DMA_IT_T))
Kojto 122:f9eeca106725 299 #define IS_ETH_DMA_GET_OVERFLOW(OVERFLOW) (((OVERFLOW) == ETH_DMA_OVERFLOW_RXFIFOCOUNTER) || \
Kojto 122:f9eeca106725 300 ((OVERFLOW) == ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER))
Kojto 122:f9eeca106725 301 #define IS_ETH_MMC_IT(IT) (((((IT) & (uint32_t)0xFFDF3FFF) == 0x00) || (((IT) & (uint32_t)0xEFFDFF9F) == 0x00)) && \
Kojto 122:f9eeca106725 302 ((IT) != 0x00))
Kojto 122:f9eeca106725 303 #define IS_ETH_MMC_GET_IT(IT) (((IT) == ETH_MMC_IT_TGF) || ((IT) == ETH_MMC_IT_TGFMSC) || \
Kojto 122:f9eeca106725 304 ((IT) == ETH_MMC_IT_TGFSC) || ((IT) == ETH_MMC_IT_RGUF) || \
Kojto 122:f9eeca106725 305 ((IT) == ETH_MMC_IT_RFAE) || ((IT) == ETH_MMC_IT_RFCE))
Kojto 122:f9eeca106725 306 #define IS_ETH_ENHANCED_DESCRIPTOR_FORMAT(CMD) (((CMD) == ETH_DMAENHANCEDDESCRIPTOR_ENABLE) || \
Kojto 122:f9eeca106725 307 ((CMD) == ETH_DMAENHANCEDDESCRIPTOR_DISABLE))
Kojto 122:f9eeca106725 308
Kojto 122:f9eeca106725 309
Kojto 122:f9eeca106725 310 /**
Kojto 122:f9eeca106725 311 * @}
Kojto 122:f9eeca106725 312 */
Kojto 122:f9eeca106725 313
Kojto 122:f9eeca106725 314 /** @addtogroup ETH_Private_Defines
Kojto 122:f9eeca106725 315 * @{
Kojto 122:f9eeca106725 316 */
Kojto 122:f9eeca106725 317 /* Delay to wait when writing to some Ethernet registers */
Kojto 122:f9eeca106725 318 #define ETH_REG_WRITE_DELAY ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 319
Kojto 122:f9eeca106725 320 /* Ethernet Errors */
Kojto 122:f9eeca106725 321 #define ETH_SUCCESS ((uint32_t)0U)
Kojto 122:f9eeca106725 322 #define ETH_ERROR ((uint32_t)1U)
Kojto 122:f9eeca106725 323
Kojto 122:f9eeca106725 324 /* Ethernet DMA Tx descriptors Collision Count Shift */
Kojto 122:f9eeca106725 325 #define ETH_DMATXDESC_COLLISION_COUNTSHIFT ((uint32_t)3U)
Kojto 122:f9eeca106725 326
Kojto 122:f9eeca106725 327 /* Ethernet DMA Tx descriptors Buffer2 Size Shift */
Kojto 122:f9eeca106725 328 #define ETH_DMATXDESC_BUFFER2_SIZESHIFT ((uint32_t)16U)
Kojto 122:f9eeca106725 329
Kojto 122:f9eeca106725 330 /* Ethernet DMA Rx descriptors Frame Length Shift */
Kojto 122:f9eeca106725 331 #define ETH_DMARXDESC_FRAME_LENGTHSHIFT ((uint32_t)16U)
Kojto 122:f9eeca106725 332
Kojto 122:f9eeca106725 333 /* Ethernet DMA Rx descriptors Buffer2 Size Shift */
Kojto 122:f9eeca106725 334 #define ETH_DMARXDESC_BUFFER2_SIZESHIFT ((uint32_t)16U)
Kojto 122:f9eeca106725 335
Kojto 122:f9eeca106725 336 /* Ethernet DMA Rx descriptors Frame length Shift */
Kojto 122:f9eeca106725 337 #define ETH_DMARXDESC_FRAMELENGTHSHIFT ((uint32_t)16)
Kojto 122:f9eeca106725 338
Kojto 122:f9eeca106725 339 /* Ethernet MAC address offsets */
Kojto 122:f9eeca106725 340 #define ETH_MAC_ADDR_HBASE (uint32_t)(ETH_MAC_BASE + (uint32_t)0x40U) /* Ethernet MAC address high offset */
Kojto 122:f9eeca106725 341 #define ETH_MAC_ADDR_LBASE (uint32_t)(ETH_MAC_BASE + (uint32_t)0x44U) /* Ethernet MAC address low offset */
Kojto 122:f9eeca106725 342
Kojto 122:f9eeca106725 343 /* Ethernet MACMIIAR register Mask */
Kojto 122:f9eeca106725 344 #define ETH_MACMIIAR_CR_MASK ((uint32_t)0xFFFFFFE3U)
Kojto 122:f9eeca106725 345
Kojto 122:f9eeca106725 346 /* Ethernet MACCR register Mask */
Kojto 122:f9eeca106725 347 #define ETH_MACCR_CLEAR_MASK ((uint32_t)0xFF20810FU)
Kojto 122:f9eeca106725 348
Kojto 122:f9eeca106725 349 /* Ethernet MACFCR register Mask */
Kojto 122:f9eeca106725 350 #define ETH_MACFCR_CLEAR_MASK ((uint32_t)0x0000FF41U)
Kojto 122:f9eeca106725 351
Kojto 122:f9eeca106725 352 /* Ethernet DMAOMR register Mask */
Kojto 122:f9eeca106725 353 #define ETH_DMAOMR_CLEAR_MASK ((uint32_t)0xF8DE3F23U)
Kojto 122:f9eeca106725 354
Kojto 122:f9eeca106725 355 /* Ethernet Remote Wake-up frame register length */
Kojto 122:f9eeca106725 356 #define ETH_WAKEUP_REGISTER_LENGTH 8U
Kojto 122:f9eeca106725 357
Kojto 122:f9eeca106725 358 /* Ethernet Missed frames counter Shift */
Kojto 122:f9eeca106725 359 #define ETH_DMA_RX_OVERFLOW_MISSEDFRAMES_COUNTERSHIFT 17U
Kojto 122:f9eeca106725 360 /**
Kojto 122:f9eeca106725 361 * @}
Kojto 122:f9eeca106725 362 */
Kojto 122:f9eeca106725 363
Kojto 122:f9eeca106725 364 /* Exported types ------------------------------------------------------------*/
Kojto 122:f9eeca106725 365 /** @defgroup ETH_Exported_Types ETH Exported Types
Kojto 122:f9eeca106725 366 * @{
Kojto 122:f9eeca106725 367 */
Kojto 122:f9eeca106725 368
Kojto 122:f9eeca106725 369 /**
Kojto 122:f9eeca106725 370 * @brief HAL State structures definition
Kojto 122:f9eeca106725 371 */
Kojto 122:f9eeca106725 372 typedef enum
Kojto 122:f9eeca106725 373 {
Kojto 122:f9eeca106725 374 HAL_ETH_STATE_RESET = 0x00U, /*!< Peripheral not yet Initialized or disabled */
Kojto 122:f9eeca106725 375 HAL_ETH_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
Kojto 122:f9eeca106725 376 HAL_ETH_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
Kojto 122:f9eeca106725 377 HAL_ETH_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
Kojto 122:f9eeca106725 378 HAL_ETH_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
Kojto 122:f9eeca106725 379 HAL_ETH_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
Kojto 122:f9eeca106725 380 HAL_ETH_STATE_BUSY_WR = 0x42U, /*!< Write process is ongoing */
Kojto 122:f9eeca106725 381 HAL_ETH_STATE_BUSY_RD = 0x82U, /*!< Read process is ongoing */
Kojto 122:f9eeca106725 382 HAL_ETH_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
Kojto 122:f9eeca106725 383 HAL_ETH_STATE_ERROR = 0x04U /*!< Reception process is ongoing */
Kojto 122:f9eeca106725 384 }HAL_ETH_StateTypeDef;
Kojto 122:f9eeca106725 385
Kojto 122:f9eeca106725 386 /**
Kojto 122:f9eeca106725 387 * @brief ETH Init Structure definition
Kojto 122:f9eeca106725 388 */
Kojto 122:f9eeca106725 389
Kojto 122:f9eeca106725 390 typedef struct
Kojto 122:f9eeca106725 391 {
Kojto 122:f9eeca106725 392 uint32_t AutoNegotiation; /*!< Selects or not the AutoNegotiation mode for the external PHY
Kojto 122:f9eeca106725 393 The AutoNegotiation allows an automatic setting of the Speed (10/100Mbps)
Kojto 122:f9eeca106725 394 and the mode (half/full-duplex).
Kojto 122:f9eeca106725 395 This parameter can be a value of @ref ETH_AutoNegotiation */
Kojto 122:f9eeca106725 396
Kojto 122:f9eeca106725 397 uint32_t Speed; /*!< Sets the Ethernet speed: 10/100 Mbps.
Kojto 122:f9eeca106725 398 This parameter can be a value of @ref ETH_Speed */
Kojto 122:f9eeca106725 399
Kojto 122:f9eeca106725 400 uint32_t DuplexMode; /*!< Selects the MAC duplex mode: Half-Duplex or Full-Duplex mode
Kojto 122:f9eeca106725 401 This parameter can be a value of @ref ETH_Duplex_Mode */
Kojto 122:f9eeca106725 402
Kojto 122:f9eeca106725 403 uint16_t PhyAddress; /*!< Ethernet PHY address.
Kojto 122:f9eeca106725 404 This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
Kojto 122:f9eeca106725 405
Kojto 122:f9eeca106725 406 uint8_t *MACAddr; /*!< MAC Address of used Hardware: must be pointer on an array of 6 bytes */
Kojto 122:f9eeca106725 407
Kojto 122:f9eeca106725 408 uint32_t RxMode; /*!< Selects the Ethernet Rx mode: Polling mode, Interrupt mode.
Kojto 122:f9eeca106725 409 This parameter can be a value of @ref ETH_Rx_Mode */
Kojto 122:f9eeca106725 410
Kojto 122:f9eeca106725 411 uint32_t ChecksumMode; /*!< Selects if the checksum is check by hardware or by software.
Kojto 122:f9eeca106725 412 This parameter can be a value of @ref ETH_Checksum_Mode */
Kojto 122:f9eeca106725 413
Kojto 122:f9eeca106725 414 uint32_t MediaInterface ; /*!< Selects the media-independent interface or the reduced media-independent interface.
Kojto 122:f9eeca106725 415 This parameter can be a value of @ref ETH_Media_Interface */
Kojto 122:f9eeca106725 416
Kojto 122:f9eeca106725 417 } ETH_InitTypeDef;
Kojto 122:f9eeca106725 418
Kojto 122:f9eeca106725 419
Kojto 122:f9eeca106725 420 /**
Kojto 122:f9eeca106725 421 * @brief ETH MAC Configuration Structure definition
Kojto 122:f9eeca106725 422 */
Kojto 122:f9eeca106725 423
Kojto 122:f9eeca106725 424 typedef struct
Kojto 122:f9eeca106725 425 {
Kojto 122:f9eeca106725 426 uint32_t Watchdog; /*!< Selects or not the Watchdog timer
Kojto 122:f9eeca106725 427 When enabled, the MAC allows no more then 2048 bytes to be received.
Kojto 122:f9eeca106725 428 When disabled, the MAC can receive up to 16384 bytes.
Kojto 122:f9eeca106725 429 This parameter can be a value of @ref ETH_Watchdog */
Kojto 122:f9eeca106725 430
Kojto 122:f9eeca106725 431 uint32_t Jabber; /*!< Selects or not Jabber timer
Kojto 122:f9eeca106725 432 When enabled, the MAC allows no more then 2048 bytes to be sent.
Kojto 122:f9eeca106725 433 When disabled, the MAC can send up to 16384 bytes.
Kojto 122:f9eeca106725 434 This parameter can be a value of @ref ETH_Jabber */
Kojto 122:f9eeca106725 435
Kojto 122:f9eeca106725 436 uint32_t InterFrameGap; /*!< Selects the minimum IFG between frames during transmission.
Kojto 122:f9eeca106725 437 This parameter can be a value of @ref ETH_Inter_Frame_Gap */
Kojto 122:f9eeca106725 438
Kojto 122:f9eeca106725 439 uint32_t CarrierSense; /*!< Selects or not the Carrier Sense.
Kojto 122:f9eeca106725 440 This parameter can be a value of @ref ETH_Carrier_Sense */
Kojto 122:f9eeca106725 441
Kojto 122:f9eeca106725 442 uint32_t ReceiveOwn; /*!< Selects or not the ReceiveOwn,
Kojto 122:f9eeca106725 443 ReceiveOwn allows the reception of frames when the TX_EN signal is asserted
Kojto 122:f9eeca106725 444 in Half-Duplex mode.
Kojto 122:f9eeca106725 445 This parameter can be a value of @ref ETH_Receive_Own */
Kojto 122:f9eeca106725 446
Kojto 122:f9eeca106725 447 uint32_t LoopbackMode; /*!< Selects or not the internal MAC MII Loopback mode.
Kojto 122:f9eeca106725 448 This parameter can be a value of @ref ETH_Loop_Back_Mode */
Kojto 122:f9eeca106725 449
Kojto 122:f9eeca106725 450 uint32_t ChecksumOffload; /*!< Selects or not the IPv4 checksum checking for received frame payloads' TCP/UDP/ICMP headers.
Kojto 122:f9eeca106725 451 This parameter can be a value of @ref ETH_Checksum_Offload */
Kojto 122:f9eeca106725 452
Kojto 122:f9eeca106725 453 uint32_t RetryTransmission; /*!< Selects or not the MAC attempt retries transmission, based on the settings of BL,
Kojto 122:f9eeca106725 454 when a collision occurs (Half-Duplex mode).
Kojto 122:f9eeca106725 455 This parameter can be a value of @ref ETH_Retry_Transmission */
Kojto 122:f9eeca106725 456
Kojto 122:f9eeca106725 457 uint32_t AutomaticPadCRCStrip; /*!< Selects or not the Automatic MAC Pad/CRC Stripping.
Kojto 122:f9eeca106725 458 This parameter can be a value of @ref ETH_Automatic_Pad_CRC_Strip */
Kojto 122:f9eeca106725 459
Kojto 122:f9eeca106725 460 uint32_t BackOffLimit; /*!< Selects the BackOff limit value.
Kojto 122:f9eeca106725 461 This parameter can be a value of @ref ETH_Back_Off_Limit */
Kojto 122:f9eeca106725 462
Kojto 122:f9eeca106725 463 uint32_t DeferralCheck; /*!< Selects or not the deferral check function (Half-Duplex mode).
Kojto 122:f9eeca106725 464 This parameter can be a value of @ref ETH_Deferral_Check */
Kojto 122:f9eeca106725 465
Kojto 122:f9eeca106725 466 uint32_t ReceiveAll; /*!< Selects or not all frames reception by the MAC (No filtering).
Kojto 122:f9eeca106725 467 This parameter can be a value of @ref ETH_Receive_All */
Kojto 122:f9eeca106725 468
Kojto 122:f9eeca106725 469 uint32_t SourceAddrFilter; /*!< Selects the Source Address Filter mode.
Kojto 122:f9eeca106725 470 This parameter can be a value of @ref ETH_Source_Addr_Filter */
Kojto 122:f9eeca106725 471
Kojto 122:f9eeca106725 472 uint32_t PassControlFrames; /*!< Sets the forwarding mode of the control frames (including unicast and multicast PAUSE frames)
Kojto 122:f9eeca106725 473 This parameter can be a value of @ref ETH_Pass_Control_Frames */
Kojto 122:f9eeca106725 474
Kojto 122:f9eeca106725 475 uint32_t BroadcastFramesReception; /*!< Selects or not the reception of Broadcast Frames.
Kojto 122:f9eeca106725 476 This parameter can be a value of @ref ETH_Broadcast_Frames_Reception */
Kojto 122:f9eeca106725 477
Kojto 122:f9eeca106725 478 uint32_t DestinationAddrFilter; /*!< Sets the destination filter mode for both unicast and multicast frames.
Kojto 122:f9eeca106725 479 This parameter can be a value of @ref ETH_Destination_Addr_Filter */
Kojto 122:f9eeca106725 480
Kojto 122:f9eeca106725 481 uint32_t PromiscuousMode; /*!< Selects or not the Promiscuous Mode
Kojto 122:f9eeca106725 482 This parameter can be a value of @ref ETH_Promiscuous_Mode */
Kojto 122:f9eeca106725 483
Kojto 122:f9eeca106725 484 uint32_t MulticastFramesFilter; /*!< Selects the Multicast Frames filter mode: None/HashTableFilter/PerfectFilter/PerfectHashTableFilter.
Kojto 122:f9eeca106725 485 This parameter can be a value of @ref ETH_Multicast_Frames_Filter */
Kojto 122:f9eeca106725 486
Kojto 122:f9eeca106725 487 uint32_t UnicastFramesFilter; /*!< Selects the Unicast Frames filter mode: HashTableFilter/PerfectFilter/PerfectHashTableFilter.
Kojto 122:f9eeca106725 488 This parameter can be a value of @ref ETH_Unicast_Frames_Filter */
Kojto 122:f9eeca106725 489
Kojto 122:f9eeca106725 490 uint32_t HashTableHigh; /*!< This field holds the higher 32 bits of Hash table.
Kojto 122:f9eeca106725 491 This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
Kojto 122:f9eeca106725 492
Kojto 122:f9eeca106725 493 uint32_t HashTableLow; /*!< This field holds the lower 32 bits of Hash table.
Kojto 122:f9eeca106725 494 This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFFFFFF */
Kojto 122:f9eeca106725 495
Kojto 122:f9eeca106725 496 uint32_t PauseTime; /*!< This field holds the value to be used in the Pause Time field in the transmit control frame.
Kojto 122:f9eeca106725 497 This parameter must be a number between Min_Data = 0x0 and Max_Data = 0xFFFF */
Kojto 122:f9eeca106725 498
Kojto 122:f9eeca106725 499 uint32_t ZeroQuantaPause; /*!< Selects or not the automatic generation of Zero-Quanta Pause Control frames.
Kojto 122:f9eeca106725 500 This parameter can be a value of @ref ETH_Zero_Quanta_Pause */
Kojto 122:f9eeca106725 501
Kojto 122:f9eeca106725 502 uint32_t PauseLowThreshold; /*!< This field configures the threshold of the PAUSE to be checked for
Kojto 122:f9eeca106725 503 automatic retransmission of PAUSE Frame.
Kojto 122:f9eeca106725 504 This parameter can be a value of @ref ETH_Pause_Low_Threshold */
Kojto 122:f9eeca106725 505
Kojto 122:f9eeca106725 506 uint32_t UnicastPauseFrameDetect; /*!< Selects or not the MAC detection of the Pause frames (with MAC Address0
Kojto 122:f9eeca106725 507 unicast address and unique multicast address).
Kojto 122:f9eeca106725 508 This parameter can be a value of @ref ETH_Unicast_Pause_Frame_Detect */
Kojto 122:f9eeca106725 509
Kojto 122:f9eeca106725 510 uint32_t ReceiveFlowControl; /*!< Enables or disables the MAC to decode the received Pause frame and
Kojto 122:f9eeca106725 511 disable its transmitter for a specified time (Pause Time)
Kojto 122:f9eeca106725 512 This parameter can be a value of @ref ETH_Receive_Flow_Control */
Kojto 122:f9eeca106725 513
Kojto 122:f9eeca106725 514 uint32_t TransmitFlowControl; /*!< Enables or disables the MAC to transmit Pause frames (Full-Duplex mode)
Kojto 122:f9eeca106725 515 or the MAC back-pressure operation (Half-Duplex mode)
Kojto 122:f9eeca106725 516 This parameter can be a value of @ref ETH_Transmit_Flow_Control */
Kojto 122:f9eeca106725 517
Kojto 122:f9eeca106725 518 uint32_t VLANTagComparison; /*!< Selects the 12-bit VLAN identifier or the complete 16-bit VLAN tag for
Kojto 122:f9eeca106725 519 comparison and filtering.
Kojto 122:f9eeca106725 520 This parameter can be a value of @ref ETH_VLAN_Tag_Comparison */
Kojto 122:f9eeca106725 521
Kojto 122:f9eeca106725 522 uint32_t VLANTagIdentifier; /*!< Holds the VLAN tag identifier for receive frames */
Kojto 122:f9eeca106725 523
Kojto 122:f9eeca106725 524 } ETH_MACInitTypeDef;
Kojto 122:f9eeca106725 525
Kojto 122:f9eeca106725 526
Kojto 122:f9eeca106725 527 /**
Kojto 122:f9eeca106725 528 * @brief ETH DMA Configuration Structure definition
Kojto 122:f9eeca106725 529 */
Kojto 122:f9eeca106725 530
Kojto 122:f9eeca106725 531 typedef struct
Kojto 122:f9eeca106725 532 {
Kojto 122:f9eeca106725 533 uint32_t DropTCPIPChecksumErrorFrame; /*!< Selects or not the Dropping of TCP/IP Checksum Error Frames.
Kojto 122:f9eeca106725 534 This parameter can be a value of @ref ETH_Drop_TCP_IP_Checksum_Error_Frame */
Kojto 122:f9eeca106725 535
Kojto 122:f9eeca106725 536 uint32_t ReceiveStoreForward; /*!< Enables or disables the Receive store and forward mode.
Kojto 122:f9eeca106725 537 This parameter can be a value of @ref ETH_Receive_Store_Forward */
Kojto 122:f9eeca106725 538
Kojto 122:f9eeca106725 539 uint32_t FlushReceivedFrame; /*!< Enables or disables the flushing of received frames.
Kojto 122:f9eeca106725 540 This parameter can be a value of @ref ETH_Flush_Received_Frame */
Kojto 122:f9eeca106725 541
Kojto 122:f9eeca106725 542 uint32_t TransmitStoreForward; /*!< Enables or disables Transmit store and forward mode.
Kojto 122:f9eeca106725 543 This parameter can be a value of @ref ETH_Transmit_Store_Forward */
Kojto 122:f9eeca106725 544
Kojto 122:f9eeca106725 545 uint32_t TransmitThresholdControl; /*!< Selects or not the Transmit Threshold Control.
Kojto 122:f9eeca106725 546 This parameter can be a value of @ref ETH_Transmit_Threshold_Control */
Kojto 122:f9eeca106725 547
Kojto 122:f9eeca106725 548 uint32_t ForwardErrorFrames; /*!< Selects or not the forward to the DMA of erroneous frames.
Kojto 122:f9eeca106725 549 This parameter can be a value of @ref ETH_Forward_Error_Frames */
Kojto 122:f9eeca106725 550
Kojto 122:f9eeca106725 551 uint32_t ForwardUndersizedGoodFrames; /*!< Enables or disables the Rx FIFO to forward Undersized frames (frames with no Error
Kojto 122:f9eeca106725 552 and length less than 64 bytes) including pad-bytes and CRC)
Kojto 122:f9eeca106725 553 This parameter can be a value of @ref ETH_Forward_Undersized_Good_Frames */
Kojto 122:f9eeca106725 554
Kojto 122:f9eeca106725 555 uint32_t ReceiveThresholdControl; /*!< Selects the threshold level of the Receive FIFO.
Kojto 122:f9eeca106725 556 This parameter can be a value of @ref ETH_Receive_Threshold_Control */
Kojto 122:f9eeca106725 557
Kojto 122:f9eeca106725 558 uint32_t SecondFrameOperate; /*!< Selects or not the Operate on second frame mode, which allows the DMA to process a second
Kojto 122:f9eeca106725 559 frame of Transmit data even before obtaining the status for the first frame.
Kojto 122:f9eeca106725 560 This parameter can be a value of @ref ETH_Second_Frame_Operate */
Kojto 122:f9eeca106725 561
Kojto 122:f9eeca106725 562 uint32_t AddressAlignedBeats; /*!< Enables or disables the Address Aligned Beats.
Kojto 122:f9eeca106725 563 This parameter can be a value of @ref ETH_Address_Aligned_Beats */
Kojto 122:f9eeca106725 564
Kojto 122:f9eeca106725 565 uint32_t FixedBurst; /*!< Enables or disables the AHB Master interface fixed burst transfers.
Kojto 122:f9eeca106725 566 This parameter can be a value of @ref ETH_Fixed_Burst */
Kojto 122:f9eeca106725 567
Kojto 122:f9eeca106725 568 uint32_t RxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Rx DMA transaction.
Kojto 122:f9eeca106725 569 This parameter can be a value of @ref ETH_Rx_DMA_Burst_Length */
Kojto 122:f9eeca106725 570
Kojto 122:f9eeca106725 571 uint32_t TxDMABurstLength; /*!< Indicates the maximum number of beats to be transferred in one Tx DMA transaction.
Kojto 122:f9eeca106725 572 This parameter can be a value of @ref ETH_Tx_DMA_Burst_Length */
Kojto 122:f9eeca106725 573
Kojto 122:f9eeca106725 574 uint32_t EnhancedDescriptorFormat; /*!< Enables the enhanced descriptor format.
Kojto 122:f9eeca106725 575 This parameter can be a value of @ref ETH_DMA_Enhanced_descriptor_format */
Kojto 122:f9eeca106725 576
Kojto 122:f9eeca106725 577 uint32_t DescriptorSkipLength; /*!< Specifies the number of word to skip between two unchained descriptors (Ring mode)
Kojto 122:f9eeca106725 578 This parameter must be a number between Min_Data = 0 and Max_Data = 32 */
Kojto 122:f9eeca106725 579
Kojto 122:f9eeca106725 580 uint32_t DMAArbitration; /*!< Selects the DMA Tx/Rx arbitration.
Kojto 122:f9eeca106725 581 This parameter can be a value of @ref ETH_DMA_Arbitration */
Kojto 122:f9eeca106725 582 } ETH_DMAInitTypeDef;
Kojto 122:f9eeca106725 583
Kojto 122:f9eeca106725 584
Kojto 122:f9eeca106725 585 /**
Kojto 122:f9eeca106725 586 * @brief ETH DMA Descriptors data structure definition
Kojto 122:f9eeca106725 587 */
Kojto 122:f9eeca106725 588
Kojto 122:f9eeca106725 589 typedef struct
Kojto 122:f9eeca106725 590 {
Kojto 122:f9eeca106725 591 __IO uint32_t Status; /*!< Status */
Kojto 122:f9eeca106725 592
Kojto 122:f9eeca106725 593 uint32_t ControlBufferSize; /*!< Control and Buffer1, Buffer2 lengths */
Kojto 122:f9eeca106725 594
Kojto 122:f9eeca106725 595 uint32_t Buffer1Addr; /*!< Buffer1 address pointer */
Kojto 122:f9eeca106725 596
Kojto 122:f9eeca106725 597 uint32_t Buffer2NextDescAddr; /*!< Buffer2 or next descriptor address pointer */
Kojto 122:f9eeca106725 598
Kojto 122:f9eeca106725 599 /*!< Enhanced Ethernet DMA PTP Descriptors */
Kojto 122:f9eeca106725 600 uint32_t ExtendedStatus; /*!< Extended status for PTP receive descriptor */
Kojto 122:f9eeca106725 601
Kojto 122:f9eeca106725 602 uint32_t Reserved1; /*!< Reserved */
Kojto 122:f9eeca106725 603
Kojto 122:f9eeca106725 604 uint32_t TimeStampLow; /*!< Time Stamp Low value for transmit and receive */
Kojto 122:f9eeca106725 605
Kojto 122:f9eeca106725 606 uint32_t TimeStampHigh; /*!< Time Stamp High value for transmit and receive */
Kojto 122:f9eeca106725 607
Kojto 122:f9eeca106725 608 } ETH_DMADescTypeDef;
Kojto 122:f9eeca106725 609
Kojto 122:f9eeca106725 610
Kojto 122:f9eeca106725 611 /**
Kojto 122:f9eeca106725 612 * @brief Received Frame Informations structure definition
Kojto 122:f9eeca106725 613 */
Kojto 122:f9eeca106725 614 typedef struct
Kojto 122:f9eeca106725 615 {
Kojto 122:f9eeca106725 616 ETH_DMADescTypeDef *FSRxDesc; /*!< First Segment Rx Desc */
Kojto 122:f9eeca106725 617
Kojto 122:f9eeca106725 618 ETH_DMADescTypeDef *LSRxDesc; /*!< Last Segment Rx Desc */
Kojto 122:f9eeca106725 619
Kojto 122:f9eeca106725 620 uint32_t SegCount; /*!< Segment count */
Kojto 122:f9eeca106725 621
Kojto 122:f9eeca106725 622 uint32_t length; /*!< Frame length */
Kojto 122:f9eeca106725 623
Kojto 122:f9eeca106725 624 uint32_t buffer; /*!< Frame buffer */
Kojto 122:f9eeca106725 625
Kojto 122:f9eeca106725 626 } ETH_DMARxFrameInfos;
Kojto 122:f9eeca106725 627
Kojto 122:f9eeca106725 628
Kojto 122:f9eeca106725 629 /**
Kojto 122:f9eeca106725 630 * @brief ETH Handle Structure definition
Kojto 122:f9eeca106725 631 */
Kojto 122:f9eeca106725 632
Kojto 122:f9eeca106725 633 typedef struct
Kojto 122:f9eeca106725 634 {
Kojto 122:f9eeca106725 635 ETH_TypeDef *Instance; /*!< Register base address */
Kojto 122:f9eeca106725 636
Kojto 122:f9eeca106725 637 ETH_InitTypeDef Init; /*!< Ethernet Init Configuration */
Kojto 122:f9eeca106725 638
Kojto 122:f9eeca106725 639 uint32_t LinkStatus; /*!< Ethernet link status */
Kojto 122:f9eeca106725 640
Kojto 122:f9eeca106725 641 ETH_DMADescTypeDef *RxDesc; /*!< Rx descriptor to Get */
Kojto 122:f9eeca106725 642
Kojto 122:f9eeca106725 643 ETH_DMADescTypeDef *TxDesc; /*!< Tx descriptor to Set */
Kojto 122:f9eeca106725 644
Kojto 122:f9eeca106725 645 ETH_DMARxFrameInfos RxFrameInfos; /*!< last Rx frame infos */
Kojto 122:f9eeca106725 646
Kojto 122:f9eeca106725 647 __IO HAL_ETH_StateTypeDef State; /*!< ETH communication state */
Kojto 122:f9eeca106725 648
Kojto 122:f9eeca106725 649 HAL_LockTypeDef Lock; /*!< ETH Lock */
Kojto 122:f9eeca106725 650
Kojto 122:f9eeca106725 651 } ETH_HandleTypeDef;
Kojto 122:f9eeca106725 652
Kojto 122:f9eeca106725 653 /**
Kojto 122:f9eeca106725 654 * @}
Kojto 122:f9eeca106725 655 */
Kojto 122:f9eeca106725 656
Kojto 122:f9eeca106725 657 /* Exported constants --------------------------------------------------------*/
Kojto 122:f9eeca106725 658 /** @defgroup ETH_Exported_Constants ETH Exported Constants
Kojto 122:f9eeca106725 659 * @{
Kojto 122:f9eeca106725 660 */
Kojto 122:f9eeca106725 661
Kojto 122:f9eeca106725 662 /** @defgroup ETH_Buffers_setting ETH Buffers setting
Kojto 122:f9eeca106725 663 * @{
Kojto 122:f9eeca106725 664 */
Kojto 122:f9eeca106725 665 #define ETH_MAX_PACKET_SIZE ((uint32_t)1524U) /*!< ETH_HEADER + ETH_EXTRA + ETH_VLAN_TAG + ETH_MAX_ETH_PAYLOAD + ETH_CRC */
Kojto 122:f9eeca106725 666 #define ETH_HEADER ((uint32_t)14U) /*!< 6 byte Dest addr, 6 byte Src addr, 2 byte length/type */
Kojto 122:f9eeca106725 667 #define ETH_CRC ((uint32_t)4U) /*!< Ethernet CRC */
Kojto 122:f9eeca106725 668 #define ETH_EXTRA ((uint32_t)2U) /*!< Extra bytes in some cases */
Kojto 122:f9eeca106725 669 #define ETH_VLAN_TAG ((uint32_t)4U) /*!< optional 802.1q VLAN Tag */
Kojto 122:f9eeca106725 670 #define ETH_MIN_ETH_PAYLOAD ((uint32_t)46U) /*!< Minimum Ethernet payload size */
Kojto 122:f9eeca106725 671 #define ETH_MAX_ETH_PAYLOAD ((uint32_t)1500U) /*!< Maximum Ethernet payload size */
Kojto 122:f9eeca106725 672 #define ETH_JUMBO_FRAME_PAYLOAD ((uint32_t)9000U) /*!< Jumbo frame payload size */
Kojto 122:f9eeca106725 673
Kojto 122:f9eeca106725 674 /* Ethernet driver receive buffers are organized in a chained linked-list, when
Kojto 122:f9eeca106725 675 an Ethernet packet is received, the Rx-DMA will transfer the packet from RxFIFO
Kojto 122:f9eeca106725 676 to the driver receive buffers memory.
Kojto 122:f9eeca106725 677
Kojto 122:f9eeca106725 678 Depending on the size of the received Ethernet packet and the size of
Kojto 122:f9eeca106725 679 each Ethernet driver receive buffer, the received packet can take one or more
Kojto 122:f9eeca106725 680 Ethernet driver receive buffer.
Kojto 122:f9eeca106725 681
Kojto 122:f9eeca106725 682 In below are defined the size of one Ethernet driver receive buffer ETH_RX_BUF_SIZE
Kojto 122:f9eeca106725 683 and the total count of the driver receive buffers ETH_RXBUFNB.
Kojto 122:f9eeca106725 684
Kojto 122:f9eeca106725 685 The configured value for ETH_RX_BUF_SIZE and ETH_RXBUFNB are only provided as
Kojto 122:f9eeca106725 686 example, they can be reconfigured in the application layer to fit the application
Kojto 122:f9eeca106725 687 needs */
Kojto 122:f9eeca106725 688
Kojto 122:f9eeca106725 689 /* Here we configure each Ethernet driver receive buffer to fit the Max size Ethernet
Kojto 122:f9eeca106725 690 packet */
Kojto 122:f9eeca106725 691 #ifndef ETH_RX_BUF_SIZE
Kojto 122:f9eeca106725 692 #define ETH_RX_BUF_SIZE ETH_MAX_PACKET_SIZE
Kojto 122:f9eeca106725 693 #endif
Kojto 122:f9eeca106725 694
Kojto 122:f9eeca106725 695 /* 5 Ethernet driver receive buffers are used (in a chained linked list)*/
Kojto 122:f9eeca106725 696 #ifndef ETH_RXBUFNB
<> 135:176b8275d35d 697 #define ETH_RXBUFNB ((uint32_t)5U) /* 5 Rx buffers of size ETH_RX_BUF_SIZE */
Kojto 122:f9eeca106725 698 #endif
Kojto 122:f9eeca106725 699
Kojto 122:f9eeca106725 700
Kojto 122:f9eeca106725 701 /* Ethernet driver transmit buffers are organized in a chained linked-list, when
Kojto 122:f9eeca106725 702 an Ethernet packet is transmitted, Tx-DMA will transfer the packet from the
Kojto 122:f9eeca106725 703 driver transmit buffers memory to the TxFIFO.
Kojto 122:f9eeca106725 704
Kojto 122:f9eeca106725 705 Depending on the size of the Ethernet packet to be transmitted and the size of
Kojto 122:f9eeca106725 706 each Ethernet driver transmit buffer, the packet to be transmitted can take
Kojto 122:f9eeca106725 707 one or more Ethernet driver transmit buffer.
Kojto 122:f9eeca106725 708
Kojto 122:f9eeca106725 709 In below are defined the size of one Ethernet driver transmit buffer ETH_TX_BUF_SIZE
Kojto 122:f9eeca106725 710 and the total count of the driver transmit buffers ETH_TXBUFNB.
Kojto 122:f9eeca106725 711
Kojto 122:f9eeca106725 712 The configured value for ETH_TX_BUF_SIZE and ETH_TXBUFNB are only provided as
Kojto 122:f9eeca106725 713 example, they can be reconfigured in the application layer to fit the application
Kojto 122:f9eeca106725 714 needs */
Kojto 122:f9eeca106725 715
Kojto 122:f9eeca106725 716 /* Here we configure each Ethernet driver transmit buffer to fit the Max size Ethernet
Kojto 122:f9eeca106725 717 packet */
Kojto 122:f9eeca106725 718 #ifndef ETH_TX_BUF_SIZE
Kojto 122:f9eeca106725 719 #define ETH_TX_BUF_SIZE ETH_MAX_PACKET_SIZE
Kojto 122:f9eeca106725 720 #endif
Kojto 122:f9eeca106725 721
Kojto 122:f9eeca106725 722 /* 5 Ethernet driver transmit buffers are used (in a chained linked list)*/
Kojto 122:f9eeca106725 723 #ifndef ETH_TXBUFNB
<> 135:176b8275d35d 724 #define ETH_TXBUFNB ((uint32_t)5U) /* 5 Tx buffers of size ETH_TX_BUF_SIZE */
Kojto 122:f9eeca106725 725 #endif
Kojto 122:f9eeca106725 726
Kojto 122:f9eeca106725 727 /**
Kojto 122:f9eeca106725 728 * @}
Kojto 122:f9eeca106725 729 */
Kojto 122:f9eeca106725 730
Kojto 122:f9eeca106725 731 /** @defgroup ETH_DMA_TX_Descriptor ETH DMA TX Descriptor
Kojto 122:f9eeca106725 732 * @{
Kojto 122:f9eeca106725 733 */
Kojto 122:f9eeca106725 734
Kojto 122:f9eeca106725 735 /*
Kojto 122:f9eeca106725 736 DMA Tx Descriptor
Kojto 122:f9eeca106725 737 -----------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 738 TDES0 | OWN(31) | CTRL[30:26] | Reserved[25:24] | CTRL[23:20] | Reserved[19:17] | Status[16:0] |
Kojto 122:f9eeca106725 739 -----------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 740 TDES1 | Reserved[31:29] | Buffer2 ByteCount[28:16] | Reserved[15:13] | Buffer1 ByteCount[12:0] |
Kojto 122:f9eeca106725 741 -----------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 742 TDES2 | Buffer1 Address [31:0] |
Kojto 122:f9eeca106725 743 -----------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 744 TDES3 | Buffer2 Address [31:0] / Next Descriptor Address [31:0] |
Kojto 122:f9eeca106725 745 -----------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 746 */
Kojto 122:f9eeca106725 747
Kojto 122:f9eeca106725 748 /**
Kojto 122:f9eeca106725 749 * @brief Bit definition of TDES0 register: DMA Tx descriptor status register
Kojto 122:f9eeca106725 750 */
Kojto 122:f9eeca106725 751 #define ETH_DMATXDESC_OWN ((uint32_t)0x80000000U) /*!< OWN bit: descriptor is owned by DMA engine */
Kojto 122:f9eeca106725 752 #define ETH_DMATXDESC_IC ((uint32_t)0x40000000U) /*!< Interrupt on Completion */
Kojto 122:f9eeca106725 753 #define ETH_DMATXDESC_LS ((uint32_t)0x20000000U) /*!< Last Segment */
Kojto 122:f9eeca106725 754 #define ETH_DMATXDESC_FS ((uint32_t)0x10000000U) /*!< First Segment */
Kojto 122:f9eeca106725 755 #define ETH_DMATXDESC_DC ((uint32_t)0x08000000U) /*!< Disable CRC */
Kojto 122:f9eeca106725 756 #define ETH_DMATXDESC_DP ((uint32_t)0x04000000U) /*!< Disable Padding */
Kojto 122:f9eeca106725 757 #define ETH_DMATXDESC_TTSE ((uint32_t)0x02000000U) /*!< Transmit Time Stamp Enable */
Kojto 122:f9eeca106725 758 #define ETH_DMATXDESC_CIC ((uint32_t)0x00C00000U) /*!< Checksum Insertion Control: 4 cases */
Kojto 122:f9eeca106725 759 #define ETH_DMATXDESC_CIC_BYPASS ((uint32_t)0x00000000U) /*!< Do Nothing: Checksum Engine is bypassed */
Kojto 122:f9eeca106725 760 #define ETH_DMATXDESC_CIC_IPV4HEADER ((uint32_t)0x00400000U) /*!< IPV4 header Checksum Insertion */
Kojto 122:f9eeca106725 761 #define ETH_DMATXDESC_CIC_TCPUDPICMP_SEGMENT ((uint32_t)0x00800000U) /*!< TCP/UDP/ICMP Checksum Insertion calculated over segment only */
Kojto 122:f9eeca106725 762 #define ETH_DMATXDESC_CIC_TCPUDPICMP_FULL ((uint32_t)0x00C00000U) /*!< TCP/UDP/ICMP Checksum Insertion fully calculated */
Kojto 122:f9eeca106725 763 #define ETH_DMATXDESC_TER ((uint32_t)0x00200000U) /*!< Transmit End of Ring */
Kojto 122:f9eeca106725 764 #define ETH_DMATXDESC_TCH ((uint32_t)0x00100000U) /*!< Second Address Chained */
Kojto 122:f9eeca106725 765 #define ETH_DMATXDESC_TTSS ((uint32_t)0x00020000U) /*!< Tx Time Stamp Status */
Kojto 122:f9eeca106725 766 #define ETH_DMATXDESC_IHE ((uint32_t)0x00010000U) /*!< IP Header Error */
Kojto 122:f9eeca106725 767 #define ETH_DMATXDESC_ES ((uint32_t)0x00008000U) /*!< Error summary: OR of the following bits: UE || ED || EC || LCO || NC || LCA || FF || JT */
Kojto 122:f9eeca106725 768 #define ETH_DMATXDESC_JT ((uint32_t)0x00004000U) /*!< Jabber Timeout */
Kojto 122:f9eeca106725 769 #define ETH_DMATXDESC_FF ((uint32_t)0x00002000U) /*!< Frame Flushed: DMA/MTL flushed the frame due to SW flush */
Kojto 122:f9eeca106725 770 #define ETH_DMATXDESC_PCE ((uint32_t)0x00001000U) /*!< Payload Checksum Error */
Kojto 122:f9eeca106725 771 #define ETH_DMATXDESC_LCA ((uint32_t)0x00000800U) /*!< Loss of Carrier: carrier lost during transmission */
Kojto 122:f9eeca106725 772 #define ETH_DMATXDESC_NC ((uint32_t)0x00000400U) /*!< No Carrier: no carrier signal from the transceiver */
Kojto 122:f9eeca106725 773 #define ETH_DMATXDESC_LCO ((uint32_t)0x00000200U) /*!< Late Collision: transmission aborted due to collision */
Kojto 122:f9eeca106725 774 #define ETH_DMATXDESC_EC ((uint32_t)0x00000100U) /*!< Excessive Collision: transmission aborted after 16 collisions */
Kojto 122:f9eeca106725 775 #define ETH_DMATXDESC_VF ((uint32_t)0x00000080U) /*!< VLAN Frame */
Kojto 122:f9eeca106725 776 #define ETH_DMATXDESC_CC ((uint32_t)0x00000078U) /*!< Collision Count */
Kojto 122:f9eeca106725 777 #define ETH_DMATXDESC_ED ((uint32_t)0x00000004U) /*!< Excessive Deferral */
Kojto 122:f9eeca106725 778 #define ETH_DMATXDESC_UF ((uint32_t)0x00000002U) /*!< Underflow Error: late data arrival from the memory */
Kojto 122:f9eeca106725 779 #define ETH_DMATXDESC_DB ((uint32_t)0x00000001U) /*!< Deferred Bit */
Kojto 122:f9eeca106725 780
Kojto 122:f9eeca106725 781 /**
Kojto 122:f9eeca106725 782 * @brief Bit definition of TDES1 register
Kojto 122:f9eeca106725 783 */
Kojto 122:f9eeca106725 784 #define ETH_DMATXDESC_TBS2 ((uint32_t)0x1FFF0000U) /*!< Transmit Buffer2 Size */
Kojto 122:f9eeca106725 785 #define ETH_DMATXDESC_TBS1 ((uint32_t)0x00001FFFU) /*!< Transmit Buffer1 Size */
Kojto 122:f9eeca106725 786
Kojto 122:f9eeca106725 787 /**
Kojto 122:f9eeca106725 788 * @brief Bit definition of TDES2 register
Kojto 122:f9eeca106725 789 */
Kojto 122:f9eeca106725 790 #define ETH_DMATXDESC_B1AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer1 Address Pointer */
Kojto 122:f9eeca106725 791
Kojto 122:f9eeca106725 792 /**
Kojto 122:f9eeca106725 793 * @brief Bit definition of TDES3 register
Kojto 122:f9eeca106725 794 */
Kojto 122:f9eeca106725 795 #define ETH_DMATXDESC_B2AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer2 Address Pointer */
Kojto 122:f9eeca106725 796
Kojto 122:f9eeca106725 797 /*---------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 798 TDES6 | Transmit Time Stamp Low [31:0] |
Kojto 122:f9eeca106725 799 -----------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 800 TDES7 | Transmit Time Stamp High [31:0] |
Kojto 122:f9eeca106725 801 ----------------------------------------------------------------------------------------------*/
Kojto 122:f9eeca106725 802
Kojto 122:f9eeca106725 803 /* Bit definition of TDES6 register */
Kojto 122:f9eeca106725 804 #define ETH_DMAPTPTXDESC_TTSL ((uint32_t)0xFFFFFFFFU) /* Transmit Time Stamp Low */
Kojto 122:f9eeca106725 805
Kojto 122:f9eeca106725 806 /* Bit definition of TDES7 register */
Kojto 122:f9eeca106725 807 #define ETH_DMAPTPTXDESC_TTSH ((uint32_t)0xFFFFFFFFU) /* Transmit Time Stamp High */
Kojto 122:f9eeca106725 808
Kojto 122:f9eeca106725 809 /**
Kojto 122:f9eeca106725 810 * @}
Kojto 122:f9eeca106725 811 */
Kojto 122:f9eeca106725 812 /** @defgroup ETH_DMA_RX_Descriptor ETH DMA RX Descriptor
Kojto 122:f9eeca106725 813 * @{
Kojto 122:f9eeca106725 814 */
Kojto 122:f9eeca106725 815
Kojto 122:f9eeca106725 816 /*
Kojto 122:f9eeca106725 817 DMA Rx Descriptor
Kojto 122:f9eeca106725 818 --------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 819 RDES0 | OWN(31) | Status [30:0] |
Kojto 122:f9eeca106725 820 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 821 RDES1 | CTRL(31) | Reserved[30:29] | Buffer2 ByteCount[28:16] | CTRL[15:14] | Reserved(13) | Buffer1 ByteCount[12:0] |
Kojto 122:f9eeca106725 822 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 823 RDES2 | Buffer1 Address [31:0] |
Kojto 122:f9eeca106725 824 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 825 RDES3 | Buffer2 Address [31:0] / Next Descriptor Address [31:0] |
Kojto 122:f9eeca106725 826 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 827 */
Kojto 122:f9eeca106725 828
Kojto 122:f9eeca106725 829 /**
Kojto 122:f9eeca106725 830 * @brief Bit definition of RDES0 register: DMA Rx descriptor status register
Kojto 122:f9eeca106725 831 */
Kojto 122:f9eeca106725 832 #define ETH_DMARXDESC_OWN ((uint32_t)0x80000000U) /*!< OWN bit: descriptor is owned by DMA engine */
Kojto 122:f9eeca106725 833 #define ETH_DMARXDESC_AFM ((uint32_t)0x40000000U) /*!< DA Filter Fail for the rx frame */
Kojto 122:f9eeca106725 834 #define ETH_DMARXDESC_FL ((uint32_t)0x3FFF0000U) /*!< Receive descriptor frame length */
Kojto 122:f9eeca106725 835 #define ETH_DMARXDESC_ES ((uint32_t)0x00008000U) /*!< Error summary: OR of the following bits: DE || OE || IPC || LC || RWT || RE || CE */
Kojto 122:f9eeca106725 836 #define ETH_DMARXDESC_DE ((uint32_t)0x00004000U) /*!< Descriptor error: no more descriptors for receive frame */
Kojto 122:f9eeca106725 837 #define ETH_DMARXDESC_SAF ((uint32_t)0x00002000U) /*!< SA Filter Fail for the received frame */
Kojto 122:f9eeca106725 838 #define ETH_DMARXDESC_LE ((uint32_t)0x00001000U) /*!< Frame size not matching with length field */
Kojto 122:f9eeca106725 839 #define ETH_DMARXDESC_OE ((uint32_t)0x00000800U) /*!< Overflow Error: Frame was damaged due to buffer overflow */
Kojto 122:f9eeca106725 840 #define ETH_DMARXDESC_VLAN ((uint32_t)0x00000400U) /*!< VLAN Tag: received frame is a VLAN frame */
Kojto 122:f9eeca106725 841 #define ETH_DMARXDESC_FS ((uint32_t)0x00000200U) /*!< First descriptor of the frame */
Kojto 122:f9eeca106725 842 #define ETH_DMARXDESC_LS ((uint32_t)0x00000100U) /*!< Last descriptor of the frame */
Kojto 122:f9eeca106725 843 #define ETH_DMARXDESC_IPV4HCE ((uint32_t)0x00000080U) /*!< IPC Checksum Error: Rx Ipv4 header checksum error */
Kojto 122:f9eeca106725 844 #define ETH_DMARXDESC_LC ((uint32_t)0x00000040U) /*!< Late collision occurred during reception */
Kojto 122:f9eeca106725 845 #define ETH_DMARXDESC_FT ((uint32_t)0x00000020U) /*!< Frame type - Ethernet, otherwise 802.3 */
Kojto 122:f9eeca106725 846 #define ETH_DMARXDESC_RWT ((uint32_t)0x00000010U) /*!< Receive Watchdog Timeout: watchdog timer expired during reception */
Kojto 122:f9eeca106725 847 #define ETH_DMARXDESC_RE ((uint32_t)0x00000008U) /*!< Receive error: error reported by MII interface */
Kojto 122:f9eeca106725 848 #define ETH_DMARXDESC_DBE ((uint32_t)0x00000004U) /*!< Dribble bit error: frame contains non int multiple of 8 bits */
Kojto 122:f9eeca106725 849 #define ETH_DMARXDESC_CE ((uint32_t)0x00000002U) /*!< CRC error */
Kojto 122:f9eeca106725 850 #define ETH_DMARXDESC_MAMPCE ((uint32_t)0x00000001U) /*!< Rx MAC Address/Payload Checksum Error: Rx MAC address matched/ Rx Payload Checksum Error */
Kojto 122:f9eeca106725 851
Kojto 122:f9eeca106725 852 /**
Kojto 122:f9eeca106725 853 * @brief Bit definition of RDES1 register
Kojto 122:f9eeca106725 854 */
Kojto 122:f9eeca106725 855 #define ETH_DMARXDESC_DIC ((uint32_t)0x80000000U) /*!< Disable Interrupt on Completion */
Kojto 122:f9eeca106725 856 #define ETH_DMARXDESC_RBS2 ((uint32_t)0x1FFF0000U) /*!< Receive Buffer2 Size */
Kojto 122:f9eeca106725 857 #define ETH_DMARXDESC_RER ((uint32_t)0x00008000U) /*!< Receive End of Ring */
Kojto 122:f9eeca106725 858 #define ETH_DMARXDESC_RCH ((uint32_t)0x00004000U) /*!< Second Address Chained */
Kojto 122:f9eeca106725 859 #define ETH_DMARXDESC_RBS1 ((uint32_t)0x00001FFFU) /*!< Receive Buffer1 Size */
Kojto 122:f9eeca106725 860
Kojto 122:f9eeca106725 861 /**
Kojto 122:f9eeca106725 862 * @brief Bit definition of RDES2 register
Kojto 122:f9eeca106725 863 */
Kojto 122:f9eeca106725 864 #define ETH_DMARXDESC_B1AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer1 Address Pointer */
Kojto 122:f9eeca106725 865
Kojto 122:f9eeca106725 866 /**
Kojto 122:f9eeca106725 867 * @brief Bit definition of RDES3 register
Kojto 122:f9eeca106725 868 */
Kojto 122:f9eeca106725 869 #define ETH_DMARXDESC_B2AP ((uint32_t)0xFFFFFFFFU) /*!< Buffer2 Address Pointer */
Kojto 122:f9eeca106725 870
Kojto 122:f9eeca106725 871 /*---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 872 RDES4 | Reserved[31:15] | Extended Status [14:0] |
Kojto 122:f9eeca106725 873 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 874 RDES5 | Reserved[31:0] |
Kojto 122:f9eeca106725 875 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 876 RDES6 | Receive Time Stamp Low [31:0] |
Kojto 122:f9eeca106725 877 ---------------------------------------------------------------------------------------------------------------------
Kojto 122:f9eeca106725 878 RDES7 | Receive Time Stamp High [31:0] |
Kojto 122:f9eeca106725 879 --------------------------------------------------------------------------------------------------------------------*/
Kojto 122:f9eeca106725 880
Kojto 122:f9eeca106725 881 /* Bit definition of RDES4 register */
Kojto 122:f9eeca106725 882 #define ETH_DMAPTPRXDESC_PTPV ((uint32_t)0x00002000U) /* PTP Version */
Kojto 122:f9eeca106725 883 #define ETH_DMAPTPRXDESC_PTPFT ((uint32_t)0x00001000U) /* PTP Frame Type */
Kojto 122:f9eeca106725 884 #define ETH_DMAPTPRXDESC_PTPMT ((uint32_t)0x00000F00U) /* PTP Message Type */
Kojto 122:f9eeca106725 885 #define ETH_DMAPTPRXDESC_PTPMT_SYNC ((uint32_t)0x00000100U) /* SYNC message (all clock types) */
Kojto 122:f9eeca106725 886 #define ETH_DMAPTPRXDESC_PTPMT_FOLLOWUP ((uint32_t)0x00000200U) /* FollowUp message (all clock types) */
Kojto 122:f9eeca106725 887 #define ETH_DMAPTPRXDESC_PTPMT_DELAYREQ ((uint32_t)0x00000300U) /* DelayReq message (all clock types) */
Kojto 122:f9eeca106725 888 #define ETH_DMAPTPRXDESC_PTPMT_DELAYRESP ((uint32_t)0x00000400U) /* DelayResp message (all clock types) */
Kojto 122:f9eeca106725 889 #define ETH_DMAPTPRXDESC_PTPMT_PDELAYREQ_ANNOUNCE ((uint32_t)0x00000500U) /* PdelayReq message (peer-to-peer transparent clock) or Announce message (Ordinary or Boundary clock) */
Kojto 122:f9eeca106725 890 #define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESP_MANAG ((uint32_t)0x00000600U) /* PdelayResp message (peer-to-peer transparent clock) or Management message (Ordinary or Boundary clock) */
Kojto 122:f9eeca106725 891 #define ETH_DMAPTPRXDESC_PTPMT_PDELAYRESPFOLLOWUP_SIGNAL ((uint32_t)0x00000700U) /* PdelayRespFollowUp message (peer-to-peer transparent clock) or Signaling message (Ordinary or Boundary clock) */
Kojto 122:f9eeca106725 892 #define ETH_DMAPTPRXDESC_IPV6PR ((uint32_t)0x00000080U) /* IPv6 Packet Received */
Kojto 122:f9eeca106725 893 #define ETH_DMAPTPRXDESC_IPV4PR ((uint32_t)0x00000040U) /* IPv4 Packet Received */
Kojto 122:f9eeca106725 894 #define ETH_DMAPTPRXDESC_IPCB ((uint32_t)0x00000020U) /* IP Checksum Bypassed */
Kojto 122:f9eeca106725 895 #define ETH_DMAPTPRXDESC_IPPE ((uint32_t)0x00000010U) /* IP Payload Error */
Kojto 122:f9eeca106725 896 #define ETH_DMAPTPRXDESC_IPHE ((uint32_t)0x00000008U) /* IP Header Error */
Kojto 122:f9eeca106725 897 #define ETH_DMAPTPRXDESC_IPPT ((uint32_t)0x00000007U) /* IP Payload Type */
Kojto 122:f9eeca106725 898 #define ETH_DMAPTPRXDESC_IPPT_UDP ((uint32_t)0x00000001U) /* UDP payload encapsulated in the IP datagram */
Kojto 122:f9eeca106725 899 #define ETH_DMAPTPRXDESC_IPPT_TCP ((uint32_t)0x00000002U) /* TCP payload encapsulated in the IP datagram */
Kojto 122:f9eeca106725 900 #define ETH_DMAPTPRXDESC_IPPT_ICMP ((uint32_t)0x00000003U) /* ICMP payload encapsulated in the IP datagram */
Kojto 122:f9eeca106725 901
Kojto 122:f9eeca106725 902 /* Bit definition of RDES6 register */
Kojto 122:f9eeca106725 903 #define ETH_DMAPTPRXDESC_RTSL ((uint32_t)0xFFFFFFFFU) /* Receive Time Stamp Low */
Kojto 122:f9eeca106725 904
Kojto 122:f9eeca106725 905 /* Bit definition of RDES7 register */
Kojto 122:f9eeca106725 906 #define ETH_DMAPTPRXDESC_RTSH ((uint32_t)0xFFFFFFFFU) /* Receive Time Stamp High */
Kojto 122:f9eeca106725 907 /**
Kojto 122:f9eeca106725 908 * @}
Kojto 122:f9eeca106725 909 */
Kojto 122:f9eeca106725 910 /** @defgroup ETH_AutoNegotiation ETH AutoNegotiation
Kojto 122:f9eeca106725 911 * @{
Kojto 122:f9eeca106725 912 */
Kojto 122:f9eeca106725 913 #define ETH_AUTONEGOTIATION_ENABLE ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 914 #define ETH_AUTONEGOTIATION_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 915
Kojto 122:f9eeca106725 916 /**
Kojto 122:f9eeca106725 917 * @}
Kojto 122:f9eeca106725 918 */
Kojto 122:f9eeca106725 919 /** @defgroup ETH_Speed ETH Speed
Kojto 122:f9eeca106725 920 * @{
Kojto 122:f9eeca106725 921 */
Kojto 122:f9eeca106725 922 #define ETH_SPEED_10M ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 923 #define ETH_SPEED_100M ((uint32_t)0x00004000U)
Kojto 122:f9eeca106725 924
Kojto 122:f9eeca106725 925 /**
Kojto 122:f9eeca106725 926 * @}
Kojto 122:f9eeca106725 927 */
Kojto 122:f9eeca106725 928 /** @defgroup ETH_Duplex_Mode ETH Duplex Mode
Kojto 122:f9eeca106725 929 * @{
Kojto 122:f9eeca106725 930 */
Kojto 122:f9eeca106725 931 #define ETH_MODE_FULLDUPLEX ((uint32_t)0x00000800U)
Kojto 122:f9eeca106725 932 #define ETH_MODE_HALFDUPLEX ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 933 /**
Kojto 122:f9eeca106725 934 * @}
Kojto 122:f9eeca106725 935 */
Kojto 122:f9eeca106725 936 /** @defgroup ETH_Rx_Mode ETH Rx Mode
Kojto 122:f9eeca106725 937 * @{
Kojto 122:f9eeca106725 938 */
Kojto 122:f9eeca106725 939 #define ETH_RXPOLLING_MODE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 940 #define ETH_RXINTERRUPT_MODE ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 941 /**
Kojto 122:f9eeca106725 942 * @}
Kojto 122:f9eeca106725 943 */
Kojto 122:f9eeca106725 944
Kojto 122:f9eeca106725 945 /** @defgroup ETH_Checksum_Mode ETH Checksum Mode
Kojto 122:f9eeca106725 946 * @{
Kojto 122:f9eeca106725 947 */
Kojto 122:f9eeca106725 948 #define ETH_CHECKSUM_BY_HARDWARE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 949 #define ETH_CHECKSUM_BY_SOFTWARE ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 950 /**
Kojto 122:f9eeca106725 951 * @}
Kojto 122:f9eeca106725 952 */
Kojto 122:f9eeca106725 953
Kojto 122:f9eeca106725 954 /** @defgroup ETH_Media_Interface ETH Media Interface
Kojto 122:f9eeca106725 955 * @{
Kojto 122:f9eeca106725 956 */
Kojto 122:f9eeca106725 957 #define ETH_MEDIA_INTERFACE_MII ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 958 #define ETH_MEDIA_INTERFACE_RMII ((uint32_t)SYSCFG_PMC_MII_RMII_SEL)
Kojto 122:f9eeca106725 959 /**
Kojto 122:f9eeca106725 960 * @}
Kojto 122:f9eeca106725 961 */
Kojto 122:f9eeca106725 962
Kojto 122:f9eeca106725 963 /** @defgroup ETH_Watchdog ETH Watchdog
Kojto 122:f9eeca106725 964 * @{
Kojto 122:f9eeca106725 965 */
Kojto 122:f9eeca106725 966 #define ETH_WATCHDOG_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 967 #define ETH_WATCHDOG_DISABLE ((uint32_t)0x00800000U)
Kojto 122:f9eeca106725 968 /**
Kojto 122:f9eeca106725 969 * @}
Kojto 122:f9eeca106725 970 */
Kojto 122:f9eeca106725 971
Kojto 122:f9eeca106725 972 /** @defgroup ETH_Jabber ETH Jabber
Kojto 122:f9eeca106725 973 * @{
Kojto 122:f9eeca106725 974 */
Kojto 122:f9eeca106725 975 #define ETH_JABBER_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 976 #define ETH_JABBER_DISABLE ((uint32_t)0x00400000U)
Kojto 122:f9eeca106725 977 /**
Kojto 122:f9eeca106725 978 * @}
Kojto 122:f9eeca106725 979 */
Kojto 122:f9eeca106725 980
Kojto 122:f9eeca106725 981 /** @defgroup ETH_Inter_Frame_Gap ETH Inter Frame Gap
Kojto 122:f9eeca106725 982 * @{
Kojto 122:f9eeca106725 983 */
Kojto 122:f9eeca106725 984 #define ETH_INTERFRAMEGAP_96BIT ((uint32_t)0x00000000U) /*!< minimum IFG between frames during transmission is 96Bit */
Kojto 122:f9eeca106725 985 #define ETH_INTERFRAMEGAP_88BIT ((uint32_t)0x00020000U) /*!< minimum IFG between frames during transmission is 88Bit */
Kojto 122:f9eeca106725 986 #define ETH_INTERFRAMEGAP_80BIT ((uint32_t)0x00040000U) /*!< minimum IFG between frames during transmission is 80Bit */
Kojto 122:f9eeca106725 987 #define ETH_INTERFRAMEGAP_72BIT ((uint32_t)0x00060000U) /*!< minimum IFG between frames during transmission is 72Bit */
Kojto 122:f9eeca106725 988 #define ETH_INTERFRAMEGAP_64BIT ((uint32_t)0x00080000U) /*!< minimum IFG between frames during transmission is 64Bit */
Kojto 122:f9eeca106725 989 #define ETH_INTERFRAMEGAP_56BIT ((uint32_t)0x000A0000U) /*!< minimum IFG between frames during transmission is 56Bit */
Kojto 122:f9eeca106725 990 #define ETH_INTERFRAMEGAP_48BIT ((uint32_t)0x000C0000U) /*!< minimum IFG between frames during transmission is 48Bit */
Kojto 122:f9eeca106725 991 #define ETH_INTERFRAMEGAP_40BIT ((uint32_t)0x000E0000U) /*!< minimum IFG between frames during transmission is 40Bit */
Kojto 122:f9eeca106725 992 /**
Kojto 122:f9eeca106725 993 * @}
Kojto 122:f9eeca106725 994 */
Kojto 122:f9eeca106725 995
Kojto 122:f9eeca106725 996 /** @defgroup ETH_Carrier_Sense ETH Carrier Sense
Kojto 122:f9eeca106725 997 * @{
Kojto 122:f9eeca106725 998 */
Kojto 122:f9eeca106725 999 #define ETH_CARRIERSENCE_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1000 #define ETH_CARRIERSENCE_DISABLE ((uint32_t)0x00010000U)
Kojto 122:f9eeca106725 1001 /**
Kojto 122:f9eeca106725 1002 * @}
Kojto 122:f9eeca106725 1003 */
Kojto 122:f9eeca106725 1004
Kojto 122:f9eeca106725 1005 /** @defgroup ETH_Receive_Own ETH Receive Own
Kojto 122:f9eeca106725 1006 * @{
Kojto 122:f9eeca106725 1007 */
Kojto 122:f9eeca106725 1008 #define ETH_RECEIVEOWN_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1009 #define ETH_RECEIVEOWN_DISABLE ((uint32_t)0x00002000U)
Kojto 122:f9eeca106725 1010 /**
Kojto 122:f9eeca106725 1011 * @}
Kojto 122:f9eeca106725 1012 */
Kojto 122:f9eeca106725 1013
Kojto 122:f9eeca106725 1014 /** @defgroup ETH_Loop_Back_Mode ETH Loop Back Mode
Kojto 122:f9eeca106725 1015 * @{
Kojto 122:f9eeca106725 1016 */
Kojto 122:f9eeca106725 1017 #define ETH_LOOPBACKMODE_ENABLE ((uint32_t)0x00001000U)
Kojto 122:f9eeca106725 1018 #define ETH_LOOPBACKMODE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1019 /**
Kojto 122:f9eeca106725 1020 * @}
Kojto 122:f9eeca106725 1021 */
Kojto 122:f9eeca106725 1022
Kojto 122:f9eeca106725 1023 /** @defgroup ETH_Checksum_Offload ETH Checksum Offload
Kojto 122:f9eeca106725 1024 * @{
Kojto 122:f9eeca106725 1025 */
Kojto 122:f9eeca106725 1026 #define ETH_CHECKSUMOFFLAOD_ENABLE ((uint32_t)0x00000400U)
Kojto 122:f9eeca106725 1027 #define ETH_CHECKSUMOFFLAOD_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1028 /**
Kojto 122:f9eeca106725 1029 * @}
Kojto 122:f9eeca106725 1030 */
Kojto 122:f9eeca106725 1031
Kojto 122:f9eeca106725 1032 /** @defgroup ETH_Retry_Transmission ETH Retry Transmission
Kojto 122:f9eeca106725 1033 * @{
Kojto 122:f9eeca106725 1034 */
Kojto 122:f9eeca106725 1035 #define ETH_RETRYTRANSMISSION_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1036 #define ETH_RETRYTRANSMISSION_DISABLE ((uint32_t)0x00000200U)
Kojto 122:f9eeca106725 1037 /**
Kojto 122:f9eeca106725 1038 * @}
Kojto 122:f9eeca106725 1039 */
Kojto 122:f9eeca106725 1040
Kojto 122:f9eeca106725 1041 /** @defgroup ETH_Automatic_Pad_CRC_Strip ETH Automatic Pad CRC Strip
Kojto 122:f9eeca106725 1042 * @{
Kojto 122:f9eeca106725 1043 */
Kojto 122:f9eeca106725 1044 #define ETH_AUTOMATICPADCRCSTRIP_ENABLE ((uint32_t)0x00000080U)
Kojto 122:f9eeca106725 1045 #define ETH_AUTOMATICPADCRCSTRIP_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1046 /**
Kojto 122:f9eeca106725 1047 * @}
Kojto 122:f9eeca106725 1048 */
Kojto 122:f9eeca106725 1049
Kojto 122:f9eeca106725 1050 /** @defgroup ETH_Back_Off_Limit ETH Back Off Limit
Kojto 122:f9eeca106725 1051 * @{
Kojto 122:f9eeca106725 1052 */
Kojto 122:f9eeca106725 1053 #define ETH_BACKOFFLIMIT_10 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1054 #define ETH_BACKOFFLIMIT_8 ((uint32_t)0x00000020U)
Kojto 122:f9eeca106725 1055 #define ETH_BACKOFFLIMIT_4 ((uint32_t)0x00000040U)
Kojto 122:f9eeca106725 1056 #define ETH_BACKOFFLIMIT_1 ((uint32_t)0x00000060U)
Kojto 122:f9eeca106725 1057 /**
Kojto 122:f9eeca106725 1058 * @}
Kojto 122:f9eeca106725 1059 */
Kojto 122:f9eeca106725 1060
Kojto 122:f9eeca106725 1061 /** @defgroup ETH_Deferral_Check ETH Deferral Check
Kojto 122:f9eeca106725 1062 * @{
Kojto 122:f9eeca106725 1063 */
Kojto 122:f9eeca106725 1064 #define ETH_DEFFERRALCHECK_ENABLE ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 1065 #define ETH_DEFFERRALCHECK_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1066 /**
Kojto 122:f9eeca106725 1067 * @}
Kojto 122:f9eeca106725 1068 */
Kojto 122:f9eeca106725 1069
Kojto 122:f9eeca106725 1070 /** @defgroup ETH_Receive_All ETH Receive All
Kojto 122:f9eeca106725 1071 * @{
Kojto 122:f9eeca106725 1072 */
Kojto 122:f9eeca106725 1073 #define ETH_RECEIVEALL_ENABLE ((uint32_t)0x80000000U)
Kojto 122:f9eeca106725 1074 #define ETH_RECEIVEAll_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1075 /**
Kojto 122:f9eeca106725 1076 * @}
Kojto 122:f9eeca106725 1077 */
Kojto 122:f9eeca106725 1078
Kojto 122:f9eeca106725 1079 /** @defgroup ETH_Source_Addr_Filter ETH Source Addr Filter
Kojto 122:f9eeca106725 1080 * @{
Kojto 122:f9eeca106725 1081 */
Kojto 122:f9eeca106725 1082 #define ETH_SOURCEADDRFILTER_NORMAL_ENABLE ((uint32_t)0x00000200U)
Kojto 122:f9eeca106725 1083 #define ETH_SOURCEADDRFILTER_INVERSE_ENABLE ((uint32_t)0x00000300U)
Kojto 122:f9eeca106725 1084 #define ETH_SOURCEADDRFILTER_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1085 /**
Kojto 122:f9eeca106725 1086 * @}
Kojto 122:f9eeca106725 1087 */
Kojto 122:f9eeca106725 1088
Kojto 122:f9eeca106725 1089 /** @defgroup ETH_Pass_Control_Frames ETH Pass Control Frames
Kojto 122:f9eeca106725 1090 * @{
Kojto 122:f9eeca106725 1091 */
Kojto 122:f9eeca106725 1092 #define ETH_PASSCONTROLFRAMES_BLOCKALL ((uint32_t)0x00000040U) /*!< MAC filters all control frames from reaching the application */
Kojto 122:f9eeca106725 1093 #define ETH_PASSCONTROLFRAMES_FORWARDALL ((uint32_t)0x00000080U) /*!< MAC forwards all control frames to application even if they fail the Address Filter */
Kojto 122:f9eeca106725 1094 #define ETH_PASSCONTROLFRAMES_FORWARDPASSEDADDRFILTER ((uint32_t)0x000000C0U) /*!< MAC forwards control frames that pass the Address Filter. */
Kojto 122:f9eeca106725 1095 /**
Kojto 122:f9eeca106725 1096 * @}
Kojto 122:f9eeca106725 1097 */
Kojto 122:f9eeca106725 1098
Kojto 122:f9eeca106725 1099 /** @defgroup ETH_Broadcast_Frames_Reception ETH Broadcast Frames Reception
Kojto 122:f9eeca106725 1100 * @{
Kojto 122:f9eeca106725 1101 */
Kojto 122:f9eeca106725 1102 #define ETH_BROADCASTFRAMESRECEPTION_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1103 #define ETH_BROADCASTFRAMESRECEPTION_DISABLE ((uint32_t)0x00000020U)
Kojto 122:f9eeca106725 1104 /**
Kojto 122:f9eeca106725 1105 * @}
Kojto 122:f9eeca106725 1106 */
Kojto 122:f9eeca106725 1107
Kojto 122:f9eeca106725 1108 /** @defgroup ETH_Destination_Addr_Filter ETH Destination Addr Filter
Kojto 122:f9eeca106725 1109 * @{
Kojto 122:f9eeca106725 1110 */
Kojto 122:f9eeca106725 1111 #define ETH_DESTINATIONADDRFILTER_NORMAL ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1112 #define ETH_DESTINATIONADDRFILTER_INVERSE ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 1113 /**
Kojto 122:f9eeca106725 1114 * @}
Kojto 122:f9eeca106725 1115 */
Kojto 122:f9eeca106725 1116
Kojto 122:f9eeca106725 1117 /** @defgroup ETH_Promiscuous_Mode ETH Promiscuous Mode
Kojto 122:f9eeca106725 1118 * @{
Kojto 122:f9eeca106725 1119 */
Kojto 122:f9eeca106725 1120 #define ETH_PROMISCUOUS_MODE_ENABLE ((uint32_t)0x00000001U)
Kojto 122:f9eeca106725 1121 #define ETH_PROMISCUOUS_MODE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1122 /**
Kojto 122:f9eeca106725 1123 * @}
Kojto 122:f9eeca106725 1124 */
Kojto 122:f9eeca106725 1125
Kojto 122:f9eeca106725 1126 /** @defgroup ETH_Multicast_Frames_Filter ETH Multicast Frames Filter
Kojto 122:f9eeca106725 1127 * @{
Kojto 122:f9eeca106725 1128 */
Kojto 122:f9eeca106725 1129 #define ETH_MULTICASTFRAMESFILTER_PERFECTHASHTABLE ((uint32_t)0x00000404U)
Kojto 122:f9eeca106725 1130 #define ETH_MULTICASTFRAMESFILTER_HASHTABLE ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 1131 #define ETH_MULTICASTFRAMESFILTER_PERFECT ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1132 #define ETH_MULTICASTFRAMESFILTER_NONE ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 1133 /**
Kojto 122:f9eeca106725 1134 * @}
Kojto 122:f9eeca106725 1135 */
Kojto 122:f9eeca106725 1136
Kojto 122:f9eeca106725 1137 /** @defgroup ETH_Unicast_Frames_Filter ETH Unicast Frames Filter
Kojto 122:f9eeca106725 1138 * @{
Kojto 122:f9eeca106725 1139 */
Kojto 122:f9eeca106725 1140 #define ETH_UNICASTFRAMESFILTER_PERFECTHASHTABLE ((uint32_t)0x00000402U)
Kojto 122:f9eeca106725 1141 #define ETH_UNICASTFRAMESFILTER_HASHTABLE ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 1142 #define ETH_UNICASTFRAMESFILTER_PERFECT ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1143 /**
Kojto 122:f9eeca106725 1144 * @}
Kojto 122:f9eeca106725 1145 */
Kojto 122:f9eeca106725 1146
Kojto 122:f9eeca106725 1147 /** @defgroup ETH_Zero_Quanta_Pause ETH Zero Quanta Pause
Kojto 122:f9eeca106725 1148 * @{
Kojto 122:f9eeca106725 1149 */
Kojto 122:f9eeca106725 1150 #define ETH_ZEROQUANTAPAUSE_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1151 #define ETH_ZEROQUANTAPAUSE_DISABLE ((uint32_t)0x00000080U)
Kojto 122:f9eeca106725 1152 /**
Kojto 122:f9eeca106725 1153 * @}
Kojto 122:f9eeca106725 1154 */
Kojto 122:f9eeca106725 1155
Kojto 122:f9eeca106725 1156 /** @defgroup ETH_Pause_Low_Threshold ETH Pause Low Threshold
Kojto 122:f9eeca106725 1157 * @{
Kojto 122:f9eeca106725 1158 */
Kojto 122:f9eeca106725 1159 #define ETH_PAUSELOWTHRESHOLD_MINUS4 ((uint32_t)0x00000000U) /*!< Pause time minus 4 slot times */
Kojto 122:f9eeca106725 1160 #define ETH_PAUSELOWTHRESHOLD_MINUS28 ((uint32_t)0x00000010U) /*!< Pause time minus 28 slot times */
Kojto 122:f9eeca106725 1161 #define ETH_PAUSELOWTHRESHOLD_MINUS144 ((uint32_t)0x00000020U) /*!< Pause time minus 144 slot times */
Kojto 122:f9eeca106725 1162 #define ETH_PAUSELOWTHRESHOLD_MINUS256 ((uint32_t)0x00000030U) /*!< Pause time minus 256 slot times */
Kojto 122:f9eeca106725 1163 /**
Kojto 122:f9eeca106725 1164 * @}
Kojto 122:f9eeca106725 1165 */
Kojto 122:f9eeca106725 1166
Kojto 122:f9eeca106725 1167 /** @defgroup ETH_Unicast_Pause_Frame_Detect ETH Unicast Pause Frame Detect
Kojto 122:f9eeca106725 1168 * @{
Kojto 122:f9eeca106725 1169 */
Kojto 122:f9eeca106725 1170 #define ETH_UNICASTPAUSEFRAMEDETECT_ENABLE ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 1171 #define ETH_UNICASTPAUSEFRAMEDETECT_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1172 /**
Kojto 122:f9eeca106725 1173 * @}
Kojto 122:f9eeca106725 1174 */
Kojto 122:f9eeca106725 1175
Kojto 122:f9eeca106725 1176 /** @defgroup ETH_Receive_Flow_Control ETH Receive Flow Control
Kojto 122:f9eeca106725 1177 * @{
Kojto 122:f9eeca106725 1178 */
Kojto 122:f9eeca106725 1179 #define ETH_RECEIVEFLOWCONTROL_ENABLE ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 1180 #define ETH_RECEIVEFLOWCONTROL_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1181 /**
Kojto 122:f9eeca106725 1182 * @}
Kojto 122:f9eeca106725 1183 */
Kojto 122:f9eeca106725 1184
Kojto 122:f9eeca106725 1185 /** @defgroup ETH_Transmit_Flow_Control ETH Transmit Flow Control
Kojto 122:f9eeca106725 1186 * @{
Kojto 122:f9eeca106725 1187 */
Kojto 122:f9eeca106725 1188 #define ETH_TRANSMITFLOWCONTROL_ENABLE ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 1189 #define ETH_TRANSMITFLOWCONTROL_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1190 /**
Kojto 122:f9eeca106725 1191 * @}
Kojto 122:f9eeca106725 1192 */
Kojto 122:f9eeca106725 1193
Kojto 122:f9eeca106725 1194 /** @defgroup ETH_VLAN_Tag_Comparison ETH VLAN Tag Comparison
Kojto 122:f9eeca106725 1195 * @{
Kojto 122:f9eeca106725 1196 */
Kojto 122:f9eeca106725 1197 #define ETH_VLANTAGCOMPARISON_12BIT ((uint32_t)0x00010000U)
Kojto 122:f9eeca106725 1198 #define ETH_VLANTAGCOMPARISON_16BIT ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1199 /**
Kojto 122:f9eeca106725 1200 * @}
Kojto 122:f9eeca106725 1201 */
Kojto 122:f9eeca106725 1202
Kojto 122:f9eeca106725 1203 /** @defgroup ETH_MAC_addresses ETH MAC addresses
Kojto 122:f9eeca106725 1204 * @{
Kojto 122:f9eeca106725 1205 */
Kojto 122:f9eeca106725 1206 #define ETH_MAC_ADDRESS0 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1207 #define ETH_MAC_ADDRESS1 ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 1208 #define ETH_MAC_ADDRESS2 ((uint32_t)0x00000010U)
Kojto 122:f9eeca106725 1209 #define ETH_MAC_ADDRESS3 ((uint32_t)0x00000018U)
Kojto 122:f9eeca106725 1210 /**
Kojto 122:f9eeca106725 1211 * @}
Kojto 122:f9eeca106725 1212 */
Kojto 122:f9eeca106725 1213
Kojto 122:f9eeca106725 1214 /** @defgroup ETH_MAC_addresses_filter_SA_DA ETH MAC addresses filter SA DA
Kojto 122:f9eeca106725 1215 * @{
Kojto 122:f9eeca106725 1216 */
Kojto 122:f9eeca106725 1217 #define ETH_MAC_ADDRESSFILTER_SA ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1218 #define ETH_MAC_ADDRESSFILTER_DA ((uint32_t)0x00000008U)
Kojto 122:f9eeca106725 1219 /**
Kojto 122:f9eeca106725 1220 * @}
Kojto 122:f9eeca106725 1221 */
Kojto 122:f9eeca106725 1222
Kojto 122:f9eeca106725 1223 /** @defgroup ETH_MAC_addresses_filter_Mask_bytes ETH MAC addresses filter Mask bytes
Kojto 122:f9eeca106725 1224 * @{
Kojto 122:f9eeca106725 1225 */
Kojto 122:f9eeca106725 1226 #define ETH_MAC_ADDRESSMASK_BYTE6 ((uint32_t)0x20000000U) /*!< Mask MAC Address high reg bits [15:8] */
Kojto 122:f9eeca106725 1227 #define ETH_MAC_ADDRESSMASK_BYTE5 ((uint32_t)0x10000000U) /*!< Mask MAC Address high reg bits [7:0] */
Kojto 122:f9eeca106725 1228 #define ETH_MAC_ADDRESSMASK_BYTE4 ((uint32_t)0x08000000U) /*!< Mask MAC Address low reg bits [31:24] */
Kojto 122:f9eeca106725 1229 #define ETH_MAC_ADDRESSMASK_BYTE3 ((uint32_t)0x04000000U) /*!< Mask MAC Address low reg bits [23:16] */
Kojto 122:f9eeca106725 1230 #define ETH_MAC_ADDRESSMASK_BYTE2 ((uint32_t)0x02000000U) /*!< Mask MAC Address low reg bits [15:8] */
Kojto 122:f9eeca106725 1231 #define ETH_MAC_ADDRESSMASK_BYTE1 ((uint32_t)0x01000000U) /*!< Mask MAC Address low reg bits [70] */
Kojto 122:f9eeca106725 1232 /**
Kojto 122:f9eeca106725 1233 * @}
Kojto 122:f9eeca106725 1234 */
Kojto 122:f9eeca106725 1235
Kojto 122:f9eeca106725 1236 /** @defgroup ETH_Drop_TCP_IP_Checksum_Error_Frame ETH Drop TCP IP Checksum Error Frame
Kojto 122:f9eeca106725 1237 * @{
Kojto 122:f9eeca106725 1238 */
Kojto 122:f9eeca106725 1239 #define ETH_DROPTCPIPCHECKSUMERRORFRAME_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1240 #define ETH_DROPTCPIPCHECKSUMERRORFRAME_DISABLE ((uint32_t)0x04000000U)
Kojto 122:f9eeca106725 1241 /**
Kojto 122:f9eeca106725 1242 * @}
Kojto 122:f9eeca106725 1243 */
Kojto 122:f9eeca106725 1244
Kojto 122:f9eeca106725 1245 /** @defgroup ETH_Receive_Store_Forward ETH Receive Store Forward
Kojto 122:f9eeca106725 1246 * @{
Kojto 122:f9eeca106725 1247 */
Kojto 122:f9eeca106725 1248 #define ETH_RECEIVESTOREFORWARD_ENABLE ((uint32_t)0x02000000U)
Kojto 122:f9eeca106725 1249 #define ETH_RECEIVESTOREFORWARD_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1250 /**
Kojto 122:f9eeca106725 1251 * @}
Kojto 122:f9eeca106725 1252 */
Kojto 122:f9eeca106725 1253
Kojto 122:f9eeca106725 1254 /** @defgroup ETH_Flush_Received_Frame ETH Flush Received Frame
Kojto 122:f9eeca106725 1255 * @{
Kojto 122:f9eeca106725 1256 */
Kojto 122:f9eeca106725 1257 #define ETH_FLUSHRECEIVEDFRAME_ENABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1258 #define ETH_FLUSHRECEIVEDFRAME_DISABLE ((uint32_t)0x01000000U)
Kojto 122:f9eeca106725 1259 /**
Kojto 122:f9eeca106725 1260 * @}
Kojto 122:f9eeca106725 1261 */
Kojto 122:f9eeca106725 1262
Kojto 122:f9eeca106725 1263 /** @defgroup ETH_Transmit_Store_Forward ETH Transmit Store Forward
Kojto 122:f9eeca106725 1264 * @{
Kojto 122:f9eeca106725 1265 */
Kojto 122:f9eeca106725 1266 #define ETH_TRANSMITSTOREFORWARD_ENABLE ((uint32_t)0x00200000U)
Kojto 122:f9eeca106725 1267 #define ETH_TRANSMITSTOREFORWARD_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1268 /**
Kojto 122:f9eeca106725 1269 * @}
Kojto 122:f9eeca106725 1270 */
Kojto 122:f9eeca106725 1271
Kojto 122:f9eeca106725 1272 /** @defgroup ETH_Transmit_Threshold_Control ETH Transmit Threshold Control
Kojto 122:f9eeca106725 1273 * @{
Kojto 122:f9eeca106725 1274 */
Kojto 122:f9eeca106725 1275 #define ETH_TRANSMITTHRESHOLDCONTROL_64BYTES ((uint32_t)0x00000000U) /*!< threshold level of the MTL Transmit FIFO is 64 Bytes */
Kojto 122:f9eeca106725 1276 #define ETH_TRANSMITTHRESHOLDCONTROL_128BYTES ((uint32_t)0x00004000U) /*!< threshold level of the MTL Transmit FIFO is 128 Bytes */
Kojto 122:f9eeca106725 1277 #define ETH_TRANSMITTHRESHOLDCONTROL_192BYTES ((uint32_t)0x00008000U) /*!< threshold level of the MTL Transmit FIFO is 192 Bytes */
Kojto 122:f9eeca106725 1278 #define ETH_TRANSMITTHRESHOLDCONTROL_256BYTES ((uint32_t)0x0000C000U) /*!< threshold level of the MTL Transmit FIFO is 256 Bytes */
Kojto 122:f9eeca106725 1279 #define ETH_TRANSMITTHRESHOLDCONTROL_40BYTES ((uint32_t)0x00010000U) /*!< threshold level of the MTL Transmit FIFO is 40 Bytes */
Kojto 122:f9eeca106725 1280 #define ETH_TRANSMITTHRESHOLDCONTROL_32BYTES ((uint32_t)0x00014000U) /*!< threshold level of the MTL Transmit FIFO is 32 Bytes */
Kojto 122:f9eeca106725 1281 #define ETH_TRANSMITTHRESHOLDCONTROL_24BYTES ((uint32_t)0x00018000U) /*!< threshold level of the MTL Transmit FIFO is 24 Bytes */
Kojto 122:f9eeca106725 1282 #define ETH_TRANSMITTHRESHOLDCONTROL_16BYTES ((uint32_t)0x0001C000U) /*!< threshold level of the MTL Transmit FIFO is 16 Bytes */
Kojto 122:f9eeca106725 1283 /**
Kojto 122:f9eeca106725 1284 * @}
Kojto 122:f9eeca106725 1285 */
Kojto 122:f9eeca106725 1286
Kojto 122:f9eeca106725 1287 /** @defgroup ETH_Forward_Error_Frames ETH Forward Error Frames
Kojto 122:f9eeca106725 1288 * @{
Kojto 122:f9eeca106725 1289 */
Kojto 122:f9eeca106725 1290 #define ETH_FORWARDERRORFRAMES_ENABLE ((uint32_t)0x00000080U)
Kojto 122:f9eeca106725 1291 #define ETH_FORWARDERRORFRAMES_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1292 /**
Kojto 122:f9eeca106725 1293 * @}
Kojto 122:f9eeca106725 1294 */
Kojto 122:f9eeca106725 1295
Kojto 122:f9eeca106725 1296 /** @defgroup ETH_Forward_Undersized_Good_Frames ETH Forward Undersized Good Frames
Kojto 122:f9eeca106725 1297 * @{
Kojto 122:f9eeca106725 1298 */
Kojto 122:f9eeca106725 1299 #define ETH_FORWARDUNDERSIZEDGOODFRAMES_ENABLE ((uint32_t)0x00000040U)
Kojto 122:f9eeca106725 1300 #define ETH_FORWARDUNDERSIZEDGOODFRAMES_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1301 /**
Kojto 122:f9eeca106725 1302 * @}
Kojto 122:f9eeca106725 1303 */
Kojto 122:f9eeca106725 1304
Kojto 122:f9eeca106725 1305 /** @defgroup ETH_Receive_Threshold_Control ETH Receive Threshold Control
Kojto 122:f9eeca106725 1306 * @{
Kojto 122:f9eeca106725 1307 */
Kojto 122:f9eeca106725 1308 #define ETH_RECEIVEDTHRESHOLDCONTROL_64BYTES ((uint32_t)0x00000000U) /*!< threshold level of the MTL Receive FIFO is 64 Bytes */
Kojto 122:f9eeca106725 1309 #define ETH_RECEIVEDTHRESHOLDCONTROL_32BYTES ((uint32_t)0x00000008U) /*!< threshold level of the MTL Receive FIFO is 32 Bytes */
Kojto 122:f9eeca106725 1310 #define ETH_RECEIVEDTHRESHOLDCONTROL_96BYTES ((uint32_t)0x00000010U) /*!< threshold level of the MTL Receive FIFO is 96 Bytes */
Kojto 122:f9eeca106725 1311 #define ETH_RECEIVEDTHRESHOLDCONTROL_128BYTES ((uint32_t)0x00000018U) /*!< threshold level of the MTL Receive FIFO is 128 Bytes */
Kojto 122:f9eeca106725 1312 /**
Kojto 122:f9eeca106725 1313 * @}
Kojto 122:f9eeca106725 1314 */
Kojto 122:f9eeca106725 1315
Kojto 122:f9eeca106725 1316 /** @defgroup ETH_Second_Frame_Operate ETH Second Frame Operate
Kojto 122:f9eeca106725 1317 * @{
Kojto 122:f9eeca106725 1318 */
Kojto 122:f9eeca106725 1319 #define ETH_SECONDFRAMEOPERARTE_ENABLE ((uint32_t)0x00000004U)
Kojto 122:f9eeca106725 1320 #define ETH_SECONDFRAMEOPERARTE_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1321 /**
Kojto 122:f9eeca106725 1322 * @}
Kojto 122:f9eeca106725 1323 */
Kojto 122:f9eeca106725 1324
Kojto 122:f9eeca106725 1325 /** @defgroup ETH_Address_Aligned_Beats ETH Address Aligned Beats
Kojto 122:f9eeca106725 1326 * @{
Kojto 122:f9eeca106725 1327 */
Kojto 122:f9eeca106725 1328 #define ETH_ADDRESSALIGNEDBEATS_ENABLE ((uint32_t)0x02000000U)
Kojto 122:f9eeca106725 1329 #define ETH_ADDRESSALIGNEDBEATS_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1330 /**
Kojto 122:f9eeca106725 1331 * @}
Kojto 122:f9eeca106725 1332 */
Kojto 122:f9eeca106725 1333
Kojto 122:f9eeca106725 1334 /** @defgroup ETH_Fixed_Burst ETH Fixed Burst
Kojto 122:f9eeca106725 1335 * @{
Kojto 122:f9eeca106725 1336 */
Kojto 122:f9eeca106725 1337 #define ETH_FIXEDBURST_ENABLE ((uint32_t)0x00010000U)
Kojto 122:f9eeca106725 1338 #define ETH_FIXEDBURST_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1339 /**
Kojto 122:f9eeca106725 1340 * @}
Kojto 122:f9eeca106725 1341 */
Kojto 122:f9eeca106725 1342
Kojto 122:f9eeca106725 1343 /** @defgroup ETH_Rx_DMA_Burst_Length ETH Rx DMA Burst Length
Kojto 122:f9eeca106725 1344 * @{
Kojto 122:f9eeca106725 1345 */
Kojto 122:f9eeca106725 1346 #define ETH_RXDMABURSTLENGTH_1BEAT ((uint32_t)0x00020000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 1 */
Kojto 122:f9eeca106725 1347 #define ETH_RXDMABURSTLENGTH_2BEAT ((uint32_t)0x00040000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 2 */
Kojto 122:f9eeca106725 1348 #define ETH_RXDMABURSTLENGTH_4BEAT ((uint32_t)0x00080000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 4 */
Kojto 122:f9eeca106725 1349 #define ETH_RXDMABURSTLENGTH_8BEAT ((uint32_t)0x00100000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 8 */
Kojto 122:f9eeca106725 1350 #define ETH_RXDMABURSTLENGTH_16BEAT ((uint32_t)0x00200000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 16 */
Kojto 122:f9eeca106725 1351 #define ETH_RXDMABURSTLENGTH_32BEAT ((uint32_t)0x00400000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 32 */
Kojto 122:f9eeca106725 1352 #define ETH_RXDMABURSTLENGTH_4XPBL_4BEAT ((uint32_t)0x01020000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 4 */
Kojto 122:f9eeca106725 1353 #define ETH_RXDMABURSTLENGTH_4XPBL_8BEAT ((uint32_t)0x01040000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 8 */
Kojto 122:f9eeca106725 1354 #define ETH_RXDMABURSTLENGTH_4XPBL_16BEAT ((uint32_t)0x01080000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 16 */
Kojto 122:f9eeca106725 1355 #define ETH_RXDMABURSTLENGTH_4XPBL_32BEAT ((uint32_t)0x01100000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 32 */
Kojto 122:f9eeca106725 1356 #define ETH_RXDMABURSTLENGTH_4XPBL_64BEAT ((uint32_t)0x01200000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 64 */
Kojto 122:f9eeca106725 1357 #define ETH_RXDMABURSTLENGTH_4XPBL_128BEAT ((uint32_t)0x01400000U) /*!< maximum number of beats to be transferred in one RxDMA transaction is 128 */
Kojto 122:f9eeca106725 1358 /**
Kojto 122:f9eeca106725 1359 * @}
Kojto 122:f9eeca106725 1360 */
Kojto 122:f9eeca106725 1361
Kojto 122:f9eeca106725 1362 /** @defgroup ETH_Tx_DMA_Burst_Length ETH Tx DMA Burst Length
Kojto 122:f9eeca106725 1363 * @{
Kojto 122:f9eeca106725 1364 */
Kojto 122:f9eeca106725 1365 #define ETH_TXDMABURSTLENGTH_1BEAT ((uint32_t)0x00000100U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 1 */
Kojto 122:f9eeca106725 1366 #define ETH_TXDMABURSTLENGTH_2BEAT ((uint32_t)0x00000200U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 2 */
Kojto 122:f9eeca106725 1367 #define ETH_TXDMABURSTLENGTH_4BEAT ((uint32_t)0x00000400U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */
Kojto 122:f9eeca106725 1368 #define ETH_TXDMABURSTLENGTH_8BEAT ((uint32_t)0x00000800U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */
Kojto 122:f9eeca106725 1369 #define ETH_TXDMABURSTLENGTH_16BEAT ((uint32_t)0x00001000U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */
Kojto 122:f9eeca106725 1370 #define ETH_TXDMABURSTLENGTH_32BEAT ((uint32_t)0x00002000U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */
Kojto 122:f9eeca106725 1371 #define ETH_TXDMABURSTLENGTH_4XPBL_4BEAT ((uint32_t)0x01000100U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 4 */
Kojto 122:f9eeca106725 1372 #define ETH_TXDMABURSTLENGTH_4XPBL_8BEAT ((uint32_t)0x01000200U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 8 */
Kojto 122:f9eeca106725 1373 #define ETH_TXDMABURSTLENGTH_4XPBL_16BEAT ((uint32_t)0x01000400U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 16 */
Kojto 122:f9eeca106725 1374 #define ETH_TXDMABURSTLENGTH_4XPBL_32BEAT ((uint32_t)0x01000800U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 32 */
Kojto 122:f9eeca106725 1375 #define ETH_TXDMABURSTLENGTH_4XPBL_64BEAT ((uint32_t)0x01001000U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 64 */
Kojto 122:f9eeca106725 1376 #define ETH_TXDMABURSTLENGTH_4XPBL_128BEAT ((uint32_t)0x01002000U) /*!< maximum number of beats to be transferred in one TxDMA (or both) transaction is 128 */
Kojto 122:f9eeca106725 1377 /**
Kojto 122:f9eeca106725 1378 * @}
Kojto 122:f9eeca106725 1379 */
Kojto 122:f9eeca106725 1380
Kojto 122:f9eeca106725 1381 /** @defgroup ETH_DMA_Enhanced_descriptor_format ETH DMA Enhanced descriptor format
Kojto 122:f9eeca106725 1382 * @{
Kojto 122:f9eeca106725 1383 */
Kojto 122:f9eeca106725 1384 #define ETH_DMAENHANCEDDESCRIPTOR_ENABLE ((uint32_t)0x00000080U)
Kojto 122:f9eeca106725 1385 #define ETH_DMAENHANCEDDESCRIPTOR_DISABLE ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1386 /**
Kojto 122:f9eeca106725 1387 * @}
Kojto 122:f9eeca106725 1388 */
Kojto 122:f9eeca106725 1389
Kojto 122:f9eeca106725 1390 /** @defgroup ETH_DMA_Arbitration ETH DMA Arbitration
Kojto 122:f9eeca106725 1391 * @{
Kojto 122:f9eeca106725 1392 */
Kojto 122:f9eeca106725 1393 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_1_1 ((uint32_t)0x00000000U)
Kojto 122:f9eeca106725 1394 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_2_1 ((uint32_t)0x00004000U)
Kojto 122:f9eeca106725 1395 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_3_1 ((uint32_t)0x00008000U)
Kojto 122:f9eeca106725 1396 #define ETH_DMAARBITRATION_ROUNDROBIN_RXTX_4_1 ((uint32_t)0x0000C000U)
Kojto 122:f9eeca106725 1397 #define ETH_DMAARBITRATION_RXPRIORTX ((uint32_t)0x00000002U)
Kojto 122:f9eeca106725 1398 /**
Kojto 122:f9eeca106725 1399 * @}
Kojto 122:f9eeca106725 1400 */
Kojto 122:f9eeca106725 1401
Kojto 122:f9eeca106725 1402 /** @defgroup ETH_DMA_Tx_descriptor_segment ETH DMA Tx descriptor segment
Kojto 122:f9eeca106725 1403 * @{
Kojto 122:f9eeca106725 1404 */
Kojto 122:f9eeca106725 1405 #define ETH_DMATXDESC_LASTSEGMENTS ((uint32_t)0x40000000U) /*!< Last Segment */
Kojto 122:f9eeca106725 1406 #define ETH_DMATXDESC_FIRSTSEGMENT ((uint32_t)0x20000000U) /*!< First Segment */
Kojto 122:f9eeca106725 1407 /**
Kojto 122:f9eeca106725 1408 * @}
Kojto 122:f9eeca106725 1409 */
Kojto 122:f9eeca106725 1410
Kojto 122:f9eeca106725 1411 /** @defgroup ETH_DMA_Tx_descriptor_Checksum_Insertion_Control ETH DMA Tx descriptor Checksum Insertion Control
Kojto 122:f9eeca106725 1412 * @{
Kojto 122:f9eeca106725 1413 */
Kojto 122:f9eeca106725 1414 #define ETH_DMATXDESC_CHECKSUMBYPASS ((uint32_t)0x00000000U) /*!< Checksum engine bypass */
Kojto 122:f9eeca106725 1415 #define ETH_DMATXDESC_CHECKSUMIPV4HEADER ((uint32_t)0x00400000U) /*!< IPv4 header checksum insertion */
Kojto 122:f9eeca106725 1416 #define ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT ((uint32_t)0x00800000U) /*!< TCP/UDP/ICMP checksum insertion. Pseudo header checksum is assumed to be present */
Kojto 122:f9eeca106725 1417 #define ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL ((uint32_t)0x00C00000U) /*!< TCP/UDP/ICMP checksum fully in hardware including pseudo header */
Kojto 122:f9eeca106725 1418 /**
Kojto 122:f9eeca106725 1419 * @}
Kojto 122:f9eeca106725 1420 */
Kojto 122:f9eeca106725 1421
Kojto 122:f9eeca106725 1422 /** @defgroup ETH_DMA_Rx_descriptor_buffers ETH DMA Rx descriptor buffers
Kojto 122:f9eeca106725 1423 * @{
Kojto 122:f9eeca106725 1424 */
Kojto 122:f9eeca106725 1425 #define ETH_DMARXDESC_BUFFER1 ((uint32_t)0x00000000U) /*!< DMA Rx Desc Buffer1 */
Kojto 122:f9eeca106725 1426 #define ETH_DMARXDESC_BUFFER2 ((uint32_t)0x00000001U) /*!< DMA Rx Desc Buffer2 */
Kojto 122:f9eeca106725 1427 /**
Kojto 122:f9eeca106725 1428 * @}
Kojto 122:f9eeca106725 1429 */
Kojto 122:f9eeca106725 1430
Kojto 122:f9eeca106725 1431 /** @defgroup ETH_PMT_Flags ETH PMT Flags
Kojto 122:f9eeca106725 1432 * @{
Kojto 122:f9eeca106725 1433 */
Kojto 122:f9eeca106725 1434 #define ETH_PMT_FLAG_WUFFRPR ((uint32_t)0x80000000U) /*!< Wake-Up Frame Filter Register Pointer Reset */
Kojto 122:f9eeca106725 1435 #define ETH_PMT_FLAG_WUFR ((uint32_t)0x00000040U) /*!< Wake-Up Frame Received */
Kojto 122:f9eeca106725 1436 #define ETH_PMT_FLAG_MPR ((uint32_t)0x00000020U) /*!< Magic Packet Received */
Kojto 122:f9eeca106725 1437 /**
Kojto 122:f9eeca106725 1438 * @}
Kojto 122:f9eeca106725 1439 */
Kojto 122:f9eeca106725 1440
Kojto 122:f9eeca106725 1441 /** @defgroup ETH_MMC_Tx_Interrupts ETH MMC Tx Interrupts
Kojto 122:f9eeca106725 1442 * @{
Kojto 122:f9eeca106725 1443 */
Kojto 122:f9eeca106725 1444 #define ETH_MMC_IT_TGF ((uint32_t)0x00200000U) /*!< When Tx good frame counter reaches half the maximum value */
Kojto 122:f9eeca106725 1445 #define ETH_MMC_IT_TGFMSC ((uint32_t)0x00008000U) /*!< When Tx good multi col counter reaches half the maximum value */
Kojto 122:f9eeca106725 1446 #define ETH_MMC_IT_TGFSC ((uint32_t)0x00004000U) /*!< When Tx good single col counter reaches half the maximum value */
Kojto 122:f9eeca106725 1447 /**
Kojto 122:f9eeca106725 1448 * @}
Kojto 122:f9eeca106725 1449 */
Kojto 122:f9eeca106725 1450
Kojto 122:f9eeca106725 1451 /** @defgroup ETH_MMC_Rx_Interrupts ETH MMC Rx Interrupts
Kojto 122:f9eeca106725 1452 * @{
Kojto 122:f9eeca106725 1453 */
Kojto 122:f9eeca106725 1454 #define ETH_MMC_IT_RGUF ((uint32_t)0x10020000U) /*!< When Rx good unicast frames counter reaches half the maximum value */
Kojto 122:f9eeca106725 1455 #define ETH_MMC_IT_RFAE ((uint32_t)0x10000040U) /*!< When Rx alignment error counter reaches half the maximum value */
Kojto 122:f9eeca106725 1456 #define ETH_MMC_IT_RFCE ((uint32_t)0x10000020U) /*!< When Rx crc error counter reaches half the maximum value */
Kojto 122:f9eeca106725 1457 /**
Kojto 122:f9eeca106725 1458 * @}
Kojto 122:f9eeca106725 1459 */
Kojto 122:f9eeca106725 1460
Kojto 122:f9eeca106725 1461 /** @defgroup ETH_MAC_Flags ETH MAC Flags
Kojto 122:f9eeca106725 1462 * @{
Kojto 122:f9eeca106725 1463 */
Kojto 122:f9eeca106725 1464 #define ETH_MAC_FLAG_TST ((uint32_t)0x00000200U) /*!< Time stamp trigger flag (on MAC) */
Kojto 122:f9eeca106725 1465 #define ETH_MAC_FLAG_MMCT ((uint32_t)0x00000040U) /*!< MMC transmit flag */
Kojto 122:f9eeca106725 1466 #define ETH_MAC_FLAG_MMCR ((uint32_t)0x00000020U) /*!< MMC receive flag */
Kojto 122:f9eeca106725 1467 #define ETH_MAC_FLAG_MMC ((uint32_t)0x00000010U) /*!< MMC flag (on MAC) */
Kojto 122:f9eeca106725 1468 #define ETH_MAC_FLAG_PMT ((uint32_t)0x00000008U) /*!< PMT flag (on MAC) */
Kojto 122:f9eeca106725 1469 /**
Kojto 122:f9eeca106725 1470 * @}
Kojto 122:f9eeca106725 1471 */
Kojto 122:f9eeca106725 1472
Kojto 122:f9eeca106725 1473 /** @defgroup ETH_DMA_Flags ETH DMA Flags
Kojto 122:f9eeca106725 1474 * @{
Kojto 122:f9eeca106725 1475 */
Kojto 122:f9eeca106725 1476 #define ETH_DMA_FLAG_TST ((uint32_t)0x20000000U) /*!< Time-stamp trigger interrupt (on DMA) */
Kojto 122:f9eeca106725 1477 #define ETH_DMA_FLAG_PMT ((uint32_t)0x10000000U) /*!< PMT interrupt (on DMA) */
Kojto 122:f9eeca106725 1478 #define ETH_DMA_FLAG_MMC ((uint32_t)0x08000000U) /*!< MMC interrupt (on DMA) */
Kojto 122:f9eeca106725 1479 #define ETH_DMA_FLAG_DATATRANSFERERROR ((uint32_t)0x00800000U) /*!< Error bits 0-Rx DMA, 1-Tx DMA */
Kojto 122:f9eeca106725 1480 #define ETH_DMA_FLAG_READWRITEERROR ((uint32_t)0x01000000U) /*!< Error bits 0-write transfer, 1-read transfer */
Kojto 122:f9eeca106725 1481 #define ETH_DMA_FLAG_ACCESSERROR ((uint32_t)0x02000000U) /*!< Error bits 0-data buffer, 1-desc. access */
Kojto 122:f9eeca106725 1482 #define ETH_DMA_FLAG_NIS ((uint32_t)0x00010000U) /*!< Normal interrupt summary flag */
Kojto 122:f9eeca106725 1483 #define ETH_DMA_FLAG_AIS ((uint32_t)0x00008000U) /*!< Abnormal interrupt summary flag */
Kojto 122:f9eeca106725 1484 #define ETH_DMA_FLAG_ER ((uint32_t)0x00004000U) /*!< Early receive flag */
Kojto 122:f9eeca106725 1485 #define ETH_DMA_FLAG_FBE ((uint32_t)0x00002000U) /*!< Fatal bus error flag */
Kojto 122:f9eeca106725 1486 #define ETH_DMA_FLAG_ET ((uint32_t)0x00000400U) /*!< Early transmit flag */
Kojto 122:f9eeca106725 1487 #define ETH_DMA_FLAG_RWT ((uint32_t)0x00000200U) /*!< Receive watchdog timeout flag */
Kojto 122:f9eeca106725 1488 #define ETH_DMA_FLAG_RPS ((uint32_t)0x00000100U) /*!< Receive process stopped flag */
Kojto 122:f9eeca106725 1489 #define ETH_DMA_FLAG_RBU ((uint32_t)0x00000080U) /*!< Receive buffer unavailable flag */
Kojto 122:f9eeca106725 1490 #define ETH_DMA_FLAG_R ((uint32_t)0x00000040U) /*!< Receive flag */
Kojto 122:f9eeca106725 1491 #define ETH_DMA_FLAG_TU ((uint32_t)0x00000020U) /*!< Underflow flag */
Kojto 122:f9eeca106725 1492 #define ETH_DMA_FLAG_RO ((uint32_t)0x00000010U) /*!< Overflow flag */
Kojto 122:f9eeca106725 1493 #define ETH_DMA_FLAG_TJT ((uint32_t)0x00000008U) /*!< Transmit jabber timeout flag */
Kojto 122:f9eeca106725 1494 #define ETH_DMA_FLAG_TBU ((uint32_t)0x00000004U) /*!< Transmit buffer unavailable flag */
Kojto 122:f9eeca106725 1495 #define ETH_DMA_FLAG_TPS ((uint32_t)0x00000002U) /*!< Transmit process stopped flag */
Kojto 122:f9eeca106725 1496 #define ETH_DMA_FLAG_T ((uint32_t)0x00000001U) /*!< Transmit flag */
Kojto 122:f9eeca106725 1497 /**
Kojto 122:f9eeca106725 1498 * @}
Kojto 122:f9eeca106725 1499 */
Kojto 122:f9eeca106725 1500
Kojto 122:f9eeca106725 1501 /** @defgroup ETH_MAC_Interrupts ETH MAC Interrupts
Kojto 122:f9eeca106725 1502 * @{
Kojto 122:f9eeca106725 1503 */
Kojto 122:f9eeca106725 1504 #define ETH_MAC_IT_TST ((uint32_t)0x00000200U) /*!< Time stamp trigger interrupt (on MAC) */
Kojto 122:f9eeca106725 1505 #define ETH_MAC_IT_MMCT ((uint32_t)0x00000040U) /*!< MMC transmit interrupt */
Kojto 122:f9eeca106725 1506 #define ETH_MAC_IT_MMCR ((uint32_t)0x00000020U) /*!< MMC receive interrupt */
Kojto 122:f9eeca106725 1507 #define ETH_MAC_IT_MMC ((uint32_t)0x00000010U) /*!< MMC interrupt (on MAC) */
Kojto 122:f9eeca106725 1508 #define ETH_MAC_IT_PMT ((uint32_t)0x00000008U) /*!< PMT interrupt (on MAC) */
Kojto 122:f9eeca106725 1509 /**
Kojto 122:f9eeca106725 1510 * @}
Kojto 122:f9eeca106725 1511 */
Kojto 122:f9eeca106725 1512
Kojto 122:f9eeca106725 1513 /** @defgroup ETH_DMA_Interrupts ETH DMA Interrupts
Kojto 122:f9eeca106725 1514 * @{
Kojto 122:f9eeca106725 1515 */
Kojto 122:f9eeca106725 1516 #define ETH_DMA_IT_TST ((uint32_t)0x20000000U) /*!< Time-stamp trigger interrupt (on DMA) */
Kojto 122:f9eeca106725 1517 #define ETH_DMA_IT_PMT ((uint32_t)0x10000000U) /*!< PMT interrupt (on DMA) */
Kojto 122:f9eeca106725 1518 #define ETH_DMA_IT_MMC ((uint32_t)0x08000000U) /*!< MMC interrupt (on DMA) */
Kojto 122:f9eeca106725 1519 #define ETH_DMA_IT_NIS ((uint32_t)0x00010000U) /*!< Normal interrupt summary */
Kojto 122:f9eeca106725 1520 #define ETH_DMA_IT_AIS ((uint32_t)0x00008000U) /*!< Abnormal interrupt summary */
Kojto 122:f9eeca106725 1521 #define ETH_DMA_IT_ER ((uint32_t)0x00004000U) /*!< Early receive interrupt */
Kojto 122:f9eeca106725 1522 #define ETH_DMA_IT_FBE ((uint32_t)0x00002000U) /*!< Fatal bus error interrupt */
Kojto 122:f9eeca106725 1523 #define ETH_DMA_IT_ET ((uint32_t)0x00000400U) /*!< Early transmit interrupt */
Kojto 122:f9eeca106725 1524 #define ETH_DMA_IT_RWT ((uint32_t)0x00000200U) /*!< Receive watchdog timeout interrupt */
Kojto 122:f9eeca106725 1525 #define ETH_DMA_IT_RPS ((uint32_t)0x00000100U) /*!< Receive process stopped interrupt */
Kojto 122:f9eeca106725 1526 #define ETH_DMA_IT_RBU ((uint32_t)0x00000080U) /*!< Receive buffer unavailable interrupt */
Kojto 122:f9eeca106725 1527 #define ETH_DMA_IT_R ((uint32_t)0x00000040U) /*!< Receive interrupt */
Kojto 122:f9eeca106725 1528 #define ETH_DMA_IT_TU ((uint32_t)0x00000020U) /*!< Underflow interrupt */
Kojto 122:f9eeca106725 1529 #define ETH_DMA_IT_RO ((uint32_t)0x00000010U) /*!< Overflow interrupt */
Kojto 122:f9eeca106725 1530 #define ETH_DMA_IT_TJT ((uint32_t)0x00000008U) /*!< Transmit jabber timeout interrupt */
Kojto 122:f9eeca106725 1531 #define ETH_DMA_IT_TBU ((uint32_t)0x00000004U) /*!< Transmit buffer unavailable interrupt */
Kojto 122:f9eeca106725 1532 #define ETH_DMA_IT_TPS ((uint32_t)0x00000002U) /*!< Transmit process stopped interrupt */
Kojto 122:f9eeca106725 1533 #define ETH_DMA_IT_T ((uint32_t)0x00000001U) /*!< Transmit interrupt */
Kojto 122:f9eeca106725 1534 /**
Kojto 122:f9eeca106725 1535 * @}
Kojto 122:f9eeca106725 1536 */
Kojto 122:f9eeca106725 1537
Kojto 122:f9eeca106725 1538 /** @defgroup ETH_DMA_transmit_process_state ETH DMA transmit process state
Kojto 122:f9eeca106725 1539 * @{
Kojto 122:f9eeca106725 1540 */
Kojto 122:f9eeca106725 1541 #define ETH_DMA_TRANSMITPROCESS_STOPPED ((uint32_t)0x00000000U) /*!< Stopped - Reset or Stop Tx Command issued */
Kojto 122:f9eeca106725 1542 #define ETH_DMA_TRANSMITPROCESS_FETCHING ((uint32_t)0x00100000U) /*!< Running - fetching the Tx descriptor */
Kojto 122:f9eeca106725 1543 #define ETH_DMA_TRANSMITPROCESS_WAITING ((uint32_t)0x00200000U) /*!< Running - waiting for status */
Kojto 122:f9eeca106725 1544 #define ETH_DMA_TRANSMITPROCESS_READING ((uint32_t)0x00300000U) /*!< Running - reading the data from host memory */
Kojto 122:f9eeca106725 1545 #define ETH_DMA_TRANSMITPROCESS_SUSPENDED ((uint32_t)0x00600000U) /*!< Suspended - Tx Descriptor unavailable */
Kojto 122:f9eeca106725 1546 #define ETH_DMA_TRANSMITPROCESS_CLOSING ((uint32_t)0x00700000U) /*!< Running - closing Rx descriptor */
Kojto 122:f9eeca106725 1547
Kojto 122:f9eeca106725 1548 /**
Kojto 122:f9eeca106725 1549 * @}
Kojto 122:f9eeca106725 1550 */
Kojto 122:f9eeca106725 1551
Kojto 122:f9eeca106725 1552
Kojto 122:f9eeca106725 1553 /** @defgroup ETH_DMA_receive_process_state ETH DMA receive process state
Kojto 122:f9eeca106725 1554 * @{
Kojto 122:f9eeca106725 1555 */
Kojto 122:f9eeca106725 1556 #define ETH_DMA_RECEIVEPROCESS_STOPPED ((uint32_t)0x00000000U) /*!< Stopped - Reset or Stop Rx Command issued */
Kojto 122:f9eeca106725 1557 #define ETH_DMA_RECEIVEPROCESS_FETCHING ((uint32_t)0x00020000U) /*!< Running - fetching the Rx descriptor */
Kojto 122:f9eeca106725 1558 #define ETH_DMA_RECEIVEPROCESS_WAITING ((uint32_t)0x00060000U) /*!< Running - waiting for packet */
Kojto 122:f9eeca106725 1559 #define ETH_DMA_RECEIVEPROCESS_SUSPENDED ((uint32_t)0x00080000U) /*!< Suspended - Rx Descriptor unavailable */
Kojto 122:f9eeca106725 1560 #define ETH_DMA_RECEIVEPROCESS_CLOSING ((uint32_t)0x000A0000U) /*!< Running - closing descriptor */
Kojto 122:f9eeca106725 1561 #define ETH_DMA_RECEIVEPROCESS_QUEUING ((uint32_t)0x000E0000U) /*!< Running - queuing the receive frame into host memory */
Kojto 122:f9eeca106725 1562
Kojto 122:f9eeca106725 1563 /**
Kojto 122:f9eeca106725 1564 * @}
Kojto 122:f9eeca106725 1565 */
Kojto 122:f9eeca106725 1566
Kojto 122:f9eeca106725 1567 /** @defgroup ETH_DMA_overflow ETH DMA overflow
Kojto 122:f9eeca106725 1568 * @{
Kojto 122:f9eeca106725 1569 */
Kojto 122:f9eeca106725 1570 #define ETH_DMA_OVERFLOW_RXFIFOCOUNTER ((uint32_t)0x10000000U) /*!< Overflow bit for FIFO overflow counter */
Kojto 122:f9eeca106725 1571 #define ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER ((uint32_t)0x00010000U) /*!< Overflow bit for missed frame counter */
Kojto 122:f9eeca106725 1572 /**
Kojto 122:f9eeca106725 1573 * @}
Kojto 122:f9eeca106725 1574 */
Kojto 122:f9eeca106725 1575
Kojto 122:f9eeca106725 1576 /** @defgroup ETH_EXTI_LINE_WAKEUP ETH EXTI LINE WAKEUP
Kojto 122:f9eeca106725 1577 * @{
Kojto 122:f9eeca106725 1578 */
Kojto 122:f9eeca106725 1579 #define ETH_EXTI_LINE_WAKEUP ((uint32_t)0x00080000U) /*!< External interrupt line 19 Connected to the ETH EXTI Line */
Kojto 122:f9eeca106725 1580
Kojto 122:f9eeca106725 1581 /**
Kojto 122:f9eeca106725 1582 * @}
Kojto 122:f9eeca106725 1583 */
Kojto 122:f9eeca106725 1584
Kojto 122:f9eeca106725 1585 /**
Kojto 122:f9eeca106725 1586 * @}
Kojto 122:f9eeca106725 1587 */
Kojto 122:f9eeca106725 1588
Kojto 122:f9eeca106725 1589 /* Exported macro ------------------------------------------------------------*/
Kojto 122:f9eeca106725 1590 /** @defgroup ETH_Exported_Macros ETH Exported Macros
Kojto 122:f9eeca106725 1591 * @brief macros to handle interrupts and specific clock configurations
Kojto 122:f9eeca106725 1592 * @{
Kojto 122:f9eeca106725 1593 */
Kojto 122:f9eeca106725 1594
Kojto 122:f9eeca106725 1595 /** @brief Reset ETH handle state
Kojto 122:f9eeca106725 1596 * @param __HANDLE__: specifies the ETH handle.
Kojto 122:f9eeca106725 1597 * @retval None
Kojto 122:f9eeca106725 1598 */
Kojto 122:f9eeca106725 1599 #define __HAL_ETH_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_ETH_STATE_RESET)
Kojto 122:f9eeca106725 1600
Kojto 122:f9eeca106725 1601 /**
Kojto 122:f9eeca106725 1602 * @brief Checks whether the specified Ethernet DMA Tx Desc flag is set or not.
Kojto 122:f9eeca106725 1603 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1604 * @param __FLAG__: specifies the flag of TDES0 to check.
Kojto 122:f9eeca106725 1605 * @retval the ETH_DMATxDescFlag (SET or RESET).
Kojto 122:f9eeca106725 1606 */
Kojto 122:f9eeca106725 1607 #define __HAL_ETH_DMATXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->TxDesc->Status & (__FLAG__) == (__FLAG__))
Kojto 122:f9eeca106725 1608
Kojto 122:f9eeca106725 1609 /**
Kojto 122:f9eeca106725 1610 * @brief Checks whether the specified Ethernet DMA Rx Desc flag is set or not.
Kojto 122:f9eeca106725 1611 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1612 * @param __FLAG__: specifies the flag of RDES0 to check.
Kojto 122:f9eeca106725 1613 * @retval the ETH_DMATxDescFlag (SET or RESET).
Kojto 122:f9eeca106725 1614 */
Kojto 122:f9eeca106725 1615 #define __HAL_ETH_DMARXDESC_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->RxDesc->Status & (__FLAG__) == (__FLAG__))
Kojto 122:f9eeca106725 1616
Kojto 122:f9eeca106725 1617 /**
Kojto 122:f9eeca106725 1618 * @brief Enables the specified DMA Rx Desc receive interrupt.
Kojto 122:f9eeca106725 1619 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1620 * @retval None
Kojto 122:f9eeca106725 1621 */
Kojto 122:f9eeca106725 1622 #define __HAL_ETH_DMARXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize &=(~(uint32_t)ETH_DMARXDESC_DIC))
Kojto 122:f9eeca106725 1623
Kojto 122:f9eeca106725 1624 /**
Kojto 122:f9eeca106725 1625 * @brief Disables the specified DMA Rx Desc receive interrupt.
Kojto 122:f9eeca106725 1626 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1627 * @retval None
Kojto 122:f9eeca106725 1628 */
Kojto 122:f9eeca106725 1629 #define __HAL_ETH_DMARXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->RxDesc->ControlBufferSize |= ETH_DMARXDESC_DIC)
Kojto 122:f9eeca106725 1630
Kojto 122:f9eeca106725 1631 /**
Kojto 122:f9eeca106725 1632 * @brief Set the specified DMA Rx Desc Own bit.
Kojto 122:f9eeca106725 1633 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1634 * @retval None
Kojto 122:f9eeca106725 1635 */
Kojto 122:f9eeca106725 1636 #define __HAL_ETH_DMARXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->RxDesc->Status |= ETH_DMARXDESC_OWN)
Kojto 122:f9eeca106725 1637
Kojto 122:f9eeca106725 1638 /**
Kojto 122:f9eeca106725 1639 * @brief Returns the specified Ethernet DMA Tx Desc collision count.
Kojto 122:f9eeca106725 1640 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1641 * @retval The Transmit descriptor collision counter value.
Kojto 122:f9eeca106725 1642 */
Kojto 122:f9eeca106725 1643 #define __HAL_ETH_DMATXDESC_GET_COLLISION_COUNT(__HANDLE__) (((__HANDLE__)->TxDesc->Status & ETH_DMATXDESC_CC) >> ETH_DMATXDESC_COLLISION_COUNTSHIFT)
Kojto 122:f9eeca106725 1644
Kojto 122:f9eeca106725 1645 /**
Kojto 122:f9eeca106725 1646 * @brief Set the specified DMA Tx Desc Own bit.
Kojto 122:f9eeca106725 1647 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1648 * @retval None
Kojto 122:f9eeca106725 1649 */
Kojto 122:f9eeca106725 1650 #define __HAL_ETH_DMATXDESC_SET_OWN_BIT(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_OWN)
Kojto 122:f9eeca106725 1651
Kojto 122:f9eeca106725 1652 /**
Kojto 122:f9eeca106725 1653 * @brief Enables the specified DMA Tx Desc Transmit interrupt.
Kojto 122:f9eeca106725 1654 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1655 * @retval None
Kojto 122:f9eeca106725 1656 */
Kojto 122:f9eeca106725 1657 #define __HAL_ETH_DMATXDESC_ENABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_IC)
Kojto 122:f9eeca106725 1658
Kojto 122:f9eeca106725 1659 /**
Kojto 122:f9eeca106725 1660 * @brief Disables the specified DMA Tx Desc Transmit interrupt.
Kojto 122:f9eeca106725 1661 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1662 * @retval None
Kojto 122:f9eeca106725 1663 */
Kojto 122:f9eeca106725 1664 #define __HAL_ETH_DMATXDESC_DISABLE_IT(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_IC)
Kojto 122:f9eeca106725 1665
Kojto 122:f9eeca106725 1666 /**
Kojto 122:f9eeca106725 1667 * @brief Selects the specified Ethernet DMA Tx Desc Checksum Insertion.
Kojto 122:f9eeca106725 1668 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1669 * @param __CHECKSUM__: specifies is the DMA Tx desc checksum insertion.
Kojto 122:f9eeca106725 1670 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1671 * @arg ETH_DMATXDESC_CHECKSUMBYPASS : Checksum bypass
Kojto 122:f9eeca106725 1672 * @arg ETH_DMATXDESC_CHECKSUMIPV4HEADER : IPv4 header checksum
Kojto 122:f9eeca106725 1673 * @arg ETH_DMATXDESC_CHECKSUMTCPUDPICMPSEGMENT : TCP/UDP/ICMP checksum. Pseudo header checksum is assumed to be present
Kojto 122:f9eeca106725 1674 * @arg ETH_DMATXDESC_CHECKSUMTCPUDPICMPFULL : TCP/UDP/ICMP checksum fully in hardware including pseudo header
Kojto 122:f9eeca106725 1675 * @retval None
Kojto 122:f9eeca106725 1676 */
Kojto 122:f9eeca106725 1677 #define __HAL_ETH_DMATXDESC_CHECKSUM_INSERTION(__HANDLE__, __CHECKSUM__) ((__HANDLE__)->TxDesc->Status |= (__CHECKSUM__))
Kojto 122:f9eeca106725 1678
Kojto 122:f9eeca106725 1679 /**
Kojto 122:f9eeca106725 1680 * @brief Enables the DMA Tx Desc CRC.
Kojto 122:f9eeca106725 1681 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1682 * @retval None
Kojto 122:f9eeca106725 1683 */
Kojto 122:f9eeca106725 1684 #define __HAL_ETH_DMATXDESC_CRC_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DC)
Kojto 122:f9eeca106725 1685
Kojto 122:f9eeca106725 1686 /**
Kojto 122:f9eeca106725 1687 * @brief Disables the DMA Tx Desc CRC.
Kojto 122:f9eeca106725 1688 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1689 * @retval None
Kojto 122:f9eeca106725 1690 */
Kojto 122:f9eeca106725 1691 #define __HAL_ETH_DMATXDESC_CRC_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_DC)
Kojto 122:f9eeca106725 1692
Kojto 122:f9eeca106725 1693 /**
Kojto 122:f9eeca106725 1694 * @brief Enables the DMA Tx Desc padding for frame shorter than 64 bytes.
Kojto 122:f9eeca106725 1695 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1696 * @retval None
Kojto 122:f9eeca106725 1697 */
Kojto 122:f9eeca106725 1698 #define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_ENABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status &= ~ETH_DMATXDESC_DP)
Kojto 122:f9eeca106725 1699
Kojto 122:f9eeca106725 1700 /**
Kojto 122:f9eeca106725 1701 * @brief Disables the DMA Tx Desc padding for frame shorter than 64 bytes.
Kojto 122:f9eeca106725 1702 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1703 * @retval None
Kojto 122:f9eeca106725 1704 */
Kojto 122:f9eeca106725 1705 #define __HAL_ETH_DMATXDESC_SHORT_FRAME_PADDING_DISABLE(__HANDLE__) ((__HANDLE__)->TxDesc->Status |= ETH_DMATXDESC_DP)
Kojto 122:f9eeca106725 1706
Kojto 122:f9eeca106725 1707 /**
Kojto 122:f9eeca106725 1708 * @brief Enables the specified Ethernet MAC interrupts.
Kojto 122:f9eeca106725 1709 * @param __HANDLE__ : ETH Handle
Kojto 122:f9eeca106725 1710 * @param __INTERRUPT__: specifies the Ethernet MAC interrupt sources to be
Kojto 122:f9eeca106725 1711 * enabled or disabled.
Kojto 122:f9eeca106725 1712 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 1713 * @arg ETH_MAC_IT_TST : Time stamp trigger interrupt
Kojto 122:f9eeca106725 1714 * @arg ETH_MAC_IT_PMT : PMT interrupt
Kojto 122:f9eeca106725 1715 * @retval None
Kojto 122:f9eeca106725 1716 */
Kojto 122:f9eeca106725 1717 #define __HAL_ETH_MAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MACIMR |= (__INTERRUPT__))
Kojto 122:f9eeca106725 1718
Kojto 122:f9eeca106725 1719 /**
Kojto 122:f9eeca106725 1720 * @brief Disables the specified Ethernet MAC interrupts.
Kojto 122:f9eeca106725 1721 * @param __HANDLE__ : ETH Handle
Kojto 122:f9eeca106725 1722 * @param __INTERRUPT__: specifies the Ethernet MAC interrupt sources to be
Kojto 122:f9eeca106725 1723 * enabled or disabled.
Kojto 122:f9eeca106725 1724 * This parameter can be any combination of the following values:
Kojto 122:f9eeca106725 1725 * @arg ETH_MAC_IT_TST : Time stamp trigger interrupt
Kojto 122:f9eeca106725 1726 * @arg ETH_MAC_IT_PMT : PMT interrupt
Kojto 122:f9eeca106725 1727 * @retval None
Kojto 122:f9eeca106725 1728 */
Kojto 122:f9eeca106725 1729 #define __HAL_ETH_MAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MACIMR &= ~(__INTERRUPT__))
Kojto 122:f9eeca106725 1730
Kojto 122:f9eeca106725 1731 /**
Kojto 122:f9eeca106725 1732 * @brief Initiate a Pause Control Frame (Full-duplex only).
Kojto 122:f9eeca106725 1733 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1734 * @retval None
Kojto 122:f9eeca106725 1735 */
Kojto 122:f9eeca106725 1736 #define __HAL_ETH_INITIATE_PAUSE_CONTROL_FRAME(__HANDLE__) ((__HANDLE__)->Instance->MACFCR |= ETH_MACFCR_FCBBPA)
Kojto 122:f9eeca106725 1737
Kojto 122:f9eeca106725 1738 /**
Kojto 122:f9eeca106725 1739 * @brief Checks whether the Ethernet flow control busy bit is set or not.
Kojto 122:f9eeca106725 1740 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1741 * @retval The new state of flow control busy status bit (SET or RESET).
Kojto 122:f9eeca106725 1742 */
Kojto 122:f9eeca106725 1743 #define __HAL_ETH_GET_FLOW_CONTROL_BUSY_STATUS(__HANDLE__) (((__HANDLE__)->Instance->MACFCR & ETH_MACFCR_FCBBPA) == ETH_MACFCR_FCBBPA)
Kojto 122:f9eeca106725 1744
Kojto 122:f9eeca106725 1745 /**
Kojto 122:f9eeca106725 1746 * @brief Enables the MAC Back Pressure operation activation (Half-duplex only).
Kojto 122:f9eeca106725 1747 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1748 * @retval None
Kojto 122:f9eeca106725 1749 */
Kojto 122:f9eeca106725 1750 #define __HAL_ETH_BACK_PRESSURE_ACTIVATION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR |= ETH_MACFCR_FCBBPA)
Kojto 122:f9eeca106725 1751
Kojto 122:f9eeca106725 1752 /**
Kojto 122:f9eeca106725 1753 * @brief Disables the MAC BackPressure operation activation (Half-duplex only).
Kojto 122:f9eeca106725 1754 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1755 * @retval None
Kojto 122:f9eeca106725 1756 */
Kojto 122:f9eeca106725 1757 #define __HAL_ETH_BACK_PRESSURE_ACTIVATION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACFCR &= ~ETH_MACFCR_FCBBPA)
Kojto 122:f9eeca106725 1758
Kojto 122:f9eeca106725 1759 /**
Kojto 122:f9eeca106725 1760 * @brief Checks whether the specified Ethernet MAC flag is set or not.
Kojto 122:f9eeca106725 1761 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1762 * @param __FLAG__: specifies the flag to check.
Kojto 122:f9eeca106725 1763 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1764 * @arg ETH_MAC_FLAG_TST : Time stamp trigger flag
Kojto 122:f9eeca106725 1765 * @arg ETH_MAC_FLAG_MMCT : MMC transmit flag
Kojto 122:f9eeca106725 1766 * @arg ETH_MAC_FLAG_MMCR : MMC receive flag
Kojto 122:f9eeca106725 1767 * @arg ETH_MAC_FLAG_MMC : MMC flag
Kojto 122:f9eeca106725 1768 * @arg ETH_MAC_FLAG_PMT : PMT flag
Kojto 122:f9eeca106725 1769 * @retval The state of Ethernet MAC flag.
Kojto 122:f9eeca106725 1770 */
Kojto 122:f9eeca106725 1771 #define __HAL_ETH_MAC_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->MACSR &( __FLAG__)) == ( __FLAG__))
Kojto 122:f9eeca106725 1772
Kojto 122:f9eeca106725 1773 /**
Kojto 122:f9eeca106725 1774 * @brief Enables the specified Ethernet DMA interrupts.
Kojto 122:f9eeca106725 1775 * @param __HANDLE__ : ETH Handle
Kojto 122:f9eeca106725 1776 * @param __INTERRUPT__: specifies the Ethernet DMA interrupt sources to be
Kojto 122:f9eeca106725 1777 * enabled @ref ETH_DMA_Interrupts
Kojto 122:f9eeca106725 1778 * @retval None
Kojto 122:f9eeca106725 1779 */
Kojto 122:f9eeca106725 1780 #define __HAL_ETH_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMAIER |= (__INTERRUPT__))
Kojto 122:f9eeca106725 1781
Kojto 122:f9eeca106725 1782 /**
Kojto 122:f9eeca106725 1783 * @brief Disables the specified Ethernet DMA interrupts.
Kojto 122:f9eeca106725 1784 * @param __HANDLE__ : ETH Handle
Kojto 122:f9eeca106725 1785 * @param __INTERRUPT__: specifies the Ethernet DMA interrupt sources to be
Kojto 122:f9eeca106725 1786 * disabled. @ref ETH_DMA_Interrupts
Kojto 122:f9eeca106725 1787 * @retval None
Kojto 122:f9eeca106725 1788 */
Kojto 122:f9eeca106725 1789 #define __HAL_ETH_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMAIER &= ~(__INTERRUPT__))
Kojto 122:f9eeca106725 1790
Kojto 122:f9eeca106725 1791 /**
Kojto 122:f9eeca106725 1792 * @brief Clears the Ethernet DMA IT pending bit.
Kojto 122:f9eeca106725 1793 * @param __HANDLE__ : ETH Handle
Kojto 122:f9eeca106725 1794 * @param __INTERRUPT__: specifies the interrupt pending bit to clear. @ref ETH_DMA_Interrupts
Kojto 122:f9eeca106725 1795 * @retval None
Kojto 122:f9eeca106725 1796 */
Kojto 122:f9eeca106725 1797 #define __HAL_ETH_DMA_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DMASR =(__INTERRUPT__))
Kojto 122:f9eeca106725 1798
Kojto 122:f9eeca106725 1799 /**
Kojto 122:f9eeca106725 1800 * @brief Checks whether the specified Ethernet DMA flag is set or not.
Kojto 122:f9eeca106725 1801 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1802 * @param __FLAG__: specifies the flag to check. @ref ETH_DMA_Flags
Kojto 122:f9eeca106725 1803 * @retval The new state of ETH_DMA_FLAG (SET or RESET).
Kojto 122:f9eeca106725 1804 */
Kojto 122:f9eeca106725 1805 #define __HAL_ETH_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->DMASR &( __FLAG__)) == ( __FLAG__))
Kojto 122:f9eeca106725 1806
Kojto 122:f9eeca106725 1807 /**
Kojto 122:f9eeca106725 1808 * @brief Checks whether the specified Ethernet DMA flag is set or not.
Kojto 122:f9eeca106725 1809 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1810 * @param __FLAG__: specifies the flag to clear. @ref ETH_DMA_Flags
Kojto 122:f9eeca106725 1811 * @retval The new state of ETH_DMA_FLAG (SET or RESET).
Kojto 122:f9eeca106725 1812 */
Kojto 122:f9eeca106725 1813 #define __HAL_ETH_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->DMASR = (__FLAG__))
Kojto 122:f9eeca106725 1814
Kojto 122:f9eeca106725 1815 /**
Kojto 122:f9eeca106725 1816 * @brief Checks whether the specified Ethernet DMA overflow flag is set or not.
Kojto 122:f9eeca106725 1817 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1818 * @param __OVERFLOW__: specifies the DMA overflow flag to check.
Kojto 122:f9eeca106725 1819 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1820 * @arg ETH_DMA_OVERFLOW_RXFIFOCOUNTER : Overflow for FIFO Overflows Counter
Kojto 122:f9eeca106725 1821 * @arg ETH_DMA_OVERFLOW_MISSEDFRAMECOUNTER : Overflow for Buffer Unavailable Missed Frame Counter
Kojto 122:f9eeca106725 1822 * @retval The state of Ethernet DMA overflow Flag (SET or RESET).
Kojto 122:f9eeca106725 1823 */
Kojto 122:f9eeca106725 1824 #define __HAL_ETH_GET_DMA_OVERFLOW_STATUS(__HANDLE__, __OVERFLOW__) (((__HANDLE__)->Instance->DMAMFBOCR & (__OVERFLOW__)) == (__OVERFLOW__))
Kojto 122:f9eeca106725 1825
Kojto 122:f9eeca106725 1826 /**
Kojto 122:f9eeca106725 1827 * @brief Set the DMA Receive status watchdog timer register value
Kojto 122:f9eeca106725 1828 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1829 * @param __VALUE__: DMA Receive status watchdog timer register value
Kojto 122:f9eeca106725 1830 * @retval None
Kojto 122:f9eeca106725 1831 */
Kojto 122:f9eeca106725 1832 #define __HAL_ETH_SET_RECEIVE_WATCHDOG_TIMER(__HANDLE__, __VALUE__) ((__HANDLE__)->Instance->DMARSWTR = (__VALUE__))
Kojto 122:f9eeca106725 1833
Kojto 122:f9eeca106725 1834 /**
Kojto 122:f9eeca106725 1835 * @brief Enables any unicast packet filtered by the MAC address
Kojto 122:f9eeca106725 1836 * recognition to be a wake-up frame.
Kojto 122:f9eeca106725 1837 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1838 * @retval None
Kojto 122:f9eeca106725 1839 */
Kojto 122:f9eeca106725 1840 #define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_GU)
Kojto 122:f9eeca106725 1841
Kojto 122:f9eeca106725 1842 /**
Kojto 122:f9eeca106725 1843 * @brief Disables any unicast packet filtered by the MAC address
Kojto 122:f9eeca106725 1844 * recognition to be a wake-up frame.
Kojto 122:f9eeca106725 1845 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1846 * @retval None
Kojto 122:f9eeca106725 1847 */
Kojto 122:f9eeca106725 1848 #define __HAL_ETH_GLOBAL_UNICAST_WAKEUP_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_GU)
Kojto 122:f9eeca106725 1849
Kojto 122:f9eeca106725 1850 /**
Kojto 122:f9eeca106725 1851 * @brief Enables the MAC Wake-Up Frame Detection.
Kojto 122:f9eeca106725 1852 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1853 * @retval None
Kojto 122:f9eeca106725 1854 */
Kojto 122:f9eeca106725 1855 #define __HAL_ETH_WAKEUP_FRAME_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_WFE)
Kojto 122:f9eeca106725 1856
Kojto 122:f9eeca106725 1857 /**
Kojto 122:f9eeca106725 1858 * @brief Disables the MAC Wake-Up Frame Detection.
Kojto 122:f9eeca106725 1859 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1860 * @retval None
Kojto 122:f9eeca106725 1861 */
Kojto 122:f9eeca106725 1862 #define __HAL_ETH_WAKEUP_FRAME_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE)
Kojto 122:f9eeca106725 1863
Kojto 122:f9eeca106725 1864 /**
Kojto 122:f9eeca106725 1865 * @brief Enables the MAC Magic Packet Detection.
Kojto 122:f9eeca106725 1866 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1867 * @retval None
Kojto 122:f9eeca106725 1868 */
Kojto 122:f9eeca106725 1869 #define __HAL_ETH_MAGIC_PACKET_DETECTION_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_MPE)
Kojto 122:f9eeca106725 1870
Kojto 122:f9eeca106725 1871 /**
Kojto 122:f9eeca106725 1872 * @brief Disables the MAC Magic Packet Detection.
Kojto 122:f9eeca106725 1873 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1874 * @retval None
Kojto 122:f9eeca106725 1875 */
Kojto 122:f9eeca106725 1876 #define __HAL_ETH_MAGIC_PACKET_DETECTION_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_WFE)
Kojto 122:f9eeca106725 1877
Kojto 122:f9eeca106725 1878 /**
Kojto 122:f9eeca106725 1879 * @brief Enables the MAC Power Down.
Kojto 122:f9eeca106725 1880 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1881 * @retval None
Kojto 122:f9eeca106725 1882 */
Kojto 122:f9eeca106725 1883 #define __HAL_ETH_POWER_DOWN_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR |= ETH_MACPMTCSR_PD)
Kojto 122:f9eeca106725 1884
Kojto 122:f9eeca106725 1885 /**
Kojto 122:f9eeca106725 1886 * @brief Disables the MAC Power Down.
Kojto 122:f9eeca106725 1887 * @param __HANDLE__: ETH Handle
Kojto 122:f9eeca106725 1888 * @retval None
Kojto 122:f9eeca106725 1889 */
Kojto 122:f9eeca106725 1890 #define __HAL_ETH_POWER_DOWN_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MACPMTCSR &= ~ETH_MACPMTCSR_PD)
Kojto 122:f9eeca106725 1891
Kojto 122:f9eeca106725 1892 /**
Kojto 122:f9eeca106725 1893 * @brief Checks whether the specified Ethernet PMT flag is set or not.
Kojto 122:f9eeca106725 1894 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1895 * @param __FLAG__: specifies the flag to check.
Kojto 122:f9eeca106725 1896 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1897 * @arg ETH_PMT_FLAG_WUFFRPR : Wake-Up Frame Filter Register Pointer Reset
Kojto 122:f9eeca106725 1898 * @arg ETH_PMT_FLAG_WUFR : Wake-Up Frame Received
Kojto 122:f9eeca106725 1899 * @arg ETH_PMT_FLAG_MPR : Magic Packet Received
Kojto 122:f9eeca106725 1900 * @retval The new state of Ethernet PMT Flag (SET or RESET).
Kojto 122:f9eeca106725 1901 */
Kojto 122:f9eeca106725 1902 #define __HAL_ETH_GET_PMT_FLAG_STATUS(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->MACPMTCSR &( __FLAG__)) == ( __FLAG__))
Kojto 122:f9eeca106725 1903
Kojto 122:f9eeca106725 1904 /**
Kojto 122:f9eeca106725 1905 * @brief Preset and Initialize the MMC counters to almost-full value: 0xFFFF_FFF0 (full - 16)
Kojto 122:f9eeca106725 1906 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1907 * @retval None
Kojto 122:f9eeca106725 1908 */
Kojto 122:f9eeca106725 1909 #define __HAL_ETH_MMC_COUNTER_FULL_PRESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= (ETH_MMCCR_MCFHP | ETH_MMCCR_MCP))
Kojto 122:f9eeca106725 1910
Kojto 122:f9eeca106725 1911 /**
Kojto 122:f9eeca106725 1912 * @brief Preset and Initialize the MMC counters to almost-half value: 0x7FFF_FFF0 (half - 16)
Kojto 122:f9eeca106725 1913 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1914 * @retval None
Kojto 122:f9eeca106725 1915 */
Kojto 122:f9eeca106725 1916 #define __HAL_ETH_MMC_COUNTER_HALF_PRESET(__HANDLE__) do{(__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCFHP;\
Kojto 122:f9eeca106725 1917 (__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_MCP;} while (0)
Kojto 122:f9eeca106725 1918
Kojto 122:f9eeca106725 1919 /**
Kojto 122:f9eeca106725 1920 * @brief Enables the MMC Counter Freeze.
Kojto 122:f9eeca106725 1921 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1922 * @retval None
Kojto 122:f9eeca106725 1923 */
Kojto 122:f9eeca106725 1924 #define __HAL_ETH_MMC_COUNTER_FREEZE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_MCF)
Kojto 122:f9eeca106725 1925
Kojto 122:f9eeca106725 1926 /**
Kojto 122:f9eeca106725 1927 * @brief Disables the MMC Counter Freeze.
Kojto 122:f9eeca106725 1928 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1929 * @retval None
Kojto 122:f9eeca106725 1930 */
Kojto 122:f9eeca106725 1931 #define __HAL_ETH_MMC_COUNTER_FREEZE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_MCF)
Kojto 122:f9eeca106725 1932
Kojto 122:f9eeca106725 1933 /**
Kojto 122:f9eeca106725 1934 * @brief Enables the MMC Reset On Read.
Kojto 122:f9eeca106725 1935 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1936 * @retval None
Kojto 122:f9eeca106725 1937 */
Kojto 122:f9eeca106725 1938 #define __HAL_ETH_ETH_MMC_RESET_ONREAD_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_ROR)
Kojto 122:f9eeca106725 1939
Kojto 122:f9eeca106725 1940 /**
Kojto 122:f9eeca106725 1941 * @brief Disables the MMC Reset On Read.
Kojto 122:f9eeca106725 1942 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1943 * @retval None
Kojto 122:f9eeca106725 1944 */
Kojto 122:f9eeca106725 1945 #define __HAL_ETH_ETH_MMC_RESET_ONREAD_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_ROR)
Kojto 122:f9eeca106725 1946
Kojto 122:f9eeca106725 1947 /**
Kojto 122:f9eeca106725 1948 * @brief Enables the MMC Counter Stop Rollover.
Kojto 122:f9eeca106725 1949 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1950 * @retval None
Kojto 122:f9eeca106725 1951 */
Kojto 122:f9eeca106725 1952 #define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR &= ~ETH_MMCCR_CSR)
Kojto 122:f9eeca106725 1953
Kojto 122:f9eeca106725 1954 /**
Kojto 122:f9eeca106725 1955 * @brief Disables the MMC Counter Stop Rollover.
Kojto 122:f9eeca106725 1956 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1957 * @retval None
Kojto 122:f9eeca106725 1958 */
Kojto 122:f9eeca106725 1959 #define __HAL_ETH_ETH_MMC_COUNTER_ROLLOVER_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_CSR)
Kojto 122:f9eeca106725 1960
Kojto 122:f9eeca106725 1961 /**
Kojto 122:f9eeca106725 1962 * @brief Resets the MMC Counters.
Kojto 122:f9eeca106725 1963 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1964 * @retval None
Kojto 122:f9eeca106725 1965 */
Kojto 122:f9eeca106725 1966 #define __HAL_ETH_MMC_COUNTERS_RESET(__HANDLE__) ((__HANDLE__)->Instance->MMCCR |= ETH_MMCCR_CR)
Kojto 122:f9eeca106725 1967
Kojto 122:f9eeca106725 1968 /**
Kojto 122:f9eeca106725 1969 * @brief Enables the specified Ethernet MMC Rx interrupts.
Kojto 122:f9eeca106725 1970 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1971 * @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
Kojto 122:f9eeca106725 1972 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1973 * @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value
Kojto 122:f9eeca106725 1974 * @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value
Kojto 122:f9eeca106725 1975 * @arg ETH_MMC_IT_RFCE : When Rx crc error counter reaches half the maximum value
Kojto 122:f9eeca106725 1976 * @retval None
Kojto 122:f9eeca106725 1977 */
Kojto 122:f9eeca106725 1978 #define __HAL_ETH_MMC_RX_IT_ENABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR &= ~((__INTERRUPT__) & 0xEFFFFFFF)
Kojto 122:f9eeca106725 1979 /**
Kojto 122:f9eeca106725 1980 * @brief Disables the specified Ethernet MMC Rx interrupts.
Kojto 122:f9eeca106725 1981 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1982 * @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
Kojto 122:f9eeca106725 1983 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1984 * @arg ETH_MMC_IT_RGUF : When Rx good unicast frames counter reaches half the maximum value
Kojto 122:f9eeca106725 1985 * @arg ETH_MMC_IT_RFAE : When Rx alignment error counter reaches half the maximum value
Kojto 122:f9eeca106725 1986 * @arg ETH_MMC_IT_RFCE : When Rx crc error counter reaches half the maximum value
Kojto 122:f9eeca106725 1987 * @retval None
Kojto 122:f9eeca106725 1988 */
Kojto 122:f9eeca106725 1989 #define __HAL_ETH_MMC_RX_IT_DISABLE(__HANDLE__, __INTERRUPT__) (__HANDLE__)->Instance->MMCRIMR |= ((__INTERRUPT__) & 0xEFFFFFFF)
Kojto 122:f9eeca106725 1990 /**
Kojto 122:f9eeca106725 1991 * @brief Enables the specified Ethernet MMC Tx interrupts.
Kojto 122:f9eeca106725 1992 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 1993 * @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
Kojto 122:f9eeca106725 1994 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 1995 * @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value
Kojto 122:f9eeca106725 1996 * @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value
Kojto 122:f9eeca106725 1997 * @arg ETH_MMC_IT_TGFSC : When Tx good single col counter reaches half the maximum value
Kojto 122:f9eeca106725 1998 * @retval None
Kojto 122:f9eeca106725 1999 */
Kojto 122:f9eeca106725 2000 #define __HAL_ETH_MMC_TX_IT_ENABLE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MMCRIMR &= ~ (__INTERRUPT__))
Kojto 122:f9eeca106725 2001
Kojto 122:f9eeca106725 2002 /**
Kojto 122:f9eeca106725 2003 * @brief Disables the specified Ethernet MMC Tx interrupts.
Kojto 122:f9eeca106725 2004 * @param __HANDLE__: ETH Handle.
Kojto 122:f9eeca106725 2005 * @param __INTERRUPT__: specifies the Ethernet MMC interrupt sources to be enabled or disabled.
Kojto 122:f9eeca106725 2006 * This parameter can be one of the following values:
Kojto 122:f9eeca106725 2007 * @arg ETH_MMC_IT_TGF : When Tx good frame counter reaches half the maximum value
Kojto 122:f9eeca106725 2008 * @arg ETH_MMC_IT_TGFMSC: When Tx good multi col counter reaches half the maximum value
Kojto 122:f9eeca106725 2009 * @arg ETH_MMC_IT_TGFSC : When Tx good single col counter reaches half the maximum value
Kojto 122:f9eeca106725 2010 * @retval None
Kojto 122:f9eeca106725 2011 */
Kojto 122:f9eeca106725 2012 #define __HAL_ETH_MMC_TX_IT_DISABLE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MMCRIMR |= (__INTERRUPT__))
Kojto 122:f9eeca106725 2013
Kojto 122:f9eeca106725 2014 /**
Kojto 122:f9eeca106725 2015 * @brief Enables the ETH External interrupt line.
Kojto 122:f9eeca106725 2016 * @retval None
Kojto 122:f9eeca106725 2017 */
Kojto 122:f9eeca106725 2018 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2019
Kojto 122:f9eeca106725 2020 /**
Kojto 122:f9eeca106725 2021 * @brief Disables the ETH External interrupt line.
Kojto 122:f9eeca106725 2022 * @retval None
Kojto 122:f9eeca106725 2023 */
Kojto 122:f9eeca106725 2024 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2025
Kojto 122:f9eeca106725 2026 /**
Kojto 122:f9eeca106725 2027 * @brief Enable event on ETH External event line.
Kojto 122:f9eeca106725 2028 * @retval None.
Kojto 122:f9eeca106725 2029 */
Kojto 122:f9eeca106725 2030 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_EVENT() EXTI->EMR |= (ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2031
Kojto 122:f9eeca106725 2032 /**
Kojto 122:f9eeca106725 2033 * @brief Disable event on ETH External event line
Kojto 122:f9eeca106725 2034 * @retval None.
Kojto 122:f9eeca106725 2035 */
Kojto 122:f9eeca106725 2036 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_EVENT() EXTI->EMR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2037
Kojto 122:f9eeca106725 2038 /**
Kojto 122:f9eeca106725 2039 * @brief Get flag of the ETH External interrupt line.
Kojto 122:f9eeca106725 2040 * @retval None
Kojto 122:f9eeca106725 2041 */
Kojto 122:f9eeca106725 2042 #define __HAL_ETH_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2043
Kojto 122:f9eeca106725 2044 /**
Kojto 122:f9eeca106725 2045 * @brief Clear flag of the ETH External interrupt line.
Kojto 122:f9eeca106725 2046 * @retval None
Kojto 122:f9eeca106725 2047 */
Kojto 122:f9eeca106725 2048 #define __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2049
Kojto 122:f9eeca106725 2050 /**
Kojto 122:f9eeca106725 2051 * @brief Enables rising edge trigger to the ETH External interrupt line.
Kojto 122:f9eeca106725 2052 * @retval None
Kojto 122:f9eeca106725 2053 */
Kojto 122:f9eeca106725 2054 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER() EXTI->RTSR |= ETH_EXTI_LINE_WAKEUP
Kojto 122:f9eeca106725 2055
Kojto 122:f9eeca106725 2056 /**
Kojto 122:f9eeca106725 2057 * @brief Disables the rising edge trigger to the ETH External interrupt line.
Kojto 122:f9eeca106725 2058 * @retval None
Kojto 122:f9eeca106725 2059 */
Kojto 122:f9eeca106725 2060 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_RISING_EDGE_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2061
Kojto 122:f9eeca106725 2062 /**
Kojto 122:f9eeca106725 2063 * @brief Enables falling edge trigger to the ETH External interrupt line.
Kojto 122:f9eeca106725 2064 * @retval None
Kojto 122:f9eeca106725 2065 */
Kojto 122:f9eeca106725 2066 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER() EXTI->FTSR |= (ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2067
Kojto 122:f9eeca106725 2068 /**
Kojto 122:f9eeca106725 2069 * @brief Disables falling edge trigger to the ETH External interrupt line.
Kojto 122:f9eeca106725 2070 * @retval None
Kojto 122:f9eeca106725 2071 */
Kojto 122:f9eeca106725 2072 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLING_EDGE_TRIGGER() EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2073
Kojto 122:f9eeca106725 2074 /**
Kojto 122:f9eeca106725 2075 * @brief Enables rising/falling edge trigger to the ETH External interrupt line.
Kojto 122:f9eeca106725 2076 * @retval None
Kojto 122:f9eeca106725 2077 */
Kojto 122:f9eeca106725 2078 #define __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER() EXTI->RTSR |= ETH_EXTI_LINE_WAKEUP;\
Kojto 122:f9eeca106725 2079 EXTI->FTSR |= ETH_EXTI_LINE_WAKEUP
Kojto 122:f9eeca106725 2080
Kojto 122:f9eeca106725 2081 /**
Kojto 122:f9eeca106725 2082 * @brief Disables rising/falling edge trigger to the ETH External interrupt line.
Kojto 122:f9eeca106725 2083 * @retval None
Kojto 122:f9eeca106725 2084 */
Kojto 122:f9eeca106725 2085 #define __HAL_ETH_WAKEUP_EXTI_DISABLE_FALLINGRISING_TRIGGER() EXTI->RTSR &= ~(ETH_EXTI_LINE_WAKEUP);\
Kojto 122:f9eeca106725 2086 EXTI->FTSR &= ~(ETH_EXTI_LINE_WAKEUP)
Kojto 122:f9eeca106725 2087
Kojto 122:f9eeca106725 2088 /**
Kojto 122:f9eeca106725 2089 * @brief Generate a Software interrupt on selected EXTI line.
Kojto 122:f9eeca106725 2090 * @retval None.
Kojto 122:f9eeca106725 2091 */
Kojto 122:f9eeca106725 2092 #define __HAL_ETH_WAKEUP_EXTI_GENERATE_SWIT() EXTI->SWIER|= ETH_EXTI_LINE_WAKEUP
Kojto 122:f9eeca106725 2093
Kojto 122:f9eeca106725 2094 /**
Kojto 122:f9eeca106725 2095 * @}
Kojto 122:f9eeca106725 2096 */
Kojto 122:f9eeca106725 2097 /* Exported functions --------------------------------------------------------*/
Kojto 122:f9eeca106725 2098
Kojto 122:f9eeca106725 2099 /** @addtogroup ETH_Exported_Functions
Kojto 122:f9eeca106725 2100 * @{
Kojto 122:f9eeca106725 2101 */
Kojto 122:f9eeca106725 2102
Kojto 122:f9eeca106725 2103 /* Initialization and de-initialization functions ****************************/
Kojto 122:f9eeca106725 2104
Kojto 122:f9eeca106725 2105 /** @addtogroup ETH_Exported_Functions_Group1
Kojto 122:f9eeca106725 2106 * @{
Kojto 122:f9eeca106725 2107 */
Kojto 122:f9eeca106725 2108 HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2109 HAL_StatusTypeDef HAL_ETH_DeInit(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2110 void HAL_ETH_MspInit(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2111 void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2112 HAL_StatusTypeDef HAL_ETH_DMATxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMATxDescTab, uint8_t* TxBuff, uint32_t TxBuffCount);
Kojto 122:f9eeca106725 2113 HAL_StatusTypeDef HAL_ETH_DMARxDescListInit(ETH_HandleTypeDef *heth, ETH_DMADescTypeDef *DMARxDescTab, uint8_t *RxBuff, uint32_t RxBuffCount);
Kojto 122:f9eeca106725 2114
Kojto 122:f9eeca106725 2115 /**
Kojto 122:f9eeca106725 2116 * @}
Kojto 122:f9eeca106725 2117 */
Kojto 122:f9eeca106725 2118 /* IO operation functions ****************************************************/
Kojto 122:f9eeca106725 2119
Kojto 122:f9eeca106725 2120 /** @addtogroup ETH_Exported_Functions_Group2
Kojto 122:f9eeca106725 2121 * @{
Kojto 122:f9eeca106725 2122 */
Kojto 122:f9eeca106725 2123 HAL_StatusTypeDef HAL_ETH_TransmitFrame(ETH_HandleTypeDef *heth, uint32_t FrameLength);
Kojto 122:f9eeca106725 2124 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2125 /* Communication with PHY functions*/
Kojto 122:f9eeca106725 2126 HAL_StatusTypeDef HAL_ETH_ReadPHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t *RegValue);
Kojto 122:f9eeca106725 2127 HAL_StatusTypeDef HAL_ETH_WritePHYRegister(ETH_HandleTypeDef *heth, uint16_t PHYReg, uint32_t RegValue);
Kojto 122:f9eeca106725 2128 /* Non-Blocking mode: Interrupt */
Kojto 122:f9eeca106725 2129 HAL_StatusTypeDef HAL_ETH_GetReceivedFrame_IT(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2130 void HAL_ETH_IRQHandler(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2131 /* Callback in non blocking modes (Interrupt) */
Kojto 122:f9eeca106725 2132 void HAL_ETH_TxCpltCallback(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2133 void HAL_ETH_RxCpltCallback(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2134 void HAL_ETH_ErrorCallback(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2135 /**
Kojto 122:f9eeca106725 2136 * @}
Kojto 122:f9eeca106725 2137 */
Kojto 122:f9eeca106725 2138
Kojto 122:f9eeca106725 2139 /* Peripheral Control functions **********************************************/
Kojto 122:f9eeca106725 2140
Kojto 122:f9eeca106725 2141 /** @addtogroup ETH_Exported_Functions_Group3
Kojto 122:f9eeca106725 2142 * @{
Kojto 122:f9eeca106725 2143 */
Kojto 122:f9eeca106725 2144
Kojto 122:f9eeca106725 2145 HAL_StatusTypeDef HAL_ETH_Start(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2146 HAL_StatusTypeDef HAL_ETH_Stop(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2147 HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef *macconf);
Kojto 122:f9eeca106725 2148 HAL_StatusTypeDef HAL_ETH_ConfigDMA(ETH_HandleTypeDef *heth, ETH_DMAInitTypeDef *dmaconf);
Kojto 122:f9eeca106725 2149 /**
Kojto 122:f9eeca106725 2150 * @}
Kojto 122:f9eeca106725 2151 */
Kojto 122:f9eeca106725 2152
Kojto 122:f9eeca106725 2153 /* Peripheral State functions ************************************************/
Kojto 122:f9eeca106725 2154
Kojto 122:f9eeca106725 2155 /** @addtogroup ETH_Exported_Functions_Group4
Kojto 122:f9eeca106725 2156 * @{
Kojto 122:f9eeca106725 2157 */
Kojto 122:f9eeca106725 2158 HAL_ETH_StateTypeDef HAL_ETH_GetState(ETH_HandleTypeDef *heth);
Kojto 122:f9eeca106725 2159 /**
Kojto 122:f9eeca106725 2160 * @}
Kojto 122:f9eeca106725 2161 */
Kojto 122:f9eeca106725 2162
Kojto 122:f9eeca106725 2163 /**
Kojto 122:f9eeca106725 2164 * @}
Kojto 122:f9eeca106725 2165 */
Kojto 122:f9eeca106725 2166
Kojto 122:f9eeca106725 2167 /**
Kojto 122:f9eeca106725 2168 * @}
Kojto 122:f9eeca106725 2169 */
Kojto 122:f9eeca106725 2170
Kojto 122:f9eeca106725 2171 /**
Kojto 122:f9eeca106725 2172 * @}
Kojto 122:f9eeca106725 2173 */
<> 135:176b8275d35d 2174 #endif /* ETH */
<> 135:176b8275d35d 2175
Kojto 122:f9eeca106725 2176 #ifdef __cplusplus
Kojto 122:f9eeca106725 2177 }
Kojto 122:f9eeca106725 2178 #endif
Kojto 122:f9eeca106725 2179
Kojto 122:f9eeca106725 2180 #endif /* __STM32F7xx_HAL_ETH_H */
Kojto 122:f9eeca106725 2181
Kojto 122:f9eeca106725 2182
Kojto 122:f9eeca106725 2183
Kojto 122:f9eeca106725 2184 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/